1 /* SPDX-License-Identifier: BSD-3-Clause-Clear */
2 /* Copyright (C) 2020 MediaTek Inc. */
3
4 #ifndef __MT7915_H
5 #define __MT7915_H
6
7 #include <linux/interrupt.h>
8 #include <linux/ktime.h>
9 #include "../mt76_connac.h"
10 #include "regs.h"
11
12 #define MT7915_MAX_INTERFACES 19
13 #define MT7915_WTBL_SIZE 288
14 #define MT7916_WTBL_SIZE 544
15 #define MT7915_WTBL_RESERVED (mt7915_wtbl_size(dev) - 1)
16 #define MT7915_WTBL_STA (MT7915_WTBL_RESERVED - \
17 MT7915_MAX_INTERFACES)
18
19 #define MT7915_WATCHDOG_TIME (HZ / 10)
20 #define MT7915_RESET_TIMEOUT (30 * HZ)
21
22 #define MT7915_TX_RING_SIZE 2048
23 #define MT7915_TX_MCU_RING_SIZE 256
24 #define MT7915_TX_FWDL_RING_SIZE 128
25
26 #define MT7915_RX_RING_SIZE 1536
27 #define MT7915_RX_MCU_RING_SIZE 512
28
29 #define MT7915_FIRMWARE_WA "mediatek/mt7915_wa.bin"
30 #define MT7915_FIRMWARE_WM "mediatek/mt7915_wm.bin"
31 #define MT7915_ROM_PATCH "mediatek/mt7915_rom_patch.bin"
32
33 #define MT7916_FIRMWARE_WA "mediatek/mt7916_wa.bin"
34 #define MT7916_FIRMWARE_WM "mediatek/mt7916_wm.bin"
35 #define MT7916_ROM_PATCH "mediatek/mt7916_rom_patch.bin"
36
37 #define MT7981_FIRMWARE_WA "mediatek/mt7981_wa.bin"
38 #define MT7981_FIRMWARE_WM "mediatek/mt7981_wm.bin"
39 #define MT7981_ROM_PATCH "mediatek/mt7981_rom_patch.bin"
40
41 #define MT7986_FIRMWARE_WA "mediatek/mt7986_wa.bin"
42 #define MT7986_FIRMWARE_WM "mediatek/mt7986_wm.bin"
43 #define MT7986_FIRMWARE_WM_MT7975 "mediatek/mt7986_wm_mt7975.bin"
44 #define MT7986_ROM_PATCH "mediatek/mt7986_rom_patch.bin"
45 #define MT7986_ROM_PATCH_MT7975 "mediatek/mt7986_rom_patch_mt7975.bin"
46
47 #define MT7915_EEPROM_DEFAULT "mediatek/mt7915_eeprom.bin"
48 #define MT7915_EEPROM_DEFAULT_DBDC "mediatek/mt7915_eeprom_dbdc.bin"
49 #define MT7916_EEPROM_DEFAULT "mediatek/mt7916_eeprom.bin"
50
51 #define MT7981_EEPROM_MT7976_DEFAULT_DBDC "mediatek/mt7981_eeprom_mt7976_dbdc.bin"
52
53 #define MT7986_EEPROM_MT7975_DEFAULT "mediatek/mt7986_eeprom_mt7975.bin"
54 #define MT7986_EEPROM_MT7975_DUAL_DEFAULT "mediatek/mt7986_eeprom_mt7975_dual.bin"
55 #define MT7986_EEPROM_MT7976_DEFAULT "mediatek/mt7986_eeprom_mt7976.bin"
56 #define MT7986_EEPROM_MT7976_DEFAULT_DBDC "mediatek/mt7986_eeprom_mt7976_dbdc.bin"
57 #define MT7986_EEPROM_MT7976_DUAL_DEFAULT "mediatek/mt7986_eeprom_mt7976_dual.bin"
58
59 #define MT7915_EEPROM_SIZE 3584
60 #define MT7916_EEPROM_SIZE 4096
61
62 #define MT7915_EEPROM_BLOCK_SIZE 16
63 #define MT7915_HW_TOKEN_SIZE 4096
64 #define MT7915_TOKEN_SIZE 8192
65
66 #define MT7915_CFEND_RATE_DEFAULT 0x49 /* OFDM 24M */
67 #define MT7915_CFEND_RATE_11B 0x03 /* 11B LP, 11M */
68
69 #define MT7915_THERMAL_THROTTLE_MAX 100
70 #define MT7915_CDEV_THROTTLE_MAX 99
71
72 #define MT7915_SKU_RATE_NUM 161
73 #define MT7915_SKU_PATH_NUM 185
74
75 #define MT7915_MAX_TWT_AGRT 16
76 #define MT7915_MAX_STA_TWT_AGRT 8
77 #define MT7915_MIN_TWT_DUR 64
78 #define MT7915_MAX_QUEUE (MT_RXQ_BAND2 + __MT_MCUQ_MAX + 2)
79
80 #define MT7915_WED_RX_TOKEN_SIZE 12288
81
82 #define MT7915_CRIT_TEMP_IDX 0
83 #define MT7915_MAX_TEMP_IDX 1
84 #define MT7915_CRIT_TEMP 110
85 #define MT7915_MAX_TEMP 120
86
87 #define MT7915_RTS_LEN_THRES 0x92b
88
89 struct mt7915_vif;
90 struct mt7915_sta;
91 struct mt7915_dfs_pulse;
92 struct mt7915_dfs_pattern;
93
94 enum mt7915_txq_id {
95 MT7915_TXQ_FWDL = 16,
96 MT7915_TXQ_MCU_WM,
97 MT7915_TXQ_BAND0,
98 MT7915_TXQ_BAND1,
99 MT7915_TXQ_MCU_WA,
100 };
101
102 enum mt7915_rxq_id {
103 MT7915_RXQ_BAND0 = 0,
104 MT7915_RXQ_BAND1,
105 MT7915_RXQ_MCU_WM = 0,
106 MT7915_RXQ_MCU_WA,
107 MT7915_RXQ_MCU_WA_EXT,
108 };
109
110 enum mt7916_rxq_id {
111 MT7916_RXQ_MCU_WM = 0,
112 MT7916_RXQ_MCU_WA,
113 MT7916_RXQ_MCU_WA_MAIN,
114 MT7916_RXQ_MCU_WA_EXT,
115 MT7916_RXQ_BAND0,
116 MT7916_RXQ_BAND1,
117 };
118
119 struct mt7915_twt_flow {
120 struct list_head list;
121 u64 start_tsf;
122 u64 tsf;
123 u32 duration;
124 u16 wcid;
125 __le16 mantissa;
126 u8 exp;
127 u8 table_id;
128 u8 id;
129 u8 protection:1;
130 u8 flowtype:1;
131 u8 trigger:1;
132 u8 sched:1;
133 };
134
135 DECLARE_EWMA(avg_signal, 10, 8)
136
137 struct mt7915_sta {
138 struct mt76_wcid wcid; /* must be first */
139
140 struct mt7915_vif *vif;
141
142 struct list_head rc_list;
143 u32 airtime_ac[8];
144
145 int ack_signal;
146 struct ewma_avg_signal avg_ack_signal;
147
148 unsigned long changed;
149 unsigned long jiffies;
150 struct mt76_connac_sta_key_conf bip;
151
152 struct {
153 u8 flowid_mask;
154 struct mt7915_twt_flow flow[MT7915_MAX_STA_TWT_AGRT];
155 } twt;
156 };
157
158 struct mt7915_vif_cap {
159 bool ht_ldpc:1;
160 bool vht_ldpc:1;
161 bool he_ldpc:1;
162 bool vht_su_ebfer:1;
163 bool vht_su_ebfee:1;
164 bool vht_mu_ebfer:1;
165 bool vht_mu_ebfee:1;
166 bool he_su_ebfer:1;
167 bool he_su_ebfee:1;
168 bool he_mu_ebfer:1;
169 };
170
171 struct mt7915_vif {
172 struct mt76_vif_link mt76; /* must be first */
173
174 struct mt7915_vif_cap cap;
175 struct mt7915_sta sta;
176 struct mt7915_phy *phy;
177
178 struct ieee80211_tx_queue_params queue_params[IEEE80211_NUM_ACS];
179 struct cfg80211_bitrate_mask bitrate_mask;
180 };
181
182 /* crash-dump */
183 struct mt7915_crash_data {
184 guid_t guid;
185 struct timespec64 timestamp;
186
187 u8 *memdump_buf;
188 size_t memdump_buf_len;
189 };
190
191 struct mt7915_hif {
192 struct list_head list;
193
194 struct device *dev;
195 void __iomem *regs;
196 int irq;
197 u32 index;
198 };
199
200 struct mt7915_phy {
201 struct mt76_phy *mt76;
202 struct mt7915_dev *dev;
203
204 struct ieee80211_sband_iftype_data iftype[NUM_NL80211_BANDS][NUM_NL80211_IFTYPES];
205
206 struct ieee80211_vif *monitor_vif;
207
208 struct thermal_zone_device *tzone;
209 struct thermal_cooling_device *cdev;
210 u8 cdev_state;
211 u8 throttle_state;
212 u32 throttle_temp[2]; /* 0: critical high, 1: maximum */
213
214 u32 rxfilter;
215 u64 omac_mask;
216
217 u16 noise;
218
219 s16 coverage_class;
220 u8 slottime;
221
222 u32 trb_ts;
223
224 u32 rx_ampdu_ts;
225 u32 ampdu_ref;
226
227 struct mt76_mib_stats mib;
228 struct mt76_channel_state state_ts;
229
230 bool sku_limit_en:1;
231 bool sku_path_en:1;
232
233 #ifdef CONFIG_NL80211_TESTMODE
234 struct {
235 u32 *reg_backup;
236
237 s32 last_freq_offset;
238 u8 last_rcpi[4];
239 s8 last_ib_rssi[4];
240 s8 last_wb_rssi[4];
241 u8 last_snr;
242
243 u8 spe_idx;
244 } test;
245 #endif
246 };
247
248 struct mt7915_dev {
249 union { /* must be first */
250 struct mt76_dev mt76;
251 struct mt76_phy mphy;
252 };
253
254 struct mt7915_hif *hif2;
255 struct mt7915_reg_desc reg;
256 u8 q_id[MT7915_MAX_QUEUE];
257 u32 q_int_mask[MT7915_MAX_QUEUE];
258 u32 wfdma_mask;
259
260 const struct mt76_bus_ops *bus_ops;
261 struct mt7915_phy phy;
262
263 /* monitor rx chain configured channel */
264 struct cfg80211_chan_def rdd2_chandef;
265 struct mt7915_phy *rdd2_phy;
266
267 u16 chainmask;
268 u16 chainshift;
269 u32 hif_idx;
270
271 struct work_struct init_work;
272 struct work_struct rc_work;
273 struct work_struct dump_work;
274 struct work_struct reset_work;
275 wait_queue_head_t reset_wait;
276
277 struct {
278 u32 state;
279 u32 wa_reset_count;
280 u32 wm_reset_count;
281 bool hw_full_reset:1;
282 bool hw_init_done:1;
283 bool restart:1;
284 } recovery;
285
286 /* protects coredump data */
287 struct mutex dump_mutex;
288 #ifdef CONFIG_DEV_COREDUMP
289 struct {
290 struct mt7915_crash_data *crash_data;
291 } coredump;
292 #endif
293
294 struct list_head sta_rc_list;
295 struct list_head twt_list;
296 spinlock_t reg_lock;
297
298 u32 hw_pattern;
299 u32 ple1_sts;
300
301 bool dbdc_support;
302 bool flash_mode;
303 bool muru_debug;
304 bool ibf;
305
306 u8 monitor_mask;
307
308 struct dentry *debugfs_dir;
309 struct rchan *relay_fwlog;
310
311 void *cal;
312 u32 cur_prek_offset;
313 u8 dpd_chan_num_2g;
314 u8 dpd_chan_num_5g;
315 u8 dpd_chan_num_6g;
316
317 struct {
318 u8 debug_wm;
319 u8 debug_wa;
320 u8 debug_bin;
321 } fw;
322
323 struct {
324 u16 table_mask;
325 u8 n_agrt;
326 } twt;
327
328 struct reset_control *rstc;
329 void __iomem *dcm;
330 void __iomem *sku;
331 };
332
333 enum {
334 WFDMA0 = 0x0,
335 WFDMA1,
336 WFDMA_EXT,
337 __MT_WFDMA_MAX,
338 };
339
340 enum rdd_idx {
341 MT_RDD_IDX_BAND0, /* RDD idx for band idx 0 (single-band) */
342 MT_RDD_IDX_BAND1, /* RDD idx for band idx 1 */
343 MT_RDD_IDX_BACKGROUND, /* RDD idx for background chain */
344 };
345
346 enum mt7915_rdd_cmd {
347 RDD_STOP,
348 RDD_START,
349 RDD_DET_MODE,
350 RDD_RADAR_EMULATE,
351 RDD_START_TXQ = 20,
352 RDD_SET_WF_ANT = 30,
353 RDD_CAC_START = 50,
354 RDD_CAC_END,
355 RDD_NORMAL_START,
356 RDD_DISABLE_DFS_CAL,
357 RDD_PULSE_DBG,
358 RDD_READ_PULSE,
359 RDD_RESUME_BF,
360 RDD_IRQ_OFF,
361 };
362
363 static inline int
mt7915_get_rdd_idx(struct mt7915_phy * phy,bool is_background)364 mt7915_get_rdd_idx(struct mt7915_phy *phy, bool is_background)
365 {
366 if (!phy->mt76->cap.has_5ghz)
367 return -1;
368
369 if (is_background)
370 return MT_RDD_IDX_BACKGROUND;
371
372 return phy->mt76->band_idx;
373 }
374
375 static inline struct mt7915_phy *
mt7915_hw_phy(struct ieee80211_hw * hw)376 mt7915_hw_phy(struct ieee80211_hw *hw)
377 {
378 struct mt76_phy *phy = hw->priv;
379
380 return phy->priv;
381 }
382
383 static inline struct mt7915_dev *
mt7915_hw_dev(struct ieee80211_hw * hw)384 mt7915_hw_dev(struct ieee80211_hw *hw)
385 {
386 struct mt76_phy *phy = hw->priv;
387
388 return container_of(phy->dev, struct mt7915_dev, mt76);
389 }
390
391 static inline struct mt7915_phy *
mt7915_ext_phy(struct mt7915_dev * dev)392 mt7915_ext_phy(struct mt7915_dev *dev)
393 {
394 struct mt76_phy *phy = dev->mt76.phys[MT_BAND1];
395
396 if (!phy)
397 return NULL;
398
399 return phy->priv;
400 }
401
402 /* without dbdc, the chainmask is stored unshifted, even if the phy is
403 * bound to band 1
404 */
mt7915_band_chainshift(struct mt7915_phy * phy)405 static inline u8 mt7915_band_chainshift(struct mt7915_phy *phy)
406 {
407 struct mt7915_dev *dev = phy->dev;
408
409 if (!dev->dbdc_support)
410 return 0;
411
412 return phy->mt76->band_idx * dev->chainshift;
413 }
414
mt7915_band_chainmask(struct mt7915_phy * phy)415 static inline u16 mt7915_band_chainmask(struct mt7915_phy *phy)
416 {
417 return phy->mt76->chainmask >> mt7915_band_chainshift(phy);
418 }
419
mt7915_check_adie(struct mt7915_dev * dev,bool sku)420 static inline u32 mt7915_check_adie(struct mt7915_dev *dev, bool sku)
421 {
422 u32 mask = sku ? MT_CONNINFRA_SKU_MASK : MT_ADIE_TYPE_MASK;
423 if (!is_mt798x(&dev->mt76))
424 return 0;
425
426 return mt76_rr(dev, MT_CONNINFRA_SKU_DEC_ADDR) & mask;
427 }
428
429 extern const struct ieee80211_ops mt7915_ops;
430 extern const struct mt76_testmode_ops mt7915_testmode_ops;
431 extern struct pci_driver mt7915_pci_driver;
432 extern struct pci_driver mt7915_hif_driver;
433 extern struct platform_driver mt798x_wmac_driver;
434
435 #ifdef CONFIG_MT798X_WMAC
436 int mt7986_wmac_enable(struct mt7915_dev *dev);
437 void mt7986_wmac_disable(struct mt7915_dev *dev);
438 #else
mt7986_wmac_enable(struct mt7915_dev * dev)439 static inline int mt7986_wmac_enable(struct mt7915_dev *dev)
440 {
441 return 0;
442 }
443
mt7986_wmac_disable(struct mt7915_dev * dev)444 static inline void mt7986_wmac_disable(struct mt7915_dev *dev)
445 {
446 }
447 #endif
448 struct mt7915_dev *mt7915_mmio_probe(struct device *pdev,
449 void __iomem *mem_base, u32 device_id);
450 void mt7915_wfsys_reset(struct mt7915_dev *dev);
451 irqreturn_t mt7915_irq_handler(int irq, void *dev_instance);
452 u64 __mt7915_get_tsf(struct ieee80211_hw *hw, struct mt7915_vif *mvif);
453 u32 mt7915_wed_init_buf(void *ptr, dma_addr_t phys, int token_id);
454
455 int mt7915_register_device(struct mt7915_dev *dev);
456 void mt7915_unregister_device(struct mt7915_dev *dev);
457 int mt7915_eeprom_init(struct mt7915_dev *dev);
458 void mt7915_eeprom_parse_hw_cap(struct mt7915_dev *dev,
459 struct mt7915_phy *phy);
460 int mt7915_eeprom_get_target_power(struct mt7915_dev *dev,
461 struct ieee80211_channel *chan,
462 u8 chain_idx);
463 s8 mt7915_eeprom_get_power_delta(struct mt7915_dev *dev, int band);
464 bool mt7915_eeprom_has_background_radar(struct mt7915_dev *dev);
465 int mt7915_dma_init(struct mt7915_dev *dev, struct mt7915_phy *phy2);
466 void mt7915_dma_prefetch(struct mt7915_dev *dev);
467 void mt7915_dma_cleanup(struct mt7915_dev *dev);
468 int mt7915_dma_reset(struct mt7915_dev *dev, bool force);
469 int mt7915_dma_start(struct mt7915_dev *dev, bool reset, bool wed_reset);
470 int mt7915_txbf_init(struct mt7915_dev *dev);
471 void mt7915_init_txpower(struct mt7915_phy *phy);
472 void mt7915_reset(struct mt7915_dev *dev);
473 int mt7915_run(struct ieee80211_hw *hw);
474 int mt7915_mcu_init(struct mt7915_dev *dev);
475 int mt7915_mcu_init_firmware(struct mt7915_dev *dev);
476 int mt7915_mcu_twt_agrt_update(struct mt7915_dev *dev,
477 struct mt7915_vif *mvif,
478 struct mt7915_twt_flow *flow,
479 int cmd);
480 int mt7915_mcu_add_dev_info(struct mt7915_phy *phy,
481 struct ieee80211_vif *vif, bool enable);
482 int mt7915_mcu_add_bss_info(struct mt7915_phy *phy,
483 struct ieee80211_vif *vif, int enable);
484 int mt7915_mcu_add_sta(struct mt7915_dev *dev, struct ieee80211_vif *vif,
485 struct ieee80211_sta *sta, int conn_state, bool newly);
486 int mt7915_mcu_add_tx_ba(struct mt7915_dev *dev,
487 struct ieee80211_ampdu_params *params,
488 bool add);
489 int mt7915_mcu_add_rx_ba(struct mt7915_dev *dev,
490 struct ieee80211_ampdu_params *params,
491 bool add);
492 int mt7915_mcu_update_bss_color(struct mt7915_dev *dev, struct ieee80211_vif *vif,
493 struct cfg80211_he_bss_color *he_bss_color);
494 int mt7915_mcu_add_inband_discov(struct mt7915_dev *dev, struct ieee80211_vif *vif,
495 u32 changed);
496 int mt7915_mcu_add_beacon(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
497 int enable, u32 changed);
498 int mt7915_mcu_set_protection(struct mt7915_phy *phy, struct ieee80211_vif *vif,
499 u8 ht_mode, bool use_cts_prot);
500 int mt7915_mcu_add_obss_spr(struct mt7915_phy *phy, struct ieee80211_vif *vif,
501 struct ieee80211_he_obss_pd *he_obss_pd);
502 int mt7915_mcu_add_rate_ctrl(struct mt7915_dev *dev, struct ieee80211_vif *vif,
503 struct ieee80211_sta *sta, bool changed);
504 int mt7915_mcu_add_smps(struct mt7915_dev *dev, struct ieee80211_vif *vif,
505 struct ieee80211_sta *sta);
506 int mt7915_set_channel(struct mt76_phy *mphy);
507 int mt7915_mcu_set_chan_info(struct mt7915_phy *phy, int cmd);
508 int mt7915_mcu_set_tx(struct mt7915_dev *dev, struct ieee80211_vif *vif);
509 int mt7915_mcu_update_edca(struct mt7915_dev *dev, void *req);
510 int mt7915_mcu_set_fixed_rate_ctrl(struct mt7915_dev *dev,
511 struct ieee80211_vif *vif,
512 struct ieee80211_sta *sta,
513 void *data, u32 field);
514 int mt7915_mcu_set_eeprom(struct mt7915_dev *dev);
515 int mt7915_mcu_get_eeprom(struct mt7915_dev *dev, u32 offset, u8 *read_buf);
516 int mt7915_mcu_get_eeprom_free_block(struct mt7915_dev *dev, u8 *block_num);
517 int mt7915_mcu_set_mac(struct mt7915_dev *dev, int band, bool enable,
518 bool hdr_trans);
519 int mt7915_mcu_set_test_param(struct mt7915_dev *dev, u8 param, bool test_mode,
520 u8 en);
521 int mt7915_mcu_set_ser(struct mt7915_dev *dev, u8 action, u8 set, u8 band);
522 int mt7915_mcu_set_sku_en(struct mt7915_phy *phy);
523 int mt7915_mcu_set_txpower_sku(struct mt7915_phy *phy);
524 int mt7915_mcu_get_txpower_sku(struct mt7915_phy *phy, s8 *txpower, int len,
525 u8 category);
526 int mt7915_mcu_set_txpower_frame_min(struct mt7915_phy *phy, s8 txpower);
527 int mt7915_mcu_set_txpower_frame(struct mt7915_phy *phy,
528 struct ieee80211_vif *vif,
529 struct ieee80211_sta *sta, s8 txpower);
530 int mt7915_mcu_set_txbf(struct mt7915_dev *dev, u8 action);
531 int mt7915_mcu_set_fcc5_lpn(struct mt7915_dev *dev, int val);
532 int mt7915_mcu_set_pulse_th(struct mt7915_dev *dev,
533 const struct mt7915_dfs_pulse *pulse);
534 int mt7915_mcu_set_radar_th(struct mt7915_dev *dev, int index,
535 const struct mt7915_dfs_pattern *pattern);
536 int mt7915_mcu_set_muru_ctrl(struct mt7915_dev *dev, u32 cmd, u32 val);
537 int mt7915_mcu_apply_group_cal(struct mt7915_dev *dev);
538 int mt7915_mcu_apply_tx_dpd(struct mt7915_phy *phy);
539 int mt7915_mcu_get_chan_mib_info(struct mt7915_phy *phy, bool chan_switch);
540 int mt7915_mcu_get_temperature(struct mt7915_phy *phy);
541 int mt7915_mcu_set_thermal_throttling(struct mt7915_phy *phy, u8 state);
542 int mt7915_mcu_set_thermal_protect(struct mt7915_phy *phy);
543 int mt7915_mcu_get_rx_rate(struct mt7915_phy *phy, struct ieee80211_vif *vif,
544 struct ieee80211_sta *sta, struct rate_info *rate);
545 int mt7915_mcu_rdd_background_enable(struct mt7915_phy *phy,
546 struct cfg80211_chan_def *chandef);
547 int mt7915_mcu_wed_wa_tx_stats(struct mt7915_dev *dev, u16 wcid);
548 int mt7915_mcu_rf_regval(struct mt7915_dev *dev, u32 regidx, u32 *val, bool set);
549 int mt7915_mcu_wa_cmd(struct mt7915_dev *dev, int cmd, u32 a1, u32 a2, u32 a3);
550 int mt7915_mcu_fw_log_2_host(struct mt7915_dev *dev, u8 type, u8 ctrl);
551 int mt7915_mcu_fw_dbg_ctrl(struct mt7915_dev *dev, u32 module, u8 level);
552 void mt7915_mcu_rx_event(struct mt7915_dev *dev, struct sk_buff *skb);
553 void mt7915_mcu_exit(struct mt7915_dev *dev);
554
mt7915_wtbl_size(struct mt7915_dev * dev)555 static inline u16 mt7915_wtbl_size(struct mt7915_dev *dev)
556 {
557 return is_mt7915(&dev->mt76) ? MT7915_WTBL_SIZE : MT7916_WTBL_SIZE;
558 }
559
mt7915_eeprom_size(struct mt7915_dev * dev)560 static inline u16 mt7915_eeprom_size(struct mt7915_dev *dev)
561 {
562 return is_mt7915(&dev->mt76) ? MT7915_EEPROM_SIZE : MT7916_EEPROM_SIZE;
563 }
564
565 void mt7915_dual_hif_set_irq_mask(struct mt7915_dev *dev, bool write_reg,
566 u32 clear, u32 set);
567
mt7915_irq_enable(struct mt7915_dev * dev,u32 mask)568 static inline void mt7915_irq_enable(struct mt7915_dev *dev, u32 mask)
569 {
570 if (dev->hif2)
571 mt7915_dual_hif_set_irq_mask(dev, false, 0, mask);
572 else
573 mt76_set_irq_mask(&dev->mt76, 0, 0, mask);
574
575 tasklet_schedule(&dev->mt76.irq_tasklet);
576 }
577
mt7915_irq_disable(struct mt7915_dev * dev,u32 mask)578 static inline void mt7915_irq_disable(struct mt7915_dev *dev, u32 mask)
579 {
580 if (dev->hif2)
581 mt7915_dual_hif_set_irq_mask(dev, true, mask, 0);
582 else
583 mt76_set_irq_mask(&dev->mt76, MT_INT_MASK_CSR, mask, 0);
584 }
585
586 void mt7915_memcpy_fromio(struct mt7915_dev *dev, void *buf, u32 offset,
587 size_t len);
588
589 void mt7915_mac_init(struct mt7915_dev *dev);
590 u32 mt7915_mac_wtbl_lmac_addr(struct mt7915_dev *dev, u16 wcid, u8 dw);
591 bool mt7915_mac_wtbl_update(struct mt7915_dev *dev, int idx, u32 mask);
592 void mt7915_mac_reset_counters(struct mt7915_phy *phy);
593 void mt7915_mac_cca_stats_reset(struct mt7915_phy *phy);
594 void mt7915_mac_enable_nf(struct mt7915_dev *dev, bool ext_phy);
595 void mt7915_mac_enable_rtscts(struct mt7915_dev *dev,
596 struct ieee80211_vif *vif, bool enable);
597 void mt7915_mac_write_txwi(struct mt76_dev *dev, __le32 *txwi,
598 struct sk_buff *skb, struct mt76_wcid *wcid, int pid,
599 struct ieee80211_key_conf *key,
600 enum mt76_txq_id qid, u32 changed);
601 void mt7915_mac_set_timing(struct mt7915_phy *phy);
602 int mt7915_mac_sta_add(struct mt76_dev *mdev, struct ieee80211_vif *vif,
603 struct ieee80211_sta *sta);
604 int mt7915_mac_sta_event(struct mt76_dev *mdev, struct ieee80211_vif *vif,
605 struct ieee80211_sta *sta, enum mt76_sta_event ev);
606 void mt7915_mac_sta_remove(struct mt76_dev *mdev, struct ieee80211_vif *vif,
607 struct ieee80211_sta *sta);
608 void mt7915_mac_work(struct work_struct *work);
609 void mt7915_mac_reset_work(struct work_struct *work);
610 void mt7915_mac_dump_work(struct work_struct *work);
611 void mt7915_mac_sta_rc_work(struct work_struct *work);
612 void mt7915_mac_update_stats(struct mt7915_phy *phy);
613 void mt7915_mac_twt_teardown_flow(struct mt7915_dev *dev,
614 struct mt7915_sta *msta,
615 u8 flowid);
616 void mt7915_mac_add_twt_setup(struct ieee80211_hw *hw,
617 struct ieee80211_sta *sta,
618 struct ieee80211_twt_setup *twt);
619 int mt7915_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr,
620 enum mt76_txq_id qid, struct mt76_wcid *wcid,
621 struct ieee80211_sta *sta,
622 struct mt76_tx_info *tx_info);
623 void mt7915_queue_rx_skb(struct mt76_dev *mdev, enum mt76_rxq_id q,
624 struct sk_buff *skb, u32 *info);
625 bool mt7915_rx_check(struct mt76_dev *mdev, void *data, int len);
626 void mt7915_stats_work(struct work_struct *work);
627 int mt76_dfs_start_rdd(struct mt7915_dev *dev, bool force);
628 int mt7915_dfs_init_radar_detector(struct mt7915_phy *phy);
629 void mt7915_set_stream_he_caps(struct mt7915_phy *phy);
630 void mt7915_set_stream_vht_txbf_caps(struct mt7915_phy *phy);
631 void mt7915_update_channel(struct mt76_phy *mphy);
632 int mt7915_mcu_muru_debug_set(struct mt7915_dev *dev, bool enable);
633 int mt7915_mcu_muru_debug_get(struct mt7915_phy *phy);
634 int mt7915_mcu_wed_enable_rx_stats(struct mt7915_dev *dev);
635 int mt7915_init_debugfs(struct mt7915_phy *phy);
636 void mt7915_debugfs_rx_fw_monitor(struct mt7915_dev *dev, const void *data, int len);
637 bool mt7915_debugfs_rx_log(struct mt7915_dev *dev, const void *data, int len);
638 #ifdef CONFIG_MAC80211_DEBUGFS
639 void mt7915_sta_add_debugfs(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
640 struct ieee80211_sta *sta, struct dentry *dir);
641 #endif
642 int mt7915_mmio_wed_init(struct mt7915_dev *dev, void *pdev_ptr,
643 bool pci, int *irq);
644
645 #endif
646