1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * da7219.c - DA7219 ALSA SoC Codec Driver 4 * 5 * Copyright (c) 2015 Dialog Semiconductor 6 * 7 * Author: Adam Thomson <Adam.Thomson.Opensource@diasemi.com> 8 */ 9 10 #include <linux/acpi.h> 11 #include <linux/cleanup.h> 12 #include <linux/clk.h> 13 #include <linux/clkdev.h> 14 #include <linux/clk-provider.h> 15 #include <linux/i2c.h> 16 #include <linux/of.h> 17 #include <linux/property.h> 18 #include <linux/regmap.h> 19 #include <linux/slab.h> 20 #include <linux/pm.h> 21 #include <linux/module.h> 22 #include <linux/delay.h> 23 #include <linux/regulator/consumer.h> 24 #include <sound/pcm.h> 25 #include <sound/pcm_params.h> 26 #include <sound/soc.h> 27 #include <sound/soc-dapm.h> 28 #include <sound/initval.h> 29 #include <sound/tlv.h> 30 #include <asm/div64.h> 31 32 #include <sound/da7219.h> 33 #include "da7219.h" 34 #include "da7219-aad.h" 35 36 37 /* 38 * TLVs and Enums 39 */ 40 41 /* Input TLVs */ 42 static const DECLARE_TLV_DB_SCALE(da7219_mic_gain_tlv, -600, 600, 0); 43 static const DECLARE_TLV_DB_SCALE(da7219_mixin_gain_tlv, -450, 150, 0); 44 static const DECLARE_TLV_DB_SCALE(da7219_adc_dig_gain_tlv, -8325, 75, 0); 45 static const DECLARE_TLV_DB_SCALE(da7219_alc_threshold_tlv, -9450, 150, 0); 46 static const DECLARE_TLV_DB_SCALE(da7219_alc_gain_tlv, 0, 600, 0); 47 static const DECLARE_TLV_DB_SCALE(da7219_alc_ana_gain_tlv, 0, 600, 0); 48 static const DECLARE_TLV_DB_SCALE(da7219_sidetone_gain_tlv, -4200, 300, 0); 49 static const DECLARE_TLV_DB_SCALE(da7219_tonegen_gain_tlv, -4500, 300, 0); 50 51 /* Output TLVs */ 52 static const DECLARE_TLV_DB_SCALE(da7219_dac_eq_band_tlv, -1050, 150, 0); 53 54 static const DECLARE_TLV_DB_RANGE(da7219_dac_dig_gain_tlv, 55 0x0, 0x07, TLV_DB_SCALE_ITEM(TLV_DB_GAIN_MUTE, 0, 1), 56 /* -77.25dB to 12dB */ 57 0x08, 0x7f, TLV_DB_SCALE_ITEM(-7725, 75, 0) 58 ); 59 60 static const DECLARE_TLV_DB_SCALE(da7219_dac_ng_threshold_tlv, -10200, 600, 0); 61 static const DECLARE_TLV_DB_SCALE(da7219_hp_gain_tlv, -5700, 100, 0); 62 63 /* Input Enums */ 64 static const char * const da7219_alc_attack_rate_txt[] = { 65 "7.33/fs", "14.66/fs", "29.32/fs", "58.64/fs", "117.3/fs", "234.6/fs", 66 "469.1/fs", "938.2/fs", "1876/fs", "3753/fs", "7506/fs", "15012/fs", 67 "30024/fs" 68 }; 69 70 static const struct soc_enum da7219_alc_attack_rate = 71 SOC_ENUM_SINGLE(DA7219_ALC_CTRL2, DA7219_ALC_ATTACK_SHIFT, 72 DA7219_ALC_ATTACK_MAX, da7219_alc_attack_rate_txt); 73 74 static const char * const da7219_alc_release_rate_txt[] = { 75 "28.66/fs", "57.33/fs", "114.6/fs", "229.3/fs", "458.6/fs", "917.1/fs", 76 "1834/fs", "3668/fs", "7337/fs", "14674/fs", "29348/fs" 77 }; 78 79 static const struct soc_enum da7219_alc_release_rate = 80 SOC_ENUM_SINGLE(DA7219_ALC_CTRL2, DA7219_ALC_RELEASE_SHIFT, 81 DA7219_ALC_RELEASE_MAX, da7219_alc_release_rate_txt); 82 83 static const char * const da7219_alc_hold_time_txt[] = { 84 "62/fs", "124/fs", "248/fs", "496/fs", "992/fs", "1984/fs", "3968/fs", 85 "7936/fs", "15872/fs", "31744/fs", "63488/fs", "126976/fs", 86 "253952/fs", "507904/fs", "1015808/fs", "2031616/fs" 87 }; 88 89 static const struct soc_enum da7219_alc_hold_time = 90 SOC_ENUM_SINGLE(DA7219_ALC_CTRL3, DA7219_ALC_HOLD_SHIFT, 91 DA7219_ALC_HOLD_MAX, da7219_alc_hold_time_txt); 92 93 static const char * const da7219_alc_env_rate_txt[] = { 94 "1/4", "1/16", "1/256", "1/65536" 95 }; 96 97 static const struct soc_enum da7219_alc_env_attack_rate = 98 SOC_ENUM_SINGLE(DA7219_ALC_CTRL3, DA7219_ALC_INTEG_ATTACK_SHIFT, 99 DA7219_ALC_INTEG_MAX, da7219_alc_env_rate_txt); 100 101 static const struct soc_enum da7219_alc_env_release_rate = 102 SOC_ENUM_SINGLE(DA7219_ALC_CTRL3, DA7219_ALC_INTEG_RELEASE_SHIFT, 103 DA7219_ALC_INTEG_MAX, da7219_alc_env_rate_txt); 104 105 static const char * const da7219_alc_anticlip_step_txt[] = { 106 "0.034dB/fs", "0.068dB/fs", "0.136dB/fs", "0.272dB/fs" 107 }; 108 109 static const struct soc_enum da7219_alc_anticlip_step = 110 SOC_ENUM_SINGLE(DA7219_ALC_ANTICLIP_CTRL, 111 DA7219_ALC_ANTICLIP_STEP_SHIFT, 112 DA7219_ALC_ANTICLIP_STEP_MAX, 113 da7219_alc_anticlip_step_txt); 114 115 /* Input/Output Enums */ 116 static const char * const da7219_gain_ramp_rate_txt[] = { 117 "Nominal Rate * 8", "Nominal Rate", "Nominal Rate / 8", 118 "Nominal Rate / 16" 119 }; 120 121 static const struct soc_enum da7219_gain_ramp_rate = 122 SOC_ENUM_SINGLE(DA7219_GAIN_RAMP_CTRL, DA7219_GAIN_RAMP_RATE_SHIFT, 123 DA7219_GAIN_RAMP_RATE_MAX, da7219_gain_ramp_rate_txt); 124 125 static const char * const da7219_hpf_mode_txt[] = { 126 "Disabled", "Audio", "Voice" 127 }; 128 129 static const unsigned int da7219_hpf_mode_val[] = { 130 DA7219_HPF_DISABLED, DA7219_HPF_AUDIO_EN, DA7219_HPF_VOICE_EN, 131 }; 132 133 static const struct soc_enum da7219_adc_hpf_mode = 134 SOC_VALUE_ENUM_SINGLE(DA7219_ADC_FILTERS1, DA7219_HPF_MODE_SHIFT, 135 DA7219_HPF_MODE_MASK, DA7219_HPF_MODE_MAX, 136 da7219_hpf_mode_txt, da7219_hpf_mode_val); 137 138 static const struct soc_enum da7219_dac_hpf_mode = 139 SOC_VALUE_ENUM_SINGLE(DA7219_DAC_FILTERS1, DA7219_HPF_MODE_SHIFT, 140 DA7219_HPF_MODE_MASK, DA7219_HPF_MODE_MAX, 141 da7219_hpf_mode_txt, da7219_hpf_mode_val); 142 143 static const char * const da7219_audio_hpf_corner_txt[] = { 144 "2Hz", "4Hz", "8Hz", "16Hz" 145 }; 146 147 static const struct soc_enum da7219_adc_audio_hpf_corner = 148 SOC_ENUM_SINGLE(DA7219_ADC_FILTERS1, 149 DA7219_ADC_AUDIO_HPF_CORNER_SHIFT, 150 DA7219_AUDIO_HPF_CORNER_MAX, 151 da7219_audio_hpf_corner_txt); 152 153 static const struct soc_enum da7219_dac_audio_hpf_corner = 154 SOC_ENUM_SINGLE(DA7219_DAC_FILTERS1, 155 DA7219_DAC_AUDIO_HPF_CORNER_SHIFT, 156 DA7219_AUDIO_HPF_CORNER_MAX, 157 da7219_audio_hpf_corner_txt); 158 159 static const char * const da7219_voice_hpf_corner_txt[] = { 160 "2.5Hz", "25Hz", "50Hz", "100Hz", "150Hz", "200Hz", "300Hz", "400Hz" 161 }; 162 163 static const struct soc_enum da7219_adc_voice_hpf_corner = 164 SOC_ENUM_SINGLE(DA7219_ADC_FILTERS1, 165 DA7219_ADC_VOICE_HPF_CORNER_SHIFT, 166 DA7219_VOICE_HPF_CORNER_MAX, 167 da7219_voice_hpf_corner_txt); 168 169 static const struct soc_enum da7219_dac_voice_hpf_corner = 170 SOC_ENUM_SINGLE(DA7219_DAC_FILTERS1, 171 DA7219_DAC_VOICE_HPF_CORNER_SHIFT, 172 DA7219_VOICE_HPF_CORNER_MAX, 173 da7219_voice_hpf_corner_txt); 174 175 static const char * const da7219_tonegen_dtmf_key_txt[] = { 176 "0", "1", "2", "3", "4", "5", "6", "7", "8", "9", "A", "B", "C", "D", 177 "*", "#" 178 }; 179 180 static const struct soc_enum da7219_tonegen_dtmf_key = 181 SOC_ENUM_SINGLE(DA7219_TONE_GEN_CFG1, DA7219_DTMF_REG_SHIFT, 182 DA7219_DTMF_REG_MAX, da7219_tonegen_dtmf_key_txt); 183 184 static const char * const da7219_tonegen_swg_sel_txt[] = { 185 "Sum", "SWG1", "SWG2", "SWG1_1-Cos" 186 }; 187 188 static const struct soc_enum da7219_tonegen_swg_sel = 189 SOC_ENUM_SINGLE(DA7219_TONE_GEN_CFG2, DA7219_SWG_SEL_SHIFT, 190 DA7219_SWG_SEL_MAX, da7219_tonegen_swg_sel_txt); 191 192 /* Output Enums */ 193 static const char * const da7219_dac_softmute_rate_txt[] = { 194 "1 Sample", "2 Samples", "4 Samples", "8 Samples", "16 Samples", 195 "32 Samples", "64 Samples" 196 }; 197 198 static const struct soc_enum da7219_dac_softmute_rate = 199 SOC_ENUM_SINGLE(DA7219_DAC_FILTERS5, DA7219_DAC_SOFTMUTE_RATE_SHIFT, 200 DA7219_DAC_SOFTMUTE_RATE_MAX, 201 da7219_dac_softmute_rate_txt); 202 203 static const char * const da7219_dac_ng_setup_time_txt[] = { 204 "256 Samples", "512 Samples", "1024 Samples", "2048 Samples" 205 }; 206 207 static const struct soc_enum da7219_dac_ng_setup_time = 208 SOC_ENUM_SINGLE(DA7219_DAC_NG_SETUP_TIME, 209 DA7219_DAC_NG_SETUP_TIME_SHIFT, 210 DA7219_DAC_NG_SETUP_TIME_MAX, 211 da7219_dac_ng_setup_time_txt); 212 213 static const char * const da7219_dac_ng_rampup_txt[] = { 214 "0.22ms/dB", "0.0138ms/dB" 215 }; 216 217 static const struct soc_enum da7219_dac_ng_rampup_rate = 218 SOC_ENUM_SINGLE(DA7219_DAC_NG_SETUP_TIME, 219 DA7219_DAC_NG_RAMPUP_RATE_SHIFT, 220 DA7219_DAC_NG_RAMP_RATE_MAX, 221 da7219_dac_ng_rampup_txt); 222 223 static const char * const da7219_dac_ng_rampdown_txt[] = { 224 "0.88ms/dB", "14.08ms/dB" 225 }; 226 227 static const struct soc_enum da7219_dac_ng_rampdown_rate = 228 SOC_ENUM_SINGLE(DA7219_DAC_NG_SETUP_TIME, 229 DA7219_DAC_NG_RAMPDN_RATE_SHIFT, 230 DA7219_DAC_NG_RAMP_RATE_MAX, 231 da7219_dac_ng_rampdown_txt); 232 233 234 static const char * const da7219_cp_track_mode_txt[] = { 235 "Largest Volume", "DAC Volume", "Signal Magnitude" 236 }; 237 238 static const unsigned int da7219_cp_track_mode_val[] = { 239 DA7219_CP_MCHANGE_LARGEST_VOL, DA7219_CP_MCHANGE_DAC_VOL, 240 DA7219_CP_MCHANGE_SIG_MAG 241 }; 242 243 static const struct soc_enum da7219_cp_track_mode = 244 SOC_VALUE_ENUM_SINGLE(DA7219_CP_CTRL, DA7219_CP_MCHANGE_SHIFT, 245 DA7219_CP_MCHANGE_REL_MASK, DA7219_CP_MCHANGE_MAX, 246 da7219_cp_track_mode_txt, 247 da7219_cp_track_mode_val); 248 249 250 /* 251 * Control Functions 252 */ 253 254 /* Locked Kcontrol calls */ 255 static int da7219_volsw_locked_get(struct snd_kcontrol *kcontrol, 256 struct snd_ctl_elem_value *ucontrol) 257 { 258 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); 259 struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component); 260 261 guard(mutex)(&da7219->ctrl_lock); 262 263 return snd_soc_get_volsw(kcontrol, ucontrol); 264 } 265 266 static int da7219_volsw_locked_put(struct snd_kcontrol *kcontrol, 267 struct snd_ctl_elem_value *ucontrol) 268 { 269 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); 270 struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component); 271 272 guard(mutex)(&da7219->ctrl_lock); 273 274 return snd_soc_put_volsw(kcontrol, ucontrol); 275 } 276 277 static int da7219_enum_locked_get(struct snd_kcontrol *kcontrol, 278 struct snd_ctl_elem_value *ucontrol) 279 { 280 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); 281 struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component); 282 283 guard(mutex)(&da7219->ctrl_lock); 284 285 return snd_soc_get_enum_double(kcontrol, ucontrol); 286 } 287 288 static int da7219_enum_locked_put(struct snd_kcontrol *kcontrol, 289 struct snd_ctl_elem_value *ucontrol) 290 { 291 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); 292 struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component); 293 294 guard(mutex)(&da7219->ctrl_lock); 295 296 return snd_soc_put_enum_double(kcontrol, ucontrol); 297 } 298 299 /* ALC */ 300 static void da7219_alc_calib(struct snd_soc_component *component) 301 { 302 u8 mic_ctrl, mixin_ctrl, adc_ctrl, calib_ctrl; 303 304 /* Save current state of mic control register */ 305 mic_ctrl = snd_soc_component_read(component, DA7219_MIC_1_CTRL); 306 307 /* Save current state of input mixer control register */ 308 mixin_ctrl = snd_soc_component_read(component, DA7219_MIXIN_L_CTRL); 309 310 /* Save current state of input ADC control register */ 311 adc_ctrl = snd_soc_component_read(component, DA7219_ADC_L_CTRL); 312 313 /* Enable then Mute MIC PGAs */ 314 snd_soc_component_update_bits(component, DA7219_MIC_1_CTRL, DA7219_MIC_1_AMP_EN_MASK, 315 DA7219_MIC_1_AMP_EN_MASK); 316 snd_soc_component_update_bits(component, DA7219_MIC_1_CTRL, 317 DA7219_MIC_1_AMP_MUTE_EN_MASK, 318 DA7219_MIC_1_AMP_MUTE_EN_MASK); 319 320 /* Enable input mixers unmuted */ 321 snd_soc_component_update_bits(component, DA7219_MIXIN_L_CTRL, 322 DA7219_MIXIN_L_AMP_EN_MASK | 323 DA7219_MIXIN_L_AMP_MUTE_EN_MASK, 324 DA7219_MIXIN_L_AMP_EN_MASK); 325 326 /* Enable input filters unmuted */ 327 snd_soc_component_update_bits(component, DA7219_ADC_L_CTRL, 328 DA7219_ADC_L_MUTE_EN_MASK | DA7219_ADC_L_EN_MASK, 329 DA7219_ADC_L_EN_MASK); 330 331 /* Perform auto calibration */ 332 snd_soc_component_update_bits(component, DA7219_ALC_CTRL1, 333 DA7219_ALC_AUTO_CALIB_EN_MASK, 334 DA7219_ALC_AUTO_CALIB_EN_MASK); 335 do { 336 calib_ctrl = snd_soc_component_read(component, DA7219_ALC_CTRL1); 337 } while (calib_ctrl & DA7219_ALC_AUTO_CALIB_EN_MASK); 338 339 /* If auto calibration fails, disable DC offset, hybrid ALC */ 340 if (calib_ctrl & DA7219_ALC_CALIB_OVERFLOW_MASK) { 341 dev_warn(component->dev, 342 "ALC auto calibration failed with overflow\n"); 343 snd_soc_component_update_bits(component, DA7219_ALC_CTRL1, 344 DA7219_ALC_OFFSET_EN_MASK | 345 DA7219_ALC_SYNC_MODE_MASK, 0); 346 } else { 347 /* Enable DC offset cancellation, hybrid mode */ 348 snd_soc_component_update_bits(component, DA7219_ALC_CTRL1, 349 DA7219_ALC_OFFSET_EN_MASK | 350 DA7219_ALC_SYNC_MODE_MASK, 351 DA7219_ALC_OFFSET_EN_MASK | 352 DA7219_ALC_SYNC_MODE_MASK); 353 } 354 355 /* Restore input filter control register to original state */ 356 snd_soc_component_write(component, DA7219_ADC_L_CTRL, adc_ctrl); 357 358 /* Restore input mixer control registers to original state */ 359 snd_soc_component_write(component, DA7219_MIXIN_L_CTRL, mixin_ctrl); 360 361 /* Restore MIC control registers to original states */ 362 snd_soc_component_write(component, DA7219_MIC_1_CTRL, mic_ctrl); 363 } 364 365 static int da7219_mixin_gain_put(struct snd_kcontrol *kcontrol, 366 struct snd_ctl_elem_value *ucontrol) 367 { 368 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); 369 struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component); 370 int ret; 371 372 ret = snd_soc_put_volsw(kcontrol, ucontrol); 373 374 /* 375 * If ALC in operation and value of control has been updated, 376 * make sure calibrated offsets are updated. 377 */ 378 if ((ret == 1) && (da7219->alc_en)) 379 da7219_alc_calib(component); 380 381 return ret; 382 } 383 384 static int da7219_alc_sw_put(struct snd_kcontrol *kcontrol, 385 struct snd_ctl_elem_value *ucontrol) 386 { 387 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); 388 struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component); 389 390 391 /* Force ALC offset calibration if enabling ALC */ 392 if ((ucontrol->value.integer.value[0]) && (!da7219->alc_en)) { 393 da7219_alc_calib(component); 394 da7219->alc_en = true; 395 } else { 396 da7219->alc_en = false; 397 } 398 399 return snd_soc_put_volsw(kcontrol, ucontrol); 400 } 401 402 /* ToneGen */ 403 static int da7219_tonegen_freq_get(struct snd_kcontrol *kcontrol, 404 struct snd_ctl_elem_value *ucontrol) 405 { 406 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); 407 struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component); 408 struct soc_mixer_control *mixer_ctrl = 409 (struct soc_mixer_control *) kcontrol->private_value; 410 unsigned int reg = mixer_ctrl->reg; 411 __le16 val; 412 int ret; 413 414 scoped_guard(mutex, &da7219->ctrl_lock) 415 ret = regmap_raw_read(da7219->regmap, reg, &val, sizeof(val)); 416 417 if (ret) 418 return ret; 419 420 /* 421 * Frequency value spans two 8-bit registers, lower then upper byte. 422 * Therefore we need to convert to host endianness here. 423 */ 424 ucontrol->value.integer.value[0] = le16_to_cpu(val); 425 426 return 0; 427 } 428 429 static int da7219_tonegen_freq_put(struct snd_kcontrol *kcontrol, 430 struct snd_ctl_elem_value *ucontrol) 431 { 432 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); 433 struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component); 434 struct soc_mixer_control *mixer_ctrl = 435 (struct soc_mixer_control *) kcontrol->private_value; 436 unsigned int reg = mixer_ctrl->reg; 437 __le16 val_new, val_old; 438 int ret; 439 440 /* 441 * Frequency value spans two 8-bit registers, lower then upper byte. 442 * Therefore we need to convert to little endian here to align with 443 * HW registers. 444 */ 445 val_new = cpu_to_le16(ucontrol->value.integer.value[0]); 446 447 guard(mutex)(&da7219->ctrl_lock); 448 ret = regmap_raw_read(da7219->regmap, reg, &val_old, sizeof(val_old)); 449 if (ret == 0 && (val_old != val_new)) 450 ret = regmap_raw_write(da7219->regmap, reg, 451 &val_new, sizeof(val_new)); 452 453 if (ret < 0) 454 return ret; 455 456 return val_old != val_new; 457 } 458 459 460 /* 461 * KControls 462 */ 463 464 static const struct snd_kcontrol_new da7219_snd_controls[] = { 465 /* Mics */ 466 SOC_SINGLE_TLV("Mic Volume", DA7219_MIC_1_GAIN, 467 DA7219_MIC_1_AMP_GAIN_SHIFT, DA7219_MIC_1_AMP_GAIN_MAX, 468 DA7219_NO_INVERT, da7219_mic_gain_tlv), 469 SOC_SINGLE("Mic Switch", DA7219_MIC_1_CTRL, 470 DA7219_MIC_1_AMP_MUTE_EN_SHIFT, DA7219_SWITCH_EN_MAX, 471 DA7219_INVERT), 472 473 /* Mixer Input */ 474 SOC_SINGLE_EXT_TLV("Mixin Volume", DA7219_MIXIN_L_GAIN, 475 DA7219_MIXIN_L_AMP_GAIN_SHIFT, 476 DA7219_MIXIN_L_AMP_GAIN_MAX, DA7219_NO_INVERT, 477 snd_soc_get_volsw, da7219_mixin_gain_put, 478 da7219_mixin_gain_tlv), 479 SOC_SINGLE("Mixin Switch", DA7219_MIXIN_L_CTRL, 480 DA7219_MIXIN_L_AMP_MUTE_EN_SHIFT, DA7219_SWITCH_EN_MAX, 481 DA7219_INVERT), 482 SOC_SINGLE("Mixin Gain Ramp Switch", DA7219_MIXIN_L_CTRL, 483 DA7219_MIXIN_L_AMP_RAMP_EN_SHIFT, DA7219_SWITCH_EN_MAX, 484 DA7219_NO_INVERT), 485 SOC_SINGLE("Mixin ZC Gain Switch", DA7219_MIXIN_L_CTRL, 486 DA7219_MIXIN_L_AMP_ZC_EN_SHIFT, DA7219_SWITCH_EN_MAX, 487 DA7219_NO_INVERT), 488 489 /* ADC */ 490 SOC_SINGLE_TLV("Capture Digital Volume", DA7219_ADC_L_GAIN, 491 DA7219_ADC_L_DIGITAL_GAIN_SHIFT, 492 DA7219_ADC_L_DIGITAL_GAIN_MAX, DA7219_NO_INVERT, 493 da7219_adc_dig_gain_tlv), 494 SOC_SINGLE("Capture Digital Switch", DA7219_ADC_L_CTRL, 495 DA7219_ADC_L_MUTE_EN_SHIFT, DA7219_SWITCH_EN_MAX, 496 DA7219_INVERT), 497 SOC_SINGLE("Capture Digital Gain Ramp Switch", DA7219_ADC_L_CTRL, 498 DA7219_ADC_L_RAMP_EN_SHIFT, DA7219_SWITCH_EN_MAX, 499 DA7219_NO_INVERT), 500 501 /* ALC */ 502 SOC_ENUM("ALC Attack Rate", da7219_alc_attack_rate), 503 SOC_ENUM("ALC Release Rate", da7219_alc_release_rate), 504 SOC_ENUM("ALC Hold Time", da7219_alc_hold_time), 505 SOC_ENUM("ALC Envelope Attack Rate", da7219_alc_env_attack_rate), 506 SOC_ENUM("ALC Envelope Release Rate", da7219_alc_env_release_rate), 507 SOC_SINGLE_TLV("ALC Noise Threshold", DA7219_ALC_NOISE, 508 DA7219_ALC_NOISE_SHIFT, DA7219_ALC_THRESHOLD_MAX, 509 DA7219_INVERT, da7219_alc_threshold_tlv), 510 SOC_SINGLE_TLV("ALC Min Threshold", DA7219_ALC_TARGET_MIN, 511 DA7219_ALC_THRESHOLD_MIN_SHIFT, DA7219_ALC_THRESHOLD_MAX, 512 DA7219_INVERT, da7219_alc_threshold_tlv), 513 SOC_SINGLE_TLV("ALC Max Threshold", DA7219_ALC_TARGET_MAX, 514 DA7219_ALC_THRESHOLD_MAX_SHIFT, DA7219_ALC_THRESHOLD_MAX, 515 DA7219_INVERT, da7219_alc_threshold_tlv), 516 SOC_SINGLE_TLV("ALC Max Attenuation", DA7219_ALC_GAIN_LIMITS, 517 DA7219_ALC_ATTEN_MAX_SHIFT, DA7219_ALC_ATTEN_GAIN_MAX, 518 DA7219_NO_INVERT, da7219_alc_gain_tlv), 519 SOC_SINGLE_TLV("ALC Max Volume", DA7219_ALC_GAIN_LIMITS, 520 DA7219_ALC_GAIN_MAX_SHIFT, DA7219_ALC_ATTEN_GAIN_MAX, 521 DA7219_NO_INVERT, da7219_alc_gain_tlv), 522 SOC_SINGLE_RANGE_TLV("ALC Min Analog Volume", DA7219_ALC_ANA_GAIN_LIMITS, 523 DA7219_ALC_ANA_GAIN_MIN_SHIFT, 524 DA7219_ALC_ANA_GAIN_MIN, DA7219_ALC_ANA_GAIN_MAX, 525 DA7219_NO_INVERT, da7219_alc_ana_gain_tlv), 526 SOC_SINGLE_RANGE_TLV("ALC Max Analog Volume", DA7219_ALC_ANA_GAIN_LIMITS, 527 DA7219_ALC_ANA_GAIN_MAX_SHIFT, 528 DA7219_ALC_ANA_GAIN_MIN, DA7219_ALC_ANA_GAIN_MAX, 529 DA7219_NO_INVERT, da7219_alc_ana_gain_tlv), 530 SOC_ENUM("ALC Anticlip Step", da7219_alc_anticlip_step), 531 SOC_SINGLE("ALC Anticlip Switch", DA7219_ALC_ANTICLIP_CTRL, 532 DA7219_ALC_ANTIPCLIP_EN_SHIFT, DA7219_SWITCH_EN_MAX, 533 DA7219_NO_INVERT), 534 SOC_SINGLE_EXT("ALC Switch", DA7219_ALC_CTRL1, DA7219_ALC_EN_SHIFT, 535 DA7219_SWITCH_EN_MAX, DA7219_NO_INVERT, 536 snd_soc_get_volsw, da7219_alc_sw_put), 537 538 /* Input High-Pass Filters */ 539 SOC_ENUM("ADC HPF Mode", da7219_adc_hpf_mode), 540 SOC_ENUM("ADC HPF Corner Audio", da7219_adc_audio_hpf_corner), 541 SOC_ENUM("ADC HPF Corner Voice", da7219_adc_voice_hpf_corner), 542 543 /* Sidetone Filter */ 544 SOC_SINGLE_TLV("Sidetone Volume", DA7219_SIDETONE_GAIN, 545 DA7219_SIDETONE_GAIN_SHIFT, DA7219_SIDETONE_GAIN_MAX, 546 DA7219_NO_INVERT, da7219_sidetone_gain_tlv), 547 SOC_SINGLE("Sidetone Switch", DA7219_SIDETONE_CTRL, 548 DA7219_SIDETONE_MUTE_EN_SHIFT, DA7219_SWITCH_EN_MAX, 549 DA7219_INVERT), 550 551 /* Tone Generator */ 552 SOC_SINGLE_EXT_TLV("ToneGen Volume", DA7219_TONE_GEN_CFG2, 553 DA7219_TONE_GEN_GAIN_SHIFT, DA7219_TONE_GEN_GAIN_MAX, 554 DA7219_NO_INVERT, da7219_volsw_locked_get, 555 da7219_volsw_locked_put, da7219_tonegen_gain_tlv), 556 SOC_ENUM_EXT("ToneGen DTMF Key", da7219_tonegen_dtmf_key, 557 da7219_enum_locked_get, da7219_enum_locked_put), 558 SOC_SINGLE_EXT("ToneGen DTMF Switch", DA7219_TONE_GEN_CFG1, 559 DA7219_DTMF_EN_SHIFT, DA7219_SWITCH_EN_MAX, 560 DA7219_NO_INVERT, da7219_volsw_locked_get, 561 da7219_volsw_locked_put), 562 SOC_ENUM_EXT("ToneGen Sinewave Gen Type", da7219_tonegen_swg_sel, 563 da7219_enum_locked_get, da7219_enum_locked_put), 564 SOC_SINGLE_EXT("ToneGen Sinewave1 Freq", DA7219_TONE_GEN_FREQ1_L, 565 DA7219_FREQ1_L_SHIFT, DA7219_FREQ_MAX, DA7219_NO_INVERT, 566 da7219_tonegen_freq_get, da7219_tonegen_freq_put), 567 SOC_SINGLE_EXT("ToneGen Sinewave2 Freq", DA7219_TONE_GEN_FREQ2_L, 568 DA7219_FREQ2_L_SHIFT, DA7219_FREQ_MAX, DA7219_NO_INVERT, 569 da7219_tonegen_freq_get, da7219_tonegen_freq_put), 570 SOC_SINGLE_EXT("ToneGen On Time", DA7219_TONE_GEN_ON_PER, 571 DA7219_BEEP_ON_PER_SHIFT, DA7219_BEEP_ON_OFF_MAX, 572 DA7219_NO_INVERT, da7219_volsw_locked_get, 573 da7219_volsw_locked_put), 574 SOC_SINGLE("ToneGen Off Time", DA7219_TONE_GEN_OFF_PER, 575 DA7219_BEEP_OFF_PER_SHIFT, DA7219_BEEP_ON_OFF_MAX, 576 DA7219_NO_INVERT), 577 578 /* Gain ramping */ 579 SOC_ENUM("Gain Ramp Rate", da7219_gain_ramp_rate), 580 581 /* DAC High-Pass Filter */ 582 SOC_ENUM_EXT("DAC HPF Mode", da7219_dac_hpf_mode, 583 da7219_enum_locked_get, da7219_enum_locked_put), 584 SOC_ENUM("DAC HPF Corner Audio", da7219_dac_audio_hpf_corner), 585 SOC_ENUM("DAC HPF Corner Voice", da7219_dac_voice_hpf_corner), 586 587 /* DAC 5-Band Equaliser */ 588 SOC_SINGLE_TLV("DAC EQ Band1 Volume", DA7219_DAC_FILTERS2, 589 DA7219_DAC_EQ_BAND1_SHIFT, DA7219_DAC_EQ_BAND_MAX, 590 DA7219_NO_INVERT, da7219_dac_eq_band_tlv), 591 SOC_SINGLE_TLV("DAC EQ Band2 Volume", DA7219_DAC_FILTERS2, 592 DA7219_DAC_EQ_BAND2_SHIFT, DA7219_DAC_EQ_BAND_MAX, 593 DA7219_NO_INVERT, da7219_dac_eq_band_tlv), 594 SOC_SINGLE_TLV("DAC EQ Band3 Volume", DA7219_DAC_FILTERS3, 595 DA7219_DAC_EQ_BAND3_SHIFT, DA7219_DAC_EQ_BAND_MAX, 596 DA7219_NO_INVERT, da7219_dac_eq_band_tlv), 597 SOC_SINGLE_TLV("DAC EQ Band4 Volume", DA7219_DAC_FILTERS3, 598 DA7219_DAC_EQ_BAND4_SHIFT, DA7219_DAC_EQ_BAND_MAX, 599 DA7219_NO_INVERT, da7219_dac_eq_band_tlv), 600 SOC_SINGLE_TLV("DAC EQ Band5 Volume", DA7219_DAC_FILTERS4, 601 DA7219_DAC_EQ_BAND5_SHIFT, DA7219_DAC_EQ_BAND_MAX, 602 DA7219_NO_INVERT, da7219_dac_eq_band_tlv), 603 SOC_SINGLE_EXT("DAC EQ Switch", DA7219_DAC_FILTERS4, 604 DA7219_DAC_EQ_EN_SHIFT, DA7219_SWITCH_EN_MAX, 605 DA7219_NO_INVERT, da7219_volsw_locked_get, 606 da7219_volsw_locked_put), 607 608 /* DAC Softmute */ 609 SOC_ENUM("DAC Soft Mute Rate", da7219_dac_softmute_rate), 610 SOC_SINGLE_EXT("DAC Soft Mute Switch", DA7219_DAC_FILTERS5, 611 DA7219_DAC_SOFTMUTE_EN_SHIFT, DA7219_SWITCH_EN_MAX, 612 DA7219_NO_INVERT, da7219_volsw_locked_get, 613 da7219_volsw_locked_put), 614 615 /* DAC Noise Gate */ 616 SOC_ENUM("DAC NG Setup Time", da7219_dac_ng_setup_time), 617 SOC_ENUM("DAC NG Rampup Rate", da7219_dac_ng_rampup_rate), 618 SOC_ENUM("DAC NG Rampdown Rate", da7219_dac_ng_rampdown_rate), 619 SOC_SINGLE_TLV("DAC NG Off Threshold", DA7219_DAC_NG_OFF_THRESH, 620 DA7219_DAC_NG_OFF_THRESHOLD_SHIFT, 621 DA7219_DAC_NG_THRESHOLD_MAX, DA7219_NO_INVERT, 622 da7219_dac_ng_threshold_tlv), 623 SOC_SINGLE_TLV("DAC NG On Threshold", DA7219_DAC_NG_ON_THRESH, 624 DA7219_DAC_NG_ON_THRESHOLD_SHIFT, 625 DA7219_DAC_NG_THRESHOLD_MAX, DA7219_NO_INVERT, 626 da7219_dac_ng_threshold_tlv), 627 SOC_SINGLE("DAC NG Switch", DA7219_DAC_NG_CTRL, DA7219_DAC_NG_EN_SHIFT, 628 DA7219_SWITCH_EN_MAX, DA7219_NO_INVERT), 629 630 /* DACs */ 631 SOC_DOUBLE_R_EXT_TLV("Playback Digital Volume", DA7219_DAC_L_GAIN, 632 DA7219_DAC_R_GAIN, DA7219_DAC_L_DIGITAL_GAIN_SHIFT, 633 DA7219_DAC_DIGITAL_GAIN_MAX, DA7219_NO_INVERT, 634 da7219_volsw_locked_get, da7219_volsw_locked_put, 635 da7219_dac_dig_gain_tlv), 636 SOC_DOUBLE_R_EXT("Playback Digital Switch", DA7219_DAC_L_CTRL, 637 DA7219_DAC_R_CTRL, DA7219_DAC_L_MUTE_EN_SHIFT, 638 DA7219_SWITCH_EN_MAX, DA7219_INVERT, 639 da7219_volsw_locked_get, da7219_volsw_locked_put), 640 SOC_DOUBLE_R("Playback Digital Gain Ramp Switch", DA7219_DAC_L_CTRL, 641 DA7219_DAC_R_CTRL, DA7219_DAC_L_RAMP_EN_SHIFT, 642 DA7219_SWITCH_EN_MAX, DA7219_NO_INVERT), 643 644 /* CP */ 645 SOC_ENUM("Charge Pump Track Mode", da7219_cp_track_mode), 646 SOC_SINGLE("Charge Pump Threshold", DA7219_CP_VOL_THRESHOLD1, 647 DA7219_CP_THRESH_VDD2_SHIFT, DA7219_CP_THRESH_VDD2_MAX, 648 DA7219_NO_INVERT), 649 650 /* Headphones */ 651 SOC_DOUBLE_R_EXT_TLV("Headphone Volume", DA7219_HP_L_GAIN, 652 DA7219_HP_R_GAIN, DA7219_HP_L_AMP_GAIN_SHIFT, 653 DA7219_HP_AMP_GAIN_MAX, DA7219_NO_INVERT, 654 da7219_volsw_locked_get, da7219_volsw_locked_put, 655 da7219_hp_gain_tlv), 656 SOC_DOUBLE_R_EXT("Headphone Switch", DA7219_HP_L_CTRL, DA7219_HP_R_CTRL, 657 DA7219_HP_L_AMP_MUTE_EN_SHIFT, DA7219_SWITCH_EN_MAX, 658 DA7219_INVERT, da7219_volsw_locked_get, 659 da7219_volsw_locked_put), 660 SOC_DOUBLE_R("Headphone Gain Ramp Switch", DA7219_HP_L_CTRL, 661 DA7219_HP_R_CTRL, DA7219_HP_L_AMP_RAMP_EN_SHIFT, 662 DA7219_SWITCH_EN_MAX, DA7219_NO_INVERT), 663 SOC_DOUBLE_R("Headphone ZC Gain Switch", DA7219_HP_L_CTRL, 664 DA7219_HP_R_CTRL, DA7219_HP_L_AMP_ZC_EN_SHIFT, 665 DA7219_SWITCH_EN_MAX, DA7219_NO_INVERT), 666 }; 667 668 669 /* 670 * DAPM Mux Controls 671 */ 672 673 static const char * const da7219_out_sel_txt[] = { 674 "ADC", "Tone Generator", "DAIL", "DAIR" 675 }; 676 677 static const struct soc_enum da7219_out_dail_sel = 678 SOC_ENUM_SINGLE(DA7219_DIG_ROUTING_DAI, 679 DA7219_DAI_L_SRC_SHIFT, 680 DA7219_OUT_SRC_MAX, 681 da7219_out_sel_txt); 682 683 static const struct snd_kcontrol_new da7219_out_dail_sel_mux = 684 SOC_DAPM_ENUM("Out DAIL Mux", da7219_out_dail_sel); 685 686 static const struct soc_enum da7219_out_dair_sel = 687 SOC_ENUM_SINGLE(DA7219_DIG_ROUTING_DAI, 688 DA7219_DAI_R_SRC_SHIFT, 689 DA7219_OUT_SRC_MAX, 690 da7219_out_sel_txt); 691 692 static const struct snd_kcontrol_new da7219_out_dair_sel_mux = 693 SOC_DAPM_ENUM("Out DAIR Mux", da7219_out_dair_sel); 694 695 static const struct soc_enum da7219_out_dacl_sel = 696 SOC_ENUM_SINGLE(DA7219_DIG_ROUTING_DAC, 697 DA7219_DAC_L_SRC_SHIFT, 698 DA7219_OUT_SRC_MAX, 699 da7219_out_sel_txt); 700 701 static const struct snd_kcontrol_new da7219_out_dacl_sel_mux = 702 SOC_DAPM_ENUM("Out DACL Mux", da7219_out_dacl_sel); 703 704 static const struct soc_enum da7219_out_dacr_sel = 705 SOC_ENUM_SINGLE(DA7219_DIG_ROUTING_DAC, 706 DA7219_DAC_R_SRC_SHIFT, 707 DA7219_OUT_SRC_MAX, 708 da7219_out_sel_txt); 709 710 static const struct snd_kcontrol_new da7219_out_dacr_sel_mux = 711 SOC_DAPM_ENUM("Out DACR Mux", da7219_out_dacr_sel); 712 713 714 /* 715 * DAPM Mixer Controls 716 */ 717 718 static const struct snd_kcontrol_new da7219_mixin_controls[] = { 719 SOC_DAPM_SINGLE("Mic Switch", DA7219_MIXIN_L_SELECT, 720 DA7219_MIXIN_L_MIX_SELECT_SHIFT, 721 DA7219_SWITCH_EN_MAX, DA7219_NO_INVERT), 722 }; 723 724 static const struct snd_kcontrol_new da7219_mixout_l_controls[] = { 725 SOC_DAPM_SINGLE("DACL Switch", DA7219_MIXOUT_L_SELECT, 726 DA7219_MIXOUT_L_MIX_SELECT_SHIFT, 727 DA7219_SWITCH_EN_MAX, DA7219_NO_INVERT), 728 }; 729 730 static const struct snd_kcontrol_new da7219_mixout_r_controls[] = { 731 SOC_DAPM_SINGLE("DACR Switch", DA7219_MIXOUT_R_SELECT, 732 DA7219_MIXOUT_R_MIX_SELECT_SHIFT, 733 DA7219_SWITCH_EN_MAX, DA7219_NO_INVERT), 734 }; 735 736 #define DA7219_DMIX_ST_CTRLS(reg) \ 737 SOC_DAPM_SINGLE("Out FilterL Switch", reg, \ 738 DA7219_DMIX_ST_SRC_OUTFILT1L_SHIFT, \ 739 DA7219_SWITCH_EN_MAX, DA7219_NO_INVERT), \ 740 SOC_DAPM_SINGLE("Out FilterR Switch", reg, \ 741 DA7219_DMIX_ST_SRC_OUTFILT1R_SHIFT, \ 742 DA7219_SWITCH_EN_MAX, DA7219_NO_INVERT), \ 743 SOC_DAPM_SINGLE("Sidetone Switch", reg, \ 744 DA7219_DMIX_ST_SRC_SIDETONE_SHIFT, \ 745 DA7219_SWITCH_EN_MAX, DA7219_NO_INVERT) \ 746 747 static const struct snd_kcontrol_new da7219_st_out_filtl_mix_controls[] = { 748 DA7219_DMIX_ST_CTRLS(DA7219_DROUTING_ST_OUTFILT_1L), 749 }; 750 751 static const struct snd_kcontrol_new da7219_st_out_filtr_mix_controls[] = { 752 DA7219_DMIX_ST_CTRLS(DA7219_DROUTING_ST_OUTFILT_1R), 753 }; 754 755 756 /* 757 * DAPM Events 758 */ 759 760 static int da7219_mic_pga_event(struct snd_soc_dapm_widget *w, 761 struct snd_kcontrol *kcontrol, int event) 762 { 763 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); 764 struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component); 765 766 switch (event) { 767 case SND_SOC_DAPM_POST_PMU: 768 if (da7219->micbias_on_event) { 769 /* 770 * Delay only for first capture after bias enabled to 771 * avoid possible DC offset related noise. 772 */ 773 da7219->micbias_on_event = false; 774 msleep(da7219->mic_pga_delay); 775 } 776 break; 777 default: 778 break; 779 } 780 781 return 0; 782 } 783 784 static int da7219_dai_event(struct snd_soc_dapm_widget *w, 785 struct snd_kcontrol *kcontrol, int event) 786 { 787 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); 788 struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component); 789 struct clk *bclk = da7219->dai_clks[DA7219_DAI_BCLK_IDX]; 790 u8 pll_ctrl, pll_status; 791 int i = 0, ret; 792 bool srm_lock = false; 793 794 switch (event) { 795 case SND_SOC_DAPM_PRE_PMU: 796 if (da7219->master) { 797 /* Enable DAI clks for master mode */ 798 if (bclk) { 799 ret = clk_prepare_enable(bclk); 800 if (ret) { 801 dev_err(component->dev, 802 "Failed to enable DAI clks\n"); 803 return ret; 804 } 805 } else { 806 snd_soc_component_update_bits(component, 807 DA7219_DAI_CLK_MODE, 808 DA7219_DAI_CLK_EN_MASK, 809 DA7219_DAI_CLK_EN_MASK); 810 } 811 } 812 813 /* PC synchronised to DAI */ 814 snd_soc_component_update_bits(component, DA7219_PC_COUNT, 815 DA7219_PC_FREERUN_MASK, 0); 816 817 /* Slave mode, if SRM not enabled no need for status checks */ 818 pll_ctrl = snd_soc_component_read(component, DA7219_PLL_CTRL); 819 if ((pll_ctrl & DA7219_PLL_MODE_MASK) != DA7219_PLL_MODE_SRM) 820 return 0; 821 822 /* Check SRM has locked */ 823 do { 824 pll_status = snd_soc_component_read(component, DA7219_PLL_SRM_STS); 825 if (pll_status & DA7219_PLL_SRM_STS_SRM_LOCK) { 826 srm_lock = true; 827 } else { 828 ++i; 829 msleep(50); 830 } 831 } while ((i < DA7219_SRM_CHECK_RETRIES) && (!srm_lock)); 832 833 if (!srm_lock) 834 dev_warn(component->dev, "SRM failed to lock\n"); 835 836 return 0; 837 case SND_SOC_DAPM_POST_PMD: 838 /* PC free-running */ 839 snd_soc_component_update_bits(component, DA7219_PC_COUNT, 840 DA7219_PC_FREERUN_MASK, 841 DA7219_PC_FREERUN_MASK); 842 843 /* Disable DAI clks if in master mode */ 844 if (da7219->master) { 845 if (bclk) 846 clk_disable_unprepare(bclk); 847 else 848 snd_soc_component_update_bits(component, 849 DA7219_DAI_CLK_MODE, 850 DA7219_DAI_CLK_EN_MASK, 851 0); 852 } 853 854 return 0; 855 default: 856 return -EINVAL; 857 } 858 } 859 860 static int da7219_settling_event(struct snd_soc_dapm_widget *w, 861 struct snd_kcontrol *kcontrol, int event) 862 { 863 switch (event) { 864 case SND_SOC_DAPM_POST_PMU: 865 case SND_SOC_DAPM_POST_PMD: 866 msleep(DA7219_SETTLING_DELAY); 867 break; 868 default: 869 break; 870 } 871 872 return 0; 873 } 874 875 static int da7219_mixout_event(struct snd_soc_dapm_widget *w, 876 struct snd_kcontrol *kcontrol, int event) 877 { 878 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); 879 u8 hp_ctrl, min_gain_mask; 880 881 switch (w->reg) { 882 case DA7219_MIXOUT_L_CTRL: 883 hp_ctrl = DA7219_HP_L_CTRL; 884 min_gain_mask = DA7219_HP_L_AMP_MIN_GAIN_EN_MASK; 885 break; 886 case DA7219_MIXOUT_R_CTRL: 887 hp_ctrl = DA7219_HP_R_CTRL; 888 min_gain_mask = DA7219_HP_R_AMP_MIN_GAIN_EN_MASK; 889 break; 890 default: 891 return -EINVAL; 892 } 893 894 switch (event) { 895 case SND_SOC_DAPM_PRE_PMD: 896 /* Enable minimum gain on HP to avoid pops */ 897 snd_soc_component_update_bits(component, hp_ctrl, min_gain_mask, 898 min_gain_mask); 899 900 msleep(DA7219_MIN_GAIN_DELAY); 901 902 break; 903 case SND_SOC_DAPM_POST_PMU: 904 /* Remove minimum gain on HP */ 905 snd_soc_component_update_bits(component, hp_ctrl, min_gain_mask, 0); 906 907 break; 908 } 909 910 return 0; 911 } 912 913 static int da7219_gain_ramp_event(struct snd_soc_dapm_widget *w, 914 struct snd_kcontrol *kcontrol, int event) 915 { 916 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); 917 struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component); 918 919 switch (event) { 920 case SND_SOC_DAPM_PRE_PMU: 921 case SND_SOC_DAPM_PRE_PMD: 922 /* Ensure nominal gain ramping for DAPM sequence */ 923 da7219->gain_ramp_ctrl = 924 snd_soc_component_read(component, DA7219_GAIN_RAMP_CTRL); 925 snd_soc_component_write(component, DA7219_GAIN_RAMP_CTRL, 926 DA7219_GAIN_RAMP_RATE_NOMINAL); 927 break; 928 case SND_SOC_DAPM_POST_PMU: 929 case SND_SOC_DAPM_POST_PMD: 930 /* Restore previous gain ramp settings */ 931 snd_soc_component_write(component, DA7219_GAIN_RAMP_CTRL, 932 da7219->gain_ramp_ctrl); 933 break; 934 } 935 936 return 0; 937 } 938 939 940 /* 941 * DAPM Widgets 942 */ 943 944 static const struct snd_soc_dapm_widget da7219_dapm_widgets[] = { 945 /* Input Supplies */ 946 SND_SOC_DAPM_SUPPLY("Mic Bias", DA7219_MICBIAS_CTRL, 947 DA7219_MICBIAS1_EN_SHIFT, DA7219_NO_INVERT, 948 NULL, 0), 949 950 /* Inputs */ 951 SND_SOC_DAPM_INPUT("MIC"), 952 953 /* Input PGAs */ 954 SND_SOC_DAPM_PGA_E("Mic PGA", DA7219_MIC_1_CTRL, 955 DA7219_MIC_1_AMP_EN_SHIFT, DA7219_NO_INVERT, 956 NULL, 0, da7219_mic_pga_event, SND_SOC_DAPM_POST_PMU), 957 SND_SOC_DAPM_PGA_E("Mixin PGA", DA7219_MIXIN_L_CTRL, 958 DA7219_MIXIN_L_AMP_EN_SHIFT, DA7219_NO_INVERT, 959 NULL, 0, da7219_settling_event, SND_SOC_DAPM_POST_PMU), 960 961 /* Input Filters */ 962 SND_SOC_DAPM_ADC("ADC", NULL, DA7219_ADC_L_CTRL, DA7219_ADC_L_EN_SHIFT, 963 DA7219_NO_INVERT), 964 965 /* Tone Generator */ 966 SND_SOC_DAPM_SIGGEN("TONE"), 967 SND_SOC_DAPM_PGA("Tone Generator", DA7219_TONE_GEN_CFG1, 968 DA7219_START_STOPN_SHIFT, DA7219_NO_INVERT, NULL, 0), 969 970 /* Sidetone Input */ 971 SND_SOC_DAPM_ADC("Sidetone Filter", NULL, DA7219_SIDETONE_CTRL, 972 DA7219_SIDETONE_EN_SHIFT, DA7219_NO_INVERT), 973 974 /* Input Mixer Supply */ 975 SND_SOC_DAPM_SUPPLY("Mixer In Supply", DA7219_MIXIN_L_CTRL, 976 DA7219_MIXIN_L_MIX_EN_SHIFT, DA7219_NO_INVERT, 977 NULL, 0), 978 979 /* Input Mixer */ 980 SND_SOC_DAPM_MIXER("Mixer In", SND_SOC_NOPM, 0, 0, 981 da7219_mixin_controls, 982 ARRAY_SIZE(da7219_mixin_controls)), 983 984 /* Input Muxes */ 985 SND_SOC_DAPM_MUX("Out DAIL Mux", SND_SOC_NOPM, 0, 0, 986 &da7219_out_dail_sel_mux), 987 SND_SOC_DAPM_MUX("Out DAIR Mux", SND_SOC_NOPM, 0, 0, 988 &da7219_out_dair_sel_mux), 989 990 /* DAI Supply */ 991 SND_SOC_DAPM_SUPPLY("DAI", DA7219_DAI_CTRL, DA7219_DAI_EN_SHIFT, 992 DA7219_NO_INVERT, da7219_dai_event, 993 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD), 994 995 /* DAI */ 996 SND_SOC_DAPM_AIF_OUT("DAIOUT", "Capture", 0, DA7219_DAI_TDM_CTRL, 997 DA7219_DAI_OE_SHIFT, DA7219_NO_INVERT), 998 SND_SOC_DAPM_AIF_IN("DAIIN", "Playback", 0, SND_SOC_NOPM, 0, 0), 999 1000 /* Output Muxes */ 1001 SND_SOC_DAPM_MUX("Out DACL Mux", SND_SOC_NOPM, 0, 0, 1002 &da7219_out_dacl_sel_mux), 1003 SND_SOC_DAPM_MUX("Out DACR Mux", SND_SOC_NOPM, 0, 0, 1004 &da7219_out_dacr_sel_mux), 1005 1006 /* Output Mixers */ 1007 SND_SOC_DAPM_MIXER("Mixer Out FilterL", SND_SOC_NOPM, 0, 0, 1008 da7219_mixout_l_controls, 1009 ARRAY_SIZE(da7219_mixout_l_controls)), 1010 SND_SOC_DAPM_MIXER("Mixer Out FilterR", SND_SOC_NOPM, 0, 0, 1011 da7219_mixout_r_controls, 1012 ARRAY_SIZE(da7219_mixout_r_controls)), 1013 1014 /* Sidetone Mixers */ 1015 SND_SOC_DAPM_MIXER("ST Mixer Out FilterL", SND_SOC_NOPM, 0, 0, 1016 da7219_st_out_filtl_mix_controls, 1017 ARRAY_SIZE(da7219_st_out_filtl_mix_controls)), 1018 SND_SOC_DAPM_MIXER("ST Mixer Out FilterR", SND_SOC_NOPM, 0, 1019 0, da7219_st_out_filtr_mix_controls, 1020 ARRAY_SIZE(da7219_st_out_filtr_mix_controls)), 1021 1022 /* DACs */ 1023 SND_SOC_DAPM_DAC_E("DACL", NULL, DA7219_DAC_L_CTRL, 1024 DA7219_DAC_L_EN_SHIFT, DA7219_NO_INVERT, 1025 da7219_settling_event, 1026 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD), 1027 SND_SOC_DAPM_DAC_E("DACR", NULL, DA7219_DAC_R_CTRL, 1028 DA7219_DAC_R_EN_SHIFT, DA7219_NO_INVERT, 1029 da7219_settling_event, 1030 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD), 1031 1032 /* Output PGAs */ 1033 SND_SOC_DAPM_PGA_E("Mixout Left PGA", DA7219_MIXOUT_L_CTRL, 1034 DA7219_MIXOUT_L_AMP_EN_SHIFT, DA7219_NO_INVERT, 1035 NULL, 0, da7219_mixout_event, 1036 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), 1037 SND_SOC_DAPM_PGA_E("Mixout Right PGA", DA7219_MIXOUT_R_CTRL, 1038 DA7219_MIXOUT_R_AMP_EN_SHIFT, DA7219_NO_INVERT, 1039 NULL, 0, da7219_mixout_event, 1040 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), 1041 SND_SOC_DAPM_SUPPLY_S("Headphone Left PGA", 1, DA7219_HP_L_CTRL, 1042 DA7219_HP_L_AMP_EN_SHIFT, DA7219_NO_INVERT, 1043 da7219_settling_event, 1044 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD), 1045 SND_SOC_DAPM_SUPPLY_S("Headphone Right PGA", 1, DA7219_HP_R_CTRL, 1046 DA7219_HP_R_AMP_EN_SHIFT, DA7219_NO_INVERT, 1047 da7219_settling_event, 1048 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD), 1049 1050 /* Output Supplies */ 1051 SND_SOC_DAPM_SUPPLY_S("Charge Pump", 0, DA7219_CP_CTRL, 1052 DA7219_CP_EN_SHIFT, DA7219_NO_INVERT, 1053 da7219_settling_event, 1054 SND_SOC_DAPM_POST_PMU), 1055 1056 /* Outputs */ 1057 SND_SOC_DAPM_OUTPUT("HPL"), 1058 SND_SOC_DAPM_OUTPUT("HPR"), 1059 1060 /* Pre/Post Power */ 1061 SND_SOC_DAPM_PRE("Pre Power Gain Ramp", da7219_gain_ramp_event), 1062 SND_SOC_DAPM_POST("Post Power Gain Ramp", da7219_gain_ramp_event), 1063 }; 1064 1065 1066 /* 1067 * DAPM Mux Routes 1068 */ 1069 1070 #define DA7219_OUT_DAI_MUX_ROUTES(name) \ 1071 {name, "ADC", "Mixer In"}, \ 1072 {name, "Tone Generator", "Tone Generator"}, \ 1073 {name, "DAIL", "DAIOUT"}, \ 1074 {name, "DAIR", "DAIOUT"} 1075 1076 #define DA7219_OUT_DAC_MUX_ROUTES(name) \ 1077 {name, "ADC", "Mixer In"}, \ 1078 {name, "Tone Generator", "Tone Generator"}, \ 1079 {name, "DAIL", "DAIIN"}, \ 1080 {name, "DAIR", "DAIIN"} 1081 1082 /* 1083 * DAPM Mixer Routes 1084 */ 1085 1086 #define DA7219_DMIX_ST_ROUTES(name) \ 1087 {name, "Out FilterL Switch", "Mixer Out FilterL"}, \ 1088 {name, "Out FilterR Switch", "Mixer Out FilterR"}, \ 1089 {name, "Sidetone Switch", "Sidetone Filter"} 1090 1091 1092 /* 1093 * DAPM audio route definition 1094 */ 1095 1096 static const struct snd_soc_dapm_route da7219_audio_map[] = { 1097 /* Input paths */ 1098 {"MIC", NULL, "Mic Bias"}, 1099 {"Mic PGA", NULL, "MIC"}, 1100 {"Mixin PGA", NULL, "Mic PGA"}, 1101 {"ADC", NULL, "Mixin PGA"}, 1102 1103 {"Mixer In", NULL, "Mixer In Supply"}, 1104 {"Mixer In", "Mic Switch", "ADC"}, 1105 1106 {"Sidetone Filter", NULL, "Mixer In"}, 1107 1108 {"Tone Generator", NULL, "TONE"}, 1109 1110 DA7219_OUT_DAI_MUX_ROUTES("Out DAIL Mux"), 1111 DA7219_OUT_DAI_MUX_ROUTES("Out DAIR Mux"), 1112 1113 {"DAIOUT", NULL, "Out DAIL Mux"}, 1114 {"DAIOUT", NULL, "Out DAIR Mux"}, 1115 {"DAIOUT", NULL, "DAI"}, 1116 1117 /* Output paths */ 1118 {"DAIIN", NULL, "DAI"}, 1119 1120 DA7219_OUT_DAC_MUX_ROUTES("Out DACL Mux"), 1121 DA7219_OUT_DAC_MUX_ROUTES("Out DACR Mux"), 1122 1123 {"Mixer Out FilterL", "DACL Switch", "Out DACL Mux"}, 1124 {"Mixer Out FilterR", "DACR Switch", "Out DACR Mux"}, 1125 1126 DA7219_DMIX_ST_ROUTES("ST Mixer Out FilterL"), 1127 DA7219_DMIX_ST_ROUTES("ST Mixer Out FilterR"), 1128 1129 {"DACL", NULL, "ST Mixer Out FilterL"}, 1130 {"DACR", NULL, "ST Mixer Out FilterR"}, 1131 1132 {"Mixout Left PGA", NULL, "DACL"}, 1133 {"Mixout Right PGA", NULL, "DACR"}, 1134 1135 {"HPL", NULL, "Mixout Left PGA"}, 1136 {"HPR", NULL, "Mixout Right PGA"}, 1137 1138 {"HPL", NULL, "Headphone Left PGA"}, 1139 {"HPR", NULL, "Headphone Right PGA"}, 1140 1141 {"HPL", NULL, "Charge Pump"}, 1142 {"HPR", NULL, "Charge Pump"}, 1143 }; 1144 1145 1146 /* 1147 * DAI operations 1148 */ 1149 1150 static int da7219_set_dai_sysclk(struct snd_soc_dai *codec_dai, 1151 int clk_id, unsigned int freq, int dir) 1152 { 1153 struct snd_soc_component *component = codec_dai->component; 1154 struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component); 1155 int ret = 0; 1156 1157 guard(mutex)(&da7219->pll_lock); 1158 1159 if (da7219->clk_src == clk_id && da7219->mclk_rate == freq) 1160 return 0; 1161 1162 if (freq < 2000000 || freq > 54000000) { 1163 dev_err(codec_dai->dev, "Unsupported MCLK value %d\n", 1164 freq); 1165 return -EINVAL; 1166 } 1167 1168 switch (clk_id) { 1169 case DA7219_CLKSRC_MCLK_SQR: 1170 snd_soc_component_update_bits(component, DA7219_PLL_CTRL, 1171 DA7219_PLL_MCLK_SQR_EN_MASK, 1172 DA7219_PLL_MCLK_SQR_EN_MASK); 1173 break; 1174 case DA7219_CLKSRC_MCLK: 1175 snd_soc_component_update_bits(component, DA7219_PLL_CTRL, 1176 DA7219_PLL_MCLK_SQR_EN_MASK, 0); 1177 break; 1178 default: 1179 dev_err(codec_dai->dev, "Unknown clock source %d\n", clk_id); 1180 return -EINVAL; 1181 } 1182 1183 da7219->clk_src = clk_id; 1184 1185 if (da7219->mclk) { 1186 freq = clk_round_rate(da7219->mclk, freq); 1187 ret = clk_set_rate(da7219->mclk, freq); 1188 if (ret) { 1189 dev_err(codec_dai->dev, "Failed to set clock rate %d\n", freq); 1190 return ret; 1191 } 1192 } 1193 1194 da7219->mclk_rate = freq; 1195 1196 return 0; 1197 } 1198 1199 int da7219_set_pll(struct snd_soc_component *component, int source, unsigned int fout) 1200 { 1201 struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component); 1202 1203 u8 pll_ctrl, indiv_bits, indiv; 1204 u8 pll_frac_top, pll_frac_bot, pll_integer; 1205 u32 freq_ref; 1206 u64 frac_div; 1207 1208 /* Verify 2MHz - 54MHz MCLK provided, and set input divider */ 1209 if (da7219->mclk_rate < 2000000) { 1210 dev_err(component->dev, "PLL input clock %d below valid range\n", 1211 da7219->mclk_rate); 1212 return -EINVAL; 1213 } else if (da7219->mclk_rate <= 4500000) { 1214 indiv_bits = DA7219_PLL_INDIV_2_TO_4_5_MHZ; 1215 indiv = DA7219_PLL_INDIV_2_TO_4_5_MHZ_VAL; 1216 } else if (da7219->mclk_rate <= 9000000) { 1217 indiv_bits = DA7219_PLL_INDIV_4_5_TO_9_MHZ; 1218 indiv = DA7219_PLL_INDIV_4_5_TO_9_MHZ_VAL; 1219 } else if (da7219->mclk_rate <= 18000000) { 1220 indiv_bits = DA7219_PLL_INDIV_9_TO_18_MHZ; 1221 indiv = DA7219_PLL_INDIV_9_TO_18_MHZ_VAL; 1222 } else if (da7219->mclk_rate <= 36000000) { 1223 indiv_bits = DA7219_PLL_INDIV_18_TO_36_MHZ; 1224 indiv = DA7219_PLL_INDIV_18_TO_36_MHZ_VAL; 1225 } else if (da7219->mclk_rate <= 54000000) { 1226 indiv_bits = DA7219_PLL_INDIV_36_TO_54_MHZ; 1227 indiv = DA7219_PLL_INDIV_36_TO_54_MHZ_VAL; 1228 } else { 1229 dev_err(component->dev, "PLL input clock %d above valid range\n", 1230 da7219->mclk_rate); 1231 return -EINVAL; 1232 } 1233 freq_ref = (da7219->mclk_rate / indiv); 1234 pll_ctrl = indiv_bits; 1235 1236 /* Configure PLL */ 1237 switch (source) { 1238 case DA7219_SYSCLK_MCLK: 1239 pll_ctrl |= DA7219_PLL_MODE_BYPASS; 1240 snd_soc_component_update_bits(component, DA7219_PLL_CTRL, 1241 DA7219_PLL_INDIV_MASK | 1242 DA7219_PLL_MODE_MASK, pll_ctrl); 1243 return 0; 1244 case DA7219_SYSCLK_PLL: 1245 pll_ctrl |= DA7219_PLL_MODE_NORMAL; 1246 break; 1247 case DA7219_SYSCLK_PLL_SRM: 1248 pll_ctrl |= DA7219_PLL_MODE_SRM; 1249 break; 1250 default: 1251 dev_err(component->dev, "Invalid PLL config\n"); 1252 return -EINVAL; 1253 } 1254 1255 /* Calculate dividers for PLL */ 1256 pll_integer = fout / freq_ref; 1257 frac_div = (u64)(fout % freq_ref) * 8192ULL; 1258 do_div(frac_div, freq_ref); 1259 pll_frac_top = (frac_div >> DA7219_BYTE_SHIFT) & DA7219_BYTE_MASK; 1260 pll_frac_bot = (frac_div) & DA7219_BYTE_MASK; 1261 1262 /* Write PLL config & dividers */ 1263 snd_soc_component_write(component, DA7219_PLL_FRAC_TOP, pll_frac_top); 1264 snd_soc_component_write(component, DA7219_PLL_FRAC_BOT, pll_frac_bot); 1265 snd_soc_component_write(component, DA7219_PLL_INTEGER, pll_integer); 1266 snd_soc_component_update_bits(component, DA7219_PLL_CTRL, 1267 DA7219_PLL_INDIV_MASK | DA7219_PLL_MODE_MASK, 1268 pll_ctrl); 1269 1270 return 0; 1271 } 1272 1273 static int da7219_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id, 1274 int source, unsigned int fref, unsigned int fout) 1275 { 1276 struct snd_soc_component *component = codec_dai->component; 1277 struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component); 1278 1279 guard(mutex)(&da7219->pll_lock); 1280 1281 return da7219_set_pll(component, source, fout); 1282 } 1283 1284 static int da7219_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt) 1285 { 1286 struct snd_soc_component *component = codec_dai->component; 1287 struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component); 1288 u8 dai_clk_mode = 0, dai_ctrl = 0; 1289 1290 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { 1291 case SND_SOC_DAIFMT_CBP_CFP: 1292 da7219->master = true; 1293 break; 1294 case SND_SOC_DAIFMT_CBC_CFC: 1295 da7219->master = false; 1296 break; 1297 default: 1298 return -EINVAL; 1299 } 1300 1301 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { 1302 case SND_SOC_DAIFMT_I2S: 1303 case SND_SOC_DAIFMT_LEFT_J: 1304 case SND_SOC_DAIFMT_RIGHT_J: 1305 switch (fmt & SND_SOC_DAIFMT_INV_MASK) { 1306 case SND_SOC_DAIFMT_NB_NF: 1307 break; 1308 case SND_SOC_DAIFMT_NB_IF: 1309 dai_clk_mode |= DA7219_DAI_WCLK_POL_INV; 1310 break; 1311 case SND_SOC_DAIFMT_IB_NF: 1312 dai_clk_mode |= DA7219_DAI_CLK_POL_INV; 1313 break; 1314 case SND_SOC_DAIFMT_IB_IF: 1315 dai_clk_mode |= DA7219_DAI_WCLK_POL_INV | 1316 DA7219_DAI_CLK_POL_INV; 1317 break; 1318 default: 1319 return -EINVAL; 1320 } 1321 break; 1322 case SND_SOC_DAIFMT_DSP_B: 1323 switch (fmt & SND_SOC_DAIFMT_INV_MASK) { 1324 case SND_SOC_DAIFMT_NB_NF: 1325 dai_clk_mode |= DA7219_DAI_CLK_POL_INV; 1326 break; 1327 case SND_SOC_DAIFMT_NB_IF: 1328 dai_clk_mode |= DA7219_DAI_WCLK_POL_INV | 1329 DA7219_DAI_CLK_POL_INV; 1330 break; 1331 case SND_SOC_DAIFMT_IB_NF: 1332 break; 1333 case SND_SOC_DAIFMT_IB_IF: 1334 dai_clk_mode |= DA7219_DAI_WCLK_POL_INV; 1335 break; 1336 default: 1337 return -EINVAL; 1338 } 1339 break; 1340 default: 1341 return -EINVAL; 1342 } 1343 1344 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { 1345 case SND_SOC_DAIFMT_I2S: 1346 dai_ctrl |= DA7219_DAI_FORMAT_I2S; 1347 break; 1348 case SND_SOC_DAIFMT_LEFT_J: 1349 dai_ctrl |= DA7219_DAI_FORMAT_LEFT_J; 1350 break; 1351 case SND_SOC_DAIFMT_RIGHT_J: 1352 dai_ctrl |= DA7219_DAI_FORMAT_RIGHT_J; 1353 break; 1354 case SND_SOC_DAIFMT_DSP_B: 1355 dai_ctrl |= DA7219_DAI_FORMAT_DSP; 1356 break; 1357 default: 1358 return -EINVAL; 1359 } 1360 1361 snd_soc_component_update_bits(component, DA7219_DAI_CLK_MODE, 1362 DA7219_DAI_CLK_POL_MASK | DA7219_DAI_WCLK_POL_MASK, 1363 dai_clk_mode); 1364 snd_soc_component_update_bits(component, DA7219_DAI_CTRL, DA7219_DAI_FORMAT_MASK, 1365 dai_ctrl); 1366 1367 return 0; 1368 } 1369 1370 static int da7219_set_bclks_per_wclk(struct snd_soc_component *component, 1371 unsigned long factor) 1372 { 1373 u8 bclks_per_wclk; 1374 1375 switch (factor) { 1376 case 32: 1377 bclks_per_wclk = DA7219_DAI_BCLKS_PER_WCLK_32; 1378 break; 1379 case 64: 1380 bclks_per_wclk = DA7219_DAI_BCLKS_PER_WCLK_64; 1381 break; 1382 case 128: 1383 bclks_per_wclk = DA7219_DAI_BCLKS_PER_WCLK_128; 1384 break; 1385 case 256: 1386 bclks_per_wclk = DA7219_DAI_BCLKS_PER_WCLK_256; 1387 break; 1388 default: 1389 return -EINVAL; 1390 } 1391 1392 snd_soc_component_update_bits(component, DA7219_DAI_CLK_MODE, 1393 DA7219_DAI_BCLKS_PER_WCLK_MASK, 1394 bclks_per_wclk); 1395 1396 return 0; 1397 } 1398 1399 static int da7219_set_dai_tdm_slot(struct snd_soc_dai *dai, 1400 unsigned int tx_mask, unsigned int rx_mask, 1401 int slots, int slot_width) 1402 { 1403 struct snd_soc_component *component = dai->component; 1404 struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component); 1405 struct clk *wclk = da7219->dai_clks[DA7219_DAI_WCLK_IDX]; 1406 struct clk *bclk = da7219->dai_clks[DA7219_DAI_BCLK_IDX]; 1407 unsigned int ch_mask; 1408 unsigned long sr, bclk_rate; 1409 u8 slot_offset; 1410 u16 offset; 1411 __le16 dai_offset; 1412 u32 frame_size; 1413 int ret; 1414 1415 /* No channels enabled so disable TDM */ 1416 if (!tx_mask) { 1417 snd_soc_component_update_bits(component, DA7219_DAI_TDM_CTRL, 1418 DA7219_DAI_TDM_CH_EN_MASK | 1419 DA7219_DAI_TDM_MODE_EN_MASK, 0); 1420 da7219->tdm_en = false; 1421 return 0; 1422 } 1423 1424 /* Check we have valid slots */ 1425 slot_offset = ffs(tx_mask) - 1; 1426 ch_mask = (tx_mask >> slot_offset); 1427 if (fls(ch_mask) > DA7219_DAI_TDM_MAX_SLOTS) { 1428 dev_err(component->dev, 1429 "Invalid number of slots, max = %d\n", 1430 DA7219_DAI_TDM_MAX_SLOTS); 1431 return -EINVAL; 1432 } 1433 1434 /* 1435 * Ensure we have a valid offset into the frame, based on slot width 1436 * and slot offset of first slot we're interested in. 1437 */ 1438 offset = slot_offset * slot_width; 1439 if (offset > DA7219_DAI_OFFSET_MAX) { 1440 dev_err(component->dev, "Invalid frame offset %d\n", offset); 1441 return -EINVAL; 1442 } 1443 1444 /* 1445 * If we're master, calculate & validate frame size based on slot info 1446 * provided as we have a limited set of rates available. 1447 */ 1448 if (da7219->master) { 1449 frame_size = slots * slot_width; 1450 1451 if (bclk) { 1452 sr = clk_get_rate(wclk); 1453 bclk_rate = sr * frame_size; 1454 ret = clk_set_rate(bclk, bclk_rate); 1455 if (ret) { 1456 dev_err(component->dev, 1457 "Failed to set TDM BCLK rate %lu: %d\n", 1458 bclk_rate, ret); 1459 return ret; 1460 } 1461 } else { 1462 ret = da7219_set_bclks_per_wclk(component, frame_size); 1463 if (ret) { 1464 dev_err(component->dev, 1465 "Failed to set TDM BCLKs per WCLK %d: %d\n", 1466 frame_size, ret); 1467 return ret; 1468 } 1469 } 1470 } 1471 1472 dai_offset = cpu_to_le16(offset); 1473 regmap_bulk_write(da7219->regmap, DA7219_DAI_OFFSET_LOWER, 1474 &dai_offset, sizeof(dai_offset)); 1475 1476 snd_soc_component_update_bits(component, DA7219_DAI_TDM_CTRL, 1477 DA7219_DAI_TDM_CH_EN_MASK | 1478 DA7219_DAI_TDM_MODE_EN_MASK, 1479 (ch_mask << DA7219_DAI_TDM_CH_EN_SHIFT) | 1480 DA7219_DAI_TDM_MODE_EN_MASK); 1481 1482 da7219->tdm_en = true; 1483 1484 return 0; 1485 } 1486 1487 static int da7219_set_sr(struct snd_soc_component *component, 1488 unsigned long rate) 1489 { 1490 u8 fs; 1491 1492 switch (rate) { 1493 case 8000: 1494 fs = DA7219_SR_8000; 1495 break; 1496 case 11025: 1497 fs = DA7219_SR_11025; 1498 break; 1499 case 12000: 1500 fs = DA7219_SR_12000; 1501 break; 1502 case 16000: 1503 fs = DA7219_SR_16000; 1504 break; 1505 case 22050: 1506 fs = DA7219_SR_22050; 1507 break; 1508 case 24000: 1509 fs = DA7219_SR_24000; 1510 break; 1511 case 32000: 1512 fs = DA7219_SR_32000; 1513 break; 1514 case 44100: 1515 fs = DA7219_SR_44100; 1516 break; 1517 case 48000: 1518 fs = DA7219_SR_48000; 1519 break; 1520 case 88200: 1521 fs = DA7219_SR_88200; 1522 break; 1523 case 96000: 1524 fs = DA7219_SR_96000; 1525 break; 1526 default: 1527 return -EINVAL; 1528 } 1529 1530 snd_soc_component_write(component, DA7219_SR, fs); 1531 1532 return 0; 1533 } 1534 1535 static int da7219_hw_params(struct snd_pcm_substream *substream, 1536 struct snd_pcm_hw_params *params, 1537 struct snd_soc_dai *dai) 1538 { 1539 struct snd_soc_component *component = dai->component; 1540 struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component); 1541 struct clk *wclk = da7219->dai_clks[DA7219_DAI_WCLK_IDX]; 1542 struct clk *bclk = da7219->dai_clks[DA7219_DAI_BCLK_IDX]; 1543 u8 dai_ctrl = 0; 1544 unsigned int channels; 1545 unsigned long sr, bclk_rate; 1546 int word_len = params_width(params); 1547 int frame_size, ret; 1548 1549 switch (word_len) { 1550 case 16: 1551 dai_ctrl |= DA7219_DAI_WORD_LENGTH_S16_LE; 1552 break; 1553 case 20: 1554 dai_ctrl |= DA7219_DAI_WORD_LENGTH_S20_LE; 1555 break; 1556 case 24: 1557 dai_ctrl |= DA7219_DAI_WORD_LENGTH_S24_LE; 1558 break; 1559 case 32: 1560 dai_ctrl |= DA7219_DAI_WORD_LENGTH_S32_LE; 1561 break; 1562 default: 1563 return -EINVAL; 1564 } 1565 1566 channels = params_channels(params); 1567 if ((channels < 1) || (channels > DA7219_DAI_CH_NUM_MAX)) { 1568 dev_err(component->dev, 1569 "Invalid number of channels, only 1 to %d supported\n", 1570 DA7219_DAI_CH_NUM_MAX); 1571 return -EINVAL; 1572 } 1573 dai_ctrl |= channels << DA7219_DAI_CH_NUM_SHIFT; 1574 1575 sr = params_rate(params); 1576 if (da7219->master && wclk) { 1577 ret = clk_set_rate(wclk, sr); 1578 if (ret) { 1579 dev_err(component->dev, 1580 "Failed to set WCLK SR %lu: %d\n", sr, ret); 1581 return ret; 1582 } 1583 } else { 1584 ret = da7219_set_sr(component, sr); 1585 if (ret) { 1586 dev_err(component->dev, 1587 "Failed to set SR %lu: %d\n", sr, ret); 1588 return ret; 1589 } 1590 } 1591 1592 /* 1593 * If we're master, then we have a limited set of BCLK rates we 1594 * support. For slave mode this isn't the case and the codec can detect 1595 * the BCLK rate automatically. 1596 */ 1597 if (da7219->master && !da7219->tdm_en) { 1598 if ((word_len * DA7219_DAI_CH_NUM_MAX) <= 32) 1599 frame_size = 32; 1600 else 1601 frame_size = 64; 1602 1603 if (bclk) { 1604 bclk_rate = frame_size * sr; 1605 /* 1606 * Rounding the rate here avoids failure trying to set a 1607 * new rate on an already enabled bclk. In that 1608 * instance this will just set the same rate as is 1609 * currently in use, and so should continue without 1610 * problem, as long as the BCLK rate is suitable for the 1611 * desired frame size. 1612 */ 1613 bclk_rate = clk_round_rate(bclk, bclk_rate); 1614 if ((bclk_rate / sr) < frame_size) { 1615 dev_err(component->dev, 1616 "BCLK rate mismatch against frame size"); 1617 return -EINVAL; 1618 } 1619 1620 ret = clk_set_rate(bclk, bclk_rate); 1621 if (ret) { 1622 dev_err(component->dev, 1623 "Failed to set BCLK rate %lu: %d\n", 1624 bclk_rate, ret); 1625 return ret; 1626 } 1627 } else { 1628 ret = da7219_set_bclks_per_wclk(component, frame_size); 1629 if (ret) { 1630 dev_err(component->dev, 1631 "Failed to set BCLKs per WCLK %d: %d\n", 1632 frame_size, ret); 1633 return ret; 1634 } 1635 } 1636 } 1637 1638 snd_soc_component_update_bits(component, DA7219_DAI_CTRL, 1639 DA7219_DAI_WORD_LENGTH_MASK | 1640 DA7219_DAI_CH_NUM_MASK, 1641 dai_ctrl); 1642 1643 return 0; 1644 } 1645 1646 static const struct snd_soc_dai_ops da7219_dai_ops = { 1647 .hw_params = da7219_hw_params, 1648 .set_sysclk = da7219_set_dai_sysclk, 1649 .set_pll = da7219_set_dai_pll, 1650 .set_fmt = da7219_set_dai_fmt, 1651 .set_tdm_slot = da7219_set_dai_tdm_slot, 1652 }; 1653 1654 #define DA7219_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\ 1655 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE) 1656 1657 #define DA7219_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\ 1658 SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 |\ 1659 SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 |\ 1660 SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 |\ 1661 SNDRV_PCM_RATE_96000) 1662 1663 static struct snd_soc_dai_driver da7219_dai = { 1664 .name = "da7219-hifi", 1665 .playback = { 1666 .stream_name = "Playback", 1667 .channels_min = 1, 1668 .channels_max = DA7219_DAI_CH_NUM_MAX, 1669 .rates = DA7219_RATES, 1670 .formats = DA7219_FORMATS, 1671 }, 1672 .capture = { 1673 .stream_name = "Capture", 1674 .channels_min = 1, 1675 .channels_max = DA7219_DAI_CH_NUM_MAX, 1676 .rates = DA7219_RATES, 1677 .formats = DA7219_FORMATS, 1678 }, 1679 .ops = &da7219_dai_ops, 1680 .symmetric_rate = 1, 1681 .symmetric_channels = 1, 1682 .symmetric_sample_bits = 1, 1683 }; 1684 1685 1686 /* 1687 * DT/ACPI 1688 */ 1689 1690 #ifdef CONFIG_OF 1691 static const struct of_device_id da7219_of_match[] = { 1692 { .compatible = "dlg,da7219", }, 1693 { } 1694 }; 1695 MODULE_DEVICE_TABLE(of, da7219_of_match); 1696 #endif 1697 1698 #ifdef CONFIG_ACPI 1699 static const struct acpi_device_id da7219_acpi_match[] = { 1700 { .id = "DLGS7219", }, 1701 { } 1702 }; 1703 MODULE_DEVICE_TABLE(acpi, da7219_acpi_match); 1704 #endif 1705 1706 static enum da7219_micbias_voltage 1707 da7219_fw_micbias_lvl(struct device *dev, u32 val) 1708 { 1709 switch (val) { 1710 case 1600: 1711 return DA7219_MICBIAS_1_6V; 1712 case 1800: 1713 return DA7219_MICBIAS_1_8V; 1714 case 2000: 1715 return DA7219_MICBIAS_2_0V; 1716 case 2200: 1717 return DA7219_MICBIAS_2_2V; 1718 case 2400: 1719 return DA7219_MICBIAS_2_4V; 1720 case 2600: 1721 return DA7219_MICBIAS_2_6V; 1722 default: 1723 dev_warn(dev, "Invalid micbias level"); 1724 return DA7219_MICBIAS_2_2V; 1725 } 1726 } 1727 1728 static enum da7219_mic_amp_in_sel 1729 da7219_fw_mic_amp_in_sel(struct device *dev, const char *str) 1730 { 1731 if (!strcmp(str, "diff")) { 1732 return DA7219_MIC_AMP_IN_SEL_DIFF; 1733 } else if (!strcmp(str, "se_p")) { 1734 return DA7219_MIC_AMP_IN_SEL_SE_P; 1735 } else if (!strcmp(str, "se_n")) { 1736 return DA7219_MIC_AMP_IN_SEL_SE_N; 1737 } else { 1738 dev_warn(dev, "Invalid mic input type selection"); 1739 return DA7219_MIC_AMP_IN_SEL_DIFF; 1740 } 1741 } 1742 1743 static struct da7219_pdata *da7219_fw_to_pdata(struct device *dev) 1744 { 1745 struct da7219_pdata *pdata; 1746 const char *of_str; 1747 u32 of_val32; 1748 1749 pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL); 1750 if (!pdata) 1751 return NULL; 1752 1753 pdata->wakeup_source = device_property_read_bool(dev, "wakeup-source"); 1754 1755 pdata->dai_clk_names[DA7219_DAI_WCLK_IDX] = "da7219-dai-wclk"; 1756 pdata->dai_clk_names[DA7219_DAI_BCLK_IDX] = "da7219-dai-bclk"; 1757 if (device_property_read_string_array(dev, "clock-output-names", 1758 pdata->dai_clk_names, 1759 DA7219_DAI_NUM_CLKS) < 0) 1760 dev_warn(dev, "Using default DAI clk names: %s, %s\n", 1761 pdata->dai_clk_names[DA7219_DAI_WCLK_IDX], 1762 pdata->dai_clk_names[DA7219_DAI_BCLK_IDX]); 1763 1764 if (device_property_read_u32(dev, "dlg,micbias-lvl", &of_val32) >= 0) 1765 pdata->micbias_lvl = da7219_fw_micbias_lvl(dev, of_val32); 1766 else 1767 pdata->micbias_lvl = DA7219_MICBIAS_2_2V; 1768 1769 if (!device_property_read_string(dev, "dlg,mic-amp-in-sel", &of_str)) 1770 pdata->mic_amp_in_sel = da7219_fw_mic_amp_in_sel(dev, of_str); 1771 else 1772 pdata->mic_amp_in_sel = DA7219_MIC_AMP_IN_SEL_DIFF; 1773 1774 return pdata; 1775 } 1776 1777 1778 /* 1779 * Codec driver functions 1780 */ 1781 1782 static int da7219_set_bias_level(struct snd_soc_component *component, 1783 enum snd_soc_bias_level level) 1784 { 1785 struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component); 1786 struct snd_soc_dapm_context *dapm = snd_soc_component_to_dapm(component); 1787 int ret; 1788 1789 switch (level) { 1790 case SND_SOC_BIAS_ON: 1791 break; 1792 case SND_SOC_BIAS_PREPARE: 1793 /* Enable MCLK for transition to ON state */ 1794 if (snd_soc_dapm_get_bias_level(dapm) == SND_SOC_BIAS_STANDBY) { 1795 if (da7219->mclk) { 1796 ret = clk_prepare_enable(da7219->mclk); 1797 if (ret) { 1798 dev_err(component->dev, 1799 "Failed to enable mclk\n"); 1800 return ret; 1801 } 1802 } 1803 } 1804 1805 break; 1806 case SND_SOC_BIAS_STANDBY: 1807 if (snd_soc_dapm_get_bias_level(dapm) == SND_SOC_BIAS_OFF) 1808 /* Master bias */ 1809 snd_soc_component_update_bits(component, DA7219_REFERENCES, 1810 DA7219_BIAS_EN_MASK, 1811 DA7219_BIAS_EN_MASK); 1812 1813 if (snd_soc_dapm_get_bias_level(dapm) == SND_SOC_BIAS_PREPARE) { 1814 /* Remove MCLK */ 1815 if (da7219->mclk) 1816 clk_disable_unprepare(da7219->mclk); 1817 } 1818 break; 1819 case SND_SOC_BIAS_OFF: 1820 /* Only disable master bias if we're not a wake-up source */ 1821 if (!da7219->wakeup_source) 1822 snd_soc_component_update_bits(component, DA7219_REFERENCES, 1823 DA7219_BIAS_EN_MASK, 0); 1824 1825 break; 1826 } 1827 1828 return 0; 1829 } 1830 1831 static const char *da7219_supply_names[DA7219_NUM_SUPPLIES] = { 1832 [DA7219_SUPPLY_VDD] = "VDD", 1833 [DA7219_SUPPLY_VDDMIC] = "VDDMIC", 1834 [DA7219_SUPPLY_VDDIO] = "VDDIO", 1835 }; 1836 1837 static int da7219_handle_supplies(struct snd_soc_component *component, 1838 u8 *io_voltage_lvl) 1839 { 1840 struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component); 1841 struct regulator *vddio; 1842 int i, ret; 1843 1844 /* Get required supplies */ 1845 for (i = 0; i < DA7219_NUM_SUPPLIES; ++i) 1846 da7219->supplies[i].supply = da7219_supply_names[i]; 1847 1848 ret = regulator_bulk_get(component->dev, DA7219_NUM_SUPPLIES, 1849 da7219->supplies); 1850 if (ret) { 1851 dev_err(component->dev, "Failed to get supplies"); 1852 return ret; 1853 } 1854 1855 /* Default to upper range */ 1856 *io_voltage_lvl = DA7219_IO_VOLTAGE_LEVEL_2_5V_3_6V; 1857 1858 /* Determine VDDIO voltage provided */ 1859 vddio = da7219->supplies[DA7219_SUPPLY_VDDIO].consumer; 1860 ret = regulator_get_voltage(vddio); 1861 if (ret < 1200000) 1862 dev_warn(component->dev, "Invalid VDDIO voltage\n"); 1863 else if (ret < 2800000) 1864 *io_voltage_lvl = DA7219_IO_VOLTAGE_LEVEL_1_2V_2_8V; 1865 1866 /* Enable main supplies */ 1867 ret = regulator_bulk_enable(DA7219_NUM_SUPPLIES, da7219->supplies); 1868 if (ret) { 1869 dev_err(component->dev, "Failed to enable supplies"); 1870 regulator_bulk_free(DA7219_NUM_SUPPLIES, da7219->supplies); 1871 return ret; 1872 } 1873 1874 return 0; 1875 } 1876 1877 #ifdef CONFIG_COMMON_CLK 1878 static int da7219_wclk_prepare(struct clk_hw *hw) 1879 { 1880 struct da7219_priv *da7219 = 1881 container_of(hw, struct da7219_priv, 1882 dai_clks_hw[DA7219_DAI_WCLK_IDX]); 1883 struct snd_soc_component *component = da7219->component; 1884 1885 if (!da7219->master) 1886 return -EINVAL; 1887 1888 snd_soc_component_update_bits(component, DA7219_DAI_CLK_MODE, 1889 DA7219_DAI_CLK_EN_MASK, 1890 DA7219_DAI_CLK_EN_MASK); 1891 1892 return 0; 1893 } 1894 1895 static void da7219_wclk_unprepare(struct clk_hw *hw) 1896 { 1897 struct da7219_priv *da7219 = 1898 container_of(hw, struct da7219_priv, 1899 dai_clks_hw[DA7219_DAI_WCLK_IDX]); 1900 struct snd_soc_component *component = da7219->component; 1901 1902 if (!da7219->master) 1903 return; 1904 1905 snd_soc_component_update_bits(component, DA7219_DAI_CLK_MODE, 1906 DA7219_DAI_CLK_EN_MASK, 0); 1907 } 1908 1909 static int da7219_wclk_is_prepared(struct clk_hw *hw) 1910 { 1911 struct da7219_priv *da7219 = 1912 container_of(hw, struct da7219_priv, 1913 dai_clks_hw[DA7219_DAI_WCLK_IDX]); 1914 struct snd_soc_component *component = da7219->component; 1915 u8 clk_reg; 1916 1917 if (!da7219->master) 1918 return -EINVAL; 1919 1920 clk_reg = snd_soc_component_read(component, DA7219_DAI_CLK_MODE); 1921 1922 return !!(clk_reg & DA7219_DAI_CLK_EN_MASK); 1923 } 1924 1925 static unsigned long da7219_wclk_recalc_rate(struct clk_hw *hw, 1926 unsigned long parent_rate) 1927 { 1928 struct da7219_priv *da7219 = 1929 container_of(hw, struct da7219_priv, 1930 dai_clks_hw[DA7219_DAI_WCLK_IDX]); 1931 struct snd_soc_component *component = da7219->component; 1932 u8 fs = snd_soc_component_read(component, DA7219_SR); 1933 1934 switch (fs & DA7219_SR_MASK) { 1935 case DA7219_SR_8000: 1936 return 8000; 1937 case DA7219_SR_11025: 1938 return 11025; 1939 case DA7219_SR_12000: 1940 return 12000; 1941 case DA7219_SR_16000: 1942 return 16000; 1943 case DA7219_SR_22050: 1944 return 22050; 1945 case DA7219_SR_24000: 1946 return 24000; 1947 case DA7219_SR_32000: 1948 return 32000; 1949 case DA7219_SR_44100: 1950 return 44100; 1951 case DA7219_SR_48000: 1952 return 48000; 1953 case DA7219_SR_88200: 1954 return 88200; 1955 case DA7219_SR_96000: 1956 return 96000; 1957 default: 1958 return 0; 1959 } 1960 } 1961 1962 static int da7219_wclk_determine_rate(struct clk_hw *hw, 1963 struct clk_rate_request *req) 1964 { 1965 struct da7219_priv *da7219 = 1966 container_of(hw, struct da7219_priv, 1967 dai_clks_hw[DA7219_DAI_WCLK_IDX]); 1968 1969 if (!da7219->master) 1970 return -EINVAL; 1971 1972 if (req->rate < 11025) 1973 req->rate = 8000; 1974 else if (req->rate < 12000) 1975 req->rate = 11025; 1976 else if (req->rate < 16000) 1977 req->rate = 12000; 1978 else if (req->rate < 22050) 1979 req->rate = 16000; 1980 else if (req->rate < 24000) 1981 req->rate = 22050; 1982 else if (req->rate < 32000) 1983 req->rate = 24000; 1984 else if (req->rate < 44100) 1985 req->rate = 32000; 1986 else if (req->rate < 48000) 1987 req->rate = 44100; 1988 else if (req->rate < 88200) 1989 req->rate = 48000; 1990 else if (req->rate < 96000) 1991 req->rate = 88200; 1992 else 1993 req->rate = 96000; 1994 1995 return 0; 1996 } 1997 1998 static int da7219_wclk_set_rate(struct clk_hw *hw, unsigned long rate, 1999 unsigned long parent_rate) 2000 { 2001 struct da7219_priv *da7219 = 2002 container_of(hw, struct da7219_priv, 2003 dai_clks_hw[DA7219_DAI_WCLK_IDX]); 2004 struct snd_soc_component *component = da7219->component; 2005 2006 if (!da7219->master) 2007 return -EINVAL; 2008 2009 return da7219_set_sr(component, rate); 2010 } 2011 2012 static unsigned long da7219_bclk_recalc_rate(struct clk_hw *hw, 2013 unsigned long parent_rate) 2014 { 2015 struct da7219_priv *da7219 = 2016 container_of(hw, struct da7219_priv, 2017 dai_clks_hw[DA7219_DAI_BCLK_IDX]); 2018 struct snd_soc_component *component = da7219->component; 2019 u8 bclks_per_wclk = snd_soc_component_read(component, 2020 DA7219_DAI_CLK_MODE); 2021 2022 switch (bclks_per_wclk & DA7219_DAI_BCLKS_PER_WCLK_MASK) { 2023 case DA7219_DAI_BCLKS_PER_WCLK_32: 2024 return parent_rate * 32; 2025 case DA7219_DAI_BCLKS_PER_WCLK_64: 2026 return parent_rate * 64; 2027 case DA7219_DAI_BCLKS_PER_WCLK_128: 2028 return parent_rate * 128; 2029 case DA7219_DAI_BCLKS_PER_WCLK_256: 2030 return parent_rate * 256; 2031 default: 2032 return 0; 2033 } 2034 } 2035 2036 static unsigned long da7219_bclk_get_factor(unsigned long rate, 2037 unsigned long parent_rate) 2038 { 2039 unsigned long factor; 2040 2041 factor = rate / parent_rate; 2042 if (factor < 64) 2043 return 32; 2044 else if (factor < 128) 2045 return 64; 2046 else if (factor < 256) 2047 return 128; 2048 else 2049 return 256; 2050 } 2051 2052 static int da7219_bclk_determine_rate(struct clk_hw *hw, 2053 struct clk_rate_request *req) 2054 { 2055 struct da7219_priv *da7219 = 2056 container_of(hw, struct da7219_priv, 2057 dai_clks_hw[DA7219_DAI_BCLK_IDX]); 2058 unsigned long factor; 2059 2060 if (!req->best_parent_rate || !da7219->master) 2061 return -EINVAL; 2062 2063 /* 2064 * We don't allow changing the parent rate as some BCLK rates can be 2065 * derived from multiple parent WCLK rates (BCLK rates are set as a 2066 * multiplier of WCLK in HW). We just do some rounding down based on the 2067 * parent WCLK rate set and find the appropriate multiplier of BCLK to 2068 * get the rounded down BCLK value. 2069 */ 2070 factor = da7219_bclk_get_factor(req->rate, req->best_parent_rate); 2071 2072 req->rate = req->best_parent_rate * factor; 2073 2074 return 0; 2075 } 2076 2077 static int da7219_bclk_set_rate(struct clk_hw *hw, unsigned long rate, 2078 unsigned long parent_rate) 2079 { 2080 struct da7219_priv *da7219 = 2081 container_of(hw, struct da7219_priv, 2082 dai_clks_hw[DA7219_DAI_BCLK_IDX]); 2083 struct snd_soc_component *component = da7219->component; 2084 unsigned long factor; 2085 2086 if (!da7219->master) 2087 return -EINVAL; 2088 2089 factor = da7219_bclk_get_factor(rate, parent_rate); 2090 2091 return da7219_set_bclks_per_wclk(component, factor); 2092 } 2093 2094 static const struct clk_ops da7219_dai_clk_ops[DA7219_DAI_NUM_CLKS] = { 2095 [DA7219_DAI_WCLK_IDX] = { 2096 .prepare = da7219_wclk_prepare, 2097 .unprepare = da7219_wclk_unprepare, 2098 .is_prepared = da7219_wclk_is_prepared, 2099 .recalc_rate = da7219_wclk_recalc_rate, 2100 .determine_rate = da7219_wclk_determine_rate, 2101 .set_rate = da7219_wclk_set_rate, 2102 }, 2103 [DA7219_DAI_BCLK_IDX] = { 2104 .recalc_rate = da7219_bclk_recalc_rate, 2105 .determine_rate = da7219_bclk_determine_rate, 2106 .set_rate = da7219_bclk_set_rate, 2107 }, 2108 }; 2109 2110 static int da7219_register_dai_clks(struct snd_soc_component *component) 2111 { 2112 struct device *dev = component->dev; 2113 struct device_node *np = dev->of_node; 2114 struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component); 2115 struct da7219_pdata *pdata = da7219->pdata; 2116 const char *parent_name; 2117 struct clk_hw_onecell_data *clk_data; 2118 int i, ret; 2119 2120 /* For DT platforms allocate onecell data for clock registration */ 2121 if (np) { 2122 clk_data = kzalloc_flex(*clk_data, hws, DA7219_DAI_NUM_CLKS); 2123 if (!clk_data) 2124 return -ENOMEM; 2125 2126 clk_data->num = DA7219_DAI_NUM_CLKS; 2127 da7219->clk_hw_data = clk_data; 2128 } 2129 2130 for (i = 0; i < DA7219_DAI_NUM_CLKS; ++i) { 2131 struct clk_init_data init = {}; 2132 struct clk_lookup *dai_clk_lookup; 2133 struct clk_hw *dai_clk_hw = &da7219->dai_clks_hw[i]; 2134 2135 switch (i) { 2136 case DA7219_DAI_WCLK_IDX: 2137 /* 2138 * If we can, make MCLK the parent of WCLK to ensure 2139 * it's enabled as required. 2140 */ 2141 if (da7219->mclk) { 2142 parent_name = __clk_get_name(da7219->mclk); 2143 init.parent_names = &parent_name; 2144 init.num_parents = 1; 2145 } else { 2146 init.parent_names = NULL; 2147 init.num_parents = 0; 2148 } 2149 break; 2150 case DA7219_DAI_BCLK_IDX: 2151 /* Make WCLK the parent of BCLK */ 2152 parent_name = __clk_get_name(da7219->dai_clks[DA7219_DAI_WCLK_IDX]); 2153 init.parent_names = &parent_name; 2154 init.num_parents = 1; 2155 break; 2156 default: 2157 dev_err(dev, "Invalid clock index\n"); 2158 ret = -EINVAL; 2159 goto err; 2160 } 2161 2162 init.name = pdata->dai_clk_names[i]; 2163 init.ops = &da7219_dai_clk_ops[i]; 2164 init.flags = CLK_GET_RATE_NOCACHE | CLK_SET_RATE_GATE; 2165 dai_clk_hw->init = &init; 2166 2167 ret = clk_hw_register(dev, dai_clk_hw); 2168 if (ret) { 2169 dev_warn(dev, "Failed to register %s: %d\n", init.name, 2170 ret); 2171 goto err; 2172 } 2173 da7219->dai_clks[i] = dai_clk_hw->clk; 2174 2175 /* For DT setup onecell data, otherwise create lookup */ 2176 if (np) { 2177 da7219->clk_hw_data->hws[i] = dai_clk_hw; 2178 } else { 2179 dai_clk_lookup = clkdev_hw_create(dai_clk_hw, init.name, 2180 "%s", dev_name(dev)); 2181 if (!dai_clk_lookup) { 2182 clk_hw_unregister(dai_clk_hw); 2183 ret = -ENOMEM; 2184 goto err; 2185 } else { 2186 da7219->dai_clks_lookup[i] = dai_clk_lookup; 2187 } 2188 } 2189 } 2190 2191 /* If we're using DT, then register as provider accordingly */ 2192 if (np) { 2193 ret = of_clk_add_hw_provider(dev->of_node, of_clk_hw_onecell_get, 2194 da7219->clk_hw_data); 2195 if (ret) { 2196 dev_err(dev, "Failed to register clock provider\n"); 2197 goto err; 2198 } 2199 } 2200 2201 return 0; 2202 2203 err: 2204 while (--i >= 0) { 2205 if (da7219->dai_clks_lookup[i]) 2206 clkdev_drop(da7219->dai_clks_lookup[i]); 2207 2208 clk_hw_unregister(&da7219->dai_clks_hw[i]); 2209 } 2210 2211 if (np) 2212 kfree(da7219->clk_hw_data); 2213 2214 return ret; 2215 } 2216 2217 static void da7219_free_dai_clks(struct snd_soc_component *component) 2218 { 2219 struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component); 2220 struct device_node *np = component->dev->of_node; 2221 int i; 2222 2223 if (np) 2224 of_clk_del_provider(np); 2225 2226 for (i = DA7219_DAI_NUM_CLKS - 1; i >= 0; --i) { 2227 if (da7219->dai_clks_lookup[i]) 2228 clkdev_drop(da7219->dai_clks_lookup[i]); 2229 2230 clk_hw_unregister(&da7219->dai_clks_hw[i]); 2231 } 2232 2233 if (np) 2234 kfree(da7219->clk_hw_data); 2235 } 2236 #else 2237 static inline int da7219_register_dai_clks(struct snd_soc_component *component) 2238 { 2239 return 0; 2240 } 2241 2242 static void da7219_free_dai_clks(struct snd_soc_component *component) {} 2243 #endif /* CONFIG_COMMON_CLK */ 2244 2245 static void da7219_handle_pdata(struct snd_soc_component *component) 2246 { 2247 struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component); 2248 struct da7219_pdata *pdata = da7219->pdata; 2249 2250 if (pdata) { 2251 u8 micbias_lvl = 0; 2252 2253 da7219->wakeup_source = pdata->wakeup_source; 2254 2255 /* Mic Bias voltages */ 2256 switch (pdata->micbias_lvl) { 2257 case DA7219_MICBIAS_1_6V: 2258 case DA7219_MICBIAS_1_8V: 2259 case DA7219_MICBIAS_2_0V: 2260 case DA7219_MICBIAS_2_2V: 2261 case DA7219_MICBIAS_2_4V: 2262 case DA7219_MICBIAS_2_6V: 2263 micbias_lvl |= (pdata->micbias_lvl << 2264 DA7219_MICBIAS1_LEVEL_SHIFT); 2265 break; 2266 } 2267 2268 snd_soc_component_write(component, DA7219_MICBIAS_CTRL, micbias_lvl); 2269 2270 /* 2271 * Calculate delay required to compensate for DC offset in 2272 * Mic PGA, based on Mic Bias voltage. 2273 */ 2274 da7219->mic_pga_delay = DA7219_MIC_PGA_BASE_DELAY + 2275 (pdata->micbias_lvl * 2276 DA7219_MIC_PGA_OFFSET_DELAY); 2277 2278 /* Mic */ 2279 switch (pdata->mic_amp_in_sel) { 2280 case DA7219_MIC_AMP_IN_SEL_DIFF: 2281 case DA7219_MIC_AMP_IN_SEL_SE_P: 2282 case DA7219_MIC_AMP_IN_SEL_SE_N: 2283 snd_soc_component_write(component, DA7219_MIC_1_SELECT, 2284 pdata->mic_amp_in_sel); 2285 break; 2286 } 2287 } 2288 } 2289 2290 2291 /* 2292 * Regmap configs 2293 */ 2294 2295 static const struct reg_default da7219_reg_defaults[] = { 2296 { DA7219_MIC_1_SELECT, 0x00 }, 2297 { DA7219_CIF_TIMEOUT_CTRL, 0x01 }, 2298 { DA7219_SR_24_48, 0x00 }, 2299 { DA7219_SR, 0x0A }, 2300 { DA7219_CIF_I2C_ADDR_CFG, 0x02 }, 2301 { DA7219_PLL_CTRL, 0x10 }, 2302 { DA7219_PLL_FRAC_TOP, 0x00 }, 2303 { DA7219_PLL_FRAC_BOT, 0x00 }, 2304 { DA7219_PLL_INTEGER, 0x20 }, 2305 { DA7219_DIG_ROUTING_DAI, 0x10 }, 2306 { DA7219_DAI_CLK_MODE, 0x01 }, 2307 { DA7219_DAI_CTRL, 0x28 }, 2308 { DA7219_DAI_TDM_CTRL, 0x40 }, 2309 { DA7219_DIG_ROUTING_DAC, 0x32 }, 2310 { DA7219_DAI_OFFSET_LOWER, 0x00 }, 2311 { DA7219_DAI_OFFSET_UPPER, 0x00 }, 2312 { DA7219_REFERENCES, 0x08 }, 2313 { DA7219_MIXIN_L_SELECT, 0x00 }, 2314 { DA7219_MIXIN_L_GAIN, 0x03 }, 2315 { DA7219_ADC_L_GAIN, 0x6F }, 2316 { DA7219_ADC_FILTERS1, 0x80 }, 2317 { DA7219_MIC_1_GAIN, 0x01 }, 2318 { DA7219_SIDETONE_CTRL, 0x40 }, 2319 { DA7219_SIDETONE_GAIN, 0x0E }, 2320 { DA7219_DROUTING_ST_OUTFILT_1L, 0x01 }, 2321 { DA7219_DROUTING_ST_OUTFILT_1R, 0x02 }, 2322 { DA7219_DAC_FILTERS5, 0x00 }, 2323 { DA7219_DAC_FILTERS2, 0x88 }, 2324 { DA7219_DAC_FILTERS3, 0x88 }, 2325 { DA7219_DAC_FILTERS4, 0x08 }, 2326 { DA7219_DAC_FILTERS1, 0x80 }, 2327 { DA7219_DAC_L_GAIN, 0x6F }, 2328 { DA7219_DAC_R_GAIN, 0x6F }, 2329 { DA7219_CP_CTRL, 0x20 }, 2330 { DA7219_HP_L_GAIN, 0x39 }, 2331 { DA7219_HP_R_GAIN, 0x39 }, 2332 { DA7219_MIXOUT_L_SELECT, 0x00 }, 2333 { DA7219_MIXOUT_R_SELECT, 0x00 }, 2334 { DA7219_MICBIAS_CTRL, 0x03 }, 2335 { DA7219_MIC_1_CTRL, 0x40 }, 2336 { DA7219_MIXIN_L_CTRL, 0x40 }, 2337 { DA7219_ADC_L_CTRL, 0x40 }, 2338 { DA7219_DAC_L_CTRL, 0x40 }, 2339 { DA7219_DAC_R_CTRL, 0x40 }, 2340 { DA7219_HP_L_CTRL, 0x40 }, 2341 { DA7219_HP_R_CTRL, 0x40 }, 2342 { DA7219_MIXOUT_L_CTRL, 0x10 }, 2343 { DA7219_MIXOUT_R_CTRL, 0x10 }, 2344 { DA7219_CHIP_ID1, 0x23 }, 2345 { DA7219_CHIP_ID2, 0x93 }, 2346 { DA7219_IO_CTRL, 0x00 }, 2347 { DA7219_GAIN_RAMP_CTRL, 0x00 }, 2348 { DA7219_PC_COUNT, 0x02 }, 2349 { DA7219_CP_VOL_THRESHOLD1, 0x0E }, 2350 { DA7219_DIG_CTRL, 0x00 }, 2351 { DA7219_ALC_CTRL2, 0x00 }, 2352 { DA7219_ALC_CTRL3, 0x00 }, 2353 { DA7219_ALC_NOISE, 0x3F }, 2354 { DA7219_ALC_TARGET_MIN, 0x3F }, 2355 { DA7219_ALC_TARGET_MAX, 0x00 }, 2356 { DA7219_ALC_GAIN_LIMITS, 0xFF }, 2357 { DA7219_ALC_ANA_GAIN_LIMITS, 0x71 }, 2358 { DA7219_ALC_ANTICLIP_CTRL, 0x00 }, 2359 { DA7219_ALC_ANTICLIP_LEVEL, 0x00 }, 2360 { DA7219_DAC_NG_SETUP_TIME, 0x00 }, 2361 { DA7219_DAC_NG_OFF_THRESH, 0x00 }, 2362 { DA7219_DAC_NG_ON_THRESH, 0x00 }, 2363 { DA7219_DAC_NG_CTRL, 0x00 }, 2364 { DA7219_TONE_GEN_CFG1, 0x00 }, 2365 { DA7219_TONE_GEN_CFG2, 0x00 }, 2366 { DA7219_TONE_GEN_CYCLES, 0x00 }, 2367 { DA7219_TONE_GEN_FREQ1_L, 0x55 }, 2368 { DA7219_TONE_GEN_FREQ1_U, 0x15 }, 2369 { DA7219_TONE_GEN_FREQ2_L, 0x00 }, 2370 { DA7219_TONE_GEN_FREQ2_U, 0x40 }, 2371 { DA7219_TONE_GEN_ON_PER, 0x02 }, 2372 { DA7219_TONE_GEN_OFF_PER, 0x01 }, 2373 { DA7219_ACCDET_IRQ_MASK_A, 0x00 }, 2374 { DA7219_ACCDET_IRQ_MASK_B, 0x00 }, 2375 { DA7219_ACCDET_CONFIG_1, 0xD6 }, 2376 { DA7219_ACCDET_CONFIG_2, 0x34 }, 2377 { DA7219_ACCDET_CONFIG_3, 0x0A }, 2378 { DA7219_ACCDET_CONFIG_4, 0x16 }, 2379 { DA7219_ACCDET_CONFIG_5, 0x21 }, 2380 { DA7219_ACCDET_CONFIG_6, 0x3E }, 2381 { DA7219_ACCDET_CONFIG_7, 0x01 }, 2382 { DA7219_SYSTEM_ACTIVE, 0x00 }, 2383 }; 2384 2385 static bool da7219_volatile_register(struct device *dev, unsigned int reg) 2386 { 2387 switch (reg) { 2388 case DA7219_MIC_1_GAIN_STATUS: 2389 case DA7219_MIXIN_L_GAIN_STATUS: 2390 case DA7219_ADC_L_GAIN_STATUS: 2391 case DA7219_DAC_L_GAIN_STATUS: 2392 case DA7219_DAC_R_GAIN_STATUS: 2393 case DA7219_HP_L_GAIN_STATUS: 2394 case DA7219_HP_R_GAIN_STATUS: 2395 case DA7219_CIF_CTRL: 2396 case DA7219_PLL_SRM_STS: 2397 case DA7219_ALC_CTRL1: 2398 case DA7219_SYSTEM_MODES_INPUT: 2399 case DA7219_SYSTEM_MODES_OUTPUT: 2400 case DA7219_ALC_OFFSET_AUTO_M_L: 2401 case DA7219_ALC_OFFSET_AUTO_U_L: 2402 case DA7219_TONE_GEN_CFG1: 2403 case DA7219_ACCDET_STATUS_A: 2404 case DA7219_ACCDET_STATUS_B: 2405 case DA7219_ACCDET_IRQ_EVENT_A: 2406 case DA7219_ACCDET_IRQ_EVENT_B: 2407 case DA7219_ACCDET_CONFIG_8: 2408 case DA7219_SYSTEM_STATUS: 2409 return true; 2410 default: 2411 return false; 2412 } 2413 } 2414 2415 static const struct regmap_config da7219_regmap_config = { 2416 .reg_bits = 8, 2417 .val_bits = 8, 2418 2419 .max_register = DA7219_SYSTEM_ACTIVE, 2420 .reg_defaults = da7219_reg_defaults, 2421 .num_reg_defaults = ARRAY_SIZE(da7219_reg_defaults), 2422 .volatile_reg = da7219_volatile_register, 2423 .cache_type = REGCACHE_RBTREE, 2424 }; 2425 2426 static const struct reg_sequence da7219_rev_aa_patch[] = { 2427 { DA7219_REFERENCES, 0x08 }, 2428 }; 2429 2430 static int da7219_probe(struct snd_soc_component *component) 2431 { 2432 struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component); 2433 unsigned int system_active, system_status, rev; 2434 u8 io_voltage_lvl; 2435 int i, ret; 2436 2437 da7219->component = component; 2438 mutex_init(&da7219->ctrl_lock); 2439 mutex_init(&da7219->pll_lock); 2440 2441 /* Regulator configuration */ 2442 ret = da7219_handle_supplies(component, &io_voltage_lvl); 2443 if (ret) 2444 return ret; 2445 2446 regcache_cache_bypass(da7219->regmap, true); 2447 2448 /* Disable audio paths if still active from previous start */ 2449 regmap_read(da7219->regmap, DA7219_SYSTEM_ACTIVE, &system_active); 2450 if (system_active) { 2451 regmap_write(da7219->regmap, DA7219_GAIN_RAMP_CTRL, 2452 DA7219_GAIN_RAMP_RATE_NOMINAL); 2453 regmap_write(da7219->regmap, DA7219_SYSTEM_MODES_INPUT, 0x00); 2454 regmap_write(da7219->regmap, DA7219_SYSTEM_MODES_OUTPUT, 0x01); 2455 2456 for (i = 0; i < DA7219_SYS_STAT_CHECK_RETRIES; ++i) { 2457 regmap_read(da7219->regmap, DA7219_SYSTEM_STATUS, 2458 &system_status); 2459 if (!system_status) 2460 break; 2461 2462 msleep(DA7219_SYS_STAT_CHECK_DELAY); 2463 } 2464 } 2465 2466 /* Soft reset component */ 2467 regmap_write_bits(da7219->regmap, DA7219_ACCDET_CONFIG_1, 2468 DA7219_ACCDET_EN_MASK, 0); 2469 regmap_write_bits(da7219->regmap, DA7219_CIF_CTRL, 2470 DA7219_CIF_REG_SOFT_RESET_MASK, 2471 DA7219_CIF_REG_SOFT_RESET_MASK); 2472 regmap_write_bits(da7219->regmap, DA7219_SYSTEM_ACTIVE, 2473 DA7219_SYSTEM_ACTIVE_MASK, 0); 2474 regmap_write_bits(da7219->regmap, DA7219_SYSTEM_ACTIVE, 2475 DA7219_SYSTEM_ACTIVE_MASK, 1); 2476 2477 regcache_cache_bypass(da7219->regmap, false); 2478 regmap_reinit_cache(da7219->regmap, &da7219_regmap_config); 2479 2480 /* Update IO voltage level range based on supply level */ 2481 snd_soc_component_write(component, DA7219_IO_CTRL, io_voltage_lvl); 2482 2483 ret = regmap_read(da7219->regmap, DA7219_CHIP_REVISION, &rev); 2484 if (ret) { 2485 dev_err(component->dev, "Failed to read chip revision: %d\n", ret); 2486 goto err_disable_reg; 2487 } 2488 2489 switch (rev & DA7219_CHIP_MINOR_MASK) { 2490 case 0: 2491 ret = regmap_register_patch(da7219->regmap, da7219_rev_aa_patch, 2492 ARRAY_SIZE(da7219_rev_aa_patch)); 2493 if (ret) { 2494 dev_err(component->dev, "Failed to register AA patch: %d\n", 2495 ret); 2496 goto err_disable_reg; 2497 } 2498 break; 2499 default: 2500 break; 2501 } 2502 2503 /* Handle DT/ACPI/Platform data */ 2504 da7219_handle_pdata(component); 2505 2506 /* Check if MCLK provided */ 2507 da7219->mclk = clk_get(component->dev, "mclk"); 2508 if (IS_ERR(da7219->mclk)) { 2509 if (PTR_ERR(da7219->mclk) != -ENOENT) { 2510 ret = PTR_ERR(da7219->mclk); 2511 goto err_disable_reg; 2512 } else { 2513 da7219->mclk = NULL; 2514 } 2515 } 2516 2517 /* Register CCF DAI clock control */ 2518 ret = da7219_register_dai_clks(component); 2519 if (ret) 2520 goto err_put_clk; 2521 2522 /* Default PC counter to free-running */ 2523 snd_soc_component_update_bits(component, DA7219_PC_COUNT, DA7219_PC_FREERUN_MASK, 2524 DA7219_PC_FREERUN_MASK); 2525 2526 /* Default gain ramping */ 2527 snd_soc_component_update_bits(component, DA7219_MIXIN_L_CTRL, 2528 DA7219_MIXIN_L_AMP_RAMP_EN_MASK, 2529 DA7219_MIXIN_L_AMP_RAMP_EN_MASK); 2530 snd_soc_component_update_bits(component, DA7219_ADC_L_CTRL, DA7219_ADC_L_RAMP_EN_MASK, 2531 DA7219_ADC_L_RAMP_EN_MASK); 2532 snd_soc_component_update_bits(component, DA7219_DAC_L_CTRL, DA7219_DAC_L_RAMP_EN_MASK, 2533 DA7219_DAC_L_RAMP_EN_MASK); 2534 snd_soc_component_update_bits(component, DA7219_DAC_R_CTRL, DA7219_DAC_R_RAMP_EN_MASK, 2535 DA7219_DAC_R_RAMP_EN_MASK); 2536 snd_soc_component_update_bits(component, DA7219_HP_L_CTRL, 2537 DA7219_HP_L_AMP_RAMP_EN_MASK, 2538 DA7219_HP_L_AMP_RAMP_EN_MASK); 2539 snd_soc_component_update_bits(component, DA7219_HP_R_CTRL, 2540 DA7219_HP_R_AMP_RAMP_EN_MASK, 2541 DA7219_HP_R_AMP_RAMP_EN_MASK); 2542 2543 /* Default minimum gain on HP to avoid pops during DAPM sequencing */ 2544 snd_soc_component_update_bits(component, DA7219_HP_L_CTRL, 2545 DA7219_HP_L_AMP_MIN_GAIN_EN_MASK, 2546 DA7219_HP_L_AMP_MIN_GAIN_EN_MASK); 2547 snd_soc_component_update_bits(component, DA7219_HP_R_CTRL, 2548 DA7219_HP_R_AMP_MIN_GAIN_EN_MASK, 2549 DA7219_HP_R_AMP_MIN_GAIN_EN_MASK); 2550 2551 /* Default infinite tone gen, start/stop by Kcontrol */ 2552 snd_soc_component_write(component, DA7219_TONE_GEN_CYCLES, DA7219_BEEP_CYCLES_MASK); 2553 2554 /* Initialise AAD block */ 2555 ret = da7219_aad_init(component); 2556 if (ret) 2557 goto err_free_dai_clks; 2558 2559 return 0; 2560 2561 err_free_dai_clks: 2562 da7219_free_dai_clks(component); 2563 2564 err_put_clk: 2565 clk_put(da7219->mclk); 2566 2567 err_disable_reg: 2568 regulator_bulk_disable(DA7219_NUM_SUPPLIES, da7219->supplies); 2569 regulator_bulk_free(DA7219_NUM_SUPPLIES, da7219->supplies); 2570 2571 return ret; 2572 } 2573 2574 static void da7219_remove(struct snd_soc_component *component) 2575 { 2576 struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component); 2577 2578 da7219_aad_exit(component); 2579 2580 da7219_free_dai_clks(component); 2581 clk_put(da7219->mclk); 2582 2583 /* Supplies */ 2584 regulator_bulk_disable(DA7219_NUM_SUPPLIES, da7219->supplies); 2585 regulator_bulk_free(DA7219_NUM_SUPPLIES, da7219->supplies); 2586 } 2587 2588 #ifdef CONFIG_PM 2589 static int da7219_suspend(struct snd_soc_component *component) 2590 { 2591 struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component); 2592 struct snd_soc_dapm_context *dapm = snd_soc_component_to_dapm(component); 2593 2594 /* Suspend AAD if we're not a wake-up source */ 2595 if (!da7219->wakeup_source) 2596 da7219_aad_suspend(component); 2597 2598 snd_soc_dapm_force_bias_level(dapm, SND_SOC_BIAS_OFF); 2599 2600 return 0; 2601 } 2602 2603 static int da7219_resume(struct snd_soc_component *component) 2604 { 2605 struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component); 2606 struct snd_soc_dapm_context *dapm = snd_soc_component_to_dapm(component); 2607 2608 snd_soc_dapm_force_bias_level(dapm, SND_SOC_BIAS_STANDBY); 2609 2610 /* Resume AAD if previously suspended */ 2611 if (!da7219->wakeup_source) 2612 da7219_aad_resume(component); 2613 2614 return 0; 2615 } 2616 #else 2617 #define da7219_suspend NULL 2618 #define da7219_resume NULL 2619 #endif 2620 2621 static int da7219_set_jack(struct snd_soc_component *component, struct snd_soc_jack *jack, 2622 void *data) 2623 { 2624 da7219_aad_jack_det(component, jack); 2625 2626 return 0; 2627 } 2628 2629 static const struct snd_soc_component_driver soc_component_dev_da7219 = { 2630 .probe = da7219_probe, 2631 .remove = da7219_remove, 2632 .suspend = da7219_suspend, 2633 .resume = da7219_resume, 2634 .set_jack = da7219_set_jack, 2635 .set_bias_level = da7219_set_bias_level, 2636 .controls = da7219_snd_controls, 2637 .num_controls = ARRAY_SIZE(da7219_snd_controls), 2638 .dapm_widgets = da7219_dapm_widgets, 2639 .num_dapm_widgets = ARRAY_SIZE(da7219_dapm_widgets), 2640 .dapm_routes = da7219_audio_map, 2641 .num_dapm_routes = ARRAY_SIZE(da7219_audio_map), 2642 .idle_bias_on = 1, 2643 .use_pmdown_time = 1, 2644 .endianness = 1, 2645 }; 2646 2647 2648 /* 2649 * I2C layer 2650 */ 2651 2652 static int da7219_i2c_probe(struct i2c_client *i2c) 2653 { 2654 struct device *dev = &i2c->dev; 2655 struct da7219_priv *da7219; 2656 int ret; 2657 2658 da7219 = devm_kzalloc(dev, sizeof(struct da7219_priv), 2659 GFP_KERNEL); 2660 if (!da7219) 2661 return -ENOMEM; 2662 2663 i2c_set_clientdata(i2c, da7219); 2664 2665 da7219->regmap = devm_regmap_init_i2c(i2c, &da7219_regmap_config); 2666 if (IS_ERR(da7219->regmap)) { 2667 ret = PTR_ERR(da7219->regmap); 2668 dev_err(dev, "regmap_init() failed: %d\n", ret); 2669 return ret; 2670 } 2671 2672 /* Retrieve DT/ACPI/Platform data */ 2673 da7219->pdata = dev_get_platdata(dev); 2674 if (!da7219->pdata) 2675 da7219->pdata = da7219_fw_to_pdata(dev); 2676 2677 /* AAD */ 2678 ret = da7219_aad_probe(i2c); 2679 if (ret) 2680 return ret; 2681 2682 ret = devm_snd_soc_register_component(dev, &soc_component_dev_da7219, 2683 &da7219_dai, 1); 2684 if (ret < 0) { 2685 dev_err(dev, "Failed to register da7219 component: %d\n", ret); 2686 } 2687 return ret; 2688 } 2689 2690 static const struct i2c_device_id da7219_i2c_id[] = { 2691 { .name = "da7219" }, 2692 { } 2693 }; 2694 MODULE_DEVICE_TABLE(i2c, da7219_i2c_id); 2695 2696 static struct i2c_driver da7219_i2c_driver = { 2697 .driver = { 2698 .name = "da7219", 2699 .of_match_table = of_match_ptr(da7219_of_match), 2700 .acpi_match_table = ACPI_PTR(da7219_acpi_match), 2701 }, 2702 .probe = da7219_i2c_probe, 2703 .id_table = da7219_i2c_id, 2704 }; 2705 2706 module_i2c_driver(da7219_i2c_driver); 2707 2708 MODULE_DESCRIPTION("ASoC DA7219 Codec Driver"); 2709 MODULE_AUTHOR("Adam Thomson <Adam.Thomson.Opensource@diasemi.com>"); 2710 MODULE_LICENSE("GPL"); 2711