1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Microchip CSI2 Demux Controller (CSI2DC) driver
4 *
5 * Copyright (C) 2018 Microchip Technology, Inc.
6 *
7 * Author: Eugen Hristev <eugen.hristev@microchip.com>
8 *
9 */
10
11 #include <linux/clk.h>
12 #include <linux/module.h>
13 #include <linux/of_graph.h>
14 #include <linux/platform_device.h>
15 #include <linux/pm_runtime.h>
16 #include <linux/videodev2.h>
17
18 #include <media/v4l2-fwnode.h>
19 #include <media/v4l2-subdev.h>
20
21 /* Global configuration register */
22 #define CSI2DC_GCFG 0x0
23
24 /* MIPI sensor pixel clock is free running */
25 #define CSI2DC_GCFG_MIPIFRN BIT(0)
26 /* GPIO parallel interface selection */
27 #define CSI2DC_GCFG_GPIOSEL BIT(1)
28 /* Output waveform inter-line minimum delay */
29 #define CSI2DC_GCFG_HLC(v) ((v) << 4)
30 #define CSI2DC_GCFG_HLC_MASK GENMASK(7, 4)
31 /* SAMA7G5 requires a HLC delay of 15 */
32 #define SAMA7G5_HLC (15)
33
34 /* Global control register */
35 #define CSI2DC_GCTLR 0x04
36 #define CSI2DC_GCTLR_SWRST BIT(0)
37
38 /* Global status register */
39 #define CSI2DC_GS 0x08
40
41 /* SSP interrupt status register */
42 #define CSI2DC_SSPIS 0x28
43 /* Pipe update register */
44 #define CSI2DC_PU 0xc0
45 /* Video pipe attributes update */
46 #define CSI2DC_PU_VP BIT(0)
47
48 /* Pipe update status register */
49 #define CSI2DC_PUS 0xc4
50
51 /* Video pipeline Interrupt Status Register */
52 #define CSI2DC_VPISR 0xf4
53
54 /* Video pipeline enable register */
55 #define CSI2DC_VPE 0xf8
56 #define CSI2DC_VPE_ENABLE BIT(0)
57
58 /* Video pipeline configuration register */
59 #define CSI2DC_VPCFG 0xfc
60 /* Data type */
61 #define CSI2DC_VPCFG_DT(v) ((v) << 0)
62 #define CSI2DC_VPCFG_DT_MASK GENMASK(5, 0)
63 /* Virtual channel identifier */
64 #define CSI2DC_VPCFG_VC(v) ((v) << 6)
65 #define CSI2DC_VPCFG_VC_MASK GENMASK(7, 6)
66 /* Decompression enable */
67 #define CSI2DC_VPCFG_DE BIT(8)
68 /* Decoder mode */
69 #define CSI2DC_VPCFG_DM(v) ((v) << 9)
70 #define CSI2DC_VPCFG_DM_DECODER8TO12 0
71 /* Decoder predictor 2 selection */
72 #define CSI2DC_VPCFG_DP2 BIT(12)
73 /* Recommended memory storage */
74 #define CSI2DC_VPCFG_RMS BIT(13)
75 /* Post adjustment */
76 #define CSI2DC_VPCFG_PA BIT(14)
77
78 /* Video pipeline column register */
79 #define CSI2DC_VPCOL 0x100
80 /* Column number */
81 #define CSI2DC_VPCOL_COL(v) ((v) << 0)
82 #define CSI2DC_VPCOL_COL_MASK GENMASK(15, 0)
83
84 /* Video pipeline row register */
85 #define CSI2DC_VPROW 0x104
86 /* Row number */
87 #define CSI2DC_VPROW_ROW(v) ((v) << 0)
88 #define CSI2DC_VPROW_ROW_MASK GENMASK(15, 0)
89
90 /* Version register */
91 #define CSI2DC_VERSION 0x1fc
92
93 /* register read/write helpers */
94 #define csi2dc_readl(st, reg) readl_relaxed((st)->base + (reg))
95 #define csi2dc_writel(st, reg, val) writel_relaxed((val), \
96 (st)->base + (reg))
97
98 /* supported RAW data types */
99 #define CSI2DC_DT_RAW6 0x28
100 #define CSI2DC_DT_RAW7 0x29
101 #define CSI2DC_DT_RAW8 0x2a
102 #define CSI2DC_DT_RAW10 0x2b
103 #define CSI2DC_DT_RAW12 0x2c
104 #define CSI2DC_DT_RAW14 0x2d
105 /* YUV data types */
106 #define CSI2DC_DT_YUV422_8B 0x1e
107
108 /*
109 * struct csi2dc_format - CSI2DC format type struct
110 * @mbus_code: Media bus code for the format
111 * @dt: Data type constant for this format
112 */
113 struct csi2dc_format {
114 u32 mbus_code;
115 u32 dt;
116 };
117
118 static const struct csi2dc_format csi2dc_formats[] = {
119 {
120 .mbus_code = MEDIA_BUS_FMT_SRGGB8_1X8,
121 .dt = CSI2DC_DT_RAW8,
122 }, {
123 .mbus_code = MEDIA_BUS_FMT_SBGGR8_1X8,
124 .dt = CSI2DC_DT_RAW8,
125 }, {
126 .mbus_code = MEDIA_BUS_FMT_SGRBG8_1X8,
127 .dt = CSI2DC_DT_RAW8,
128 }, {
129 .mbus_code = MEDIA_BUS_FMT_SGBRG8_1X8,
130 .dt = CSI2DC_DT_RAW8,
131 }, {
132 .mbus_code = MEDIA_BUS_FMT_SRGGB10_1X10,
133 .dt = CSI2DC_DT_RAW10,
134 }, {
135 .mbus_code = MEDIA_BUS_FMT_SBGGR10_1X10,
136 .dt = CSI2DC_DT_RAW10,
137 }, {
138 .mbus_code = MEDIA_BUS_FMT_SGRBG10_1X10,
139 .dt = CSI2DC_DT_RAW10,
140 }, {
141 .mbus_code = MEDIA_BUS_FMT_SGBRG10_1X10,
142 .dt = CSI2DC_DT_RAW10,
143 }, {
144 .mbus_code = MEDIA_BUS_FMT_YUYV8_2X8,
145 .dt = CSI2DC_DT_YUV422_8B,
146 },
147 };
148
149 enum mipi_csi_pads {
150 CSI2DC_PAD_SINK = 0,
151 CSI2DC_PAD_SOURCE = 1,
152 CSI2DC_PADS_NUM = 2,
153 };
154
155 /*
156 * struct csi2dc_device - CSI2DC device driver data/config struct
157 * @base: Register map base address
158 * @csi2dc_sd: v4l2 subdevice for the csi2dc device
159 * This is the subdevice that the csi2dc device itself
160 * registers in v4l2 subsystem
161 * @dev: struct device for this csi2dc device
162 * @pclk: Peripheral clock reference
163 * Input clock that clocks the hardware block internal
164 * logic
165 * @scck: Sensor Controller clock reference
166 * Input clock that is used to generate the pixel clock
167 * @format: Current saved format used in g/s fmt
168 * @cur_fmt: Current state format
169 * @try_fmt: Try format that is being tried
170 * @pads: Media entity pads for the csi2dc subdevice
171 * @clk_gated: Whether the clock is gated or free running
172 * @video_pipe: Whether video pipeline is configured
173 * @parallel_mode: The underlying subdevice is connected on a parallel bus
174 * @vc: Current set virtual channel
175 * @notifier: Async notifier that is used to bound the underlying
176 * subdevice to the csi2dc subdevice
177 * @input_sd: Reference to the underlying subdevice bound to the
178 * csi2dc subdevice
179 * @remote_pad: Pad number of the underlying subdevice that is linked
180 * to the csi2dc subdevice sink pad.
181 */
182 struct csi2dc_device {
183 void __iomem *base;
184 struct v4l2_subdev csi2dc_sd;
185 struct device *dev;
186 struct clk *pclk;
187 struct clk *scck;
188
189 struct v4l2_mbus_framefmt format;
190
191 const struct csi2dc_format *cur_fmt;
192 const struct csi2dc_format *try_fmt;
193
194 struct media_pad pads[CSI2DC_PADS_NUM];
195
196 bool clk_gated;
197 bool video_pipe;
198 bool parallel_mode;
199 u32 vc;
200
201 struct v4l2_async_notifier notifier;
202
203 struct v4l2_subdev *input_sd;
204
205 u32 remote_pad;
206 };
207
208 static inline struct csi2dc_device *
csi2dc_sd_to_csi2dc_device(struct v4l2_subdev * csi2dc_sd)209 csi2dc_sd_to_csi2dc_device(struct v4l2_subdev *csi2dc_sd)
210 {
211 return container_of(csi2dc_sd, struct csi2dc_device, csi2dc_sd);
212 }
213
csi2dc_enum_mbus_code(struct v4l2_subdev * csi2dc_sd,struct v4l2_subdev_state * sd_state,struct v4l2_subdev_mbus_code_enum * code)214 static int csi2dc_enum_mbus_code(struct v4l2_subdev *csi2dc_sd,
215 struct v4l2_subdev_state *sd_state,
216 struct v4l2_subdev_mbus_code_enum *code)
217 {
218 if (code->index >= ARRAY_SIZE(csi2dc_formats))
219 return -EINVAL;
220
221 code->code = csi2dc_formats[code->index].mbus_code;
222
223 return 0;
224 }
225
csi2dc_get_fmt(struct v4l2_subdev * csi2dc_sd,struct v4l2_subdev_state * sd_state,struct v4l2_subdev_format * format)226 static int csi2dc_get_fmt(struct v4l2_subdev *csi2dc_sd,
227 struct v4l2_subdev_state *sd_state,
228 struct v4l2_subdev_format *format)
229 {
230 struct csi2dc_device *csi2dc = csi2dc_sd_to_csi2dc_device(csi2dc_sd);
231 struct v4l2_mbus_framefmt *v4l2_try_fmt;
232
233 if (format->which == V4L2_SUBDEV_FORMAT_TRY) {
234 v4l2_try_fmt = v4l2_subdev_state_get_format(sd_state,
235 format->pad);
236 format->format = *v4l2_try_fmt;
237
238 return 0;
239 }
240
241 format->format = csi2dc->format;
242
243 return 0;
244 }
245
csi2dc_set_fmt(struct v4l2_subdev * csi2dc_sd,struct v4l2_subdev_state * sd_state,struct v4l2_subdev_format * req_fmt)246 static int csi2dc_set_fmt(struct v4l2_subdev *csi2dc_sd,
247 struct v4l2_subdev_state *sd_state,
248 struct v4l2_subdev_format *req_fmt)
249 {
250 struct csi2dc_device *csi2dc = csi2dc_sd_to_csi2dc_device(csi2dc_sd);
251 const struct csi2dc_format *fmt, *try_fmt = NULL;
252 struct v4l2_mbus_framefmt *v4l2_try_fmt;
253 unsigned int i;
254
255 /*
256 * Setting the source pad is disabled.
257 * The same format is being propagated from the sink to source.
258 */
259 if (req_fmt->pad == CSI2DC_PAD_SOURCE)
260 return -EINVAL;
261
262 for (i = 0; i < ARRAY_SIZE(csi2dc_formats); i++) {
263 fmt = &csi2dc_formats[i];
264 if (req_fmt->format.code == fmt->mbus_code)
265 try_fmt = fmt;
266 fmt++;
267 }
268
269 /* in case we could not find the desired format, default to something */
270 if (!try_fmt) {
271 try_fmt = &csi2dc_formats[0];
272
273 dev_dbg(csi2dc->dev,
274 "CSI2DC unsupported format 0x%x, defaulting to 0x%x\n",
275 req_fmt->format.code, csi2dc_formats[0].mbus_code);
276 }
277
278 req_fmt->format.code = try_fmt->mbus_code;
279 req_fmt->format.colorspace = V4L2_COLORSPACE_SRGB;
280 req_fmt->format.field = V4L2_FIELD_NONE;
281
282 if (req_fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
283 v4l2_try_fmt = v4l2_subdev_state_get_format(sd_state,
284 req_fmt->pad);
285 *v4l2_try_fmt = req_fmt->format;
286 /* Trying on the sink pad makes the source pad change too */
287 v4l2_try_fmt = v4l2_subdev_state_get_format(sd_state,
288 CSI2DC_PAD_SOURCE);
289 *v4l2_try_fmt = req_fmt->format;
290
291 /* if we are just trying, we are done */
292 return 0;
293 }
294
295 /* save the format for later requests */
296 csi2dc->format = req_fmt->format;
297
298 /* update config */
299 csi2dc->cur_fmt = try_fmt;
300
301 dev_dbg(csi2dc->dev, "new format set: 0x%x @%dx%d\n",
302 csi2dc->format.code, csi2dc->format.width,
303 csi2dc->format.height);
304
305 return 0;
306 }
307
csi2dc_power(struct csi2dc_device * csi2dc,int on)308 static int csi2dc_power(struct csi2dc_device *csi2dc, int on)
309 {
310 int ret = 0;
311
312 if (on) {
313 ret = clk_prepare_enable(csi2dc->pclk);
314 if (ret) {
315 dev_err(csi2dc->dev, "failed to enable pclk:%d\n", ret);
316 return ret;
317 }
318
319 ret = clk_prepare_enable(csi2dc->scck);
320 if (ret) {
321 dev_err(csi2dc->dev, "failed to enable scck:%d\n", ret);
322 clk_disable_unprepare(csi2dc->pclk);
323 return ret;
324 }
325
326 /* if powering up, deassert reset line */
327 csi2dc_writel(csi2dc, CSI2DC_GCTLR, CSI2DC_GCTLR_SWRST);
328 } else {
329 /* if powering down, assert reset line */
330 csi2dc_writel(csi2dc, CSI2DC_GCTLR, 0);
331
332 clk_disable_unprepare(csi2dc->scck);
333 clk_disable_unprepare(csi2dc->pclk);
334 }
335
336 return ret;
337 }
338
csi2dc_get_mbus_config(struct csi2dc_device * csi2dc)339 static int csi2dc_get_mbus_config(struct csi2dc_device *csi2dc)
340 {
341 struct v4l2_mbus_config mbus_config = { 0 };
342 int ret;
343
344 ret = v4l2_subdev_call(csi2dc->input_sd, pad, get_mbus_config,
345 csi2dc->remote_pad, &mbus_config);
346 if (ret == -ENOIOCTLCMD) {
347 dev_dbg(csi2dc->dev,
348 "no remote mbus configuration available\n");
349 return 0;
350 }
351
352 if (ret) {
353 dev_err(csi2dc->dev,
354 "failed to get remote mbus configuration\n");
355 return 0;
356 }
357
358 dev_dbg(csi2dc->dev, "subdev sending on channel %d\n", csi2dc->vc);
359
360 csi2dc->clk_gated = mbus_config.bus.parallel.flags &
361 V4L2_MBUS_CSI2_NONCONTINUOUS_CLOCK;
362
363 dev_dbg(csi2dc->dev, "mbus_config: %s clock\n",
364 csi2dc->clk_gated ? "gated" : "free running");
365
366 return 0;
367 }
368
csi2dc_vp_update(struct csi2dc_device * csi2dc)369 static void csi2dc_vp_update(struct csi2dc_device *csi2dc)
370 {
371 u32 vp, gcfg;
372
373 if (!csi2dc->video_pipe) {
374 dev_err(csi2dc->dev, "video pipeline unavailable\n");
375 return;
376 }
377
378 if (csi2dc->parallel_mode) {
379 /* In parallel mode, GPIO parallel interface must be selected */
380 gcfg = csi2dc_readl(csi2dc, CSI2DC_GCFG);
381 gcfg |= CSI2DC_GCFG_GPIOSEL;
382 csi2dc_writel(csi2dc, CSI2DC_GCFG, gcfg);
383 return;
384 }
385
386 /* serial video pipeline */
387
388 csi2dc_writel(csi2dc, CSI2DC_GCFG,
389 (SAMA7G5_HLC & CSI2DC_GCFG_HLC_MASK) |
390 (csi2dc->clk_gated ? 0 : CSI2DC_GCFG_MIPIFRN));
391
392 vp = CSI2DC_VPCFG_DT(csi2dc->cur_fmt->dt) & CSI2DC_VPCFG_DT_MASK;
393 vp |= CSI2DC_VPCFG_VC(csi2dc->vc) & CSI2DC_VPCFG_VC_MASK;
394 vp &= ~CSI2DC_VPCFG_DE;
395 vp |= CSI2DC_VPCFG_DM(CSI2DC_VPCFG_DM_DECODER8TO12);
396 vp &= ~CSI2DC_VPCFG_DP2;
397 vp &= ~CSI2DC_VPCFG_RMS;
398 vp |= CSI2DC_VPCFG_PA;
399
400 csi2dc_writel(csi2dc, CSI2DC_VPCFG, vp);
401 csi2dc_writel(csi2dc, CSI2DC_VPE, CSI2DC_VPE_ENABLE);
402 csi2dc_writel(csi2dc, CSI2DC_PU, CSI2DC_PU_VP);
403 }
404
csi2dc_s_stream(struct v4l2_subdev * csi2dc_sd,int enable)405 static int csi2dc_s_stream(struct v4l2_subdev *csi2dc_sd, int enable)
406 {
407 struct csi2dc_device *csi2dc = csi2dc_sd_to_csi2dc_device(csi2dc_sd);
408 int ret;
409
410 if (enable) {
411 ret = pm_runtime_resume_and_get(csi2dc->dev);
412 if (ret < 0)
413 return ret;
414
415 csi2dc_get_mbus_config(csi2dc);
416
417 csi2dc_vp_update(csi2dc);
418
419 return v4l2_subdev_call(csi2dc->input_sd, video, s_stream,
420 true);
421 }
422
423 dev_dbg(csi2dc->dev,
424 "Last frame received: VPCOLR = %u, VPROWR= %u, VPISR = %x\n",
425 csi2dc_readl(csi2dc, CSI2DC_VPCOL),
426 csi2dc_readl(csi2dc, CSI2DC_VPROW),
427 csi2dc_readl(csi2dc, CSI2DC_VPISR));
428
429 /* stop streaming scenario */
430 ret = v4l2_subdev_call(csi2dc->input_sd, video, s_stream, false);
431
432 pm_runtime_put_sync(csi2dc->dev);
433
434 return ret;
435 }
436
csi2dc_init_state(struct v4l2_subdev * csi2dc_sd,struct v4l2_subdev_state * sd_state)437 static int csi2dc_init_state(struct v4l2_subdev *csi2dc_sd,
438 struct v4l2_subdev_state *sd_state)
439 {
440 struct v4l2_mbus_framefmt *v4l2_try_fmt =
441 v4l2_subdev_state_get_format(sd_state, 0);
442
443 v4l2_try_fmt->height = 480;
444 v4l2_try_fmt->width = 640;
445 v4l2_try_fmt->code = csi2dc_formats[0].mbus_code;
446 v4l2_try_fmt->colorspace = V4L2_COLORSPACE_SRGB;
447 v4l2_try_fmt->field = V4L2_FIELD_NONE;
448 v4l2_try_fmt->ycbcr_enc = V4L2_YCBCR_ENC_DEFAULT;
449 v4l2_try_fmt->quantization = V4L2_QUANTIZATION_DEFAULT;
450 v4l2_try_fmt->xfer_func = V4L2_XFER_FUNC_DEFAULT;
451
452 return 0;
453 }
454
455 static const struct media_entity_operations csi2dc_entity_ops = {
456 .link_validate = v4l2_subdev_link_validate,
457 };
458
459 static const struct v4l2_subdev_pad_ops csi2dc_pad_ops = {
460 .enum_mbus_code = csi2dc_enum_mbus_code,
461 .set_fmt = csi2dc_set_fmt,
462 .get_fmt = csi2dc_get_fmt,
463 };
464
465 static const struct v4l2_subdev_video_ops csi2dc_video_ops = {
466 .s_stream = csi2dc_s_stream,
467 };
468
469 static const struct v4l2_subdev_ops csi2dc_subdev_ops = {
470 .pad = &csi2dc_pad_ops,
471 .video = &csi2dc_video_ops,
472 };
473
474 static const struct v4l2_subdev_internal_ops csi2dc_internal_ops = {
475 .init_state = csi2dc_init_state,
476 };
477
csi2dc_async_bound(struct v4l2_async_notifier * notifier,struct v4l2_subdev * subdev,struct v4l2_async_connection * asd)478 static int csi2dc_async_bound(struct v4l2_async_notifier *notifier,
479 struct v4l2_subdev *subdev,
480 struct v4l2_async_connection *asd)
481 {
482 struct csi2dc_device *csi2dc = container_of(notifier,
483 struct csi2dc_device, notifier);
484 int pad;
485 int ret;
486
487 csi2dc->input_sd = subdev;
488
489 pad = media_entity_get_fwnode_pad(&subdev->entity, asd->match.fwnode,
490 MEDIA_PAD_FL_SOURCE);
491 if (pad < 0) {
492 dev_err(csi2dc->dev, "Failed to find pad for %s\n",
493 subdev->name);
494 return pad;
495 }
496
497 csi2dc->remote_pad = pad;
498
499 ret = media_create_pad_link(&csi2dc->input_sd->entity,
500 csi2dc->remote_pad,
501 &csi2dc->csi2dc_sd.entity, 0,
502 MEDIA_LNK_FL_ENABLED);
503 if (ret) {
504 dev_err(csi2dc->dev,
505 "Failed to create pad link: %s to %s\n",
506 csi2dc->input_sd->entity.name,
507 csi2dc->csi2dc_sd.entity.name);
508 return ret;
509 }
510
511 dev_dbg(csi2dc->dev, "link with %s pad: %d\n",
512 csi2dc->input_sd->name, csi2dc->remote_pad);
513
514 return ret;
515 }
516
517 static const struct v4l2_async_notifier_operations csi2dc_async_ops = {
518 .bound = csi2dc_async_bound,
519 };
520
csi2dc_prepare_notifier(struct csi2dc_device * csi2dc,struct fwnode_handle * input_fwnode)521 static int csi2dc_prepare_notifier(struct csi2dc_device *csi2dc,
522 struct fwnode_handle *input_fwnode)
523 {
524 struct v4l2_async_connection *asd;
525 int ret = 0;
526
527 v4l2_async_subdev_nf_init(&csi2dc->notifier, &csi2dc->csi2dc_sd);
528
529 asd = v4l2_async_nf_add_fwnode_remote(&csi2dc->notifier,
530 input_fwnode,
531 struct v4l2_async_connection);
532
533 fwnode_handle_put(input_fwnode);
534
535 if (IS_ERR(asd)) {
536 ret = PTR_ERR(asd);
537 dev_err(csi2dc->dev,
538 "failed to add async notifier for node %pOF: %d\n",
539 to_of_node(input_fwnode), ret);
540 v4l2_async_nf_cleanup(&csi2dc->notifier);
541 return ret;
542 }
543
544 csi2dc->notifier.ops = &csi2dc_async_ops;
545
546 ret = v4l2_async_nf_register(&csi2dc->notifier);
547 if (ret) {
548 dev_err(csi2dc->dev, "fail to register async notifier: %d\n",
549 ret);
550 v4l2_async_nf_cleanup(&csi2dc->notifier);
551 }
552
553 return ret;
554 }
555
csi2dc_of_parse(struct csi2dc_device * csi2dc,struct device_node * of_node)556 static int csi2dc_of_parse(struct csi2dc_device *csi2dc,
557 struct device_node *of_node)
558 {
559 struct fwnode_handle *input_fwnode, *output_fwnode;
560 struct v4l2_fwnode_endpoint input_endpoint = { 0 },
561 output_endpoint = { 0 };
562 int ret;
563
564 input_fwnode = fwnode_graph_get_next_endpoint(of_fwnode_handle(of_node),
565 NULL);
566 if (!input_fwnode) {
567 dev_err(csi2dc->dev,
568 "missing port node at %pOF, input node is mandatory.\n",
569 of_node);
570 return -EINVAL;
571 }
572
573 ret = v4l2_fwnode_endpoint_parse(input_fwnode, &input_endpoint);
574 if (ret) {
575 dev_err(csi2dc->dev, "endpoint not defined at %pOF\n", of_node);
576 goto csi2dc_of_parse_err;
577 }
578
579 if (input_endpoint.bus_type == V4L2_MBUS_PARALLEL ||
580 input_endpoint.bus_type == V4L2_MBUS_BT656) {
581 csi2dc->parallel_mode = true;
582 dev_dbg(csi2dc->dev,
583 "subdevice connected on parallel interface\n");
584 }
585
586 if (input_endpoint.bus_type == V4L2_MBUS_CSI2_DPHY) {
587 csi2dc->clk_gated = input_endpoint.bus.mipi_csi2.flags &
588 V4L2_MBUS_CSI2_NONCONTINUOUS_CLOCK;
589 dev_dbg(csi2dc->dev,
590 "subdevice connected on serial interface\n");
591 dev_dbg(csi2dc->dev, "DT: %s clock\n",
592 csi2dc->clk_gated ? "gated" : "free running");
593 }
594
595 output_fwnode = fwnode_graph_get_next_endpoint
596 (of_fwnode_handle(of_node), input_fwnode);
597
598 if (output_fwnode)
599 ret = v4l2_fwnode_endpoint_parse(output_fwnode,
600 &output_endpoint);
601
602 fwnode_handle_put(output_fwnode);
603
604 if (!output_fwnode || ret) {
605 dev_info(csi2dc->dev,
606 "missing output node at %pOF, data pipe available only.\n",
607 of_node);
608 } else {
609 if (output_endpoint.bus_type != V4L2_MBUS_PARALLEL &&
610 output_endpoint.bus_type != V4L2_MBUS_BT656) {
611 dev_err(csi2dc->dev,
612 "output port must be parallel/bt656.\n");
613 ret = -EINVAL;
614 goto csi2dc_of_parse_err;
615 }
616
617 csi2dc->video_pipe = true;
618
619 dev_dbg(csi2dc->dev,
620 "block %pOF [%d.%d]->[%d.%d] video pipeline\n",
621 of_node, input_endpoint.base.port,
622 input_endpoint.base.id, output_endpoint.base.port,
623 output_endpoint.base.id);
624 }
625
626 /* prepare async notifier for subdevice completion */
627 return csi2dc_prepare_notifier(csi2dc, input_fwnode);
628
629 csi2dc_of_parse_err:
630 fwnode_handle_put(input_fwnode);
631 return ret;
632 }
633
csi2dc_default_format(struct csi2dc_device * csi2dc)634 static void csi2dc_default_format(struct csi2dc_device *csi2dc)
635 {
636 csi2dc->cur_fmt = &csi2dc_formats[0];
637
638 csi2dc->format.height = 480;
639 csi2dc->format.width = 640;
640 csi2dc->format.code = csi2dc_formats[0].mbus_code;
641 csi2dc->format.colorspace = V4L2_COLORSPACE_SRGB;
642 csi2dc->format.field = V4L2_FIELD_NONE;
643 csi2dc->format.ycbcr_enc = V4L2_YCBCR_ENC_DEFAULT;
644 csi2dc->format.quantization = V4L2_QUANTIZATION_DEFAULT;
645 csi2dc->format.xfer_func = V4L2_XFER_FUNC_DEFAULT;
646 }
647
csi2dc_probe(struct platform_device * pdev)648 static int csi2dc_probe(struct platform_device *pdev)
649 {
650 struct device *dev = &pdev->dev;
651 struct csi2dc_device *csi2dc;
652 int ret = 0;
653 u32 ver;
654
655 csi2dc = devm_kzalloc(dev, sizeof(*csi2dc), GFP_KERNEL);
656 if (!csi2dc)
657 return -ENOMEM;
658
659 csi2dc->dev = dev;
660
661 csi2dc->base = devm_platform_ioremap_resource(pdev, 0);
662 if (IS_ERR(csi2dc->base)) {
663 dev_err(dev, "base address not set\n");
664 return PTR_ERR(csi2dc->base);
665 }
666
667 csi2dc->pclk = devm_clk_get(dev, "pclk");
668 if (IS_ERR(csi2dc->pclk)) {
669 ret = PTR_ERR(csi2dc->pclk);
670 dev_err(dev, "failed to get pclk: %d\n", ret);
671 return ret;
672 }
673
674 csi2dc->scck = devm_clk_get(dev, "scck");
675 if (IS_ERR(csi2dc->scck)) {
676 ret = PTR_ERR(csi2dc->scck);
677 dev_err(dev, "failed to get scck: %d\n", ret);
678 return ret;
679 }
680
681 v4l2_subdev_init(&csi2dc->csi2dc_sd, &csi2dc_subdev_ops);
682 csi2dc->csi2dc_sd.internal_ops = &csi2dc_internal_ops;
683
684 csi2dc->csi2dc_sd.owner = THIS_MODULE;
685 csi2dc->csi2dc_sd.dev = dev;
686 snprintf(csi2dc->csi2dc_sd.name, sizeof(csi2dc->csi2dc_sd.name),
687 "csi2dc");
688
689 csi2dc->csi2dc_sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
690 csi2dc->csi2dc_sd.entity.function = MEDIA_ENT_F_VID_IF_BRIDGE;
691 csi2dc->csi2dc_sd.entity.ops = &csi2dc_entity_ops;
692
693 platform_set_drvdata(pdev, csi2dc);
694
695 ret = csi2dc_of_parse(csi2dc, dev->of_node);
696 if (ret)
697 goto csi2dc_probe_cleanup_entity;
698
699 csi2dc->pads[CSI2DC_PAD_SINK].flags = MEDIA_PAD_FL_SINK;
700 if (csi2dc->video_pipe)
701 csi2dc->pads[CSI2DC_PAD_SOURCE].flags = MEDIA_PAD_FL_SOURCE;
702
703 ret = media_entity_pads_init(&csi2dc->csi2dc_sd.entity,
704 csi2dc->video_pipe ? CSI2DC_PADS_NUM : 1,
705 csi2dc->pads);
706 if (ret < 0) {
707 dev_err(dev, "media entity init failed\n");
708 goto csi2dc_probe_cleanup_notifier;
709 }
710
711 csi2dc_default_format(csi2dc);
712
713 /* turn power on to validate capabilities */
714 ret = csi2dc_power(csi2dc, true);
715 if (ret < 0)
716 goto csi2dc_probe_cleanup_notifier;
717
718 pm_runtime_set_active(dev);
719 pm_runtime_enable(dev);
720 ver = csi2dc_readl(csi2dc, CSI2DC_VERSION);
721
722 /*
723 * we must register the subdev after PM runtime has been requested,
724 * otherwise we might bound immediately and request pm_runtime_resume
725 * before runtime_enable.
726 */
727 ret = v4l2_async_register_subdev(&csi2dc->csi2dc_sd);
728 if (ret) {
729 dev_err(csi2dc->dev, "failed to register the subdevice\n");
730 goto csi2dc_probe_cleanup_notifier;
731 }
732
733 dev_info(dev, "Microchip CSI2DC version %x\n", ver);
734
735 return 0;
736
737 csi2dc_probe_cleanup_notifier:
738 v4l2_async_nf_cleanup(&csi2dc->notifier);
739 csi2dc_probe_cleanup_entity:
740 media_entity_cleanup(&csi2dc->csi2dc_sd.entity);
741
742 return ret;
743 }
744
csi2dc_remove(struct platform_device * pdev)745 static void csi2dc_remove(struct platform_device *pdev)
746 {
747 struct csi2dc_device *csi2dc = platform_get_drvdata(pdev);
748
749 pm_runtime_disable(&pdev->dev);
750
751 v4l2_async_unregister_subdev(&csi2dc->csi2dc_sd);
752 v4l2_async_nf_unregister(&csi2dc->notifier);
753 v4l2_async_nf_cleanup(&csi2dc->notifier);
754 media_entity_cleanup(&csi2dc->csi2dc_sd.entity);
755 }
756
csi2dc_runtime_suspend(struct device * dev)757 static int __maybe_unused csi2dc_runtime_suspend(struct device *dev)
758 {
759 struct csi2dc_device *csi2dc = dev_get_drvdata(dev);
760
761 return csi2dc_power(csi2dc, false);
762 }
763
csi2dc_runtime_resume(struct device * dev)764 static int __maybe_unused csi2dc_runtime_resume(struct device *dev)
765 {
766 struct csi2dc_device *csi2dc = dev_get_drvdata(dev);
767
768 return csi2dc_power(csi2dc, true);
769 }
770
771 static const struct dev_pm_ops csi2dc_dev_pm_ops = {
772 SET_RUNTIME_PM_OPS(csi2dc_runtime_suspend, csi2dc_runtime_resume, NULL)
773 };
774
775 static const struct of_device_id csi2dc_of_match[] = {
776 { .compatible = "microchip,sama7g5-csi2dc" },
777 { }
778 };
779
780 MODULE_DEVICE_TABLE(of, csi2dc_of_match);
781
782 static struct platform_driver csi2dc_driver = {
783 .probe = csi2dc_probe,
784 .remove = csi2dc_remove,
785 .driver = {
786 .name = "microchip-csi2dc",
787 .pm = &csi2dc_dev_pm_ops,
788 .of_match_table = of_match_ptr(csi2dc_of_match),
789 },
790 };
791
792 module_platform_driver(csi2dc_driver);
793
794 MODULE_AUTHOR("Eugen Hristev <eugen.hristev@microchip.com>");
795 MODULE_DESCRIPTION("Microchip CSI2 Demux Controller driver");
796 MODULE_LICENSE("GPL v2");
797