xref: /linux/sound/soc/codecs/cs47l15.c (revision 2aa680df68062e4e0c356ec2aa7100c13654907b)
1 // SPDX-License-Identifier: GPL-2.0-only
2 //
3 // ALSA SoC Audio driver for CS47L15 codec
4 //
5 // Copyright (C) 2016-2019 Cirrus Logic, Inc. and
6 //                         Cirrus Logic International Semiconductor Ltd.
7 //
8 
9 #include <linux/module.h>
10 #include <linux/moduleparam.h>
11 #include <linux/device.h>
12 #include <linux/delay.h>
13 #include <linux/init.h>
14 #include <linux/pm.h>
15 #include <linux/pm_runtime.h>
16 #include <linux/regmap.h>
17 #include <sound/core.h>
18 #include <sound/pcm.h>
19 #include <sound/pcm_params.h>
20 #include <sound/soc.h>
21 #include <sound/tlv.h>
22 
23 #include <linux/irqchip/irq-madera.h>
24 #include <linux/mfd/madera/core.h>
25 #include <linux/mfd/madera/registers.h>
26 
27 #include "madera.h"
28 #include "wm_adsp.h"
29 
30 #define CS47L15_NUM_ADSP 1
31 #define CS47L15_MONO_OUTPUTS 1
32 
33 /* Mid-mode registers */
34 #define CS47L15_ADC_INT_BIAS_MASK	0x3800
35 #define CS47L15_ADC_INT_BIAS_SHIFT	11
36 #define CS47L15_PGA_BIAS_SEL_MASK	0x03
37 #define CS47L15_PGA_BIAS_SEL_SHIFT	0
38 
39 #define DRV_NAME "cs47l15-codec"
40 
41 struct cs47l15 {
42 	struct madera_priv core;
43 	struct madera_fll fll[2];
44 
45 	bool in1_lp_mode;
46 };
47 
48 static const struct cs_dsp_region cs47l15_dsp1_regions[] = {
49 	{ .type = WMFW_ADSP2_PM, .base = 0x080000 },
50 	{ .type = WMFW_ADSP2_ZM, .base = 0x0e0000 },
51 	{ .type = WMFW_ADSP2_XM, .base = 0x0a0000 },
52 	{ .type = WMFW_ADSP2_YM, .base = 0x0c0000 },
53 };
54 
55 static const char * const cs47l15_outdemux_texts[] = {
56 	"HPOUT",
57 	"EPOUT",
58 };
59 
60 static SOC_ENUM_SINGLE_DECL(cs47l15_outdemux_enum, SND_SOC_NOPM, 0,
61 			    cs47l15_outdemux_texts);
62 
63 static const struct snd_kcontrol_new cs47l15_outdemux =
64 	SOC_DAPM_ENUM_EXT("HPOUT1 Demux", cs47l15_outdemux_enum,
65 			  madera_out1_demux_get, madera_out1_demux_put);
66 
67 static int cs47l15_adsp_power_ev(struct snd_soc_dapm_widget *w,
68 				 struct snd_kcontrol *kcontrol,
69 				 int event)
70 {
71 	struct snd_soc_component *component =
72 		snd_soc_dapm_to_component(w->dapm);
73 	struct cs47l15 *cs47l15 = snd_soc_component_get_drvdata(component);
74 	struct madera_priv *priv = &cs47l15->core;
75 	struct madera *madera = priv->madera;
76 	unsigned int freq;
77 	int ret;
78 
79 	ret = regmap_read(madera->regmap, MADERA_DSP_CLOCK_2, &freq);
80 	if (ret != 0) {
81 		dev_err(madera->dev,
82 			"Failed to read MADERA_DSP_CLOCK_2: %d\n", ret);
83 		return ret;
84 	}
85 
86 	switch (event) {
87 	case SND_SOC_DAPM_PRE_PMU:
88 		ret = madera_set_adsp_clk(&cs47l15->core, w->shift, freq);
89 		if (ret)
90 			return ret;
91 		break;
92 	default:
93 		break;
94 	}
95 
96 	return wm_adsp_early_event(w, kcontrol, event);
97 }
98 
99 #define CS47L15_NG_SRC(name, base) \
100 	SOC_SINGLE(name " NG HPOUT1L Switch",  base,  0, 1, 0), \
101 	SOC_SINGLE(name " NG HPOUT1R Switch",  base,  1, 1, 0), \
102 	SOC_SINGLE(name " NG SPKOUTL Switch",  base,  6, 1, 0), \
103 	SOC_SINGLE(name " NG SPKDAT1L Switch", base,  8, 1, 0), \
104 	SOC_SINGLE(name " NG SPKDAT1R Switch", base,  9, 1, 0)
105 
106 static int cs47l15_in1_adc_get(struct snd_kcontrol *kcontrol,
107 			       struct snd_ctl_elem_value *ucontrol)
108 {
109 	struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
110 	struct cs47l15 *cs47l15 = snd_soc_component_get_drvdata(component);
111 
112 	ucontrol->value.integer.value[0] = !!cs47l15->in1_lp_mode;
113 
114 	return 0;
115 }
116 
117 static int cs47l15_in1_adc_put(struct snd_kcontrol *kcontrol,
118 			       struct snd_ctl_elem_value *ucontrol)
119 {
120 	struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
121 	struct cs47l15 *cs47l15 = snd_soc_component_get_drvdata(component);
122 
123 	if (!!ucontrol->value.integer.value[0] == cs47l15->in1_lp_mode)
124 		return 0;
125 
126 	switch (ucontrol->value.integer.value[0]) {
127 	case 0:
128 		/* Set IN1 to normal mode */
129 		snd_soc_component_update_bits(component, MADERA_DMIC1L_CONTROL,
130 					      MADERA_IN1_OSR_MASK,
131 					      5 << MADERA_IN1_OSR_SHIFT);
132 		snd_soc_component_update_bits(component, CS47L15_ADC_INT_BIAS,
133 					      CS47L15_ADC_INT_BIAS_MASK,
134 					      4 << CS47L15_ADC_INT_BIAS_SHIFT);
135 		snd_soc_component_update_bits(component, CS47L15_PGA_BIAS_SEL,
136 					      CS47L15_PGA_BIAS_SEL_MASK, 0);
137 		cs47l15->in1_lp_mode = false;
138 		break;
139 	default:
140 		/* Set IN1 to LP mode */
141 		snd_soc_component_update_bits(component, MADERA_DMIC1L_CONTROL,
142 					      MADERA_IN1_OSR_MASK,
143 					      4 << MADERA_IN1_OSR_SHIFT);
144 		snd_soc_component_update_bits(component, CS47L15_ADC_INT_BIAS,
145 					      CS47L15_ADC_INT_BIAS_MASK,
146 					      1 << CS47L15_ADC_INT_BIAS_SHIFT);
147 		snd_soc_component_update_bits(component, CS47L15_PGA_BIAS_SEL,
148 					      CS47L15_PGA_BIAS_SEL_MASK,
149 					      3 << CS47L15_PGA_BIAS_SEL_SHIFT);
150 		cs47l15->in1_lp_mode = true;
151 		break;
152 	}
153 
154 	return 1;
155 }
156 
157 static const struct snd_kcontrol_new cs47l15_snd_controls[] = {
158 SOC_ENUM("IN1 OSR", madera_in_dmic_osr[0]),
159 SOC_ENUM("IN2 OSR", madera_in_dmic_osr[1]),
160 
161 SOC_SINGLE_RANGE_TLV("IN1L Volume", MADERA_IN1L_CONTROL,
162 		     MADERA_IN1L_PGA_VOL_SHIFT, 0x40, 0x5f, 0, madera_ana_tlv),
163 SOC_SINGLE_RANGE_TLV("IN1R Volume", MADERA_IN1R_CONTROL,
164 		     MADERA_IN1R_PGA_VOL_SHIFT, 0x40, 0x5f, 0, madera_ana_tlv),
165 
166 SOC_ENUM("IN HPF Cutoff Frequency", madera_in_hpf_cut_enum),
167 
168 SOC_SINGLE("IN1L HPF Switch", MADERA_IN1L_CONTROL, MADERA_IN1L_HPF_SHIFT, 1, 0),
169 SOC_SINGLE("IN1R HPF Switch", MADERA_IN1R_CONTROL, MADERA_IN1R_HPF_SHIFT, 1, 0),
170 SOC_SINGLE("IN2L HPF Switch", MADERA_IN2L_CONTROL, MADERA_IN2L_HPF_SHIFT, 1, 0),
171 SOC_SINGLE("IN2R HPF Switch", MADERA_IN2R_CONTROL, MADERA_IN2R_HPF_SHIFT, 1, 0),
172 
173 SOC_SINGLE_TLV("IN1L Digital Volume", MADERA_ADC_DIGITAL_VOLUME_1L,
174 	       MADERA_IN1L_DIG_VOL_SHIFT, 0xbf, 0, madera_digital_tlv),
175 SOC_SINGLE_TLV("IN1R Digital Volume", MADERA_ADC_DIGITAL_VOLUME_1R,
176 	       MADERA_IN1R_DIG_VOL_SHIFT, 0xbf, 0, madera_digital_tlv),
177 SOC_SINGLE_TLV("IN2L Digital Volume", MADERA_ADC_DIGITAL_VOLUME_2L,
178 	       MADERA_IN2L_DIG_VOL_SHIFT, 0xbf, 0, madera_digital_tlv),
179 SOC_SINGLE_TLV("IN2R Digital Volume", MADERA_ADC_DIGITAL_VOLUME_2R,
180 	       MADERA_IN2R_DIG_VOL_SHIFT, 0xbf, 0, madera_digital_tlv),
181 
182 SOC_ENUM("Input Ramp Up", madera_in_vi_ramp),
183 SOC_ENUM("Input Ramp Down", madera_in_vd_ramp),
184 
185 MADERA_MIXER_CONTROLS("EQ1", MADERA_EQ1MIX_INPUT_1_SOURCE),
186 MADERA_MIXER_CONTROLS("EQ2", MADERA_EQ2MIX_INPUT_1_SOURCE),
187 MADERA_MIXER_CONTROLS("EQ3", MADERA_EQ3MIX_INPUT_1_SOURCE),
188 MADERA_MIXER_CONTROLS("EQ4", MADERA_EQ4MIX_INPUT_1_SOURCE),
189 
190 MADERA_EQ_CONTROL("EQ1 Coefficients", MADERA_EQ1_2),
191 SOC_SINGLE_TLV("EQ1 B1 Volume", MADERA_EQ1_1, MADERA_EQ1_B1_GAIN_SHIFT,
192 	       24, 0, madera_eq_tlv),
193 SOC_SINGLE_TLV("EQ1 B2 Volume", MADERA_EQ1_1, MADERA_EQ1_B2_GAIN_SHIFT,
194 	       24, 0, madera_eq_tlv),
195 SOC_SINGLE_TLV("EQ1 B3 Volume", MADERA_EQ1_1, MADERA_EQ1_B3_GAIN_SHIFT,
196 	       24, 0, madera_eq_tlv),
197 SOC_SINGLE_TLV("EQ1 B4 Volume", MADERA_EQ1_2, MADERA_EQ1_B4_GAIN_SHIFT,
198 	       24, 0, madera_eq_tlv),
199 SOC_SINGLE_TLV("EQ1 B5 Volume", MADERA_EQ1_2, MADERA_EQ1_B5_GAIN_SHIFT,
200 	       24, 0, madera_eq_tlv),
201 
202 MADERA_EQ_CONTROL("EQ2 Coefficients", MADERA_EQ2_2),
203 SOC_SINGLE_TLV("EQ2 B1 Volume", MADERA_EQ2_1, MADERA_EQ2_B1_GAIN_SHIFT,
204 	       24, 0, madera_eq_tlv),
205 SOC_SINGLE_TLV("EQ2 B2 Volume", MADERA_EQ2_1, MADERA_EQ2_B2_GAIN_SHIFT,
206 	       24, 0, madera_eq_tlv),
207 SOC_SINGLE_TLV("EQ2 B3 Volume", MADERA_EQ2_1, MADERA_EQ2_B3_GAIN_SHIFT,
208 	       24, 0, madera_eq_tlv),
209 SOC_SINGLE_TLV("EQ2 B4 Volume", MADERA_EQ2_2, MADERA_EQ2_B4_GAIN_SHIFT,
210 	       24, 0, madera_eq_tlv),
211 SOC_SINGLE_TLV("EQ2 B5 Volume", MADERA_EQ2_2, MADERA_EQ2_B5_GAIN_SHIFT,
212 	       24, 0, madera_eq_tlv),
213 
214 MADERA_EQ_CONTROL("EQ3 Coefficients", MADERA_EQ3_2),
215 SOC_SINGLE_TLV("EQ3 B1 Volume", MADERA_EQ3_1, MADERA_EQ3_B1_GAIN_SHIFT,
216 	       24, 0, madera_eq_tlv),
217 SOC_SINGLE_TLV("EQ3 B2 Volume", MADERA_EQ3_1, MADERA_EQ3_B2_GAIN_SHIFT,
218 	       24, 0, madera_eq_tlv),
219 SOC_SINGLE_TLV("EQ3 B3 Volume", MADERA_EQ3_1, MADERA_EQ3_B3_GAIN_SHIFT,
220 	       24, 0, madera_eq_tlv),
221 SOC_SINGLE_TLV("EQ3 B4 Volume", MADERA_EQ3_2, MADERA_EQ3_B4_GAIN_SHIFT,
222 	       24, 0, madera_eq_tlv),
223 SOC_SINGLE_TLV("EQ3 B5 Volume", MADERA_EQ3_2, MADERA_EQ3_B5_GAIN_SHIFT,
224 	       24, 0, madera_eq_tlv),
225 
226 MADERA_EQ_CONTROL("EQ4 Coefficients", MADERA_EQ4_2),
227 SOC_SINGLE_TLV("EQ4 B1 Volume", MADERA_EQ4_1, MADERA_EQ4_B1_GAIN_SHIFT,
228 	       24, 0, madera_eq_tlv),
229 SOC_SINGLE_TLV("EQ4 B2 Volume", MADERA_EQ4_1, MADERA_EQ4_B2_GAIN_SHIFT,
230 	       24, 0, madera_eq_tlv),
231 SOC_SINGLE_TLV("EQ4 B3 Volume", MADERA_EQ4_1, MADERA_EQ4_B3_GAIN_SHIFT,
232 	       24, 0, madera_eq_tlv),
233 SOC_SINGLE_TLV("EQ4 B4 Volume", MADERA_EQ4_2, MADERA_EQ4_B4_GAIN_SHIFT,
234 	       24, 0, madera_eq_tlv),
235 SOC_SINGLE_TLV("EQ4 B5 Volume", MADERA_EQ4_2, MADERA_EQ4_B5_GAIN_SHIFT,
236 	       24, 0, madera_eq_tlv),
237 
238 MADERA_MIXER_CONTROLS("DRC1L", MADERA_DRC1LMIX_INPUT_1_SOURCE),
239 MADERA_MIXER_CONTROLS("DRC1R", MADERA_DRC1RMIX_INPUT_1_SOURCE),
240 MADERA_MIXER_CONTROLS("DRC2L", MADERA_DRC2LMIX_INPUT_1_SOURCE),
241 MADERA_MIXER_CONTROLS("DRC2R", MADERA_DRC2RMIX_INPUT_1_SOURCE),
242 
243 SND_SOC_BYTES_MASK("DRC1", MADERA_DRC1_CTRL1, 5,
244 		   MADERA_DRC1R_ENA | MADERA_DRC1L_ENA),
245 SND_SOC_BYTES_MASK("DRC2", MADERA_DRC2_CTRL1, 5,
246 		   MADERA_DRC2R_ENA | MADERA_DRC2L_ENA),
247 
248 MADERA_MIXER_CONTROLS("LHPF1", MADERA_HPLP1MIX_INPUT_1_SOURCE),
249 MADERA_MIXER_CONTROLS("LHPF2", MADERA_HPLP2MIX_INPUT_1_SOURCE),
250 MADERA_MIXER_CONTROLS("LHPF3", MADERA_HPLP3MIX_INPUT_1_SOURCE),
251 MADERA_MIXER_CONTROLS("LHPF4", MADERA_HPLP4MIX_INPUT_1_SOURCE),
252 
253 MADERA_LHPF_CONTROL("LHPF1 Coefficients", MADERA_HPLPF1_2),
254 MADERA_LHPF_CONTROL("LHPF2 Coefficients", MADERA_HPLPF2_2),
255 MADERA_LHPF_CONTROL("LHPF3 Coefficients", MADERA_HPLPF3_2),
256 MADERA_LHPF_CONTROL("LHPF4 Coefficients", MADERA_HPLPF4_2),
257 
258 SOC_ENUM("LHPF1 Mode", madera_lhpf1_mode),
259 SOC_ENUM("LHPF2 Mode", madera_lhpf2_mode),
260 SOC_ENUM("LHPF3 Mode", madera_lhpf3_mode),
261 SOC_ENUM("LHPF4 Mode", madera_lhpf4_mode),
262 
263 MADERA_RATE_ENUM("ISRC1 FSL", madera_isrc_fsl[0]),
264 MADERA_RATE_ENUM("ISRC2 FSL", madera_isrc_fsl[1]),
265 MADERA_RATE_ENUM("ISRC1 FSH", madera_isrc_fsh[0]),
266 MADERA_RATE_ENUM("ISRC2 FSH", madera_isrc_fsh[1]),
267 
268 WM_ADSP2_PRELOAD_SWITCH("DSP1", 1),
269 
270 MADERA_MIXER_CONTROLS("DSP1L", MADERA_DSP1LMIX_INPUT_1_SOURCE),
271 MADERA_MIXER_CONTROLS("DSP1R", MADERA_DSP1RMIX_INPUT_1_SOURCE),
272 
273 SOC_SINGLE_TLV("Noise Generator Volume", MADERA_COMFORT_NOISE_GENERATOR,
274 	       MADERA_NOISE_GEN_GAIN_SHIFT, 0x16, 0, madera_noise_tlv),
275 
276 MADERA_MIXER_CONTROLS("HPOUT1L", MADERA_OUT1LMIX_INPUT_1_SOURCE),
277 MADERA_MIXER_CONTROLS("HPOUT1R", MADERA_OUT1RMIX_INPUT_1_SOURCE),
278 MADERA_MIXER_CONTROLS("SPKOUTL", MADERA_OUT4LMIX_INPUT_1_SOURCE),
279 MADERA_MIXER_CONTROLS("SPKDAT1L", MADERA_OUT5LMIX_INPUT_1_SOURCE),
280 MADERA_MIXER_CONTROLS("SPKDAT1R", MADERA_OUT5RMIX_INPUT_1_SOURCE),
281 
282 SOC_SINGLE("HPOUT1 SC Protect Switch", MADERA_HP1_SHORT_CIRCUIT_CTRL,
283 	   MADERA_HP1_SC_ENA_SHIFT, 1, 0),
284 
285 SOC_SINGLE("SPKDAT1 High Performance Switch", MADERA_OUTPUT_PATH_CONFIG_5L,
286 	   MADERA_OUT5_OSR_SHIFT, 1, 0),
287 
288 SOC_DOUBLE_R("HPOUT1 Digital Switch", MADERA_DAC_DIGITAL_VOLUME_1L,
289 	     MADERA_DAC_DIGITAL_VOLUME_1R, MADERA_OUT1L_MUTE_SHIFT, 1, 1),
290 SOC_SINGLE("Speaker Digital Switch", MADERA_DAC_DIGITAL_VOLUME_4L,
291 	   MADERA_OUT4L_MUTE_SHIFT, 1, 1),
292 SOC_DOUBLE_R("SPKDAT1 Digital Switch", MADERA_DAC_DIGITAL_VOLUME_5L,
293 	     MADERA_DAC_DIGITAL_VOLUME_5R, MADERA_OUT5L_MUTE_SHIFT, 1, 1),
294 
295 SOC_DOUBLE_R_TLV("HPOUT1 Digital Volume", MADERA_DAC_DIGITAL_VOLUME_1L,
296 		 MADERA_DAC_DIGITAL_VOLUME_1R, MADERA_OUT1L_VOL_SHIFT,
297 		 0xbf, 0, madera_digital_tlv),
298 SOC_SINGLE_TLV("Speaker Digital Volume", MADERA_DAC_DIGITAL_VOLUME_4L,
299 	       MADERA_OUT4L_VOL_SHIFT, 0xbf, 0, madera_digital_tlv),
300 SOC_DOUBLE_R_TLV("SPKDAT1 Digital Volume", MADERA_DAC_DIGITAL_VOLUME_5L,
301 		 MADERA_DAC_DIGITAL_VOLUME_5R, MADERA_OUT5L_VOL_SHIFT,
302 		 0xbf, 0, madera_digital_tlv),
303 
304 SOC_DOUBLE("SPKDAT1 Switch", MADERA_PDM_SPK1_CTRL_1, MADERA_SPK1L_MUTE_SHIFT,
305 	   MADERA_SPK1R_MUTE_SHIFT, 1, 1),
306 
307 SOC_ENUM("Output Ramp Up", madera_out_vi_ramp),
308 SOC_ENUM("Output Ramp Down", madera_out_vd_ramp),
309 
310 SOC_SINGLE("Noise Gate Switch", MADERA_NOISE_GATE_CONTROL,
311 	   MADERA_NGATE_ENA_SHIFT, 1, 0),
312 SOC_SINGLE_TLV("Noise Gate Threshold Volume", MADERA_NOISE_GATE_CONTROL,
313 	       MADERA_NGATE_THR_SHIFT, 7, 1, madera_ng_tlv),
314 SOC_ENUM("Noise Gate Hold", madera_ng_hold),
315 
316 SOC_SINGLE_BOOL_EXT("IN1 LP Mode Switch", 0,
317 		    cs47l15_in1_adc_get, cs47l15_in1_adc_put),
318 
319 CS47L15_NG_SRC("HPOUT1L", MADERA_NOISE_GATE_SELECT_1L),
320 CS47L15_NG_SRC("HPOUT1R", MADERA_NOISE_GATE_SELECT_1R),
321 CS47L15_NG_SRC("SPKOUTL", MADERA_NOISE_GATE_SELECT_4L),
322 CS47L15_NG_SRC("SPKDAT1L", MADERA_NOISE_GATE_SELECT_5L),
323 CS47L15_NG_SRC("SPKDAT1R", MADERA_NOISE_GATE_SELECT_5R),
324 
325 MADERA_MIXER_CONTROLS("AIF1TX1", MADERA_AIF1TX1MIX_INPUT_1_SOURCE),
326 MADERA_MIXER_CONTROLS("AIF1TX2", MADERA_AIF1TX2MIX_INPUT_1_SOURCE),
327 MADERA_MIXER_CONTROLS("AIF1TX3", MADERA_AIF1TX3MIX_INPUT_1_SOURCE),
328 MADERA_MIXER_CONTROLS("AIF1TX4", MADERA_AIF1TX4MIX_INPUT_1_SOURCE),
329 MADERA_MIXER_CONTROLS("AIF1TX5", MADERA_AIF1TX5MIX_INPUT_1_SOURCE),
330 MADERA_MIXER_CONTROLS("AIF1TX6", MADERA_AIF1TX6MIX_INPUT_1_SOURCE),
331 
332 MADERA_MIXER_CONTROLS("AIF2TX1", MADERA_AIF2TX1MIX_INPUT_1_SOURCE),
333 MADERA_MIXER_CONTROLS("AIF2TX2", MADERA_AIF2TX2MIX_INPUT_1_SOURCE),
334 MADERA_MIXER_CONTROLS("AIF2TX3", MADERA_AIF2TX3MIX_INPUT_1_SOURCE),
335 MADERA_MIXER_CONTROLS("AIF2TX4", MADERA_AIF2TX4MIX_INPUT_1_SOURCE),
336 
337 MADERA_MIXER_CONTROLS("AIF3TX1", MADERA_AIF3TX1MIX_INPUT_1_SOURCE),
338 MADERA_MIXER_CONTROLS("AIF3TX2", MADERA_AIF3TX2MIX_INPUT_1_SOURCE),
339 
340 MADERA_GAINMUX_CONTROLS("SPDIF1TX1", MADERA_SPDIF1TX1MIX_INPUT_1_SOURCE),
341 MADERA_GAINMUX_CONTROLS("SPDIF1TX2", MADERA_SPDIF1TX2MIX_INPUT_1_SOURCE),
342 
343 WM_ADSP_FW_CONTROL("DSP1", 0),
344 };
345 
346 MADERA_MIXER_ENUMS(EQ1, MADERA_EQ1MIX_INPUT_1_SOURCE);
347 MADERA_MIXER_ENUMS(EQ2, MADERA_EQ2MIX_INPUT_1_SOURCE);
348 MADERA_MIXER_ENUMS(EQ3, MADERA_EQ3MIX_INPUT_1_SOURCE);
349 MADERA_MIXER_ENUMS(EQ4, MADERA_EQ4MIX_INPUT_1_SOURCE);
350 
351 MADERA_MIXER_ENUMS(DRC1L, MADERA_DRC1LMIX_INPUT_1_SOURCE);
352 MADERA_MIXER_ENUMS(DRC1R, MADERA_DRC1RMIX_INPUT_1_SOURCE);
353 MADERA_MIXER_ENUMS(DRC2L, MADERA_DRC2LMIX_INPUT_1_SOURCE);
354 MADERA_MIXER_ENUMS(DRC2R, MADERA_DRC2RMIX_INPUT_1_SOURCE);
355 
356 MADERA_MIXER_ENUMS(LHPF1, MADERA_HPLP1MIX_INPUT_1_SOURCE);
357 MADERA_MIXER_ENUMS(LHPF2, MADERA_HPLP2MIX_INPUT_1_SOURCE);
358 MADERA_MIXER_ENUMS(LHPF3, MADERA_HPLP3MIX_INPUT_1_SOURCE);
359 MADERA_MIXER_ENUMS(LHPF4, MADERA_HPLP4MIX_INPUT_1_SOURCE);
360 
361 MADERA_MIXER_ENUMS(DSP1L, MADERA_DSP1LMIX_INPUT_1_SOURCE);
362 MADERA_MIXER_ENUMS(DSP1R, MADERA_DSP1RMIX_INPUT_1_SOURCE);
363 MADERA_DSP_AUX_ENUMS(DSP1, MADERA_DSP1AUX1MIX_INPUT_1_SOURCE);
364 
365 MADERA_MIXER_ENUMS(PWM1, MADERA_PWM1MIX_INPUT_1_SOURCE);
366 MADERA_MIXER_ENUMS(PWM2, MADERA_PWM2MIX_INPUT_1_SOURCE);
367 
368 MADERA_MIXER_ENUMS(OUT1L, MADERA_OUT1LMIX_INPUT_1_SOURCE);
369 MADERA_MIXER_ENUMS(OUT1R, MADERA_OUT1RMIX_INPUT_1_SOURCE);
370 MADERA_MIXER_ENUMS(SPKOUTL, MADERA_OUT4LMIX_INPUT_1_SOURCE);
371 MADERA_MIXER_ENUMS(SPKDAT1L, MADERA_OUT5LMIX_INPUT_1_SOURCE);
372 MADERA_MIXER_ENUMS(SPKDAT1R, MADERA_OUT5RMIX_INPUT_1_SOURCE);
373 
374 MADERA_MIXER_ENUMS(AIF1TX1, MADERA_AIF1TX1MIX_INPUT_1_SOURCE);
375 MADERA_MIXER_ENUMS(AIF1TX2, MADERA_AIF1TX2MIX_INPUT_1_SOURCE);
376 MADERA_MIXER_ENUMS(AIF1TX3, MADERA_AIF1TX3MIX_INPUT_1_SOURCE);
377 MADERA_MIXER_ENUMS(AIF1TX4, MADERA_AIF1TX4MIX_INPUT_1_SOURCE);
378 MADERA_MIXER_ENUMS(AIF1TX5, MADERA_AIF1TX5MIX_INPUT_1_SOURCE);
379 MADERA_MIXER_ENUMS(AIF1TX6, MADERA_AIF1TX6MIX_INPUT_1_SOURCE);
380 
381 MADERA_MIXER_ENUMS(AIF2TX1, MADERA_AIF2TX1MIX_INPUT_1_SOURCE);
382 MADERA_MIXER_ENUMS(AIF2TX2, MADERA_AIF2TX2MIX_INPUT_1_SOURCE);
383 MADERA_MIXER_ENUMS(AIF2TX3, MADERA_AIF2TX3MIX_INPUT_1_SOURCE);
384 MADERA_MIXER_ENUMS(AIF2TX4, MADERA_AIF2TX4MIX_INPUT_1_SOURCE);
385 
386 MADERA_MIXER_ENUMS(AIF3TX1, MADERA_AIF3TX1MIX_INPUT_1_SOURCE);
387 MADERA_MIXER_ENUMS(AIF3TX2, MADERA_AIF3TX2MIX_INPUT_1_SOURCE);
388 
389 MADERA_MUX_ENUMS(SPD1TX1, MADERA_SPDIF1TX1MIX_INPUT_1_SOURCE);
390 MADERA_MUX_ENUMS(SPD1TX2, MADERA_SPDIF1TX2MIX_INPUT_1_SOURCE);
391 
392 MADERA_MUX_ENUMS(ISRC1INT1, MADERA_ISRC1INT1MIX_INPUT_1_SOURCE);
393 MADERA_MUX_ENUMS(ISRC1INT2, MADERA_ISRC1INT2MIX_INPUT_1_SOURCE);
394 MADERA_MUX_ENUMS(ISRC1INT3, MADERA_ISRC1INT3MIX_INPUT_1_SOURCE);
395 MADERA_MUX_ENUMS(ISRC1INT4, MADERA_ISRC1INT4MIX_INPUT_1_SOURCE);
396 
397 MADERA_MUX_ENUMS(ISRC1DEC1, MADERA_ISRC1DEC1MIX_INPUT_1_SOURCE);
398 MADERA_MUX_ENUMS(ISRC1DEC2, MADERA_ISRC1DEC2MIX_INPUT_1_SOURCE);
399 MADERA_MUX_ENUMS(ISRC1DEC3, MADERA_ISRC1DEC3MIX_INPUT_1_SOURCE);
400 MADERA_MUX_ENUMS(ISRC1DEC4, MADERA_ISRC1DEC4MIX_INPUT_1_SOURCE);
401 
402 MADERA_MUX_ENUMS(ISRC2INT1, MADERA_ISRC2INT1MIX_INPUT_1_SOURCE);
403 MADERA_MUX_ENUMS(ISRC2INT2, MADERA_ISRC2INT2MIX_INPUT_1_SOURCE);
404 MADERA_MUX_ENUMS(ISRC2INT3, MADERA_ISRC2INT3MIX_INPUT_1_SOURCE);
405 MADERA_MUX_ENUMS(ISRC2INT4, MADERA_ISRC2INT4MIX_INPUT_1_SOURCE);
406 
407 MADERA_MUX_ENUMS(ISRC2DEC1, MADERA_ISRC2DEC1MIX_INPUT_1_SOURCE);
408 MADERA_MUX_ENUMS(ISRC2DEC2, MADERA_ISRC2DEC2MIX_INPUT_1_SOURCE);
409 MADERA_MUX_ENUMS(ISRC2DEC3, MADERA_ISRC2DEC3MIX_INPUT_1_SOURCE);
410 MADERA_MUX_ENUMS(ISRC2DEC4, MADERA_ISRC2DEC4MIX_INPUT_1_SOURCE);
411 
412 static const char * const cs47l15_aec_loopback_texts[] = {
413 	"HPOUT1L", "HPOUT1R", "SPKOUTL", "SPKDAT1L", "SPKDAT1R",
414 };
415 
416 static const unsigned int cs47l15_aec_loopback_values[] = {
417 	0, 1, 6, 8, 9,
418 };
419 
420 static const struct soc_enum cs47l15_aec1_loopback =
421 	SOC_VALUE_ENUM_SINGLE(MADERA_DAC_AEC_CONTROL_1,
422 			      MADERA_AEC1_LOOPBACK_SRC_SHIFT, 0xf,
423 			      ARRAY_SIZE(cs47l15_aec_loopback_texts),
424 			      cs47l15_aec_loopback_texts,
425 			      cs47l15_aec_loopback_values);
426 
427 static const struct soc_enum cs47l15_aec2_loopback =
428 	SOC_VALUE_ENUM_SINGLE(MADERA_DAC_AEC_CONTROL_2,
429 			      MADERA_AEC2_LOOPBACK_SRC_SHIFT, 0xf,
430 			      ARRAY_SIZE(cs47l15_aec_loopback_texts),
431 			      cs47l15_aec_loopback_texts,
432 			      cs47l15_aec_loopback_values);
433 
434 static const struct snd_kcontrol_new cs47l15_aec_loopback_mux[] = {
435 	SOC_DAPM_ENUM("AEC1 Loopback", cs47l15_aec1_loopback),
436 	SOC_DAPM_ENUM("AEC2 Loopback", cs47l15_aec2_loopback),
437 };
438 
439 static const struct snd_soc_dapm_widget cs47l15_dapm_widgets[] = {
440 SND_SOC_DAPM_SUPPLY("SYSCLK", MADERA_SYSTEM_CLOCK_1, MADERA_SYSCLK_ENA_SHIFT,
441 		    0, madera_sysclk_ev,
442 		    SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
443 		    SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
444 SND_SOC_DAPM_SUPPLY("OPCLK", MADERA_OUTPUT_SYSTEM_CLOCK,
445 		    MADERA_OPCLK_ENA_SHIFT, 0, NULL, 0),
446 SND_SOC_DAPM_SUPPLY("DSPCLK", MADERA_DSP_CLOCK_1, MADERA_DSP_CLK_ENA_SHIFT,
447 		    0, madera_clk_ev,
448 		    SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
449 
450 SND_SOC_DAPM_REGULATOR_SUPPLY("CPVDD1", 20, 0),
451 SND_SOC_DAPM_REGULATOR_SUPPLY("MICVDD", 0, SND_SOC_DAPM_REGULATOR_BYPASS),
452 SND_SOC_DAPM_REGULATOR_SUPPLY("SPKVDD", 0, 0),
453 
454 SND_SOC_DAPM_SUPPLY("MICBIAS1", MADERA_MIC_BIAS_CTRL_1,
455 		    MADERA_MICB1_ENA_SHIFT, 0, NULL, 0),
456 
457 SND_SOC_DAPM_SUPPLY("MICBIAS1A", MADERA_MIC_BIAS_CTRL_5,
458 		    MADERA_MICB1A_ENA_SHIFT, 0, NULL, 0),
459 SND_SOC_DAPM_SUPPLY("MICBIAS1B", MADERA_MIC_BIAS_CTRL_5,
460 		    MADERA_MICB1B_ENA_SHIFT, 0, NULL, 0),
461 SND_SOC_DAPM_SUPPLY("MICBIAS1C", MADERA_MIC_BIAS_CTRL_5,
462 		    MADERA_MICB1C_ENA_SHIFT, 0, NULL, 0),
463 
464 SND_SOC_DAPM_SUPPLY("FXCLK", SND_SOC_NOPM,
465 		    MADERA_DOM_GRP_FX, 0,
466 		    madera_domain_clk_ev,
467 		    SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
468 SND_SOC_DAPM_SUPPLY("ISRC1CLK", SND_SOC_NOPM,
469 		    MADERA_DOM_GRP_ISRC1, 0,
470 		    madera_domain_clk_ev,
471 		    SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
472 SND_SOC_DAPM_SUPPLY("ISRC2CLK", SND_SOC_NOPM,
473 		    MADERA_DOM_GRP_ISRC2, 0,
474 		    madera_domain_clk_ev,
475 		    SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
476 SND_SOC_DAPM_SUPPLY("OUTCLK", SND_SOC_NOPM,
477 		    MADERA_DOM_GRP_OUT, 0,
478 		    madera_domain_clk_ev,
479 		    SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
480 SND_SOC_DAPM_SUPPLY("SPDCLK", SND_SOC_NOPM,
481 		    MADERA_DOM_GRP_SPD, 0,
482 		    madera_domain_clk_ev,
483 		    SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
484 SND_SOC_DAPM_SUPPLY("DSP1CLK", SND_SOC_NOPM,
485 		    MADERA_DOM_GRP_DSP1, 0,
486 		    madera_domain_clk_ev,
487 		    SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
488 SND_SOC_DAPM_SUPPLY("AIF1TXCLK", SND_SOC_NOPM,
489 		    MADERA_DOM_GRP_AIF1, 0,
490 		    madera_domain_clk_ev,
491 		    SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
492 SND_SOC_DAPM_SUPPLY("AIF2TXCLK", SND_SOC_NOPM,
493 		    MADERA_DOM_GRP_AIF2, 0,
494 		    madera_domain_clk_ev,
495 		    SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
496 SND_SOC_DAPM_SUPPLY("AIF3TXCLK", SND_SOC_NOPM,
497 		    MADERA_DOM_GRP_AIF3, 0,
498 		    madera_domain_clk_ev,
499 		    SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
500 SND_SOC_DAPM_SUPPLY("PWMCLK", SND_SOC_NOPM,
501 		    MADERA_DOM_GRP_PWM, 0,
502 		    madera_domain_clk_ev,
503 		    SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
504 
505 SND_SOC_DAPM_SIGGEN("TONE"),
506 SND_SOC_DAPM_SIGGEN("NOISE"),
507 
508 SND_SOC_DAPM_INPUT("IN1ALN"),
509 SND_SOC_DAPM_INPUT("IN1ALP"),
510 SND_SOC_DAPM_INPUT("IN1BLN"),
511 SND_SOC_DAPM_INPUT("IN1BLP"),
512 SND_SOC_DAPM_INPUT("IN1ARN"),
513 SND_SOC_DAPM_INPUT("IN1ARP"),
514 SND_SOC_DAPM_INPUT("IN1BRN"),
515 SND_SOC_DAPM_INPUT("IN1BRP"),
516 SND_SOC_DAPM_INPUT("IN2N"),
517 SND_SOC_DAPM_INPUT("IN2P"),
518 SND_SOC_DAPM_INPUT("SPKRXDAT"),
519 
520 SND_SOC_DAPM_MUX("IN1L Analog Mux", SND_SOC_NOPM, 0, 0, &madera_inmux[0]),
521 SND_SOC_DAPM_MUX("IN1R Analog Mux", SND_SOC_NOPM, 0, 0, &madera_inmux[1]),
522 
523 SND_SOC_DAPM_MUX("IN1L Mode", SND_SOC_NOPM, 0, 0, &madera_inmode[0]),
524 SND_SOC_DAPM_MUX("IN1R Mode", SND_SOC_NOPM, 0, 0, &madera_inmode[0]),
525 
526 SND_SOC_DAPM_MUX("IN2L Mode", SND_SOC_NOPM, 0, 0, &madera_inmode[1]),
527 SND_SOC_DAPM_MUX("IN2R Mode", SND_SOC_NOPM, 0, 0, &madera_inmode[1]),
528 
529 SND_SOC_DAPM_OUTPUT("DRC1 Signal Activity"),
530 SND_SOC_DAPM_OUTPUT("DRC2 Signal Activity"),
531 
532 SND_SOC_DAPM_OUTPUT("DSP Trigger Out"),
533 
534 SND_SOC_DAPM_DEMUX("HPOUT1 Demux", SND_SOC_NOPM, 0, 0, &cs47l15_outdemux),
535 SND_SOC_DAPM_MUX("HPOUT1 Mono Mux", SND_SOC_NOPM, 0, 0, &cs47l15_outdemux),
536 
537 SND_SOC_DAPM_PGA("PWM1 Driver", MADERA_PWM_DRIVE_1, MADERA_PWM1_ENA_SHIFT,
538 		 0, NULL, 0),
539 SND_SOC_DAPM_PGA("PWM2 Driver", MADERA_PWM_DRIVE_1, MADERA_PWM2_ENA_SHIFT,
540 		 0, NULL, 0),
541 
542 SND_SOC_DAPM_AIF_OUT("AIF1TX1", NULL, 0,
543 		     MADERA_AIF1_TX_ENABLES, MADERA_AIF1TX1_ENA_SHIFT, 0),
544 SND_SOC_DAPM_AIF_OUT("AIF1TX2", NULL, 1,
545 		     MADERA_AIF1_TX_ENABLES, MADERA_AIF1TX2_ENA_SHIFT, 0),
546 SND_SOC_DAPM_AIF_OUT("AIF1TX3", NULL, 2,
547 		     MADERA_AIF1_TX_ENABLES, MADERA_AIF1TX3_ENA_SHIFT, 0),
548 SND_SOC_DAPM_AIF_OUT("AIF1TX4", NULL, 3,
549 		     MADERA_AIF1_TX_ENABLES, MADERA_AIF1TX4_ENA_SHIFT, 0),
550 SND_SOC_DAPM_AIF_OUT("AIF1TX5", NULL, 4,
551 		     MADERA_AIF1_TX_ENABLES, MADERA_AIF1TX5_ENA_SHIFT, 0),
552 SND_SOC_DAPM_AIF_OUT("AIF1TX6", NULL, 5,
553 		     MADERA_AIF1_TX_ENABLES, MADERA_AIF1TX6_ENA_SHIFT, 0),
554 
555 SND_SOC_DAPM_AIF_OUT("AIF2TX1", NULL, 0,
556 		     MADERA_AIF2_TX_ENABLES, MADERA_AIF2TX1_ENA_SHIFT, 0),
557 SND_SOC_DAPM_AIF_OUT("AIF2TX2", NULL, 1,
558 		     MADERA_AIF2_TX_ENABLES, MADERA_AIF2TX2_ENA_SHIFT, 0),
559 SND_SOC_DAPM_AIF_OUT("AIF2TX3", NULL, 2,
560 		     MADERA_AIF2_TX_ENABLES, MADERA_AIF2TX3_ENA_SHIFT, 0),
561 SND_SOC_DAPM_AIF_OUT("AIF2TX4", NULL, 3,
562 		     MADERA_AIF2_TX_ENABLES, MADERA_AIF2TX4_ENA_SHIFT, 0),
563 
564 SND_SOC_DAPM_AIF_OUT("AIF3TX1", NULL, 0,
565 		     MADERA_AIF3_TX_ENABLES, MADERA_AIF3TX1_ENA_SHIFT, 0),
566 SND_SOC_DAPM_AIF_OUT("AIF3TX2", NULL, 1,
567 		     MADERA_AIF3_TX_ENABLES, MADERA_AIF3TX2_ENA_SHIFT, 0),
568 
569 SND_SOC_DAPM_PGA_E("OUT1L", SND_SOC_NOPM,
570 		   MADERA_OUT1L_ENA_SHIFT, 0, NULL, 0, madera_hp_ev,
571 		   SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD |
572 		   SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU),
573 SND_SOC_DAPM_PGA_E("OUT1R", SND_SOC_NOPM,
574 		   MADERA_OUT1R_ENA_SHIFT, 0, NULL, 0, madera_hp_ev,
575 		   SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD |
576 		   SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU),
577 SND_SOC_DAPM_PGA_E("OUT4L", SND_SOC_NOPM,
578 		   MADERA_OUT4L_ENA_SHIFT, 0, NULL, 0, madera_spk_ev,
579 		   SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
580 SND_SOC_DAPM_PGA_E("OUT5L", MADERA_OUTPUT_ENABLES_1,
581 		   MADERA_OUT5L_ENA_SHIFT, 0, NULL, 0, madera_out_ev,
582 		   SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
583 SND_SOC_DAPM_PGA_E("OUT5R", MADERA_OUTPUT_ENABLES_1,
584 		   MADERA_OUT5R_ENA_SHIFT, 0, NULL, 0, madera_out_ev,
585 		   SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
586 
587 SND_SOC_DAPM_PGA("SPD1TX1", MADERA_SPD1_TX_CONTROL,
588 		 MADERA_SPD1_VAL1_SHIFT, 0, NULL, 0),
589 SND_SOC_DAPM_PGA("SPD1TX2", MADERA_SPD1_TX_CONTROL,
590 		 MADERA_SPD1_VAL2_SHIFT, 0, NULL, 0),
591 SND_SOC_DAPM_OUT_DRV("SPD1", MADERA_SPD1_TX_CONTROL,
592 		     MADERA_SPD1_ENA_SHIFT, 0, NULL, 0),
593 
594 /*
595  * mux_in widgets : arranged in the order of sources
596  * specified in MADERA_MIXER_INPUT_ROUTES
597  */
598 
599 SND_SOC_DAPM_PGA("Noise Generator", MADERA_COMFORT_NOISE_GENERATOR,
600 		 MADERA_NOISE_GEN_ENA_SHIFT, 0, NULL, 0),
601 
602 SND_SOC_DAPM_PGA("Tone Generator 1", MADERA_TONE_GENERATOR_1,
603 		 MADERA_TONE1_ENA_SHIFT, 0, NULL, 0),
604 SND_SOC_DAPM_PGA("Tone Generator 2", MADERA_TONE_GENERATOR_1,
605 		 MADERA_TONE2_ENA_SHIFT, 0, NULL, 0),
606 
607 SND_SOC_DAPM_SIGGEN("HAPTICS"),
608 
609 SND_SOC_DAPM_MUX("AEC1 Loopback", MADERA_DAC_AEC_CONTROL_1,
610 		 MADERA_AEC1_LOOPBACK_ENA_SHIFT, 0,
611 		 &cs47l15_aec_loopback_mux[0]),
612 SND_SOC_DAPM_MUX("AEC2 Loopback", MADERA_DAC_AEC_CONTROL_2,
613 		 MADERA_AEC2_LOOPBACK_ENA_SHIFT, 0,
614 		 &cs47l15_aec_loopback_mux[1]),
615 
616 SND_SOC_DAPM_PGA_E("IN1L", MADERA_INPUT_ENABLES, MADERA_IN1L_ENA_SHIFT,
617 		   0, NULL, 0, madera_in_ev,
618 		   SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD |
619 		   SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU),
620 SND_SOC_DAPM_PGA_E("IN1R", MADERA_INPUT_ENABLES, MADERA_IN1R_ENA_SHIFT,
621 		   0, NULL, 0, madera_in_ev,
622 		   SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD |
623 		   SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU),
624 SND_SOC_DAPM_PGA_E("IN2L", MADERA_INPUT_ENABLES, MADERA_IN2L_ENA_SHIFT,
625 		   0, NULL, 0, madera_in_ev,
626 		   SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD |
627 		   SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU),
628 SND_SOC_DAPM_PGA_E("IN2R", MADERA_INPUT_ENABLES, MADERA_IN2R_ENA_SHIFT,
629 		   0, NULL, 0, madera_in_ev,
630 		   SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD |
631 		   SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU),
632 
633 SND_SOC_DAPM_AIF_IN("AIF1RX1", NULL, 0,
634 		    MADERA_AIF1_RX_ENABLES, MADERA_AIF1RX1_ENA_SHIFT, 0),
635 SND_SOC_DAPM_AIF_IN("AIF1RX2", NULL, 1,
636 		    MADERA_AIF1_RX_ENABLES, MADERA_AIF1RX2_ENA_SHIFT, 0),
637 SND_SOC_DAPM_AIF_IN("AIF1RX3", NULL, 2,
638 		    MADERA_AIF1_RX_ENABLES, MADERA_AIF1RX3_ENA_SHIFT, 0),
639 SND_SOC_DAPM_AIF_IN("AIF1RX4", NULL, 3,
640 		    MADERA_AIF1_RX_ENABLES, MADERA_AIF1RX4_ENA_SHIFT, 0),
641 SND_SOC_DAPM_AIF_IN("AIF1RX5", NULL, 4,
642 		    MADERA_AIF1_RX_ENABLES, MADERA_AIF1RX5_ENA_SHIFT, 0),
643 SND_SOC_DAPM_AIF_IN("AIF1RX6", NULL, 5,
644 		    MADERA_AIF1_RX_ENABLES, MADERA_AIF1RX6_ENA_SHIFT, 0),
645 
646 SND_SOC_DAPM_AIF_IN("AIF2RX1", NULL, 0,
647 		    MADERA_AIF2_RX_ENABLES, MADERA_AIF2RX1_ENA_SHIFT, 0),
648 SND_SOC_DAPM_AIF_IN("AIF2RX2", NULL, 1,
649 		    MADERA_AIF2_RX_ENABLES, MADERA_AIF2RX2_ENA_SHIFT, 0),
650 SND_SOC_DAPM_AIF_IN("AIF2RX3", NULL, 2,
651 		    MADERA_AIF2_RX_ENABLES, MADERA_AIF2RX3_ENA_SHIFT, 0),
652 SND_SOC_DAPM_AIF_IN("AIF2RX4", NULL, 3,
653 		    MADERA_AIF2_RX_ENABLES, MADERA_AIF2RX4_ENA_SHIFT, 0),
654 
655 SND_SOC_DAPM_AIF_IN("AIF3RX1", NULL, 0,
656 		    MADERA_AIF3_RX_ENABLES, MADERA_AIF3RX1_ENA_SHIFT, 0),
657 SND_SOC_DAPM_AIF_IN("AIF3RX2", NULL, 1,
658 		    MADERA_AIF3_RX_ENABLES, MADERA_AIF3RX2_ENA_SHIFT, 0),
659 
660 SND_SOC_DAPM_PGA("EQ1", MADERA_EQ1_1, MADERA_EQ1_ENA_SHIFT, 0, NULL, 0),
661 SND_SOC_DAPM_PGA("EQ2", MADERA_EQ2_1, MADERA_EQ2_ENA_SHIFT, 0, NULL, 0),
662 SND_SOC_DAPM_PGA("EQ3", MADERA_EQ3_1, MADERA_EQ3_ENA_SHIFT, 0, NULL, 0),
663 SND_SOC_DAPM_PGA("EQ4", MADERA_EQ4_1, MADERA_EQ4_ENA_SHIFT, 0, NULL, 0),
664 
665 SND_SOC_DAPM_PGA("DRC1L", MADERA_DRC1_CTRL1, MADERA_DRC1L_ENA_SHIFT, 0,
666 		 NULL, 0),
667 SND_SOC_DAPM_PGA("DRC1R", MADERA_DRC1_CTRL1, MADERA_DRC1R_ENA_SHIFT, 0,
668 		 NULL, 0),
669 SND_SOC_DAPM_PGA("DRC2L", MADERA_DRC2_CTRL1, MADERA_DRC2L_ENA_SHIFT, 0,
670 		 NULL, 0),
671 SND_SOC_DAPM_PGA("DRC2R", MADERA_DRC2_CTRL1, MADERA_DRC2R_ENA_SHIFT, 0,
672 		 NULL, 0),
673 
674 SND_SOC_DAPM_PGA("LHPF1", MADERA_HPLPF1_1, MADERA_LHPF1_ENA_SHIFT, 0, NULL, 0),
675 SND_SOC_DAPM_PGA("LHPF2", MADERA_HPLPF2_1, MADERA_LHPF2_ENA_SHIFT, 0, NULL, 0),
676 SND_SOC_DAPM_PGA("LHPF3", MADERA_HPLPF3_1, MADERA_LHPF3_ENA_SHIFT, 0, NULL, 0),
677 SND_SOC_DAPM_PGA("LHPF4", MADERA_HPLPF4_1, MADERA_LHPF4_ENA_SHIFT, 0, NULL, 0),
678 
679 SND_SOC_DAPM_PGA("ISRC1DEC1", MADERA_ISRC_1_CTRL_3,
680 		 MADERA_ISRC1_DEC1_ENA_SHIFT, 0, NULL, 0),
681 SND_SOC_DAPM_PGA("ISRC1DEC2", MADERA_ISRC_1_CTRL_3,
682 		 MADERA_ISRC1_DEC2_ENA_SHIFT, 0, NULL, 0),
683 SND_SOC_DAPM_PGA("ISRC1DEC3", MADERA_ISRC_1_CTRL_3,
684 		 MADERA_ISRC1_DEC3_ENA_SHIFT, 0, NULL, 0),
685 SND_SOC_DAPM_PGA("ISRC1DEC4", MADERA_ISRC_1_CTRL_3,
686 		 MADERA_ISRC1_DEC4_ENA_SHIFT, 0, NULL, 0),
687 
688 SND_SOC_DAPM_PGA("ISRC1INT1", MADERA_ISRC_1_CTRL_3,
689 		 MADERA_ISRC1_INT1_ENA_SHIFT, 0, NULL, 0),
690 SND_SOC_DAPM_PGA("ISRC1INT2", MADERA_ISRC_1_CTRL_3,
691 		 MADERA_ISRC1_INT2_ENA_SHIFT, 0, NULL, 0),
692 SND_SOC_DAPM_PGA("ISRC1INT3", MADERA_ISRC_1_CTRL_3,
693 		 MADERA_ISRC1_INT3_ENA_SHIFT, 0, NULL, 0),
694 SND_SOC_DAPM_PGA("ISRC1INT4", MADERA_ISRC_1_CTRL_3,
695 		 MADERA_ISRC1_INT4_ENA_SHIFT, 0, NULL, 0),
696 
697 SND_SOC_DAPM_PGA("ISRC2DEC1", MADERA_ISRC_2_CTRL_3,
698 		 MADERA_ISRC2_DEC1_ENA_SHIFT, 0, NULL, 0),
699 SND_SOC_DAPM_PGA("ISRC2DEC2", MADERA_ISRC_2_CTRL_3,
700 		 MADERA_ISRC2_DEC2_ENA_SHIFT, 0, NULL, 0),
701 SND_SOC_DAPM_PGA("ISRC2DEC3", MADERA_ISRC_2_CTRL_3,
702 		 MADERA_ISRC2_DEC3_ENA_SHIFT, 0, NULL, 0),
703 SND_SOC_DAPM_PGA("ISRC2DEC4", MADERA_ISRC_2_CTRL_3,
704 		 MADERA_ISRC2_DEC4_ENA_SHIFT, 0, NULL, 0),
705 
706 SND_SOC_DAPM_PGA("ISRC2INT1", MADERA_ISRC_2_CTRL_3,
707 		 MADERA_ISRC2_INT1_ENA_SHIFT, 0, NULL, 0),
708 SND_SOC_DAPM_PGA("ISRC2INT2", MADERA_ISRC_2_CTRL_3,
709 		 MADERA_ISRC2_INT2_ENA_SHIFT, 0, NULL, 0),
710 SND_SOC_DAPM_PGA("ISRC2INT3", MADERA_ISRC_2_CTRL_3,
711 		 MADERA_ISRC2_INT3_ENA_SHIFT, 0, NULL, 0),
712 SND_SOC_DAPM_PGA("ISRC2INT4", MADERA_ISRC_2_CTRL_3,
713 		 MADERA_ISRC2_INT4_ENA_SHIFT, 0, NULL, 0),
714 
715 WM_ADSP2("DSP1", 0, cs47l15_adsp_power_ev),
716 
717 /* end of ordered widget list */
718 
719 MADERA_MIXER_WIDGETS(EQ1, "EQ1"),
720 MADERA_MIXER_WIDGETS(EQ2, "EQ2"),
721 MADERA_MIXER_WIDGETS(EQ3, "EQ3"),
722 MADERA_MIXER_WIDGETS(EQ4, "EQ4"),
723 
724 MADERA_MIXER_WIDGETS(DRC1L, "DRC1L"),
725 MADERA_MIXER_WIDGETS(DRC1R, "DRC1R"),
726 MADERA_MIXER_WIDGETS(DRC2L, "DRC2L"),
727 MADERA_MIXER_WIDGETS(DRC2R, "DRC2R"),
728 
729 SND_SOC_DAPM_SWITCH("DRC1 Activity Output", SND_SOC_NOPM, 0, 0,
730 		    &madera_drc_activity_output_mux[0]),
731 SND_SOC_DAPM_SWITCH("DRC2 Activity Output", SND_SOC_NOPM, 0, 0,
732 		    &madera_drc_activity_output_mux[1]),
733 
734 MADERA_MIXER_WIDGETS(LHPF1, "LHPF1"),
735 MADERA_MIXER_WIDGETS(LHPF2, "LHPF2"),
736 MADERA_MIXER_WIDGETS(LHPF3, "LHPF3"),
737 MADERA_MIXER_WIDGETS(LHPF4, "LHPF4"),
738 
739 MADERA_MIXER_WIDGETS(PWM1, "PWM1"),
740 MADERA_MIXER_WIDGETS(PWM2, "PWM2"),
741 
742 MADERA_MIXER_WIDGETS(OUT1L, "HPOUT1L"),
743 MADERA_MIXER_WIDGETS(OUT1R, "HPOUT1R"),
744 MADERA_MIXER_WIDGETS(SPKOUTL, "SPKOUTL"),
745 MADERA_MIXER_WIDGETS(SPKDAT1L, "SPKDAT1L"),
746 MADERA_MIXER_WIDGETS(SPKDAT1R, "SPKDAT1R"),
747 
748 MADERA_MIXER_WIDGETS(AIF1TX1, "AIF1TX1"),
749 MADERA_MIXER_WIDGETS(AIF1TX2, "AIF1TX2"),
750 MADERA_MIXER_WIDGETS(AIF1TX3, "AIF1TX3"),
751 MADERA_MIXER_WIDGETS(AIF1TX4, "AIF1TX4"),
752 MADERA_MIXER_WIDGETS(AIF1TX5, "AIF1TX5"),
753 MADERA_MIXER_WIDGETS(AIF1TX6, "AIF1TX6"),
754 
755 MADERA_MIXER_WIDGETS(AIF2TX1, "AIF2TX1"),
756 MADERA_MIXER_WIDGETS(AIF2TX2, "AIF2TX2"),
757 MADERA_MIXER_WIDGETS(AIF2TX3, "AIF2TX3"),
758 MADERA_MIXER_WIDGETS(AIF2TX4, "AIF2TX4"),
759 
760 MADERA_MIXER_WIDGETS(AIF3TX1, "AIF3TX1"),
761 MADERA_MIXER_WIDGETS(AIF3TX2, "AIF3TX2"),
762 
763 MADERA_MUX_WIDGETS(SPD1TX1, "SPDIF1TX1"),
764 MADERA_MUX_WIDGETS(SPD1TX2, "SPDIF1TX2"),
765 
766 MADERA_DSP_WIDGETS(DSP1, "DSP1"),
767 
768 SND_SOC_DAPM_SWITCH("DSP1 Trigger Output", SND_SOC_NOPM, 0, 0,
769 		    &madera_dsp_trigger_output_mux[0]),
770 
771 MADERA_MUX_WIDGETS(ISRC1DEC1, "ISRC1DEC1"),
772 MADERA_MUX_WIDGETS(ISRC1DEC2, "ISRC1DEC2"),
773 MADERA_MUX_WIDGETS(ISRC1DEC3, "ISRC1DEC3"),
774 MADERA_MUX_WIDGETS(ISRC1DEC4, "ISRC1DEC4"),
775 
776 MADERA_MUX_WIDGETS(ISRC1INT1, "ISRC1INT1"),
777 MADERA_MUX_WIDGETS(ISRC1INT2, "ISRC1INT2"),
778 MADERA_MUX_WIDGETS(ISRC1INT3, "ISRC1INT3"),
779 MADERA_MUX_WIDGETS(ISRC1INT4, "ISRC1INT4"),
780 
781 MADERA_MUX_WIDGETS(ISRC2DEC1, "ISRC2DEC1"),
782 MADERA_MUX_WIDGETS(ISRC2DEC2, "ISRC2DEC2"),
783 MADERA_MUX_WIDGETS(ISRC2DEC3, "ISRC2DEC3"),
784 MADERA_MUX_WIDGETS(ISRC2DEC4, "ISRC2DEC4"),
785 
786 MADERA_MUX_WIDGETS(ISRC2INT1, "ISRC2INT1"),
787 MADERA_MUX_WIDGETS(ISRC2INT2, "ISRC2INT2"),
788 MADERA_MUX_WIDGETS(ISRC2INT3, "ISRC2INT3"),
789 MADERA_MUX_WIDGETS(ISRC2INT4, "ISRC2INT4"),
790 
791 SND_SOC_DAPM_OUTPUT("HPOUTL"),
792 SND_SOC_DAPM_OUTPUT("HPOUTR"),
793 SND_SOC_DAPM_OUTPUT("EPOUTP"),
794 SND_SOC_DAPM_OUTPUT("EPOUTN"),
795 SND_SOC_DAPM_OUTPUT("SPKOUTN"),
796 SND_SOC_DAPM_OUTPUT("SPKOUTP"),
797 SND_SOC_DAPM_OUTPUT("SPKDAT1L"),
798 SND_SOC_DAPM_OUTPUT("SPKDAT1R"),
799 SND_SOC_DAPM_OUTPUT("SPDIF1"),
800 
801 SND_SOC_DAPM_OUTPUT("MICSUPP"),
802 };
803 
804 #define MADERA_MIXER_INPUT_ROUTES(name)	\
805 	{ name, "Noise Generator", "Noise Generator" }, \
806 	{ name, "Tone Generator 1", "Tone Generator 1" }, \
807 	{ name, "Tone Generator 2", "Tone Generator 2" }, \
808 	{ name, "Haptics", "HAPTICS" }, \
809 	{ name, "AEC1", "AEC1 Loopback" }, \
810 	{ name, "AEC2", "AEC2 Loopback" }, \
811 	{ name, "IN1L", "IN1L" }, \
812 	{ name, "IN1R", "IN1R" }, \
813 	{ name, "IN2L", "IN2L" }, \
814 	{ name, "IN2R", "IN2R" }, \
815 	{ name, "AIF1RX1", "AIF1RX1" }, \
816 	{ name, "AIF1RX2", "AIF1RX2" }, \
817 	{ name, "AIF1RX3", "AIF1RX3" }, \
818 	{ name, "AIF1RX4", "AIF1RX4" }, \
819 	{ name, "AIF1RX5", "AIF1RX5" }, \
820 	{ name, "AIF1RX6", "AIF1RX6" }, \
821 	{ name, "AIF2RX1", "AIF2RX1" }, \
822 	{ name, "AIF2RX2", "AIF2RX2" }, \
823 	{ name, "AIF2RX3", "AIF2RX3" }, \
824 	{ name, "AIF2RX4", "AIF2RX4" }, \
825 	{ name, "AIF3RX1", "AIF3RX1" }, \
826 	{ name, "AIF3RX2", "AIF3RX2" }, \
827 	{ name, "EQ1", "EQ1" }, \
828 	{ name, "EQ2", "EQ2" }, \
829 	{ name, "EQ3", "EQ3" }, \
830 	{ name, "EQ4", "EQ4" }, \
831 	{ name, "DRC1L", "DRC1L" }, \
832 	{ name, "DRC1R", "DRC1R" }, \
833 	{ name, "DRC2L", "DRC2L" }, \
834 	{ name, "DRC2R", "DRC2R" }, \
835 	{ name, "LHPF1", "LHPF1" }, \
836 	{ name, "LHPF2", "LHPF2" }, \
837 	{ name, "LHPF3", "LHPF3" }, \
838 	{ name, "LHPF4", "LHPF4" }, \
839 	{ name, "ISRC1DEC1", "ISRC1DEC1" }, \
840 	{ name, "ISRC1DEC2", "ISRC1DEC2" }, \
841 	{ name, "ISRC1DEC3", "ISRC1DEC3" }, \
842 	{ name, "ISRC1DEC4", "ISRC1DEC4" }, \
843 	{ name, "ISRC1INT1", "ISRC1INT1" }, \
844 	{ name, "ISRC1INT2", "ISRC1INT2" }, \
845 	{ name, "ISRC1INT3", "ISRC1INT3" }, \
846 	{ name, "ISRC1INT4", "ISRC1INT4" }, \
847 	{ name, "ISRC2DEC1", "ISRC2DEC1" }, \
848 	{ name, "ISRC2DEC2", "ISRC2DEC2" }, \
849 	{ name, "ISRC2DEC3", "ISRC2DEC3" }, \
850 	{ name, "ISRC2DEC4", "ISRC2DEC4" }, \
851 	{ name, "ISRC2INT1", "ISRC2INT1" }, \
852 	{ name, "ISRC2INT2", "ISRC2INT2" }, \
853 	{ name, "ISRC2INT3", "ISRC2INT3" }, \
854 	{ name, "ISRC2INT4", "ISRC2INT4" }, \
855 	{ name, "DSP1.1", "DSP1" }, \
856 	{ name, "DSP1.2", "DSP1" }, \
857 	{ name, "DSP1.3", "DSP1" }, \
858 	{ name, "DSP1.4", "DSP1" }, \
859 	{ name, "DSP1.5", "DSP1" }, \
860 	{ name, "DSP1.6", "DSP1" }
861 
862 static const struct snd_soc_dapm_route cs47l15_dapm_routes[] = {
863 	/* Internal clock domains */
864 	{ "EQ1", NULL, "FXCLK" },
865 	{ "EQ2", NULL, "FXCLK" },
866 	{ "EQ3", NULL, "FXCLK" },
867 	{ "EQ4", NULL, "FXCLK" },
868 	{ "DRC1L", NULL, "FXCLK" },
869 	{ "DRC1R", NULL, "FXCLK" },
870 	{ "DRC2L", NULL, "FXCLK" },
871 	{ "DRC2R", NULL, "FXCLK" },
872 	{ "LHPF1", NULL, "FXCLK" },
873 	{ "LHPF2", NULL, "FXCLK" },
874 	{ "LHPF3", NULL, "FXCLK" },
875 	{ "LHPF4", NULL, "FXCLK" },
876 	{ "PWM1 Mixer", NULL, "PWMCLK" },
877 	{ "PWM2 Mixer", NULL, "PWMCLK" },
878 	{ "OUT1L", NULL, "OUTCLK" },
879 	{ "OUT1R", NULL, "OUTCLK" },
880 	{ "OUT4L", NULL, "OUTCLK" },
881 	{ "OUT5L", NULL, "OUTCLK" },
882 	{ "OUT5R", NULL, "OUTCLK" },
883 	{ "AIF1TX1", NULL, "AIF1TXCLK" },
884 	{ "AIF1TX2", NULL, "AIF1TXCLK" },
885 	{ "AIF1TX3", NULL, "AIF1TXCLK" },
886 	{ "AIF1TX4", NULL, "AIF1TXCLK" },
887 	{ "AIF1TX5", NULL, "AIF1TXCLK" },
888 	{ "AIF1TX6", NULL, "AIF1TXCLK" },
889 	{ "AIF2TX1", NULL, "AIF2TXCLK" },
890 	{ "AIF2TX2", NULL, "AIF2TXCLK" },
891 	{ "AIF2TX3", NULL, "AIF2TXCLK" },
892 	{ "AIF2TX4", NULL, "AIF2TXCLK" },
893 	{ "AIF3TX1", NULL, "AIF3TXCLK" },
894 	{ "AIF3TX2", NULL, "AIF3TXCLK" },
895 	{ "SPD1TX1", NULL, "SPDCLK" },
896 	{ "SPD1TX2", NULL, "SPDCLK" },
897 	{ "DSP1", NULL, "DSP1CLK" },
898 	{ "ISRC1DEC1", NULL, "ISRC1CLK" },
899 	{ "ISRC1DEC2", NULL, "ISRC1CLK" },
900 	{ "ISRC1DEC3", NULL, "ISRC1CLK" },
901 	{ "ISRC1DEC4", NULL, "ISRC1CLK" },
902 	{ "ISRC1INT1", NULL, "ISRC1CLK" },
903 	{ "ISRC1INT2", NULL, "ISRC1CLK" },
904 	{ "ISRC1INT3", NULL, "ISRC1CLK" },
905 	{ "ISRC1INT4", NULL, "ISRC1CLK" },
906 	{ "ISRC2DEC1", NULL, "ISRC2CLK" },
907 	{ "ISRC2DEC2", NULL, "ISRC2CLK" },
908 	{ "ISRC2DEC3", NULL, "ISRC2CLK" },
909 	{ "ISRC2DEC4", NULL, "ISRC2CLK" },
910 	{ "ISRC2INT1", NULL, "ISRC2CLK" },
911 	{ "ISRC2INT2", NULL, "ISRC2CLK" },
912 	{ "ISRC2INT3", NULL, "ISRC2CLK" },
913 	{ "ISRC2INT4", NULL, "ISRC2CLK" },
914 
915 	{ "OUT1L", NULL, "CPVDD1" },
916 	{ "OUT1R", NULL, "CPVDD1" },
917 	{ "OUT4L", NULL, "SPKVDD" },
918 
919 	{ "OUT1L", NULL, "SYSCLK" },
920 	{ "OUT1R", NULL, "SYSCLK" },
921 	{ "OUT4L", NULL, "SYSCLK" },
922 	{ "OUT5L", NULL, "SYSCLK" },
923 	{ "OUT5R", NULL, "SYSCLK" },
924 
925 	{ "SPD1", NULL, "SYSCLK" },
926 	{ "SPD1", NULL, "SPD1TX1" },
927 	{ "SPD1", NULL, "SPD1TX2" },
928 
929 	{ "IN1L", NULL, "SYSCLK" },
930 	{ "IN1R", NULL, "SYSCLK" },
931 	{ "IN2L", NULL, "SYSCLK" },
932 	{ "IN2R", NULL, "SYSCLK" },
933 
934 	{ "MICBIAS1", NULL, "MICVDD" },
935 
936 	{ "MICBIAS1A", NULL, "MICBIAS1" },
937 	{ "MICBIAS1B", NULL, "MICBIAS1" },
938 	{ "MICBIAS1C", NULL, "MICBIAS1" },
939 
940 	{ "Noise Generator", NULL, "SYSCLK" },
941 	{ "Tone Generator 1", NULL, "SYSCLK" },
942 	{ "Tone Generator 2", NULL, "SYSCLK" },
943 
944 	{ "Noise Generator", NULL, "NOISE" },
945 	{ "Tone Generator 1", NULL, "TONE" },
946 	{ "Tone Generator 2", NULL, "TONE" },
947 
948 	{ "AIF1 Capture", NULL, "AIF1TX1" },
949 	{ "AIF1 Capture", NULL, "AIF1TX2" },
950 	{ "AIF1 Capture", NULL, "AIF1TX3" },
951 	{ "AIF1 Capture", NULL, "AIF1TX4" },
952 	{ "AIF1 Capture", NULL, "AIF1TX5" },
953 	{ "AIF1 Capture", NULL, "AIF1TX6" },
954 
955 	{ "AIF1RX1", NULL, "AIF1 Playback" },
956 	{ "AIF1RX2", NULL, "AIF1 Playback" },
957 	{ "AIF1RX3", NULL, "AIF1 Playback" },
958 	{ "AIF1RX4", NULL, "AIF1 Playback" },
959 	{ "AIF1RX5", NULL, "AIF1 Playback" },
960 	{ "AIF1RX6", NULL, "AIF1 Playback" },
961 
962 	{ "AIF2 Capture", NULL, "AIF2TX1" },
963 	{ "AIF2 Capture", NULL, "AIF2TX2" },
964 	{ "AIF2 Capture", NULL, "AIF2TX3" },
965 	{ "AIF2 Capture", NULL, "AIF2TX4" },
966 
967 	{ "AIF2RX1", NULL, "AIF2 Playback" },
968 	{ "AIF2RX2", NULL, "AIF2 Playback" },
969 	{ "AIF2RX3", NULL, "AIF2 Playback" },
970 	{ "AIF2RX4", NULL, "AIF2 Playback" },
971 
972 	{ "AIF3 Capture", NULL, "AIF3TX1" },
973 	{ "AIF3 Capture", NULL, "AIF3TX2" },
974 
975 	{ "AIF3RX1", NULL, "AIF3 Playback" },
976 	{ "AIF3RX2", NULL, "AIF3 Playback" },
977 
978 	{ "AIF1 Playback", NULL, "SYSCLK" },
979 	{ "AIF2 Playback", NULL, "SYSCLK" },
980 	{ "AIF3 Playback", NULL, "SYSCLK" },
981 
982 	{ "AIF1 Capture", NULL, "SYSCLK" },
983 	{ "AIF2 Capture", NULL, "SYSCLK" },
984 	{ "AIF3 Capture", NULL, "SYSCLK" },
985 
986 	{ "Audio Trace DSP", NULL, "DSP1" },
987 
988 	{ "IN1L Analog Mux", "A", "IN1ALN" },
989 	{ "IN1L Analog Mux", "A", "IN1ALP" },
990 	{ "IN1L Analog Mux", "B", "IN1BLN" },
991 	{ "IN1L Analog Mux", "B", "IN1BLP" },
992 	{ "IN1R Analog Mux", "A", "IN1ARN" },
993 	{ "IN1R Analog Mux", "A", "IN1ARP" },
994 	{ "IN1R Analog Mux", "B", "IN1BRN" },
995 	{ "IN1R Analog Mux", "B", "IN1BRP" },
996 
997 	{ "IN1L Mode", "Analog", "IN1L Analog Mux" },
998 	{ "IN1R Mode", "Analog", "IN1R Analog Mux" },
999 
1000 	{ "IN1L Mode", "Digital", "IN1ALN" },
1001 	{ "IN1L Mode", "Digital", "IN1ALP" },
1002 	{ "IN1R Mode", "Digital", "IN1ALN" },
1003 	{ "IN1R Mode", "Digital", "IN1ALP" },
1004 
1005 	{ "IN1L", NULL, "IN1L Mode" },
1006 	{ "IN1R", NULL, "IN1R Mode" },
1007 
1008 	{ "IN2L Mode", "Analog", "IN2N" },
1009 	{ "IN2L Mode", "Analog", "IN2P" },
1010 
1011 	{ "IN2L Mode", "Digital", "SPKRXDAT" },
1012 	{ "IN2R Mode", "Digital", "SPKRXDAT" },
1013 
1014 	{ "IN2L", NULL, "IN2L Mode" },
1015 	{ "IN2R", NULL, "IN2R Mode" },
1016 
1017 	MADERA_MIXER_ROUTES("OUT1L", "HPOUT1L"),
1018 	MADERA_MIXER_ROUTES("OUT1R", "HPOUT1R"),
1019 	MADERA_MIXER_ROUTES("OUT4L", "SPKOUTL"),
1020 	MADERA_MIXER_ROUTES("OUT5L", "SPKDAT1L"),
1021 	MADERA_MIXER_ROUTES("OUT5R", "SPKDAT1R"),
1022 
1023 	MADERA_MIXER_ROUTES("PWM1 Driver", "PWM1"),
1024 	MADERA_MIXER_ROUTES("PWM2 Driver", "PWM2"),
1025 
1026 	MADERA_MIXER_ROUTES("AIF1TX1", "AIF1TX1"),
1027 	MADERA_MIXER_ROUTES("AIF1TX2", "AIF1TX2"),
1028 	MADERA_MIXER_ROUTES("AIF1TX3", "AIF1TX3"),
1029 	MADERA_MIXER_ROUTES("AIF1TX4", "AIF1TX4"),
1030 	MADERA_MIXER_ROUTES("AIF1TX5", "AIF1TX5"),
1031 	MADERA_MIXER_ROUTES("AIF1TX6", "AIF1TX6"),
1032 
1033 	MADERA_MIXER_ROUTES("AIF2TX1", "AIF2TX1"),
1034 	MADERA_MIXER_ROUTES("AIF2TX2", "AIF2TX2"),
1035 	MADERA_MIXER_ROUTES("AIF2TX3", "AIF2TX3"),
1036 	MADERA_MIXER_ROUTES("AIF2TX4", "AIF2TX4"),
1037 
1038 	MADERA_MIXER_ROUTES("AIF3TX1", "AIF3TX1"),
1039 	MADERA_MIXER_ROUTES("AIF3TX2", "AIF3TX2"),
1040 
1041 	MADERA_MUX_ROUTES("SPD1TX1", "SPDIF1TX1"),
1042 	MADERA_MUX_ROUTES("SPD1TX2", "SPDIF1TX2"),
1043 
1044 	MADERA_MIXER_ROUTES("EQ1", "EQ1"),
1045 	MADERA_MIXER_ROUTES("EQ2", "EQ2"),
1046 	MADERA_MIXER_ROUTES("EQ3", "EQ3"),
1047 	MADERA_MIXER_ROUTES("EQ4", "EQ4"),
1048 
1049 	MADERA_MIXER_ROUTES("DRC1L", "DRC1L"),
1050 	MADERA_MIXER_ROUTES("DRC1R", "DRC1R"),
1051 	MADERA_MIXER_ROUTES("DRC2L", "DRC2L"),
1052 	MADERA_MIXER_ROUTES("DRC2R", "DRC2R"),
1053 
1054 	MADERA_MIXER_ROUTES("LHPF1", "LHPF1"),
1055 	MADERA_MIXER_ROUTES("LHPF2", "LHPF2"),
1056 	MADERA_MIXER_ROUTES("LHPF3", "LHPF3"),
1057 	MADERA_MIXER_ROUTES("LHPF4", "LHPF4"),
1058 
1059 	MADERA_DSP_ROUTES("DSP1"),
1060 
1061 	{ "DSP Trigger Out", NULL, "DSP1 Trigger Output" },
1062 
1063 	{ "DSP1 Trigger Output", "Switch", "DSP1" },
1064 
1065 	MADERA_MUX_ROUTES("ISRC1INT1", "ISRC1INT1"),
1066 	MADERA_MUX_ROUTES("ISRC1INT2", "ISRC1INT2"),
1067 	MADERA_MUX_ROUTES("ISRC1INT3", "ISRC1INT3"),
1068 	MADERA_MUX_ROUTES("ISRC1INT4", "ISRC1INT4"),
1069 
1070 	MADERA_MUX_ROUTES("ISRC1DEC1", "ISRC1DEC1"),
1071 	MADERA_MUX_ROUTES("ISRC1DEC2", "ISRC1DEC2"),
1072 	MADERA_MUX_ROUTES("ISRC1DEC3", "ISRC1DEC3"),
1073 	MADERA_MUX_ROUTES("ISRC1DEC4", "ISRC1DEC4"),
1074 
1075 	MADERA_MUX_ROUTES("ISRC2INT1", "ISRC2INT1"),
1076 	MADERA_MUX_ROUTES("ISRC2INT2", "ISRC2INT2"),
1077 	MADERA_MUX_ROUTES("ISRC2INT3", "ISRC2INT3"),
1078 	MADERA_MUX_ROUTES("ISRC2INT4", "ISRC2INT4"),
1079 
1080 	MADERA_MUX_ROUTES("ISRC2DEC1", "ISRC2DEC1"),
1081 	MADERA_MUX_ROUTES("ISRC2DEC2", "ISRC2DEC2"),
1082 	MADERA_MUX_ROUTES("ISRC2DEC3", "ISRC2DEC3"),
1083 	MADERA_MUX_ROUTES("ISRC2DEC4", "ISRC2DEC4"),
1084 
1085 	{ "AEC1 Loopback", "HPOUT1L", "OUT1L" },
1086 	{ "AEC1 Loopback", "HPOUT1R", "OUT1R" },
1087 	{ "AEC2 Loopback", "HPOUT1L", "OUT1L" },
1088 	{ "AEC2 Loopback", "HPOUT1R", "OUT1R" },
1089 	{ "HPOUT1 Demux", NULL, "OUT1L" },
1090 	{ "HPOUT1 Demux", NULL, "OUT1R" },
1091 
1092 	{ "OUT1R", NULL, "HPOUT1 Mono Mux" },
1093 	{ "HPOUT1 Mono Mux", "EPOUT", "OUT1L" },
1094 
1095 	{ "HPOUTL", "HPOUT", "HPOUT1 Demux" },
1096 	{ "HPOUTR", "HPOUT", "HPOUT1 Demux" },
1097 	{ "EPOUTP", "EPOUT", "HPOUT1 Demux" },
1098 	{ "EPOUTN", "EPOUT", "HPOUT1 Demux" },
1099 
1100 	{ "AEC1 Loopback", "SPKOUTL", "OUT4L" },
1101 	{ "AEC2 Loopback", "SPKOUTL", "OUT4L" },
1102 	{ "SPKOUTN", NULL, "OUT4L" },
1103 	{ "SPKOUTP", NULL, "OUT4L" },
1104 
1105 	{ "AEC1 Loopback", "SPKDAT1L", "OUT5L" },
1106 	{ "AEC1 Loopback", "SPKDAT1R", "OUT5R" },
1107 	{ "AEC2 Loopback", "SPKDAT1L", "OUT5L" },
1108 	{ "AEC2 Loopback", "SPKDAT1R", "OUT5R" },
1109 	{ "SPKDAT1L", NULL, "OUT5L" },
1110 	{ "SPKDAT1R", NULL, "OUT5R" },
1111 
1112 	{ "SPDIF1", NULL, "SPD1" },
1113 
1114 	{ "MICSUPP", NULL, "SYSCLK" },
1115 
1116 	{ "DRC1 Signal Activity", NULL, "DRC1 Activity Output" },
1117 	{ "DRC2 Signal Activity", NULL, "DRC2 Activity Output" },
1118 	{ "DRC1 Activity Output", "Switch", "DRC1L" },
1119 	{ "DRC1 Activity Output", "Switch", "DRC1R" },
1120 	{ "DRC2 Activity Output", "Switch", "DRC2L" },
1121 	{ "DRC2 Activity Output", "Switch", "DRC2R" },
1122 };
1123 
1124 static int cs47l15_set_fll(struct snd_soc_component *component, int fll_id,
1125 			   int source, unsigned int fref, unsigned int fout)
1126 {
1127 	struct cs47l15 *cs47l15 = snd_soc_component_get_drvdata(component);
1128 
1129 	switch (fll_id) {
1130 	case MADERA_FLL1_REFCLK:
1131 		return madera_set_fll_refclk(&cs47l15->fll[0], source, fref,
1132 					     fout);
1133 	case MADERA_FLLAO_REFCLK:
1134 		return madera_set_fll_ao_refclk(&cs47l15->fll[1], source, fref,
1135 						fout);
1136 	case MADERA_FLL1_SYNCCLK:
1137 		return madera_set_fll_syncclk(&cs47l15->fll[0], source, fref,
1138 					      fout);
1139 	default:
1140 		return -EINVAL;
1141 	}
1142 }
1143 
1144 static const struct snd_soc_dai_ops cs47l15_dai_ops = {
1145 	.compress_new = snd_soc_new_compress,
1146 };
1147 
1148 static struct snd_soc_dai_driver cs47l15_dai[] = {
1149 	{
1150 		.name = "cs47l15-aif1",
1151 		.id = 1,
1152 		.base = MADERA_AIF1_BCLK_CTRL,
1153 		.playback = {
1154 			.stream_name = "AIF1 Playback",
1155 			.channels_min = 1,
1156 			.channels_max = 6,
1157 			.rates = MADERA_RATES,
1158 			.formats = MADERA_FORMATS,
1159 		},
1160 		.capture = {
1161 			.stream_name = "AIF1 Capture",
1162 			.channels_min = 1,
1163 			.channels_max = 6,
1164 			.rates = MADERA_RATES,
1165 			.formats = MADERA_FORMATS,
1166 		 },
1167 		.ops = &madera_dai_ops,
1168 		.symmetric_rate = 1,
1169 		.symmetric_sample_bits = 1,
1170 	},
1171 	{
1172 		.name = "cs47l15-aif2",
1173 		.id = 2,
1174 		.base = MADERA_AIF2_BCLK_CTRL,
1175 		.playback = {
1176 			.stream_name = "AIF2 Playback",
1177 			.channels_min = 1,
1178 			.channels_max = 4,
1179 			.rates = MADERA_RATES,
1180 			.formats = MADERA_FORMATS,
1181 		},
1182 		.capture = {
1183 			.stream_name = "AIF2 Capture",
1184 			.channels_min = 1,
1185 			.channels_max = 4,
1186 			.rates = MADERA_RATES,
1187 			.formats = MADERA_FORMATS,
1188 		 },
1189 		.ops = &madera_dai_ops,
1190 		.symmetric_rate = 1,
1191 		.symmetric_sample_bits = 1,
1192 	},
1193 	{
1194 		.name = "cs47l15-aif3",
1195 		.id = 3,
1196 		.base = MADERA_AIF3_BCLK_CTRL,
1197 		.playback = {
1198 			.stream_name = "AIF3 Playback",
1199 			.channels_min = 1,
1200 			.channels_max = 2,
1201 			.rates = MADERA_RATES,
1202 			.formats = MADERA_FORMATS,
1203 		},
1204 		.capture = {
1205 			.stream_name = "AIF3 Capture",
1206 			.channels_min = 1,
1207 			.channels_max = 2,
1208 			.rates = MADERA_RATES,
1209 			.formats = MADERA_FORMATS,
1210 		 },
1211 		.ops = &madera_dai_ops,
1212 		.symmetric_rate = 1,
1213 		.symmetric_sample_bits = 1,
1214 	},
1215 	{
1216 		.name = "cs47l15-cpu-trace",
1217 		.capture = {
1218 			.stream_name = "Audio Trace CPU",
1219 			.channels_min = 1,
1220 			.channels_max = 6,
1221 			.rates = MADERA_RATES,
1222 			.formats = MADERA_FORMATS,
1223 		},
1224 		.ops = &cs47l15_dai_ops,
1225 	},
1226 	{
1227 		.name = "cs47l15-dsp-trace",
1228 		.capture = {
1229 			.stream_name = "Audio Trace DSP",
1230 			.channels_min = 1,
1231 			.channels_max = 6,
1232 			.rates = MADERA_RATES,
1233 			.formats = MADERA_FORMATS,
1234 		},
1235 	},
1236 };
1237 
1238 static int cs47l15_open(struct snd_soc_component *component,
1239 			struct snd_compr_stream *stream)
1240 {
1241 	struct snd_soc_pcm_runtime *rtd = stream->private_data;
1242 	struct cs47l15 *cs47l15 = snd_soc_component_get_drvdata(component);
1243 	struct madera_priv *priv = &cs47l15->core;
1244 	struct madera *madera = priv->madera;
1245 	int n_adsp;
1246 
1247 	if (strcmp(snd_soc_rtd_to_codec(rtd, 0)->name, "cs47l15-dsp-trace") == 0) {
1248 		n_adsp = 0;
1249 	} else {
1250 		dev_err(madera->dev,
1251 			"No suitable compressed stream for DAI '%s'\n",
1252 			snd_soc_rtd_to_codec(rtd, 0)->name);
1253 		return -EINVAL;
1254 	}
1255 
1256 	return wm_adsp_compr_open(&priv->adsp[n_adsp], stream);
1257 }
1258 
1259 static irqreturn_t cs47l15_adsp2_irq(int irq, void *data)
1260 {
1261 	struct cs47l15 *cs47l15 = data;
1262 	struct madera_priv *priv = &cs47l15->core;
1263 	struct madera *madera = priv->madera;
1264 	int ret;
1265 
1266 	ret = wm_adsp_compr_handle_irq(&priv->adsp[0]);
1267 	if (ret == -ENODEV) {
1268 		dev_err(madera->dev, "Spurious compressed data IRQ\n");
1269 		return IRQ_NONE;
1270 	}
1271 
1272 	return IRQ_HANDLED;
1273 }
1274 
1275 static const struct snd_soc_dapm_route cs47l15_mono_routes[] = {
1276 	{ "HPOUT1 Mono Mux", "HPOUT", "OUT1L" },
1277 };
1278 
1279 static int cs47l15_component_probe(struct snd_soc_component *component)
1280 {
1281 	struct snd_soc_dapm_context *dapm = snd_soc_component_to_dapm(component);
1282 	struct cs47l15 *cs47l15 = snd_soc_component_get_drvdata(component);
1283 	struct madera *madera = cs47l15->core.madera;
1284 	int ret;
1285 
1286 	snd_soc_component_init_regmap(component, madera->regmap);
1287 
1288 	mutex_lock(&madera->dapm_ptr_lock);
1289 	madera->dapm = snd_soc_component_to_dapm(component);
1290 	mutex_unlock(&madera->dapm_ptr_lock);
1291 
1292 	ret = madera_init_inputs(component);
1293 	if (ret)
1294 		return ret;
1295 
1296 	ret = madera_init_outputs(component, cs47l15_mono_routes,
1297 				  ARRAY_SIZE(cs47l15_mono_routes),
1298 				  CS47L15_MONO_OUTPUTS);
1299 	if (ret)
1300 		return ret;
1301 
1302 	snd_soc_dapm_disable_pin(dapm, "HAPTICS");
1303 
1304 	ret = snd_soc_add_component_controls(component,
1305 					     madera_adsp_rate_controls,
1306 					     CS47L15_NUM_ADSP);
1307 	if (ret)
1308 		return ret;
1309 
1310 	wm_adsp2_component_probe(&cs47l15->core.adsp[0], component);
1311 
1312 	return 0;
1313 }
1314 
1315 static void cs47l15_component_remove(struct snd_soc_component *component)
1316 {
1317 	struct cs47l15 *cs47l15 = snd_soc_component_get_drvdata(component);
1318 	struct madera *madera = cs47l15->core.madera;
1319 
1320 	mutex_lock(&madera->dapm_ptr_lock);
1321 	madera->dapm = NULL;
1322 	mutex_unlock(&madera->dapm_ptr_lock);
1323 
1324 	wm_adsp2_component_remove(&cs47l15->core.adsp[0], component);
1325 }
1326 
1327 #define CS47L15_DIG_VU 0x0200
1328 
1329 static unsigned int cs47l15_digital_vu[] = {
1330 	MADERA_DAC_DIGITAL_VOLUME_1L,
1331 	MADERA_DAC_DIGITAL_VOLUME_1R,
1332 	MADERA_DAC_DIGITAL_VOLUME_4L,
1333 	MADERA_DAC_DIGITAL_VOLUME_5L,
1334 	MADERA_DAC_DIGITAL_VOLUME_5R,
1335 };
1336 
1337 static const struct snd_compress_ops cs47l15_compress_ops = {
1338 	.open = &cs47l15_open,
1339 	.free = &wm_adsp_compr_free,
1340 	.set_params = &wm_adsp_compr_set_params,
1341 	.get_caps = &wm_adsp_compr_get_caps,
1342 	.trigger = &wm_adsp_compr_trigger,
1343 	.pointer = &wm_adsp_compr_pointer,
1344 	.copy = &wm_adsp_compr_copy,
1345 };
1346 
1347 static const struct snd_soc_component_driver soc_component_dev_cs47l15 = {
1348 	.probe			= &cs47l15_component_probe,
1349 	.remove			= &cs47l15_component_remove,
1350 	.set_sysclk		= &madera_set_sysclk,
1351 	.set_pll		= &cs47l15_set_fll,
1352 	.name			= DRV_NAME,
1353 	.compress_ops		= &cs47l15_compress_ops,
1354 	.controls		= cs47l15_snd_controls,
1355 	.num_controls		= ARRAY_SIZE(cs47l15_snd_controls),
1356 	.dapm_widgets		= cs47l15_dapm_widgets,
1357 	.num_dapm_widgets	= ARRAY_SIZE(cs47l15_dapm_widgets),
1358 	.dapm_routes		= cs47l15_dapm_routes,
1359 	.num_dapm_routes	= ARRAY_SIZE(cs47l15_dapm_routes),
1360 	.use_pmdown_time	= 1,
1361 	.endianness		= 1,
1362 };
1363 
1364 static int cs47l15_probe(struct platform_device *pdev)
1365 {
1366 	struct madera *madera = dev_get_drvdata(pdev->dev.parent);
1367 	struct cs47l15 *cs47l15;
1368 	int i, ret;
1369 
1370 	BUILD_BUG_ON(ARRAY_SIZE(cs47l15_dai) > MADERA_MAX_DAI);
1371 
1372 	/* quick exit if Madera irqchip driver hasn't completed probe */
1373 	if (!madera->irq_dev) {
1374 		dev_dbg(&pdev->dev, "irqchip driver not ready\n");
1375 		return -EPROBE_DEFER;
1376 	}
1377 
1378 	cs47l15 = devm_kzalloc(&pdev->dev, sizeof(struct cs47l15),
1379 			       GFP_KERNEL);
1380 	if (!cs47l15)
1381 		return -ENOMEM;
1382 
1383 	platform_set_drvdata(pdev, cs47l15);
1384 
1385 	cs47l15->core.madera = madera;
1386 	cs47l15->core.dev = &pdev->dev;
1387 	cs47l15->core.num_inputs = 4;
1388 
1389 	ret = madera_core_init(&cs47l15->core);
1390 	if (ret)
1391 		return ret;
1392 
1393 	ret = madera_init_overheat(&cs47l15->core);
1394 	if (ret)
1395 		goto error_core;
1396 
1397 	ret = madera_request_irq(madera, MADERA_IRQ_DSP_IRQ1,
1398 				 "ADSP2 Compressed IRQ", cs47l15_adsp2_irq,
1399 				 cs47l15);
1400 	if (ret != 0) {
1401 		dev_err(&pdev->dev, "Failed to request DSP IRQ: %d\n", ret);
1402 		goto error_overheat;
1403 	}
1404 
1405 	ret = madera_set_irq_wake(madera, MADERA_IRQ_DSP_IRQ1, 1);
1406 	if (ret)
1407 		dev_warn(&pdev->dev, "Failed to set DSP IRQ wake: %d\n", ret);
1408 
1409 	cs47l15->core.adsp[0].part = "cs47l15";
1410 	cs47l15->core.adsp[0].cs_dsp.num = 1;
1411 	cs47l15->core.adsp[0].cs_dsp.type = WMFW_ADSP2;
1412 	cs47l15->core.adsp[0].cs_dsp.rev = 2;
1413 	cs47l15->core.adsp[0].cs_dsp.dev = madera->dev;
1414 	cs47l15->core.adsp[0].cs_dsp.regmap = madera->regmap_32bit;
1415 
1416 	cs47l15->core.adsp[0].cs_dsp.base = MADERA_DSP1_CONFIG_1;
1417 	cs47l15->core.adsp[0].cs_dsp.mem = cs47l15_dsp1_regions;
1418 	cs47l15->core.adsp[0].cs_dsp.num_mems = ARRAY_SIZE(cs47l15_dsp1_regions);
1419 
1420 	cs47l15->core.adsp[0].cs_dsp.lock_regions =
1421 		CS_ADSP2_REGION_1 | CS_ADSP2_REGION_2 | CS_ADSP2_REGION_3;
1422 
1423 	ret = wm_adsp2_init(&cs47l15->core.adsp[0]);
1424 	if (ret != 0)
1425 		goto error_dsp_irq;
1426 
1427 	ret = madera_init_bus_error_irq(&cs47l15->core, 0, wm_adsp2_bus_error);
1428 	if (ret)
1429 		goto error_adsp;
1430 
1431 	madera_init_fll(madera, 1, MADERA_FLL1_CONTROL_1 - 1,
1432 			&cs47l15->fll[0]);
1433 	madera_init_fll(madera, 4, MADERA_FLLAO_CONTROL_1 - 1,
1434 			&cs47l15->fll[1]);
1435 
1436 	for (i = 0; i < ARRAY_SIZE(cs47l15_dai); i++)
1437 		madera_init_dai(&cs47l15->core, i);
1438 
1439 	/* Latch volume update bits */
1440 	for (i = 0; i < ARRAY_SIZE(cs47l15_digital_vu); i++)
1441 		regmap_update_bits(madera->regmap, cs47l15_digital_vu[i],
1442 				   CS47L15_DIG_VU, CS47L15_DIG_VU);
1443 
1444 	pm_runtime_enable(&pdev->dev);
1445 	pm_runtime_idle(&pdev->dev);
1446 
1447 	ret = devm_snd_soc_register_component(&pdev->dev,
1448 					      &soc_component_dev_cs47l15,
1449 					      cs47l15_dai,
1450 					      ARRAY_SIZE(cs47l15_dai));
1451 	if (ret < 0) {
1452 		dev_err(&pdev->dev, "Failed to register component: %d\n", ret);
1453 		goto error_pm_runtime;
1454 	}
1455 
1456 	return ret;
1457 
1458 error_pm_runtime:
1459 	pm_runtime_disable(&pdev->dev);
1460 	madera_free_bus_error_irq(&cs47l15->core, 0);
1461 error_adsp:
1462 	wm_adsp2_remove(&cs47l15->core.adsp[0]);
1463 error_dsp_irq:
1464 	madera_set_irq_wake(madera, MADERA_IRQ_DSP_IRQ1, 0);
1465 	madera_free_irq(madera, MADERA_IRQ_DSP_IRQ1, cs47l15);
1466 error_overheat:
1467 	madera_free_overheat(&cs47l15->core);
1468 error_core:
1469 	madera_core_free(&cs47l15->core);
1470 
1471 	return ret;
1472 }
1473 
1474 static void cs47l15_remove(struct platform_device *pdev)
1475 {
1476 	struct cs47l15 *cs47l15 = platform_get_drvdata(pdev);
1477 
1478 	pm_runtime_disable(&pdev->dev);
1479 
1480 	madera_free_bus_error_irq(&cs47l15->core, 0);
1481 
1482 	wm_adsp2_remove(&cs47l15->core.adsp[0]);
1483 
1484 	madera_set_irq_wake(cs47l15->core.madera, MADERA_IRQ_DSP_IRQ1, 0);
1485 	madera_free_irq(cs47l15->core.madera, MADERA_IRQ_DSP_IRQ1, cs47l15);
1486 	madera_free_overheat(&cs47l15->core);
1487 	madera_core_free(&cs47l15->core);
1488 }
1489 
1490 static struct platform_driver cs47l15_codec_driver = {
1491 	.driver = {
1492 		.name = "cs47l15-codec",
1493 	},
1494 	.probe = &cs47l15_probe,
1495 	.remove = cs47l15_remove,
1496 };
1497 
1498 module_platform_driver(cs47l15_codec_driver);
1499 
1500 MODULE_SOFTDEP("pre: madera irq-madera arizona-micsupp");
1501 MODULE_DESCRIPTION("ASoC CS47L15 driver");
1502 MODULE_AUTHOR("Richard Fitzgerald <rf@opensource.cirrus.com>");
1503 MODULE_AUTHOR("Jaswinder Jassal <jjassal@opensource.cirrus.com>");
1504 MODULE_LICENSE("GPL v2");
1505 MODULE_ALIAS("platform:cs47l15-codec");
1506