1 // SPDX-License-Identifier: GPL-2.0-only 2 // 3 // Driver for Cirrus Logic CS35L56 smart amp 4 // 5 // Copyright (C) 2023 Cirrus Logic, Inc. and 6 // Cirrus Logic International Semiconductor Ltd. 7 8 #include <linux/acpi.h> 9 #include <linux/array_size.h> 10 #include <linux/completion.h> 11 #include <linux/debugfs.h> 12 #include <linux/delay.h> 13 #include <linux/device.h> 14 #include <linux/err.h> 15 #include <linux/gpio/consumer.h> 16 #include <linux/interrupt.h> 17 #include <linux/math.h> 18 #include <linux/module.h> 19 #include <linux/pm.h> 20 #include <linux/pm_runtime.h> 21 #include <linux/property.h> 22 #include <linux/regmap.h> 23 #include <linux/regulator/consumer.h> 24 #include <linux/slab.h> 25 #include <linux/soundwire/sdw.h> 26 #include <linux/types.h> 27 #include <linux/workqueue.h> 28 #include <sound/cs-amp-lib.h> 29 #include <sound/pcm.h> 30 #include <sound/pcm_params.h> 31 #include <sound/soc.h> 32 #include <sound/soc-dapm.h> 33 #include <sound/tlv.h> 34 35 #include "wm_adsp.h" 36 #include "cs35l56.h" 37 38 static int cs35l56_dsp_event(struct snd_soc_dapm_widget *w, 39 struct snd_kcontrol *kcontrol, int event); 40 41 static void cs35l56_wait_dsp_ready(struct cs35l56_private *cs35l56) 42 { 43 /* Wait for patching to complete */ 44 flush_work(&cs35l56->dsp_work); 45 } 46 47 static int cs35l56_dspwait_get_volsw(struct snd_kcontrol *kcontrol, 48 struct snd_ctl_elem_value *ucontrol) 49 { 50 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); 51 struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(component); 52 53 cs35l56_wait_dsp_ready(cs35l56); 54 return snd_soc_get_volsw(kcontrol, ucontrol); 55 } 56 57 static int cs35l56_dspwait_put_volsw(struct snd_kcontrol *kcontrol, 58 struct snd_ctl_elem_value *ucontrol) 59 { 60 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); 61 struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(component); 62 63 cs35l56_wait_dsp_ready(cs35l56); 64 return snd_soc_put_volsw(kcontrol, ucontrol); 65 } 66 67 static DECLARE_TLV_DB_SCALE(vol_tlv, -10000, 25, 0); 68 69 static SOC_ENUM_SINGLE_DECL(cs35l56_cal_set_status_enum, SND_SOC_NOPM, 0, 70 cs35l56_cal_set_status_text); 71 72 static int cs35l56_cal_set_status_ctl_get(struct snd_kcontrol *kcontrol, 73 struct snd_ctl_elem_value *ucontrol) 74 { 75 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); 76 struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(component); 77 78 return cs35l56_cal_set_status_get(&cs35l56->base, ucontrol); 79 } 80 81 static const struct snd_kcontrol_new cs35l56_controls[] = { 82 SOC_SINGLE_EXT("Speaker Switch", 83 CS35L56_MAIN_RENDER_USER_MUTE, 0, 1, 1, 84 cs35l56_dspwait_get_volsw, cs35l56_dspwait_put_volsw), 85 SOC_SINGLE_S_EXT_TLV("Speaker Volume", 86 CS35L56_MAIN_RENDER_USER_VOLUME, 87 CS35L56_MAIN_RENDER_USER_VOLUME_SHIFT, 88 CS35L56_MAIN_RENDER_USER_VOLUME_MIN, 89 CS35L56_MAIN_RENDER_USER_VOLUME_MAX, 90 CS35L56_MAIN_RENDER_USER_VOLUME_SIGNBIT, 91 0, 92 cs35l56_dspwait_get_volsw, 93 cs35l56_dspwait_put_volsw, 94 vol_tlv), 95 SOC_SINGLE_EXT("Posture Number", CS35L56_MAIN_POSTURE_NUMBER, 96 0, 255, 0, 97 cs35l56_dspwait_get_volsw, cs35l56_dspwait_put_volsw), 98 SOC_ENUM_EXT_ACC("CAL_SET_STATUS", cs35l56_cal_set_status_enum, 99 cs35l56_cal_set_status_ctl_get, NULL, 100 SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE), 101 }; 102 103 static const struct snd_kcontrol_new cs35l63_controls[] = { 104 SOC_SINGLE_EXT("Speaker Switch", 105 CS35L63_MAIN_RENDER_USER_MUTE, 0, 1, 1, 106 cs35l56_dspwait_get_volsw, cs35l56_dspwait_put_volsw), 107 SOC_SINGLE_S_EXT_TLV("Speaker Volume", 108 CS35L63_MAIN_RENDER_USER_VOLUME, 109 CS35L56_MAIN_RENDER_USER_VOLUME_SHIFT, 110 CS35L56_MAIN_RENDER_USER_VOLUME_MIN, 111 CS35L56_MAIN_RENDER_USER_VOLUME_MAX, 112 CS35L56_MAIN_RENDER_USER_VOLUME_SIGNBIT, 113 0, 114 cs35l56_dspwait_get_volsw, 115 cs35l56_dspwait_put_volsw, 116 vol_tlv), 117 SOC_SINGLE_EXT("Posture Number", CS35L63_MAIN_POSTURE_NUMBER, 118 0, 255, 0, 119 cs35l56_dspwait_get_volsw, cs35l56_dspwait_put_volsw), 120 SOC_ENUM_EXT_ACC("CAL_SET_STATUS", cs35l56_cal_set_status_enum, 121 cs35l56_cal_set_status_ctl_get, NULL, 122 SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE), 123 }; 124 125 static SOC_VALUE_ENUM_SINGLE_DECL(cs35l56_asp1tx1_enum, 126 CS35L56_ASP1TX1_INPUT, 127 0, CS35L56_ASP_TXn_SRC_MASK, 128 cs35l56_tx_input_texts, 129 cs35l56_tx_input_values); 130 131 static const struct snd_kcontrol_new asp1_tx1_mux = 132 SOC_DAPM_ENUM("ASP1TX1 SRC", cs35l56_asp1tx1_enum); 133 134 static SOC_VALUE_ENUM_SINGLE_DECL(cs35l56_asp1tx2_enum, 135 CS35L56_ASP1TX2_INPUT, 136 0, CS35L56_ASP_TXn_SRC_MASK, 137 cs35l56_tx_input_texts, 138 cs35l56_tx_input_values); 139 140 static const struct snd_kcontrol_new asp1_tx2_mux = 141 SOC_DAPM_ENUM("ASP1TX2 SRC", cs35l56_asp1tx2_enum); 142 143 static SOC_VALUE_ENUM_SINGLE_DECL(cs35l56_asp1tx3_enum, 144 CS35L56_ASP1TX3_INPUT, 145 0, CS35L56_ASP_TXn_SRC_MASK, 146 cs35l56_tx_input_texts, 147 cs35l56_tx_input_values); 148 149 static const struct snd_kcontrol_new asp1_tx3_mux = 150 SOC_DAPM_ENUM("ASP1TX3 SRC", cs35l56_asp1tx3_enum); 151 152 static SOC_VALUE_ENUM_SINGLE_DECL(cs35l56_asp1tx4_enum, 153 CS35L56_ASP1TX4_INPUT, 154 0, CS35L56_ASP_TXn_SRC_MASK, 155 cs35l56_tx_input_texts, 156 cs35l56_tx_input_values); 157 158 static const struct snd_kcontrol_new asp1_tx4_mux = 159 SOC_DAPM_ENUM("ASP1TX4 SRC", cs35l56_asp1tx4_enum); 160 161 static SOC_VALUE_ENUM_SINGLE_DECL(cs35l56_sdw1tx1_enum, 162 CS35L56_SWIRE_DP3_CH1_INPUT, 163 0, CS35L56_SWIRETXn_SRC_MASK, 164 cs35l56_tx_input_texts, 165 cs35l56_tx_input_values); 166 167 static const struct snd_kcontrol_new sdw1_tx1_mux = 168 SOC_DAPM_ENUM("SDW1TX1 SRC", cs35l56_sdw1tx1_enum); 169 170 static SOC_VALUE_ENUM_SINGLE_DECL(cs35l56_sdw1tx2_enum, 171 CS35L56_SWIRE_DP3_CH2_INPUT, 172 0, CS35L56_SWIRETXn_SRC_MASK, 173 cs35l56_tx_input_texts, 174 cs35l56_tx_input_values); 175 176 static const struct snd_kcontrol_new sdw1_tx2_mux = 177 SOC_DAPM_ENUM("SDW1TX2 SRC", cs35l56_sdw1tx2_enum); 178 179 static SOC_VALUE_ENUM_SINGLE_DECL(cs35l56_sdw1tx3_enum, 180 CS35L56_SWIRE_DP3_CH3_INPUT, 181 0, CS35L56_SWIRETXn_SRC_MASK, 182 cs35l56_tx_input_texts, 183 cs35l56_tx_input_values); 184 185 static const struct snd_kcontrol_new sdw1_tx3_mux = 186 SOC_DAPM_ENUM("SDW1TX3 SRC", cs35l56_sdw1tx3_enum); 187 188 static SOC_VALUE_ENUM_SINGLE_DECL(cs35l56_sdw1tx4_enum, 189 CS35L56_SWIRE_DP3_CH4_INPUT, 190 0, CS35L56_SWIRETXn_SRC_MASK, 191 cs35l56_tx_input_texts, 192 cs35l56_tx_input_values); 193 194 static const struct snd_kcontrol_new sdw1_tx4_mux = 195 SOC_DAPM_ENUM("SDW1TX4 SRC", cs35l56_sdw1tx4_enum); 196 197 static int cs35l56_play_event(struct snd_soc_dapm_widget *w, 198 struct snd_kcontrol *kcontrol, int event) 199 { 200 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); 201 struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(component); 202 unsigned int val; 203 int ret; 204 205 dev_dbg(cs35l56->base.dev, "play: %d\n", event); 206 207 switch (event) { 208 case SND_SOC_DAPM_PRE_PMU: 209 /* Don't wait for ACK, we check in POST_PMU that it completed */ 210 return regmap_write(cs35l56->base.regmap, CS35L56_DSP_VIRTUAL1_MBOX_1, 211 CS35L56_MBOX_CMD_AUDIO_PLAY); 212 case SND_SOC_DAPM_POST_PMU: 213 /* Wait for firmware to enter PS0 power state */ 214 ret = regmap_read_poll_timeout(cs35l56->base.regmap, 215 cs35l56->base.fw_reg->transducer_actual_ps, 216 val, (val == CS35L56_PS0), 217 CS35L56_PS0_POLL_US, 218 CS35L56_PS0_TIMEOUT_US); 219 if (ret) 220 dev_err(cs35l56->base.dev, "PS0 wait failed: %d\n", ret); 221 return ret; 222 case SND_SOC_DAPM_POST_PMD: 223 return cs35l56_mbox_send(&cs35l56->base, CS35L56_MBOX_CMD_AUDIO_PAUSE); 224 default: 225 return 0; 226 } 227 } 228 229 static const struct snd_soc_dapm_widget cs35l56_dapm_widgets[] = { 230 SND_SOC_DAPM_REGULATOR_SUPPLY("VDD_B", 0, 0), 231 SND_SOC_DAPM_REGULATOR_SUPPLY("VDD_AMP", 0, 0), 232 233 SND_SOC_DAPM_SUPPLY("PLAY", SND_SOC_NOPM, 0, 0, cs35l56_play_event, 234 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD), 235 236 SND_SOC_DAPM_OUT_DRV("AMP", SND_SOC_NOPM, 0, 0, NULL, 0), 237 SND_SOC_DAPM_OUTPUT("SPK"), 238 239 SND_SOC_DAPM_PGA_E("DSP1", SND_SOC_NOPM, 0, 0, NULL, 0, cs35l56_dsp_event, 240 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), 241 242 SND_SOC_DAPM_AIF_IN("ASP1RX1", NULL, 0, CS35L56_ASP1_ENABLES1, 243 CS35L56_ASP_RX1_EN_SHIFT, 0), 244 SND_SOC_DAPM_AIF_IN("ASP1RX2", NULL, 1, CS35L56_ASP1_ENABLES1, 245 CS35L56_ASP_RX2_EN_SHIFT, 0), 246 SND_SOC_DAPM_AIF_OUT("ASP1TX1", NULL, 0, CS35L56_ASP1_ENABLES1, 247 CS35L56_ASP_TX1_EN_SHIFT, 0), 248 SND_SOC_DAPM_AIF_OUT("ASP1TX2", NULL, 1, CS35L56_ASP1_ENABLES1, 249 CS35L56_ASP_TX2_EN_SHIFT, 0), 250 SND_SOC_DAPM_AIF_OUT("ASP1TX3", NULL, 2, CS35L56_ASP1_ENABLES1, 251 CS35L56_ASP_TX3_EN_SHIFT, 0), 252 SND_SOC_DAPM_AIF_OUT("ASP1TX4", NULL, 3, CS35L56_ASP1_ENABLES1, 253 CS35L56_ASP_TX4_EN_SHIFT, 0), 254 255 SND_SOC_DAPM_MUX("ASP1 TX1 Source", SND_SOC_NOPM, 0, 0, &asp1_tx1_mux), 256 SND_SOC_DAPM_MUX("ASP1 TX2 Source", SND_SOC_NOPM, 0, 0, &asp1_tx2_mux), 257 SND_SOC_DAPM_MUX("ASP1 TX3 Source", SND_SOC_NOPM, 0, 0, &asp1_tx3_mux), 258 SND_SOC_DAPM_MUX("ASP1 TX4 Source", SND_SOC_NOPM, 0, 0, &asp1_tx4_mux), 259 260 SND_SOC_DAPM_MUX("SDW1 TX1 Source", SND_SOC_NOPM, 0, 0, &sdw1_tx1_mux), 261 SND_SOC_DAPM_MUX("SDW1 TX2 Source", SND_SOC_NOPM, 0, 0, &sdw1_tx2_mux), 262 SND_SOC_DAPM_MUX("SDW1 TX3 Source", SND_SOC_NOPM, 0, 0, &sdw1_tx3_mux), 263 SND_SOC_DAPM_MUX("SDW1 TX4 Source", SND_SOC_NOPM, 0, 0, &sdw1_tx4_mux), 264 265 SND_SOC_DAPM_SIGGEN("VMON ADC"), 266 SND_SOC_DAPM_SIGGEN("IMON ADC"), 267 SND_SOC_DAPM_SIGGEN("ERRVOL ADC"), 268 SND_SOC_DAPM_SIGGEN("CLASSH ADC"), 269 SND_SOC_DAPM_SIGGEN("VDDBMON ADC"), 270 SND_SOC_DAPM_SIGGEN("VBSTMON ADC"), 271 SND_SOC_DAPM_SIGGEN("TEMPMON ADC"), 272 273 SND_SOC_DAPM_INPUT("Calibrate"), 274 }; 275 276 #define CS35L56_SRC_ROUTE(name) \ 277 { name" Source", "ASP1RX1", "ASP1RX1" }, \ 278 { name" Source", "ASP1RX2", "ASP1RX2" }, \ 279 { name" Source", "VMON", "VMON ADC" }, \ 280 { name" Source", "IMON", "IMON ADC" }, \ 281 { name" Source", "ERRVOL", "ERRVOL ADC" }, \ 282 { name" Source", "CLASSH", "CLASSH ADC" }, \ 283 { name" Source", "VDDBMON", "VDDBMON ADC" }, \ 284 { name" Source", "VBSTMON", "VBSTMON ADC" }, \ 285 { name" Source", "DSP1TX1", "DSP1" }, \ 286 { name" Source", "DSP1TX2", "DSP1" }, \ 287 { name" Source", "DSP1TX3", "DSP1" }, \ 288 { name" Source", "DSP1TX4", "DSP1" }, \ 289 { name" Source", "DSP1TX5", "DSP1" }, \ 290 { name" Source", "DSP1TX6", "DSP1" }, \ 291 { name" Source", "DSP1TX7", "DSP1" }, \ 292 { name" Source", "DSP1TX8", "DSP1" }, \ 293 { name" Source", "TEMPMON", "TEMPMON ADC" }, \ 294 { name" Source", "INTERPOLATOR", "AMP" }, \ 295 { name" Source", "SDW1RX1", "SDW1 Playback" }, \ 296 { name" Source", "SDW1RX2", "SDW1 Playback" }, 297 298 static const struct snd_soc_dapm_route cs35l56_audio_map[] = { 299 { "AMP", NULL, "VDD_B" }, 300 { "AMP", NULL, "VDD_AMP" }, 301 302 { "ASP1 Playback", NULL, "PLAY" }, 303 { "SDW1 Playback", NULL, "PLAY" }, 304 305 { "ASP1RX1", NULL, "ASP1 Playback" }, 306 { "ASP1RX2", NULL, "ASP1 Playback" }, 307 { "DSP1", NULL, "ASP1RX1" }, 308 { "DSP1", NULL, "ASP1RX2" }, 309 { "DSP1", NULL, "SDW1 Playback" }, 310 { "DSP1", NULL, "Calibrate" }, 311 { "AMP", NULL, "DSP1" }, 312 { "SPK", NULL, "AMP" }, 313 314 CS35L56_SRC_ROUTE("ASP1 TX1") 315 CS35L56_SRC_ROUTE("ASP1 TX2") 316 CS35L56_SRC_ROUTE("ASP1 TX3") 317 CS35L56_SRC_ROUTE("ASP1 TX4") 318 319 { "ASP1TX1", NULL, "ASP1 TX1 Source" }, 320 { "ASP1TX2", NULL, "ASP1 TX2 Source" }, 321 { "ASP1TX3", NULL, "ASP1 TX3 Source" }, 322 { "ASP1TX4", NULL, "ASP1 TX4 Source" }, 323 { "ASP1 Capture", NULL, "ASP1TX1" }, 324 { "ASP1 Capture", NULL, "ASP1TX2" }, 325 { "ASP1 Capture", NULL, "ASP1TX3" }, 326 { "ASP1 Capture", NULL, "ASP1TX4" }, 327 328 CS35L56_SRC_ROUTE("SDW1 TX1") 329 CS35L56_SRC_ROUTE("SDW1 TX2") 330 CS35L56_SRC_ROUTE("SDW1 TX3") 331 CS35L56_SRC_ROUTE("SDW1 TX4") 332 { "SDW1 Capture", NULL, "SDW1 TX1 Source" }, 333 { "SDW1 Capture", NULL, "SDW1 TX2 Source" }, 334 { "SDW1 Capture", NULL, "SDW1 TX3 Source" }, 335 { "SDW1 Capture", NULL, "SDW1 TX4 Source" }, 336 }; 337 338 static int cs35l56_dsp_event(struct snd_soc_dapm_widget *w, 339 struct snd_kcontrol *kcontrol, int event) 340 { 341 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); 342 struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(component); 343 344 dev_dbg(cs35l56->base.dev, "%s: %d\n", __func__, event); 345 346 return wm_adsp_event(w, kcontrol, event); 347 } 348 349 static int cs35l56_asp_dai_set_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt) 350 { 351 struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(codec_dai->component); 352 unsigned int val; 353 354 dev_dbg(cs35l56->base.dev, "%s: %#x\n", __func__, fmt); 355 356 switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) { 357 case SND_SOC_DAIFMT_CBC_CFC: 358 break; 359 default: 360 dev_err(cs35l56->base.dev, "Unsupported clock source mode\n"); 361 return -EINVAL; 362 } 363 364 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { 365 case SND_SOC_DAIFMT_DSP_A: 366 val = CS35L56_ASP_FMT_DSP_A << CS35L56_ASP_FMT_SHIFT; 367 cs35l56->tdm_mode = true; 368 break; 369 case SND_SOC_DAIFMT_I2S: 370 val = CS35L56_ASP_FMT_I2S << CS35L56_ASP_FMT_SHIFT; 371 cs35l56->tdm_mode = false; 372 break; 373 default: 374 dev_err(cs35l56->base.dev, "Unsupported DAI format\n"); 375 return -EINVAL; 376 } 377 378 switch (fmt & SND_SOC_DAIFMT_INV_MASK) { 379 case SND_SOC_DAIFMT_NB_IF: 380 val |= CS35L56_ASP_FSYNC_INV_MASK; 381 break; 382 case SND_SOC_DAIFMT_IB_NF: 383 val |= CS35L56_ASP_BCLK_INV_MASK; 384 break; 385 case SND_SOC_DAIFMT_IB_IF: 386 val |= CS35L56_ASP_BCLK_INV_MASK | CS35L56_ASP_FSYNC_INV_MASK; 387 break; 388 case SND_SOC_DAIFMT_NB_NF: 389 break; 390 default: 391 dev_err(cs35l56->base.dev, "Invalid clock invert\n"); 392 return -EINVAL; 393 } 394 395 regmap_update_bits(cs35l56->base.regmap, 396 CS35L56_ASP1_CONTROL2, 397 CS35L56_ASP_FMT_MASK | 398 CS35L56_ASP_BCLK_INV_MASK | CS35L56_ASP_FSYNC_INV_MASK, 399 val); 400 401 /* Hi-Z DOUT in unused slots and when all TX are disabled */ 402 regmap_update_bits(cs35l56->base.regmap, CS35L56_ASP1_CONTROL3, 403 CS35L56_ASP1_DOUT_HIZ_CTRL_MASK, 404 CS35L56_ASP_UNUSED_HIZ_OFF_HIZ); 405 406 return 0; 407 } 408 409 static unsigned int cs35l56_make_tdm_config_word(unsigned int reg_val, unsigned long mask) 410 { 411 unsigned int channel_shift; 412 int bit_num; 413 414 /* Enable consecutive TX1..TXn for each of the slots set in mask */ 415 channel_shift = 0; 416 for_each_set_bit(bit_num, &mask, 32) { 417 reg_val &= ~(0x3f << channel_shift); 418 reg_val |= bit_num << channel_shift; 419 channel_shift += 8; 420 } 421 422 return reg_val; 423 } 424 425 static int cs35l56_asp_dai_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask, 426 unsigned int rx_mask, int slots, int slot_width) 427 { 428 struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(dai->component); 429 430 if ((slots == 0) || (slot_width == 0)) { 431 dev_dbg(cs35l56->base.dev, "tdm config cleared\n"); 432 cs35l56->asp_slot_width = 0; 433 cs35l56->asp_slot_count = 0; 434 return 0; 435 } 436 437 if (slot_width > (CS35L56_ASP_RX_WIDTH_MASK >> CS35L56_ASP_RX_WIDTH_SHIFT)) { 438 dev_err(cs35l56->base.dev, "tdm invalid slot width %d\n", slot_width); 439 return -EINVAL; 440 } 441 442 /* More than 32 slots would give an unsupportable BCLK frequency */ 443 if (slots > 32) { 444 dev_err(cs35l56->base.dev, "tdm invalid slot count %d\n", slots); 445 return -EINVAL; 446 } 447 448 cs35l56->asp_slot_width = (u8)slot_width; 449 cs35l56->asp_slot_count = (u8)slots; 450 451 // Note: rx/tx is from point of view of the CPU end 452 if (tx_mask == 0) 453 tx_mask = 0x3; // ASPRX1/RX2 in slots 0 and 1 454 455 if (rx_mask == 0) 456 rx_mask = 0xf; // ASPTX1..TX4 in slots 0..3 457 458 /* Default unused slots to 63 */ 459 regmap_write(cs35l56->base.regmap, CS35L56_ASP1_FRAME_CONTROL1, 460 cs35l56_make_tdm_config_word(0x3f3f3f3f, rx_mask)); 461 regmap_write(cs35l56->base.regmap, CS35L56_ASP1_FRAME_CONTROL5, 462 cs35l56_make_tdm_config_word(0x3f3f3f, tx_mask)); 463 464 dev_dbg(cs35l56->base.dev, "tdm slot width: %u count: %u tx_mask: %#x rx_mask: %#x\n", 465 cs35l56->asp_slot_width, cs35l56->asp_slot_count, tx_mask, rx_mask); 466 467 return 0; 468 } 469 470 static int cs35l56_asp_dai_hw_params(struct snd_pcm_substream *substream, 471 struct snd_pcm_hw_params *params, 472 struct snd_soc_dai *dai) 473 { 474 struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(dai->component); 475 unsigned int rate = params_rate(params); 476 u8 asp_width, asp_wl; 477 478 asp_wl = params_width(params); 479 if (cs35l56->asp_slot_width) 480 asp_width = cs35l56->asp_slot_width; 481 else 482 asp_width = asp_wl; 483 484 dev_dbg(cs35l56->base.dev, "%s: wl=%d, width=%d, rate=%d", 485 __func__, asp_wl, asp_width, rate); 486 487 if (!cs35l56->sysclk_set) { 488 unsigned int slots = cs35l56->asp_slot_count; 489 unsigned int bclk_freq; 490 int freq_id; 491 492 if (slots == 0) { 493 slots = params_channels(params); 494 495 /* I2S always has an even number of slots */ 496 if (!cs35l56->tdm_mode) 497 slots = round_up(slots, 2); 498 } 499 500 bclk_freq = asp_width * slots * rate; 501 freq_id = cs35l56_get_bclk_freq_id(bclk_freq); 502 if (freq_id < 0) { 503 dev_err(cs35l56->base.dev, "%s: Invalid BCLK %u\n", __func__, bclk_freq); 504 return -EINVAL; 505 } 506 507 regmap_update_bits(cs35l56->base.regmap, CS35L56_ASP1_CONTROL1, 508 CS35L56_ASP_BCLK_FREQ_MASK, 509 freq_id << CS35L56_ASP_BCLK_FREQ_SHIFT); 510 } 511 512 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { 513 regmap_update_bits(cs35l56->base.regmap, CS35L56_ASP1_CONTROL2, 514 CS35L56_ASP_RX_WIDTH_MASK, asp_width << 515 CS35L56_ASP_RX_WIDTH_SHIFT); 516 regmap_update_bits(cs35l56->base.regmap, CS35L56_ASP1_DATA_CONTROL5, 517 CS35L56_ASP_RX_WL_MASK, asp_wl); 518 } else { 519 regmap_update_bits(cs35l56->base.regmap, CS35L56_ASP1_CONTROL2, 520 CS35L56_ASP_TX_WIDTH_MASK, asp_width << 521 CS35L56_ASP_TX_WIDTH_SHIFT); 522 regmap_update_bits(cs35l56->base.regmap, CS35L56_ASP1_DATA_CONTROL1, 523 CS35L56_ASP_TX_WL_MASK, asp_wl); 524 } 525 526 return 0; 527 } 528 529 static int cs35l56_asp_dai_set_sysclk(struct snd_soc_dai *dai, 530 int clk_id, unsigned int freq, int dir) 531 { 532 struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(dai->component); 533 int freq_id; 534 535 if (freq == 0) { 536 cs35l56->sysclk_set = false; 537 return 0; 538 } 539 540 freq_id = cs35l56_get_bclk_freq_id(freq); 541 if (freq_id < 0) 542 return freq_id; 543 544 regmap_update_bits(cs35l56->base.regmap, CS35L56_ASP1_CONTROL1, 545 CS35L56_ASP_BCLK_FREQ_MASK, 546 freq_id << CS35L56_ASP_BCLK_FREQ_SHIFT); 547 cs35l56->sysclk_set = true; 548 549 return 0; 550 } 551 552 static const struct snd_soc_dai_ops cs35l56_ops = { 553 .set_fmt = cs35l56_asp_dai_set_fmt, 554 .set_tdm_slot = cs35l56_asp_dai_set_tdm_slot, 555 .hw_params = cs35l56_asp_dai_hw_params, 556 .set_sysclk = cs35l56_asp_dai_set_sysclk, 557 }; 558 559 static void cs35l56_sdw_dai_shutdown(struct snd_pcm_substream *substream, 560 struct snd_soc_dai *dai) 561 { 562 snd_soc_dai_set_dma_data(dai, substream, NULL); 563 } 564 565 static int cs35l56_sdw_dai_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask, 566 unsigned int rx_mask, int slots, int slot_width) 567 { 568 struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(dai->component); 569 570 /* rx/tx are from point of view of the CPU end so opposite to our rx/tx */ 571 cs35l56->rx_mask = tx_mask; 572 cs35l56->tx_mask = rx_mask; 573 574 return 0; 575 } 576 577 static int cs35l56_sdw_dai_hw_params(struct snd_pcm_substream *substream, 578 struct snd_pcm_hw_params *params, 579 struct snd_soc_dai *dai) 580 { 581 struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(dai->component); 582 struct sdw_stream_runtime *sdw_stream = snd_soc_dai_get_dma_data(dai, substream); 583 struct sdw_stream_config sconfig; 584 struct sdw_port_config pconfig; 585 int ret; 586 587 dev_dbg(cs35l56->base.dev, "%s: rate %d\n", __func__, params_rate(params)); 588 589 if (!cs35l56->base.init_done) 590 return -ENODEV; 591 592 if (!sdw_stream) 593 return -EINVAL; 594 595 memset(&sconfig, 0, sizeof(sconfig)); 596 memset(&pconfig, 0, sizeof(pconfig)); 597 598 sconfig.frame_rate = params_rate(params); 599 sconfig.bps = snd_pcm_format_width(params_format(params)); 600 601 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { 602 sconfig.direction = SDW_DATA_DIR_RX; 603 pconfig.num = CS35L56_SDW1_PLAYBACK_PORT; 604 pconfig.ch_mask = cs35l56->rx_mask; 605 } else { 606 sconfig.direction = SDW_DATA_DIR_TX; 607 pconfig.num = CS35L56_SDW1_CAPTURE_PORT; 608 pconfig.ch_mask = cs35l56->tx_mask; 609 } 610 611 if (pconfig.ch_mask == 0) { 612 sconfig.ch_count = params_channels(params); 613 pconfig.ch_mask = GENMASK(sconfig.ch_count - 1, 0); 614 } else { 615 sconfig.ch_count = hweight32(pconfig.ch_mask); 616 } 617 618 ret = sdw_stream_add_slave(cs35l56->sdw_peripheral, &sconfig, &pconfig, 619 1, sdw_stream); 620 if (ret) { 621 dev_err(dai->dev, "Failed to add sdw stream: %d\n", ret); 622 return ret; 623 } 624 625 return 0; 626 } 627 628 static int cs35l56_sdw_dai_hw_free(struct snd_pcm_substream *substream, 629 struct snd_soc_dai *dai) 630 { 631 struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(dai->component); 632 struct sdw_stream_runtime *sdw_stream = snd_soc_dai_get_dma_data(dai, substream); 633 634 if (!cs35l56->sdw_peripheral) 635 return -EINVAL; 636 637 sdw_stream_remove_slave(cs35l56->sdw_peripheral, sdw_stream); 638 639 return 0; 640 } 641 642 static int cs35l56_sdw_dai_set_stream(struct snd_soc_dai *dai, 643 void *sdw_stream, int direction) 644 { 645 snd_soc_dai_dma_data_set(dai, direction, sdw_stream); 646 647 return 0; 648 } 649 650 static const struct snd_soc_dai_ops cs35l56_sdw_dai_ops = { 651 .set_tdm_slot = cs35l56_sdw_dai_set_tdm_slot, 652 .shutdown = cs35l56_sdw_dai_shutdown, 653 .hw_params = cs35l56_sdw_dai_hw_params, 654 .hw_free = cs35l56_sdw_dai_hw_free, 655 .set_stream = cs35l56_sdw_dai_set_stream, 656 }; 657 658 static struct snd_soc_dai_driver cs35l56_dai[] = { 659 { 660 .name = "cs35l56-asp1", 661 .id = 0, 662 .playback = { 663 .stream_name = "ASP1 Playback", 664 .channels_min = 1, 665 .channels_max = 2, 666 .rates = CS35L56_RATES, 667 .formats = CS35L56_RX_FORMATS, 668 }, 669 .capture = { 670 .stream_name = "ASP1 Capture", 671 .channels_min = 1, 672 .channels_max = 4, 673 .rates = CS35L56_RATES, 674 .formats = CS35L56_TX_FORMATS, 675 }, 676 .ops = &cs35l56_ops, 677 .symmetric_rate = 1, 678 .symmetric_sample_bits = 1, 679 }, 680 { 681 .name = "cs35l56-sdw1", 682 .id = 1, 683 .playback = { 684 .stream_name = "SDW1 Playback", 685 .channels_min = 1, 686 .channels_max = 2, 687 .rates = CS35L56_RATES, 688 .formats = CS35L56_RX_FORMATS, 689 }, 690 .symmetric_rate = 1, 691 .ops = &cs35l56_sdw_dai_ops, 692 }, 693 { 694 .name = "cs35l56-sdw1c", 695 .id = 2, 696 .capture = { 697 .stream_name = "SDW1 Capture", 698 .channels_min = 1, 699 .channels_max = 4, 700 .rates = CS35L56_RATES, 701 .formats = CS35L56_TX_FORMATS, 702 }, 703 .symmetric_rate = 1, 704 .ops = &cs35l56_sdw_dai_ops, 705 }, 706 }; 707 708 static int cs35l56_write_cal(struct cs35l56_private *cs35l56) 709 { 710 int ret; 711 712 if (cs35l56->base.secured || !cs35l56->base.cal_data_valid) 713 return -ENODATA; 714 715 ret = wm_adsp_run(&cs35l56->dsp); 716 if (ret) 717 return ret; 718 719 ret = cs_amp_write_cal_coeffs(&cs35l56->dsp.cs_dsp, 720 cs35l56->base.calibration_controls, 721 &cs35l56->base.cal_data); 722 723 wm_adsp_stop(&cs35l56->dsp); 724 725 if (ret == 0) 726 dev_info(cs35l56->base.dev, "Calibration applied\n"); 727 728 return ret; 729 } 730 731 static int cs35l56_dsp_download_and_power_up(struct cs35l56_private *cs35l56, 732 bool load_firmware) 733 { 734 int ret; 735 736 /* 737 * Abort the first load if it didn't find the suffixed bins and 738 * we have an alternate fallback suffix. 739 */ 740 cs35l56->dsp.bin_mandatory = (load_firmware && cs35l56->fallback_fw_suffix); 741 742 ret = wm_adsp_power_up(&cs35l56->dsp, load_firmware); 743 if ((ret == -ENOENT) && cs35l56->dsp.bin_mandatory) { 744 cs35l56->dsp.fwf_suffix = cs35l56->fallback_fw_suffix; 745 cs35l56->fallback_fw_suffix = NULL; 746 cs35l56->dsp.bin_mandatory = false; 747 ret = wm_adsp_power_up(&cs35l56->dsp, load_firmware); 748 } 749 750 if (ret) { 751 dev_dbg(cs35l56->base.dev, "wm_adsp_power_up ret %d\n", ret); 752 return ret; 753 } 754 755 return 0; 756 } 757 758 static void cs35l56_reinit_patch(struct cs35l56_private *cs35l56) 759 { 760 int ret; 761 762 ret = cs35l56_dsp_download_and_power_up(cs35l56, true); 763 if (ret) 764 return; 765 766 cs35l56_write_cal(cs35l56); 767 768 /* Always REINIT after applying patch or coefficients */ 769 cs35l56_mbox_send(&cs35l56->base, CS35L56_MBOX_CMD_AUDIO_REINIT); 770 } 771 772 static void cs35l56_patch(struct cs35l56_private *cs35l56, bool firmware_missing) 773 { 774 int ret; 775 776 /* 777 * Disable SoundWire interrupts to prevent race with IRQ work. 778 * Setting sdw_irq_no_unmask prevents the handler re-enabling 779 * the SoundWire interrupt. 780 */ 781 if (cs35l56->sdw_peripheral) { 782 cs35l56->sdw_irq_no_unmask = true; 783 flush_work(&cs35l56->sdw_irq_work); 784 sdw_write_no_pm(cs35l56->sdw_peripheral, CS35L56_SDW_GEN_INT_MASK_1, 0); 785 sdw_read_no_pm(cs35l56->sdw_peripheral, CS35L56_SDW_GEN_INT_STAT_1); 786 sdw_write_no_pm(cs35l56->sdw_peripheral, CS35L56_SDW_GEN_INT_STAT_1, 0xFF); 787 flush_work(&cs35l56->sdw_irq_work); 788 } 789 790 ret = cs35l56_firmware_shutdown(&cs35l56->base); 791 if (ret) 792 goto err; 793 794 /* 795 * Use wm_adsp to load and apply the firmware patch and coefficient files, 796 * but only if firmware is missing. If firmware is already patched just 797 * power-up wm_adsp without downloading firmware. 798 */ 799 ret = cs35l56_dsp_download_and_power_up(cs35l56, firmware_missing); 800 if (ret) 801 goto err; 802 803 mutex_lock(&cs35l56->base.irq_lock); 804 805 reinit_completion(&cs35l56->init_completion); 806 807 cs35l56->soft_resetting = true; 808 cs35l56_system_reset(&cs35l56->base, !!cs35l56->sdw_peripheral); 809 810 if (cs35l56->sdw_peripheral) { 811 /* 812 * The system-reset causes the CS35L56 to detach from the bus. 813 * Wait for the manager to re-enumerate the CS35L56 and 814 * cs35l56_init() to run again. 815 */ 816 if (!wait_for_completion_timeout(&cs35l56->init_completion, 817 msecs_to_jiffies(5000))) { 818 dev_err(cs35l56->base.dev, "%s: init_completion timed out (SDW)\n", 819 __func__); 820 goto err_unlock; 821 } 822 } else if (cs35l56_init(cs35l56)) { 823 goto err_unlock; 824 } 825 826 /* Check if the firmware is still reported missing */ 827 cs35l56_warn_if_firmware_missing(&cs35l56->base); 828 829 regmap_clear_bits(cs35l56->base.regmap, 830 cs35l56->base.fw_reg->prot_sts, 831 CS35L56_FIRMWARE_MISSING); 832 cs35l56->base.fw_patched = true; 833 834 if (cs35l56_write_cal(cs35l56) == 0) 835 cs35l56_mbox_send(&cs35l56->base, CS35L56_MBOX_CMD_AUDIO_REINIT); 836 837 err_unlock: 838 mutex_unlock(&cs35l56->base.irq_lock); 839 err: 840 /* Re-enable SoundWire interrupts */ 841 if (cs35l56->sdw_peripheral) { 842 cs35l56->sdw_irq_no_unmask = false; 843 sdw_write_no_pm(cs35l56->sdw_peripheral, CS35L56_SDW_GEN_INT_MASK_1, 844 CS35L56_SDW_INT_MASK_CODEC_IRQ); 845 } 846 } 847 848 static void cs35l56_dsp_work(struct work_struct *work) 849 { 850 struct cs35l56_private *cs35l56 = container_of(work, 851 struct cs35l56_private, 852 dsp_work); 853 unsigned int firmware_version; 854 bool firmware_missing; 855 int ret; 856 857 if (!cs35l56->base.init_done) 858 return; 859 860 pm_runtime_get_sync(cs35l56->base.dev); 861 862 ret = cs35l56_read_prot_status(&cs35l56->base, &firmware_missing, &firmware_version); 863 if (ret) 864 goto err; 865 866 /* Populate fw file qualifier with the revision and security state */ 867 kfree(cs35l56->dsp.fwf_name); 868 if (firmware_missing) { 869 cs35l56->dsp.fwf_name = kasprintf(GFP_KERNEL, "%02x-dsp1", cs35l56->base.rev); 870 } else { 871 /* Firmware files must match the running firmware version */ 872 cs35l56->dsp.fwf_name = kasprintf(GFP_KERNEL, 873 "%02x%s-%06x-dsp1", 874 cs35l56->base.rev, 875 cs35l56->base.secured ? "-s" : "", 876 firmware_version); 877 } 878 879 if (!cs35l56->dsp.fwf_name) 880 goto err; 881 882 dev_dbg(cs35l56->base.dev, "DSP fwf name: '%s' system name: '%s'\n", 883 cs35l56->dsp.fwf_name, cs35l56->dsp.system_name); 884 885 /* 886 * The firmware cannot be patched if it is already running from 887 * patch RAM. In this case the firmware files are versioned to 888 * match the running firmware version and will only contain 889 * tunings. We do not need to shutdown the firmware to apply 890 * tunings so can use the lower cost reinit sequence instead. 891 */ 892 if (!firmware_missing) 893 cs35l56_reinit_patch(cs35l56); 894 else 895 cs35l56_patch(cs35l56, firmware_missing); 896 897 cs35l56_log_tuning(&cs35l56->base, &cs35l56->dsp.cs_dsp); 898 err: 899 pm_runtime_put_autosuspend(cs35l56->base.dev); 900 } 901 902 static struct snd_soc_dapm_context *cs35l56_power_up_for_cal(struct cs35l56_private *cs35l56) 903 { 904 struct snd_soc_dapm_context *dapm = snd_soc_component_to_dapm(cs35l56->component); 905 int ret; 906 907 ret = snd_soc_dapm_enable_pin(dapm, "Calibrate"); 908 if (ret) 909 return ERR_PTR(ret); 910 911 snd_soc_dapm_sync(dapm); 912 913 return dapm; 914 } 915 916 static void cs35l56_power_down_after_cal(struct cs35l56_private *cs35l56) 917 { 918 struct snd_soc_dapm_context *dapm = snd_soc_component_to_dapm(cs35l56->component); 919 920 snd_soc_dapm_disable_pin(dapm, "Calibrate"); 921 snd_soc_dapm_sync(dapm); 922 } 923 924 static ssize_t cs35l56_debugfs_calibrate_write(struct file *file, 925 const char __user *from, 926 size_t count, loff_t *ppos) 927 { 928 struct cs35l56_base *cs35l56_base = file->private_data; 929 struct cs35l56_private *cs35l56 = cs35l56_private_from_base(cs35l56_base); 930 struct snd_soc_dapm_context *dapm; 931 ssize_t ret; 932 933 dapm = cs35l56_power_up_for_cal(cs35l56); 934 if (IS_ERR(dapm)) 935 return PTR_ERR(dapm); 936 937 snd_soc_dapm_mutex_lock(dapm); 938 ret = cs35l56_calibrate_debugfs_write(&cs35l56->base, from, count, ppos); 939 snd_soc_dapm_mutex_unlock(dapm); 940 941 cs35l56_power_down_after_cal(cs35l56); 942 943 return ret; 944 } 945 946 static ssize_t cs35l56_debugfs_cal_temperature_write(struct file *file, 947 const char __user *from, 948 size_t count, loff_t *ppos) 949 { 950 struct cs35l56_base *cs35l56_base = file->private_data; 951 struct cs35l56_private *cs35l56 = cs35l56_private_from_base(cs35l56_base); 952 struct snd_soc_dapm_context *dapm; 953 ssize_t ret; 954 955 dapm = cs35l56_power_up_for_cal(cs35l56); 956 if (IS_ERR(dapm)) 957 return PTR_ERR(dapm); 958 959 ret = cs35l56_cal_ambient_debugfs_write(&cs35l56->base, from, count, ppos); 960 cs35l56_power_down_after_cal(cs35l56); 961 962 return ret; 963 } 964 965 static ssize_t cs35l56_debugfs_cal_data_read(struct file *file, 966 char __user *to, 967 size_t count, loff_t *ppos) 968 { 969 struct cs35l56_base *cs35l56_base = file->private_data; 970 struct cs35l56_private *cs35l56 = cs35l56_private_from_base(cs35l56_base); 971 struct snd_soc_dapm_context *dapm; 972 ssize_t ret; 973 974 dapm = cs35l56_power_up_for_cal(cs35l56); 975 if (IS_ERR(dapm)) 976 return PTR_ERR(dapm); 977 978 ret = cs35l56_cal_data_debugfs_read(&cs35l56->base, to, count, ppos); 979 cs35l56_power_down_after_cal(cs35l56); 980 981 return ret; 982 } 983 984 static int cs35l56_new_cal_data_apply(struct cs35l56_private *cs35l56) 985 { 986 struct snd_soc_dapm_context *dapm; 987 int ret; 988 989 if (!cs35l56->base.cal_data_valid) 990 return -ENXIO; 991 992 if (cs35l56->base.secured) 993 return -EACCES; 994 995 dapm = cs35l56_power_up_for_cal(cs35l56); 996 if (IS_ERR(dapm)) 997 return PTR_ERR(dapm); 998 999 snd_soc_dapm_mutex_lock(dapm); 1000 ret = cs_amp_write_cal_coeffs(&cs35l56->dsp.cs_dsp, 1001 cs35l56->base.calibration_controls, 1002 &cs35l56->base.cal_data); 1003 if (ret == 0) 1004 cs35l56_mbox_send(&cs35l56->base, CS35L56_MBOX_CMD_AUDIO_REINIT); 1005 else 1006 ret = -EIO; 1007 1008 snd_soc_dapm_mutex_unlock(dapm); 1009 cs35l56_power_down_after_cal(cs35l56); 1010 1011 return ret; 1012 } 1013 1014 static ssize_t cs35l56_debugfs_cal_data_write(struct file *file, 1015 const char __user *from, 1016 size_t count, loff_t *ppos) 1017 { 1018 struct cs35l56_base *cs35l56_base = file->private_data; 1019 struct cs35l56_private *cs35l56 = cs35l56_private_from_base(cs35l56_base); 1020 int ret; 1021 1022 ret = cs35l56_cal_data_debugfs_write(&cs35l56->base, from, count, ppos); 1023 if (ret == -ENODATA) 1024 return count; /* Ignore writes of empty cal blobs */ 1025 else if (ret < 0) 1026 return -EIO; 1027 1028 ret = cs35l56_new_cal_data_apply(cs35l56); 1029 if (ret) 1030 return ret; 1031 1032 return count; 1033 } 1034 1035 static const struct cs35l56_cal_debugfs_fops cs35l56_cal_debugfs_fops = { 1036 .calibrate = { 1037 .write = cs35l56_debugfs_calibrate_write, 1038 }, 1039 .cal_temperature = { 1040 .write = cs35l56_debugfs_cal_temperature_write, 1041 }, 1042 .cal_data = { 1043 .read = cs35l56_debugfs_cal_data_read, 1044 .write = cs35l56_debugfs_cal_data_write, 1045 }, 1046 }; 1047 1048 static int cs35l56_cal_data_rb_ctl_get(struct snd_kcontrol *kcontrol, 1049 struct snd_ctl_elem_value *ucontrol) 1050 { 1051 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); 1052 struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(component); 1053 1054 if (!cs35l56->base.cal_data_valid) 1055 return -ENODATA; 1056 1057 memcpy(ucontrol->value.bytes.data, &cs35l56->base.cal_data, 1058 sizeof(cs35l56->base.cal_data)); 1059 1060 return 0; 1061 } 1062 1063 static int cs35l56_cal_data_ctl_get(struct snd_kcontrol *kcontrol, 1064 struct snd_ctl_elem_value *ucontrol) 1065 { 1066 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); 1067 struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(component); 1068 1069 /* 1070 * This control is write-only but mixer libraries often try to read 1071 * a control before writing it. So we have to implement read. 1072 * Return zeros so a write of valid data will always be a change 1073 * from its "current value". 1074 */ 1075 memset(ucontrol->value.bytes.data, 0, sizeof(cs35l56->base.cal_data)); 1076 1077 return 0; 1078 } 1079 1080 static int cs35l56_cal_data_ctl_set(struct snd_kcontrol *kcontrol, 1081 struct snd_ctl_elem_value *ucontrol) 1082 { 1083 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); 1084 struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(component); 1085 const struct cirrus_amp_cal_data *cal_data = (const void *)ucontrol->value.bytes.data; 1086 int ret; 1087 1088 if (cs35l56->base.cal_data_valid) 1089 return -EACCES; 1090 1091 ret = cs35l56_stash_calibration(&cs35l56->base, cal_data); 1092 if (ret) 1093 return ret; 1094 1095 ret = cs35l56_new_cal_data_apply(cs35l56); 1096 if (ret < 0) 1097 return ret; 1098 1099 return 1; 1100 } 1101 1102 static const struct snd_kcontrol_new cs35l56_cal_data_restore_controls[] = { 1103 SND_SOC_BYTES_E("CAL_DATA", 0, sizeof(struct cirrus_amp_cal_data) / sizeof(u32), 1104 cs35l56_cal_data_ctl_get, cs35l56_cal_data_ctl_set), 1105 SND_SOC_BYTES_E_ACC("CAL_DATA_RB", 0, sizeof(struct cirrus_amp_cal_data) / sizeof(u32), 1106 cs35l56_cal_data_rb_ctl_get, NULL, 1107 SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE), 1108 }; 1109 1110 static int cs35l56_set_fw_suffix(struct cs35l56_private *cs35l56) 1111 { 1112 if (cs35l56->dsp.fwf_suffix) 1113 return 0; 1114 1115 if (!cs35l56->sdw_peripheral) 1116 return 0; 1117 1118 cs35l56->dsp.fwf_suffix = devm_kasprintf(cs35l56->base.dev, GFP_KERNEL, 1119 "l%uu%u", 1120 cs35l56->sdw_link_num, 1121 cs35l56->sdw_unique_id); 1122 if (!cs35l56->dsp.fwf_suffix) 1123 return -ENOMEM; 1124 1125 /* 1126 * There are published firmware files for L56 B0 silicon using 1127 * the ALSA prefix as the filename suffix. Default to trying these 1128 * first, with the new name as an alternate. 1129 */ 1130 if ((cs35l56->base.type == 0x56) && (cs35l56->base.rev == 0xb0)) { 1131 cs35l56->fallback_fw_suffix = cs35l56->dsp.fwf_suffix; 1132 cs35l56->dsp.fwf_suffix = cs35l56->component->name_prefix; 1133 } 1134 1135 return 0; 1136 } 1137 1138 static int cs35l56_component_probe(struct snd_soc_component *component) 1139 { 1140 struct snd_soc_dapm_context *dapm = snd_soc_component_to_dapm(component); 1141 struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(component); 1142 struct dentry *debugfs_root = component->debugfs_root; 1143 unsigned short vendor, device; 1144 int ret; 1145 1146 BUILD_BUG_ON(ARRAY_SIZE(cs35l56_tx_input_texts) != ARRAY_SIZE(cs35l56_tx_input_values)); 1147 1148 if (!cs35l56->dsp.system_name && 1149 (snd_soc_card_get_pci_ssid(component->card, &vendor, &device) == 0)) { 1150 /* Append a speaker qualifier if there is a speaker ID */ 1151 if (cs35l56->speaker_id >= 0) { 1152 cs35l56->dsp.system_name = devm_kasprintf(cs35l56->base.dev, 1153 GFP_KERNEL, 1154 "%04x%04x-spkid%d", 1155 vendor, device, 1156 cs35l56->speaker_id); 1157 } else { 1158 cs35l56->dsp.system_name = devm_kasprintf(cs35l56->base.dev, 1159 GFP_KERNEL, 1160 "%04x%04x", 1161 vendor, device); 1162 } 1163 if (!cs35l56->dsp.system_name) 1164 return -ENOMEM; 1165 } 1166 1167 if (!wait_for_completion_timeout(&cs35l56->init_completion, 1168 msecs_to_jiffies(5000))) { 1169 dev_err(cs35l56->base.dev, "%s: init_completion timed out\n", __func__); 1170 return -ENODEV; 1171 } 1172 1173 cs35l56->dsp.part = kasprintf(GFP_KERNEL, "cs35l%02x", cs35l56->base.type); 1174 if (!cs35l56->dsp.part) 1175 return -ENOMEM; 1176 1177 cs35l56->component = component; 1178 ret = cs35l56_set_fw_suffix(cs35l56); 1179 if (ret) 1180 return ret; 1181 1182 wm_adsp2_component_probe(&cs35l56->dsp, component); 1183 1184 debugfs_create_bool("init_done", 0444, debugfs_root, &cs35l56->base.init_done); 1185 debugfs_create_bool("can_hibernate", 0444, debugfs_root, &cs35l56->base.can_hibernate); 1186 debugfs_create_bool("fw_patched", 0444, debugfs_root, &cs35l56->base.fw_patched); 1187 1188 1189 switch (cs35l56->base.type) { 1190 case 0x54: 1191 case 0x56: 1192 case 0x57: 1193 ret = snd_soc_add_component_controls(component, cs35l56_controls, 1194 ARRAY_SIZE(cs35l56_controls)); 1195 break; 1196 case 0x63: 1197 ret = snd_soc_add_component_controls(component, cs35l63_controls, 1198 ARRAY_SIZE(cs35l63_controls)); 1199 break; 1200 default: 1201 ret = -ENODEV; 1202 break; 1203 } 1204 1205 if (!ret && IS_ENABLED(CONFIG_SND_SOC_CS35L56_CAL_SET_CTRL)) { 1206 ret = snd_soc_add_component_controls(component, 1207 cs35l56_cal_data_restore_controls, 1208 ARRAY_SIZE(cs35l56_cal_data_restore_controls)); 1209 } 1210 1211 if (ret) 1212 return dev_err_probe(cs35l56->base.dev, ret, "unable to add controls\n"); 1213 1214 ret = snd_soc_dapm_disable_pin(dapm, "Calibrate"); 1215 if (ret) 1216 return ret; 1217 1218 if (IS_ENABLED(CONFIG_SND_SOC_CS35L56_CAL_DEBUGFS)) 1219 cs35l56_create_cal_debugfs(&cs35l56->base, &cs35l56_cal_debugfs_fops); 1220 1221 queue_work(cs35l56->dsp_wq, &cs35l56->dsp_work); 1222 1223 return 0; 1224 } 1225 1226 static void cs35l56_component_remove(struct snd_soc_component *component) 1227 { 1228 struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(component); 1229 1230 cancel_work_sync(&cs35l56->dsp_work); 1231 1232 cs35l56_remove_cal_debugfs(&cs35l56->base); 1233 1234 if (cs35l56->dsp.cs_dsp.booted) 1235 wm_adsp_power_down(&cs35l56->dsp); 1236 1237 wm_adsp2_component_remove(&cs35l56->dsp, component); 1238 1239 kfree(cs35l56->dsp.part); 1240 cs35l56->dsp.part = NULL; 1241 1242 kfree(cs35l56->dsp.fwf_name); 1243 cs35l56->dsp.fwf_name = NULL; 1244 1245 cs35l56->component = NULL; 1246 } 1247 1248 static int cs35l56_set_bias_level(struct snd_soc_component *component, 1249 enum snd_soc_bias_level level) 1250 { 1251 struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(component); 1252 struct snd_soc_dapm_context *dapm = snd_soc_component_to_dapm(component); 1253 1254 switch (level) { 1255 case SND_SOC_BIAS_STANDBY: 1256 /* 1257 * Wait for patching to complete when transitioning from 1258 * BIAS_OFF to BIAS_STANDBY 1259 */ 1260 if (snd_soc_dapm_get_bias_level(dapm) == SND_SOC_BIAS_OFF) 1261 cs35l56_wait_dsp_ready(cs35l56); 1262 1263 break; 1264 default: 1265 break; 1266 } 1267 1268 return 0; 1269 } 1270 1271 static const struct snd_soc_component_driver soc_component_dev_cs35l56 = { 1272 .probe = cs35l56_component_probe, 1273 .remove = cs35l56_component_remove, 1274 1275 .dapm_widgets = cs35l56_dapm_widgets, 1276 .num_dapm_widgets = ARRAY_SIZE(cs35l56_dapm_widgets), 1277 .dapm_routes = cs35l56_audio_map, 1278 .num_dapm_routes = ARRAY_SIZE(cs35l56_audio_map), 1279 1280 .set_bias_level = cs35l56_set_bias_level, 1281 1282 .suspend_bias_off = 1, /* see cs35l56_system_resume() */ 1283 }; 1284 1285 static int __maybe_unused cs35l56_runtime_suspend_i2c_spi(struct device *dev) 1286 { 1287 struct cs35l56_private *cs35l56 = dev_get_drvdata(dev); 1288 1289 return cs35l56_runtime_suspend_common(&cs35l56->base); 1290 } 1291 1292 static int __maybe_unused cs35l56_runtime_resume_i2c_spi(struct device *dev) 1293 { 1294 struct cs35l56_private *cs35l56 = dev_get_drvdata(dev); 1295 1296 return cs35l56_runtime_resume_common(&cs35l56->base, false); 1297 } 1298 1299 int cs35l56_system_suspend(struct device *dev) 1300 { 1301 struct cs35l56_private *cs35l56 = dev_get_drvdata(dev); 1302 1303 dev_dbg(dev, "system_suspend\n"); 1304 1305 if (cs35l56->component) 1306 flush_work(&cs35l56->dsp_work); 1307 1308 /* 1309 * The interrupt line is normally shared, but after we start suspending 1310 * we can't check if our device is the source of an interrupt, and can't 1311 * clear it. Prevent this race by temporarily disabling the parent irq 1312 * until we reach _no_irq. 1313 */ 1314 if (cs35l56->base.irq) 1315 disable_irq(cs35l56->base.irq); 1316 1317 return pm_runtime_force_suspend(dev); 1318 } 1319 EXPORT_SYMBOL_GPL(cs35l56_system_suspend); 1320 1321 int cs35l56_system_suspend_late(struct device *dev) 1322 { 1323 struct cs35l56_private *cs35l56 = dev_get_drvdata(dev); 1324 1325 dev_dbg(dev, "system_suspend_late\n"); 1326 1327 /* 1328 * Assert RESET before removing supplies. 1329 * RESET is usually shared by all amps so it must not be asserted until 1330 * all driver instances have done their suspend() stage. 1331 */ 1332 if (cs35l56->base.reset_gpio) { 1333 gpiod_set_value_cansleep(cs35l56->base.reset_gpio, 0); 1334 cs35l56_wait_min_reset_pulse(); 1335 } 1336 1337 regulator_bulk_disable(ARRAY_SIZE(cs35l56->supplies), cs35l56->supplies); 1338 1339 return 0; 1340 } 1341 EXPORT_SYMBOL_GPL(cs35l56_system_suspend_late); 1342 1343 int cs35l56_system_suspend_no_irq(struct device *dev) 1344 { 1345 struct cs35l56_private *cs35l56 = dev_get_drvdata(dev); 1346 1347 dev_dbg(dev, "system_suspend_no_irq\n"); 1348 1349 /* Handlers are now disabled so the parent IRQ can safely be re-enabled. */ 1350 if (cs35l56->base.irq) 1351 enable_irq(cs35l56->base.irq); 1352 1353 return 0; 1354 } 1355 EXPORT_SYMBOL_GPL(cs35l56_system_suspend_no_irq); 1356 1357 int cs35l56_system_resume_no_irq(struct device *dev) 1358 { 1359 struct cs35l56_private *cs35l56 = dev_get_drvdata(dev); 1360 1361 dev_dbg(dev, "system_resume_no_irq\n"); 1362 1363 /* 1364 * WAKE interrupts unmask if the CS35L56 hibernates, which can cause 1365 * spurious interrupts, and the interrupt line is normally shared. 1366 * We can't check if our device is the source of an interrupt, and can't 1367 * clear it, until it has fully resumed. Prevent this race by temporarily 1368 * disabling the parent irq until we complete resume(). 1369 */ 1370 if (cs35l56->base.irq) 1371 disable_irq(cs35l56->base.irq); 1372 1373 return 0; 1374 } 1375 EXPORT_SYMBOL_GPL(cs35l56_system_resume_no_irq); 1376 1377 int cs35l56_system_resume_early(struct device *dev) 1378 { 1379 struct cs35l56_private *cs35l56 = dev_get_drvdata(dev); 1380 int ret; 1381 1382 dev_dbg(dev, "system_resume_early\n"); 1383 1384 /* Ensure a spec-compliant RESET pulse. */ 1385 if (cs35l56->base.reset_gpio) { 1386 gpiod_set_value_cansleep(cs35l56->base.reset_gpio, 0); 1387 cs35l56_wait_min_reset_pulse(); 1388 } 1389 1390 /* Enable supplies before releasing RESET. */ 1391 ret = regulator_bulk_enable(ARRAY_SIZE(cs35l56->supplies), cs35l56->supplies); 1392 if (ret) { 1393 dev_err(dev, "system_resume_early failed to enable supplies: %d\n", ret); 1394 return ret; 1395 } 1396 1397 /* Release shared RESET before drivers start resume(). */ 1398 gpiod_set_value_cansleep(cs35l56->base.reset_gpio, 1); 1399 1400 return 0; 1401 } 1402 EXPORT_SYMBOL_GPL(cs35l56_system_resume_early); 1403 1404 int cs35l56_system_resume(struct device *dev) 1405 { 1406 struct cs35l56_private *cs35l56 = dev_get_drvdata(dev); 1407 int ret; 1408 1409 dev_dbg(dev, "system_resume\n"); 1410 1411 /* 1412 * We might have done a hard reset or the CS35L56 was power-cycled 1413 * so wait for control port to be ready. 1414 */ 1415 cs35l56_wait_control_port_ready(); 1416 1417 /* Undo pm_runtime_force_suspend() before re-enabling the irq */ 1418 ret = pm_runtime_force_resume(dev); 1419 if (cs35l56->base.irq) 1420 enable_irq(cs35l56->base.irq); 1421 1422 if (ret) 1423 return ret; 1424 1425 /* Firmware won't have been loaded if the component hasn't probed */ 1426 if (!cs35l56->component) 1427 return 0; 1428 1429 ret = cs35l56_is_fw_reload_needed(&cs35l56->base); 1430 dev_dbg(cs35l56->base.dev, "fw_reload_needed: %d\n", ret); 1431 if (ret < 1) 1432 return ret; 1433 1434 cs35l56->base.fw_patched = false; 1435 wm_adsp_power_down(&cs35l56->dsp); 1436 queue_work(cs35l56->dsp_wq, &cs35l56->dsp_work); 1437 1438 /* 1439 * suspend_bias_off ensures we are now in BIAS_OFF so there will be 1440 * a BIAS_OFF->BIAS_STANDBY transition to complete dsp patching. 1441 */ 1442 1443 return 0; 1444 } 1445 EXPORT_SYMBOL_GPL(cs35l56_system_resume); 1446 1447 static int cs35l56_control_add_nop(struct wm_adsp *dsp, struct cs_dsp_coeff_ctl *cs_ctl) 1448 { 1449 return 0; 1450 } 1451 1452 static int cs35l56_dsp_init(struct cs35l56_private *cs35l56) 1453 { 1454 struct wm_adsp *dsp; 1455 int ret; 1456 1457 cs35l56->dsp_wq = create_singlethread_workqueue("cs35l56-dsp"); 1458 if (!cs35l56->dsp_wq) 1459 return -ENOMEM; 1460 1461 INIT_WORK(&cs35l56->dsp_work, cs35l56_dsp_work); 1462 1463 dsp = &cs35l56->dsp; 1464 cs35l56_init_cs_dsp(&cs35l56->base, &dsp->cs_dsp); 1465 1466 /* 1467 * dsp->part is filled in later as it is based on the DEVID. In a 1468 * SoundWire system that cannot be read until enumeration has occurred 1469 * and the device has attached. 1470 */ 1471 dsp->fw = 12; 1472 dsp->wmfw_optional = true; 1473 1474 /* 1475 * None of the firmware controls need to be exported so add a no-op 1476 * callback that suppresses creating an ALSA control. 1477 */ 1478 dsp->control_add = &cs35l56_control_add_nop; 1479 1480 dev_dbg(cs35l56->base.dev, "DSP system name: '%s'\n", dsp->system_name); 1481 1482 ret = wm_halo_init(dsp); 1483 if (ret != 0) { 1484 dev_err(cs35l56->base.dev, "wm_halo_init failed\n"); 1485 return ret; 1486 } 1487 1488 return 0; 1489 } 1490 1491 static int cs35l56_get_firmware_uid(struct cs35l56_private *cs35l56) 1492 { 1493 struct device *dev = cs35l56->base.dev; 1494 const char *prop; 1495 int ret; 1496 1497 ret = device_property_read_string(dev, "cirrus,firmware-uid", &prop); 1498 /* If bad sw node property, return 0 and fallback to legacy firmware path */ 1499 if (ret < 0) 1500 return 0; 1501 1502 /* Append a speaker qualifier if there is a speaker ID */ 1503 if (cs35l56->speaker_id >= 0) 1504 cs35l56->dsp.system_name = devm_kasprintf(dev, GFP_KERNEL, "%s-spkid%d", 1505 prop, cs35l56->speaker_id); 1506 else 1507 cs35l56->dsp.system_name = devm_kstrdup(dev, prop, GFP_KERNEL); 1508 1509 if (cs35l56->dsp.system_name == NULL) 1510 return -ENOMEM; 1511 1512 dev_dbg(dev, "Firmware UID: %s\n", cs35l56->dsp.system_name); 1513 1514 return 0; 1515 } 1516 1517 /* 1518 * Some SoundWire laptops have a spk-id-gpios property but it points to 1519 * the wrong ACPI Device node so can't be used to get the GPIO. Try to 1520 * find the SDCA node containing the GpioIo resource and add a GPIO 1521 * mapping to it. 1522 */ 1523 static const struct acpi_gpio_params cs35l56_af01_first_gpio = { 0, 0, false }; 1524 static const struct acpi_gpio_mapping cs35l56_af01_spkid_gpios_mapping[] = { 1525 { "spk-id-gpios", &cs35l56_af01_first_gpio, 1 }, 1526 { } 1527 }; 1528 1529 static void cs35l56_acpi_dev_release_driver_gpios(void *adev) 1530 { 1531 acpi_dev_remove_driver_gpios(adev); 1532 } 1533 1534 static int cs35l56_try_get_broken_sdca_spkid_gpio(struct cs35l56_private *cs35l56) 1535 { 1536 struct fwnode_handle *af01_fwnode; 1537 const union acpi_object *obj; 1538 struct gpio_desc *desc; 1539 int ret; 1540 1541 /* Find the SDCA node containing the GpioIo */ 1542 af01_fwnode = device_get_named_child_node(cs35l56->base.dev, "AF01"); 1543 if (!af01_fwnode) { 1544 dev_dbg(cs35l56->base.dev, "No AF01 node\n"); 1545 return -ENOENT; 1546 } 1547 1548 ret = acpi_dev_get_property(ACPI_COMPANION(cs35l56->base.dev), 1549 "spk-id-gpios", ACPI_TYPE_PACKAGE, &obj); 1550 if (ret) { 1551 dev_dbg(cs35l56->base.dev, "Could not get spk-id-gpios package: %d\n", ret); 1552 fwnode_handle_put(af01_fwnode); 1553 return -ENOENT; 1554 } 1555 1556 /* The broken properties we can handle are a 4-element package (one GPIO) */ 1557 if (obj->package.count != 4) { 1558 dev_warn(cs35l56->base.dev, "Unexpected spk-id element count %d\n", 1559 obj->package.count); 1560 fwnode_handle_put(af01_fwnode); 1561 return -ENOENT; 1562 } 1563 1564 /* Add a GPIO mapping if it doesn't already have one */ 1565 if (!fwnode_property_present(af01_fwnode, "spk-id-gpios")) { 1566 struct acpi_device *adev = to_acpi_device_node(af01_fwnode); 1567 1568 /* 1569 * Can't use devm_acpi_dev_add_driver_gpios() because the 1570 * mapping isn't being added to the node pointed to by 1571 * ACPI_COMPANION(). 1572 */ 1573 ret = acpi_dev_add_driver_gpios(adev, cs35l56_af01_spkid_gpios_mapping); 1574 if (ret) { 1575 fwnode_handle_put(af01_fwnode); 1576 return dev_err_probe(cs35l56->base.dev, ret, 1577 "Failed to add gpio mapping to AF01\n"); 1578 } 1579 1580 ret = devm_add_action_or_reset(cs35l56->base.dev, 1581 cs35l56_acpi_dev_release_driver_gpios, 1582 adev); 1583 if (ret) { 1584 fwnode_handle_put(af01_fwnode); 1585 return ret; 1586 } 1587 1588 dev_dbg(cs35l56->base.dev, "Added spk-id-gpios mapping to AF01\n"); 1589 } 1590 1591 desc = fwnode_gpiod_get_index(af01_fwnode, "spk-id", 0, GPIOD_IN, NULL); 1592 if (IS_ERR(desc)) { 1593 fwnode_handle_put(af01_fwnode); 1594 ret = PTR_ERR(desc); 1595 return dev_err_probe(cs35l56->base.dev, ret, "Get GPIO from AF01 failed\n"); 1596 } 1597 1598 ret = gpiod_get_value_cansleep(desc); 1599 gpiod_put(desc); 1600 1601 if (ret < 0) { 1602 fwnode_handle_put(af01_fwnode); 1603 dev_err_probe(cs35l56->base.dev, ret, "Error reading spk-id GPIO\n"); 1604 return ret; 1605 } 1606 1607 fwnode_handle_put(af01_fwnode); 1608 1609 dev_info(cs35l56->base.dev, "Got spk-id from AF01\n"); 1610 1611 return ret; 1612 } 1613 1614 int cs35l56_common_probe(struct cs35l56_private *cs35l56) 1615 { 1616 int ret; 1617 1618 init_completion(&cs35l56->init_completion); 1619 mutex_init(&cs35l56->base.irq_lock); 1620 cs35l56->base.cal_index = -1; 1621 cs35l56->speaker_id = -ENOENT; 1622 1623 dev_set_drvdata(cs35l56->base.dev, cs35l56); 1624 1625 cs35l56_fill_supply_names(cs35l56->supplies); 1626 ret = devm_regulator_bulk_get(cs35l56->base.dev, ARRAY_SIZE(cs35l56->supplies), 1627 cs35l56->supplies); 1628 if (ret != 0) 1629 return dev_err_probe(cs35l56->base.dev, ret, "Failed to request supplies\n"); 1630 1631 /* Reset could be controlled by the BIOS or shared by multiple amps */ 1632 cs35l56->base.reset_gpio = devm_gpiod_get_optional(cs35l56->base.dev, "reset", 1633 GPIOD_OUT_LOW); 1634 if (IS_ERR(cs35l56->base.reset_gpio)) { 1635 ret = PTR_ERR(cs35l56->base.reset_gpio); 1636 /* 1637 * If RESET is shared the first amp to probe will grab the reset 1638 * line and reset all the amps 1639 */ 1640 if (ret != -EBUSY) 1641 return dev_err_probe(cs35l56->base.dev, ret, "Failed to get reset GPIO\n"); 1642 1643 dev_info(cs35l56->base.dev, "Reset GPIO busy, assume shared reset\n"); 1644 cs35l56->base.reset_gpio = NULL; 1645 } 1646 1647 ret = regulator_bulk_enable(ARRAY_SIZE(cs35l56->supplies), cs35l56->supplies); 1648 if (ret != 0) 1649 return dev_err_probe(cs35l56->base.dev, ret, "Failed to enable supplies\n"); 1650 1651 if (cs35l56->base.reset_gpio) { 1652 /* ACPI can override GPIOD_OUT_LOW flag so force it to start low */ 1653 gpiod_set_value_cansleep(cs35l56->base.reset_gpio, 0); 1654 cs35l56_wait_min_reset_pulse(); 1655 gpiod_set_value_cansleep(cs35l56->base.reset_gpio, 1); 1656 } 1657 1658 ret = cs35l56_get_speaker_id(&cs35l56->base); 1659 if (ACPI_COMPANION(cs35l56->base.dev) && cs35l56->sdw_peripheral && (ret == -ENOENT)) 1660 ret = cs35l56_try_get_broken_sdca_spkid_gpio(cs35l56); 1661 1662 if ((ret < 0) && (ret != -ENOENT)) 1663 goto err; 1664 1665 cs35l56->speaker_id = ret; 1666 1667 ret = cs35l56_get_firmware_uid(cs35l56); 1668 if (ret != 0) 1669 goto err; 1670 1671 ret = cs35l56_dsp_init(cs35l56); 1672 if (ret < 0) { 1673 dev_err_probe(cs35l56->base.dev, ret, "DSP init failed\n"); 1674 goto err; 1675 } 1676 1677 ret = devm_snd_soc_register_component(cs35l56->base.dev, 1678 &soc_component_dev_cs35l56, 1679 cs35l56_dai, ARRAY_SIZE(cs35l56_dai)); 1680 if (ret < 0) { 1681 dev_err_probe(cs35l56->base.dev, ret, "Register codec failed\n"); 1682 goto err; 1683 } 1684 1685 return 0; 1686 1687 err: 1688 gpiod_set_value_cansleep(cs35l56->base.reset_gpio, 0); 1689 regulator_bulk_disable(ARRAY_SIZE(cs35l56->supplies), cs35l56->supplies); 1690 1691 return ret; 1692 } 1693 EXPORT_SYMBOL_NS_GPL(cs35l56_common_probe, "SND_SOC_CS35L56_CORE"); 1694 1695 int cs35l56_init(struct cs35l56_private *cs35l56) 1696 { 1697 int ret; 1698 1699 /* 1700 * Check whether the actions associated with soft reset or one time 1701 * init need to be performed. 1702 */ 1703 if (cs35l56->soft_resetting) 1704 goto post_soft_reset; 1705 1706 if (cs35l56->base.init_done) 1707 return 0; 1708 1709 pm_runtime_set_autosuspend_delay(cs35l56->base.dev, 100); 1710 pm_runtime_use_autosuspend(cs35l56->base.dev); 1711 pm_runtime_set_active(cs35l56->base.dev); 1712 pm_runtime_enable(cs35l56->base.dev); 1713 1714 ret = cs35l56_hw_init(&cs35l56->base); 1715 if (ret < 0) 1716 return ret; 1717 1718 ret = cs35l56_set_patch(&cs35l56->base); 1719 if (ret) 1720 return ret; 1721 1722 ret = cs35l56_get_calibration(&cs35l56->base); 1723 if (ret) 1724 return ret; 1725 1726 if (!cs35l56->base.reset_gpio) { 1727 dev_dbg(cs35l56->base.dev, "No reset gpio: using soft reset\n"); 1728 cs35l56->soft_resetting = true; 1729 cs35l56_system_reset(&cs35l56->base, !!cs35l56->sdw_peripheral); 1730 if (cs35l56->sdw_peripheral) { 1731 /* Keep alive while we wait for re-enumeration */ 1732 pm_runtime_get_noresume(cs35l56->base.dev); 1733 return 0; 1734 } 1735 } 1736 1737 post_soft_reset: 1738 if (cs35l56->soft_resetting) { 1739 cs35l56->soft_resetting = false; 1740 1741 /* Done re-enumerating after one-time init so release the keep-alive */ 1742 if (cs35l56->sdw_peripheral && !cs35l56->base.init_done) 1743 pm_runtime_put_noidle(cs35l56->base.dev); 1744 1745 regcache_mark_dirty(cs35l56->base.regmap); 1746 ret = cs35l56_wait_for_firmware_boot(&cs35l56->base); 1747 if (ret) 1748 return ret; 1749 1750 dev_dbg(cs35l56->base.dev, "Firmware rebooted after soft reset\n"); 1751 1752 regcache_cache_only(cs35l56->base.regmap, false); 1753 } 1754 1755 /* Disable auto-hibernate so that runtime_pm has control */ 1756 ret = cs35l56_mbox_send(&cs35l56->base, CS35L56_MBOX_CMD_PREVENT_AUTO_HIBERNATE); 1757 if (ret) 1758 return ret; 1759 1760 /* Registers could be dirty after soft reset or SoundWire enumeration */ 1761 regcache_sync(cs35l56->base.regmap); 1762 1763 /* Set ASP1 DOUT to high-impedance when it is not transmitting audio data. */ 1764 ret = regmap_set_bits(cs35l56->base.regmap, CS35L56_ASP1_CONTROL3, 1765 CS35L56_ASP1_DOUT_HIZ_CTRL_MASK); 1766 if (ret) 1767 return dev_err_probe(cs35l56->base.dev, ret, "Failed to write ASP1_CONTROL3\n"); 1768 1769 cs35l56->base.init_done = true; 1770 complete(&cs35l56->init_completion); 1771 1772 return 0; 1773 } 1774 EXPORT_SYMBOL_NS_GPL(cs35l56_init, "SND_SOC_CS35L56_CORE"); 1775 1776 void cs35l56_remove(struct cs35l56_private *cs35l56) 1777 { 1778 cs35l56->base.init_done = false; 1779 1780 /* 1781 * WAKE IRQs unmask if CS35L56 hibernates so free the handler to 1782 * prevent it racing with remove(). 1783 */ 1784 if (cs35l56->base.irq) 1785 devm_free_irq(cs35l56->base.dev, cs35l56->base.irq, &cs35l56->base); 1786 1787 destroy_workqueue(cs35l56->dsp_wq); 1788 1789 pm_runtime_dont_use_autosuspend(cs35l56->base.dev); 1790 pm_runtime_suspend(cs35l56->base.dev); 1791 pm_runtime_disable(cs35l56->base.dev); 1792 1793 regcache_cache_only(cs35l56->base.regmap, true); 1794 1795 gpiod_set_value_cansleep(cs35l56->base.reset_gpio, 0); 1796 regulator_bulk_disable(ARRAY_SIZE(cs35l56->supplies), cs35l56->supplies); 1797 } 1798 EXPORT_SYMBOL_NS_GPL(cs35l56_remove, "SND_SOC_CS35L56_CORE"); 1799 1800 #if IS_ENABLED(CONFIG_SND_SOC_CS35L56_I2C) || IS_ENABLED(CONFIG_SND_SOC_CS35L56_SPI) 1801 EXPORT_NS_GPL_DEV_PM_OPS(cs35l56_pm_ops_i2c_spi, SND_SOC_CS35L56_CORE) = { 1802 SET_RUNTIME_PM_OPS(cs35l56_runtime_suspend_i2c_spi, cs35l56_runtime_resume_i2c_spi, NULL) 1803 SYSTEM_SLEEP_PM_OPS(cs35l56_system_suspend, cs35l56_system_resume) 1804 LATE_SYSTEM_SLEEP_PM_OPS(cs35l56_system_suspend_late, cs35l56_system_resume_early) 1805 NOIRQ_SYSTEM_SLEEP_PM_OPS(cs35l56_system_suspend_no_irq, cs35l56_system_resume_no_irq) 1806 }; 1807 #endif 1808 1809 MODULE_DESCRIPTION("ASoC CS35L56 driver"); 1810 MODULE_IMPORT_NS("SND_SOC_CS35L56_SHARED"); 1811 MODULE_IMPORT_NS("SND_SOC_CS_AMP_LIB"); 1812 MODULE_AUTHOR("Richard Fitzgerald <rf@opensource.cirrus.com>"); 1813 MODULE_AUTHOR("Simon Trimmer <simont@opensource.cirrus.com>"); 1814 MODULE_LICENSE("GPL"); 1815