1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef _RESCTRL_H
3 #define _RESCTRL_H
4
5 #include <linux/cacheinfo.h>
6 #include <linux/kernel.h>
7 #include <linux/list.h>
8 #include <linux/pid.h>
9 #include <linux/resctrl_types.h>
10
11 #ifdef CONFIG_ARCH_HAS_CPU_RESCTRL
12 #include <asm/resctrl.h>
13 #endif
14
15 /* CLOSID, RMID value used by the default control group */
16 #define RESCTRL_RESERVED_CLOSID 0
17 #define RESCTRL_RESERVED_RMID 0
18
19 #define RESCTRL_PICK_ANY_CPU -1
20
21 #ifdef CONFIG_PROC_CPU_RESCTRL
22
23 int proc_resctrl_show(struct seq_file *m,
24 struct pid_namespace *ns,
25 struct pid *pid,
26 struct task_struct *tsk);
27
28 #endif
29
30 /* max value for struct rdt_domain's mbps_val */
31 #define MBA_MAX_MBPS U32_MAX
32
33 /* Walk all possible resources, with variants for only controls or monitors. */
34 #define for_each_rdt_resource(_r) \
35 for ((_r) = resctrl_arch_get_resource(0); \
36 (_r) && (_r)->rid < RDT_NUM_RESOURCES; \
37 (_r) = resctrl_arch_get_resource((_r)->rid + 1))
38
39 #define for_each_capable_rdt_resource(r) \
40 for_each_rdt_resource((r)) \
41 if ((r)->alloc_capable || (r)->mon_capable)
42
43 #define for_each_alloc_capable_rdt_resource(r) \
44 for_each_rdt_resource((r)) \
45 if ((r)->alloc_capable)
46
47 #define for_each_mon_capable_rdt_resource(r) \
48 for_each_rdt_resource((r)) \
49 if ((r)->mon_capable)
50
51 enum resctrl_res_level {
52 RDT_RESOURCE_L3,
53 RDT_RESOURCE_L2,
54 RDT_RESOURCE_MBA,
55 RDT_RESOURCE_SMBA,
56 RDT_RESOURCE_PERF_PKG,
57 RDT_RESOURCE_LAST = RDT_RESOURCE_PERF_PKG
58 };
59
60 #define RDT_NUM_RESOURCES (RDT_RESOURCE_LAST + 1)
61
62 /**
63 * enum resctrl_conf_type - The type of configuration.
64 * @CDP_NONE: No prioritisation, both code and data are controlled or monitored.
65 * @CDP_CODE: Configuration applies to instruction fetches.
66 * @CDP_DATA: Configuration applies to reads and writes.
67 */
68 enum resctrl_conf_type {
69 CDP_NONE,
70 CDP_CODE,
71 CDP_DATA,
72 CDP_LAST = CDP_DATA
73 };
74
75 #define CDP_NUM_TYPES (CDP_LAST + 1)
76
77 /*
78 * struct pseudo_lock_region - pseudo-lock region information
79 * @s: Resctrl schema for the resource to which this
80 * pseudo-locked region belongs
81 * @closid: The closid that this pseudo-locked region uses
82 * @d: RDT domain to which this pseudo-locked region
83 * belongs
84 * @cbm: bitmask of the pseudo-locked region
85 * @lock_thread_wq: waitqueue used to wait on the pseudo-locking thread
86 * completion
87 * @thread_done: variable used by waitqueue to test if pseudo-locking
88 * thread completed
89 * @cpu: core associated with the cache on which the setup code
90 * will be run
91 * @line_size: size of the cache lines
92 * @size: size of pseudo-locked region in bytes
93 * @kmem: the kernel memory associated with pseudo-locked region
94 * @minor: minor number of character device associated with this
95 * region
96 * @debugfs_dir: pointer to this region's directory in the debugfs
97 * filesystem
98 * @pm_reqs: Power management QoS requests related to this region
99 */
100 struct pseudo_lock_region {
101 struct resctrl_schema *s;
102 u32 closid;
103 struct rdt_ctrl_domain *d;
104 u32 cbm;
105 wait_queue_head_t lock_thread_wq;
106 int thread_done;
107 int cpu;
108 unsigned int line_size;
109 unsigned int size;
110 void *kmem;
111 unsigned int minor;
112 struct dentry *debugfs_dir;
113 struct list_head pm_reqs;
114 };
115
116 /**
117 * struct resctrl_staged_config - parsed configuration to be applied
118 * @new_ctrl: new ctrl value to be loaded
119 * @have_new_ctrl: whether the user provided new_ctrl is valid
120 */
121 struct resctrl_staged_config {
122 u32 new_ctrl;
123 bool have_new_ctrl;
124 };
125
126 enum resctrl_domain_type {
127 RESCTRL_CTRL_DOMAIN,
128 RESCTRL_MON_DOMAIN,
129 };
130
131 /**
132 * struct rdt_domain_hdr - common header for different domain types
133 * @list: all instances of this resource
134 * @id: unique id for this instance
135 * @type: type of this instance
136 * @rid: resource id for this instance
137 * @cpu_mask: which CPUs share this resource
138 */
139 struct rdt_domain_hdr {
140 struct list_head list;
141 int id;
142 enum resctrl_domain_type type;
143 enum resctrl_res_level rid;
144 struct cpumask cpu_mask;
145 };
146
domain_header_is_valid(struct rdt_domain_hdr * hdr,enum resctrl_domain_type type,enum resctrl_res_level rid)147 static inline bool domain_header_is_valid(struct rdt_domain_hdr *hdr,
148 enum resctrl_domain_type type,
149 enum resctrl_res_level rid)
150 {
151 return !WARN_ON_ONCE(hdr->type != type || hdr->rid != rid);
152 }
153
154 /**
155 * struct rdt_ctrl_domain - group of CPUs sharing a resctrl control resource
156 * @hdr: common header for different domain types
157 * @plr: pseudo-locked region (if any) associated with domain
158 * @staged_config: parsed configuration to be applied
159 * @mbps_val: When mba_sc is enabled, this holds the array of user
160 * specified control values for mba_sc in MBps, indexed
161 * by closid
162 */
163 struct rdt_ctrl_domain {
164 struct rdt_domain_hdr hdr;
165 struct pseudo_lock_region *plr;
166 struct resctrl_staged_config staged_config[CDP_NUM_TYPES];
167 u32 *mbps_val;
168 };
169
170 /**
171 * struct mbm_cntr_cfg - Assignable counter configuration.
172 * @evtid: MBM event to which the counter is assigned. Only valid
173 * if @rdtgroup is not NULL.
174 * @rdtgrp: resctrl group assigned to the counter. NULL if the
175 * counter is free.
176 */
177 struct mbm_cntr_cfg {
178 enum resctrl_event_id evtid;
179 struct rdtgroup *rdtgrp;
180 };
181
182 /**
183 * struct rdt_l3_mon_domain - group of CPUs sharing RDT_RESOURCE_L3 monitoring
184 * @hdr: common header for different domain types
185 * @ci_id: cache info id for this domain
186 * @rmid_busy_llc: bitmap of which limbo RMIDs are above threshold
187 * @mbm_states: Per-event pointer to the MBM event's saved state.
188 * An MBM event's state is an array of struct mbm_state
189 * indexed by RMID on x86 or combined CLOSID, RMID on Arm.
190 * @mbm_over: worker to periodically read MBM h/w counters
191 * @cqm_limbo: worker to periodically read CQM h/w counters
192 * @mbm_work_cpu: worker CPU for MBM h/w counters
193 * @cqm_work_cpu: worker CPU for CQM h/w counters
194 * @cntr_cfg: array of assignable counters' configuration (indexed
195 * by counter ID)
196 */
197 struct rdt_l3_mon_domain {
198 struct rdt_domain_hdr hdr;
199 unsigned int ci_id;
200 unsigned long *rmid_busy_llc;
201 struct mbm_state *mbm_states[QOS_NUM_L3_MBM_EVENTS];
202 struct delayed_work mbm_over;
203 struct delayed_work cqm_limbo;
204 int mbm_work_cpu;
205 int cqm_work_cpu;
206 struct mbm_cntr_cfg *cntr_cfg;
207 };
208
209 /**
210 * struct resctrl_cache - Cache allocation related data
211 * @cbm_len: Length of the cache bit mask
212 * @min_cbm_bits: Minimum number of consecutive bits to be set.
213 * The value 0 means the architecture can support
214 * zero CBM.
215 * @shareable_bits: Bitmask of shareable resource with other
216 * executing entities
217 * @arch_has_sparse_bitmasks: True if a bitmask like f00f is valid.
218 * @arch_has_per_cpu_cfg: True if QOS_CFG register for this cache
219 * level has CPU scope.
220 * @io_alloc_capable: True if portion of the cache can be configured
221 * for I/O traffic.
222 */
223 struct resctrl_cache {
224 unsigned int cbm_len;
225 unsigned int min_cbm_bits;
226 unsigned int shareable_bits;
227 bool arch_has_sparse_bitmasks;
228 bool arch_has_per_cpu_cfg;
229 bool io_alloc_capable;
230 };
231
232 /**
233 * enum membw_throttle_mode - System's memory bandwidth throttling mode
234 * @THREAD_THROTTLE_UNDEFINED: Not relevant to the system
235 * @THREAD_THROTTLE_MAX: Memory bandwidth is throttled at the core
236 * always using smallest bandwidth percentage
237 * assigned to threads, aka "max throttling"
238 * @THREAD_THROTTLE_PER_THREAD: Memory bandwidth is throttled at the thread
239 */
240 enum membw_throttle_mode {
241 THREAD_THROTTLE_UNDEFINED = 0,
242 THREAD_THROTTLE_MAX,
243 THREAD_THROTTLE_PER_THREAD,
244 };
245
246 /**
247 * struct resctrl_membw - Memory bandwidth allocation related data
248 * @min_bw: Minimum memory bandwidth percentage user can request
249 * @max_bw: Maximum memory bandwidth value, used as the reset value
250 * @bw_gran: Granularity at which the memory bandwidth is allocated
251 * @delay_linear: True if memory B/W delay is in linear scale
252 * @arch_needs_linear: True if we can't configure non-linear resources
253 * @throttle_mode: Bandwidth throttling mode when threads request
254 * different memory bandwidths
255 * @mba_sc: True if MBA software controller(mba_sc) is enabled
256 * @mb_map: Mapping of memory B/W percentage to memory B/W delay
257 */
258 struct resctrl_membw {
259 u32 min_bw;
260 u32 max_bw;
261 u32 bw_gran;
262 u32 delay_linear;
263 bool arch_needs_linear;
264 enum membw_throttle_mode throttle_mode;
265 bool mba_sc;
266 u32 *mb_map;
267 };
268
269 struct resctrl_schema;
270
271 enum resctrl_scope {
272 RESCTRL_L2_CACHE = 2,
273 RESCTRL_L3_CACHE = 3,
274 RESCTRL_L3_NODE,
275 RESCTRL_PACKAGE,
276 };
277
278 /**
279 * enum resctrl_schema_fmt - The format user-space provides for a schema.
280 * @RESCTRL_SCHEMA_BITMAP: The schema is a bitmap in hex.
281 * @RESCTRL_SCHEMA_RANGE: The schema is a decimal number.
282 */
283 enum resctrl_schema_fmt {
284 RESCTRL_SCHEMA_BITMAP,
285 RESCTRL_SCHEMA_RANGE,
286 };
287
288 /**
289 * struct resctrl_mon - Monitoring related data of a resctrl resource.
290 * @num_rmid: Number of RMIDs available.
291 * @mbm_cfg_mask: Memory transactions that can be tracked when
292 * bandwidth monitoring events can be configured.
293 * @num_mbm_cntrs: Number of assignable counters.
294 * @mbm_cntr_assignable: Is system capable of supporting counter assignment?
295 * @mbm_assign_on_mkdir: True if counters should automatically be assigned to MBM
296 * events of monitor groups created via mkdir.
297 * @mbm_cntr_configurable: True if assignable counters are configurable.
298 * @mbm_cntr_assign_fixed: True if the counter assignment mode is fixed.
299 */
300 struct resctrl_mon {
301 u32 num_rmid;
302 unsigned int mbm_cfg_mask;
303 int num_mbm_cntrs;
304 bool mbm_cntr_assignable;
305 bool mbm_assign_on_mkdir;
306 bool mbm_cntr_configurable;
307 bool mbm_cntr_assign_fixed;
308 };
309
310 /**
311 * struct rdt_resource - attributes of a resctrl resource
312 * @rid: The index of the resource
313 * @alloc_capable: Is allocation available on this machine
314 * @mon_capable: Is monitor feature available on this machine
315 * @ctrl_scope: Scope of this resource for control functions
316 * @mon_scope: Scope of this resource for monitor functions
317 * @cache: Cache allocation related data
318 * @membw: If the component has bandwidth controls, their properties.
319 * @mon: Monitoring related data.
320 * @ctrl_domains: RCU list of all control domains for this resource
321 * @mon_domains: RCU list of all monitor domains for this resource
322 * @name: Name to use in "schemata" file.
323 * @schema_fmt: Which format string and parser is used for this schema.
324 * @cdp_capable: Is the CDP feature available on this resource
325 */
326 struct rdt_resource {
327 enum resctrl_res_level rid;
328 bool alloc_capable;
329 bool mon_capable;
330 enum resctrl_scope ctrl_scope;
331 enum resctrl_scope mon_scope;
332 struct resctrl_cache cache;
333 struct resctrl_membw membw;
334 struct resctrl_mon mon;
335 struct list_head ctrl_domains;
336 struct list_head mon_domains;
337 char *name;
338 enum resctrl_schema_fmt schema_fmt;
339 bool cdp_capable;
340 };
341
342 /*
343 * Get the resource that exists at this level. If the level is not supported
344 * a dummy/not-capable resource can be returned. Levels >= RDT_NUM_RESOURCES
345 * will return NULL.
346 */
347 struct rdt_resource *resctrl_arch_get_resource(enum resctrl_res_level l);
348
349 /**
350 * struct resctrl_schema - configuration abilities of a resource presented to
351 * user-space
352 * @list: Member of resctrl_schema_all.
353 * @name: The name to use in the "schemata" file.
354 * @fmt_str: Format string to show domain value.
355 * @conf_type: Whether this schema is specific to code/data.
356 * @res: The resource structure exported by the architecture to describe
357 * the hardware that is configured by this schema.
358 * @num_closid: The number of closid that can be used with this schema. When
359 * features like CDP are enabled, this will be lower than the
360 * hardware supports for the resource.
361 */
362 struct resctrl_schema {
363 struct list_head list;
364 char name[8];
365 const char *fmt_str;
366 enum resctrl_conf_type conf_type;
367 struct rdt_resource *res;
368 u32 num_closid;
369 };
370
371 struct resctrl_cpu_defaults {
372 u32 closid;
373 u32 rmid;
374 };
375
376 struct resctrl_mon_config_info {
377 struct rdt_resource *r;
378 struct rdt_l3_mon_domain *d;
379 u32 evtid;
380 u32 mon_config;
381 };
382
383 /**
384 * resctrl_arch_sync_cpu_closid_rmid() - Refresh this CPU's CLOSID and RMID.
385 * Call via IPI.
386 * @info: If non-NULL, a pointer to a struct resctrl_cpu_defaults
387 * specifying the new CLOSID and RMID for tasks in the default
388 * resctrl ctrl and mon group when running on this CPU. If NULL,
389 * this CPU is not re-assigned to a different default group.
390 *
391 * Propagates reassignment of CPUs and/or tasks to different resctrl groups
392 * when requested by the resctrl core code.
393 *
394 * This function records the per-cpu defaults specified by @info (if any),
395 * and then reconfigures the CPU's hardware CLOSID and RMID for subsequent
396 * execution based on @current, in the same way as during a task switch.
397 */
398 void resctrl_arch_sync_cpu_closid_rmid(void *info);
399
400 /**
401 * resctrl_get_default_ctrl() - Return the default control value for this
402 * resource.
403 * @r: The resource whose default control type is queried.
404 */
resctrl_get_default_ctrl(struct rdt_resource * r)405 static inline u32 resctrl_get_default_ctrl(struct rdt_resource *r)
406 {
407 switch (r->schema_fmt) {
408 case RESCTRL_SCHEMA_BITMAP:
409 return BIT_MASK(r->cache.cbm_len) - 1;
410 case RESCTRL_SCHEMA_RANGE:
411 return r->membw.max_bw;
412 }
413
414 return WARN_ON_ONCE(1);
415 }
416
417 /* The number of closid supported by this resource regardless of CDP */
418 u32 resctrl_arch_get_num_closid(struct rdt_resource *r);
419 u32 resctrl_arch_system_num_rmid_idx(void);
420 int resctrl_arch_update_domains(struct rdt_resource *r, u32 closid);
421
422 bool resctrl_enable_mon_event(enum resctrl_event_id eventid, bool any_cpu,
423 unsigned int binary_bits, void *arch_priv);
424
425 bool resctrl_is_mon_event_enabled(enum resctrl_event_id eventid);
426
427 bool resctrl_arch_is_evt_configurable(enum resctrl_event_id evt);
428
resctrl_is_mbm_event(enum resctrl_event_id eventid)429 static inline bool resctrl_is_mbm_event(enum resctrl_event_id eventid)
430 {
431 return (eventid >= QOS_L3_MBM_TOTAL_EVENT_ID &&
432 eventid <= QOS_L3_MBM_LOCAL_EVENT_ID);
433 }
434
435 u32 resctrl_get_mon_evt_cfg(enum resctrl_event_id eventid);
436
437 /* Iterate over all memory bandwidth events */
438 #define for_each_mbm_event_id(eventid) \
439 for (eventid = QOS_L3_MBM_TOTAL_EVENT_ID; \
440 eventid <= QOS_L3_MBM_LOCAL_EVENT_ID; eventid++)
441
442 /* Iterate over memory bandwidth arrays in domain structures */
443 #define for_each_mbm_idx(idx) \
444 for (idx = 0; idx < QOS_NUM_L3_MBM_EVENTS; idx++)
445
446 /**
447 * resctrl_arch_mon_event_config_write() - Write the config for an event.
448 * @config_info: struct resctrl_mon_config_info describing the resource, domain
449 * and event.
450 *
451 * Reads resource, domain and eventid from @config_info and writes the
452 * event config_info->mon_config into hardware.
453 *
454 * Called via IPI to reach a CPU that is a member of the specified domain.
455 */
456 void resctrl_arch_mon_event_config_write(void *config_info);
457
458 /**
459 * resctrl_arch_mon_event_config_read() - Read the config for an event.
460 * @config_info: struct resctrl_mon_config_info describing the resource, domain
461 * and event.
462 *
463 * Reads resource, domain and eventid from @config_info and reads the
464 * hardware config value into config_info->mon_config.
465 *
466 * Called via IPI to reach a CPU that is a member of the specified domain.
467 */
468 void resctrl_arch_mon_event_config_read(void *config_info);
469
470 /* For use by arch code to remap resctrl's smaller CDP CLOSID range */
resctrl_get_config_index(u32 closid,enum resctrl_conf_type type)471 static inline u32 resctrl_get_config_index(u32 closid,
472 enum resctrl_conf_type type)
473 {
474 switch (type) {
475 default:
476 case CDP_NONE:
477 return closid;
478 case CDP_CODE:
479 return closid * 2 + 1;
480 case CDP_DATA:
481 return closid * 2;
482 }
483 }
484
485 bool resctrl_arch_get_cdp_enabled(enum resctrl_res_level l);
486 int resctrl_arch_set_cdp_enabled(enum resctrl_res_level l, bool enable);
487
488 /**
489 * resctrl_arch_mbm_cntr_assign_enabled() - Check if MBM counter assignment
490 * mode is enabled.
491 * @r: Pointer to the resource structure.
492 *
493 * Return:
494 * true if the assignment mode is enabled, false otherwise.
495 */
496 bool resctrl_arch_mbm_cntr_assign_enabled(struct rdt_resource *r);
497
498 /**
499 * resctrl_arch_mbm_cntr_assign_set() - Configure the MBM counter assignment mode.
500 * @r: Pointer to the resource structure.
501 * @enable: Set to true to enable, false to disable the assignment mode.
502 *
503 * Return:
504 * 0 on success, < 0 on error.
505 */
506 int resctrl_arch_mbm_cntr_assign_set(struct rdt_resource *r, bool enable);
507
508 /**
509 * resctrl_arch_preconvert_bw() - Prepare bandwidth control value for arch use.
510 * @r: Resource whose schema was written.
511 * @val: Bandwidth control value written to the schemata file by userspace.
512 *
513 * Convert the user provided bandwidth control value to an appropriate form for
514 * consumption by the hardware driver for resource @r. Converted value is stored
515 * in rdt_ctrl_domain::staged_config[] for later consumption by
516 * resctrl_arch_update_domains(). Is not called when MBA software controller is
517 * enabled.
518 *
519 * Architectures for which this pre-conversion hook is not useful should supply
520 * an implementation of this function that just returns @val unmodified.
521 *
522 * Return:
523 * The converted value.
524 */
525 u32 resctrl_arch_preconvert_bw(const struct rdt_resource *r, u32 val);
526
527 /*
528 * Update the ctrl_val and apply this config right now.
529 * Must be called on one of the domain's CPUs.
530 */
531 int resctrl_arch_update_one(struct rdt_resource *r, struct rdt_ctrl_domain *d,
532 u32 closid, enum resctrl_conf_type t, u32 cfg_val);
533
534 u32 resctrl_arch_get_config(struct rdt_resource *r, struct rdt_ctrl_domain *d,
535 u32 closid, enum resctrl_conf_type type);
536 int resctrl_online_ctrl_domain(struct rdt_resource *r, struct rdt_ctrl_domain *d);
537 int resctrl_online_mon_domain(struct rdt_resource *r, struct rdt_domain_hdr *hdr);
538 void resctrl_offline_ctrl_domain(struct rdt_resource *r, struct rdt_ctrl_domain *d);
539 void resctrl_offline_mon_domain(struct rdt_resource *r, struct rdt_domain_hdr *hdr);
540 void resctrl_online_cpu(unsigned int cpu);
541 void resctrl_offline_cpu(unsigned int cpu);
542
543 /*
544 * Architecture hook called at beginning of first file system mount attempt.
545 * No locks are held.
546 */
547 void resctrl_arch_pre_mount(void);
548
549 /**
550 * resctrl_arch_rmid_read() - Read the eventid counter corresponding to rmid
551 * for this resource and domain.
552 * @r: resource that the counter should be read from.
553 * @hdr: Header of domain that the counter should be read from.
554 * @closid: closid that matches the rmid. Depending on the architecture, the
555 * counter may match traffic of both @closid and @rmid, or @rmid
556 * only.
557 * @rmid: rmid of the counter to read.
558 * @eventid: eventid to read, e.g. L3 occupancy.
559 * @arch_priv: Architecture private data for this event.
560 * The @arch_priv provided by the architecture via
561 * resctrl_enable_mon_event().
562 * @val: result of the counter read in bytes.
563 * @arch_mon_ctx: An architecture specific value from
564 * resctrl_arch_mon_ctx_alloc(), for MPAM this identifies
565 * the hardware monitor allocated for this read request.
566 *
567 * Some architectures need to sleep when first programming some of the counters.
568 * (specifically: arm64's MPAM cache occupancy counters can return 'not ready'
569 * for a short period of time). Call from a non-migrateable process context on
570 * a CPU that belongs to domain @d. e.g. use smp_call_on_cpu() or
571 * schedule_work_on(). This function can be called with interrupts masked,
572 * e.g. using smp_call_function_any(), but may consistently return an error.
573 *
574 * Return:
575 * 0 on success, or -EIO, -EINVAL etc on error.
576 */
577 int resctrl_arch_rmid_read(struct rdt_resource *r, struct rdt_domain_hdr *hdr,
578 u32 closid, u32 rmid, enum resctrl_event_id eventid,
579 void *arch_priv, u64 *val, void *arch_mon_ctx);
580
581 /**
582 * resctrl_arch_rmid_read_context_check() - warn about invalid contexts
583 *
584 * When built with CONFIG_DEBUG_ATOMIC_SLEEP generate a warning when
585 * resctrl_arch_rmid_read() is called with preemption disabled.
586 *
587 * The contract with resctrl_arch_rmid_read() is that if interrupts
588 * are unmasked, it can sleep. This allows NOHZ_FULL systems to use an
589 * IPI, (and fail if the call needed to sleep), while most of the time
590 * the work is scheduled, allowing the call to sleep.
591 */
resctrl_arch_rmid_read_context_check(void)592 static inline void resctrl_arch_rmid_read_context_check(void)
593 {
594 if (!irqs_disabled())
595 might_sleep();
596 }
597
598 /**
599 * resctrl_find_domain() - Search for a domain id in a resource domain list.
600 * @h: The domain list to search.
601 * @id: The domain id to search for.
602 * @pos: A pointer to position in the list id should be inserted.
603 *
604 * Search the domain list to find the domain id. If the domain id is
605 * found, return the domain. NULL otherwise. If the domain id is not
606 * found (and NULL returned) then the first domain with id bigger than
607 * the input id can be returned to the caller via @pos.
608 */
609 struct rdt_domain_hdr *resctrl_find_domain(struct list_head *h, int id,
610 struct list_head **pos);
611
612 /**
613 * resctrl_arch_reset_rmid() - Reset any private state associated with rmid
614 * and eventid.
615 * @r: The domain's resource.
616 * @d: The rmid's domain.
617 * @closid: closid that matches the rmid. Depending on the architecture, the
618 * counter may match traffic of both @closid and @rmid, or @rmid only.
619 * @rmid: The rmid whose counter values should be reset.
620 * @eventid: The eventid whose counter values should be reset.
621 *
622 * This can be called from any CPU.
623 */
624 void resctrl_arch_reset_rmid(struct rdt_resource *r, struct rdt_l3_mon_domain *d,
625 u32 closid, u32 rmid,
626 enum resctrl_event_id eventid);
627
628 /**
629 * resctrl_arch_reset_rmid_all() - Reset all private state associated with
630 * all rmids and eventids.
631 * @r: The resctrl resource.
632 * @d: The domain for which all architectural counter state will
633 * be cleared.
634 *
635 * This can be called from any CPU.
636 */
637 void resctrl_arch_reset_rmid_all(struct rdt_resource *r, struct rdt_l3_mon_domain *d);
638
639 /**
640 * resctrl_arch_reset_all_ctrls() - Reset the control for each CLOSID to its
641 * default.
642 * @r: The resctrl resource to reset.
643 *
644 * This can be called from any CPU.
645 */
646 void resctrl_arch_reset_all_ctrls(struct rdt_resource *r);
647
648 /**
649 * resctrl_arch_config_cntr() - Configure the counter with its new RMID
650 * and event details.
651 * @r: Resource structure.
652 * @d: The domain in which counter with ID @cntr_id should be configured.
653 * @evtid: Monitoring event type (e.g., QOS_L3_MBM_TOTAL_EVENT_ID
654 * or QOS_L3_MBM_LOCAL_EVENT_ID).
655 * @rmid: RMID.
656 * @closid: CLOSID.
657 * @cntr_id: Counter ID to configure.
658 * @assign: True to assign the counter or update an existing assignment,
659 * false to unassign the counter.
660 *
661 * This can be called from any CPU.
662 */
663 void resctrl_arch_config_cntr(struct rdt_resource *r, struct rdt_l3_mon_domain *d,
664 enum resctrl_event_id evtid, u32 rmid, u32 closid,
665 u32 cntr_id, bool assign);
666
667 /**
668 * resctrl_arch_cntr_read() - Read the event data corresponding to the counter ID
669 * assigned to the RMID, event pair for this resource
670 * and domain.
671 * @r: Resource that the counter should be read from.
672 * @d: Domain that the counter should be read from.
673 * @closid: CLOSID that matches the RMID.
674 * @rmid: The RMID to which @cntr_id is assigned.
675 * @cntr_id: The counter to read.
676 * @eventid: The MBM event to which @cntr_id is assigned.
677 * @val: Result of the counter read in bytes.
678 *
679 * Called on a CPU that belongs to domain @d when "mbm_event" mode is enabled.
680 * Called from a non-migrateable process context via smp_call_on_cpu() unless all
681 * CPUs are nohz_full, in which case it is called via IPI (smp_call_function_any()).
682 *
683 * Return:
684 * 0 on success, or -EIO, -EINVAL etc on error.
685 */
686 int resctrl_arch_cntr_read(struct rdt_resource *r, struct rdt_l3_mon_domain *d,
687 u32 closid, u32 rmid, int cntr_id,
688 enum resctrl_event_id eventid, u64 *val);
689
690 /**
691 * resctrl_arch_reset_cntr() - Reset any private state associated with counter ID.
692 * @r: The domain's resource.
693 * @d: The counter ID's domain.
694 * @closid: CLOSID that matches the RMID.
695 * @rmid: The RMID to which @cntr_id is assigned.
696 * @cntr_id: The counter to reset.
697 * @eventid: The MBM event to which @cntr_id is assigned.
698 *
699 * This can be called from any CPU.
700 */
701 void resctrl_arch_reset_cntr(struct rdt_resource *r, struct rdt_l3_mon_domain *d,
702 u32 closid, u32 rmid, int cntr_id,
703 enum resctrl_event_id eventid);
704
705 /**
706 * resctrl_arch_io_alloc_enable() - Enable/disable io_alloc feature.
707 * @r: The resctrl resource.
708 * @enable: Enable (true) or disable (false) io_alloc on resource @r.
709 *
710 * This can be called from any CPU.
711 *
712 * Return:
713 * 0 on success, <0 on error.
714 */
715 int resctrl_arch_io_alloc_enable(struct rdt_resource *r, bool enable);
716
717 /**
718 * resctrl_arch_get_io_alloc_enabled() - Get io_alloc feature state.
719 * @r: The resctrl resource.
720 *
721 * Return:
722 * true if io_alloc is enabled or false if disabled.
723 */
724 bool resctrl_arch_get_io_alloc_enabled(struct rdt_resource *r);
725
726 extern unsigned int resctrl_rmid_realloc_threshold;
727 extern unsigned int resctrl_rmid_realloc_limit;
728
729 int resctrl_init(void);
730 void resctrl_exit(void);
731
732 #ifdef CONFIG_RESCTRL_FS_PSEUDO_LOCK
733 u64 resctrl_arch_get_prefetch_disable_bits(void);
734 int resctrl_arch_pseudo_lock_fn(void *_plr);
735 int resctrl_arch_measure_cycles_lat_fn(void *_plr);
736 int resctrl_arch_measure_l2_residency(void *_plr);
737 int resctrl_arch_measure_l3_residency(void *_plr);
738 #else
resctrl_arch_get_prefetch_disable_bits(void)739 static inline u64 resctrl_arch_get_prefetch_disable_bits(void) { return 0; }
resctrl_arch_pseudo_lock_fn(void * _plr)740 static inline int resctrl_arch_pseudo_lock_fn(void *_plr) { return 0; }
resctrl_arch_measure_cycles_lat_fn(void * _plr)741 static inline int resctrl_arch_measure_cycles_lat_fn(void *_plr) { return 0; }
resctrl_arch_measure_l2_residency(void * _plr)742 static inline int resctrl_arch_measure_l2_residency(void *_plr) { return 0; }
resctrl_arch_measure_l3_residency(void * _plr)743 static inline int resctrl_arch_measure_l3_residency(void *_plr) { return 0; }
744 #endif /* CONFIG_RESCTRL_FS_PSEUDO_LOCK */
745 #endif /* _RESCTRL_H */
746