1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Routines common to most mpc85xx-based boards.
4 */
5
6 #include <linux/of.h>
7 #include <linux/of_irq.h>
8 #include <linux/of_platform.h>
9
10 #include <asm/fsl_pm.h>
11 #include <soc/fsl/qe/qe.h>
12 #include <sysdev/cpm2_pic.h>
13
14 #include "mpc85xx.h"
15
16 const struct fsl_pm_ops *qoriq_pm_ops;
17
18 static const struct of_device_id mpc85xx_common_ids[] __initconst = {
19 { .type = "soc", },
20 { .compatible = "soc", },
21 { .compatible = "simple-bus", },
22 { .name = "cpm", },
23 { .name = "localbus", },
24 { .compatible = "gianfar", },
25 { .compatible = "fsl,qe", },
26 { .compatible = "fsl,cpm2", },
27 { .compatible = "fsl,srio", },
28 /* So that the DMA channel nodes can be probed individually: */
29 { .compatible = "fsl,eloplus-dma", },
30 /* For the PMC driver */
31 { .compatible = "fsl,mpc8548-guts", },
32 /* Probably unnecessary? */
33 { .compatible = "gpio-leds", },
34 /* For all PCI controllers */
35 { .compatible = "fsl,mpc8540-pci", },
36 { .compatible = "fsl,mpc8548-pcie", },
37 { .compatible = "fsl,p1022-pcie", },
38 { .compatible = "fsl,p1010-pcie", },
39 { .compatible = "fsl,p1023-pcie", },
40 { .compatible = "fsl,p4080-pcie", },
41 { .compatible = "fsl,qoriq-pcie-v2.4", },
42 { .compatible = "fsl,qoriq-pcie-v2.3", },
43 { .compatible = "fsl,qoriq-pcie-v2.2", },
44 { .compatible = "fsl,fman", },
45 /* IFC NAND and NOR controllers */
46 { .compatible = "fsl,ifc", },
47 {},
48 };
49
mpc85xx_common_publish_devices(void)50 int __init mpc85xx_common_publish_devices(void)
51 {
52 return of_platform_bus_probe(NULL, mpc85xx_common_ids, NULL);
53 }
54 #ifdef CONFIG_CPM2
cpm2_cascade(struct irq_desc * desc)55 static void cpm2_cascade(struct irq_desc *desc)
56 {
57 struct irq_chip *chip = irq_desc_get_chip(desc);
58 int cascade_irq;
59
60 while ((cascade_irq = cpm2_get_irq()) >= 0)
61 generic_handle_irq(cascade_irq);
62
63 chip->irq_eoi(&desc->irq_data);
64 }
65
66
mpc85xx_cpm2_pic_init(void)67 void __init mpc85xx_cpm2_pic_init(void)
68 {
69 struct device_node *np;
70 int irq;
71
72 /* Setup CPM2 PIC */
73 np = of_find_compatible_node(NULL, NULL, "fsl,cpm2-pic");
74 if (np == NULL) {
75 printk(KERN_ERR "PIC init: can not find fsl,cpm2-pic node\n");
76 return;
77 }
78 irq = irq_of_parse_and_map(np, 0);
79 if (!irq) {
80 of_node_put(np);
81 printk(KERN_ERR "PIC init: got no IRQ for cpm cascade\n");
82 return;
83 }
84
85 cpm2_pic_init(np);
86 of_node_put(np);
87 irq_set_chained_handler(irq, cpm2_cascade);
88 }
89 #endif
90
91 #ifdef CONFIG_QUICC_ENGINE
mpc85xx_qe_par_io_init(void)92 void __init mpc85xx_qe_par_io_init(void)
93 {
94 struct device_node *np;
95
96 np = of_find_node_by_name(NULL, "par_io");
97 if (np) {
98 struct device_node *ucc;
99
100 par_io_init(np);
101 of_node_put(np);
102
103 for_each_node_by_name(ucc, "ucc")
104 par_io_of_config(ucc);
105
106 }
107 }
108 #endif
109