1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright (c) 2012, The Linux Foundation. All rights reserved. 4 */ 5 6 #include <linux/acpi.h> 7 #include <linux/bitfield.h> 8 #include <linux/build_bug.h> 9 #include <linux/kernel.h> 10 #include <linux/init.h> 11 #include <linux/types.h> 12 #include <linux/device.h> 13 #include <linux/io.h> 14 #include <linux/err.h> 15 #include <linux/export.h> 16 #include <linux/slab.h> 17 #include <linux/stringhash.h> 18 #include <linux/mutex.h> 19 #include <linux/clk.h> 20 #include <linux/coresight.h> 21 #include <linux/property.h> 22 #include <linux/delay.h> 23 #include <linux/pm_runtime.h> 24 #include <linux/panic_notifier.h> 25 26 #include "coresight-etm-perf.h" 27 #include "coresight-priv.h" 28 #include "coresight-syscfg.h" 29 #include "coresight-trace-id.h" 30 31 /* 32 * Mutex used to lock all sysfs enable and disable actions and loading and 33 * unloading devices by the Coresight core. 34 */ 35 DEFINE_MUTEX(coresight_mutex); 36 static DEFINE_PER_CPU(struct coresight_device *, csdev_sink); 37 38 /** 39 * struct coresight_node - elements of a path, from source to sink 40 * @csdev: Address of an element. 41 * @link: hook to the list. 42 */ 43 struct coresight_node { 44 struct coresight_device *csdev; 45 struct list_head link; 46 }; 47 48 /* 49 * When losing synchronisation a new barrier packet needs to be inserted at the 50 * beginning of the data collected in a buffer. That way the decoder knows that 51 * it needs to look for another sync sequence. 52 */ 53 const u32 coresight_barrier_pkt[4] = {0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff}; 54 EXPORT_SYMBOL_GPL(coresight_barrier_pkt); 55 56 /* List maintains the device index */ 57 static LIST_HEAD(coresight_dev_idx_list); 58 59 static const struct cti_assoc_op *cti_assoc_ops; 60 61 void coresight_set_cti_ops(const struct cti_assoc_op *cti_op) 62 { 63 cti_assoc_ops = cti_op; 64 } 65 EXPORT_SYMBOL_GPL(coresight_set_cti_ops); 66 67 void coresight_remove_cti_ops(void) 68 { 69 cti_assoc_ops = NULL; 70 } 71 EXPORT_SYMBOL_GPL(coresight_remove_cti_ops); 72 73 void coresight_set_percpu_sink(int cpu, struct coresight_device *csdev) 74 { 75 per_cpu(csdev_sink, cpu) = csdev; 76 } 77 EXPORT_SYMBOL_GPL(coresight_set_percpu_sink); 78 79 struct coresight_device *coresight_get_percpu_sink(int cpu) 80 { 81 return per_cpu(csdev_sink, cpu); 82 } 83 EXPORT_SYMBOL_GPL(coresight_get_percpu_sink); 84 85 static struct coresight_device *coresight_get_source(struct coresight_path *path) 86 { 87 struct coresight_device *csdev; 88 89 if (!path) 90 return NULL; 91 92 csdev = list_first_entry(&path->path_list, struct coresight_node, link)->csdev; 93 if (!coresight_is_device_source(csdev)) 94 return NULL; 95 96 return csdev; 97 } 98 99 /** 100 * coresight_blocks_source - checks whether the connection matches the source 101 * of path if connection is bound to specific source. 102 * @src: The source device of the trace path 103 * @conn: The connection of one outport 104 * 105 * Return false if the connection doesn't have a source binded or source of the 106 * path matches the source binds to connection. 107 */ 108 static bool coresight_blocks_source(struct coresight_device *src, 109 struct coresight_connection *conn) 110 { 111 return conn->filter_src_fwnode && (conn->filter_src_dev != src); 112 } 113 114 static struct coresight_connection * 115 coresight_find_out_connection(struct coresight_device *csdev, 116 struct coresight_device *out_dev, 117 struct coresight_device *trace_src) 118 { 119 int i; 120 struct coresight_connection *conn; 121 122 for (i = 0; i < csdev->pdata->nr_outconns; i++) { 123 conn = csdev->pdata->out_conns[i]; 124 if (coresight_blocks_source(trace_src, conn)) 125 continue; 126 if (conn->dest_dev == out_dev) 127 return conn; 128 } 129 130 dev_err(&csdev->dev, 131 "couldn't find output connection, csdev: %s, out_dev: %s\n", 132 dev_name(&csdev->dev), dev_name(&out_dev->dev)); 133 134 return ERR_PTR(-ENODEV); 135 } 136 137 static u32 coresight_read_claim_tags_unlocked(struct coresight_device *csdev) 138 { 139 return FIELD_GET(CORESIGHT_CLAIM_MASK, 140 csdev_access_relaxed_read32(&csdev->access, CORESIGHT_CLAIMCLR)); 141 } 142 143 static void coresight_set_self_claim_tag_unlocked(struct coresight_device *csdev) 144 { 145 csdev_access_relaxed_write32(&csdev->access, CORESIGHT_CLAIM_SELF_HOSTED, 146 CORESIGHT_CLAIMSET); 147 isb(); 148 } 149 150 void coresight_clear_self_claim_tag(struct csdev_access *csa) 151 { 152 if (csa->io_mem) 153 CS_UNLOCK(csa->base); 154 coresight_clear_self_claim_tag_unlocked(csa); 155 if (csa->io_mem) 156 CS_LOCK(csa->base); 157 } 158 EXPORT_SYMBOL_GPL(coresight_clear_self_claim_tag); 159 160 void coresight_clear_self_claim_tag_unlocked(struct csdev_access *csa) 161 { 162 csdev_access_relaxed_write32(csa, CORESIGHT_CLAIM_SELF_HOSTED, 163 CORESIGHT_CLAIMCLR); 164 isb(); 165 } 166 EXPORT_SYMBOL_GPL(coresight_clear_self_claim_tag_unlocked); 167 168 /* 169 * coresight_claim_device_unlocked : Claim the device for self-hosted usage 170 * to prevent an external tool from touching this device. As per PSCI 171 * standards, section "Preserving the execution context" => "Debug and Trace 172 * save and Restore", DBGCLAIM[1] is reserved for Self-hosted debug/trace and 173 * DBGCLAIM[0] is reserved for external tools. 174 * 175 * Called with CS_UNLOCKed for the component. 176 * Returns : 0 on success 177 */ 178 int coresight_claim_device_unlocked(struct coresight_device *csdev) 179 { 180 int tag; 181 struct csdev_access *csa; 182 183 if (WARN_ON(!csdev)) 184 return -EINVAL; 185 186 csa = &csdev->access; 187 tag = coresight_read_claim_tags_unlocked(csdev); 188 189 switch (tag) { 190 case CORESIGHT_CLAIM_FREE: 191 coresight_set_self_claim_tag_unlocked(csdev); 192 if (coresight_read_claim_tags_unlocked(csdev) == CORESIGHT_CLAIM_SELF_HOSTED) 193 return 0; 194 195 /* There was a race setting the tag, clean up and fail */ 196 coresight_clear_self_claim_tag_unlocked(csa); 197 dev_dbg(&csdev->dev, "Busy: Couldn't set self claim tag"); 198 return -EBUSY; 199 200 case CORESIGHT_CLAIM_EXTERNAL: 201 /* External debug is an expected state, so log and report BUSY */ 202 dev_dbg(&csdev->dev, "Busy: Claimed by external debugger"); 203 return -EBUSY; 204 205 default: 206 case CORESIGHT_CLAIM_SELF_HOSTED: 207 case CORESIGHT_CLAIM_INVALID: 208 /* 209 * Warn here because we clear a lingering self hosted tag 210 * on probe, so other tag combinations are impossible. 211 */ 212 dev_err_once(&csdev->dev, "Invalid claim tag state: %x", tag); 213 return -EBUSY; 214 } 215 } 216 EXPORT_SYMBOL_GPL(coresight_claim_device_unlocked); 217 218 int coresight_claim_device(struct coresight_device *csdev) 219 { 220 int rc; 221 222 if (WARN_ON(!csdev)) 223 return -EINVAL; 224 225 CS_UNLOCK(csdev->access.base); 226 rc = coresight_claim_device_unlocked(csdev); 227 CS_LOCK(csdev->access.base); 228 229 return rc; 230 } 231 EXPORT_SYMBOL_GPL(coresight_claim_device); 232 233 /* 234 * coresight_disclaim_device_unlocked : Clear the claim tag for the device. 235 * Called with CS_UNLOCKed for the component. 236 */ 237 void coresight_disclaim_device_unlocked(struct coresight_device *csdev) 238 { 239 240 if (WARN_ON(!csdev)) 241 return; 242 243 if (coresight_read_claim_tags_unlocked(csdev) == CORESIGHT_CLAIM_SELF_HOSTED) 244 coresight_clear_self_claim_tag_unlocked(&csdev->access); 245 else 246 /* 247 * The external agent may have not honoured our claim 248 * and has manipulated it. Or something else has seriously 249 * gone wrong in our driver. 250 */ 251 dev_WARN_ONCE(&csdev->dev, 1, "External agent took claim tag"); 252 } 253 EXPORT_SYMBOL_GPL(coresight_disclaim_device_unlocked); 254 255 void coresight_disclaim_device(struct coresight_device *csdev) 256 { 257 if (WARN_ON(!csdev)) 258 return; 259 260 CS_UNLOCK(csdev->access.base); 261 coresight_disclaim_device_unlocked(csdev); 262 CS_LOCK(csdev->access.base); 263 } 264 EXPORT_SYMBOL_GPL(coresight_disclaim_device); 265 266 /* 267 * Add a helper as an output device. This function takes the @coresight_mutex 268 * because it's assumed that it's called from the helper device, outside of the 269 * core code where the mutex would already be held. Don't add new calls to this 270 * from inside the core code, instead try to add the new helper to the DT and 271 * ACPI where it will be picked up and linked automatically. 272 */ 273 void coresight_add_helper(struct coresight_device *csdev, 274 struct coresight_device *helper) 275 { 276 int i; 277 struct coresight_connection conn = {}; 278 struct coresight_connection *new_conn; 279 280 mutex_lock(&coresight_mutex); 281 conn.dest_fwnode = fwnode_handle_get(dev_fwnode(&helper->dev)); 282 conn.dest_dev = helper; 283 conn.dest_port = conn.src_port = -1; 284 conn.src_dev = csdev; 285 286 /* 287 * Check for duplicates because this is called every time a helper 288 * device is re-loaded. Existing connections will get re-linked 289 * automatically. 290 */ 291 for (i = 0; i < csdev->pdata->nr_outconns; ++i) 292 if (csdev->pdata->out_conns[i]->dest_fwnode == conn.dest_fwnode) 293 goto unlock; 294 295 new_conn = coresight_add_out_conn(csdev->dev.parent, csdev->pdata, 296 &conn); 297 if (!IS_ERR(new_conn)) 298 coresight_add_in_conn(new_conn); 299 300 unlock: 301 mutex_unlock(&coresight_mutex); 302 } 303 EXPORT_SYMBOL_GPL(coresight_add_helper); 304 305 static int coresight_enable_sink(struct coresight_device *csdev, 306 enum cs_mode mode, 307 struct coresight_path *path) 308 { 309 return sink_ops(csdev)->enable(csdev, mode, path); 310 } 311 312 static void coresight_disable_sink(struct coresight_device *csdev) 313 { 314 sink_ops(csdev)->disable(csdev); 315 } 316 317 static int coresight_enable_link(struct coresight_device *csdev, 318 struct coresight_device *parent, 319 struct coresight_device *child, 320 struct coresight_device *source) 321 { 322 int link_subtype; 323 struct coresight_connection *inconn, *outconn; 324 325 if (!parent || !child) 326 return -EINVAL; 327 328 inconn = coresight_find_out_connection(parent, csdev, source); 329 outconn = coresight_find_out_connection(csdev, child, source); 330 link_subtype = csdev->subtype.link_subtype; 331 332 if (link_subtype == CORESIGHT_DEV_SUBTYPE_LINK_MERG && IS_ERR(inconn)) 333 return PTR_ERR(inconn); 334 if (link_subtype == CORESIGHT_DEV_SUBTYPE_LINK_SPLIT && IS_ERR(outconn)) 335 return PTR_ERR(outconn); 336 337 return link_ops(csdev)->enable(csdev, inconn, outconn); 338 } 339 340 static void coresight_disable_link(struct coresight_device *csdev, 341 struct coresight_device *parent, 342 struct coresight_device *child, 343 struct coresight_device *source) 344 { 345 struct coresight_connection *inconn, *outconn; 346 347 if (!parent || !child) 348 return; 349 350 inconn = coresight_find_out_connection(parent, csdev, source); 351 outconn = coresight_find_out_connection(csdev, child, source); 352 353 link_ops(csdev)->disable(csdev, inconn, outconn); 354 } 355 356 static bool coresight_is_helper(struct coresight_device *csdev) 357 { 358 return csdev->type == CORESIGHT_DEV_TYPE_HELPER; 359 } 360 361 static int coresight_enable_helper(struct coresight_device *csdev, 362 enum cs_mode mode, 363 struct coresight_path *path) 364 { 365 return helper_ops(csdev)->enable(csdev, mode, path); 366 } 367 368 static void coresight_disable_helper(struct coresight_device *csdev, 369 struct coresight_path *path) 370 { 371 helper_ops(csdev)->disable(csdev, path); 372 } 373 374 static void coresight_disable_helpers(struct coresight_device *csdev, 375 struct coresight_path *path) 376 { 377 int i; 378 struct coresight_device *helper; 379 380 for (i = 0; i < csdev->pdata->nr_outconns; ++i) { 381 helper = csdev->pdata->out_conns[i]->dest_dev; 382 if (helper && coresight_is_helper(helper)) 383 coresight_disable_helper(helper, path); 384 } 385 } 386 387 /* 388 * Helper function to call source_ops(csdev)->disable and also disable the 389 * helpers. 390 * 391 * There is an imbalance between coresight_enable_path() and 392 * coresight_disable_path(). Enabling also enables the source's helpers as part 393 * of the path, but disabling always skips the first item in the path (which is 394 * the source), so sources and their helpers don't get disabled as part of that 395 * function and we need the extra step here. 396 */ 397 void coresight_disable_source(struct coresight_device *csdev, void *data) 398 { 399 source_ops(csdev)->disable(csdev, data); 400 coresight_disable_helpers(csdev, NULL); 401 } 402 EXPORT_SYMBOL_GPL(coresight_disable_source); 403 404 void coresight_pause_source(struct coresight_device *csdev) 405 { 406 if (!coresight_is_percpu_source(csdev)) 407 return; 408 409 if (source_ops(csdev)->pause_perf) 410 source_ops(csdev)->pause_perf(csdev); 411 } 412 EXPORT_SYMBOL_GPL(coresight_pause_source); 413 414 int coresight_resume_source(struct coresight_device *csdev) 415 { 416 if (!coresight_is_percpu_source(csdev)) 417 return -EOPNOTSUPP; 418 419 if (!source_ops(csdev)->resume_perf) 420 return -EOPNOTSUPP; 421 422 return source_ops(csdev)->resume_perf(csdev); 423 } 424 EXPORT_SYMBOL_GPL(coresight_resume_source); 425 426 /* 427 * coresight_disable_path_from : Disable components in the given path beyond 428 * @nd in the list. If @nd is NULL, all the components, except the SOURCE are 429 * disabled. 430 */ 431 static void coresight_disable_path_from(struct coresight_path *path, 432 struct coresight_node *nd) 433 { 434 u32 type; 435 struct coresight_device *csdev, *parent, *child; 436 437 if (!nd) 438 nd = list_first_entry(&path->path_list, struct coresight_node, link); 439 440 list_for_each_entry_continue(nd, &path->path_list, link) { 441 csdev = nd->csdev; 442 type = csdev->type; 443 444 /* 445 * ETF devices are tricky... They can be a link or a sink, 446 * depending on how they are configured. If an ETF has been 447 * selected as a sink it will be configured as a sink, otherwise 448 * go ahead with the link configuration. 449 */ 450 if (type == CORESIGHT_DEV_TYPE_LINKSINK) 451 type = (csdev == coresight_get_sink(path)) ? 452 CORESIGHT_DEV_TYPE_SINK : 453 CORESIGHT_DEV_TYPE_LINK; 454 455 switch (type) { 456 case CORESIGHT_DEV_TYPE_SINK: 457 coresight_disable_sink(csdev); 458 break; 459 case CORESIGHT_DEV_TYPE_SOURCE: 460 /* 461 * We skip the first node in the path assuming that it 462 * is the source. So we don't expect a source device in 463 * the middle of a path. 464 */ 465 WARN_ON(1); 466 break; 467 case CORESIGHT_DEV_TYPE_LINK: 468 parent = list_prev_entry(nd, link)->csdev; 469 child = list_next_entry(nd, link)->csdev; 470 coresight_disable_link(csdev, parent, child, 471 coresight_get_source(path)); 472 break; 473 default: 474 break; 475 } 476 477 /* Disable all helpers adjacent along the path last */ 478 coresight_disable_helpers(csdev, path); 479 } 480 } 481 482 void coresight_disable_path(struct coresight_path *path) 483 { 484 coresight_disable_path_from(path, NULL); 485 } 486 EXPORT_SYMBOL_GPL(coresight_disable_path); 487 488 static int coresight_enable_helpers(struct coresight_device *csdev, 489 enum cs_mode mode, 490 struct coresight_path *path) 491 { 492 int i, ret = 0; 493 struct coresight_device *helper; 494 495 for (i = 0; i < csdev->pdata->nr_outconns; ++i) { 496 helper = csdev->pdata->out_conns[i]->dest_dev; 497 if (!helper || !coresight_is_helper(helper)) 498 continue; 499 500 ret = coresight_enable_helper(helper, mode, path); 501 if (ret) 502 return ret; 503 } 504 505 return 0; 506 } 507 508 int coresight_enable_path(struct coresight_path *path, enum cs_mode mode) 509 { 510 int ret = 0; 511 u32 type; 512 struct coresight_node *nd; 513 struct coresight_device *csdev, *parent, *child; 514 struct coresight_device *source; 515 516 source = coresight_get_source(path); 517 list_for_each_entry_reverse(nd, &path->path_list, link) { 518 csdev = nd->csdev; 519 type = csdev->type; 520 521 /* Enable all helpers adjacent to the path first */ 522 ret = coresight_enable_helpers(csdev, mode, path); 523 if (ret) 524 goto err_disable_path; 525 /* 526 * ETF devices are tricky... They can be a link or a sink, 527 * depending on how they are configured. If an ETF has been 528 * selected as a sink it will be configured as a sink, otherwise 529 * go ahead with the link configuration. 530 */ 531 if (type == CORESIGHT_DEV_TYPE_LINKSINK) 532 type = (csdev == coresight_get_sink(path)) ? 533 CORESIGHT_DEV_TYPE_SINK : 534 CORESIGHT_DEV_TYPE_LINK; 535 536 switch (type) { 537 case CORESIGHT_DEV_TYPE_SINK: 538 ret = coresight_enable_sink(csdev, mode, path); 539 /* 540 * Sink is the first component turned on. If we 541 * failed to enable the sink, there are no components 542 * that need disabling. Disabling the path here 543 * would mean we could disrupt an existing session. 544 */ 545 if (ret) { 546 coresight_disable_helpers(csdev, path); 547 goto out; 548 } 549 break; 550 case CORESIGHT_DEV_TYPE_SOURCE: 551 /* sources are enabled from either sysFS or Perf */ 552 break; 553 case CORESIGHT_DEV_TYPE_LINK: 554 parent = list_prev_entry(nd, link)->csdev; 555 child = list_next_entry(nd, link)->csdev; 556 ret = coresight_enable_link(csdev, parent, child, source); 557 if (ret) 558 goto err_disable_helpers; 559 break; 560 default: 561 ret = -EINVAL; 562 goto err_disable_helpers; 563 } 564 } 565 566 out: 567 return ret; 568 err_disable_helpers: 569 coresight_disable_helpers(csdev, path); 570 err_disable_path: 571 coresight_disable_path_from(path, nd); 572 goto out; 573 } 574 575 struct coresight_device *coresight_get_sink(struct coresight_path *path) 576 { 577 struct coresight_device *csdev; 578 579 if (!path) 580 return NULL; 581 582 csdev = list_last_entry(&path->path_list, struct coresight_node, link)->csdev; 583 if (csdev->type != CORESIGHT_DEV_TYPE_SINK && 584 csdev->type != CORESIGHT_DEV_TYPE_LINKSINK) 585 return NULL; 586 587 return csdev; 588 } 589 EXPORT_SYMBOL_GPL(coresight_get_sink); 590 591 u32 coresight_get_sink_id(struct coresight_device *csdev) 592 { 593 if (!csdev->ea) 594 return 0; 595 596 /* 597 * See function etm_perf_add_symlink_sink() to know where 598 * this comes from. 599 */ 600 return (u32) (unsigned long) csdev->ea->var; 601 } 602 603 static int coresight_sink_by_id(struct device *dev, const void *data) 604 { 605 struct coresight_device *csdev = to_coresight_device(dev); 606 607 if (csdev->type == CORESIGHT_DEV_TYPE_SINK || 608 csdev->type == CORESIGHT_DEV_TYPE_LINKSINK) { 609 if (coresight_get_sink_id(csdev) == *(u32 *)data) 610 return 1; 611 } 612 613 return 0; 614 } 615 616 /** 617 * coresight_get_sink_by_id - returns the sink that matches the id 618 * @id: Id of the sink to match 619 * 620 * The name of a sink is unique, whether it is found on the AMBA bus or 621 * otherwise. As such the hash of that name can easily be used to identify 622 * a sink. 623 */ 624 struct coresight_device *coresight_get_sink_by_id(u32 id) 625 { 626 struct device *dev = NULL; 627 628 dev = bus_find_device(&coresight_bustype, NULL, &id, 629 coresight_sink_by_id); 630 631 return dev ? to_coresight_device(dev) : NULL; 632 } 633 634 /** 635 * coresight_get_ref- Helper function to increase reference count to module 636 * and device. 637 * 638 * @csdev: The coresight device to get a reference on. 639 * 640 * Return true in successful case and power up the device. 641 * Return false when failed to get reference of module. 642 */ 643 static bool coresight_get_ref(struct coresight_device *csdev) 644 { 645 struct device *dev = csdev->dev.parent; 646 647 /* Make sure the driver can't be removed */ 648 if (!try_module_get(dev->driver->owner)) 649 return false; 650 /* Make sure the device can't go away */ 651 get_device(dev); 652 pm_runtime_get_sync(dev); 653 return true; 654 } 655 656 /** 657 * coresight_put_ref- Helper function to decrease reference count to module 658 * and device. Power off the device. 659 * 660 * @csdev: The coresight device to decrement a reference from. 661 */ 662 static void coresight_put_ref(struct coresight_device *csdev) 663 { 664 struct device *dev = csdev->dev.parent; 665 666 pm_runtime_put(dev); 667 put_device(dev); 668 module_put(dev->driver->owner); 669 } 670 671 /* 672 * coresight_grab_device - Power up this device and any of the helper 673 * devices connected to it for trace operation. Since the helper devices 674 * don't appear on the trace path, they should be handled along with the 675 * master device. 676 */ 677 static int coresight_grab_device(struct coresight_device *csdev) 678 { 679 int i; 680 681 for (i = 0; i < csdev->pdata->nr_outconns; i++) { 682 struct coresight_device *child; 683 684 child = csdev->pdata->out_conns[i]->dest_dev; 685 if (child && coresight_is_helper(child)) 686 if (!coresight_get_ref(child)) 687 goto err; 688 } 689 if (coresight_get_ref(csdev)) 690 return 0; 691 err: 692 for (i--; i >= 0; i--) { 693 struct coresight_device *child; 694 695 child = csdev->pdata->out_conns[i]->dest_dev; 696 if (child && coresight_is_helper(child)) 697 coresight_put_ref(child); 698 } 699 return -ENODEV; 700 } 701 702 /* 703 * coresight_drop_device - Release this device and any of the helper 704 * devices connected to it. 705 */ 706 static void coresight_drop_device(struct coresight_device *csdev) 707 { 708 int i; 709 710 coresight_put_ref(csdev); 711 for (i = 0; i < csdev->pdata->nr_outconns; i++) { 712 struct coresight_device *child; 713 714 child = csdev->pdata->out_conns[i]->dest_dev; 715 if (child && coresight_is_helper(child)) 716 coresight_put_ref(child); 717 } 718 } 719 720 /* 721 * coresight device will read their existing or alloc a trace ID, if their trace_id 722 * callback is set. 723 * 724 * Return 0 if the trace_id callback is not set. 725 * Return the result of the trace_id callback if it is set. The return value 726 * will be the trace_id if successful, and an error number if it fails. 727 */ 728 static int coresight_get_trace_id(struct coresight_device *csdev, 729 enum cs_mode mode, 730 struct coresight_device *sink) 731 { 732 if (coresight_ops(csdev)->trace_id) 733 return coresight_ops(csdev)->trace_id(csdev, mode, sink); 734 735 return 0; 736 } 737 738 /* 739 * Call this after creating the path and before enabling it. This leaves 740 * the trace ID set on the path, or it remains 0 if it couldn't be assigned. 741 */ 742 void coresight_path_assign_trace_id(struct coresight_path *path, 743 enum cs_mode mode) 744 { 745 struct coresight_device *sink = coresight_get_sink(path); 746 struct coresight_node *nd; 747 int trace_id; 748 749 list_for_each_entry(nd, &path->path_list, link) { 750 /* Assign a trace ID to the path for the first device that wants to do it */ 751 trace_id = coresight_get_trace_id(nd->csdev, mode, sink); 752 753 /* 754 * 0 in this context is that it didn't want to assign so keep searching. 755 * Non 0 is either success or fail. 756 */ 757 if (trace_id != 0) { 758 path->trace_id = trace_id; 759 return; 760 } 761 } 762 } 763 764 /** 765 * _coresight_build_path - recursively build a path from a @csdev to a sink. 766 * @csdev: The device to start from. 767 * @source: The trace source device of the path. 768 * @sink: The final sink we want in this path. 769 * @path: The list to add devices to. 770 * 771 * The tree of Coresight device is traversed until @sink is found. 772 * From there the sink is added to the list along with all the devices that led 773 * to that point - the end result is a list from source to sink. In that list 774 * the source is the first device and the sink the last one. 775 */ 776 static int _coresight_build_path(struct coresight_device *csdev, 777 struct coresight_device *source, 778 struct coresight_device *sink, 779 struct coresight_path *path) 780 { 781 int i, ret; 782 bool found = false; 783 struct coresight_node *node; 784 785 /* The sink has been found. Enqueue the element */ 786 if (csdev == sink) 787 goto out; 788 789 if (coresight_is_percpu_source(csdev) && coresight_is_percpu_sink(sink) && 790 sink == per_cpu(csdev_sink, source_ops(csdev)->cpu_id(csdev))) { 791 if (_coresight_build_path(sink, source, sink, path) == 0) { 792 found = true; 793 goto out; 794 } 795 } 796 797 /* Not a sink - recursively explore each port found on this element */ 798 for (i = 0; i < csdev->pdata->nr_outconns; i++) { 799 struct coresight_device *child_dev; 800 801 child_dev = csdev->pdata->out_conns[i]->dest_dev; 802 803 if (coresight_blocks_source(source, csdev->pdata->out_conns[i])) 804 continue; 805 806 if (child_dev && 807 _coresight_build_path(child_dev, source, sink, path) == 0) { 808 found = true; 809 break; 810 } 811 } 812 813 if (!found) 814 return -ENODEV; 815 816 out: 817 /* 818 * A path from this element to a sink has been found. The elements 819 * leading to the sink are already enqueued, all that is left to do 820 * is tell the PM runtime core we need this element and add a node 821 * for it. 822 */ 823 ret = coresight_grab_device(csdev); 824 if (ret) 825 return ret; 826 827 node = kzalloc_obj(struct coresight_node); 828 if (!node) 829 return -ENOMEM; 830 831 node->csdev = csdev; 832 list_add(&node->link, &path->path_list); 833 834 return 0; 835 } 836 837 struct coresight_path *coresight_build_path(struct coresight_device *source, 838 struct coresight_device *sink) 839 { 840 struct coresight_path *path; 841 int rc; 842 843 if (!sink) 844 return ERR_PTR(-EINVAL); 845 846 path = kzalloc_obj(struct coresight_path); 847 if (!path) 848 return ERR_PTR(-ENOMEM); 849 850 INIT_LIST_HEAD(&path->path_list); 851 852 rc = _coresight_build_path(source, source, sink, path); 853 if (rc) { 854 kfree(path); 855 return ERR_PTR(rc); 856 } 857 858 return path; 859 } 860 861 /** 862 * coresight_release_path - release a previously built path. 863 * @path: the path to release. 864 * 865 * Go through all the elements of a path and 1) removed it from the list and 866 * 2) free the memory allocated for each node. 867 */ 868 void coresight_release_path(struct coresight_path *path) 869 { 870 struct coresight_device *csdev; 871 struct coresight_node *nd, *next; 872 873 list_for_each_entry_safe(nd, next, &path->path_list, link) { 874 csdev = nd->csdev; 875 876 coresight_drop_device(csdev); 877 list_del(&nd->link); 878 kfree(nd); 879 } 880 881 kfree(path); 882 } 883 884 /* return true if the device is a suitable type for a default sink */ 885 static bool coresight_is_def_sink_type(struct coresight_device *csdev) 886 { 887 /* sink & correct subtype */ 888 if (((csdev->type == CORESIGHT_DEV_TYPE_SINK) || 889 (csdev->type == CORESIGHT_DEV_TYPE_LINKSINK)) && 890 (csdev->subtype.sink_subtype >= CORESIGHT_DEV_SUBTYPE_SINK_BUFFER)) 891 return true; 892 return false; 893 } 894 895 /** 896 * coresight_select_best_sink - return the best sink for use as default from 897 * the two provided. 898 * 899 * @sink: current best sink. 900 * @depth: search depth where current sink was found. 901 * @new_sink: new sink for comparison with current sink. 902 * @new_depth: search depth where new sink was found. 903 * 904 * Sinks prioritised according to coresight_dev_subtype_sink, with only 905 * subtypes CORESIGHT_DEV_SUBTYPE_SINK_BUFFER or higher being used. 906 * 907 * Where two sinks of equal priority are found, the sink closest to the 908 * source is used (smallest search depth). 909 * 910 * return @new_sink & update @depth if better than @sink, else return @sink. 911 */ 912 static struct coresight_device * 913 coresight_select_best_sink(struct coresight_device *sink, int *depth, 914 struct coresight_device *new_sink, int new_depth) 915 { 916 bool update = false; 917 918 if (!sink) { 919 /* first found at this level */ 920 update = true; 921 } else if (new_sink->subtype.sink_subtype > 922 sink->subtype.sink_subtype) { 923 /* found better sink */ 924 update = true; 925 } else if ((new_sink->subtype.sink_subtype == 926 sink->subtype.sink_subtype) && 927 (*depth > new_depth)) { 928 /* found same but closer sink */ 929 update = true; 930 } 931 932 if (update) 933 *depth = new_depth; 934 return update ? new_sink : sink; 935 } 936 937 /** 938 * coresight_find_sink - recursive function to walk trace connections from 939 * source to find a suitable default sink. 940 * 941 * @csdev: source / current device to check. 942 * @depth: [in] search depth of calling dev, [out] depth of found sink. 943 * 944 * This will walk the connection path from a source (ETM) till a suitable 945 * sink is encountered and return that sink to the original caller. 946 * 947 * If current device is a plain sink return that & depth, otherwise recursively 948 * call child connections looking for a sink. Select best possible using 949 * coresight_select_best_sink. 950 * 951 * return best sink found, or NULL if not found at this node or child nodes. 952 */ 953 static struct coresight_device * 954 coresight_find_sink(struct coresight_device *csdev, int *depth) 955 { 956 int i, curr_depth = *depth + 1, found_depth = 0; 957 struct coresight_device *found_sink = NULL; 958 959 if (coresight_is_def_sink_type(csdev)) { 960 found_depth = curr_depth; 961 found_sink = csdev; 962 if (csdev->type == CORESIGHT_DEV_TYPE_SINK) 963 goto return_def_sink; 964 /* look past LINKSINK for something better */ 965 } 966 967 /* 968 * Not a sink we want - or possible child sink may be better. 969 * recursively explore each port found on this element. 970 */ 971 for (i = 0; i < csdev->pdata->nr_outconns; i++) { 972 struct coresight_device *child_dev, *sink = NULL; 973 int child_depth = curr_depth; 974 975 child_dev = csdev->pdata->out_conns[i]->dest_dev; 976 if (child_dev) 977 sink = coresight_find_sink(child_dev, &child_depth); 978 979 if (sink) 980 found_sink = coresight_select_best_sink(found_sink, 981 &found_depth, 982 sink, 983 child_depth); 984 } 985 986 return_def_sink: 987 /* return found sink and depth */ 988 if (found_sink) 989 *depth = found_depth; 990 return found_sink; 991 } 992 993 /** 994 * coresight_find_default_sink: Find a sink suitable for use as a 995 * default sink. 996 * 997 * @csdev: starting source to find a connected sink. 998 * 999 * Walks connections graph looking for a suitable sink to enable for the 1000 * supplied source. Uses CoreSight device subtypes and distance from source 1001 * to select the best sink. 1002 * 1003 * If a sink is found, then the default sink for this device is set and 1004 * will be automatically used in future. 1005 * 1006 * Used in cases where the CoreSight user (perf / sysfs) has not selected a 1007 * sink. 1008 */ 1009 struct coresight_device * 1010 coresight_find_default_sink(struct coresight_device *csdev) 1011 { 1012 int depth = 0; 1013 1014 /* look for a default sink if we have not found for this device */ 1015 if (!csdev->def_sink) { 1016 if (coresight_is_percpu_source(csdev)) 1017 csdev->def_sink = per_cpu(csdev_sink, source_ops(csdev)->cpu_id(csdev)); 1018 if (!csdev->def_sink) 1019 csdev->def_sink = coresight_find_sink(csdev, &depth); 1020 } 1021 return csdev->def_sink; 1022 } 1023 EXPORT_SYMBOL_GPL(coresight_find_default_sink); 1024 1025 static int coresight_remove_sink_ref(struct device *dev, void *data) 1026 { 1027 struct coresight_device *sink = data; 1028 struct coresight_device *source = to_coresight_device(dev); 1029 1030 if (source->def_sink == sink) 1031 source->def_sink = NULL; 1032 return 0; 1033 } 1034 1035 /** 1036 * coresight_clear_default_sink: Remove all default sink references to the 1037 * supplied sink. 1038 * 1039 * If supplied device is a sink, then check all the bus devices and clear 1040 * out all the references to this sink from the coresight_device def_sink 1041 * parameter. 1042 * 1043 * @csdev: coresight sink - remove references to this from all sources. 1044 */ 1045 static void coresight_clear_default_sink(struct coresight_device *csdev) 1046 { 1047 if ((csdev->type == CORESIGHT_DEV_TYPE_SINK) || 1048 (csdev->type == CORESIGHT_DEV_TYPE_LINKSINK)) { 1049 bus_for_each_dev(&coresight_bustype, NULL, csdev, 1050 coresight_remove_sink_ref); 1051 } 1052 } 1053 1054 static void coresight_device_release(struct device *dev) 1055 { 1056 struct coresight_device *csdev = to_coresight_device(dev); 1057 1058 fwnode_handle_put(csdev->dev.fwnode); 1059 free_percpu(csdev->perf_sink_id_map.cpu_map); 1060 kfree(csdev); 1061 } 1062 1063 static int coresight_orphan_match(struct device *dev, void *data) 1064 { 1065 int i, ret = 0; 1066 bool still_orphan = false; 1067 struct coresight_device *dst_csdev = data; 1068 struct coresight_device *src_csdev = to_coresight_device(dev); 1069 struct coresight_connection *conn; 1070 bool fixup_self = (src_csdev == dst_csdev); 1071 1072 /* Move on to another component if no connection is orphan */ 1073 if (!src_csdev->orphan) 1074 return 0; 1075 /* 1076 * Circle through all the connections of that component. If we find 1077 * an orphan connection whose name matches @dst_csdev, link it. 1078 */ 1079 for (i = 0; i < src_csdev->pdata->nr_outconns; i++) { 1080 conn = src_csdev->pdata->out_conns[i]; 1081 1082 /* Fix filter source device before skip the port */ 1083 if (conn->filter_src_fwnode && !conn->filter_src_dev) { 1084 if (dst_csdev && 1085 (conn->filter_src_fwnode == dst_csdev->dev.fwnode) && 1086 !WARN_ON_ONCE(!coresight_is_device_source(dst_csdev))) 1087 conn->filter_src_dev = dst_csdev; 1088 else 1089 still_orphan = true; 1090 } 1091 1092 /* Skip the port if it's already connected. */ 1093 if (conn->dest_dev) 1094 continue; 1095 1096 /* 1097 * If we are at the "new" device, which triggered this search, 1098 * we must find the remote device from the fwnode in the 1099 * connection. 1100 */ 1101 if (fixup_self) 1102 dst_csdev = coresight_find_csdev_by_fwnode( 1103 conn->dest_fwnode); 1104 1105 /* Does it match this newly added device? */ 1106 if (dst_csdev && conn->dest_fwnode == dst_csdev->dev.fwnode) { 1107 ret = coresight_make_links(src_csdev, conn, dst_csdev); 1108 if (ret) 1109 return ret; 1110 1111 /* 1112 * Install the device connection. This also indicates that 1113 * the links are operational on both ends. 1114 */ 1115 conn->dest_dev = dst_csdev; 1116 conn->src_dev = src_csdev; 1117 1118 ret = coresight_add_in_conn(conn); 1119 if (ret) 1120 return ret; 1121 } else { 1122 /* This component still has an orphan */ 1123 still_orphan = true; 1124 } 1125 } 1126 1127 src_csdev->orphan = still_orphan; 1128 1129 /* 1130 * Returning '0' in case we didn't encounter any error, 1131 * ensures that all known component on the bus will be checked. 1132 */ 1133 return 0; 1134 } 1135 1136 static int coresight_fixup_orphan_conns(struct coresight_device *csdev) 1137 { 1138 return bus_for_each_dev(&coresight_bustype, NULL, 1139 csdev, coresight_orphan_match); 1140 } 1141 1142 static int coresight_clear_filter_source(struct device *dev, void *data) 1143 { 1144 int i; 1145 struct coresight_device *source = data; 1146 struct coresight_device *csdev = to_coresight_device(dev); 1147 1148 for (i = 0; i < csdev->pdata->nr_outconns; ++i) { 1149 if (csdev->pdata->out_conns[i]->filter_src_dev == source) 1150 csdev->pdata->out_conns[i]->filter_src_dev = NULL; 1151 } 1152 return 0; 1153 } 1154 1155 static void coresight_remove_conns(struct coresight_device *csdev) 1156 { 1157 int i, j; 1158 struct coresight_connection *conn; 1159 1160 if (coresight_is_device_source(csdev)) 1161 bus_for_each_dev(&coresight_bustype, NULL, csdev, 1162 coresight_clear_filter_source); 1163 1164 for (i = 0; i < csdev->pdata->nr_outconns; i++) { 1165 conn = csdev->pdata->out_conns[i]; 1166 if (conn->filter_src_fwnode) { 1167 conn->filter_src_dev = NULL; 1168 fwnode_handle_put(conn->filter_src_fwnode); 1169 } 1170 1171 if (!conn->dest_dev) 1172 continue; 1173 1174 /* Remove sysfs links for the output connection */ 1175 coresight_remove_links(csdev, conn); 1176 1177 /* 1178 * Remove the input connection references from the destination 1179 * device for each output connection. 1180 */ 1181 for (j = 0; j < conn->dest_dev->pdata->nr_inconns; ++j) 1182 if (conn->dest_dev->pdata->in_conns[j] == conn) { 1183 conn->dest_dev->pdata->in_conns[j] = NULL; 1184 break; 1185 } 1186 } 1187 1188 /* 1189 * For all input connections, remove references to this device. 1190 * Connection objects are shared so modifying this device's input 1191 * connections affects the other device's output connection. 1192 */ 1193 for (i = 0; i < csdev->pdata->nr_inconns; ++i) { 1194 conn = csdev->pdata->in_conns[i]; 1195 /* Input conns array is sparse */ 1196 if (!conn) 1197 continue; 1198 1199 conn->src_dev->orphan = true; 1200 coresight_remove_links(conn->src_dev, conn); 1201 conn->dest_dev = NULL; 1202 } 1203 1204 coresight_remove_conns_sysfs_group(csdev); 1205 } 1206 1207 /** 1208 * coresight_timeout_action - loop until a bit has changed to a specific register 1209 * state, with a callback after every trial. 1210 * @csa: coresight device access for the device 1211 * @offset: Offset of the register from the base of the device. 1212 * @position: the position of the bit of interest. 1213 * @value: the value the bit should have. 1214 * @cb: Call back after each trial. 1215 * 1216 * Return: 0 as soon as the bit has taken the desired state or -EAGAIN if 1217 * TIMEOUT_US has elapsed, which ever happens first. 1218 */ 1219 int coresight_timeout_action(struct csdev_access *csa, u32 offset, 1220 int position, int value, 1221 coresight_timeout_cb_t cb) 1222 { 1223 int i; 1224 u32 val; 1225 1226 for (i = TIMEOUT_US; i > 0; i--) { 1227 val = csdev_access_read32(csa, offset); 1228 /* waiting on the bit to go from 0 to 1 */ 1229 if (value) { 1230 if (val & BIT(position)) 1231 return 0; 1232 /* waiting on the bit to go from 1 to 0 */ 1233 } else { 1234 if (!(val & BIT(position))) 1235 return 0; 1236 } 1237 if (cb) 1238 cb(csa, offset, position, value); 1239 /* 1240 * Delay is arbitrary - the specification doesn't say how long 1241 * we are expected to wait. Extra check required to make sure 1242 * we don't wait needlessly on the last iteration. 1243 */ 1244 if (i - 1) 1245 udelay(1); 1246 } 1247 1248 return -EAGAIN; 1249 } 1250 EXPORT_SYMBOL_GPL(coresight_timeout_action); 1251 1252 int coresight_timeout(struct csdev_access *csa, u32 offset, 1253 int position, int value) 1254 { 1255 return coresight_timeout_action(csa, offset, position, value, NULL); 1256 } 1257 EXPORT_SYMBOL_GPL(coresight_timeout); 1258 1259 u32 coresight_relaxed_read32(struct coresight_device *csdev, u32 offset) 1260 { 1261 return csdev_access_relaxed_read32(&csdev->access, offset); 1262 } 1263 1264 u32 coresight_read32(struct coresight_device *csdev, u32 offset) 1265 { 1266 return csdev_access_read32(&csdev->access, offset); 1267 } 1268 1269 void coresight_relaxed_write32(struct coresight_device *csdev, 1270 u32 val, u32 offset) 1271 { 1272 csdev_access_relaxed_write32(&csdev->access, val, offset); 1273 } 1274 1275 void coresight_write32(struct coresight_device *csdev, u32 val, u32 offset) 1276 { 1277 csdev_access_write32(&csdev->access, val, offset); 1278 } 1279 1280 u64 coresight_relaxed_read64(struct coresight_device *csdev, u32 offset) 1281 { 1282 return csdev_access_relaxed_read64(&csdev->access, offset); 1283 } 1284 1285 u64 coresight_read64(struct coresight_device *csdev, u32 offset) 1286 { 1287 return csdev_access_read64(&csdev->access, offset); 1288 } 1289 1290 void coresight_relaxed_write64(struct coresight_device *csdev, 1291 u64 val, u32 offset) 1292 { 1293 csdev_access_relaxed_write64(&csdev->access, val, offset); 1294 } 1295 1296 void coresight_write64(struct coresight_device *csdev, u64 val, u32 offset) 1297 { 1298 csdev_access_write64(&csdev->access, val, offset); 1299 } 1300 1301 /* 1302 * coresight_release_platform_data: Release references to the devices connected 1303 * to the output port of this device. 1304 */ 1305 void coresight_release_platform_data(struct device *dev, 1306 struct coresight_platform_data *pdata) 1307 { 1308 int i; 1309 struct coresight_connection **conns = pdata->out_conns; 1310 1311 for (i = 0; i < pdata->nr_outconns; i++) { 1312 /* 1313 * Drop the refcount and clear the handle as this device 1314 * is going away 1315 */ 1316 fwnode_handle_put(conns[i]->dest_fwnode); 1317 conns[i]->dest_fwnode = NULL; 1318 devm_kfree(dev, conns[i]); 1319 } 1320 devm_kfree(dev, pdata->out_conns); 1321 devm_kfree(dev, pdata->in_conns); 1322 devm_kfree(dev, pdata); 1323 } 1324 1325 struct coresight_device *coresight_register(struct coresight_desc *desc) 1326 { 1327 int ret; 1328 struct coresight_device *csdev; 1329 bool registered = false; 1330 1331 csdev = kzalloc_obj(*csdev); 1332 if (!csdev) { 1333 ret = -ENOMEM; 1334 goto err_out; 1335 } 1336 1337 csdev->pdata = desc->pdata; 1338 1339 csdev->type = desc->type; 1340 csdev->subtype = desc->subtype; 1341 csdev->ops = desc->ops; 1342 csdev->access = desc->access; 1343 csdev->orphan = true; 1344 1345 csdev->dev.type = &coresight_dev_type[desc->type]; 1346 csdev->dev.groups = desc->groups; 1347 csdev->dev.parent = desc->dev; 1348 csdev->dev.release = coresight_device_release; 1349 csdev->dev.bus = &coresight_bustype; 1350 1351 if (csdev->type == CORESIGHT_DEV_TYPE_SINK || 1352 csdev->type == CORESIGHT_DEV_TYPE_LINKSINK) { 1353 raw_spin_lock_init(&csdev->perf_sink_id_map.lock); 1354 csdev->perf_sink_id_map.cpu_map = alloc_percpu(atomic_t); 1355 if (!csdev->perf_sink_id_map.cpu_map) { 1356 kfree(csdev); 1357 ret = -ENOMEM; 1358 goto err_out; 1359 } 1360 } 1361 1362 /* 1363 * Hold the reference to our parent device. This will be 1364 * dropped only in coresight_device_release(). 1365 */ 1366 csdev->dev.fwnode = fwnode_handle_get(dev_fwnode(desc->dev)); 1367 dev_set_name(&csdev->dev, "%s", desc->name); 1368 1369 /* 1370 * Make sure the device registration and the connection fixup 1371 * are synchronised, so that we don't see uninitialised devices 1372 * on the coresight bus while trying to resolve the connections. 1373 */ 1374 mutex_lock(&coresight_mutex); 1375 1376 ret = device_register(&csdev->dev); 1377 if (ret) { 1378 put_device(&csdev->dev); 1379 /* 1380 * All resources are free'd explicitly via 1381 * coresight_device_release(), triggered from put_device(). 1382 */ 1383 goto out_unlock; 1384 } 1385 1386 /* Device is now registered */ 1387 registered = true; 1388 1389 ret = etm_perf_add_symlink_sink(csdev); 1390 if (ret && ret != -EOPNOTSUPP) 1391 goto out_unlock; 1392 1393 ret = coresight_create_conns_sysfs_group(csdev); 1394 if (ret) 1395 goto out_unlock; 1396 1397 ret = coresight_fixup_orphan_conns(csdev); 1398 if (ret) 1399 goto out_unlock; 1400 1401 mutex_unlock(&coresight_mutex); 1402 1403 if (cti_assoc_ops && cti_assoc_ops->add) 1404 cti_assoc_ops->add(csdev); 1405 1406 return csdev; 1407 1408 out_unlock: 1409 mutex_unlock(&coresight_mutex); 1410 1411 /* Unregister the device if needed */ 1412 if (registered) { 1413 coresight_unregister(csdev); 1414 return ERR_PTR(ret); 1415 } 1416 1417 err_out: 1418 coresight_release_platform_data(desc->dev, desc->pdata); 1419 return ERR_PTR(ret); 1420 } 1421 EXPORT_SYMBOL_GPL(coresight_register); 1422 1423 void coresight_unregister(struct coresight_device *csdev) 1424 { 1425 /* Remove references of that device in the topology */ 1426 if (cti_assoc_ops && cti_assoc_ops->remove) 1427 cti_assoc_ops->remove(csdev); 1428 1429 mutex_lock(&coresight_mutex); 1430 etm_perf_del_symlink_sink(csdev); 1431 coresight_remove_conns(csdev); 1432 coresight_clear_default_sink(csdev); 1433 coresight_release_platform_data(csdev->dev.parent, csdev->pdata); 1434 device_unregister(&csdev->dev); 1435 mutex_unlock(&coresight_mutex); 1436 } 1437 EXPORT_SYMBOL_GPL(coresight_unregister); 1438 1439 static struct coresight_dev_list * 1440 coresight_allocate_device_list(const char *prefix) 1441 { 1442 struct coresight_dev_list *list; 1443 1444 /* Check if have already allocated */ 1445 list_for_each_entry(list, &coresight_dev_idx_list, node) { 1446 if (!strcmp(list->pfx, prefix)) 1447 return list; 1448 } 1449 1450 list = kzalloc(sizeof(*list), GFP_KERNEL); 1451 if (!list) 1452 return NULL; 1453 1454 list->pfx = kstrdup(prefix, GFP_KERNEL); 1455 if (!list->pfx) { 1456 kfree(list); 1457 return NULL; 1458 } 1459 1460 list_add(&list->node, &coresight_dev_idx_list); 1461 return list; 1462 } 1463 1464 static int coresight_allocate_device_idx(struct coresight_dev_list *list, 1465 struct device *dev) 1466 { 1467 struct fwnode_handle **fwnode_list; 1468 struct fwnode_handle *fwnode = dev_fwnode(dev); 1469 int idx; 1470 1471 for (idx = 0; idx < list->nr_idx; idx++) 1472 if (list->fwnode_list[idx] == fwnode) 1473 return idx; 1474 1475 /* Make space for the new entry */ 1476 idx = list->nr_idx; 1477 fwnode_list = krealloc_array(list->fwnode_list, 1478 idx + 1, sizeof(*list->fwnode_list), 1479 GFP_KERNEL); 1480 if (!fwnode_list) 1481 return -ENOMEM; 1482 1483 fwnode_list[idx] = fwnode; 1484 list->fwnode_list = fwnode_list; 1485 list->nr_idx = idx + 1; 1486 1487 return idx; 1488 } 1489 1490 static bool coresight_compare_type(enum coresight_dev_type type_a, 1491 union coresight_dev_subtype subtype_a, 1492 enum coresight_dev_type type_b, 1493 union coresight_dev_subtype subtype_b) 1494 { 1495 if (type_a != type_b) 1496 return false; 1497 1498 switch (type_a) { 1499 case CORESIGHT_DEV_TYPE_SINK: 1500 return subtype_a.sink_subtype == subtype_b.sink_subtype; 1501 case CORESIGHT_DEV_TYPE_LINK: 1502 return subtype_a.link_subtype == subtype_b.link_subtype; 1503 case CORESIGHT_DEV_TYPE_LINKSINK: 1504 return subtype_a.link_subtype == subtype_b.link_subtype && 1505 subtype_a.sink_subtype == subtype_b.sink_subtype; 1506 case CORESIGHT_DEV_TYPE_SOURCE: 1507 return subtype_a.source_subtype == subtype_b.source_subtype; 1508 case CORESIGHT_DEV_TYPE_HELPER: 1509 return subtype_a.helper_subtype == subtype_b.helper_subtype; 1510 default: 1511 return false; 1512 } 1513 } 1514 1515 struct coresight_device * 1516 coresight_find_input_type(struct coresight_platform_data *pdata, 1517 enum coresight_dev_type type, 1518 union coresight_dev_subtype subtype) 1519 { 1520 int i; 1521 struct coresight_connection *conn; 1522 1523 for (i = 0; i < pdata->nr_inconns; ++i) { 1524 conn = pdata->in_conns[i]; 1525 if (conn && 1526 coresight_compare_type(type, subtype, conn->src_dev->type, 1527 conn->src_dev->subtype)) 1528 return conn->src_dev; 1529 } 1530 return NULL; 1531 } 1532 EXPORT_SYMBOL_GPL(coresight_find_input_type); 1533 1534 struct coresight_device * 1535 coresight_find_output_type(struct coresight_platform_data *pdata, 1536 enum coresight_dev_type type, 1537 union coresight_dev_subtype subtype) 1538 { 1539 int i; 1540 struct coresight_connection *conn; 1541 1542 for (i = 0; i < pdata->nr_outconns; ++i) { 1543 conn = pdata->out_conns[i]; 1544 if (conn->dest_dev && 1545 coresight_compare_type(type, subtype, conn->dest_dev->type, 1546 conn->dest_dev->subtype)) 1547 return conn->dest_dev; 1548 } 1549 return NULL; 1550 } 1551 EXPORT_SYMBOL_GPL(coresight_find_output_type); 1552 1553 bool coresight_loses_context_with_cpu(struct device *dev) 1554 { 1555 return fwnode_property_present(dev_fwnode(dev), 1556 "arm,coresight-loses-context-with-cpu"); 1557 } 1558 EXPORT_SYMBOL_GPL(coresight_loses_context_with_cpu); 1559 1560 /* 1561 * coresight_alloc_device_name - Get an index for a given device in the list 1562 * specific to a driver (presented by the prefix string). An index is allocated 1563 * for a device and is tracked with the fwnode_handle to prevent allocating 1564 * duplicate indices for the same device (e.g, if we defer probing of 1565 * a device due to dependencies), in case the index is requested again. 1566 */ 1567 char *coresight_alloc_device_name(const char *prefix, struct device *dev) 1568 { 1569 struct coresight_dev_list *list; 1570 char *name = NULL; 1571 int idx; 1572 1573 mutex_lock(&coresight_mutex); 1574 1575 list = coresight_allocate_device_list(prefix); 1576 if (!list) 1577 goto done; 1578 1579 idx = coresight_allocate_device_idx(list, dev); 1580 1581 /* 1582 * If index allocation fails, the device list is not released here; 1583 * it is instead freed later by coresight_release_device_list() when 1584 * the coresight_core module is unloaded. 1585 */ 1586 if (idx < 0) 1587 goto done; 1588 1589 name = devm_kasprintf(dev, GFP_KERNEL, "%s%d", list->pfx, idx); 1590 done: 1591 mutex_unlock(&coresight_mutex); 1592 return name; 1593 } 1594 EXPORT_SYMBOL_GPL(coresight_alloc_device_name); 1595 1596 static void coresight_release_device_list(void) 1597 { 1598 struct coresight_dev_list *list, *next; 1599 int i; 1600 1601 /* 1602 * Here is no need to take coresight_mutex; this is during core module 1603 * unloading, no race condition with other modules. 1604 */ 1605 1606 list_for_each_entry_safe(list, next, &coresight_dev_idx_list, node) { 1607 for (i = 0; i < list->nr_idx; i++) 1608 list->fwnode_list[i] = NULL; 1609 list->nr_idx = 0; 1610 list_del(&list->node); 1611 1612 kfree(list->pfx); 1613 kfree(list->fwnode_list); 1614 kfree(list); 1615 } 1616 } 1617 1618 const struct bus_type coresight_bustype = { 1619 .name = "coresight", 1620 }; 1621 1622 static int coresight_panic_sync(struct device *dev, void *data) 1623 { 1624 int mode; 1625 struct coresight_device *csdev; 1626 1627 /* Run through panic sync handlers for all enabled devices */ 1628 csdev = container_of(dev, struct coresight_device, dev); 1629 mode = coresight_get_mode(csdev); 1630 1631 if ((mode == CS_MODE_SYSFS) || (mode == CS_MODE_PERF)) { 1632 if (panic_ops(csdev)) 1633 panic_ops(csdev)->sync(csdev); 1634 } 1635 1636 return 0; 1637 } 1638 1639 static int coresight_panic_cb(struct notifier_block *self, 1640 unsigned long v, void *p) 1641 { 1642 bus_for_each_dev(&coresight_bustype, NULL, NULL, 1643 coresight_panic_sync); 1644 1645 return 0; 1646 } 1647 1648 static struct notifier_block coresight_notifier = { 1649 .notifier_call = coresight_panic_cb, 1650 }; 1651 1652 static int __init coresight_init(void) 1653 { 1654 int ret; 1655 1656 ret = bus_register(&coresight_bustype); 1657 if (ret) 1658 return ret; 1659 1660 ret = etm_perf_init(); 1661 if (ret) 1662 goto exit_bus_unregister; 1663 1664 /* Register function to be called for panic */ 1665 ret = atomic_notifier_chain_register(&panic_notifier_list, 1666 &coresight_notifier); 1667 if (ret) 1668 goto exit_perf; 1669 1670 /* initialise the coresight syscfg API */ 1671 ret = cscfg_init(); 1672 if (!ret) 1673 return 0; 1674 1675 atomic_notifier_chain_unregister(&panic_notifier_list, 1676 &coresight_notifier); 1677 exit_perf: 1678 etm_perf_exit(); 1679 exit_bus_unregister: 1680 bus_unregister(&coresight_bustype); 1681 return ret; 1682 } 1683 1684 static void __exit coresight_exit(void) 1685 { 1686 cscfg_exit(); 1687 atomic_notifier_chain_unregister(&panic_notifier_list, 1688 &coresight_notifier); 1689 etm_perf_exit(); 1690 bus_unregister(&coresight_bustype); 1691 coresight_release_device_list(); 1692 } 1693 1694 module_init(coresight_init); 1695 module_exit(coresight_exit); 1696 1697 int coresight_init_driver_with_owner(const char *drv, struct amba_driver *amba_drv, 1698 struct platform_driver *pdev_drv, struct module *owner, 1699 const char *mod_name) 1700 { 1701 int ret; 1702 1703 ret = __amba_driver_register(amba_drv, owner); 1704 if (ret) { 1705 pr_err("%s: error registering AMBA driver\n", drv); 1706 return ret; 1707 } 1708 1709 ret = __platform_driver_register(pdev_drv, owner, mod_name); 1710 if (!ret) 1711 return 0; 1712 1713 pr_err("%s: error registering platform driver\n", drv); 1714 amba_driver_unregister(amba_drv); 1715 return ret; 1716 } 1717 EXPORT_SYMBOL_GPL(coresight_init_driver_with_owner); 1718 1719 void coresight_remove_driver(struct amba_driver *amba_drv, 1720 struct platform_driver *pdev_drv) 1721 { 1722 amba_driver_unregister(amba_drv); 1723 platform_driver_unregister(pdev_drv); 1724 } 1725 EXPORT_SYMBOL_GPL(coresight_remove_driver); 1726 1727 int coresight_etm_get_trace_id(struct coresight_device *csdev, enum cs_mode mode, 1728 struct coresight_device *sink) 1729 { 1730 int cpu, trace_id; 1731 1732 if (csdev->type != CORESIGHT_DEV_TYPE_SOURCE || !source_ops(csdev)->cpu_id) 1733 return -EINVAL; 1734 1735 cpu = source_ops(csdev)->cpu_id(csdev); 1736 switch (mode) { 1737 case CS_MODE_SYSFS: 1738 trace_id = coresight_trace_id_get_cpu_id(cpu); 1739 break; 1740 case CS_MODE_PERF: 1741 if (WARN_ON(!sink)) 1742 return -EINVAL; 1743 1744 trace_id = coresight_trace_id_get_cpu_id_map(cpu, &sink->perf_sink_id_map); 1745 break; 1746 default: 1747 trace_id = -EINVAL; 1748 break; 1749 } 1750 1751 if (!IS_VALID_CS_TRACE_ID(trace_id)) 1752 dev_err(&csdev->dev, 1753 "Failed to allocate trace ID on CPU%d\n", cpu); 1754 1755 return trace_id; 1756 } 1757 EXPORT_SYMBOL_GPL(coresight_etm_get_trace_id); 1758 1759 /* 1760 * Attempt to find and enable programming clock (pclk) and trace clock (atclk) 1761 * for the given device. 1762 * 1763 * For ACPI devices, clocks are controlled by firmware, so bail out early in 1764 * this case. Also, skip enabling pclk if the clock is managed by the AMBA 1765 * bus driver instead. 1766 * 1767 * atclk is an optional clock, it will be only enabled when it is existed. 1768 * Otherwise, a NULL pointer will be returned to caller. 1769 * 1770 * Returns: '0' on Success; Error code otherwise. 1771 */ 1772 int coresight_get_enable_clocks(struct device *dev, struct clk **pclk, 1773 struct clk **atclk) 1774 { 1775 WARN_ON(!pclk); 1776 1777 if (has_acpi_companion(dev)) 1778 return 0; 1779 1780 if (!dev_is_amba(dev)) { 1781 /* 1782 * "apb_pclk" is the default clock name for an Arm Primecell 1783 * peripheral, while "apb" is used only by the CTCU driver. 1784 * 1785 * For easier maintenance, CoreSight drivers should use 1786 * "apb_pclk" as the programming clock name. 1787 */ 1788 *pclk = devm_clk_get_optional_enabled(dev, "apb_pclk"); 1789 if (!*pclk) 1790 *pclk = devm_clk_get_optional_enabled(dev, "apb"); 1791 if (IS_ERR(*pclk)) 1792 return PTR_ERR(*pclk); 1793 } 1794 1795 /* Initialization of atclk is skipped if it is a NULL pointer. */ 1796 if (atclk) { 1797 *atclk = devm_clk_get_optional_enabled(dev, "atclk"); 1798 if (IS_ERR(*atclk)) 1799 return PTR_ERR(*atclk); 1800 } 1801 1802 return 0; 1803 } 1804 EXPORT_SYMBOL_GPL(coresight_get_enable_clocks); 1805 1806 MODULE_LICENSE("GPL v2"); 1807 MODULE_AUTHOR("Pratik Patel <pratikp@codeaurora.org>"); 1808 MODULE_AUTHOR("Mathieu Poirier <mathieu.poirier@linaro.org>"); 1809 MODULE_DESCRIPTION("Arm CoreSight tracer driver"); 1810