1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Copyright (C) 2005, 2006 IBM Corporation
4 * Copyright (C) 2014, 2015 Intel Corporation
5 *
6 * Authors:
7 * Leendert van Doorn <leendert@watson.ibm.com>
8 * Kylene Hall <kjhall@us.ibm.com>
9 *
10 * Maintained by: <tpmdd-devel@lists.sourceforge.net>
11 *
12 * Device driver for TCG/TCPA TPM (trusted platform module).
13 * Specifications at www.trustedcomputinggroup.org
14 *
15 * This device driver implements the TPM interface as defined in
16 * the TCG TPM Interface Spec version 1.2, revision 1.0.
17 */
18 #include <linux/init.h>
19 #include <linux/module.h>
20 #include <linux/moduleparam.h>
21 #include <linux/pnp.h>
22 #include <linux/slab.h>
23 #include <linux/interrupt.h>
24 #include <linux/wait.h>
25 #include <linux/acpi.h>
26 #include <linux/freezer.h>
27 #include <linux/dmi.h>
28 #include "tpm.h"
29 #include "tpm_tis_core.h"
30
31 #define TPM_TIS_MAX_UNHANDLED_IRQS 1000
32
33 static void tpm_tis_clkrun_enable(struct tpm_chip *chip, bool value);
34
wait_for_tpm_stat_cond(struct tpm_chip * chip,u8 mask,bool check_cancel,bool * canceled)35 static bool wait_for_tpm_stat_cond(struct tpm_chip *chip, u8 mask,
36 bool check_cancel, bool *canceled)
37 {
38 u8 status = chip->ops->status(chip);
39
40 *canceled = false;
41 if ((status & mask) == mask)
42 return true;
43 if (check_cancel && chip->ops->req_canceled(chip, status)) {
44 *canceled = true;
45 return true;
46 }
47 return false;
48 }
49
tpm_tis_filter_sts_mask(u8 int_mask,u8 sts_mask)50 static u8 tpm_tis_filter_sts_mask(u8 int_mask, u8 sts_mask)
51 {
52 if (!(int_mask & TPM_INTF_STS_VALID_INT))
53 sts_mask &= ~TPM_STS_VALID;
54
55 if (!(int_mask & TPM_INTF_DATA_AVAIL_INT))
56 sts_mask &= ~TPM_STS_DATA_AVAIL;
57
58 if (!(int_mask & TPM_INTF_CMD_READY_INT))
59 sts_mask &= ~TPM_STS_COMMAND_READY;
60
61 return sts_mask;
62 }
63
wait_for_tpm_stat(struct tpm_chip * chip,u8 mask,unsigned long timeout,wait_queue_head_t * queue,bool check_cancel)64 static int wait_for_tpm_stat(struct tpm_chip *chip, u8 mask,
65 unsigned long timeout, wait_queue_head_t *queue,
66 bool check_cancel)
67 {
68 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
69 unsigned long stop;
70 long rc;
71 u8 status;
72 bool canceled = false;
73 u8 sts_mask;
74 int ret = 0;
75
76 /* check current status */
77 status = chip->ops->status(chip);
78 if ((status & mask) == mask)
79 return 0;
80
81 sts_mask = mask & (TPM_STS_VALID | TPM_STS_DATA_AVAIL |
82 TPM_STS_COMMAND_READY);
83 /* check what status changes can be handled by irqs */
84 sts_mask = tpm_tis_filter_sts_mask(priv->int_mask, sts_mask);
85
86 stop = jiffies + timeout;
87 /* process status changes with irq support */
88 if (sts_mask) {
89 ret = -ETIME;
90 again:
91 timeout = stop - jiffies;
92 if ((long)timeout <= 0)
93 return -ETIME;
94 rc = wait_event_interruptible_timeout(*queue,
95 wait_for_tpm_stat_cond(chip, sts_mask, check_cancel,
96 &canceled),
97 timeout);
98 if (rc > 0) {
99 if (canceled)
100 return -ECANCELED;
101 ret = 0;
102 }
103 if (rc == -ERESTARTSYS && freezing(current)) {
104 clear_thread_flag(TIF_SIGPENDING);
105 goto again;
106 }
107 }
108
109 if (ret)
110 return ret;
111
112 mask &= ~sts_mask;
113 if (!mask) /* all done */
114 return 0;
115 /* process status changes without irq support */
116 do {
117 usleep_range(priv->timeout_min, priv->timeout_max);
118 status = chip->ops->status(chip);
119 if ((status & mask) == mask)
120 return 0;
121 } while (time_before(jiffies, stop));
122 return -ETIME;
123 }
124
125 /* Before we attempt to access the TPM we must see that the valid bit is set.
126 * The specification says that this bit is 0 at reset and remains 0 until the
127 * 'TPM has gone through its self test and initialization and has established
128 * correct values in the other bits.'
129 */
wait_startup(struct tpm_chip * chip,int l)130 static int wait_startup(struct tpm_chip *chip, int l)
131 {
132 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
133 unsigned long stop = jiffies + chip->timeout_a;
134
135 do {
136 int rc;
137 u8 access;
138
139 rc = tpm_tis_read8(priv, TPM_ACCESS(l), &access);
140 if (rc < 0)
141 return rc;
142
143 if (access & TPM_ACCESS_VALID)
144 return 0;
145 tpm_msleep(TPM_TIMEOUT);
146 } while (time_before(jiffies, stop));
147 return -1;
148 }
149
check_locality(struct tpm_chip * chip,int l)150 static bool check_locality(struct tpm_chip *chip, int l)
151 {
152 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
153 int rc;
154 u8 access;
155
156 rc = tpm_tis_read8(priv, TPM_ACCESS(l), &access);
157 if (rc < 0)
158 return false;
159
160 if ((access & (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID
161 | TPM_ACCESS_REQUEST_USE)) ==
162 (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID)) {
163 priv->locality = l;
164 return true;
165 }
166
167 return false;
168 }
169
__tpm_tis_relinquish_locality(struct tpm_tis_data * priv,int l)170 static int __tpm_tis_relinquish_locality(struct tpm_tis_data *priv, int l)
171 {
172 tpm_tis_write8(priv, TPM_ACCESS(l), TPM_ACCESS_ACTIVE_LOCALITY);
173
174 return 0;
175 }
176
tpm_tis_relinquish_locality(struct tpm_chip * chip,int l)177 static int tpm_tis_relinquish_locality(struct tpm_chip *chip, int l)
178 {
179 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
180
181 mutex_lock(&priv->locality_count_mutex);
182 priv->locality_count--;
183 if (priv->locality_count == 0)
184 __tpm_tis_relinquish_locality(priv, l);
185 mutex_unlock(&priv->locality_count_mutex);
186
187 return 0;
188 }
189
__tpm_tis_request_locality(struct tpm_chip * chip,int l)190 static int __tpm_tis_request_locality(struct tpm_chip *chip, int l)
191 {
192 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
193 unsigned long stop, timeout;
194 long rc;
195
196 if (check_locality(chip, l))
197 return l;
198
199 rc = tpm_tis_write8(priv, TPM_ACCESS(l), TPM_ACCESS_REQUEST_USE);
200 if (rc < 0)
201 return rc;
202
203 stop = jiffies + chip->timeout_a;
204
205 if (chip->flags & TPM_CHIP_FLAG_IRQ) {
206 again:
207 timeout = stop - jiffies;
208 if ((long)timeout <= 0)
209 return -1;
210 rc = wait_event_interruptible_timeout(priv->int_queue,
211 (check_locality
212 (chip, l)),
213 timeout);
214 if (rc > 0)
215 return l;
216 if (rc == -ERESTARTSYS && freezing(current)) {
217 clear_thread_flag(TIF_SIGPENDING);
218 goto again;
219 }
220 } else {
221 /* wait for burstcount */
222 do {
223 if (check_locality(chip, l))
224 return l;
225 tpm_msleep(TPM_TIMEOUT);
226 } while (time_before(jiffies, stop));
227 }
228 return -1;
229 }
230
tpm_tis_request_locality(struct tpm_chip * chip,int l)231 static int tpm_tis_request_locality(struct tpm_chip *chip, int l)
232 {
233 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
234 int ret = 0;
235
236 mutex_lock(&priv->locality_count_mutex);
237 if (priv->locality_count == 0)
238 ret = __tpm_tis_request_locality(chip, l);
239 if (!ret)
240 priv->locality_count++;
241 mutex_unlock(&priv->locality_count_mutex);
242 return ret;
243 }
244
tpm_tis_status(struct tpm_chip * chip)245 static u8 tpm_tis_status(struct tpm_chip *chip)
246 {
247 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
248 int rc;
249 u8 status;
250
251 rc = tpm_tis_read8(priv, TPM_STS(priv->locality), &status);
252 if (rc < 0)
253 return 0;
254
255 if (unlikely((status & TPM_STS_READ_ZERO) != 0)) {
256 if (!test_and_set_bit(TPM_TIS_INVALID_STATUS, &priv->flags)) {
257 /*
258 * If this trips, the chances are the read is
259 * returning 0xff because the locality hasn't been
260 * acquired. Usually because tpm_try_get_ops() hasn't
261 * been called before doing a TPM operation.
262 */
263 dev_err(&chip->dev, "invalid TPM_STS.x 0x%02x, dumping stack for forensics\n",
264 status);
265
266 /*
267 * Dump stack for forensics, as invalid TPM_STS.x could be
268 * potentially triggered by impaired tpm_try_get_ops().
269 */
270 dump_stack();
271 }
272
273 return 0;
274 }
275
276 return status;
277 }
278
tpm_tis_ready(struct tpm_chip * chip)279 static void tpm_tis_ready(struct tpm_chip *chip)
280 {
281 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
282
283 /* this causes the current command to be aborted */
284 tpm_tis_write8(priv, TPM_STS(priv->locality), TPM_STS_COMMAND_READY);
285 }
286
get_burstcount(struct tpm_chip * chip)287 static int get_burstcount(struct tpm_chip *chip)
288 {
289 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
290 unsigned long stop;
291 int burstcnt, rc;
292 u32 value;
293
294 /* wait for burstcount */
295 if (chip->flags & TPM_CHIP_FLAG_TPM2)
296 stop = jiffies + chip->timeout_a;
297 else
298 stop = jiffies + chip->timeout_d;
299 do {
300 rc = tpm_tis_read32(priv, TPM_STS(priv->locality), &value);
301 if (rc < 0)
302 return rc;
303
304 burstcnt = (value >> 8) & 0xFFFF;
305 if (burstcnt)
306 return burstcnt;
307 usleep_range(TPM_TIMEOUT_USECS_MIN, TPM_TIMEOUT_USECS_MAX);
308 } while (time_before(jiffies, stop));
309 return -EBUSY;
310 }
311
recv_data(struct tpm_chip * chip,u8 * buf,size_t count)312 static int recv_data(struct tpm_chip *chip, u8 *buf, size_t count)
313 {
314 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
315 int size = 0, burstcnt, rc;
316
317 while (size < count) {
318 rc = wait_for_tpm_stat(chip,
319 TPM_STS_DATA_AVAIL | TPM_STS_VALID,
320 chip->timeout_c,
321 &priv->read_queue, true);
322 if (rc < 0)
323 return rc;
324 burstcnt = get_burstcount(chip);
325 if (burstcnt < 0) {
326 dev_err(&chip->dev, "Unable to read burstcount\n");
327 return burstcnt;
328 }
329 burstcnt = min_t(int, burstcnt, count - size);
330
331 rc = tpm_tis_read_bytes(priv, TPM_DATA_FIFO(priv->locality),
332 burstcnt, buf + size);
333 if (rc < 0)
334 return rc;
335
336 size += burstcnt;
337 }
338 return size;
339 }
340
tpm_tis_try_recv(struct tpm_chip * chip,u8 * buf,size_t count)341 static int tpm_tis_try_recv(struct tpm_chip *chip, u8 *buf, size_t count)
342 {
343 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
344 int size = 0;
345 int status;
346 u32 expected;
347 int rc;
348
349 size = recv_data(chip, buf, TPM_HEADER_SIZE);
350 /* read first 10 bytes, including tag, paramsize, and result */
351 if (size < TPM_HEADER_SIZE) {
352 dev_err(&chip->dev, "Unable to read header\n");
353 goto out;
354 }
355
356 expected = be32_to_cpu(*(__be32 *) (buf + 2));
357 if (expected > count || expected < TPM_HEADER_SIZE) {
358 size = -EIO;
359 goto out;
360 }
361
362 rc = recv_data(chip, &buf[TPM_HEADER_SIZE],
363 expected - TPM_HEADER_SIZE);
364 if (rc < 0) {
365 size = rc;
366 goto out;
367 }
368 size += rc;
369 if (size < expected) {
370 dev_err(&chip->dev, "Unable to read remainder of result\n");
371 size = -ETIME;
372 goto out;
373 }
374
375 if (wait_for_tpm_stat(chip, TPM_STS_VALID, chip->timeout_c,
376 &priv->int_queue, false) < 0) {
377 size = -ETIME;
378 goto out;
379 }
380 status = tpm_tis_status(chip);
381 if (status & TPM_STS_DATA_AVAIL) {
382 dev_err(&chip->dev, "Error left over data\n");
383 size = -EIO;
384 goto out;
385 }
386
387 rc = tpm_tis_verify_crc(priv, (size_t)size, buf);
388 if (rc < 0) {
389 dev_err(&chip->dev, "CRC mismatch for response.\n");
390 size = rc;
391 goto out;
392 }
393
394 out:
395 return size;
396 }
397
tpm_tis_recv(struct tpm_chip * chip,u8 * buf,size_t count)398 static int tpm_tis_recv(struct tpm_chip *chip, u8 *buf, size_t count)
399 {
400 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
401 unsigned int try;
402 int rc = 0;
403
404 if (count < TPM_HEADER_SIZE)
405 return -EIO;
406
407 for (try = 0; try < TPM_RETRY; try++) {
408 rc = tpm_tis_try_recv(chip, buf, count);
409
410 if (rc == -EIO)
411 /* Data transfer errors, indicated by EIO, can be
412 * recovered by rereading the response.
413 */
414 tpm_tis_write8(priv, TPM_STS(priv->locality),
415 TPM_STS_RESPONSE_RETRY);
416 else
417 break;
418 }
419
420 tpm_tis_ready(chip);
421
422 return rc;
423 }
424
425 /*
426 * If interrupts are used (signaled by an irq set in the vendor structure)
427 * tpm.c can skip polling for the data to be available as the interrupt is
428 * waited for here
429 */
tpm_tis_send_data(struct tpm_chip * chip,const u8 * buf,size_t len)430 static int tpm_tis_send_data(struct tpm_chip *chip, const u8 *buf, size_t len)
431 {
432 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
433 int rc, status, burstcnt;
434 size_t count = 0;
435 bool itpm = test_bit(TPM_TIS_ITPM_WORKAROUND, &priv->flags);
436
437 status = tpm_tis_status(chip);
438 if ((status & TPM_STS_COMMAND_READY) == 0) {
439 tpm_tis_ready(chip);
440 if (wait_for_tpm_stat
441 (chip, TPM_STS_COMMAND_READY, chip->timeout_b,
442 &priv->int_queue, false) < 0) {
443 rc = -ETIME;
444 goto out_err;
445 }
446 }
447
448 while (count < len - 1) {
449 burstcnt = get_burstcount(chip);
450 if (burstcnt < 0) {
451 dev_err(&chip->dev, "Unable to read burstcount\n");
452 rc = burstcnt;
453 goto out_err;
454 }
455 burstcnt = min_t(int, burstcnt, len - count - 1);
456 rc = tpm_tis_write_bytes(priv, TPM_DATA_FIFO(priv->locality),
457 burstcnt, buf + count);
458 if (rc < 0)
459 goto out_err;
460
461 count += burstcnt;
462
463 if (wait_for_tpm_stat(chip, TPM_STS_VALID, chip->timeout_c,
464 &priv->int_queue, false) < 0) {
465 if (test_bit(TPM_TIS_STATUS_VALID_RETRY, &priv->flags))
466 rc = -EAGAIN;
467 else
468 rc = -ETIME;
469 goto out_err;
470 }
471 status = tpm_tis_status(chip);
472 if (!itpm && (status & TPM_STS_DATA_EXPECT) == 0) {
473 rc = -EIO;
474 goto out_err;
475 }
476 }
477
478 /* write last byte */
479 rc = tpm_tis_write8(priv, TPM_DATA_FIFO(priv->locality), buf[count]);
480 if (rc < 0)
481 goto out_err;
482
483 if (wait_for_tpm_stat(chip, TPM_STS_VALID, chip->timeout_c,
484 &priv->int_queue, false) < 0) {
485 if (test_bit(TPM_TIS_STATUS_VALID_RETRY, &priv->flags))
486 rc = -EAGAIN;
487 else
488 rc = -ETIME;
489 goto out_err;
490 }
491 status = tpm_tis_status(chip);
492 if (!itpm && (status & TPM_STS_DATA_EXPECT) != 0) {
493 rc = -EIO;
494 goto out_err;
495 }
496
497 rc = tpm_tis_verify_crc(priv, len, buf);
498 if (rc < 0) {
499 dev_err(&chip->dev, "CRC mismatch for command.\n");
500 goto out_err;
501 }
502
503 return 0;
504
505 out_err:
506 tpm_tis_ready(chip);
507 return rc;
508 }
509
__tpm_tis_disable_interrupts(struct tpm_chip * chip)510 static void __tpm_tis_disable_interrupts(struct tpm_chip *chip)
511 {
512 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
513 u32 int_mask = 0;
514
515 tpm_tis_read32(priv, TPM_INT_ENABLE(priv->locality), &int_mask);
516 int_mask &= ~TPM_GLOBAL_INT_ENABLE;
517 tpm_tis_write32(priv, TPM_INT_ENABLE(priv->locality), int_mask);
518
519 chip->flags &= ~TPM_CHIP_FLAG_IRQ;
520 }
521
tpm_tis_disable_interrupts(struct tpm_chip * chip)522 static void tpm_tis_disable_interrupts(struct tpm_chip *chip)
523 {
524 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
525
526 if (priv->irq == 0)
527 return;
528
529 __tpm_tis_disable_interrupts(chip);
530
531 devm_free_irq(chip->dev.parent, priv->irq, chip);
532 priv->irq = 0;
533 }
534
535 /*
536 * If interrupts are used (signaled by an irq set in the vendor structure)
537 * tpm.c can skip polling for the data to be available as the interrupt is
538 * waited for here
539 */
tpm_tis_send_main(struct tpm_chip * chip,const u8 * buf,size_t len)540 static int tpm_tis_send_main(struct tpm_chip *chip, const u8 *buf, size_t len)
541 {
542 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
543 int rc;
544 u32 ordinal;
545 unsigned long dur;
546 unsigned int try;
547
548 for (try = 0; try < TPM_RETRY; try++) {
549 rc = tpm_tis_send_data(chip, buf, len);
550 if (rc >= 0)
551 /* Data transfer done successfully */
552 break;
553 else if (rc != -EAGAIN && rc != -EIO)
554 /* Data transfer failed, not recoverable */
555 return rc;
556
557 usleep_range(priv->timeout_min, priv->timeout_max);
558 }
559
560 /* go and do it */
561 rc = tpm_tis_write8(priv, TPM_STS(priv->locality), TPM_STS_GO);
562 if (rc < 0)
563 goto out_err;
564
565 if (chip->flags & TPM_CHIP_FLAG_IRQ) {
566 ordinal = be32_to_cpu(*((__be32 *) (buf + 6)));
567
568 dur = tpm_calc_ordinal_duration(chip, ordinal);
569 if (wait_for_tpm_stat
570 (chip, TPM_STS_DATA_AVAIL | TPM_STS_VALID, dur,
571 &priv->read_queue, false) < 0) {
572 rc = -ETIME;
573 goto out_err;
574 }
575 }
576 return 0;
577 out_err:
578 tpm_tis_ready(chip);
579 return rc;
580 }
581
tpm_tis_send(struct tpm_chip * chip,u8 * buf,size_t bufsiz,size_t len)582 static int tpm_tis_send(struct tpm_chip *chip, u8 *buf, size_t bufsiz,
583 size_t len)
584 {
585 int rc, irq;
586 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
587
588 if (!(chip->flags & TPM_CHIP_FLAG_IRQ) ||
589 test_bit(TPM_TIS_IRQ_TESTED, &priv->flags))
590 return tpm_tis_send_main(chip, buf, len);
591
592 /* Verify receipt of the expected IRQ */
593 irq = priv->irq;
594 priv->irq = 0;
595 chip->flags &= ~TPM_CHIP_FLAG_IRQ;
596 rc = tpm_tis_send_main(chip, buf, len);
597 priv->irq = irq;
598 chip->flags |= TPM_CHIP_FLAG_IRQ;
599 if (!test_bit(TPM_TIS_IRQ_TESTED, &priv->flags))
600 tpm_msleep(1);
601 if (!test_bit(TPM_TIS_IRQ_TESTED, &priv->flags))
602 tpm_tis_disable_interrupts(chip);
603 set_bit(TPM_TIS_IRQ_TESTED, &priv->flags);
604 return rc;
605 }
606
607 struct tis_vendor_durations_override {
608 u32 did_vid;
609 struct tpm1_version version;
610 unsigned long durations[3];
611 };
612
613 static const struct tis_vendor_durations_override vendor_dur_overrides[] = {
614 /* STMicroelectronics 0x104a */
615 { 0x0000104a,
616 { 1, 2, 8, 28 },
617 { (2 * 60 * HZ), (2 * 60 * HZ), (2 * 60 * HZ) } },
618 };
619
tpm_tis_update_durations(struct tpm_chip * chip,unsigned long * duration_cap)620 static void tpm_tis_update_durations(struct tpm_chip *chip,
621 unsigned long *duration_cap)
622 {
623 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
624 struct tpm1_version *version;
625 u32 did_vid;
626 int i, rc;
627 cap_t cap;
628
629 chip->duration_adjusted = false;
630
631 if (chip->ops->clk_enable != NULL)
632 chip->ops->clk_enable(chip, true);
633
634 rc = tpm_tis_read32(priv, TPM_DID_VID(0), &did_vid);
635 if (rc < 0) {
636 dev_warn(&chip->dev, "%s: failed to read did_vid. %d\n",
637 __func__, rc);
638 goto out;
639 }
640
641 /* Try to get a TPM version 1.2 or 1.1 TPM_CAP_VERSION_INFO */
642 rc = tpm1_getcap(chip, TPM_CAP_VERSION_1_2, &cap,
643 "attempting to determine the 1.2 version",
644 sizeof(cap.version2));
645 if (!rc) {
646 version = &cap.version2.version;
647 } else {
648 rc = tpm1_getcap(chip, TPM_CAP_VERSION_1_1, &cap,
649 "attempting to determine the 1.1 version",
650 sizeof(cap.version1));
651
652 if (rc)
653 goto out;
654
655 version = &cap.version1;
656 }
657
658 for (i = 0; i != ARRAY_SIZE(vendor_dur_overrides); i++) {
659 if (vendor_dur_overrides[i].did_vid != did_vid)
660 continue;
661
662 if ((version->major ==
663 vendor_dur_overrides[i].version.major) &&
664 (version->minor ==
665 vendor_dur_overrides[i].version.minor) &&
666 (version->rev_major ==
667 vendor_dur_overrides[i].version.rev_major) &&
668 (version->rev_minor ==
669 vendor_dur_overrides[i].version.rev_minor)) {
670
671 memcpy(duration_cap,
672 vendor_dur_overrides[i].durations,
673 sizeof(vendor_dur_overrides[i].durations));
674
675 chip->duration_adjusted = true;
676 goto out;
677 }
678 }
679
680 out:
681 if (chip->ops->clk_enable != NULL)
682 chip->ops->clk_enable(chip, false);
683 }
684
685 struct tis_vendor_timeout_override {
686 u32 did_vid;
687 unsigned long timeout_us[4];
688 };
689
690 static const struct tis_vendor_timeout_override vendor_timeout_overrides[] = {
691 /* Atmel 3204 */
692 { 0x32041114, { (TIS_SHORT_TIMEOUT*1000), (TIS_LONG_TIMEOUT*1000),
693 (TIS_SHORT_TIMEOUT*1000), (TIS_SHORT_TIMEOUT*1000) } },
694 };
695
tpm_tis_update_timeouts(struct tpm_chip * chip,unsigned long * timeout_cap)696 static void tpm_tis_update_timeouts(struct tpm_chip *chip,
697 unsigned long *timeout_cap)
698 {
699 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
700 int i, rc;
701 u32 did_vid;
702
703 chip->timeout_adjusted = false;
704
705 if (chip->ops->clk_enable != NULL)
706 chip->ops->clk_enable(chip, true);
707
708 rc = tpm_tis_read32(priv, TPM_DID_VID(0), &did_vid);
709 if (rc < 0) {
710 dev_warn(&chip->dev, "%s: failed to read did_vid: %d\n",
711 __func__, rc);
712 goto out;
713 }
714
715 for (i = 0; i != ARRAY_SIZE(vendor_timeout_overrides); i++) {
716 if (vendor_timeout_overrides[i].did_vid != did_vid)
717 continue;
718 memcpy(timeout_cap, vendor_timeout_overrides[i].timeout_us,
719 sizeof(vendor_timeout_overrides[i].timeout_us));
720 chip->timeout_adjusted = true;
721 }
722
723 out:
724 if (chip->ops->clk_enable != NULL)
725 chip->ops->clk_enable(chip, false);
726
727 return;
728 }
729
730 /*
731 * Early probing for iTPM with STS_DATA_EXPECT flaw.
732 * Try sending command without itpm flag set and if that
733 * fails, repeat with itpm flag set.
734 */
probe_itpm(struct tpm_chip * chip)735 static int probe_itpm(struct tpm_chip *chip)
736 {
737 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
738 int rc = 0;
739 static const u8 cmd_getticks[] = {
740 0x00, 0xc1, 0x00, 0x00, 0x00, 0x0a,
741 0x00, 0x00, 0x00, 0xf1
742 };
743 size_t len = sizeof(cmd_getticks);
744 u16 vendor;
745
746 if (test_bit(TPM_TIS_ITPM_WORKAROUND, &priv->flags))
747 return 0;
748
749 rc = tpm_tis_read16(priv, TPM_DID_VID(0), &vendor);
750 if (rc < 0)
751 return rc;
752
753 /* probe only iTPMS */
754 if (vendor != TPM_VID_INTEL)
755 return 0;
756
757 if (tpm_tis_request_locality(chip, 0) != 0)
758 return -EBUSY;
759
760 rc = tpm_tis_send_data(chip, cmd_getticks, len);
761 if (rc == 0)
762 goto out;
763
764 tpm_tis_ready(chip);
765
766 set_bit(TPM_TIS_ITPM_WORKAROUND, &priv->flags);
767
768 rc = tpm_tis_send_data(chip, cmd_getticks, len);
769 if (rc == 0)
770 dev_info(&chip->dev, "Detected an iTPM.\n");
771 else {
772 clear_bit(TPM_TIS_ITPM_WORKAROUND, &priv->flags);
773 rc = -EFAULT;
774 }
775
776 out:
777 tpm_tis_ready(chip);
778 tpm_tis_relinquish_locality(chip, priv->locality);
779
780 return rc;
781 }
782
tpm_tis_req_canceled(struct tpm_chip * chip,u8 status)783 static bool tpm_tis_req_canceled(struct tpm_chip *chip, u8 status)
784 {
785 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
786
787 if (!test_bit(TPM_TIS_DEFAULT_CANCELLATION, &priv->flags)) {
788 switch (priv->manufacturer_id) {
789 case TPM_VID_WINBOND:
790 return ((status == TPM_STS_VALID) ||
791 (status == (TPM_STS_VALID | TPM_STS_COMMAND_READY)));
792 case TPM_VID_STM:
793 return (status == (TPM_STS_VALID | TPM_STS_COMMAND_READY));
794 default:
795 break;
796 }
797 }
798
799 return status == TPM_STS_COMMAND_READY;
800 }
801
tpm_tis_revert_interrupts(struct tpm_chip * chip)802 static irqreturn_t tpm_tis_revert_interrupts(struct tpm_chip *chip)
803 {
804 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
805 const char *product;
806 const char *vendor;
807
808 dev_warn(&chip->dev, FW_BUG
809 "TPM interrupt storm detected, polling instead\n");
810
811 vendor = dmi_get_system_info(DMI_SYS_VENDOR);
812 product = dmi_get_system_info(DMI_PRODUCT_VERSION);
813
814 if (vendor && product) {
815 dev_info(&chip->dev,
816 "Consider adding the following entry to tpm_tis_dmi_table:\n");
817 dev_info(&chip->dev, "\tDMI_SYS_VENDOR: %s\n", vendor);
818 dev_info(&chip->dev, "\tDMI_PRODUCT_VERSION: %s\n", product);
819 }
820
821 if (tpm_tis_request_locality(chip, 0) != 0)
822 return IRQ_NONE;
823
824 __tpm_tis_disable_interrupts(chip);
825 tpm_tis_relinquish_locality(chip, 0);
826
827 schedule_work(&priv->free_irq_work);
828
829 return IRQ_HANDLED;
830 }
831
tpm_tis_update_unhandled_irqs(struct tpm_chip * chip)832 static irqreturn_t tpm_tis_update_unhandled_irqs(struct tpm_chip *chip)
833 {
834 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
835 irqreturn_t irqret = IRQ_HANDLED;
836
837 if (!(chip->flags & TPM_CHIP_FLAG_IRQ))
838 return IRQ_HANDLED;
839
840 if (time_after(jiffies, priv->last_unhandled_irq + HZ/10))
841 priv->unhandled_irqs = 1;
842 else
843 priv->unhandled_irqs++;
844
845 priv->last_unhandled_irq = jiffies;
846
847 if (priv->unhandled_irqs > TPM_TIS_MAX_UNHANDLED_IRQS)
848 irqret = tpm_tis_revert_interrupts(chip);
849
850 return irqret;
851 }
852
tis_int_handler(int dummy,void * dev_id)853 static irqreturn_t tis_int_handler(int dummy, void *dev_id)
854 {
855 struct tpm_chip *chip = dev_id;
856 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
857 u32 interrupt;
858 int rc;
859
860 rc = tpm_tis_read32(priv, TPM_INT_STATUS(priv->locality), &interrupt);
861 if (rc < 0)
862 goto err;
863
864 if (interrupt == 0)
865 goto err;
866
867 set_bit(TPM_TIS_IRQ_TESTED, &priv->flags);
868 if (interrupt & TPM_INTF_DATA_AVAIL_INT)
869 wake_up_interruptible(&priv->read_queue);
870
871 if (interrupt &
872 (TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_STS_VALID_INT |
873 TPM_INTF_CMD_READY_INT))
874 wake_up_interruptible(&priv->int_queue);
875
876 /* Clear interrupts handled with TPM_EOI */
877 tpm_tis_request_locality(chip, 0);
878 rc = tpm_tis_write32(priv, TPM_INT_STATUS(priv->locality), interrupt);
879 tpm_tis_relinquish_locality(chip, 0);
880 if (rc < 0)
881 goto err;
882
883 tpm_tis_read32(priv, TPM_INT_STATUS(priv->locality), &interrupt);
884 return IRQ_HANDLED;
885
886 err:
887 return tpm_tis_update_unhandled_irqs(chip);
888 }
889
tpm_tis_gen_interrupt(struct tpm_chip * chip)890 static void tpm_tis_gen_interrupt(struct tpm_chip *chip)
891 {
892 const char *desc = "attempting to generate an interrupt";
893 u32 cap2;
894 cap_t cap;
895 int ret;
896
897 chip->flags |= TPM_CHIP_FLAG_IRQ;
898
899 if (chip->flags & TPM_CHIP_FLAG_TPM2)
900 ret = tpm2_get_tpm_pt(chip, 0x100, &cap2, desc);
901 else
902 ret = tpm1_getcap(chip, TPM_CAP_PROP_TIS_TIMEOUT, &cap, desc, 0);
903
904 if (ret)
905 chip->flags &= ~TPM_CHIP_FLAG_IRQ;
906 }
907
tpm_tis_free_irq_func(struct work_struct * work)908 static void tpm_tis_free_irq_func(struct work_struct *work)
909 {
910 struct tpm_tis_data *priv = container_of(work, typeof(*priv), free_irq_work);
911 struct tpm_chip *chip = priv->chip;
912
913 devm_free_irq(chip->dev.parent, priv->irq, chip);
914 priv->irq = 0;
915 }
916
917 /* Register the IRQ and issue a command that will cause an interrupt. If an
918 * irq is seen then leave the chip setup for IRQ operation, otherwise reverse
919 * everything and leave in polling mode. Returns 0 on success.
920 */
tpm_tis_probe_irq_single(struct tpm_chip * chip,u32 intmask,int flags,int irq)921 static int tpm_tis_probe_irq_single(struct tpm_chip *chip, u32 intmask,
922 int flags, int irq)
923 {
924 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
925 u8 original_int_vec;
926 int rc;
927 u32 int_status;
928
929 rc = devm_request_threaded_irq(chip->dev.parent, irq, NULL,
930 tis_int_handler, IRQF_ONESHOT | flags,
931 dev_name(&chip->dev), chip);
932 if (rc) {
933 dev_info(&chip->dev, "Unable to request irq: %d for probe\n",
934 irq);
935 return -1;
936 }
937 priv->irq = irq;
938
939 rc = tpm_tis_request_locality(chip, 0);
940 if (rc < 0)
941 return rc;
942
943 rc = tpm_tis_read8(priv, TPM_INT_VECTOR(priv->locality),
944 &original_int_vec);
945 if (rc < 0) {
946 tpm_tis_relinquish_locality(chip, priv->locality);
947 return rc;
948 }
949
950 rc = tpm_tis_write8(priv, TPM_INT_VECTOR(priv->locality), irq);
951 if (rc < 0)
952 goto restore_irqs;
953
954 rc = tpm_tis_read32(priv, TPM_INT_STATUS(priv->locality), &int_status);
955 if (rc < 0)
956 goto restore_irqs;
957
958 /* Clear all existing */
959 rc = tpm_tis_write32(priv, TPM_INT_STATUS(priv->locality), int_status);
960 if (rc < 0)
961 goto restore_irqs;
962 /* Turn on */
963 rc = tpm_tis_write32(priv, TPM_INT_ENABLE(priv->locality),
964 intmask | TPM_GLOBAL_INT_ENABLE);
965 if (rc < 0)
966 goto restore_irqs;
967
968 clear_bit(TPM_TIS_IRQ_TESTED, &priv->flags);
969
970 /* Generate an interrupt by having the core call through to
971 * tpm_tis_send
972 */
973 tpm_tis_gen_interrupt(chip);
974
975 restore_irqs:
976 /* tpm_tis_send will either confirm the interrupt is working or it
977 * will call disable_irq which undoes all of the above.
978 */
979 if (!(chip->flags & TPM_CHIP_FLAG_IRQ)) {
980 tpm_tis_write8(priv, TPM_INT_VECTOR(priv->locality),
981 original_int_vec);
982 rc = -1;
983 }
984
985 tpm_tis_relinquish_locality(chip, priv->locality);
986
987 return rc;
988 }
989
990 /* Try to find the IRQ the TPM is using. This is for legacy x86 systems that
991 * do not have ACPI/etc. We typically expect the interrupt to be declared if
992 * present.
993 */
tpm_tis_probe_irq(struct tpm_chip * chip,u32 intmask)994 static void tpm_tis_probe_irq(struct tpm_chip *chip, u32 intmask)
995 {
996 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
997 u8 original_int_vec;
998 int i, rc;
999
1000 rc = tpm_tis_read8(priv, TPM_INT_VECTOR(priv->locality),
1001 &original_int_vec);
1002 if (rc < 0)
1003 return;
1004
1005 if (!original_int_vec) {
1006 if (IS_ENABLED(CONFIG_X86))
1007 for (i = 3; i <= 15; i++)
1008 if (!tpm_tis_probe_irq_single(chip, intmask, 0,
1009 i))
1010 return;
1011 } else if (!tpm_tis_probe_irq_single(chip, intmask, 0,
1012 original_int_vec))
1013 return;
1014 }
1015
tpm_tis_remove(struct tpm_chip * chip)1016 void tpm_tis_remove(struct tpm_chip *chip)
1017 {
1018 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
1019 u32 reg = TPM_INT_ENABLE(priv->locality);
1020 u32 interrupt;
1021 int rc;
1022
1023 tpm_tis_clkrun_enable(chip, true);
1024
1025 rc = tpm_tis_read32(priv, reg, &interrupt);
1026 if (rc < 0)
1027 interrupt = 0;
1028
1029 tpm_tis_write32(priv, reg, ~TPM_GLOBAL_INT_ENABLE & interrupt);
1030 if (priv->free_irq_work.func)
1031 flush_work(&priv->free_irq_work);
1032
1033 tpm_tis_clkrun_enable(chip, false);
1034
1035 if (priv->ilb_base_addr)
1036 iounmap(priv->ilb_base_addr);
1037 }
1038 EXPORT_SYMBOL_GPL(tpm_tis_remove);
1039
1040 /**
1041 * tpm_tis_clkrun_enable() - Keep clkrun protocol disabled for entire duration
1042 * of a single TPM command
1043 * @chip: TPM chip to use
1044 * @value: 1 - Disable CLKRUN protocol, so that clocks are free running
1045 * 0 - Enable CLKRUN protocol
1046 * Call this function directly in tpm_tis_remove() in error or driver removal
1047 * path, since the chip->ops is set to NULL in tpm_chip_unregister().
1048 */
tpm_tis_clkrun_enable(struct tpm_chip * chip,bool value)1049 static void tpm_tis_clkrun_enable(struct tpm_chip *chip, bool value)
1050 {
1051 struct tpm_tis_data *data = dev_get_drvdata(&chip->dev);
1052 u32 clkrun_val;
1053
1054 if (!IS_ENABLED(CONFIG_X86) || !is_bsw() ||
1055 !data->ilb_base_addr)
1056 return;
1057
1058 if (value) {
1059 data->clkrun_enabled++;
1060 if (data->clkrun_enabled > 1)
1061 return;
1062 clkrun_val = ioread32(data->ilb_base_addr + LPC_CNTRL_OFFSET);
1063
1064 /* Disable LPC CLKRUN# */
1065 clkrun_val &= ~LPC_CLKRUN_EN;
1066 iowrite32(clkrun_val, data->ilb_base_addr + LPC_CNTRL_OFFSET);
1067
1068 } else {
1069 data->clkrun_enabled--;
1070 if (data->clkrun_enabled)
1071 return;
1072
1073 clkrun_val = ioread32(data->ilb_base_addr + LPC_CNTRL_OFFSET);
1074
1075 /* Enable LPC CLKRUN# */
1076 clkrun_val |= LPC_CLKRUN_EN;
1077 iowrite32(clkrun_val, data->ilb_base_addr + LPC_CNTRL_OFFSET);
1078 }
1079
1080 #ifdef CONFIG_HAS_IOPORT
1081 /*
1082 * Write any random value on port 0x80 which is on LPC, to make
1083 * sure LPC clock is running before sending any TPM command.
1084 */
1085 outb(0xCC, 0x80);
1086 #endif
1087 }
1088
1089 static const struct tpm_class_ops tpm_tis = {
1090 .flags = TPM_OPS_AUTO_STARTUP,
1091 .status = tpm_tis_status,
1092 .recv = tpm_tis_recv,
1093 .send = tpm_tis_send,
1094 .cancel = tpm_tis_ready,
1095 .update_timeouts = tpm_tis_update_timeouts,
1096 .update_durations = tpm_tis_update_durations,
1097 .req_complete_mask = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
1098 .req_complete_val = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
1099 .req_canceled = tpm_tis_req_canceled,
1100 .request_locality = tpm_tis_request_locality,
1101 .relinquish_locality = tpm_tis_relinquish_locality,
1102 .clk_enable = tpm_tis_clkrun_enable,
1103 };
1104
tpm_tis_core_init(struct device * dev,struct tpm_tis_data * priv,int irq,const struct tpm_tis_phy_ops * phy_ops,acpi_handle acpi_dev_handle)1105 int tpm_tis_core_init(struct device *dev, struct tpm_tis_data *priv, int irq,
1106 const struct tpm_tis_phy_ops *phy_ops,
1107 acpi_handle acpi_dev_handle)
1108 {
1109 u32 vendor;
1110 u32 intfcaps;
1111 u32 intmask;
1112 u32 clkrun_val;
1113 u8 rid;
1114 int rc, probe;
1115 struct tpm_chip *chip;
1116
1117 chip = tpmm_chip_alloc(dev, &tpm_tis);
1118 if (IS_ERR(chip))
1119 return PTR_ERR(chip);
1120
1121 #ifdef CONFIG_ACPI
1122 chip->acpi_dev_handle = acpi_dev_handle;
1123 #endif
1124
1125 chip->hwrng.quality = priv->rng_quality;
1126
1127 /* Maximum timeouts */
1128 chip->timeout_a = msecs_to_jiffies(TIS_TIMEOUT_A_MAX);
1129 chip->timeout_b = msecs_to_jiffies(TIS_TIMEOUT_B_MAX);
1130 chip->timeout_c = msecs_to_jiffies(TIS_TIMEOUT_C_MAX);
1131 chip->timeout_d = msecs_to_jiffies(TIS_TIMEOUT_D_MAX);
1132 priv->chip = chip;
1133 priv->timeout_min = TPM_TIMEOUT_USECS_MIN;
1134 priv->timeout_max = TPM_TIMEOUT_USECS_MAX;
1135 priv->phy_ops = phy_ops;
1136 priv->locality_count = 0;
1137 mutex_init(&priv->locality_count_mutex);
1138 INIT_WORK(&priv->free_irq_work, tpm_tis_free_irq_func);
1139
1140 dev_set_drvdata(&chip->dev, priv);
1141
1142 rc = tpm_tis_read32(priv, TPM_DID_VID(0), &vendor);
1143 if (rc < 0)
1144 return rc;
1145
1146 priv->manufacturer_id = vendor;
1147
1148 if (priv->manufacturer_id == TPM_VID_ATML &&
1149 !(chip->flags & TPM_CHIP_FLAG_TPM2)) {
1150 priv->timeout_min = TIS_TIMEOUT_MIN_ATML;
1151 priv->timeout_max = TIS_TIMEOUT_MAX_ATML;
1152 }
1153
1154 if (priv->manufacturer_id == TPM_VID_IFX)
1155 set_bit(TPM_TIS_STATUS_VALID_RETRY, &priv->flags);
1156
1157 if (is_bsw()) {
1158 priv->ilb_base_addr = ioremap(INTEL_LEGACY_BLK_BASE_ADDR,
1159 ILB_REMAP_SIZE);
1160 if (!priv->ilb_base_addr)
1161 return -ENOMEM;
1162
1163 clkrun_val = ioread32(priv->ilb_base_addr + LPC_CNTRL_OFFSET);
1164 /* Check if CLKRUN# is already not enabled in the LPC bus */
1165 if (!(clkrun_val & LPC_CLKRUN_EN)) {
1166 iounmap(priv->ilb_base_addr);
1167 priv->ilb_base_addr = NULL;
1168 }
1169 }
1170
1171 if (chip->ops->clk_enable != NULL)
1172 chip->ops->clk_enable(chip, true);
1173
1174 if (wait_startup(chip, 0) != 0) {
1175 rc = -ENODEV;
1176 goto out_err;
1177 }
1178
1179 /* Take control of the TPM's interrupt hardware and shut it off */
1180 rc = tpm_tis_read32(priv, TPM_INT_ENABLE(priv->locality), &intmask);
1181 if (rc < 0)
1182 goto out_err;
1183
1184 /* Figure out the capabilities */
1185 rc = tpm_tis_read32(priv, TPM_INTF_CAPS(priv->locality), &intfcaps);
1186 if (rc < 0)
1187 goto out_err;
1188
1189 dev_dbg(dev, "TPM interface capabilities (0x%x):\n",
1190 intfcaps);
1191 if (intfcaps & TPM_INTF_BURST_COUNT_STATIC)
1192 dev_dbg(dev, "\tBurst Count Static\n");
1193 if (intfcaps & TPM_INTF_CMD_READY_INT) {
1194 intmask |= TPM_INTF_CMD_READY_INT;
1195 dev_dbg(dev, "\tCommand Ready Int Support\n");
1196 }
1197 if (intfcaps & TPM_INTF_INT_EDGE_FALLING)
1198 dev_dbg(dev, "\tInterrupt Edge Falling\n");
1199 if (intfcaps & TPM_INTF_INT_EDGE_RISING)
1200 dev_dbg(dev, "\tInterrupt Edge Rising\n");
1201 if (intfcaps & TPM_INTF_INT_LEVEL_LOW)
1202 dev_dbg(dev, "\tInterrupt Level Low\n");
1203 if (intfcaps & TPM_INTF_INT_LEVEL_HIGH)
1204 dev_dbg(dev, "\tInterrupt Level High\n");
1205 if (intfcaps & TPM_INTF_LOCALITY_CHANGE_INT) {
1206 intmask |= TPM_INTF_LOCALITY_CHANGE_INT;
1207 dev_dbg(dev, "\tLocality Change Int Support\n");
1208 }
1209 if (intfcaps & TPM_INTF_STS_VALID_INT) {
1210 intmask |= TPM_INTF_STS_VALID_INT;
1211 dev_dbg(dev, "\tSts Valid Int Support\n");
1212 }
1213 if (intfcaps & TPM_INTF_DATA_AVAIL_INT) {
1214 intmask |= TPM_INTF_DATA_AVAIL_INT;
1215 dev_dbg(dev, "\tData Avail Int Support\n");
1216 }
1217
1218 intmask &= ~TPM_GLOBAL_INT_ENABLE;
1219
1220 rc = tpm_tis_request_locality(chip, 0);
1221 if (rc < 0) {
1222 rc = -ENODEV;
1223 goto out_err;
1224 }
1225
1226 tpm_tis_write32(priv, TPM_INT_ENABLE(priv->locality), intmask);
1227 tpm_tis_relinquish_locality(chip, 0);
1228
1229 rc = tpm_chip_start(chip);
1230 if (rc)
1231 goto out_err;
1232 rc = tpm2_probe(chip);
1233 tpm_chip_stop(chip);
1234 if (rc)
1235 goto out_err;
1236
1237 rc = tpm_tis_read8(priv, TPM_RID(0), &rid);
1238 if (rc < 0)
1239 goto out_err;
1240
1241 dev_info(dev, "%s TPM (device-id 0x%X, rev-id %d)\n",
1242 (chip->flags & TPM_CHIP_FLAG_TPM2) ? "2.0" : "1.2",
1243 vendor >> 16, rid);
1244
1245 probe = probe_itpm(chip);
1246 if (probe < 0) {
1247 rc = -ENODEV;
1248 goto out_err;
1249 }
1250
1251 /* INTERRUPT Setup */
1252 init_waitqueue_head(&priv->read_queue);
1253 init_waitqueue_head(&priv->int_queue);
1254
1255 rc = tpm_chip_bootstrap(chip);
1256 if (rc)
1257 goto out_err;
1258
1259 if (irq != -1) {
1260 /*
1261 * Before doing irq testing issue a command to the TPM in polling mode
1262 * to make sure it works. May as well use that command to set the
1263 * proper timeouts for the driver.
1264 */
1265
1266 rc = tpm_tis_request_locality(chip, 0);
1267 if (rc < 0)
1268 goto out_err;
1269
1270 rc = tpm_get_timeouts(chip);
1271
1272 tpm_tis_relinquish_locality(chip, 0);
1273
1274 if (rc) {
1275 dev_err(dev, "Could not get TPM timeouts and durations\n");
1276 rc = -ENODEV;
1277 goto out_err;
1278 }
1279
1280 if (irq)
1281 tpm_tis_probe_irq_single(chip, intmask, IRQF_SHARED,
1282 irq);
1283 else
1284 tpm_tis_probe_irq(chip, intmask);
1285
1286 if (chip->flags & TPM_CHIP_FLAG_IRQ) {
1287 priv->int_mask = intmask;
1288 } else {
1289 dev_err(&chip->dev, FW_BUG
1290 "TPM interrupt not working, polling instead\n");
1291
1292 rc = tpm_tis_request_locality(chip, 0);
1293 if (rc < 0)
1294 goto out_err;
1295 tpm_tis_disable_interrupts(chip);
1296 tpm_tis_relinquish_locality(chip, 0);
1297 }
1298 }
1299
1300 rc = tpm_chip_register(chip);
1301 if (rc)
1302 goto out_err;
1303
1304 if (chip->ops->clk_enable != NULL)
1305 chip->ops->clk_enable(chip, false);
1306
1307 return 0;
1308 out_err:
1309 if (chip->ops->clk_enable != NULL)
1310 chip->ops->clk_enable(chip, false);
1311
1312 tpm_tis_remove(chip);
1313
1314 return rc;
1315 }
1316 EXPORT_SYMBOL_GPL(tpm_tis_core_init);
1317
1318 #ifdef CONFIG_PM_SLEEP
tpm_tis_reenable_interrupts(struct tpm_chip * chip)1319 static void tpm_tis_reenable_interrupts(struct tpm_chip *chip)
1320 {
1321 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
1322 u32 intmask;
1323 int rc;
1324
1325 /*
1326 * Re-enable interrupts that device may have lost or BIOS/firmware may
1327 * have disabled.
1328 */
1329 rc = tpm_tis_write8(priv, TPM_INT_VECTOR(priv->locality), priv->irq);
1330 if (rc < 0) {
1331 dev_err(&chip->dev, "Setting IRQ failed.\n");
1332 return;
1333 }
1334
1335 intmask = priv->int_mask | TPM_GLOBAL_INT_ENABLE;
1336 rc = tpm_tis_write32(priv, TPM_INT_ENABLE(priv->locality), intmask);
1337 if (rc < 0)
1338 dev_err(&chip->dev, "Enabling interrupts failed.\n");
1339 }
1340
tpm_tis_resume(struct device * dev)1341 int tpm_tis_resume(struct device *dev)
1342 {
1343 struct tpm_chip *chip = dev_get_drvdata(dev);
1344 int ret;
1345
1346 ret = tpm_chip_start(chip);
1347 if (ret)
1348 return ret;
1349
1350 if (chip->flags & TPM_CHIP_FLAG_IRQ)
1351 tpm_tis_reenable_interrupts(chip);
1352
1353 /*
1354 * TPM 1.2 requires self-test on resume. This function actually returns
1355 * an error code but for unknown reason it isn't handled.
1356 */
1357 if (!(chip->flags & TPM_CHIP_FLAG_TPM2))
1358 tpm1_do_selftest(chip);
1359
1360 tpm_chip_stop(chip);
1361
1362 ret = tpm_pm_resume(dev);
1363 if (ret)
1364 return ret;
1365
1366 return 0;
1367 }
1368 EXPORT_SYMBOL_GPL(tpm_tis_resume);
1369 #endif
1370
1371 MODULE_AUTHOR("Leendert van Doorn <leendert@watson.ibm.com>");
1372 MODULE_DESCRIPTION("TPM Driver");
1373 MODULE_VERSION("2.0");
1374 MODULE_LICENSE("GPL");
1375