1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Driver for the on-board character LCD found on some ARM reference boards 4 * This is basically an Hitachi HD44780 LCD with a custom IP block to drive it 5 * https://en.wikipedia.org/wiki/HD44780_Character_LCD 6 * Currently it will just display the text "ARM Linux" and the linux version 7 * 8 * Author: Linus Walleij <triad@df.lth.se> 9 */ 10 #include <linux/completion.h> 11 #include <linux/container_of.h> 12 #include <linux/delay.h> 13 #include <linux/err.h> 14 #include <linux/init.h> 15 #include <linux/interrupt.h> 16 #include <linux/iopoll.h> 17 #include <linux/mod_devicetable.h> 18 #include <linux/platform_device.h> 19 #include <linux/string.h> 20 #include <linux/types.h> 21 #include <linux/workqueue.h> 22 #include <generated/utsrelease.h> 23 24 #define DRIVERNAME "arm-charlcd" 25 #define CHARLCD_TIMEOUT (msecs_to_jiffies(1000)) 26 27 /* Offsets to registers */ 28 #define CHAR_COM 0x00U 29 #define CHAR_DAT 0x04U 30 #define CHAR_RD 0x08U 31 #define CHAR_RAW 0x0CU 32 #define CHAR_MASK 0x10U 33 #define CHAR_STAT 0x14U 34 35 #define CHAR_RAW_CLEAR 0x00000000U 36 #define CHAR_RAW_VALID 0x00000100U 37 38 /* Hitachi HD44780 display commands */ 39 #define HD_CLEAR 0x01U 40 #define HD_HOME 0x02U 41 #define HD_ENTRYMODE 0x04U 42 #define HD_ENTRYMODE_INCREMENT 0x02U 43 #define HD_ENTRYMODE_SHIFT 0x01U 44 #define HD_DISPCTRL 0x08U 45 #define HD_DISPCTRL_ON 0x04U 46 #define HD_DISPCTRL_CURSOR_ON 0x02U 47 #define HD_DISPCTRL_CURSOR_BLINK 0x01U 48 #define HD_CRSR_SHIFT 0x10U 49 #define HD_CRSR_SHIFT_DISPLAY 0x08U 50 #define HD_CRSR_SHIFT_DISPLAY_RIGHT 0x04U 51 #define HD_FUNCSET 0x20U 52 #define HD_FUNCSET_8BIT 0x10U 53 #define HD_FUNCSET_2_LINES 0x08U 54 #define HD_FUNCSET_FONT_5X10 0x04U 55 #define HD_SET_CGRAM 0x40U 56 #define HD_SET_DDRAM 0x80U 57 #define HD_BUSY_FLAG 0x80U 58 59 /** 60 * struct charlcd - Private data structure 61 * @dev: a pointer back to containing device 62 * @virtbase: the offset to the controller in virtual memory 63 * @irq: reserved interrupt number 64 * @complete: completion structure for the last LCD command 65 * @init_work: delayed work structure to initialize the display on boot 66 */ 67 struct charlcd { 68 struct device *dev; 69 void __iomem *virtbase; 70 int irq; 71 struct completion complete; 72 struct delayed_work init_work; 73 }; 74 75 static irqreturn_t charlcd_interrupt(int irq, void *data) 76 { 77 struct charlcd *lcd = data; 78 u8 status; 79 80 status = readl(lcd->virtbase + CHAR_STAT) & 0x01; 81 /* Clear IRQ */ 82 writel(CHAR_RAW_CLEAR, lcd->virtbase + CHAR_RAW); 83 if (status) 84 complete(&lcd->complete); 85 else 86 dev_info(lcd->dev, "Spurious IRQ (%02x)\n", status); 87 return IRQ_HANDLED; 88 } 89 90 91 static void charlcd_wait_complete_irq(struct charlcd *lcd) 92 { 93 int ret; 94 95 ret = wait_for_completion_interruptible_timeout(&lcd->complete, 96 CHARLCD_TIMEOUT); 97 /* Disable IRQ after completion */ 98 writel(0x00, lcd->virtbase + CHAR_MASK); 99 100 if (ret < 0) { 101 dev_err(lcd->dev, 102 "wait_for_completion_interruptible_timeout() returned %d waiting for ready\n", 103 ret); 104 return; 105 } 106 107 if (ret == 0) { 108 dev_err(lcd->dev, "charlcd controller timed out waiting for ready\n"); 109 return; 110 } 111 } 112 113 static u8 charlcd_4bit_read_char(struct charlcd *lcd) 114 { 115 u8 data; 116 u32 val; 117 118 /* If we can, use an IRQ to wait for the data, else poll */ 119 if (lcd->irq >= 0) 120 charlcd_wait_complete_irq(lcd); 121 else { 122 udelay(100); 123 readl_poll_timeout_atomic(lcd->virtbase + CHAR_RAW, val, 124 val & CHAR_RAW_VALID, 100, 1000); 125 writel(CHAR_RAW_CLEAR, lcd->virtbase + CHAR_RAW); 126 } 127 msleep(1); 128 129 /* Read the 4 high bits of the data */ 130 data = readl(lcd->virtbase + CHAR_RD) & 0xf0; 131 132 /* 133 * The second read for the low bits does not trigger an IRQ 134 * so in this case we have to poll for the 4 lower bits 135 */ 136 udelay(100); 137 readl_poll_timeout_atomic(lcd->virtbase + CHAR_RAW, val, 138 val & CHAR_RAW_VALID, 100, 1000); 139 writel(CHAR_RAW_CLEAR, lcd->virtbase + CHAR_RAW); 140 msleep(1); 141 142 /* Read the 4 low bits of the data */ 143 data |= (readl(lcd->virtbase + CHAR_RD) >> 4) & 0x0f; 144 145 return data; 146 } 147 148 static bool charlcd_4bit_read_bf(struct charlcd *lcd) 149 { 150 if (lcd->irq >= 0) { 151 /* 152 * If we'll use IRQs to wait for the busyflag, clear any 153 * pending flag and enable IRQ 154 */ 155 writel(CHAR_RAW_CLEAR, lcd->virtbase + CHAR_RAW); 156 init_completion(&lcd->complete); 157 writel(0x01, lcd->virtbase + CHAR_MASK); 158 } 159 readl(lcd->virtbase + CHAR_COM); 160 161 return charlcd_4bit_read_char(lcd) & HD_BUSY_FLAG; 162 } 163 164 static void charlcd_4bit_wait_busy(struct charlcd *lcd) 165 { 166 int retries = 50; 167 168 udelay(100); 169 while (charlcd_4bit_read_bf(lcd) && retries) 170 retries--; 171 if (!retries) 172 dev_err(lcd->dev, "timeout waiting for busyflag\n"); 173 } 174 175 static void charlcd_4bit_command(struct charlcd *lcd, u8 cmd) 176 { 177 u32 cmdlo = (cmd << 4) & 0xf0; 178 u32 cmdhi = (cmd & 0xf0); 179 180 writel(cmdhi, lcd->virtbase + CHAR_COM); 181 udelay(10); 182 writel(cmdlo, lcd->virtbase + CHAR_COM); 183 charlcd_4bit_wait_busy(lcd); 184 } 185 186 static void charlcd_4bit_char(struct charlcd *lcd, u8 ch) 187 { 188 u32 chlo = (ch << 4) & 0xf0; 189 u32 chhi = (ch & 0xf0); 190 191 writel(chhi, lcd->virtbase + CHAR_DAT); 192 udelay(10); 193 writel(chlo, lcd->virtbase + CHAR_DAT); 194 charlcd_4bit_wait_busy(lcd); 195 } 196 197 static void charlcd_4bit_print(struct charlcd *lcd, int line, const char *str) 198 { 199 u8 offset; 200 int i; 201 202 /* 203 * We support line 0, 1 204 * Line 1 runs from 0x00..0x27 205 * Line 2 runs from 0x28..0x4f 206 */ 207 if (line == 0) 208 offset = 0; 209 else if (line == 1) 210 offset = 0x28; 211 else 212 return; 213 214 /* Set offset */ 215 charlcd_4bit_command(lcd, HD_SET_DDRAM | offset); 216 217 /* Send string */ 218 for (i = 0; i < strlen(str) && i < 0x28; i++) 219 charlcd_4bit_char(lcd, str[i]); 220 } 221 222 static void charlcd_4bit_init(struct charlcd *lcd) 223 { 224 /* These commands cannot be checked with the busy flag */ 225 writel(HD_FUNCSET | HD_FUNCSET_8BIT, lcd->virtbase + CHAR_COM); 226 msleep(5); 227 writel(HD_FUNCSET | HD_FUNCSET_8BIT, lcd->virtbase + CHAR_COM); 228 udelay(100); 229 writel(HD_FUNCSET | HD_FUNCSET_8BIT, lcd->virtbase + CHAR_COM); 230 udelay(100); 231 /* Go to 4bit mode */ 232 writel(HD_FUNCSET, lcd->virtbase + CHAR_COM); 233 udelay(100); 234 /* 235 * 4bit mode, 2 lines, 5x8 font, after this the number of lines 236 * and the font cannot be changed until the next initialization sequence 237 */ 238 charlcd_4bit_command(lcd, HD_FUNCSET | HD_FUNCSET_2_LINES); 239 charlcd_4bit_command(lcd, HD_DISPCTRL | HD_DISPCTRL_ON); 240 charlcd_4bit_command(lcd, HD_ENTRYMODE | HD_ENTRYMODE_INCREMENT); 241 charlcd_4bit_command(lcd, HD_CLEAR); 242 charlcd_4bit_command(lcd, HD_HOME); 243 /* Put something useful in the display */ 244 charlcd_4bit_print(lcd, 0, "ARM Linux"); 245 charlcd_4bit_print(lcd, 1, UTS_RELEASE); 246 } 247 248 static void charlcd_init_work(struct work_struct *work) 249 { 250 struct charlcd *lcd = 251 container_of(work, struct charlcd, init_work.work); 252 253 charlcd_4bit_init(lcd); 254 } 255 256 static int __init charlcd_probe(struct platform_device *pdev) 257 { 258 struct device *dev = &pdev->dev; 259 int ret; 260 struct charlcd *lcd; 261 262 lcd = devm_kzalloc(dev, sizeof(*lcd), GFP_KERNEL); 263 if (!lcd) 264 return -ENOMEM; 265 266 lcd->dev = &pdev->dev; 267 268 lcd->virtbase = devm_platform_ioremap_resource(pdev, 0); 269 if (IS_ERR(lcd->virtbase)) 270 return PTR_ERR(lcd->virtbase); 271 272 lcd->irq = platform_get_irq(pdev, 0); 273 /* If no IRQ is supplied, we'll survive without it */ 274 if (lcd->irq >= 0) { 275 ret = devm_request_irq(dev, lcd->irq, charlcd_interrupt, 0, DRIVERNAME, lcd); 276 if (ret) 277 return ret; 278 } 279 280 platform_set_drvdata(pdev, lcd); 281 282 /* 283 * Initialize the display in a delayed work, because 284 * it is VERY slow and would slow down the boot of the system. 285 */ 286 INIT_DELAYED_WORK(&lcd->init_work, charlcd_init_work); 287 schedule_delayed_work(&lcd->init_work, 0); 288 289 return 0; 290 } 291 292 static int charlcd_suspend(struct device *dev) 293 { 294 struct charlcd *lcd = dev_get_drvdata(dev); 295 296 /* Power the display off */ 297 charlcd_4bit_command(lcd, HD_DISPCTRL); 298 return 0; 299 } 300 301 static int charlcd_resume(struct device *dev) 302 { 303 struct charlcd *lcd = dev_get_drvdata(dev); 304 305 /* Turn the display back on */ 306 charlcd_4bit_command(lcd, HD_DISPCTRL | HD_DISPCTRL_ON); 307 return 0; 308 } 309 310 static const struct dev_pm_ops charlcd_pm_ops = { 311 .suspend = charlcd_suspend, 312 .resume = charlcd_resume, 313 }; 314 315 static const struct of_device_id charlcd_match[] = { 316 { .compatible = "arm,versatile-lcd", }, 317 {} 318 }; 319 320 static struct platform_driver charlcd_driver = { 321 .driver = { 322 .name = DRIVERNAME, 323 .pm = &charlcd_pm_ops, 324 .suppress_bind_attrs = true, 325 .of_match_table = charlcd_match, 326 }, 327 }; 328 builtin_platform_driver_probe(charlcd_driver, charlcd_probe); 329