1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * es8389.c -- ES8389 ALSA SoC Audio Codec 4 * 5 * Copyright Everest Semiconductor Co., Ltd 6 * 7 * Authors: Michael Zhang (zhangyi@everest-semi.com) 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License version 2 as 11 * published by the Free Software Foundation. 12 */ 13 14 #include <linux/clk.h> 15 #include <linux/module.h> 16 #include <linux/kernel.h> 17 #include <linux/delay.h> 18 #include <linux/i2c.h> 19 #include <linux/regmap.h> 20 #include <linux/regulator/consumer.h> 21 #include <sound/core.h> 22 #include <sound/pcm.h> 23 #include <sound/pcm_params.h> 24 #include <sound/tlv.h> 25 #include <sound/soc.h> 26 27 #include "es8389.h" 28 29 30 /* codec private data */ 31 32 struct es8389_private { 33 struct regmap *regmap; 34 struct clk *mclk; 35 struct regulator_bulk_data core_supply[2]; 36 unsigned int sysclk; 37 int mastermode; 38 39 u8 mclk_src; 40 u8 vddd; 41 int version; 42 enum snd_soc_bias_level bias_level; 43 }; 44 45 static const char * const es8389_core_supplies[] = { 46 "vddd", 47 "vdda", 48 }; 49 50 static bool es8389_volatile_register(struct device *dev, 51 unsigned int reg) 52 { 53 if ((reg <= 0xff)) 54 return true; 55 else 56 return false; 57 } 58 59 static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -9550, 50, 0); 60 static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -9550, 50, 0); 61 static const DECLARE_TLV_DB_SCALE(pga_vol_tlv, 0, 300, 0); 62 static const DECLARE_TLV_DB_SCALE(mix_vol_tlv, -9500, 100, 0); 63 static const DECLARE_TLV_DB_SCALE(alc_target_tlv, -3200, 200, 0); 64 static const DECLARE_TLV_DB_SCALE(alc_max_level, -3200, 200, 0); 65 66 static int es8389_dmic_set(struct snd_kcontrol *kcontrol, 67 struct snd_ctl_elem_value *ucontrol) 68 { 69 struct snd_soc_component *component = snd_soc_dapm_kcontrol_to_component(kcontrol); 70 struct snd_soc_dapm_context *dapm = snd_soc_dapm_kcontrol_to_dapm(kcontrol); 71 struct es8389_private *es8389 = snd_soc_component_get_drvdata(component); 72 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; 73 unsigned int val; 74 bool changed1, changed2; 75 76 val = ucontrol->value.integer.value[0]; 77 if (val > 1) 78 return -EINVAL; 79 80 if (val) { 81 regmap_update_bits_check(es8389->regmap, ES8389_DMIC_EN, 0xC0, 0xC0, &changed1); 82 regmap_update_bits_check(es8389->regmap, ES8389_ADC_MODE, 0x03, 0x03, &changed2); 83 } else { 84 regmap_update_bits_check(es8389->regmap, ES8389_DMIC_EN, 0xC0, 0x00, &changed1); 85 regmap_update_bits_check(es8389->regmap, ES8389_ADC_MODE, 0x03, 0x00, &changed2); 86 } 87 88 if (changed1 & changed2) 89 return snd_soc_dapm_mux_update_power(dapm, kcontrol, val, e, NULL); 90 else 91 return 0; 92 } 93 94 static const char *const alc[] = { 95 "ALC OFF", 96 "ADCR ALC ON", 97 "ADCL ALC ON", 98 "ADCL & ADCL ALC ON", 99 }; 100 101 static const char *const ramprate[] = { 102 "0.125db/1 LRCK", 103 "0.125db/4 LRCK", 104 "0.125db/8 LRCK", 105 "0.125db/16 LRCK", 106 "0.125db/32 LRCK", 107 "0.125db/64 LRCK", 108 "0.125db/128 LRCK", 109 "0.125db/256 LRCK", 110 "0.125db/512 LRCK", 111 "0.125db/1024 LRCK", 112 "0.125db/2048 LRCK", 113 "0.125db/4096 LRCK", 114 "0.125db/8192 LRCK", 115 "0.125db/16384 LRCK", 116 "0.125db/32768 LRCK", 117 "0.125db/65536 LRCK", 118 }; 119 120 static const char *const winsize[] = { 121 "2 LRCK", 122 "4 LRCK", 123 "8 LRCK", 124 "16 LRCK", 125 "32 LRCK", 126 "64 LRCK", 127 "128 LRCK", 128 "256 LRCK", 129 "512 LRCK", 130 "1024 LRCK", 131 "2048 LRCK", 132 "4096 LRCK", 133 "8192 LRCK", 134 "16384 LRCK", 135 "32768 LRCK", 136 "65536 LRCK", 137 }; 138 139 static const struct soc_enum alc_enable = 140 SOC_ENUM_SINGLE(ES8389_ALC_ON, 5, 4, alc); 141 static const struct soc_enum alc_ramprate = 142 SOC_ENUM_SINGLE(ES8389_ALC_CTL, 4, 16, ramprate); 143 static const struct soc_enum alc_winsize = 144 SOC_ENUM_SINGLE(ES8389_ALC_CTL, 0, 16, winsize); 145 146 static const char *const es8389_outl_mux_txt[] = { 147 "Normal", 148 "DAC2 channel to DAC1 channel", 149 }; 150 151 static const char *const es8389_outr_mux_txt[] = { 152 "Normal", 153 "DAC1 channel to DAC2 channel", 154 }; 155 156 static const char *const es8389_dmic_mux_txt[] = { 157 "AMIC", 158 "DMIC", 159 }; 160 161 static const char *const es8389_pga1_texts[] = { 162 "DifferentialL", "Line 1P", "Line 2P" 163 }; 164 165 static const char *const es8389_pga2_texts[] = { 166 "DifferentialR", "Line 2N", "Line 1N" 167 }; 168 169 static const unsigned int es8389_pga_values[] = { 170 1, 5, 6 171 }; 172 173 static const struct soc_enum es8389_outl_mux_enum = 174 SOC_ENUM_SINGLE(ES8389_DAC_MIX, 5, 175 ARRAY_SIZE(es8389_outl_mux_txt), es8389_outl_mux_txt); 176 177 static const struct snd_kcontrol_new es8389_outl_mux_controls = 178 SOC_DAPM_ENUM("OUTL MUX", es8389_outl_mux_enum); 179 180 static const struct soc_enum es8389_outr_mux_enum = 181 SOC_ENUM_SINGLE(ES8389_DAC_MIX, 4, 182 ARRAY_SIZE(es8389_outr_mux_txt), es8389_outr_mux_txt); 183 184 static const struct snd_kcontrol_new es8389_outr_mux_controls = 185 SOC_DAPM_ENUM("OUTR MUX", es8389_outr_mux_enum); 186 187 static SOC_ENUM_SINGLE_DECL( 188 es8389_dmic_mux_enum, ES8389_DMIC_EN, 6, es8389_dmic_mux_txt); 189 190 static const struct soc_enum es8389_pgal_enum = 191 SOC_VALUE_ENUM_SINGLE(ES8389_MIC1_GAIN, 4, 7, 192 ARRAY_SIZE(es8389_pga1_texts), es8389_pga1_texts, 193 es8389_pga_values); 194 195 static const struct soc_enum es8389_pgar_enum = 196 SOC_VALUE_ENUM_SINGLE(ES8389_MIC2_GAIN, 4, 7, 197 ARRAY_SIZE(es8389_pga2_texts), es8389_pga2_texts, 198 es8389_pga_values); 199 200 static const struct snd_kcontrol_new es8389_dmic_mux_controls = 201 SOC_DAPM_ENUM_EXT("ADC MUX", es8389_dmic_mux_enum, 202 snd_soc_dapm_get_enum_double, es8389_dmic_set); 203 204 static const struct snd_kcontrol_new es8389_left_mixer_controls[] = { 205 SOC_DAPM_SINGLE("DACR DACL Mixer", ES8389_DAC_MIX, 3, 1, 0), 206 }; 207 208 static const struct snd_kcontrol_new es8389_right_mixer_controls[] = { 209 SOC_DAPM_SINGLE("DACL DACR Mixer", ES8389_DAC_MIX, 2, 1, 0), 210 }; 211 212 static const struct snd_kcontrol_new es8389_leftadc_mixer_controls[] = { 213 SOC_DAPM_SINGLE("ADCL DACL Mixer", ES8389_DAC_MIX, 1, 1, 0), 214 }; 215 216 static const struct snd_kcontrol_new es8389_rightadc_mixer_controls[] = { 217 SOC_DAPM_SINGLE("ADCR DACR Mixer", ES8389_DAC_MIX, 0, 1, 0), 218 }; 219 220 static const struct snd_kcontrol_new es8389_adc_mixer_controls[] = { 221 SOC_DAPM_SINGLE("DACL ADCL Mixer", ES8389_ADC_RESET, 7, 1, 0), 222 SOC_DAPM_SINGLE("DACR ADCR Mixer", ES8389_ADC_RESET, 6, 1, 0), 223 }; 224 225 static const struct snd_kcontrol_new es8389_snd_controls[] = { 226 SOC_SINGLE_TLV("ADCL Capture Volume", ES8389_ADCL_VOL, 0, 0xFF, 0, adc_vol_tlv), 227 SOC_SINGLE_TLV("ADCR Capture Volume", ES8389_ADCR_VOL, 0, 0xFF, 0, adc_vol_tlv), 228 SOC_SINGLE_TLV("ADCL PGA Volume", ES8389_MIC1_GAIN, 0, 0x0E, 0, pga_vol_tlv), 229 SOC_SINGLE_TLV("ADCR PGA Volume", ES8389_MIC2_GAIN, 0, 0x0E, 0, pga_vol_tlv), 230 231 SOC_ENUM("PGAL Select", es8389_pgal_enum), 232 SOC_ENUM("PGAR Select", es8389_pgar_enum), 233 SOC_ENUM("ALC Capture Switch", alc_enable), 234 SOC_SINGLE_TLV("ALC Capture Target Level", ES8389_ALC_TARGET, 235 0, 0x0f, 0, alc_target_tlv), 236 SOC_SINGLE_TLV("ALC Capture Max Gain", ES8389_ALC_GAIN, 237 0, 0x0f, 0, alc_max_level), 238 SOC_ENUM("ADC Ramp Rate", alc_ramprate), 239 SOC_ENUM("ALC Capture Winsize", alc_winsize), 240 SOC_DOUBLE("ADC OSR Volume ON Switch", ES8389_ADC_MUTE, 6, 7, 1, 0), 241 SOC_SINGLE_TLV("ADC OSR Volume", ES8389_OSR_VOL, 0, 0xFF, 0, adc_vol_tlv), 242 SOC_DOUBLE("ADC OUTPUT Invert Switch", ES8389_ADC_HPF2, 5, 6, 1, 0), 243 244 SOC_SINGLE_TLV("DACL Playback Volume", ES8389_DACL_VOL, 0, 0xFF, 0, dac_vol_tlv), 245 SOC_SINGLE_TLV("DACR Playback Volume", ES8389_DACR_VOL, 0, 0xFF, 0, dac_vol_tlv), 246 SOC_DOUBLE("DAC OUTPUT Invert Switch", ES8389_DAC_INV, 5, 6, 1, 0), 247 SOC_SINGLE_TLV("ADC2DAC Mixer Volume", ES8389_MIX_VOL, 0, 0x7F, 0, mix_vol_tlv), 248 }; 249 250 static const struct snd_soc_dapm_widget es8389_dapm_widgets[] = { 251 /*Input Side*/ 252 SND_SOC_DAPM_INPUT("INPUT1"), 253 SND_SOC_DAPM_INPUT("INPUT2"), 254 SND_SOC_DAPM_INPUT("DMIC"), 255 SND_SOC_DAPM_PGA("PGAL", SND_SOC_NOPM, 4, 0, NULL, 0), 256 SND_SOC_DAPM_PGA("PGAR", SND_SOC_NOPM, 4, 0, NULL, 0), 257 258 /*ADCs*/ 259 SND_SOC_DAPM_ADC("ADCL", NULL, SND_SOC_NOPM, 0, 0), 260 SND_SOC_DAPM_ADC("ADCR", NULL, SND_SOC_NOPM, 0, 0), 261 262 /* Audio Interface */ 263 SND_SOC_DAPM_AIF_OUT("I2S OUT", "I2S Capture", 0, SND_SOC_NOPM, 0, 0), 264 SND_SOC_DAPM_AIF_IN("I2S IN", "I2S Playback", 0, SND_SOC_NOPM, 0, 0), 265 266 /*DACs*/ 267 SND_SOC_DAPM_DAC("DACL", NULL, SND_SOC_NOPM, 0, 0), 268 SND_SOC_DAPM_DAC("DACR", NULL, SND_SOC_NOPM, 0, 0), 269 270 /*Output Side*/ 271 SND_SOC_DAPM_OUTPUT("HPOL"), 272 SND_SOC_DAPM_OUTPUT("HPOR"), 273 274 /* Digital Interface */ 275 SND_SOC_DAPM_PGA("IF DAC", SND_SOC_NOPM, 0, 0, NULL, 0), 276 SND_SOC_DAPM_PGA("IF DACL1", SND_SOC_NOPM, 0, 0, NULL, 0), 277 SND_SOC_DAPM_PGA("IF DACR1", SND_SOC_NOPM, 0, 0, NULL, 0), 278 SND_SOC_DAPM_PGA("IF DACL2", SND_SOC_NOPM, 0, 0, NULL, 0), 279 SND_SOC_DAPM_PGA("IF DACR2", SND_SOC_NOPM, 0, 0, NULL, 0), 280 SND_SOC_DAPM_PGA("IF DACL3", SND_SOC_NOPM, 0, 0, NULL, 0), 281 SND_SOC_DAPM_PGA("IF DACR3", SND_SOC_NOPM, 0, 0, NULL, 0), 282 283 /* Digital Interface Select */ 284 SND_SOC_DAPM_MIXER("IF DACL Mixer", SND_SOC_NOPM, 0, 0, 285 &es8389_left_mixer_controls[0], 286 ARRAY_SIZE(es8389_left_mixer_controls)), 287 SND_SOC_DAPM_MIXER("IF DACR Mixer", SND_SOC_NOPM, 0, 0, 288 &es8389_right_mixer_controls[0], 289 ARRAY_SIZE(es8389_right_mixer_controls)), 290 SND_SOC_DAPM_MIXER("IF ADCDACL Mixer", SND_SOC_NOPM, 0, 0, 291 &es8389_leftadc_mixer_controls[0], 292 ARRAY_SIZE(es8389_leftadc_mixer_controls)), 293 SND_SOC_DAPM_MIXER("IF ADCDACR Mixer", SND_SOC_NOPM, 0, 0, 294 &es8389_rightadc_mixer_controls[0], 295 ARRAY_SIZE(es8389_rightadc_mixer_controls)), 296 297 SND_SOC_DAPM_MIXER("ADC Mixer", SND_SOC_NOPM, 0, 0, 298 &es8389_adc_mixer_controls[0], 299 ARRAY_SIZE(es8389_adc_mixer_controls)), 300 SND_SOC_DAPM_MUX("ADC MUX", SND_SOC_NOPM, 0, 0, &es8389_dmic_mux_controls), 301 302 SND_SOC_DAPM_MUX("OUTL MUX", SND_SOC_NOPM, 0, 0, &es8389_outl_mux_controls), 303 SND_SOC_DAPM_MUX("OUTR MUX", SND_SOC_NOPM, 0, 0, &es8389_outr_mux_controls), 304 }; 305 306 307 static const struct snd_soc_dapm_route es8389_dapm_routes[] = { 308 {"PGAL", NULL, "INPUT1"}, 309 {"PGAR", NULL, "INPUT2"}, 310 311 {"ADCL", NULL, "PGAL"}, 312 {"ADCR", NULL, "PGAR"}, 313 314 {"ADC Mixer", "DACL ADCL Mixer", "DACL"}, 315 {"ADC Mixer", "DACR ADCR Mixer", "DACR"}, 316 {"ADC Mixer", NULL, "ADCL"}, 317 {"ADC Mixer", NULL, "ADCR"}, 318 319 {"ADC MUX", "AMIC", "ADC Mixer"}, 320 {"ADC MUX", "DMIC", "DMIC"}, 321 322 {"I2S OUT", NULL, "ADC MUX"}, 323 324 {"DACL", NULL, "I2S IN"}, 325 {"DACR", NULL, "I2S IN"}, 326 327 {"IF DACL1", NULL, "DACL"}, 328 {"IF DACR1", NULL, "DACR"}, 329 {"IF DACL2", NULL, "DACL"}, 330 {"IF DACR2", NULL, "DACR"}, 331 {"IF DACL3", NULL, "DACL"}, 332 {"IF DACR3", NULL, "DACR"}, 333 334 {"IF DACL Mixer", NULL, "IF DACL2"}, 335 {"IF DACL Mixer", "DACR DACL Mixer", "IF DACR1"}, 336 {"IF DACR Mixer", NULL, "IF DACR2"}, 337 {"IF DACR Mixer", "DACL DACR Mixer", "IF DACL1"}, 338 339 {"IF ADCDACL Mixer", NULL, "IF DACL Mixer"}, 340 {"IF ADCDACL Mixer", "ADCL DACL Mixer", "IF DACL3"}, 341 {"IF ADCDACR Mixer", NULL, "IF DACR Mixer"}, 342 {"IF ADCDACR Mixer", "ADCR DACR Mixer", "IF DACR3"}, 343 344 {"OUTL MUX", "Normal", "IF ADCDACL Mixer"}, 345 {"OUTL MUX", "DAC2 channel to DAC1 channel", "IF ADCDACR Mixer"}, 346 {"OUTR MUX", "Normal", "IF ADCDACR Mixer"}, 347 {"OUTR MUX", "DAC1 channel to DAC2 channel", "IF ADCDACL Mixer"}, 348 349 {"HPOL", NULL, "OUTL MUX"}, 350 {"HPOR", NULL, "OUTR MUX"}, 351 352 }; 353 354 struct _coeff_div { 355 u16 fs; 356 u32 mclk; 357 u32 rate; 358 u8 Reg0x04; 359 u8 Reg0x05; 360 u8 Reg0x06; 361 u8 Reg0x07; 362 u8 Reg0x08; 363 u8 Reg0x09; 364 u8 Reg0x0A; 365 u8 Reg0x0F; 366 u8 Reg0x11; 367 u8 Reg0x21; 368 u8 Reg0x22; 369 u8 Reg0x26; 370 u8 Reg0x30; 371 u8 Reg0x41; 372 u8 Reg0x42; 373 u8 Reg0x43; 374 u8 Reg0xF0; 375 u8 Reg0xF1; 376 u8 Reg0x16; 377 u8 Reg0x18; 378 u8 Reg0x19; 379 u8 dvdd_vol; 380 u8 dmic_sel; 381 }; 382 383 /* codec hifi mclk clock divider coefficients */ 384 static const struct _coeff_div coeff_div[] = { 385 {32, 256000, 8000, 0x00, 0x57, 0x84, 0xD0, 0x03, 0xC1, 0xB0, 0x00, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0xFF, 0x7F, 0x01, 0x12, 0x00, 0x09, 0x19, 0x07, 2, 2}, 386 {36, 288000, 8000, 0x00, 0x55, 0x84, 0xD0, 0x01, 0xC1, 0x90, 0x00, 0x00, 0x23, 0x8F, 0xBF, 0xC0, 0x1F, 0x8F, 0x01, 0x12, 0x00, 0x09, 0x19, 0x07, 2, 2}, 387 {48, 384000, 8000, 0x02, 0x5F, 0x04, 0xC0, 0x03, 0xC1, 0xB0, 0x00, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0xFF, 0x7F, 0x01, 0x12, 0x00, 0x09, 0x19, 0x07, 2, 2}, 388 {50, 400000, 8000, 0x00, 0x75, 0x05, 0xC8, 0x01, 0xC1, 0x90, 0x00, 0x00, 0x18, 0xC7, 0xD0, 0xC0, 0x8F, 0xC7, 0x01, 0x12, 0x00, 0x09, 0x19, 0x07, 2, 0}, 389 {50, 400000, 8000, 0x00, 0x15, 0x85, 0xD0, 0x01, 0xC1, 0x90, 0x00, 0x00, 0x31, 0xC7, 0xC5, 0x00, 0x8F, 0xC7, 0x01, 0x12, 0x00, 0x09, 0x19, 0x07, 2, 1}, 390 {64, 512000, 8000, 0x00, 0x4D, 0x24, 0xC0, 0x03, 0xD1, 0xB0, 0x00, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0xFF, 0x7F, 0x01, 0x12, 0x00, 0x09, 0x19, 0x07, 2, 2}, 391 {72, 576000, 8000, 0x00, 0x45, 0x24, 0xC0, 0x01, 0xD1, 0x90, 0x00, 0x00, 0x23, 0x8F, 0xBF, 0xC0, 0x1F, 0x8F, 0x01, 0x12, 0x00, 0x09, 0x19, 0x07, 2, 2}, 392 {96, 768000, 8000, 0x02, 0x57, 0x84, 0xD0, 0x03, 0xC1, 0xB0, 0x00, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0xFF, 0x7F, 0x01, 0x12, 0x00, 0x09, 0x19, 0x07, 2, 2}, 393 {128, 1024000, 8000, 0x00, 0x45, 0x04, 0xD0, 0x03, 0xC1, 0xB0, 0x00, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0xFF, 0x7F, 0x01, 0x12, 0x00, 0x09, 0x19, 0x07, 2, 2}, 394 {192, 1536000, 8000, 0x02, 0x4D, 0x24, 0xC0, 0x03, 0xD1, 0xB0, 0x00, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0xFF, 0x7F, 0x01, 0x12, 0x00, 0x09, 0x19, 0x07, 2, 2}, 395 {256, 2048000, 8000, 0x01, 0x45, 0x04, 0xD0, 0x03, 0xC1, 0xB0, 0x00, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0xFF, 0x7F, 0x01, 0x12, 0x00, 0x09, 0x19, 0x07, 2, 2}, 396 {288, 2304000, 8000, 0x01, 0x51, 0x00, 0xC0, 0x01, 0xC1, 0x90, 0x00, 0x00, 0x23, 0x8F, 0xBF, 0xC0, 0x1F, 0x8F, 0x01, 0x12, 0x00, 0x09, 0x19, 0x07, 2, 2}, 397 {384, 3072000, 8000, 0x02, 0x45, 0x04, 0xD0, 0x03, 0xC1, 0xB0, 0x00, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0xFF, 0x7F, 0x01, 0x12, 0x00, 0x09, 0x19, 0x07, 2, 2}, 398 {512, 4096000, 8000, 0x00, 0x41, 0x04, 0xE0, 0x00, 0xD1, 0xB0, 0x00, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0xFF, 0x7F, 0x01, 0x12, 0x00, 0x09, 0x19, 0x07, 2, 2}, 399 {600, 4800000, 8000, 0x05, 0x65, 0x25, 0xF9, 0x00, 0xD1, 0x90, 0x00, 0x00, 0x18, 0xC7, 0xD0, 0xC0, 0x8F, 0xC7, 0x01, 0x12, 0x00, 0x09, 0x19, 0x07, 2, 0}, 400 {600, 4800000, 8000, 0x02, 0x24, 0x05, 0xD0, 0x00, 0xC2, 0x80, 0x00, 0x00, 0x31, 0xC7, 0xC5, 0x00, 0x8F, 0xC7, 0x01, 0x12, 0x00, 0x09, 0x19, 0x07, 2, 1}, 401 {768, 6144000, 8000, 0x05, 0x45, 0x04, 0xD0, 0x03, 0xC1, 0xB0, 0x00, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0xFF, 0x7F, 0x01, 0x12, 0x00, 0x09, 0x19, 0x07, 2, 2}, 402 {1024, 8192000, 8000, 0x01, 0x41, 0x06, 0xE0, 0x00, 0xD1, 0xB0, 0x00, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0xFF, 0x7F, 0x01, 0x12, 0x00, 0x09, 0x19, 0x07, 2, 2}, 403 {1500, 12000000, 8000, 0x0E, 0x25, 0x25, 0xE8, 0x00, 0xD1, 0x90, 0x40, 0x00, 0x31, 0xC7, 0xC5, 0x00, 0x8F, 0xC7, 0x01, 0x12, 0x00, 0x09, 0x19, 0x07, 2, 2}, 404 {1536, 12288000, 8000, 0x02, 0x41, 0x04, 0xE0, 0x00, 0xD1, 0xB0, 0x40, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0xFF, 0x7F, 0x01, 0x12, 0x00, 0x09, 0x19, 0x07, 2, 2}, 405 {1625, 13000000, 8000, 0x40, 0x6E, 0x05, 0xC8, 0x01, 0xC2, 0x90, 0x40, 0x00, 0x18, 0x95, 0xD0, 0xC0, 0x63, 0x95, 0x00, 0x12, 0x00, 0x09, 0x19, 0x07, 2, 2}, 406 {2048, 16384000, 8000, 0x03, 0x44, 0x01, 0xC0, 0x00, 0xD2, 0x80, 0x40, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0xFF, 0x7F, 0x01, 0x12, 0x00, 0x09, 0x19, 0x07, 2, 2}, 407 {2304, 18432000, 8000, 0x11, 0x45, 0x25, 0xF0, 0x00, 0xD1, 0xB0, 0x40, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0xFF, 0x7F, 0x01, 0x12, 0x00, 0x09, 0x19, 0x07, 2, 2}, 408 {2400, 19200000, 8000, 0x05, 0x14, 0x01, 0xC9, 0x00, 0xD2, 0x80, 0x80, 0x00, 0x31, 0xC7, 0xC5, 0x00, 0x8F, 0xC7, 0x01, 0x12, 0x00, 0x09, 0x19, 0x07, 2, 1}, 409 {2400, 19200000, 8000, 0x0B, 0x01, 0x00, 0xD0, 0x00, 0xD1, 0x80, 0x80, 0x00, 0x31, 0xC7, 0xC5, 0x00, 0xC7, 0xC7, 0x00, 0x12, 0x00, 0x09, 0x19, 0x07, 2, 0}, 410 {3000, 24000000, 8000, 0x0E, 0x24, 0x05, 0xD0, 0x00, 0xC2, 0x80, 0xC0, 0x00, 0x31, 0xC7, 0xC5, 0x00, 0x8F, 0xC7, 0x01, 0x12, 0x00, 0x09, 0x19, 0x07, 2, 2}, 411 {3072, 24576000, 8000, 0x05, 0x44, 0x01, 0xC0, 0x00, 0xD2, 0x80, 0x40, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0xFF, 0x7F, 0x01, 0x12, 0x00, 0x09, 0x19, 0x07, 2, 2}, 412 {3250, 26000000, 8000, 0x40, 0x15, 0x85, 0xD0, 0x01, 0xC1, 0x90, 0xC0, 0x00, 0x31, 0xC7, 0xC5, 0x00, 0x8F, 0xC7, 0x01, 0x12, 0x00, 0x09, 0x19, 0x07, 2, 1}, 413 {3250, 26000000, 8000, 0x40, 0x05, 0xA4, 0xC0, 0x00, 0xD1, 0x80, 0xC0, 0x00, 0x31, 0xC7, 0xC5, 0x00, 0xC7, 0xC7, 0x00, 0x12, 0x00, 0x09, 0x19, 0x07, 2, 0}, 414 {32, 512000, 16000, 0x00, 0x55, 0x84, 0xD0, 0x01, 0xC1, 0x90, 0x00, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0xFF, 0x7F, 0x00, 0x12, 0x00, 0x12, 0x31, 0x0E, 2, 2}, 415 {36, 576000, 16000, 0x00, 0x55, 0x84, 0xD0, 0x01, 0xC1, 0x90, 0x00, 0x00, 0x23, 0x8F, 0xBF, 0xC0, 0x1F, 0x8F, 0x01, 0x12, 0x00, 0x12, 0x31, 0x0E, 2, 2}, 416 {48, 768000, 16000, 0x02, 0x57, 0x04, 0xC0, 0x01, 0xC1, 0x90, 0x00, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0xFF, 0x7F, 0x00, 0x12, 0x00, 0x12, 0x31, 0x0E, 2, 2}, 417 {50, 800000, 16000, 0x00, 0x7E, 0x01, 0xD9, 0x00, 0xC2, 0x80, 0x00, 0x00, 0x18, 0x95, 0xD0, 0xC0, 0xC7, 0x95, 0x00, 0x12, 0x00, 0x12, 0x31, 0x0E, 2, 2}, 418 {64, 1024000, 16000, 0x00, 0x45, 0x24, 0xC0, 0x01, 0xD1, 0x90, 0x00, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0xFF, 0x7F, 0x00, 0x12, 0x00, 0x12, 0x31, 0x0E, 2, 2}, 419 {72, 1152000, 16000, 0x00, 0x45, 0x24, 0xC0, 0x01, 0xD1, 0x90, 0x00, 0x00, 0x23, 0x8F, 0xBF, 0xC0, 0x1F, 0x8F, 0x01, 0x12, 0x00, 0x12, 0x31, 0x0E, 2, 2}, 420 {96, 1536000, 16000, 0x02, 0x55, 0x84, 0xD0, 0x01, 0xC1, 0x90, 0x00, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0xFF, 0x7F, 0x00, 0x12, 0x00, 0x12, 0x31, 0x0E, 2, 2}, 421 {128, 2048000, 16000, 0x00, 0x51, 0x04, 0xD0, 0x01, 0xC1, 0x90, 0x00, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0xFF, 0x7F, 0x00, 0x12, 0x00, 0x12, 0x31, 0x0E, 2, 2}, 422 {144, 2304000, 16000, 0x00, 0x51, 0x00, 0xC0, 0x01, 0xC1, 0x90, 0x00, 0x00, 0x23, 0x8F, 0xBF, 0xC0, 0x1F, 0x8F, 0x01, 0x12, 0x00, 0x12, 0x31, 0x0E, 2, 2}, 423 {192, 3072000, 16000, 0x02, 0x65, 0x25, 0xE0, 0x00, 0xE1, 0x90, 0x00, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0xFF, 0x7F, 0x00, 0x12, 0x00, 0x12, 0x31, 0x0E, 2, 2}, 424 {256, 4096000, 16000, 0x00, 0x41, 0x04, 0xC0, 0x01, 0xD1, 0x90, 0x00, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0xFF, 0x7F, 0x00, 0x12, 0x00, 0x12, 0x31, 0x0E, 2, 2}, 425 {300, 4800000, 16000, 0x02, 0x66, 0x01, 0xD9, 0x00, 0xC2, 0x80, 0x00, 0x00, 0x18, 0x95, 0xD0, 0xC0, 0xC7, 0x95, 0x00, 0x12, 0x00, 0x12, 0x31, 0x0E, 2, 2}, 426 {384, 6144000, 16000, 0x02, 0x51, 0x04, 0xD0, 0x01, 0xC1, 0x90, 0x00, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0xFF, 0x7F, 0x00, 0x12, 0x00, 0x12, 0x31, 0x0E, 2, 2}, 427 {512, 8192000, 16000, 0x01, 0x41, 0x04, 0xC0, 0x01, 0xD1, 0x90, 0x00, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0xFF, 0x7F, 0x00, 0x12, 0x00, 0x12, 0x31, 0x0E, 2, 2}, 428 {750, 12000000, 16000, 0x0E, 0x7E, 0x01, 0xC9, 0x00, 0xC2, 0x80, 0x40, 0x00, 0x18, 0x95, 0xD0, 0xC0, 0xC7, 0x95, 0x00, 0x12, 0x00, 0x12, 0x31, 0x0E, 2, 2}, 429 {768, 12288000, 16000, 0x02, 0x41, 0x04, 0xC0, 0x01, 0xD1, 0x90, 0x40, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0xFF, 0x7F, 0x00, 0x12, 0x00, 0x12, 0x31, 0x0E, 2, 2}, 430 {1024, 16384000, 16000, 0x03, 0x41, 0x04, 0xC0, 0x01, 0xD1, 0x90, 0x40, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0xFF, 0x7F, 0x00, 0x12, 0x00, 0x12, 0x31, 0x0E, 2, 2}, 431 {1152, 18432000, 16000, 0x08, 0x51, 0x04, 0xD0, 0x01, 0xC1, 0x90, 0x40, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0xFF, 0x7F, 0x00, 0x12, 0x00, 0x12, 0x31, 0x0E, 2, 2}, 432 {1200, 19200000, 16000, 0x0B, 0x66, 0x01, 0xD9, 0x00, 0xC2, 0x80, 0x40, 0x00, 0x18, 0x95, 0xD0, 0xC0, 0xC7, 0x95, 0x00, 0x12, 0x00, 0x12, 0x31, 0x0E, 2, 2}, 433 {1500, 24000000, 16000, 0x0E, 0x26, 0x01, 0xD9, 0x00, 0xC2, 0x80, 0xC0, 0x00, 0x18, 0x95, 0xD0, 0xC0, 0xC7, 0x95, 0x00, 0x12, 0x00, 0x12, 0x31, 0x0E, 2, 2}, 434 {1536, 24576000, 16000, 0x05, 0x41, 0x04, 0xC0, 0x01, 0xD1, 0x90, 0xC0, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0xFF, 0x7F, 0x00, 0x12, 0x00, 0x12, 0x31, 0x0E, 2, 2}, 435 {1625, 26000000, 16000, 0x40, 0x6E, 0x05, 0xC8, 0x01, 0xC2, 0x90, 0xC0, 0x00, 0x18, 0x95, 0xD0, 0xC0, 0x63, 0x95, 0x00, 0x12, 0x00, 0x12, 0x31, 0x0E, 2, 2}, 436 {800, 19200000, 24000, 0x07, 0x66, 0x01, 0xD9, 0x00, 0xC2, 0x80, 0x40, 0x00, 0x18, 0x95, 0xD0, 0xC0, 0xC7, 0x95, 0x00, 0x12, 0x00, 0x1A, 0x49, 0x14, 2, 2}, 437 {375, 12000000, 32000, 0x0E, 0x2E, 0x05, 0xC8, 0x00, 0xC2, 0x80, 0x40, 0x01, 0x18, 0x95, 0xD0, 0xC0, 0x63, 0x95, 0x00, 0x12, 0x00, 0x23, 0x61, 0x1B, 2, 0}, 438 {600, 19200000, 32000, 0x05, 0x46, 0x01, 0xD8, 0x10, 0xD2, 0x80, 0x40, 0x00, 0x18, 0x95, 0xD0, 0xC0, 0x63, 0x95, 0x00, 0x12, 0x00, 0x23, 0x61, 0x1B, 2, 2}, 439 {32, 1411200, 44100, 0x00, 0x45, 0xA4, 0xD0, 0x10, 0xD1, 0x80, 0x00, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0x7F, 0x7F, 0x00, 0x12, 0x00, 0x35, 0x91, 0x28, 2, 2}, 440 {64, 2822400, 44100, 0x00, 0x51, 0x00, 0xC0, 0x10, 0xC1, 0x80, 0x00, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0x7F, 0x7F, 0x00, 0x12, 0x00, 0x35, 0x91, 0x28, 2, 2}, 441 {128, 5644800, 44100, 0x00, 0x41, 0x04, 0xD0, 0x10, 0xD1, 0x80, 0x00, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0x7F, 0x7F, 0x00, 0x12, 0x00, 0x35, 0x91, 0x28, 2, 2}, 442 {256, 11289600, 44100, 0x01, 0x41, 0x04, 0xD0, 0x10, 0xD1, 0x80, 0x40, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0x7F, 0x7F, 0x00, 0x12, 0x00, 0x35, 0x91, 0x28, 2, 2}, 443 {512, 22579200, 44100, 0x03, 0x41, 0x04, 0xD0, 0x10, 0xD1, 0x80, 0xC0, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0x7F, 0x7F, 0x00, 0x12, 0x00, 0x35, 0x91, 0x28, 2, 2}, 444 {32, 1536000, 48000, 0x00, 0x45, 0xA4, 0xD0, 0x10, 0xD1, 0x80, 0x00, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0x7F, 0x7F, 0x00, 0x12, 0x00, 0x35, 0x91, 0x28, 2, 2}, 445 {48, 2304000, 48000, 0x02, 0x55, 0x04, 0xC0, 0x10, 0xC1, 0x80, 0x00, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0x7F, 0x7F, 0x00, 0x12, 0x00, 0x35, 0x91, 0x28, 2, 2}, 446 {50, 2400000, 48000, 0x00, 0x76, 0x01, 0xC8, 0x10, 0xC2, 0x80, 0x00, 0x00, 0x18, 0x95, 0xD0, 0xC0, 0x63, 0x95, 0x00, 0x12, 0x00, 0x35, 0x91, 0x28, 2, 2}, 447 {64, 3072000, 48000, 0x00, 0x51, 0x04, 0xC0, 0x10, 0xC1, 0x80, 0x00, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0x7F, 0x7F, 0x00, 0x12, 0x00, 0x35, 0x91, 0x28, 2, 2}, 448 {100, 4800000, 48000, 0x00, 0x46, 0x01, 0xD8, 0x10, 0xD2, 0x80, 0x00, 0x00, 0x18, 0x95, 0xD0, 0xC0, 0x63, 0x95, 0x00, 0x12, 0x00, 0x35, 0x91, 0x28, 2, 2}, 449 {125, 6000000, 48000, 0x04, 0x6E, 0x05, 0xC8, 0x10, 0xC2, 0x80, 0x00, 0x01, 0x18, 0x95, 0xD0, 0xC0, 0x63, 0x95, 0x00, 0x12, 0x00, 0x35, 0x91, 0x28, 2, 2}, 450 {128, 6144000, 48000, 0x00, 0x41, 0x04, 0xD0, 0x10, 0xD1, 0x80, 0x00, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0x7F, 0x7F, 0x00, 0x12, 0x00, 0x35, 0x91, 0x28, 2, 2}, 451 {200, 9600000, 48000, 0x01, 0x46, 0x01, 0xD8, 0x10, 0xD2, 0x80, 0x00, 0x00, 0x18, 0x95, 0xD0, 0xC0, 0x63, 0x95, 0x00, 0x12, 0x00, 0x35, 0x91, 0x28, 2, 2}, 452 {250, 12000000, 48000, 0x04, 0x76, 0x01, 0xC8, 0x10, 0xC2, 0x80, 0x40, 0x00, 0x18, 0x95, 0xD0, 0xC0, 0x63, 0x95, 0x00, 0x12, 0x00, 0x35, 0x91, 0x28, 2, 2}, 453 {256, 12288000, 48000, 0x01, 0x41, 0x04, 0xD0, 0x10, 0xD1, 0x80, 0x40, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0x7F, 0x7F, 0x00, 0x12, 0x00, 0x35, 0x91, 0x28, 2, 2}, 454 {384, 18432000, 48000, 0x02, 0x41, 0x04, 0xD0, 0x10, 0xD1, 0x80, 0x40, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0x7F, 0x7F, 0x00, 0x12, 0x00, 0x35, 0x91, 0x28, 2, 2}, 455 {400, 19200000, 48000, 0x03, 0x46, 0x01, 0xD8, 0x10, 0xD2, 0x80, 0x40, 0x00, 0x18, 0x95, 0xD0, 0xC0, 0x63, 0x95, 0x00, 0x12, 0x00, 0x35, 0x91, 0x28, 2, 2}, 456 {500, 24000000, 48000, 0x04, 0x46, 0x01, 0xD8, 0x10, 0xD2, 0x80, 0xC0, 0x00, 0x18, 0x95, 0xD0, 0xC0, 0x63, 0x95, 0x00, 0x12, 0x00, 0x35, 0x91, 0x28, 2, 2}, 457 {512, 24576000, 48000, 0x03, 0x41, 0x04, 0xD0, 0x10, 0xD1, 0x80, 0xC0, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0x7F, 0x7F, 0x00, 0x12, 0x00, 0x35, 0x91, 0x28, 2, 2}, 458 {800, 38400000, 48000, 0x18, 0x45, 0x04, 0xC0, 0x10, 0xC1, 0x80, 0xC0, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0x7F, 0x7F, 0x00, 0x12, 0x00, 0x35, 0x91, 0x28, 2, 2}, 459 {128, 11289600, 88200, 0x00, 0x50, 0x00, 0xC0, 0x10, 0xC1, 0x80, 0x40, 0x00, 0x9F, 0x7F, 0xBF, 0xC0, 0x7F, 0x7F, 0x80, 0x12, 0xC0, 0x32, 0x89, 0x25, 2, 2}, 460 {64, 6144000, 96000, 0x00, 0x41, 0x00, 0xD0, 0x10, 0xD1, 0x80, 0x00, 0x00, 0x9F, 0x7F, 0xBF, 0xC0, 0x7F, 0x7F, 0x80, 0x12, 0xC0, 0x35, 0x91, 0x28, 2, 2}, 461 {96, 9216000, 96000, 0x02, 0x43, 0x00, 0xC0, 0x10, 0xC0, 0x80, 0x00, 0x00, 0x9F, 0x7F, 0xBF, 0xC0, 0x7F, 0x7F, 0x80, 0x12, 0xC0, 0x35, 0x91, 0x28, 2, 2}, 462 {256, 24576000, 96000, 0x00, 0x40, 0x00, 0xC0, 0x10, 0xC1, 0x80, 0xC0, 0x00, 0x9F, 0x7F, 0xBF, 0xC0, 0x7F, 0x7F, 0x80, 0x12, 0xC0, 0x35, 0x91, 0x28, 2, 2}, 463 {128, 24576000, 192000, 0x00, 0x50, 0x00, 0xC0, 0x18, 0xC1, 0x81, 0xC0, 0x00, 0x8F, 0x7F, 0xBF, 0xC0, 0x3F, 0x7F, 0x80, 0x12, 0xC0, 0x3F, 0xF9, 0x3F, 2, 2}, 464 }; 465 466 static inline int get_coeff(u8 vddd, u8 dmic, int mclk, int rate) 467 { 468 int i; 469 u8 dmic_det, vddd_det; 470 471 for (i = 0; i < ARRAY_SIZE(coeff_div); i++) { 472 if (coeff_div[i].rate == rate && coeff_div[i].mclk == mclk) { 473 vddd_det = ~(coeff_div[i].dvdd_vol ^ vddd) & 0x01; 474 dmic_det = ~(coeff_div[i].dmic_sel ^ dmic) & 0x01; 475 vddd_det |= ~(coeff_div[i].dvdd_vol % 2) & 0x01; 476 dmic_det |= ~(coeff_div[i].dmic_sel % 2) & 0x01; 477 478 if (vddd_det && dmic_det) 479 return i; 480 } 481 } 482 483 return -EINVAL; 484 } 485 486 /* 487 * if PLL not be used, use internal clk1 for mclk,otherwise, use internal clk2 for PLL source. 488 */ 489 static int es8389_set_dai_sysclk(struct snd_soc_dai *dai, 490 int clk_id, unsigned int freq, int dir) 491 { 492 struct snd_soc_component *component = dai->component; 493 struct es8389_private *es8389 = snd_soc_component_get_drvdata(component); 494 495 es8389->sysclk = freq; 496 497 return 0; 498 } 499 500 static int es8389_set_tdm_slot(struct snd_soc_dai *dai, 501 unsigned int tx_mask, unsigned int rx_mask, int slots, int slot_width) 502 { 503 struct snd_soc_component *component = dai->component; 504 struct es8389_private *es8389 = snd_soc_component_get_drvdata(component); 505 506 regmap_update_bits(es8389->regmap, ES8389_PTDM_SLOT, 507 ES8389_TDM_SLOT, (slots << ES8389_TDM_SHIFT)); 508 regmap_update_bits(es8389->regmap, ES8389_DAC_RAMP, 509 ES8389_TDM_SLOT, (slots << ES8389_TDM_SHIFT)); 510 511 return 0; 512 } 513 514 static int es8389_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt) 515 { 516 struct snd_soc_component *component = dai->component; 517 struct es8389_private *es8389 = snd_soc_component_get_drvdata(component); 518 u8 state = 0; 519 520 switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) { 521 case SND_SOC_DAIFMT_CBC_CFP: 522 regmap_update_bits(es8389->regmap, ES8389_MASTER_MODE, 523 ES8389_MASTER_MODE_EN, ES8389_MASTER_MODE_EN); 524 es8389->mastermode = 1; 525 break; 526 case SND_SOC_DAIFMT_CBC_CFC: 527 es8389->mastermode = 0; 528 break; 529 default: 530 return -EINVAL; 531 } 532 533 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { 534 case SND_SOC_DAIFMT_I2S: 535 state |= ES8389_DAIFMT_I2S; 536 break; 537 case SND_SOC_DAIFMT_RIGHT_J: 538 dev_err(component->dev, "component driver does not support right justified\n"); 539 return -EINVAL; 540 case SND_SOC_DAIFMT_LEFT_J: 541 state |= ES8389_DAIFMT_LEFT_J; 542 break; 543 case SND_SOC_DAIFMT_DSP_A: 544 state |= ES8389_DAIFMT_DSP_A; 545 break; 546 case SND_SOC_DAIFMT_DSP_B: 547 state |= ES8389_DAIFMT_DSP_B; 548 break; 549 default: 550 break; 551 } 552 regmap_update_bits(es8389->regmap, ES8389_ADC_FORMAT_MUTE, ES8389_DAIFMT_MASK, state); 553 regmap_update_bits(es8389->regmap, ES8389_DAC_FORMAT_MUTE, ES8389_DAIFMT_MASK, state); 554 555 return 0; 556 } 557 558 static int es8389_pcm_hw_params(struct snd_pcm_substream *substream, 559 struct snd_pcm_hw_params *params, 560 struct snd_soc_dai *dai) 561 { 562 struct snd_soc_component *component = dai->component; 563 struct es8389_private *es8389 = snd_soc_component_get_drvdata(component); 564 int coeff, ret; 565 u8 dmic_enable, state = 0; 566 unsigned int regv; 567 568 switch (params_format(params)) { 569 case SNDRV_PCM_FORMAT_S16_LE: 570 state |= ES8389_S16_LE; 571 break; 572 case SNDRV_PCM_FORMAT_S20_3LE: 573 state |= ES8389_S20_3_LE; 574 break; 575 case SNDRV_PCM_FORMAT_S18_3LE: 576 state |= ES8389_S18_LE; 577 break; 578 case SNDRV_PCM_FORMAT_S24_LE: 579 state |= ES8389_S24_LE; 580 break; 581 case SNDRV_PCM_FORMAT_S32_LE: 582 state |= ES8389_S32_LE; 583 break; 584 default: 585 return -EINVAL; 586 } 587 588 regmap_update_bits(es8389->regmap, ES8389_ADC_FORMAT_MUTE, ES8389_DATA_LEN_MASK, state); 589 regmap_update_bits(es8389->regmap, ES8389_DAC_FORMAT_MUTE, ES8389_DATA_LEN_MASK, state); 590 591 if (es8389->mclk_src == ES8389_SCLK_PIN) { 592 regmap_update_bits(es8389->regmap, ES8389_MASTER_CLK, 593 ES8389_MCLK_SOURCE, es8389->mclk_src); 594 es8389->sysclk = params_channels(params) * params_width(params) * params_rate(params); 595 } 596 597 regmap_read(es8389->regmap, ES8389_DMIC_EN, ®v); 598 dmic_enable = regv >> 7 & 0x01; 599 600 ret = regulator_get_voltage(es8389->core_supply[ES8389_SUPPLY_VD].consumer); 601 switch (ret) { 602 case 1800000 ... 2000000: 603 es8389->vddd = ES8389_1V8; 604 break; 605 case 2500000 ... 3300000: 606 es8389->vddd = ES8389_3V3; 607 break; 608 default: 609 es8389->vddd = ES8389_3V3; 610 break; 611 } 612 613 coeff = get_coeff(es8389->vddd, dmic_enable, es8389->sysclk, params_rate(params)); 614 if (coeff >= 0) { 615 regmap_write(es8389->regmap, ES8389_CLK_DIV1, coeff_div[coeff].Reg0x04); 616 regmap_write(es8389->regmap, ES8389_CLK_MUL, coeff_div[coeff].Reg0x05); 617 regmap_write(es8389->regmap, ES8389_CLK_MUX1, coeff_div[coeff].Reg0x06); 618 regmap_write(es8389->regmap, ES8389_CLK_MUX2, coeff_div[coeff].Reg0x07); 619 regmap_write(es8389->regmap, ES8389_CLK_CTL1, coeff_div[coeff].Reg0x08); 620 regmap_write(es8389->regmap, ES8389_CLK_CTL2, coeff_div[coeff].Reg0x09); 621 regmap_write(es8389->regmap, ES8389_CLK_CTL3, coeff_div[coeff].Reg0x0A); 622 regmap_update_bits(es8389->regmap, ES8389_OSC_CLK, 623 0xC0, coeff_div[coeff].Reg0x0F); 624 regmap_write(es8389->regmap, ES8389_CLK_DIV2, coeff_div[coeff].Reg0x11); 625 regmap_write(es8389->regmap, ES8389_ADC_OSR, coeff_div[coeff].Reg0x21); 626 regmap_write(es8389->regmap, ES8389_ADC_DSP, coeff_div[coeff].Reg0x22); 627 regmap_write(es8389->regmap, ES8389_OSR_VOL, coeff_div[coeff].Reg0x26); 628 regmap_update_bits(es8389->regmap, ES8389_SYSTEM30, 629 0xC0, coeff_div[coeff].Reg0x30); 630 regmap_write(es8389->regmap, ES8389_DAC_DSM_OSR, coeff_div[coeff].Reg0x41); 631 regmap_write(es8389->regmap, ES8389_DAC_DSP_OSR, coeff_div[coeff].Reg0x42); 632 regmap_update_bits(es8389->regmap, ES8389_DAC_MISC, 633 0x81, coeff_div[coeff].Reg0x43); 634 regmap_update_bits(es8389->regmap, ES8389_CHIP_MISC, 635 0x72, coeff_div[coeff].Reg0xF0); 636 regmap_write(es8389->regmap, ES8389_CSM_STATE1, coeff_div[coeff].Reg0xF1); 637 regmap_write(es8389->regmap, ES8389_SYSTEM16, coeff_div[coeff].Reg0x16); 638 regmap_write(es8389->regmap, ES8389_SYSTEM18, coeff_div[coeff].Reg0x18); 639 regmap_write(es8389->regmap, ES8389_SYSTEM19, coeff_div[coeff].Reg0x19); 640 } else { 641 dev_warn(component->dev, "Clock coefficients do not match"); 642 } 643 644 return 0; 645 } 646 647 static int es8389_set_bias_level(struct snd_soc_component *component, 648 enum snd_soc_bias_level level) 649 { 650 int ret; 651 struct es8389_private *es8389 = snd_soc_component_get_drvdata(component); 652 653 switch (level) { 654 case SND_SOC_BIAS_ON: 655 ret = clk_prepare_enable(es8389->mclk); 656 if (ret) 657 return ret; 658 659 regmap_update_bits(es8389->regmap, ES8389_HPSW, 0x20, 0x20); 660 regmap_write(es8389->regmap, ES8389_ANA_CTL1, 0xD9); 661 regmap_write(es8389->regmap, ES8389_ADC_EN, 0x8F); 662 regmap_write(es8389->regmap, ES8389_CSM_JUMP, 0xE4); 663 regmap_write(es8389->regmap, ES8389_RESET, 0x01); 664 regmap_write(es8389->regmap, ES8389_CLK_OFF1, 0xC3); 665 break; 666 case SND_SOC_BIAS_PREPARE: 667 break; 668 case SND_SOC_BIAS_STANDBY: 669 regmap_update_bits(es8389->regmap, ES8389_ADC_HPF1, 0x0f, 0x04); 670 regmap_update_bits(es8389->regmap, ES8389_ADC_HPF2, 0x0f, 0x04); 671 regmap_write(es8389->regmap, ES8389_CSM_JUMP, 0xD4); 672 usleep_range(70000, 72000); 673 regmap_write(es8389->regmap, ES8389_ANA_CTL1, 0x59); 674 regmap_write(es8389->regmap, ES8389_ADC_EN, 0x00); 675 regmap_write(es8389->regmap, ES8389_CLK_OFF1, 0x00); 676 regmap_write(es8389->regmap, ES8389_RESET, 0x3E); 677 regmap_update_bits(es8389->regmap, ES8389_DAC_INV, 0x80, 0x80); 678 usleep_range(8000, 8500); 679 regmap_update_bits(es8389->regmap, ES8389_DAC_INV, 0x80, 0x00); 680 681 clk_disable_unprepare(es8389->mclk); 682 break; 683 case SND_SOC_BIAS_OFF: 684 break; 685 } 686 return 0; 687 } 688 689 690 691 static int es8389_mute(struct snd_soc_dai *dai, int mute, int direction) 692 { 693 struct snd_soc_component *component = dai->component; 694 struct es8389_private *es8389 = snd_soc_component_get_drvdata(component); 695 unsigned int regv; 696 697 if (mute) { 698 if (direction == SNDRV_PCM_STREAM_PLAYBACK) { 699 regmap_update_bits(es8389->regmap, ES8389_DAC_FORMAT_MUTE, 700 0x03, 0x03); 701 } else { 702 regmap_update_bits(es8389->regmap, ES8389_ADC_FORMAT_MUTE, 703 0x03, 0x03); 704 } 705 } else { 706 regmap_read(es8389->regmap, ES8389_CSM_STATE1, ®v); 707 if (regv != ES8389_STATE_ON) { 708 regmap_update_bits(es8389->regmap, ES8389_HPSW, 0x20, 0x20); 709 regmap_write(es8389->regmap, ES8389_ANA_CTL1, 0xD9); 710 regmap_write(es8389->regmap, ES8389_ADC_EN, 0x8F); 711 regmap_write(es8389->regmap, ES8389_CSM_JUMP, 0xE4); 712 regmap_write(es8389->regmap, ES8389_RESET, 0x01); 713 regmap_write(es8389->regmap, ES8389_CLK_OFF1, 0xC3); 714 } 715 716 if (direction == SNDRV_PCM_STREAM_PLAYBACK) { 717 if (!es8389->version) { 718 regmap_write(es8389->regmap, ES8389_DAC_RESET, 0X00); 719 usleep_range(70000, 72000); 720 } 721 regmap_update_bits(es8389->regmap, ES8389_DAC_FORMAT_MUTE, 722 0x03, 0x00); 723 } else { 724 regmap_update_bits(es8389->regmap, ES8389_ADC_HPF1, 0x0f, 0x0a); 725 regmap_update_bits(es8389->regmap, ES8389_ADC_HPF2, 0x0f, 0x0a); 726 regmap_update_bits(es8389->regmap, ES8389_ADC_FORMAT_MUTE, 727 0x03, 0x00); 728 } 729 } 730 731 return 0; 732 } 733 734 #define es8389_RATES SNDRV_PCM_RATE_8000_96000 735 736 #define es8389_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\ 737 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_FMTBIT_S32_LE) 738 739 static const struct snd_soc_dai_ops es8389_ops = { 740 .hw_params = es8389_pcm_hw_params, 741 .set_fmt = es8389_set_dai_fmt, 742 .set_sysclk = es8389_set_dai_sysclk, 743 .set_tdm_slot = es8389_set_tdm_slot, 744 .mute_stream = es8389_mute, 745 }; 746 747 static struct snd_soc_dai_driver es8389_dai = { 748 .name = "ES8389 HiFi", 749 .playback = { 750 .stream_name = "Playback", 751 .channels_min = 1, 752 .channels_max = 2, 753 .rates = es8389_RATES, 754 .formats = es8389_FORMATS, 755 }, 756 .capture = { 757 .stream_name = "Capture", 758 .channels_min = 1, 759 .channels_max = 2, 760 .rates = es8389_RATES, 761 .formats = es8389_FORMATS, 762 }, 763 .ops = &es8389_ops, 764 .symmetric_rate = 1, 765 }; 766 767 static void es8389_init(struct snd_soc_component *component) 768 { 769 struct es8389_private *es8389 = snd_soc_component_get_drvdata(component); 770 unsigned int reg; 771 772 regmap_read(es8389->regmap, ES8389_MAX_REGISTER, ®); 773 es8389->version = reg; 774 regmap_write(es8389->regmap, ES8389_ISO_CTL, 0x00); 775 regmap_write(es8389->regmap, ES8389_RESET, 0x7E); 776 regmap_write(es8389->regmap, ES8389_ISO_CTL, 0x38); 777 regmap_write(es8389->regmap, ES8389_ADC_HPF1, 0x64); 778 regmap_write(es8389->regmap, ES8389_ADC_HPF2, 0x04); 779 regmap_write(es8389->regmap, ES8389_DAC_INV, 0x03); 780 781 regmap_write(es8389->regmap, ES8389_VMID, 0x2A); 782 regmap_write(es8389->regmap, ES8389_ANA_CTL1, 0xC9); 783 regmap_write(es8389->regmap, ES8389_ANA_VSEL, 0x4F); 784 regmap_write(es8389->regmap, ES8389_ANA_CTL2, 0x06); 785 regmap_write(es8389->regmap, ES8389_LOW_POWER1, 0x00); 786 regmap_write(es8389->regmap, ES8389_DMIC_EN, 0x16); 787 788 regmap_write(es8389->regmap, ES8389_PGA_SW, 0xAA); 789 regmap_write(es8389->regmap, ES8389_MOD_SW1, 0x66); 790 regmap_write(es8389->regmap, ES8389_MOD_SW2, 0x99); 791 regmap_write(es8389->regmap, ES8389_ADC_MODE, (0x00 | ES8389_TDM_MODE)); 792 regmap_update_bits(es8389->regmap, ES8389_DMIC_EN, 0xC0, 0x00); 793 regmap_update_bits(es8389->regmap, ES8389_ADC_MODE, 0x03, 0x00); 794 795 regmap_update_bits(es8389->regmap, ES8389_MIC1_GAIN, 796 ES8389_MIC_SEL_MASK, ES8389_MIC_DEFAULT); 797 regmap_update_bits(es8389->regmap, ES8389_MIC2_GAIN, 798 ES8389_MIC_SEL_MASK, ES8389_MIC_DEFAULT); 799 regmap_write(es8389->regmap, ES8389_CSM_JUMP, 0xC4); 800 regmap_write(es8389->regmap, ES8389_MASTER_MODE, 0x08); 801 regmap_write(es8389->regmap, ES8389_CSM_STATE1, 0x00); 802 regmap_write(es8389->regmap, ES8389_SYSTEM12, 0x01); 803 regmap_write(es8389->regmap, ES8389_SYSTEM13, 0x01); 804 regmap_write(es8389->regmap, ES8389_SYSTEM14, 0x01); 805 regmap_write(es8389->regmap, ES8389_SYSTEM15, 0x01); 806 regmap_write(es8389->regmap, ES8389_SYSTEM16, 0x35); 807 regmap_write(es8389->regmap, ES8389_SYSTEM17, 0x09); 808 regmap_write(es8389->regmap, ES8389_SYSTEM18, 0x91); 809 regmap_write(es8389->regmap, ES8389_SYSTEM19, 0x28); 810 regmap_write(es8389->regmap, ES8389_SYSTEM1A, 0x01); 811 regmap_write(es8389->regmap, ES8389_SYSTEM1B, 0x01); 812 regmap_write(es8389->regmap, ES8389_SYSTEM1C, 0x11); 813 814 regmap_write(es8389->regmap, ES8389_CHIP_MISC, 0x13); 815 regmap_write(es8389->regmap, ES8389_MASTER_CLK, 0x00); 816 regmap_write(es8389->regmap, ES8389_CLK_DIV1, 0x00); 817 regmap_write(es8389->regmap, ES8389_CLK_MUL, 0x10); 818 regmap_write(es8389->regmap, ES8389_CLK_MUX1, 0x00); 819 regmap_write(es8389->regmap, ES8389_CLK_MUX2, 0xC0); 820 regmap_write(es8389->regmap, ES8389_CLK_CTL1, 0x00); 821 regmap_write(es8389->regmap, ES8389_CLK_CTL2, 0xC0); 822 regmap_write(es8389->regmap, ES8389_CLK_CTL3, 0x80); 823 regmap_write(es8389->regmap, ES8389_SCLK_DIV, 0x04); 824 regmap_write(es8389->regmap, ES8389_LRCK_DIV1, 0x01); 825 regmap_write(es8389->regmap, ES8389_LRCK_DIV2, 0x00); 826 regmap_write(es8389->regmap, ES8389_OSC_CLK, 0x00); 827 regmap_write(es8389->regmap, ES8389_ADC_OSR, 0x1F); 828 regmap_write(es8389->regmap, ES8389_ADC_DSP, 0x7F); 829 regmap_write(es8389->regmap, ES8389_ADC_MUTE, 0xC0); 830 regmap_write(es8389->regmap, ES8389_SYSTEM30, 0xF4); 831 regmap_write(es8389->regmap, ES8389_DAC_DSM_OSR, 0x7F); 832 regmap_write(es8389->regmap, ES8389_DAC_DSP_OSR, 0x7F); 833 regmap_write(es8389->regmap, ES8389_DAC_MISC, 0x10); 834 regmap_write(es8389->regmap, ES8389_DAC_RAMP, 0x0F); 835 regmap_write(es8389->regmap, ES8389_SYSTEM4C, 0xC0); 836 regmap_write(es8389->regmap, ES8389_RESET, 0x00); 837 regmap_write(es8389->regmap, ES8389_CLK_OFF1, 0xC1); 838 regmap_write(es8389->regmap, ES8389_RESET, 0x01); 839 regmap_write(es8389->regmap, ES8389_DAC_RESET, 0x02); 840 841 regmap_update_bits(es8389->regmap, ES8389_ADC_FORMAT_MUTE, 0x03, 0x03); 842 regmap_update_bits(es8389->regmap, ES8389_DAC_FORMAT_MUTE, 0x03, 0x03); 843 } 844 845 static int es8389_suspend(struct snd_soc_component *component) 846 { 847 struct es8389_private *es8389 = snd_soc_component_get_drvdata(component); 848 849 es8389_set_bias_level(component, SND_SOC_BIAS_STANDBY); 850 regcache_cache_only(es8389->regmap, true); 851 regcache_mark_dirty(es8389->regmap); 852 853 return 0; 854 } 855 856 static int es8389_resume(struct snd_soc_component *component) 857 { 858 struct es8389_private *es8389 = snd_soc_component_get_drvdata(component); 859 unsigned int regv; 860 861 regcache_cache_only(es8389->regmap, false); 862 regcache_cache_bypass(es8389->regmap, true); 863 regmap_read(es8389->regmap, ES8389_RESET, ®v); 864 regcache_cache_bypass(es8389->regmap, false); 865 866 if (regv == 0xff) 867 es8389_init(component); 868 else 869 es8389_set_bias_level(component, SND_SOC_BIAS_ON); 870 871 regcache_sync(es8389->regmap); 872 873 return 0; 874 } 875 876 static int es8389_probe(struct snd_soc_component *component) 877 { 878 int ret, i; 879 struct es8389_private *es8389 = snd_soc_component_get_drvdata(component); 880 881 ret = device_property_read_u8(component->dev, "everest,mclk-src", &es8389->mclk_src); 882 if (ret != 0) { 883 dev_dbg(component->dev, "mclk-src return %d", ret); 884 es8389->mclk_src = ES8389_MCLK_SOURCE; 885 } 886 887 for (i = 0; i < ARRAY_SIZE(es8389_core_supplies); i++) 888 es8389->core_supply[i].supply = es8389_core_supplies[i]; 889 ret = devm_regulator_bulk_get(component->dev, ARRAY_SIZE(es8389_core_supplies), es8389->core_supply); 890 if (ret) { 891 dev_err(component->dev, "Failed to request core supplies %d\n", ret); 892 return ret; 893 } 894 895 es8389->mclk = devm_clk_get(component->dev, "mclk"); 896 if (IS_ERR(es8389->mclk)) 897 return dev_err_probe(component->dev, PTR_ERR(es8389->mclk), 898 "ES8389 is unable to get mclk\n"); 899 900 if (!es8389->mclk) 901 dev_err(component->dev, "%s, assuming static mclk\n", __func__); 902 903 ret = clk_prepare_enable(es8389->mclk); 904 if (ret) { 905 dev_err(component->dev, "%s, unable to enable mclk\n", __func__); 906 return ret; 907 } 908 909 ret = regulator_bulk_enable(ARRAY_SIZE(es8389_core_supplies), es8389->core_supply); 910 if (ret) { 911 dev_err(component->dev, "Failed to enable core supplies: %d\n", ret); 912 clk_disable_unprepare(es8389->mclk); 913 return ret; 914 } 915 916 es8389_init(component); 917 es8389_set_bias_level(component, SND_SOC_BIAS_STANDBY); 918 919 return 0; 920 } 921 922 static void es8389_remove(struct snd_soc_component *component) 923 { 924 struct es8389_private *es8389 = snd_soc_component_get_drvdata(component); 925 926 regmap_write(es8389->regmap, ES8389_MASTER_MODE, 0x28); 927 regmap_write(es8389->regmap, ES8389_HPSW, 0x00); 928 regmap_write(es8389->regmap, ES8389_VMID, 0x00); 929 regmap_write(es8389->regmap, ES8389_RESET, 0x00); 930 regmap_write(es8389->regmap, ES8389_CSM_JUMP, 0xCC); 931 usleep_range(500000, 550000);//500MS 932 regmap_write(es8389->regmap, ES8389_CSM_JUMP, 0x00); 933 regmap_write(es8389->regmap, ES8389_ANA_CTL1, 0x08); 934 regmap_write(es8389->regmap, ES8389_ISO_CTL, 0xC1); 935 regmap_write(es8389->regmap, ES8389_PULL_DOWN, 0x00); 936 937 } 938 939 static const struct snd_soc_component_driver soc_codec_dev_es8389 = { 940 .probe = es8389_probe, 941 .remove = es8389_remove, 942 .suspend = es8389_suspend, 943 .resume = es8389_resume, 944 .set_bias_level = es8389_set_bias_level, 945 946 .controls = es8389_snd_controls, 947 .num_controls = ARRAY_SIZE(es8389_snd_controls), 948 .dapm_widgets = es8389_dapm_widgets, 949 .num_dapm_widgets = ARRAY_SIZE(es8389_dapm_widgets), 950 .dapm_routes = es8389_dapm_routes, 951 .num_dapm_routes = ARRAY_SIZE(es8389_dapm_routes), 952 .idle_bias_on = 1, 953 .use_pmdown_time = 1, 954 }; 955 956 static const struct regmap_config es8389_regmap = { 957 .reg_bits = 8, 958 .val_bits = 8, 959 960 .max_register = ES8389_MAX_REGISTER, 961 962 .volatile_reg = es8389_volatile_register, 963 .cache_type = REGCACHE_MAPLE, 964 }; 965 966 static void es8389_i2c_shutdown(struct i2c_client *i2c) 967 { 968 struct es8389_private *es8389; 969 970 es8389 = i2c_get_clientdata(i2c); 971 972 regmap_write(es8389->regmap, ES8389_MASTER_MODE, 0x28); 973 regmap_write(es8389->regmap, ES8389_HPSW, 0x00); 974 regmap_write(es8389->regmap, ES8389_VMID, 0x00); 975 regmap_write(es8389->regmap, ES8389_RESET, 0x00); 976 regmap_write(es8389->regmap, ES8389_CSM_JUMP, 0xCC); 977 usleep_range(500000, 550000);//500MS 978 regmap_write(es8389->regmap, ES8389_CSM_JUMP, 0x00); 979 regmap_write(es8389->regmap, ES8389_ANA_CTL1, 0x08); 980 regmap_write(es8389->regmap, ES8389_ISO_CTL, 0xC1); 981 regmap_write(es8389->regmap, ES8389_PULL_DOWN, 0x00); 982 983 regulator_bulk_disable(ARRAY_SIZE(es8389_core_supplies), es8389->core_supply); 984 } 985 986 static int es8389_i2c_probe(struct i2c_client *i2c_client) 987 { 988 struct es8389_private *es8389; 989 int ret; 990 991 es8389 = devm_kzalloc(&i2c_client->dev, sizeof(*es8389), GFP_KERNEL); 992 if (es8389 == NULL) 993 return -ENOMEM; 994 995 i2c_set_clientdata(i2c_client, es8389); 996 es8389->regmap = devm_regmap_init_i2c(i2c_client, &es8389_regmap); 997 if (IS_ERR(es8389->regmap)) 998 return dev_err_probe(&i2c_client->dev, PTR_ERR(es8389->regmap), 999 "regmap_init() failed\n"); 1000 1001 ret = devm_snd_soc_register_component(&i2c_client->dev, 1002 &soc_codec_dev_es8389, 1003 &es8389_dai, 1004 1); 1005 1006 return ret; 1007 } 1008 1009 #ifdef CONFIG_OF 1010 static const struct of_device_id es8389_if_dt_ids[] = { 1011 { .compatible = "everest,es8389", }, 1012 { } 1013 }; 1014 MODULE_DEVICE_TABLE(of, es8389_if_dt_ids); 1015 #endif 1016 1017 static const struct i2c_device_id es8389_i2c_id[] = { 1018 {"es8389"}, 1019 { } 1020 }; 1021 MODULE_DEVICE_TABLE(i2c, es8389_i2c_id); 1022 1023 static struct i2c_driver es8389_i2c_driver = { 1024 .driver = { 1025 .name = "es8389", 1026 .of_match_table = of_match_ptr(es8389_if_dt_ids), 1027 }, 1028 .shutdown = es8389_i2c_shutdown, 1029 .probe = es8389_i2c_probe, 1030 .id_table = es8389_i2c_id, 1031 }; 1032 module_i2c_driver(es8389_i2c_driver); 1033 1034 MODULE_DESCRIPTION("ASoC es8389 driver"); 1035 MODULE_AUTHOR("Michael Zhang <zhangyi@everest-semi.com>"); 1036 MODULE_LICENSE("GPL"); 1037