xref: /linux/sound/soc/codecs/es8389.c (revision e0d8e8de8bcb1ef7b749033b5af5518ba8df7bec)
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * es8389.c  --  ES8389 ALSA SoC Audio Codec
4  *
5  * Copyright Everest Semiconductor Co., Ltd
6  *
7  * Authors:  Michael Zhang (zhangyi@everest-semi.com)
8  *
9  * This program is free software; you can redistribute it and/or modify
10  * it under the terms of the GNU General Public License version 2 as
11  * published by the Free Software Foundation.
12  */
13 
14 #include <linux/clk.h>
15 #include <linux/module.h>
16 #include <linux/kernel.h>
17 #include <linux/delay.h>
18 #include <linux/i2c.h>
19 #include <linux/regmap.h>
20 #include <linux/regulator/consumer.h>
21 #include <sound/core.h>
22 #include <sound/pcm.h>
23 #include <sound/pcm_params.h>
24 #include <sound/tlv.h>
25 #include <sound/soc.h>
26 
27 #include "es8389.h"
28 
29 
30 /* codec private data */
31 
32 struct	es8389_private {
33 	struct regmap *regmap;
34 	struct clk *mclk;
35 	struct regulator_bulk_data core_supply[2];
36 	unsigned int sysclk;
37 	int mastermode;
38 
39 	u8 hpfl;
40 	u8 hpfr;
41 	u32 hpf_freq;
42 	u32 capture_rate;
43 	u8 mclk_src;
44 	u8 vddd;
45 	int version;
46 	enum snd_soc_bias_level bias_level;
47 };
48 
49 static const char * const es8389_core_supplies[] = {
50 	"vddd",
51 	"vdda",
52 };
53 
54 static bool es8389_volatile_register(struct device *dev,
55 			unsigned int reg)
56 {
57 	switch (reg) {
58 	case ES8389_ADCL_VOL:
59 	case ES8389_ADCR_VOL:
60 	case ES8389_MIC1_GAIN:
61 	case ES8389_MIC2_GAIN:
62 	case ES8389_DACL_VOL:
63 	case ES8389_DACR_VOL:
64 	case ES8389_ALC_ON:
65 	case ES8389_ALC_CTL:
66 	case ES8389_ALC_TARGET:
67 	case ES8389_ALC_GAIN:
68 	case ES8389_ADC_MUTE:
69 	case ES8389_OSR_VOL:
70 	case ES8389_DAC_INV:
71 	case ES8389_MIX_VOL:
72 	case ES8389_DAC_MIX:
73 	case ES8389_ADC_RESET:
74 	case ES8389_ADC_MODE:
75 	case ES8389_DMIC_EN:
76 		return false;
77 	default:
78 		return true;
79 	}
80 }
81 
82 static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -9550, 50, 0);
83 static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -9550, 50, 0);
84 static const DECLARE_TLV_DB_SCALE(pga_vol_tlv, 0, 300, 0);
85 static const DECLARE_TLV_DB_SCALE(mix_vol_tlv, -9500, 100, 0);
86 static const DECLARE_TLV_DB_SCALE(alc_target_tlv, -3200, 200, 0);
87 static const DECLARE_TLV_DB_SCALE(alc_max_level, -3200, 200, 0);
88 
89 static const u32 hpf_table[10][10] = {
90 	{1020, 754, 624, 559, 527, 511, 502, 498, 497, 496},
91 	{754, 495, 368, 306, 274, 259, 251, 247, 246, 244},
92 	{624, 368, 243, 182, 151, 136, 128, 124, 123, 121},
93 	{559, 306, 182, 120, 90, 75, 68, 63, 62, 60},
94 	{527, 274, 151, 90, 60, 45, 38, 33, 32, 31},
95 	{511, 259, 136, 75, 45, 30, 23, 19, 18, 17},
96 	{502, 251, 128, 68, 38, 23, 16, 13, 11, 11},
97 	{498, 247, 124, 63, 33, 19, 13, 10, 8, 8},
98 	{497, 246, 123, 62, 32, 18, 11, 8, 8, 0},
99 	{496, 244, 121, 60, 31, 17, 11, 8, 0, 0}
100 };
101 
102 static bool find_best_hpf_freq(u32 target_hz, u8 *hpf1, u8 *hpf2)
103 {
104 	int best_row = -1, best_col = -1;
105 	u32 min_diff = U32_MAX;
106 	u32 f, diff;
107 	int i, j;
108 
109 	if (target_hz > 1020)
110 		return false;
111 
112 	for (i = 0; i < 10; i++) {
113 		for (j = i; j < 10; j++) {
114 			f = hpf_table[i][j];
115 
116 			diff = (target_hz > f) ? (target_hz - f) : (f - target_hz);
117 			if (diff < min_diff) {
118 				min_diff = diff;
119 				best_row = i;
120 				best_col = j;
121 			}
122 		}
123 	}
124 
125 	*hpf1 = best_col + ES8389_HPF_OFFSET;
126 	*hpf2 = best_row + ES8389_HPF_OFFSET;
127 
128 	return true;
129 }
130 
131 static int es8389_hpf_get(struct snd_kcontrol *kcontrol,
132 	struct snd_ctl_elem_value *ucontrol)
133 {
134 	struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
135 	struct es8389_private *es8389 = snd_soc_component_get_drvdata(component);
136 
137 	ucontrol->value.integer.value[0] = es8389->hpf_freq;
138 	return 0;
139 }
140 
141 static int es8389_hpf_set(struct snd_kcontrol *kcontrol,
142 	struct snd_ctl_elem_value *ucontrol)
143 {
144 	struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
145 	struct es8389_private *es8389 = snd_soc_component_get_drvdata(component);
146 	u32 freq;
147 	bool hpf;
148 
149 	if ((ucontrol->value.integer.value[0] > 1020) || (ucontrol->value.integer.value[0] < 0))
150 		return -EINVAL;
151 
152 	if (es8389->hpf_freq == ucontrol->value.integer.value[0])
153 		return 0;
154 
155 	if (es8389->capture_rate) {
156 		freq = (ucontrol->value.integer.value[0] * 48000) / es8389->capture_rate;
157 
158 		hpf = find_best_hpf_freq(freq, &es8389->hpfl, &es8389->hpfr);
159 		if (!hpf)
160 			return -EBUSY;
161 
162 		regmap_update_bits(es8389->regmap, ES8389_ADC_HPF1, 0x0f, es8389->hpfl);
163 		regmap_update_bits(es8389->regmap, ES8389_ADC_HPF2, 0x0f, es8389->hpfr);
164 	} else {
165 		dev_dbg(component->dev, "PCM_STREAM_CAPTURE is not active.retain the input frequency\n");
166 	}
167 	es8389->hpf_freq = ucontrol->value.integer.value[0];
168 
169 	return 1;
170 }
171 
172 static int es8389_dmic_set(struct snd_kcontrol *kcontrol,
173 	struct snd_ctl_elem_value *ucontrol)
174 {
175 	struct snd_soc_component *component = snd_soc_dapm_kcontrol_to_component(kcontrol);
176 	struct snd_soc_dapm_context *dapm = snd_soc_dapm_kcontrol_to_dapm(kcontrol);
177 	struct es8389_private *es8389 = snd_soc_component_get_drvdata(component);
178 	struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
179 	unsigned int val;
180 	bool changed1, changed2;
181 
182 	val = ucontrol->value.integer.value[0];
183 	if (val > 1)
184 		return -EINVAL;
185 
186 	if (val) {
187 		regmap_update_bits_check(es8389->regmap, ES8389_DMIC_EN, 0xC0, 0xC0, &changed1);
188 		regmap_update_bits_check(es8389->regmap, ES8389_ADC_MODE, 0x03, 0x03, &changed2);
189 	} else {
190 		regmap_update_bits_check(es8389->regmap, ES8389_DMIC_EN, 0xC0, 0x00, &changed1);
191 		regmap_update_bits_check(es8389->regmap, ES8389_ADC_MODE, 0x03, 0x00, &changed2);
192 	}
193 
194 	if (changed1 & changed2)
195 		return snd_soc_dapm_mux_update_power(dapm, kcontrol, val, e, NULL);
196 	else
197 		return 0;
198 }
199 
200 static const char *const alc[] = {
201 	"ALC OFF",
202 	"ADCR ALC ON",
203 	"ADCL ALC ON",
204 	"ADCL & ADCL ALC ON",
205 };
206 
207 static const char *const ramprate[] = {
208 	"0.125db/1  LRCK",
209 	"0.125db/4  LRCK",
210 	"0.125db/8  LRCK",
211 	"0.125db/16  LRCK",
212 	"0.125db/32  LRCK",
213 	"0.125db/64  LRCK",
214 	"0.125db/128  LRCK",
215 	"0.125db/256  LRCK",
216 	"0.125db/512  LRCK",
217 	"0.125db/1024  LRCK",
218 	"0.125db/2048  LRCK",
219 	"0.125db/4096  LRCK",
220 	"0.125db/8192  LRCK",
221 	"0.125db/16384  LRCK",
222 	"0.125db/32768  LRCK",
223 	"0.125db/65536  LRCK",
224 };
225 
226 static const char *const winsize[] = {
227 	"2 LRCK",
228 	"4  LRCK",
229 	"8  LRCK",
230 	"16  LRCK",
231 	"32  LRCK",
232 	"64  LRCK",
233 	"128  LRCK",
234 	"256  LRCK",
235 	"512  LRCK",
236 	"1024  LRCK",
237 	"2048  LRCK",
238 	"4096  LRCK",
239 	"8192  LRCK",
240 	"16384  LRCK",
241 	"32768  LRCK",
242 	"65536  LRCK",
243 };
244 
245 static const struct soc_enum alc_enable =
246 	SOC_ENUM_SINGLE(ES8389_ALC_ON, 5, 4, alc);
247 static const struct soc_enum alc_ramprate =
248 	SOC_ENUM_SINGLE(ES8389_ALC_CTL, 4, 16, ramprate);
249 static const struct soc_enum alc_winsize =
250 	SOC_ENUM_SINGLE(ES8389_ALC_CTL, 0, 16, winsize);
251 
252 static const char *const es8389_adcl_mux_txt[] = {
253 	"Normal",
254 	"ADC2 channel to ADC1 channel",
255 };
256 
257 static const char *const es8389_adcr_mux_txt[] = {
258 	"Normal",
259 	"ADC1 channel to ADC2 channel",
260 };
261 
262 static const char *const es8389_outl_mux_txt[] = {
263 	"Normal",
264 	"DAC2 channel to DAC1 channel",
265 };
266 
267 static const char *const es8389_outr_mux_txt[] = {
268 	"Normal",
269 	"DAC1 channel to DAC2 channel",
270 };
271 
272 static const char *const es8389_dmic_mux_txt[] = {
273 	"AMIC",
274 	"DMIC",
275 };
276 
277 static const char *const es8389_pga1_texts[] = {
278 	"DifferentialL",  "Line 1P", "Line 2P"
279 };
280 
281 static const char *const es8389_pga2_texts[] = {
282 	"DifferentialR",  "Line 2N", "Line 1N"
283 };
284 
285 static const unsigned int es8389_pga_values[] = {
286 	1, 5, 6
287 };
288 
289 static const struct soc_enum es8389_adcl_mux_enum =
290 	SOC_ENUM_SINGLE(ES8389_ADC_MODE, 5,
291 			ARRAY_SIZE(es8389_adcl_mux_txt), es8389_adcl_mux_txt);
292 
293 static const struct snd_kcontrol_new es8389_adcl_mux_controls =
294 	SOC_DAPM_ENUM("INPUTL MUX", es8389_adcl_mux_enum);
295 
296 static const struct soc_enum es8389_adcr_mux_enum =
297 	SOC_ENUM_SINGLE(ES8389_ADC_MODE, 4,
298 			ARRAY_SIZE(es8389_adcr_mux_txt), es8389_adcr_mux_txt);
299 
300 static const struct snd_kcontrol_new es8389_adcr_mux_controls =
301 	SOC_DAPM_ENUM("INPUTR MUX", es8389_adcr_mux_enum);
302 
303 static const struct soc_enum es8389_outl_mux_enum =
304 	SOC_ENUM_SINGLE(ES8389_DAC_MIX, 5,
305 			ARRAY_SIZE(es8389_outl_mux_txt), es8389_outl_mux_txt);
306 
307 static const struct snd_kcontrol_new es8389_outl_mux_controls =
308 	SOC_DAPM_ENUM("OUTL MUX", es8389_outl_mux_enum);
309 
310 static const struct soc_enum es8389_outr_mux_enum =
311 	SOC_ENUM_SINGLE(ES8389_DAC_MIX, 4,
312 			ARRAY_SIZE(es8389_outr_mux_txt), es8389_outr_mux_txt);
313 
314 static const struct snd_kcontrol_new es8389_outr_mux_controls =
315 	SOC_DAPM_ENUM("OUTR MUX", es8389_outr_mux_enum);
316 
317 static SOC_ENUM_SINGLE_DECL(
318 	es8389_dmic_mux_enum, ES8389_DMIC_EN, 6, es8389_dmic_mux_txt);
319 
320 static const struct soc_enum es8389_pgal_enum =
321 	SOC_VALUE_ENUM_SINGLE(ES8389_MIC1_GAIN, 4, 7,
322 			ARRAY_SIZE(es8389_pga1_texts), es8389_pga1_texts,
323 			es8389_pga_values);
324 
325 static const struct soc_enum es8389_pgar_enum =
326 	SOC_VALUE_ENUM_SINGLE(ES8389_MIC2_GAIN, 4, 7,
327 			ARRAY_SIZE(es8389_pga2_texts), es8389_pga2_texts,
328 			es8389_pga_values);
329 
330 static const struct snd_kcontrol_new es8389_dmic_mux_controls =
331 	SOC_DAPM_ENUM_EXT("ADC MUX", es8389_dmic_mux_enum,
332 			snd_soc_dapm_get_enum_double, es8389_dmic_set);
333 
334 static const struct snd_kcontrol_new es8389_left_mixer_controls[] = {
335 	SOC_DAPM_SINGLE("DACR DACL Mixer", ES8389_DAC_MIX, 3, 1, 0),
336 };
337 
338 static const struct snd_kcontrol_new es8389_right_mixer_controls[] = {
339 	SOC_DAPM_SINGLE("DACL DACR Mixer", ES8389_DAC_MIX, 2, 1, 0),
340 };
341 
342 static const struct snd_kcontrol_new es8389_leftadc_mixer_controls[] = {
343 	SOC_DAPM_SINGLE("ADCL DACL Mixer", ES8389_DAC_MIX, 1, 1, 0),
344 };
345 
346 static const struct snd_kcontrol_new es8389_rightadc_mixer_controls[] = {
347 	SOC_DAPM_SINGLE("ADCR DACR Mixer", ES8389_DAC_MIX, 0, 1, 0),
348 };
349 
350 static const struct snd_kcontrol_new es8389_adc_mixer_controls[] = {
351 	SOC_DAPM_SINGLE("DACL ADCL Mixer", ES8389_ADC_RESET, 7, 1, 0),
352 	SOC_DAPM_SINGLE("DACR ADCR Mixer", ES8389_ADC_RESET, 6, 1, 0),
353 };
354 
355 static const struct snd_kcontrol_new es8389_snd_controls[] = {
356 	SOC_SINGLE_TLV("ADCL Capture Volume", ES8389_ADCL_VOL, 0, 0xFF, 0, adc_vol_tlv),
357 	SOC_SINGLE_TLV("ADCR Capture Volume", ES8389_ADCR_VOL, 0, 0xFF, 0, adc_vol_tlv),
358 	SOC_SINGLE_TLV("ADCL PGA Volume", ES8389_MIC1_GAIN, 0, 0x0E, 0, pga_vol_tlv),
359 	SOC_SINGLE_TLV("ADCR PGA Volume", ES8389_MIC2_GAIN, 0, 0x0E, 0, pga_vol_tlv),
360 
361 	SOC_ENUM("PGAL Select", es8389_pgal_enum),
362 	SOC_ENUM("PGAR Select", es8389_pgar_enum),
363 	SOC_ENUM("ALC Capture Switch", alc_enable),
364 	SOC_SINGLE_TLV("ALC Capture Target Level", ES8389_ALC_TARGET,
365 			0, 0x0f, 0, alc_target_tlv),
366 	SOC_SINGLE_TLV("ALC Capture Max Gain", ES8389_ALC_GAIN,
367 			0, 0x0f, 0, alc_max_level),
368 	SOC_ENUM("ADC Ramp Rate", alc_ramprate),
369 	SOC_ENUM("ALC Capture Winsize", alc_winsize),
370 	SOC_DOUBLE("ADC OSR Volume ON Switch", ES8389_ADC_MUTE, 6, 7, 1, 0),
371 	SOC_SINGLE_TLV("ADC OSR Volume", ES8389_OSR_VOL, 0, 0xFF, 0, adc_vol_tlv),
372 	SOC_DOUBLE("ADC OUTPUT Invert Switch", ES8389_ADC_HPF2, 5, 6, 1, 0),
373 	SOC_SINGLE_EXT("ADC HPF Freq Select", SND_SOC_NOPM, 0, 1020, 0,
374 				es8389_hpf_get, es8389_hpf_set),
375 
376 	SOC_SINGLE_TLV("DACL Playback Volume", ES8389_DACL_VOL, 0, 0xFF, 0, dac_vol_tlv),
377 	SOC_SINGLE_TLV("DACR Playback Volume", ES8389_DACR_VOL, 0, 0xFF, 0, dac_vol_tlv),
378 	SOC_DOUBLE("DAC OUTPUT Invert Switch", ES8389_DAC_INV, 5, 6, 1, 0),
379 	SOC_SINGLE_TLV("ADC2DAC Mixer Volume", ES8389_MIX_VOL, 0, 0x7F, 0, mix_vol_tlv),
380 };
381 
382 static const struct snd_soc_dapm_widget es8389_dapm_widgets[] = {
383 	/*Input Side*/
384 	SND_SOC_DAPM_INPUT("INPUT1"),
385 	SND_SOC_DAPM_INPUT("INPUT2"),
386 	SND_SOC_DAPM_INPUT("DMIC"),
387 	SND_SOC_DAPM_PGA("PGAL", SND_SOC_NOPM, 4, 0, NULL, 0),
388 	SND_SOC_DAPM_PGA("PGAR", SND_SOC_NOPM, 4, 0, NULL, 0),
389 
390 	/*ADCs*/
391 	SND_SOC_DAPM_ADC("ADCL", NULL, SND_SOC_NOPM, 0, 0),
392 	SND_SOC_DAPM_ADC("ADCR", NULL, SND_SOC_NOPM, 0, 0),
393 
394 	/* Audio Interface */
395 	SND_SOC_DAPM_AIF_OUT("I2S OUT", "I2S Capture", 0, SND_SOC_NOPM, 0, 0),
396 	SND_SOC_DAPM_AIF_IN("I2S IN", "I2S Playback", 0, SND_SOC_NOPM, 0, 0),
397 
398 	/*DACs*/
399 	SND_SOC_DAPM_DAC("DACL", NULL, SND_SOC_NOPM, 0, 0),
400 	SND_SOC_DAPM_DAC("DACR", NULL, SND_SOC_NOPM, 0, 0),
401 
402 	/*Output Side*/
403 	SND_SOC_DAPM_OUTPUT("HPOL"),
404 	SND_SOC_DAPM_OUTPUT("HPOR"),
405 
406 	/* Digital Interface */
407 	SND_SOC_DAPM_PGA("IF DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
408 	SND_SOC_DAPM_PGA("IF DACL1", SND_SOC_NOPM, 0, 0, NULL, 0),
409 	SND_SOC_DAPM_PGA("IF DACR1", SND_SOC_NOPM, 0, 0, NULL, 0),
410 	SND_SOC_DAPM_PGA("IF DACL2", SND_SOC_NOPM, 0, 0, NULL, 0),
411 	SND_SOC_DAPM_PGA("IF DACR2", SND_SOC_NOPM, 0, 0, NULL, 0),
412 	SND_SOC_DAPM_PGA("IF DACL3", SND_SOC_NOPM, 0, 0, NULL, 0),
413 	SND_SOC_DAPM_PGA("IF DACR3", SND_SOC_NOPM, 0, 0, NULL, 0),
414 
415 	/* Digital Interface Select */
416 	SND_SOC_DAPM_MIXER("IF DACL Mixer", SND_SOC_NOPM, 0, 0,
417 			   &es8389_left_mixer_controls[0],
418 			   ARRAY_SIZE(es8389_left_mixer_controls)),
419 	SND_SOC_DAPM_MIXER("IF DACR Mixer", SND_SOC_NOPM, 0, 0,
420 			   &es8389_right_mixer_controls[0],
421 			   ARRAY_SIZE(es8389_right_mixer_controls)),
422 	SND_SOC_DAPM_MIXER("IF ADCDACL Mixer", SND_SOC_NOPM, 0, 0,
423 			   &es8389_leftadc_mixer_controls[0],
424 			   ARRAY_SIZE(es8389_leftadc_mixer_controls)),
425 	SND_SOC_DAPM_MIXER("IF ADCDACR Mixer", SND_SOC_NOPM, 0, 0,
426 			   &es8389_rightadc_mixer_controls[0],
427 			   ARRAY_SIZE(es8389_rightadc_mixer_controls)),
428 
429 	SND_SOC_DAPM_MIXER("ADC Mixer", SND_SOC_NOPM, 0, 0,
430 			   &es8389_adc_mixer_controls[0],
431 			   ARRAY_SIZE(es8389_adc_mixer_controls)),
432 	SND_SOC_DAPM_MUX("ADC MUX", SND_SOC_NOPM, 0, 0, &es8389_dmic_mux_controls),
433 	SND_SOC_DAPM_MUX("INPUTL MUX", SND_SOC_NOPM, 0, 0, &es8389_adcl_mux_controls),
434 	SND_SOC_DAPM_MUX("INPUTR MUX", SND_SOC_NOPM, 0, 0, &es8389_adcr_mux_controls),
435 
436 	SND_SOC_DAPM_MUX("OUTL MUX", SND_SOC_NOPM, 0, 0, &es8389_outl_mux_controls),
437 	SND_SOC_DAPM_MUX("OUTR MUX", SND_SOC_NOPM, 0, 0, &es8389_outr_mux_controls),
438 };
439 
440 
441 static const struct snd_soc_dapm_route es8389_dapm_routes[] = {
442 	{"PGAL", NULL, "INPUT1"},
443 	{"PGAR", NULL, "INPUT2"},
444 
445 	{"ADCL", NULL, "PGAL"},
446 	{"ADCR", NULL, "PGAR"},
447 
448 	{"INPUTL MUX", "Normal", "ADCL"},
449 	{"INPUTL MUX", "ADC2 channel to ADC1 channel", "ADCR"},
450 	{"INPUTR MUX", "Normal", "ADCR"},
451 	{"INPUTR MUX", "ADC1 channel to ADC2 channel", "ADCL"},
452 
453 	{"ADC Mixer", "DACL ADCL Mixer", "DACL"},
454 	{"ADC Mixer", "DACR ADCR Mixer", "DACR"},
455 	{"ADC Mixer", NULL, "INPUTL MUX"},
456 	{"ADC Mixer", NULL, "INPUTR MUX"},
457 
458 	{"ADC MUX", "AMIC", "ADC Mixer"},
459 	{"ADC MUX", "DMIC", "DMIC"},
460 
461 	{"I2S OUT", NULL, "ADC MUX"},
462 
463 	{"DACL", NULL, "I2S IN"},
464 	{"DACR", NULL, "I2S IN"},
465 
466 	{"IF DACL1", NULL, "DACL"},
467 	{"IF DACR1", NULL, "DACR"},
468 	{"IF DACL2", NULL, "DACL"},
469 	{"IF DACR2", NULL, "DACR"},
470 	{"IF DACL3", NULL, "DACL"},
471 	{"IF DACR3", NULL, "DACR"},
472 
473 	{"IF DACL Mixer", NULL, "IF DACL2"},
474 	{"IF DACL Mixer", "DACR DACL Mixer", "IF DACR1"},
475 	{"IF DACR Mixer", NULL, "IF DACR2"},
476 	{"IF DACR Mixer", "DACL DACR Mixer", "IF DACL1"},
477 
478 	{"IF ADCDACL Mixer", NULL, "IF DACL Mixer"},
479 	{"IF ADCDACL Mixer", "ADCL DACL Mixer", "IF DACL3"},
480 	{"IF ADCDACR Mixer", NULL, "IF DACR Mixer"},
481 	{"IF ADCDACR Mixer", "ADCR DACR Mixer", "IF DACR3"},
482 
483 	{"OUTL MUX", "Normal", "IF ADCDACL Mixer"},
484 	{"OUTL MUX", "DAC2 channel to DAC1 channel", "IF ADCDACR Mixer"},
485 	{"OUTR MUX", "Normal", "IF ADCDACR Mixer"},
486 	{"OUTR MUX", "DAC1 channel to DAC2 channel", "IF ADCDACL Mixer"},
487 
488 	{"HPOL", NULL, "OUTL MUX"},
489 	{"HPOR", NULL, "OUTR MUX"},
490 
491 };
492 
493 struct _coeff_div {
494 	u16 fs;
495 	u32 mclk;
496 	u32 rate;
497 	u8 Reg0x04;
498 	u8 Reg0x05;
499 	u8 Reg0x06;
500 	u8 Reg0x07;
501 	u8 Reg0x08;
502 	u8 Reg0x09;
503 	u8 Reg0x0A;
504 	u8 Reg0x0F;
505 	u8 Reg0x11;
506 	u8 Reg0x21;
507 	u8 Reg0x22;
508 	u8 Reg0x26;
509 	u8 Reg0x30;
510 	u8 Reg0x41;
511 	u8 Reg0x42;
512 	u8 Reg0x43;
513 	u8 Reg0xF0;
514 	u8 Reg0xF1;
515 	u8 Reg0x16;
516 	u8 Reg0x18;
517 	u8 Reg0x19;
518 	u8 dvdd_vol;
519 	u8 dmic_sel;
520 };
521 
522 /* codec hifi mclk clock divider coefficients */
523 static const struct _coeff_div  coeff_div[] = {
524 	{32, 256000, 8000, 0x00, 0x57, 0x84, 0xD0, 0x03, 0xC1, 0xB0, 0x00, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0xFF, 0x7F, 0x01, 0x12, 0x00, 0x09, 0x19, 0x07, 2, 2},
525 	{36, 288000, 8000, 0x00, 0x55, 0x84, 0xD0, 0x01, 0xC1, 0x90, 0x00, 0x00, 0x23, 0x8F, 0xBF, 0xC0, 0x1F, 0x8F, 0x01, 0x12, 0x00, 0x09, 0x19, 0x07, 2, 2},
526 	{48, 384000, 8000, 0x02, 0x5F, 0x04, 0xC0, 0x03, 0xC1, 0xB0, 0x00, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0xFF, 0x7F, 0x01, 0x12, 0x00, 0x09, 0x19, 0x07, 2, 2},
527 	{50, 400000, 8000, 0x00, 0x75, 0x05, 0xC8, 0x01, 0xC1, 0x90, 0x00, 0x00, 0x18, 0xC7, 0xD0, 0xC0, 0x8F, 0xC7, 0x01, 0x12, 0x00, 0x09, 0x19, 0x07, 2, 0},
528 	{50, 400000, 8000, 0x00, 0x15, 0x85, 0xD0, 0x01, 0xC1, 0x90, 0x00, 0x00, 0x31, 0xC7, 0xC5, 0x00, 0x8F, 0xC7, 0x01, 0x12, 0x00, 0x09, 0x19, 0x07, 2, 1},
529 	{64, 512000, 8000, 0x00, 0x4D, 0x24, 0xC0, 0x03, 0xD1, 0xB0, 0x00, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0xFF, 0x7F, 0x01, 0x12, 0x00, 0x09, 0x19, 0x07, 2, 2},
530 	{72, 576000, 8000, 0x00, 0x45, 0x24, 0xC0, 0x01, 0xD1, 0x90, 0x00, 0x00, 0x23, 0x8F, 0xBF, 0xC0, 0x1F, 0x8F, 0x01, 0x12, 0x00, 0x09, 0x19, 0x07, 2, 2},
531 	{96, 768000, 8000, 0x02, 0x57, 0x84, 0xD0, 0x03, 0xC1, 0xB0, 0x00, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0xFF, 0x7F, 0x01, 0x12, 0x00, 0x09, 0x19, 0x07, 2, 2},
532 	{128, 1024000, 8000, 0x00, 0x45, 0x04, 0xD0, 0x03, 0xC1, 0xB0, 0x00, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0xFF, 0x7F, 0x01, 0x12, 0x00, 0x09, 0x19, 0x07, 2, 2},
533 	{192, 1536000, 8000, 0x02, 0x4D, 0x24, 0xC0, 0x03, 0xD1, 0xB0, 0x00, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0xFF, 0x7F, 0x01, 0x12, 0x00, 0x09, 0x19, 0x07, 2, 2},
534 	{256, 2048000, 8000, 0x01, 0x45, 0x04, 0xD0, 0x03, 0xC1, 0xB0, 0x00, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0xFF, 0x7F, 0x01, 0x12, 0x00, 0x09, 0x19, 0x07, 2, 2},
535 	{288, 2304000, 8000, 0x01, 0x51, 0x00, 0xC0, 0x01, 0xC1, 0x90, 0x00, 0x00, 0x23, 0x8F, 0xBF, 0xC0, 0x1F, 0x8F, 0x01, 0x12, 0x00, 0x09, 0x19, 0x07, 2, 2},
536 	{384, 3072000, 8000, 0x02, 0x45, 0x04, 0xD0, 0x03, 0xC1, 0xB0, 0x00, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0xFF, 0x7F, 0x01, 0x12, 0x00, 0x09, 0x19, 0x07, 2, 2},
537 	{512, 4096000, 8000, 0x00, 0x41, 0x04, 0xE0, 0x00, 0xD1, 0xB0, 0x00, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0xFF, 0x7F, 0x01, 0x12, 0x00, 0x09, 0x19, 0x07, 2, 2},
538 	{600, 4800000, 8000, 0x05, 0x65, 0x25, 0xF9, 0x00, 0xD1, 0x90, 0x00, 0x00, 0x18, 0xC7, 0xD0, 0xC0, 0x8F, 0xC7, 0x01, 0x12, 0x00, 0x09, 0x19, 0x07, 2, 0},
539 	{600, 4800000, 8000, 0x02, 0x24, 0x05, 0xD0, 0x00, 0xC2, 0x80, 0x00, 0x00, 0x31, 0xC7, 0xC5, 0x00, 0x8F, 0xC7, 0x01, 0x12, 0x00, 0x09, 0x19, 0x07, 2, 1},
540 	{768, 6144000, 8000, 0x05, 0x45, 0x04, 0xD0, 0x03, 0xC1, 0xB0, 0x00, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0xFF, 0x7F, 0x01, 0x12, 0x00, 0x09, 0x19, 0x07, 2, 2},
541 	{1024, 8192000, 8000, 0x01, 0x41, 0x06, 0xE0, 0x00, 0xD1, 0xB0, 0x00, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0xFF, 0x7F, 0x01, 0x12, 0x00, 0x09, 0x19, 0x07, 2, 2},
542 	{1500, 12000000, 8000, 0x0E, 0x25, 0x25, 0xE8, 0x00, 0xD1, 0x90, 0x40, 0x00, 0x31, 0xC7, 0xC5, 0x00, 0x8F, 0xC7, 0x01, 0x12, 0x00, 0x09, 0x19, 0x07, 2, 2},
543 	{1536, 12288000, 8000, 0x02, 0x41, 0x04, 0xE0, 0x00, 0xD1, 0xB0, 0x40, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0xFF, 0x7F, 0x01, 0x12, 0x00, 0x09, 0x19, 0x07, 2, 2},
544 	{1625, 13000000, 8000, 0x40, 0x6E, 0x05, 0xC8, 0x01, 0xC2, 0x90, 0x40, 0x00, 0x18, 0x95, 0xD0, 0xC0, 0x63, 0x95, 0x00, 0x12, 0x00, 0x09, 0x19, 0x07, 2, 2},
545 	{2048, 16384000, 8000, 0x03, 0x44, 0x01, 0xC0, 0x00, 0xD2, 0x80, 0x40, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0xFF, 0x7F, 0x01, 0x12, 0x00, 0x09, 0x19, 0x07, 2, 2},
546 	{2304, 18432000, 8000, 0x11, 0x45, 0x25, 0xF0, 0x00, 0xD1, 0xB0, 0x40, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0xFF, 0x7F, 0x01, 0x12, 0x00, 0x09, 0x19, 0x07, 2, 2},
547 	{2400, 19200000, 8000, 0x05, 0x14, 0x01, 0xC9, 0x00, 0xD2, 0x80, 0x80, 0x00, 0x31, 0xC7, 0xC5, 0x00, 0x8F, 0xC7, 0x01, 0x12, 0x00, 0x09, 0x19, 0x07, 2, 1},
548 	{2400, 19200000, 8000, 0x0B, 0x01, 0x00, 0xD0, 0x00, 0xD1, 0x80, 0x80, 0x00, 0x31, 0xC7, 0xC5, 0x00, 0xC7, 0xC7, 0x00, 0x12, 0x00, 0x09, 0x19, 0x07, 2, 0},
549 	{3000, 24000000, 8000, 0x0E, 0x24, 0x05, 0xD0, 0x00, 0xC2, 0x80, 0xC0, 0x00, 0x31, 0xC7, 0xC5, 0x00, 0x8F, 0xC7, 0x01, 0x12, 0x00, 0x09, 0x19, 0x07, 2, 2},
550 	{3072, 24576000, 8000, 0x05, 0x44, 0x01, 0xC0, 0x00, 0xD2, 0x80, 0x40, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0xFF, 0x7F, 0x01, 0x12, 0x00, 0x09, 0x19, 0x07, 2, 2},
551 	{3250, 26000000, 8000, 0x40, 0x15, 0x85, 0xD0, 0x01, 0xC1, 0x90, 0xC0, 0x00, 0x31, 0xC7, 0xC5, 0x00, 0x8F, 0xC7, 0x01, 0x12, 0x00, 0x09, 0x19, 0x07, 2, 1},
552 	{3250, 26000000, 8000, 0x40, 0x05, 0xA4, 0xC0, 0x00, 0xD1, 0x80, 0xC0, 0x00, 0x31, 0xC7, 0xC5, 0x00, 0xC7, 0xC7, 0x00, 0x12, 0x00, 0x09, 0x19, 0x07, 2, 0},
553 	{32, 512000, 16000, 0x00, 0x55, 0x84, 0xD0, 0x01, 0xC1, 0x90, 0x00, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0xFF, 0x7F, 0x00, 0x12, 0x00, 0x12, 0x31, 0x0E, 2, 2},
554 	{36, 576000, 16000, 0x00, 0x55, 0x84, 0xD0, 0x01, 0xC1, 0x90, 0x00, 0x00, 0x23, 0x8F, 0xBF, 0xC0, 0x1F, 0x8F, 0x01, 0x12, 0x00, 0x12, 0x31, 0x0E, 2, 2},
555 	{48, 768000, 16000, 0x02, 0x57, 0x04, 0xC0, 0x01, 0xC1, 0x90, 0x00, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0xFF, 0x7F, 0x00, 0x12, 0x00, 0x12, 0x31, 0x0E, 2, 2},
556 	{50, 800000, 16000, 0x00, 0x7E, 0x01, 0xD9, 0x00, 0xC2, 0x80, 0x00, 0x00, 0x18, 0x95, 0xD0, 0xC0, 0xC7, 0x95, 0x00, 0x12, 0x00, 0x12, 0x31, 0x0E, 2, 2},
557 	{64, 1024000, 16000, 0x00, 0x45, 0x24, 0xC0, 0x01, 0xC1, 0x90, 0x00, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0xFF, 0x7F, 0x00, 0x12, 0x00, 0x12, 0x31, 0x0E, 2, 2},
558 	{72, 1152000, 16000, 0x00, 0x45, 0x24, 0xC0, 0x01, 0xC1, 0x90, 0x00, 0x00, 0x23, 0x8F, 0xBF, 0xC0, 0x1F, 0x8F, 0x01, 0x12, 0x00, 0x12, 0x31, 0x0E, 2, 2},
559 	{96, 1536000, 16000, 0x02, 0x55, 0x84, 0xD0, 0x01, 0xC1, 0x90, 0x00, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0xFF, 0x7F, 0x00, 0x12, 0x00, 0x12, 0x31, 0x0E, 2, 2},
560 	{128, 2048000, 16000, 0x00, 0x51, 0x04, 0xD0, 0x01, 0xC1, 0x90, 0x00, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0xFF, 0x7F, 0x00, 0x12, 0x00, 0x12, 0x31, 0x0E, 2, 2},
561 	{144, 2304000, 16000, 0x00, 0x51, 0x00, 0xC0, 0x01, 0xC1, 0x90, 0x00, 0x00, 0x23, 0x8F, 0xBF, 0xC0, 0x1F, 0x8F, 0x01, 0x12, 0x00, 0x12, 0x31, 0x0E, 2, 2},
562 	{150, 2400000, 16000, 0x02, 0x7E, 0x01, 0xC9, 0x00, 0xC2, 0x80, 0x40, 0x00, 0x18, 0x95, 0xD0, 0xC0, 0xC7, 0x95, 0x00, 0x12, 0x00, 0x35, 0x91, 0x28, 2, 2},
563 	{192, 3072000, 16000, 0x02, 0x65, 0x25, 0xE0, 0x00, 0xE1, 0x90, 0x00, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0xFF, 0x7F, 0x00, 0x12, 0x00, 0x12, 0x31, 0x0E, 2, 2},
564 	{256, 4096000, 16000, 0x00, 0x41, 0x04, 0xC0, 0x01, 0xC1, 0x90, 0x00, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0xFF, 0x7F, 0x00, 0x12, 0x00, 0x12, 0x31, 0x0E, 2, 2},
565 	{300, 4800000, 16000, 0x02, 0x66, 0x01, 0xD9, 0x00, 0xC2, 0x80, 0x00, 0x00, 0x18, 0x95, 0xD0, 0xC0, 0xC7, 0x95, 0x00, 0x12, 0x00, 0x12, 0x31, 0x0E, 2, 2},
566 	{384, 6144000, 16000, 0x02, 0x51, 0x04, 0xD0, 0x01, 0xC1, 0x90, 0x00, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0xFF, 0x7F, 0x00, 0x12, 0x00, 0x12, 0x31, 0x0E, 2, 2},
567 	{512, 8192000, 16000, 0x01, 0x41, 0x04, 0xC0, 0x01, 0xC1, 0x90, 0x00, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0xFF, 0x7F, 0x00, 0x12, 0x00, 0x12, 0x31, 0x0E, 2, 2},
568 	{750, 12000000, 16000, 0x0E, 0x7E, 0x01, 0xC9, 0x00, 0xC2, 0x80, 0x40, 0x00, 0x18, 0x95, 0xD0, 0xC0, 0xC7, 0x95, 0x00, 0x12, 0x00, 0x12, 0x31, 0x0E, 2, 2},
569 	{768, 12288000, 16000, 0x02, 0x41, 0x04, 0xC0, 0x01, 0xC1, 0x90, 0x40, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0xFF, 0x7F, 0x00, 0x12, 0x00, 0x12, 0x31, 0x0E, 2, 2},
570 	{1024, 16384000, 16000, 0x03, 0x41, 0x04, 0xC0, 0x01, 0xC1, 0x90, 0x40, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0xFF, 0x7F, 0x00, 0x12, 0x00, 0x12, 0x31, 0x0E, 2, 2},
571 	{1152, 18432000, 16000, 0x08, 0x51, 0x04, 0xD0, 0x01, 0xC1, 0x90, 0x40, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0xFF, 0x7F, 0x00, 0x12, 0x00, 0x12, 0x31, 0x0E, 2, 2},
572 	{1200, 19200000, 16000, 0x0B, 0x66, 0x01, 0xD9, 0x00, 0xC2, 0x80, 0x40, 0x00, 0x18, 0x95, 0xD0, 0xC0, 0xC7, 0x95, 0x00, 0x12, 0x00, 0x12, 0x31, 0x0E, 2, 2},
573 	{1500, 24000000, 16000, 0x0E, 0x26, 0x01, 0xD9, 0x00, 0xC2, 0x80, 0xC0, 0x00, 0x18, 0x95, 0xD0, 0xC0, 0xC7, 0x95, 0x00, 0x12, 0x00, 0x12, 0x31, 0x0E, 2, 2},
574 	{1536, 24576000, 16000, 0x05, 0x41, 0x04, 0xC0, 0x01, 0xC1, 0x90, 0xC0, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0xFF, 0x7F, 0x00, 0x12, 0x00, 0x12, 0x31, 0x0E, 2, 2},
575 	{1625, 26000000, 16000, 0x40, 0x6E, 0x05, 0xC8, 0x01, 0xC2, 0x90, 0xC0, 0x00, 0x18, 0x95, 0xD0, 0xC0, 0x63, 0x95, 0x00, 0x12, 0x00, 0x12, 0x31, 0x0E, 2, 2},
576 	{800, 19200000, 24000, 0x07, 0x66, 0x01, 0xD9, 0x00, 0xC2, 0x80, 0x40, 0x00, 0x18, 0x95, 0xD0, 0xC0, 0xC7, 0x95, 0x00, 0x12, 0x00, 0x1A, 0x49, 0x14, 2, 2},
577 	{375, 12000000, 32000, 0x0E, 0x2E, 0x05, 0xC8, 0x00, 0xC2, 0x80, 0x40, 0x01, 0x18, 0x95, 0xD0, 0xC0, 0x63, 0x95, 0x00, 0x12, 0x00, 0x23, 0x61, 0x1B, 2, 0},
578 	{600, 19200000, 32000, 0x05, 0x46, 0x01, 0xD8, 0x10, 0xC2, 0x80, 0x40, 0x00, 0x18, 0x95, 0xD0, 0xC0, 0x63, 0x95, 0x00, 0x12, 0x00, 0x23, 0x61, 0x1B, 2, 2},
579 	{32, 1411200, 44100, 0x00, 0x45, 0xA4, 0xD0, 0x10, 0xC1, 0x80, 0x00, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0x7F, 0x7F, 0x00, 0x12, 0x00, 0x35, 0x91, 0x28, 2, 2},
580 	{64, 2822400, 44100, 0x00, 0x51, 0x00, 0xC0, 0x10, 0xC1, 0x80, 0x00, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0x7F, 0x7F, 0x00, 0x12, 0x00, 0x35, 0x91, 0x28, 2, 2},
581 	{128, 5644800, 44100, 0x00, 0x41, 0x04, 0xD0, 0x10, 0xC1, 0x80, 0x00, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0x7F, 0x7F, 0x00, 0x12, 0x00, 0x35, 0x91, 0x28, 2, 2},
582 	{256, 11289600, 44100, 0x01, 0x41, 0x04, 0xD0, 0x10, 0xC1, 0x80, 0x40, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0x7F, 0x7F, 0x00, 0x12, 0x00, 0x35, 0x91, 0x28, 2, 2},
583 	{512, 22579200, 44100, 0x03, 0x41, 0x04, 0xD0, 0x10, 0xC1, 0x80, 0xC0, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0x7F, 0x7F, 0x00, 0x12, 0x00, 0x35, 0x91, 0x28, 2, 2},
584 	{32, 1536000, 48000, 0x00, 0x45, 0xA4, 0xD0, 0x10, 0xC1, 0x80, 0x00, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0x7F, 0x7F, 0x00, 0x12, 0x00, 0x35, 0x91, 0x28, 2, 2},
585 	{48, 2304000, 48000, 0x02, 0x55, 0x04, 0xC0, 0x10, 0xC1, 0x80, 0x00, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0x7F, 0x7F, 0x00, 0x12, 0x00, 0x35, 0x91, 0x28, 2, 2},
586 	{50, 2400000, 48000, 0x00, 0x76, 0x01, 0xC8, 0x10, 0xC2, 0x80, 0x00, 0x00, 0x18, 0x95, 0xD0, 0xC0, 0x63, 0x95, 0x00, 0x12, 0x00, 0x35, 0x91, 0x28, 2, 2},
587 	{64, 3072000, 48000, 0x00, 0x51, 0x04, 0xC0, 0x10, 0xC1, 0x80, 0x00, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0x7F, 0x7F, 0x00, 0x12, 0x00, 0x35, 0x91, 0x28, 2, 2},
588 	{100, 4800000, 48000, 0x00, 0x46, 0x01, 0xD8, 0x10, 0xC2, 0x80, 0x00, 0x00, 0x18, 0x95, 0xD0, 0xC0, 0x63, 0x95, 0x00, 0x12, 0x00, 0x35, 0x91, 0x28, 2, 2},
589 	{125, 6000000, 48000, 0x04, 0x6E, 0x05, 0xC8, 0x10, 0xC2, 0x80, 0x00, 0x01, 0x18, 0x95, 0xD0, 0xC0, 0x63, 0x95, 0x00, 0x12, 0x00, 0x35, 0x91, 0x28, 2, 2},
590 	{128, 6144000, 48000, 0x00, 0x41, 0x04, 0xD0, 0x10, 0xC1, 0x80, 0x00, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0x7F, 0x7F, 0x00, 0x12, 0x00, 0x35, 0x91, 0x28, 2, 2},
591 	{200, 9600000, 48000, 0x01, 0x46, 0x01, 0xD8, 0x10, 0xC2, 0x80, 0x00, 0x00, 0x18, 0x95, 0xD0, 0xC0, 0x63, 0x95, 0x00, 0x12, 0x00, 0x35, 0x91, 0x28, 2, 2},
592 	{250, 12000000, 48000, 0x04, 0x76, 0x01, 0xC8, 0x10, 0xC2, 0x80, 0x40, 0x00, 0x18, 0x95, 0xD0, 0xC0, 0x63, 0x95, 0x00, 0x12, 0x00, 0x35, 0x91, 0x28, 2, 2},
593 	{256, 12288000, 48000, 0x01, 0x41, 0x04, 0xD0, 0x10, 0xC1, 0x80, 0x40, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0x7F, 0x7F, 0x00, 0x12, 0x00, 0x35, 0x91, 0x28, 2, 2},
594 	{384, 18432000, 48000, 0x02, 0x41, 0x04, 0xD0, 0x10, 0xC1, 0x80, 0x40, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0x7F, 0x7F, 0x00, 0x12, 0x00, 0x35, 0x91, 0x28, 2, 2},
595 	{400, 19200000, 48000, 0x03, 0x46, 0x01, 0xD8, 0x10, 0xC2, 0x80, 0x40, 0x00, 0x18, 0x95, 0xD0, 0xC0, 0x63, 0x95, 0x00, 0x12, 0x00, 0x35, 0x91, 0x28, 2, 2},
596 	{500, 24000000, 48000, 0x04, 0x46, 0x01, 0xD8, 0x10, 0xC2, 0x80, 0xC0, 0x00, 0x18, 0x95, 0xD0, 0xC0, 0x63, 0x95, 0x00, 0x12, 0x00, 0x35, 0x91, 0x28, 2, 2},
597 	{512, 24576000, 48000, 0x03, 0x41, 0x04, 0xD0, 0x10, 0xC1, 0x80, 0xC0, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0x7F, 0x7F, 0x00, 0x12, 0x00, 0x35, 0x91, 0x28, 2, 2},
598 	{800, 38400000, 48000, 0x18, 0x45, 0x04, 0xC0, 0x10, 0xC1, 0x80, 0xC0, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0x7F, 0x7F, 0x00, 0x12, 0x00, 0x35, 0x91, 0x28, 2, 2},
599 	{128, 11289600, 88200, 0x00, 0x50, 0x00, 0xC0, 0x10, 0xC1, 0x80, 0x40, 0x00, 0x9F, 0x7F, 0xBF, 0xC0, 0x7F, 0x7F, 0x80, 0x12, 0xC0, 0x32, 0x89, 0x25, 2, 2},
600 	{64, 6144000, 96000, 0x00, 0x41, 0x00, 0xD0, 0x10, 0xC1, 0x80, 0x00, 0x00, 0x9F, 0x7F, 0xBF, 0xC0, 0x7F, 0x7F, 0x80, 0x12, 0xC0, 0x35, 0x91, 0x28, 2, 2},
601 	{96, 9216000, 96000, 0x02, 0x43, 0x00, 0xC0, 0x10, 0xC0, 0x80, 0x00, 0x00, 0x9F, 0x7F, 0xBF, 0xC0, 0x7F, 0x7F, 0x80, 0x12, 0xC0, 0x35, 0x91, 0x28, 2, 2},
602 	{256, 24576000, 96000, 0x00, 0x40, 0x00, 0xC0, 0x10, 0xC1, 0x80, 0xC0, 0x00, 0x9F, 0x7F, 0xBF, 0xC0, 0x7F, 0x7F, 0x80, 0x12, 0xC0, 0x35, 0x91, 0x28, 2, 2},
603 	{128, 24576000, 192000, 0x00, 0x50, 0x00, 0xC0, 0x18, 0xC1, 0x81, 0xC0, 0x00, 0x8F, 0x7F, 0xBF, 0xC0, 0x3F, 0x7F, 0x80, 0x12, 0xC0, 0x3F, 0xF9, 0x3F, 2, 2},
604 	{64, 12288000, 192000, 0x00, 0x41, 0x00, 0xC0, 0x18, 0xC1, 0x80, 0x00, 0x00, 0x8F, 0x7F, 0xEF, 0xC0, 0x7F, 0x7F, 0x80, 0x12, 0xC0, 0x3F, 0xF9, 0x3F, 1, 0},
605 };
606 
607 static inline int get_coeff(u8 vddd, u8 dmic, int mclk, int rate)
608 {
609 	int i;
610 	u8 dmic_det, vddd_det;
611 
612 	for (i = 0; i < ARRAY_SIZE(coeff_div); i++) {
613 		if (coeff_div[i].rate == rate && coeff_div[i].mclk == mclk) {
614 			vddd_det = ~(coeff_div[i].dvdd_vol ^ vddd) & 0x01;
615 			dmic_det = ~(coeff_div[i].dmic_sel ^ dmic) & 0x01;
616 			vddd_det |= ~(coeff_div[i].dvdd_vol % 2) & 0x01;
617 			dmic_det |= ~(coeff_div[i].dmic_sel % 2) & 0x01;
618 
619 			if (vddd_det && dmic_det)
620 				return i;
621 		}
622 	}
623 
624 	return -EINVAL;
625 }
626 
627 /*
628  * if PLL not be used, use internal clk1 for mclk,otherwise, use internal clk2 for PLL source.
629  */
630 static int es8389_set_dai_sysclk(struct snd_soc_dai *dai,
631 			int clk_id, unsigned int freq, int dir)
632 {
633 	struct snd_soc_component *component = dai->component;
634 	struct es8389_private *es8389 = snd_soc_component_get_drvdata(component);
635 
636 	es8389->sysclk = freq;
637 
638 	return 0;
639 }
640 
641 static int es8389_set_tdm_slot(struct snd_soc_dai *dai,
642 	unsigned int tx_mask, unsigned int rx_mask, int slots, int slot_width)
643 {
644 	struct snd_soc_component *component = dai->component;
645 	struct es8389_private *es8389 = snd_soc_component_get_drvdata(component);
646 
647 	regmap_update_bits(es8389->regmap, ES8389_PTDM_SLOT,
648 				ES8389_TDM_SLOT, (slots << ES8389_TDM_SHIFT));
649 	regmap_update_bits(es8389->regmap, ES8389_DAC_RAMP,
650 				ES8389_TDM_SLOT, (slots << ES8389_TDM_SHIFT));
651 
652 	return 0;
653 }
654 
655 static int es8389_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
656 {
657 	struct snd_soc_component *component = dai->component;
658 	struct es8389_private *es8389 = snd_soc_component_get_drvdata(component);
659 	u8 state = 0;
660 
661 	switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) {
662 	case SND_SOC_DAIFMT_CBC_CFP:
663 		regmap_update_bits(es8389->regmap, ES8389_MASTER_MODE,
664 				ES8389_MASTER_MODE_EN, ES8389_MASTER_MODE_EN);
665 		es8389->mastermode = 1;
666 		break;
667 	case SND_SOC_DAIFMT_CBC_CFC:
668 		es8389->mastermode = 0;
669 		break;
670 	default:
671 		return -EINVAL;
672 	}
673 
674 	switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
675 	case SND_SOC_DAIFMT_I2S:
676 		state |= ES8389_DAIFMT_I2S;
677 		break;
678 	case SND_SOC_DAIFMT_RIGHT_J:
679 		dev_err(component->dev, "component driver does not support right justified\n");
680 		return -EINVAL;
681 	case SND_SOC_DAIFMT_LEFT_J:
682 		state |= ES8389_DAIFMT_LEFT_J;
683 		break;
684 	case SND_SOC_DAIFMT_DSP_A:
685 		state |= ES8389_DAIFMT_DSP_A;
686 		break;
687 	case SND_SOC_DAIFMT_DSP_B:
688 		state |= ES8389_DAIFMT_DSP_B;
689 		break;
690 	default:
691 		break;
692 	}
693 	regmap_update_bits(es8389->regmap, ES8389_ADC_FORMAT_MUTE, ES8389_DAIFMT_MASK, state);
694 	regmap_update_bits(es8389->regmap, ES8389_DAC_FORMAT_MUTE, ES8389_DAIFMT_MASK, state);
695 
696 	return 0;
697 }
698 
699 static int es8389_pcm_hw_params(struct snd_pcm_substream *substream,
700 			struct snd_pcm_hw_params *params,
701 			struct snd_soc_dai *dai)
702 {
703 	struct snd_soc_component *component = dai->component;
704 	struct es8389_private *es8389 = snd_soc_component_get_drvdata(component);
705 	int coeff, ret;
706 	u8 dmic_enable, state = 0;
707 	unsigned int regv;
708 	u32 freq;
709 	bool hpf;
710 
711 	switch (params_format(params)) {
712 	case SNDRV_PCM_FORMAT_S16_LE:
713 		state |= ES8389_S16_LE;
714 		break;
715 	case SNDRV_PCM_FORMAT_S20_3LE:
716 		state |= ES8389_S20_3_LE;
717 		break;
718 	case SNDRV_PCM_FORMAT_S18_3LE:
719 		state |= ES8389_S18_LE;
720 		break;
721 	case SNDRV_PCM_FORMAT_S24_LE:
722 		state |= ES8389_S24_LE;
723 		break;
724 	case SNDRV_PCM_FORMAT_S32_LE:
725 		state |= ES8389_S32_LE;
726 		break;
727 	default:
728 		return -EINVAL;
729 	}
730 
731 	regmap_update_bits(es8389->regmap, ES8389_ADC_FORMAT_MUTE, ES8389_DATA_LEN_MASK, state);
732 	regmap_update_bits(es8389->regmap, ES8389_DAC_FORMAT_MUTE, ES8389_DATA_LEN_MASK, state);
733 
734 	if (es8389->mclk_src == ES8389_SCLK_PIN) {
735 		regmap_update_bits(es8389->regmap, ES8389_MASTER_CLK,
736 					ES8389_MCLK_MASK, ES8389_MCLK_FROM_SCLK);
737 		es8389->sysclk = params_channels(params) * params_width(params) * params_rate(params);
738 	}
739 
740 	regmap_read(es8389->regmap, ES8389_DMIC_EN, &regv);
741 	dmic_enable = regv >> 7 & 0x01;
742 
743 	ret = regulator_get_voltage(es8389->core_supply[ES8389_SUPPLY_VD].consumer);
744 	switch (ret) {
745 	case 1800000 ... 2000000:
746 		es8389->vddd = ES8389_1V8;
747 		break;
748 	case 2500000 ... 3300000:
749 		es8389->vddd = ES8389_3V3;
750 		break;
751 	default:
752 		es8389->vddd = ES8389_3V3;
753 		break;
754 	}
755 
756 	coeff = get_coeff(es8389->vddd, dmic_enable, es8389->sysclk, params_rate(params));
757 	if (coeff >= 0) {
758 		regmap_write(es8389->regmap, ES8389_CLK_DIV1, coeff_div[coeff].Reg0x04);
759 		regmap_write(es8389->regmap, ES8389_CLK_MUL, coeff_div[coeff].Reg0x05);
760 		regmap_write(es8389->regmap, ES8389_CLK_MUX1, coeff_div[coeff].Reg0x06);
761 		regmap_write(es8389->regmap, ES8389_CLK_MUX2, coeff_div[coeff].Reg0x07);
762 		regmap_write(es8389->regmap, ES8389_CLK_CTL1, coeff_div[coeff].Reg0x08);
763 		regmap_write(es8389->regmap, ES8389_CLK_CTL2, coeff_div[coeff].Reg0x09);
764 		regmap_write(es8389->regmap, ES8389_CLK_CTL3, coeff_div[coeff].Reg0x0A);
765 		regmap_update_bits(es8389->regmap, ES8389_OSC_CLK,
766 						0xC0, coeff_div[coeff].Reg0x0F);
767 		regmap_write(es8389->regmap, ES8389_CLK_DIV2, coeff_div[coeff].Reg0x11);
768 		regmap_write(es8389->regmap, ES8389_ADC_OSR, coeff_div[coeff].Reg0x21);
769 		regmap_write(es8389->regmap, ES8389_ADC_DSP, coeff_div[coeff].Reg0x22);
770 		regmap_write(es8389->regmap, ES8389_OSR_VOL, coeff_div[coeff].Reg0x26);
771 		regmap_update_bits(es8389->regmap, ES8389_SYSTEM30,
772 						0xC0, coeff_div[coeff].Reg0x30);
773 		regmap_write(es8389->regmap, ES8389_DAC_DSM_OSR, coeff_div[coeff].Reg0x41);
774 		regmap_write(es8389->regmap, ES8389_DAC_DSP_OSR, coeff_div[coeff].Reg0x42);
775 		regmap_update_bits(es8389->regmap, ES8389_DAC_MISC,
776 						0x81, coeff_div[coeff].Reg0x43);
777 		regmap_update_bits(es8389->regmap, ES8389_CHIP_MISC,
778 						0x72, coeff_div[coeff].Reg0xF0);
779 		regmap_write(es8389->regmap, ES8389_CSM_STATE1, coeff_div[coeff].Reg0xF1);
780 		regmap_write(es8389->regmap, ES8389_SYSTEM16, coeff_div[coeff].Reg0x16);
781 		regmap_write(es8389->regmap, ES8389_SYSTEM18, coeff_div[coeff].Reg0x18);
782 		regmap_write(es8389->regmap, ES8389_SYSTEM19, coeff_div[coeff].Reg0x19);
783 	} else {
784 		dev_warn(component->dev, "Clock coefficients do not match");
785 	}
786 
787 	if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
788 		es8389->capture_rate = params_rate(params);
789 		freq = (es8389->hpf_freq * 48000) / params_rate(params);
790 		hpf = find_best_hpf_freq(freq, &es8389->hpfl, &es8389->hpfr);
791 		if (!hpf) {
792 			dev_err(component->dev, "The HPF frequency is invalid\n");
793 			return -EINVAL;
794 		}
795 	}
796 
797 	return 0;
798 }
799 
800 static int es8389_pcm_hw_free(struct snd_pcm_substream *substream,
801 		struct snd_soc_dai *dai)
802 {
803 	struct snd_soc_component *component = dai->component;
804 	struct es8389_private *es8389 = snd_soc_component_get_drvdata(component);
805 
806 	if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
807 		es8389->capture_rate = 0;
808 
809 	return 0;
810 }
811 
812 static void es8389_standby(struct snd_soc_component *component)
813 {
814 	struct es8389_private *es8389 = snd_soc_component_get_drvdata(component);
815 
816 	regmap_update_bits(es8389->regmap, ES8389_ADC_HPF1, 0x0f, 0x04);
817 	regmap_update_bits(es8389->regmap, ES8389_ADC_HPF2, 0x0f, 0x04);
818 	regmap_write(es8389->regmap, ES8389_CSM_JUMP, 0xD4);
819 	usleep_range(70000, 72000);
820 	regmap_write(es8389->regmap, ES8389_ANA_CTL1, 0x59);
821 	regmap_write(es8389->regmap, ES8389_ADC_EN, 0x00);
822 	regmap_write(es8389->regmap, ES8389_CLK_OFF1, 0x00);
823 	regmap_write(es8389->regmap, ES8389_RESET, 0x3E);
824 	regmap_update_bits(es8389->regmap, ES8389_DAC_INV, 0x80, 0x80);
825 	usleep_range(8000, 8500);
826 	regmap_update_bits(es8389->regmap, ES8389_DAC_INV, 0x80, 0x00);
827 }
828 
829 static int es8389_set_bias_level(struct snd_soc_component *component,
830 			enum snd_soc_bias_level level)
831 {
832 	int ret;
833 	struct es8389_private *es8389 = snd_soc_component_get_drvdata(component);
834 
835 	switch (level) {
836 	case SND_SOC_BIAS_ON:
837 		ret = clk_prepare_enable(es8389->mclk);
838 		if (ret)
839 			return ret;
840 
841 		regmap_update_bits(es8389->regmap, ES8389_HPSW, 0x20, 0x20);
842 		regmap_write(es8389->regmap, ES8389_ANA_CTL1, 0xD9);
843 		regmap_write(es8389->regmap, ES8389_ADC_EN, 0x8F);
844 		regmap_write(es8389->regmap, ES8389_CSM_JUMP, 0xE4);
845 		regmap_write(es8389->regmap, ES8389_RESET, 0x01);
846 		regmap_write(es8389->regmap, ES8389_CLK_OFF1, 0xC3);
847 		break;
848 	case SND_SOC_BIAS_PREPARE:
849 		break;
850 	case SND_SOC_BIAS_STANDBY:
851 		es8389_standby(component);
852 		clk_disable_unprepare(es8389->mclk);
853 		break;
854 	case SND_SOC_BIAS_OFF:
855 		break;
856 	}
857 	return 0;
858 }
859 
860 
861 
862 static int es8389_mute(struct snd_soc_dai *dai, int mute, int direction)
863 {
864 	struct snd_soc_component *component = dai->component;
865 	struct es8389_private *es8389 = snd_soc_component_get_drvdata(component);
866 	unsigned int regv;
867 
868 	if (mute) {
869 		if (direction == SNDRV_PCM_STREAM_PLAYBACK) {
870 			regmap_update_bits(es8389->regmap, ES8389_DAC_FORMAT_MUTE,
871 						0x03, 0x03);
872 		} else {
873 			regmap_update_bits(es8389->regmap, ES8389_ADC_FORMAT_MUTE,
874 						0x03, 0x03);
875 		}
876 	} else {
877 		regmap_read(es8389->regmap, ES8389_CSM_STATE1, &regv);
878 		if (regv != ES8389_STATE_ON) {
879 			regmap_update_bits(es8389->regmap, ES8389_HPSW, 0x20, 0x20);
880 			regmap_write(es8389->regmap, ES8389_ANA_CTL1, 0xD9);
881 			regmap_write(es8389->regmap, ES8389_ADC_EN, 0x8F);
882 			regmap_write(es8389->regmap, ES8389_CSM_JUMP, 0xE4);
883 			regmap_write(es8389->regmap, ES8389_RESET, 0x01);
884 			regmap_write(es8389->regmap, ES8389_CLK_OFF1, 0xC3);
885 		}
886 
887 		if (direction == SNDRV_PCM_STREAM_PLAYBACK) {
888 			if (!es8389->version) {
889 				regmap_write(es8389->regmap, ES8389_DAC_RESET, 0X00);
890 				usleep_range(70000, 72000);
891 			}
892 			regmap_update_bits(es8389->regmap, ES8389_DAC_FORMAT_MUTE,
893 						0x03, 0x00);
894 		} else {
895 			regmap_update_bits(es8389->regmap, ES8389_ADC_HPF1, 0x0f, es8389->hpfl);
896 			regmap_update_bits(es8389->regmap, ES8389_ADC_HPF2, 0x0f, es8389->hpfr);
897 			regmap_update_bits(es8389->regmap, ES8389_ADC_FORMAT_MUTE,
898 						0x03, 0x00);
899 		}
900 	}
901 
902 	return 0;
903 }
904 
905 #define es8389_RATES SNDRV_PCM_RATE_8000_96000
906 
907 #define es8389_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
908 		SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_FMTBIT_S32_LE)
909 
910 static const u64 es8389_selectable_formats =
911 	SND_SOC_POSSIBLE_DAIFMT_I2S	|
912 	SND_SOC_POSSIBLE_DAIFMT_RIGHT_J	|
913 	SND_SOC_POSSIBLE_DAIFMT_LEFT_J	|
914 	SND_SOC_POSSIBLE_DAIFMT_DSP_A	|
915 	SND_SOC_POSSIBLE_DAIFMT_DSP_B;
916 
917 static const struct snd_soc_dai_ops es8389_ops = {
918 	.hw_params = es8389_pcm_hw_params,
919 	.hw_free = es8389_pcm_hw_free,
920 	.set_fmt = es8389_set_dai_fmt,
921 	.set_sysclk = es8389_set_dai_sysclk,
922 	.set_tdm_slot = es8389_set_tdm_slot,
923 	.mute_stream = es8389_mute,
924 	.auto_selectable_formats = &es8389_selectable_formats,
925 	.num_auto_selectable_formats = 1,
926 };
927 
928 static struct snd_soc_dai_driver es8389_dai = {
929 	.name = "ES8389 HiFi",
930 	.playback = {
931 		.stream_name = "Playback",
932 		.channels_min = 1,
933 		.channels_max = 2,
934 		.rates = es8389_RATES,
935 		.formats = es8389_FORMATS,
936 	},
937 	.capture = {
938 		.stream_name = "Capture",
939 		.channels_min = 1,
940 		.channels_max = 2,
941 		.rates = es8389_RATES,
942 		.formats = es8389_FORMATS,
943 	},
944 	.ops = &es8389_ops,
945 	.symmetric_rate = 1,
946 };
947 
948 static void es8389_init(struct snd_soc_component *component)
949 {
950 	struct es8389_private *es8389 = snd_soc_component_get_drvdata(component);
951 	unsigned int reg;
952 
953 	regmap_read(es8389->regmap, ES8389_MAX_REGISTER, &reg);
954 	es8389->version = reg;
955 	regmap_write(es8389->regmap, ES8389_ISO_CTL, 0x56);
956 	regmap_write(es8389->regmap, ES8389_RESET, 0x7E);
957 	regmap_write(es8389->regmap, ES8389_ISO_CTL, 0x38);
958 	regmap_write(es8389->regmap, ES8389_ADC_HPF1, 0x64);
959 	regmap_write(es8389->regmap, ES8389_ADC_HPF2, 0x04);
960 	regmap_write(es8389->regmap, ES8389_DAC_INV, 0x03);
961 
962 	regmap_write(es8389->regmap, ES8389_VMID, 0x2A);
963 	regmap_write(es8389->regmap, ES8389_ANA_CTL1, 0xC9);
964 	regmap_write(es8389->regmap, ES8389_ANA_VSEL, 0x4F);
965 	regmap_write(es8389->regmap, ES8389_ANA_CTL2, 0x06);
966 	regmap_write(es8389->regmap, ES8389_LOW_POWER1, 0x00);
967 	regmap_write(es8389->regmap, ES8389_DMIC_EN, 0x16);
968 
969 	regmap_write(es8389->regmap, ES8389_PGA_SW, 0xAA);
970 	regmap_write(es8389->regmap, ES8389_MOD_SW1, 0x66);
971 	regmap_write(es8389->regmap, ES8389_MOD_SW2, 0x99);
972 	regmap_write(es8389->regmap, ES8389_ADC_MODE, (0x00 | ES8389_TDM_MODE));
973 	regmap_update_bits(es8389->regmap, ES8389_DMIC_EN, 0xC0, 0x00);
974 	regmap_update_bits(es8389->regmap, ES8389_ADC_MODE, 0x03, 0x00);
975 
976 	regmap_update_bits(es8389->regmap, ES8389_MIC1_GAIN,
977 					ES8389_MIC_SEL_MASK, ES8389_MIC_DEFAULT);
978 	regmap_update_bits(es8389->regmap, ES8389_MIC2_GAIN,
979 					ES8389_MIC_SEL_MASK, ES8389_MIC_DEFAULT);
980 	regmap_write(es8389->regmap, ES8389_CSM_JUMP, 0xC4);
981 	regmap_write(es8389->regmap, ES8389_MASTER_MODE, 0x08);
982 	regmap_write(es8389->regmap, ES8389_CSM_STATE1, 0x00);
983 	regmap_write(es8389->regmap, ES8389_SYSTEM12, 0x01);
984 	regmap_write(es8389->regmap, ES8389_SYSTEM13, 0x01);
985 	regmap_write(es8389->regmap, ES8389_SYSTEM14, 0x01);
986 	regmap_write(es8389->regmap, ES8389_SYSTEM15, 0x01);
987 	regmap_write(es8389->regmap, ES8389_SYSTEM16, 0x35);
988 	regmap_write(es8389->regmap, ES8389_SYSTEM17, 0x09);
989 	regmap_write(es8389->regmap, ES8389_SYSTEM18, 0x91);
990 	regmap_write(es8389->regmap, ES8389_SYSTEM19, 0x28);
991 	regmap_write(es8389->regmap, ES8389_SYSTEM1A, 0x01);
992 	regmap_write(es8389->regmap, ES8389_SYSTEM1B, 0x01);
993 	regmap_write(es8389->regmap, ES8389_SYSTEM1C, 0x11);
994 
995 	regmap_write(es8389->regmap, ES8389_CHIP_MISC, 0x13);
996 	regmap_write(es8389->regmap, ES8389_MASTER_CLK, 0x00);
997 	regmap_write(es8389->regmap, ES8389_CLK_DIV1, 0x00);
998 	regmap_write(es8389->regmap, ES8389_CLK_MUL, 0x10);
999 	regmap_write(es8389->regmap, ES8389_CLK_MUX1, 0x00);
1000 	regmap_write(es8389->regmap, ES8389_CLK_MUX2, 0xC0);
1001 	regmap_write(es8389->regmap, ES8389_CLK_CTL1, 0x00);
1002 	regmap_write(es8389->regmap, ES8389_CLK_CTL2, 0xC0);
1003 	regmap_write(es8389->regmap, ES8389_CLK_CTL3, 0x80);
1004 	regmap_write(es8389->regmap, ES8389_SCLK_DIV, 0x04);
1005 	regmap_write(es8389->regmap, ES8389_LRCK_DIV1, 0x01);
1006 	regmap_write(es8389->regmap, ES8389_LRCK_DIV2, 0x00);
1007 	regmap_write(es8389->regmap, ES8389_OSC_CLK, 0x10);
1008 	regmap_write(es8389->regmap, ES8389_ADC_OSR, 0x1F);
1009 	regmap_write(es8389->regmap, ES8389_ADC_DSP, 0x7F);
1010 	regmap_write(es8389->regmap, ES8389_ADC_MUTE, 0xC0);
1011 	regmap_write(es8389->regmap, ES8389_SYSTEM30, 0xF4);
1012 	regmap_write(es8389->regmap, ES8389_DAC_DSM_OSR, 0x7F);
1013 	regmap_write(es8389->regmap, ES8389_DAC_DSP_OSR, 0x7F);
1014 	regmap_write(es8389->regmap, ES8389_DAC_MISC, 0x10);
1015 	regmap_write(es8389->regmap, ES8389_DAC_RAMP, 0x0F);
1016 	regmap_write(es8389->regmap, ES8389_SYSTEM4C, 0xC0);
1017 	regmap_write(es8389->regmap, ES8389_RESET, 0x00);
1018 	regmap_write(es8389->regmap, ES8389_CLK_OFF1, 0xC1);
1019 	regmap_write(es8389->regmap, ES8389_RESET, 0x01);
1020 	regmap_write(es8389->regmap, ES8389_DAC_RESET, 0x02);
1021 
1022 	regmap_update_bits(es8389->regmap, ES8389_ADC_FORMAT_MUTE, 0x03, 0x03);
1023 	regmap_update_bits(es8389->regmap, ES8389_DAC_FORMAT_MUTE, 0x03, 0x03);
1024 }
1025 
1026 static int es8389_suspend(struct snd_soc_component *component)
1027 {
1028 	struct es8389_private *es8389 = snd_soc_component_get_drvdata(component);
1029 
1030 	es8389_standby(component);
1031 	regcache_cache_only(es8389->regmap, true);
1032 	regcache_mark_dirty(es8389->regmap);
1033 
1034 	return 0;
1035 }
1036 
1037 static int es8389_resume(struct snd_soc_component *component)
1038 {
1039 	struct es8389_private *es8389 = snd_soc_component_get_drvdata(component);
1040 	unsigned int regv;
1041 	int ret;
1042 
1043 	regcache_cache_only(es8389->regmap, false);
1044 	regcache_cache_bypass(es8389->regmap, true);
1045 	ret = regmap_read(es8389->regmap, ES8389_RESET, &regv);
1046 	if (ret)
1047 		goto disable_bypass;
1048 
1049 	if (regv == 0xff) {
1050 		es8389_init(component);
1051 	} else {
1052 		ret = es8389_set_bias_level(component, SND_SOC_BIAS_ON);
1053 		if (ret)
1054 			goto disable_bypass;
1055 	}
1056 
1057 disable_bypass:
1058 	regcache_cache_bypass(es8389->regmap, false);
1059 	if (ret)
1060 		return ret;
1061 
1062 	return regcache_sync(es8389->regmap);
1063 }
1064 
1065 static int es8389_probe(struct snd_soc_component *component)
1066 {
1067 	int ret;
1068 	struct es8389_private *es8389 = snd_soc_component_get_drvdata(component);
1069 
1070 	ret = device_property_read_u8(component->dev, "everest,mclk-src", &es8389->mclk_src);
1071 	if (ret != 0) {
1072 		dev_dbg(component->dev, "mclk-src return %d", ret);
1073 		es8389->mclk_src = ES8389_MCLK_SOURCE;
1074 	}
1075 
1076 	ret = clk_prepare_enable(es8389->mclk);
1077 	if (ret) {
1078 		dev_err(component->dev, "%s, unable to enable mclk\n", __func__);
1079 		return ret;
1080 	}
1081 
1082 	ret = regulator_bulk_enable(ARRAY_SIZE(es8389_core_supplies), es8389->core_supply);
1083 	if (ret) {
1084 		dev_err(component->dev, "Failed to enable core supplies: %d\n", ret);
1085 		clk_disable_unprepare(es8389->mclk);
1086 		return ret;
1087 	}
1088 
1089 	es8389->hpf_freq = ES8389_HPF_DEFAULT;
1090 	es8389_init(component);
1091 	es8389_standby(component);
1092 
1093 	return 0;
1094 }
1095 
1096 static void es8389_remove(struct snd_soc_component *component)
1097 {
1098 	struct es8389_private *es8389 = snd_soc_component_get_drvdata(component);
1099 
1100 	regmap_write(es8389->regmap, ES8389_MASTER_MODE, 0x28);
1101 	regmap_write(es8389->regmap, ES8389_HPSW, 0x00);
1102 	regmap_write(es8389->regmap, ES8389_VMID, 0x00);
1103 	regmap_write(es8389->regmap, ES8389_RESET, 0x00);
1104 	regmap_write(es8389->regmap, ES8389_CSM_JUMP, 0xCC);
1105 	usleep_range(500000, 550000);//500MS
1106 	regmap_write(es8389->regmap, ES8389_CSM_JUMP, 0x00);
1107 	regmap_write(es8389->regmap, ES8389_ANA_CTL1, 0x08);
1108 	regmap_write(es8389->regmap, ES8389_ISO_CTL, 0xC1);
1109 	regmap_write(es8389->regmap, ES8389_PULL_DOWN, 0x00);
1110 
1111 }
1112 
1113 static const struct snd_soc_component_driver soc_codec_dev_es8389 = {
1114 	.probe = es8389_probe,
1115 	.remove = es8389_remove,
1116 	.suspend = es8389_suspend,
1117 	.resume = es8389_resume,
1118 	.set_bias_level = es8389_set_bias_level,
1119 
1120 	.controls = es8389_snd_controls,
1121 	.num_controls = ARRAY_SIZE(es8389_snd_controls),
1122 	.dapm_widgets = es8389_dapm_widgets,
1123 	.num_dapm_widgets = ARRAY_SIZE(es8389_dapm_widgets),
1124 	.dapm_routes = es8389_dapm_routes,
1125 	.num_dapm_routes = ARRAY_SIZE(es8389_dapm_routes),
1126 	.idle_bias_on = 1,
1127 	.use_pmdown_time = 1,
1128 };
1129 
1130 static const struct regmap_config es8389_regmap = {
1131 	.reg_bits = 8,
1132 	.val_bits = 8,
1133 
1134 	.max_register = ES8389_MAX_REGISTER,
1135 
1136 	.volatile_reg = es8389_volatile_register,
1137 	.cache_type = REGCACHE_MAPLE,
1138 };
1139 
1140 static void es8389_i2c_shutdown(struct i2c_client *i2c)
1141 {
1142 	struct es8389_private *es8389;
1143 
1144 	es8389 = i2c_get_clientdata(i2c);
1145 
1146 	regmap_write(es8389->regmap, ES8389_MASTER_MODE, 0x28);
1147 	regmap_write(es8389->regmap, ES8389_HPSW, 0x00);
1148 	regmap_write(es8389->regmap, ES8389_VMID, 0x00);
1149 	regmap_write(es8389->regmap, ES8389_RESET, 0x00);
1150 	regmap_write(es8389->regmap, ES8389_CSM_JUMP, 0xCC);
1151 	usleep_range(500000, 550000);//500MS
1152 	regmap_write(es8389->regmap, ES8389_CSM_JUMP, 0x00);
1153 	regmap_write(es8389->regmap, ES8389_ANA_CTL1, 0x08);
1154 	regmap_write(es8389->regmap, ES8389_ISO_CTL, 0xC1);
1155 	regmap_write(es8389->regmap, ES8389_PULL_DOWN, 0x00);
1156 
1157 	regulator_bulk_disable(ARRAY_SIZE(es8389_core_supplies), es8389->core_supply);
1158 }
1159 
1160 static int es8389_i2c_probe(struct i2c_client *i2c_client)
1161 {
1162 	struct es8389_private *es8389;
1163 	int ret, i;
1164 
1165 	es8389 = devm_kzalloc_obj(&i2c_client->dev, *es8389);
1166 	if (es8389 == NULL)
1167 		return -ENOMEM;
1168 
1169 	i2c_set_clientdata(i2c_client, es8389);
1170 	es8389->regmap = devm_regmap_init_i2c(i2c_client, &es8389_regmap);
1171 	if (IS_ERR(es8389->regmap))
1172 		return dev_err_probe(&i2c_client->dev, PTR_ERR(es8389->regmap),
1173 			"regmap_init() failed\n");
1174 
1175 	for (i = 0; i < ARRAY_SIZE(es8389_core_supplies); i++)
1176 		es8389->core_supply[i].supply = es8389_core_supplies[i];
1177 	ret = devm_regulator_bulk_get(&i2c_client->dev, ARRAY_SIZE(es8389_core_supplies),
1178 				      es8389->core_supply);
1179 	if (ret)
1180 		return dev_err_probe(&i2c_client->dev, ret,
1181 				     "Failed to request core supplies\n");
1182 
1183 	es8389->mclk = devm_clk_get_optional(&i2c_client->dev, "mclk");
1184 	if (IS_ERR(es8389->mclk))
1185 		return dev_err_probe(&i2c_client->dev, PTR_ERR(es8389->mclk),
1186 				     "ES8389 is unable to get mclk\n");
1187 
1188 	if (!es8389->mclk)
1189 		dev_err(&i2c_client->dev, "%s, assuming static mclk\n", __func__);
1190 
1191 	ret =  devm_snd_soc_register_component(&i2c_client->dev,
1192 			&soc_codec_dev_es8389,
1193 			&es8389_dai,
1194 			1);
1195 
1196 	return ret;
1197 }
1198 
1199 #ifdef CONFIG_OF
1200 static const struct of_device_id es8389_if_dt_ids[] = {
1201 	{ .compatible = "everest,es8389", },
1202 	{ }
1203 };
1204 MODULE_DEVICE_TABLE(of, es8389_if_dt_ids);
1205 #endif
1206 
1207 static const struct i2c_device_id es8389_i2c_id[] = {
1208 	{ .name = "es8389" },
1209 	{ }
1210 };
1211 MODULE_DEVICE_TABLE(i2c, es8389_i2c_id);
1212 
1213 static struct i2c_driver es8389_i2c_driver = {
1214 	.driver = {
1215 		.name	= "es8389",
1216 		.of_match_table = of_match_ptr(es8389_if_dt_ids),
1217 	},
1218 	.shutdown = es8389_i2c_shutdown,
1219 	.probe = es8389_i2c_probe,
1220 	.id_table = es8389_i2c_id,
1221 };
1222 module_i2c_driver(es8389_i2c_driver);
1223 
1224 MODULE_DESCRIPTION("ASoC es8389 driver");
1225 MODULE_AUTHOR("Michael Zhang <zhangyi@everest-semi.com>");
1226 MODULE_LICENSE("GPL");
1227