xref: /linux/drivers/gpu/drm/radeon/cayman_blit_shaders.h (revision 4f2c0a4acffbec01079c28f839422e64ddeff004)
1 /*
2  * Copyright 2010 Advanced Micro Devices, Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice (including the next
12  * paragraph) shall be included in all copies or substantial portions of the
13  * Software.
14  *
15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18  * THE COPYRIGHT HOLDER(S) AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
19  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
20  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21  * DEALINGS IN THE SOFTWARE.
22  *
23  * Authors:
24  *     Alex Deucher <alexander.deucher@amd.com>
25  */
26 
27 #ifndef CAYMAN_BLIT_SHADERS_H
28 #define CAYMAN_BLIT_SHADERS_H
29 
30 /*
31  * evergreen cards need to use the 3D engine to blit data which requires
32  * quite a bit of hw state setup.  Rather than pull the whole 3D driver
33  * (which normally generates the 3D state) into the DRM, we opt to use
34  * statically generated state tables.  The register state and shaders
35  * were hand generated to support blitting functionality.  See the 3D
36  * driver or documentation for descriptions of the registers and
37  * shader instructions.
38  */
39 static const u32 cayman_default_state[] = {
40 	0xc0066900,
41 	0x00000000,
42 	0x00000060, /* DB_RENDER_CONTROL */
43 	0x00000000, /* DB_COUNT_CONTROL */
44 	0x00000000, /* DB_DEPTH_VIEW */
45 	0x0000002a, /* DB_RENDER_OVERRIDE */
46 	0x00000000, /* DB_RENDER_OVERRIDE2 */
47 	0x00000000, /* DB_HTILE_DATA_BASE */
48 
49 	0xc0026900,
50 	0x0000000a,
51 	0x00000000, /* DB_STENCIL_CLEAR */
52 	0x00000000, /* DB_DEPTH_CLEAR */
53 
54 	0xc0036900,
55 	0x0000000f,
56 	0x00000000, /* DB_DEPTH_INFO */
57 	0x00000000, /* DB_Z_INFO */
58 	0x00000000, /* DB_STENCIL_INFO */
59 
60 	0xc0016900,
61 	0x00000080,
62 	0x00000000, /* PA_SC_WINDOW_OFFSET */
63 
64 	0xc00d6900,
65 	0x00000083,
66 	0x0000ffff, /* PA_SC_CLIPRECT_RULE */
67 	0x00000000, /* PA_SC_CLIPRECT_0_TL */
68 	0x20002000, /* PA_SC_CLIPRECT_0_BR */
69 	0x00000000,
70 	0x20002000,
71 	0x00000000,
72 	0x20002000,
73 	0x00000000,
74 	0x20002000,
75 	0xaaaaaaaa, /* PA_SC_EDGERULE */
76 	0x00000000, /* PA_SU_HARDWARE_SCREEN_OFFSET */
77 	0x0000000f, /* CB_TARGET_MASK */
78 	0x0000000f, /* CB_SHADER_MASK */
79 
80 	0xc0226900,
81 	0x00000094,
82 	0x80000000, /* PA_SC_VPORT_SCISSOR_0_TL */
83 	0x20002000, /* PA_SC_VPORT_SCISSOR_0_BR */
84 	0x80000000,
85 	0x20002000,
86 	0x80000000,
87 	0x20002000,
88 	0x80000000,
89 	0x20002000,
90 	0x80000000,
91 	0x20002000,
92 	0x80000000,
93 	0x20002000,
94 	0x80000000,
95 	0x20002000,
96 	0x80000000,
97 	0x20002000,
98 	0x80000000,
99 	0x20002000,
100 	0x80000000,
101 	0x20002000,
102 	0x80000000,
103 	0x20002000,
104 	0x80000000,
105 	0x20002000,
106 	0x80000000,
107 	0x20002000,
108 	0x80000000,
109 	0x20002000,
110 	0x80000000,
111 	0x20002000,
112 	0x80000000,
113 	0x20002000,
114 	0x00000000, /* PA_SC_VPORT_ZMIN_0 */
115 	0x3f800000, /* PA_SC_VPORT_ZMAX_0 */
116 
117 	0xc0016900,
118 	0x000000d4,
119 	0x00000000, /* SX_MISC */
120 
121 	0xc0026900,
122 	0x000000d9,
123 	0x00000000, /* CP_RINGID */
124 	0x00000000, /* CP_VMID */
125 
126 	0xc0096900,
127 	0x00000100,
128 	0x00ffffff, /* VGT_MAX_VTX_INDX */
129 	0x00000000, /* VGT_MIN_VTX_INDX */
130 	0x00000000, /* VGT_INDX_OFFSET */
131 	0x00000000, /* VGT_MULTI_PRIM_IB_RESET_INDX */
132 	0x00000000, /* SX_ALPHA_TEST_CONTROL */
133 	0x00000000, /* CB_BLEND_RED */
134 	0x00000000, /* CB_BLEND_GREEN */
135 	0x00000000, /* CB_BLEND_BLUE */
136 	0x00000000, /* CB_BLEND_ALPHA */
137 
138 	0xc0016900,
139 	0x00000187,
140 	0x00000100, /* SPI_VS_OUT_ID_0 */
141 
142 	0xc0026900,
143 	0x00000191,
144 	0x00000100, /* SPI_PS_INPUT_CNTL_0 */
145 	0x00000101, /* SPI_PS_INPUT_CNTL_1 */
146 
147 	0xc0016900,
148 	0x000001b1,
149 	0x00000000, /* SPI_VS_OUT_CONFIG */
150 
151 	0xc0106900,
152 	0x000001b3,
153 	0x20000001, /* SPI_PS_IN_CONTROL_0 */
154 	0x00000000, /* SPI_PS_IN_CONTROL_1 */
155 	0x00000000, /* SPI_INTERP_CONTROL_0 */
156 	0x00000000, /* SPI_INPUT_Z */
157 	0x00000000, /* SPI_FOG_CNTL */
158 	0x00100000, /* SPI_BARYC_CNTL */
159 	0x00000000, /* SPI_PS_IN_CONTROL_2 */
160 	0x00000000, /* SPI_COMPUTE_INPUT_CNTL */
161 	0x00000000, /* SPI_COMPUTE_NUM_THREAD_X */
162 	0x00000000, /* SPI_COMPUTE_NUM_THREAD_Y */
163 	0x00000000, /* SPI_COMPUTE_NUM_THREAD_Z */
164 	0x00000000, /* SPI_GPR_MGMT */
165 	0x00000000, /* SPI_LDS_MGMT */
166 	0x00000000, /* SPI_STACK_MGMT */
167 	0x00000000, /* SPI_WAVE_MGMT_1 */
168 	0x00000000, /* SPI_WAVE_MGMT_2 */
169 
170 	0xc0016900,
171 	0x000001e0,
172 	0x00000000, /* CB_BLEND0_CONTROL */
173 
174 	0xc00e6900,
175 	0x00000200,
176 	0x00000000, /* DB_DEPTH_CONTROL */
177 	0x00000000, /* DB_EQAA */
178 	0x00cc0010, /* CB_COLOR_CONTROL */
179 	0x00000210, /* DB_SHADER_CONTROL */
180 	0x00010000, /* PA_CL_CLIP_CNTL */
181 	0x00000004, /* PA_SU_SC_MODE_CNTL */
182 	0x00000100, /* PA_CL_VTE_CNTL */
183 	0x00000000, /* PA_CL_VS_OUT_CNTL */
184 	0x00000000, /* PA_CL_NANINF_CNTL */
185 	0x00000000, /* PA_SU_LINE_STIPPLE_CNTL */
186 	0x00000000, /* PA_SU_LINE_STIPPLE_SCALE */
187 	0x00000000, /* PA_SU_PRIM_FILTER_CNTL */
188 	0x00000000, /*  */
189 	0x00000000, /*  */
190 
191 	0xc0026900,
192 	0x00000229,
193 	0x00000000, /* SQ_PGM_START_FS */
194 	0x00000000,
195 
196 	0xc0016900,
197 	0x0000023b,
198 	0x00000000, /* SQ_LDS_ALLOC_PS */
199 
200 	0xc0066900,
201 	0x00000240,
202 	0x00000000, /* SQ_ESGS_RING_ITEMSIZE */
203 	0x00000000,
204 	0x00000000,
205 	0x00000000,
206 	0x00000000,
207 	0x00000000,
208 
209 	0xc0046900,
210 	0x00000247,
211 	0x00000000, /* SQ_GS_VERT_ITEMSIZE */
212 	0x00000000,
213 	0x00000000,
214 	0x00000000,
215 
216 	0xc0116900,
217 	0x00000280,
218 	0x00000000, /* PA_SU_POINT_SIZE */
219 	0x00000000, /* PA_SU_POINT_MINMAX */
220 	0x00000008, /* PA_SU_LINE_CNTL */
221 	0x00000000, /* PA_SC_LINE_STIPPLE */
222 	0x00000000, /* VGT_OUTPUT_PATH_CNTL */
223 	0x00000000, /* VGT_HOS_CNTL */
224 	0x00000000,
225 	0x00000000,
226 	0x00000000,
227 	0x00000000,
228 	0x00000000,
229 	0x00000000,
230 	0x00000000,
231 	0x00000000,
232 	0x00000000,
233 	0x00000000,
234 	0x00000000, /* VGT_GS_MODE */
235 
236 	0xc0026900,
237 	0x00000292,
238 	0x00000000, /* PA_SC_MODE_CNTL_0 */
239 	0x00000000, /* PA_SC_MODE_CNTL_1 */
240 
241 	0xc0016900,
242 	0x000002a1,
243 	0x00000000, /* VGT_PRIMITIVEID_EN */
244 
245 	0xc0016900,
246 	0x000002a5,
247 	0x00000000, /* VGT_MULTI_PRIM_IB_RESET_EN */
248 
249 	0xc0026900,
250 	0x000002a8,
251 	0x00000000, /* VGT_INSTANCE_STEP_RATE_0 */
252 	0x00000000,
253 
254 	0xc0026900,
255 	0x000002ad,
256 	0x00000000, /* VGT_REUSE_OFF */
257 	0x00000000,
258 
259 	0xc0016900,
260 	0x000002d5,
261 	0x00000000, /* VGT_SHADER_STAGES_EN */
262 
263 	0xc0016900,
264 	0x000002dc,
265 	0x0000aa00, /* DB_ALPHA_TO_MASK */
266 
267 	0xc0066900,
268 	0x000002de,
269 	0x00000000, /* PA_SU_POLY_OFFSET_DB_FMT_CNTL */
270 	0x00000000,
271 	0x00000000,
272 	0x00000000,
273 	0x00000000,
274 	0x00000000,
275 
276 	0xc0026900,
277 	0x000002e5,
278 	0x00000000, /* VGT_STRMOUT_CONFIG */
279 	0x00000000,
280 
281 	0xc01b6900,
282 	0x000002f5,
283 	0x76543210, /* PA_SC_CENTROID_PRIORITY_0 */
284 	0xfedcba98, /* PA_SC_CENTROID_PRIORITY_1 */
285 	0x00000000, /* PA_SC_LINE_CNTL */
286 	0x00000000, /* PA_SC_AA_CONFIG */
287 	0x00000005, /* PA_SU_VTX_CNTL */
288 	0x3f800000, /* PA_CL_GB_VERT_CLIP_ADJ */
289 	0x3f800000, /* PA_CL_GB_VERT_DISC_ADJ */
290 	0x3f800000, /* PA_CL_GB_HORZ_CLIP_ADJ */
291 	0x3f800000, /* PA_CL_GB_HORZ_DISC_ADJ */
292 	0x00000000, /* PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0 */
293 	0x00000000,
294 	0x00000000,
295 	0x00000000,
296 	0x00000000,
297 	0x00000000,
298 	0x00000000,
299 	0x00000000,
300 	0x00000000,
301 	0x00000000,
302 	0x00000000,
303 	0x00000000,
304 	0x00000000,
305 	0x00000000,
306 	0x00000000,
307 	0x00000000,
308 	0xffffffff, /* PA_SC_AA_MASK_X0Y0_X1Y0 */
309 	0xffffffff,
310 
311 	0xc0026900,
312 	0x00000316,
313 	0x0000000e, /* VGT_VERTEX_REUSE_BLOCK_CNTL */
314 	0x00000010, /*  */
315 };
316 
317 static const u32 cayman_default_size = ARRAY_SIZE(cayman_default_state);
318 
319 #endif
320