1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (C) 2024 Advanced Micro Devices, Inc. 4 */ 5 #include <linux/atomic.h> 6 7 #include "kvm_util.h" 8 #include "processor.h" 9 #include "svm_util.h" 10 #include "vmx.h" 11 #include "test_util.h" 12 13 #define NR_BUS_LOCKS_PER_LEVEL 100 14 #define CACHE_LINE_SIZE 64 15 16 /* 17 * To generate a bus lock, carve out a buffer that precisely occupies two cache 18 * lines and perform an atomic access that splits the two lines. 19 */ 20 static u8 buffer[CACHE_LINE_SIZE * 2] __aligned(CACHE_LINE_SIZE); 21 static atomic_t *val = (void *)&buffer[CACHE_LINE_SIZE - (sizeof(*val) / 2)]; 22 23 static void guest_generate_buslocks(void) 24 { 25 for (int i = 0; i < NR_BUS_LOCKS_PER_LEVEL; i++) 26 atomic_inc(val); 27 } 28 29 static void l2_guest_code(void) 30 { 31 guest_generate_buslocks(); 32 GUEST_DONE(); 33 } 34 35 static void l1_svm_code(struct svm_test_data *svm) 36 { 37 struct vmcb *vmcb = svm->vmcb; 38 39 generic_svm_setup(svm, l2_guest_code); 40 run_guest(vmcb, svm->vmcb_gpa); 41 } 42 43 static void l1_vmx_code(struct vmx_pages *vmx) 44 { 45 GUEST_ASSERT_EQ(prepare_for_vmx_operation(vmx), true); 46 GUEST_ASSERT_EQ(load_vmcs(vmx), true); 47 48 prepare_vmcs(vmx, NULL); 49 50 GUEST_ASSERT(!vmwrite(GUEST_RIP, (u64)l2_guest_code)); 51 GUEST_ASSERT(!vmlaunch()); 52 } 53 54 static void guest_code(void *test_data) 55 { 56 guest_generate_buslocks(); 57 58 if (this_cpu_has(X86_FEATURE_SVM)) 59 l1_svm_code(test_data); 60 else if (this_cpu_has(X86_FEATURE_VMX)) 61 l1_vmx_code(test_data); 62 else 63 GUEST_DONE(); 64 65 TEST_FAIL("L2 should have signaled 'done'"); 66 } 67 68 int main(int argc, char *argv[]) 69 { 70 const bool has_nested = kvm_cpu_has(X86_FEATURE_SVM) || kvm_cpu_has(X86_FEATURE_VMX); 71 gva_t nested_test_data_gva; 72 struct kvm_vcpu *vcpu; 73 struct kvm_run *run; 74 struct kvm_vm *vm; 75 int i, bus_locks = 0; 76 77 TEST_REQUIRE(kvm_has_cap(KVM_CAP_X86_BUS_LOCK_EXIT)); 78 79 vm = vm_create(1); 80 vm_enable_cap(vm, KVM_CAP_X86_BUS_LOCK_EXIT, KVM_BUS_LOCK_DETECTION_EXIT); 81 vcpu = vm_vcpu_add(vm, 0, guest_code); 82 83 if (kvm_cpu_has(X86_FEATURE_SVM)) 84 vcpu_alloc_svm(vm, &nested_test_data_gva); 85 else 86 vcpu_alloc_vmx(vm, &nested_test_data_gva); 87 88 vcpu_args_set(vcpu, 1, nested_test_data_gva); 89 90 run = vcpu->run; 91 92 for (i = 0; i <= NR_BUS_LOCKS_PER_LEVEL * (1 + has_nested); i++) { 93 struct ucall uc; 94 95 vcpu_run(vcpu); 96 97 if (run->exit_reason == KVM_EXIT_IO) { 98 switch (get_ucall(vcpu, &uc)) { 99 case UCALL_ABORT: 100 REPORT_GUEST_ASSERT(uc); 101 goto done; 102 case UCALL_SYNC: 103 continue; 104 case UCALL_DONE: 105 goto done; 106 default: 107 TEST_FAIL("Unknown ucall 0x%lx.", uc.cmd); 108 } 109 } 110 111 TEST_ASSERT_KVM_EXIT_REASON(vcpu, KVM_EXIT_X86_BUS_LOCK); 112 113 /* 114 * Verify the counter is actually getting incremented, e.g. that 115 * KVM isn't skipping the instruction. On Intel, the exit is 116 * trap-like, i.e. the counter should already have been 117 * incremented. On AMD, it's fault-like, i.e. the counter will 118 * be incremented when the guest re-executes the instruction. 119 */ 120 sync_global_from_guest(vm, *val); 121 TEST_ASSERT_EQ(atomic_read(val), bus_locks + host_cpu_is_intel); 122 123 bus_locks++; 124 } 125 TEST_FAIL("Didn't receive UCALL_DONE, took %u bus lock exits\n", bus_locks); 126 done: 127 TEST_ASSERT_EQ(i, bus_locks); 128 kvm_vm_free(vm); 129 return 0; 130 } 131