1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /******************************************************************************* 3 Copyright (C) 2007-2009 STMicroelectronics Ltd 4 5 6 Author: Giuseppe Cavallaro <peppe.cavallaro@st.com> 7 *******************************************************************************/ 8 9 #ifndef __STMMAC_H__ 10 #define __STMMAC_H__ 11 12 #define STMMAC_RESOURCE_NAME "stmmaceth" 13 14 #include <linux/clk.h> 15 #include <linux/hrtimer.h> 16 #include <linux/if_vlan.h> 17 #include <linux/stmmac.h> 18 #include <linux/phylink.h> 19 #include <linux/pci.h> 20 #include "common.h" 21 #include <linux/ptp_clock_kernel.h> 22 #include <linux/net_tstamp.h> 23 #include <linux/reset.h> 24 #include <net/page_pool/types.h> 25 #include <net/xdp.h> 26 #include <uapi/linux/bpf.h> 27 28 struct stmmac_pcs; 29 30 struct stmmac_resources { 31 void __iomem *addr; 32 u8 mac[ETH_ALEN]; 33 int wol_irq; 34 int irq; 35 int sfty_irq; 36 int sfty_ce_irq; 37 int sfty_ue_irq; 38 int rx_irq[MTL_MAX_RX_QUEUES]; 39 int tx_irq[MTL_MAX_TX_QUEUES]; 40 }; 41 42 enum stmmac_txbuf_type { 43 STMMAC_TXBUF_T_SKB, 44 STMMAC_TXBUF_T_XDP_TX, 45 STMMAC_TXBUF_T_XDP_NDO, 46 STMMAC_TXBUF_T_XSK_TX, 47 }; 48 49 struct stmmac_tx_info { 50 struct xsk_tx_metadata_compl xsk_meta; 51 dma_addr_t buf; 52 unsigned len; 53 enum stmmac_txbuf_type buf_type; 54 bool map_as_page; 55 bool last_segment; 56 bool is_jumbo; 57 }; 58 59 #define STMMAC_TBS_AVAIL BIT(0) 60 #define STMMAC_TBS_EN BIT(1) 61 62 /* Frequently used values are kept adjacent for cache effect */ 63 struct stmmac_tx_queue { 64 u32 tx_count_frames; 65 int tbs; 66 struct hrtimer txtimer; 67 u32 queue_index; 68 struct stmmac_priv *priv_data; 69 struct dma_extended_desc *dma_etx ____cacheline_aligned_in_smp; 70 struct dma_edesc *dma_entx; 71 struct dma_desc *dma_tx; 72 union { 73 struct sk_buff **tx_skbuff; 74 struct xdp_frame **xdpf; 75 }; 76 struct stmmac_tx_info *tx_skbuff_dma; 77 struct xsk_buff_pool *xsk_pool; 78 u32 xsk_frames_done; 79 unsigned int cur_tx; 80 unsigned int dirty_tx; 81 dma_addr_t dma_tx_phy; 82 u32 mss; 83 }; 84 85 struct stmmac_rx_buffer { 86 union { 87 struct { 88 struct page *page; 89 dma_addr_t addr; 90 __u32 page_offset; 91 }; 92 struct xdp_buff *xdp; 93 }; 94 struct page *sec_page; 95 dma_addr_t sec_addr; 96 }; 97 98 struct stmmac_xdp_buff { 99 struct xdp_buff xdp; 100 struct stmmac_priv *priv; 101 struct dma_desc *desc; 102 struct dma_desc *ndesc; 103 }; 104 105 struct stmmac_metadata_request { 106 struct stmmac_priv *priv; 107 struct dma_desc *tx_desc; 108 bool *set_ic; 109 struct dma_edesc *edesc; 110 int tbs; 111 }; 112 113 struct stmmac_xsk_tx_complete { 114 struct stmmac_priv *priv; 115 struct dma_desc *desc; 116 }; 117 118 struct stmmac_rx_queue { 119 u32 rx_count_frames; 120 u32 queue_index; 121 struct xdp_rxq_info xdp_rxq; 122 struct xsk_buff_pool *xsk_pool; 123 struct page_pool *page_pool; 124 struct stmmac_rx_buffer *buf_pool; 125 struct stmmac_priv *priv_data; 126 struct dma_extended_desc *dma_erx; 127 struct dma_desc *dma_rx ____cacheline_aligned_in_smp; 128 unsigned int cur_rx; 129 unsigned int dirty_rx; 130 unsigned int buf_alloc_num; 131 unsigned int napi_skb_frag_size; 132 dma_addr_t dma_rx_phy; 133 unsigned int state_saved; 134 struct { 135 struct sk_buff *skb; 136 unsigned int len; 137 unsigned int error; 138 } state; 139 }; 140 141 struct stmmac_channel { 142 struct napi_struct rx_napi ____cacheline_aligned_in_smp; 143 struct napi_struct tx_napi ____cacheline_aligned_in_smp; 144 struct napi_struct rxtx_napi ____cacheline_aligned_in_smp; 145 struct stmmac_priv *priv_data; 146 spinlock_t lock; 147 u32 index; 148 }; 149 150 struct stmmac_fpe_cfg { 151 struct ethtool_mmsv mmsv; 152 const struct stmmac_fpe_reg *reg; 153 u32 fpe_csr; /* MAC_FPE_CTRL_STS reg cache */ 154 }; 155 156 struct stmmac_tc_entry { 157 bool in_use; 158 bool in_hw; 159 bool is_last; 160 bool is_frag; 161 void *frag_ptr; 162 unsigned int table_pos; 163 u32 handle; 164 u32 prio; 165 struct { 166 u32 match_data; 167 u32 match_en; 168 u8 af:1; 169 u8 rf:1; 170 u8 im:1; 171 u8 nc:1; 172 u8 res1:4; 173 u8 frame_offset; 174 u8 ok_index; 175 u8 dma_ch_no; 176 u32 res2; 177 } __packed val; 178 }; 179 180 #define STMMAC_PPS_MAX 4 181 struct stmmac_pps_cfg { 182 struct timespec64 start; 183 struct timespec64 period; 184 }; 185 186 struct stmmac_rss { 187 int enable; 188 u8 key[STMMAC_RSS_HASH_KEY_SIZE]; 189 u32 table[STMMAC_RSS_MAX_TABLE_SIZE]; 190 }; 191 192 #define STMMAC_FLOW_ACTION_DROP BIT(0) 193 struct stmmac_flow_entry { 194 unsigned long cookie; 195 unsigned long action; 196 u8 ip_proto; 197 int in_use; 198 int idx; 199 int is_l4; 200 }; 201 202 /* Rx Frame Steering */ 203 enum stmmac_rfs_type { 204 STMMAC_RFS_T_VLAN, 205 STMMAC_RFS_T_LLDP, 206 STMMAC_RFS_T_1588, 207 STMMAC_RFS_T_MAX, 208 }; 209 210 struct stmmac_rfs_entry { 211 unsigned long cookie; 212 u16 etype; 213 int in_use; 214 int type; 215 int tc; 216 }; 217 218 struct stmmac_dma_conf { 219 unsigned int dma_buf_sz; 220 221 /* RX Queue */ 222 struct stmmac_rx_queue rx_queue[MTL_MAX_RX_QUEUES]; 223 unsigned int dma_rx_size; 224 225 /* TX Queue */ 226 struct stmmac_tx_queue tx_queue[MTL_MAX_TX_QUEUES]; 227 unsigned int dma_tx_size; 228 }; 229 230 #define EST_GCL 1024 231 struct stmmac_est { 232 int enable; 233 u32 btr_reserve[2]; 234 u32 btr_offset[2]; 235 u32 btr[2]; 236 u32 ctr[2]; 237 u32 ter; 238 u32 gcl_unaligned[EST_GCL]; 239 u32 gcl[EST_GCL]; 240 u32 gcl_size; 241 u32 max_sdu[MTL_MAX_TX_QUEUES]; 242 }; 243 244 struct stmmac_msi { 245 int sfty_ce_irq; 246 int sfty_ue_irq; 247 int rx_irq[MTL_MAX_RX_QUEUES]; 248 int tx_irq[MTL_MAX_TX_QUEUES]; 249 250 /*irq name */ 251 char int_name_mac[IFNAMSIZ + 9]; 252 char int_name_wol[IFNAMSIZ + 9]; 253 char int_name_lpi[IFNAMSIZ + 9]; 254 char int_name_sfty[IFNAMSIZ + 10]; 255 char int_name_sfty_ce[IFNAMSIZ + 10]; 256 char int_name_sfty_ue[IFNAMSIZ + 10]; 257 char int_name_rx_irq[MTL_MAX_RX_QUEUES][IFNAMSIZ + 14]; 258 char int_name_tx_irq[MTL_MAX_TX_QUEUES][IFNAMSIZ + 18]; 259 }; 260 261 struct stmmac_priv { 262 /* Frequently used values are kept adjacent for cache effect */ 263 u32 tx_coal_frames[MTL_MAX_TX_QUEUES]; 264 u32 tx_coal_timer[MTL_MAX_TX_QUEUES]; 265 u32 rx_coal_frames[MTL_MAX_RX_QUEUES]; 266 267 int hwts_tx_en; 268 /* skb_shinfo(skb)->gso_type types that we handle */ 269 unsigned int gso_enabled_types; 270 bool tx_path_in_lpi_mode; 271 bool sph_active; 272 bool sph_capable; 273 u32 sarc_type; 274 u32 rx_riwt[MTL_MAX_RX_QUEUES]; 275 int hwts_rx_en; 276 bool tsfupdt_coarse; 277 278 void __iomem *ioaddr; 279 struct net_device *dev; 280 struct device *device; 281 struct mac_device_info *hw; 282 int (*hwif_quirks)(struct stmmac_priv *priv); 283 struct mutex lock; 284 285 struct stmmac_dma_conf dma_conf; 286 287 /* Generic channel for NAPI */ 288 struct stmmac_channel channel[STMMAC_CH_MAX]; 289 290 unsigned int pause_time; 291 struct mii_bus *mii; 292 293 struct stmmac_pcs *integrated_pcs; 294 295 struct phylink_config phylink_config; 296 struct phylink *phylink; 297 298 struct stmmac_extra_stats xstats ____cacheline_aligned_in_smp; 299 struct stmmac_safety_stats sstats; 300 struct plat_stmmacenet_data *plat; 301 /* Protect est parameters */ 302 struct mutex est_lock; 303 struct stmmac_est *est; 304 struct dma_features dma_cap; 305 struct stmmac_counters mmc; 306 int hw_cap_support; 307 int synopsys_id; 308 u32 msg_enable; 309 /* Our MAC Wake-on-Lan options */ 310 int wolopts; 311 int wol_irq; 312 u32 gmii_address_bus_config; 313 struct timer_list eee_ctrl_timer; 314 u32 tx_lpi_timer; 315 bool tx_lpi_clk_stop; 316 bool eee_enabled; 317 bool eee_active; 318 bool eee_sw_timer_en; 319 bool legacy_serdes_is_powered; 320 /* descriptor format: 321 * when clear: struct dma_desc or for tx TBS struct dma_edesc 322 * when set, struct dma_extended_desc 323 */ 324 bool extend_desc; 325 /* chain_mode: requested descriptor mode */ 326 bool chain_mode; 327 /* descriptor_mode: actual descriptor mode, 328 * see STMMAC_CHAIN_MODE or STMMAC_RING_MODE 329 */ 330 u8 descriptor_mode; 331 struct kernel_hwtstamp_config tstamp_config; 332 struct ptp_clock *ptp_clock; 333 struct ptp_clock_info ptp_clock_ops; 334 unsigned int default_addend; 335 u32 sub_second_inc; 336 u32 systime_flags; 337 u32 adv_ts; 338 int use_riwt; 339 int irq_wake; 340 rwlock_t ptp_lock; 341 /* Protects auxiliary snapshot registers from concurrent access. */ 342 struct mutex aux_ts_lock; 343 wait_queue_head_t tstamp_busy_wait; 344 345 void __iomem *mmcaddr; 346 void __iomem *ptpaddr; 347 void __iomem *estaddr; 348 unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)]; 349 unsigned int num_double_vlans; 350 int sfty_irq; 351 struct stmmac_msi *msi; 352 353 #ifdef CONFIG_DEBUG_FS 354 struct dentry *dbgfs_dir; 355 #endif 356 357 unsigned long state; 358 struct workqueue_struct *wq; 359 struct work_struct service_task; 360 361 /* Frame Preemption feature (FPE) */ 362 struct stmmac_fpe_cfg fpe_cfg; 363 364 /* TC Handling */ 365 unsigned int tc_entries_max; 366 unsigned int tc_off_max; 367 struct stmmac_tc_entry *tc_entries; 368 unsigned int flow_entries_max; 369 struct stmmac_flow_entry *flow_entries; 370 unsigned int rfs_entries_max[STMMAC_RFS_T_MAX]; 371 unsigned int rfs_entries_cnt[STMMAC_RFS_T_MAX]; 372 unsigned int rfs_entries_total; 373 struct stmmac_rfs_entry *rfs_entries; 374 375 /* Pulse Per Second output */ 376 struct stmmac_pps_cfg pps[STMMAC_PPS_MAX]; 377 378 /* Receive Side Scaling */ 379 struct stmmac_rss rss; 380 381 /* XDP BPF Program */ 382 unsigned long *af_xdp_zc_qps; 383 struct bpf_prog *xdp_prog; 384 385 struct devlink *devlink; 386 }; 387 388 enum stmmac_state { 389 STMMAC_DOWN, 390 STMMAC_RESET_REQUESTED, 391 STMMAC_RESETING, 392 STMMAC_SERVICE_SCHED, 393 }; 394 395 extern const struct dev_pm_ops stmmac_simple_pm_ops; 396 397 int stmmac_mdio_unregister(struct net_device *ndev); 398 int stmmac_mdio_register(struct net_device *ndev); 399 int stmmac_mdio_reset(struct mii_bus *mii); 400 void stmmac_mdio_lock(struct stmmac_priv *priv); 401 void stmmac_mdio_unlock(struct stmmac_priv *priv); 402 int stmmac_pcs_setup(struct net_device *ndev); 403 void stmmac_pcs_clean(struct net_device *ndev); 404 void stmmac_set_ethtool_ops(struct net_device *netdev); 405 406 void stmmac_ptp_register(struct stmmac_priv *priv); 407 void stmmac_ptp_unregister(struct stmmac_priv *priv); 408 int stmmac_xdp_open(struct net_device *dev); 409 void stmmac_xdp_release(struct net_device *dev); 410 int stmmac_get_phy_intf_sel(phy_interface_t interface); 411 int stmmac_resume(struct device *dev); 412 int stmmac_suspend(struct device *dev); 413 void stmmac_dvr_remove(struct device *dev); 414 int stmmac_dvr_probe(struct device *device, 415 struct plat_stmmacenet_data *plat_dat, 416 struct stmmac_resources *res); 417 int stmmac_reinit_queues(struct net_device *dev, u8 rx_cnt, u8 tx_cnt); 418 int stmmac_reinit_ringparam(struct net_device *dev, u32 rx_size, u32 tx_size); 419 int stmmac_set_clk_tx_rate(void *bsp_priv, struct clk *clk_tx_i, 420 phy_interface_t interface, int speed); 421 422 struct plat_stmmacenet_data *stmmac_plat_dat_alloc(struct device *dev); 423 424 static inline bool stmmac_xdp_is_enabled(struct stmmac_priv *priv) 425 { 426 return !!priv->xdp_prog; 427 } 428 429 void stmmac_disable_rx_queue(struct stmmac_priv *priv, u32 queue); 430 void stmmac_enable_rx_queue(struct stmmac_priv *priv, u32 queue); 431 void stmmac_disable_tx_queue(struct stmmac_priv *priv, u32 queue); 432 void stmmac_enable_tx_queue(struct stmmac_priv *priv, u32 queue); 433 int stmmac_xsk_wakeup(struct net_device *dev, u32 queue, u32 flags); 434 struct timespec64 stmmac_calc_tas_basetime(ktime_t old_base_time, 435 ktime_t current_time, 436 u64 cycle_time); 437 438 #if IS_ENABLED(CONFIG_STMMAC_SELFTESTS) 439 void stmmac_selftest_run(struct net_device *dev, 440 struct ethtool_test *etest, u64 *buf); 441 void stmmac_selftest_get_strings(struct stmmac_priv *priv, u8 *data); 442 int stmmac_selftest_get_count(struct stmmac_priv *priv); 443 #else 444 static inline void stmmac_selftest_run(struct net_device *dev, 445 struct ethtool_test *etest, u64 *buf) 446 { 447 /* Not enabled */ 448 } 449 static inline void stmmac_selftest_get_strings(struct stmmac_priv *priv, 450 u8 *data) 451 { 452 /* Not enabled */ 453 } 454 static inline int stmmac_selftest_get_count(struct stmmac_priv *priv) 455 { 456 return -EOPNOTSUPP; 457 } 458 #endif /* CONFIG_STMMAC_SELFTESTS */ 459 460 #endif /* __STMMAC_H__ */ 461