1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * BQ27xxx battery driver
4 *
5 * Copyright (C) 2008 Rodolfo Giometti <giometti@linux.it>
6 * Copyright (C) 2008 Eurotech S.p.A. <info@eurotech.it>
7 * Copyright (C) 2010-2011 Lars-Peter Clausen <lars@metafoo.de>
8 * Copyright (C) 2011 Pali Rohár <pali@kernel.org>
9 * Copyright (C) 2017 Liam Breck <kernel@networkimprov.net>
10 *
11 * Based on a previous work by Copyright (C) 2008 Texas Instruments, Inc.
12 *
13 * Datasheets:
14 * https://www.ti.com/product/bq27000
15 * https://www.ti.com/product/bq27200
16 * https://www.ti.com/product/bq27010
17 * https://www.ti.com/product/bq27210
18 * https://www.ti.com/product/bq27500
19 * https://www.ti.com/product/bq27510-g1
20 * https://www.ti.com/product/bq27510-g2
21 * https://www.ti.com/product/bq27510-g3
22 * https://www.ti.com/product/bq27520-g1
23 * https://www.ti.com/product/bq27520-g2
24 * https://www.ti.com/product/bq27520-g3
25 * https://www.ti.com/product/bq27520-g4
26 * https://www.ti.com/product/bq27530-g1
27 * https://www.ti.com/product/bq27531-g1
28 * https://www.ti.com/product/bq27541-g1
29 * https://www.ti.com/product/bq27542-g1
30 * https://www.ti.com/product/bq27546-g1
31 * https://www.ti.com/product/bq27742-g1
32 * https://www.ti.com/product/bq27545-g1
33 * https://www.ti.com/product/bq27421-g1
34 * https://www.ti.com/product/bq27425-g1
35 * https://www.ti.com/product/bq27426
36 * https://www.ti.com/product/bq27411-g1
37 * https://www.ti.com/product/bq27441-g1
38 * https://www.ti.com/product/bq27621-g1
39 * https://www.ti.com/product/bq27z561
40 * https://www.ti.com/product/bq28z610
41 * https://www.ti.com/product/bq34z100-g1
42 * https://www.ti.com/product/bq78z100
43 */
44
45 #include <linux/device.h>
46 #include <linux/module.h>
47 #include <linux/mutex.h>
48 #include <linux/param.h>
49 #include <linux/jiffies.h>
50 #include <linux/workqueue.h>
51 #include <linux/delay.h>
52 #include <linux/platform_device.h>
53 #include <linux/power_supply.h>
54 #include <linux/slab.h>
55 #include <linux/of.h>
56
57 #include <linux/power/bq27xxx_battery.h>
58
59 #define BQ27XXX_MANUFACTURER "Texas Instruments"
60
61 /* BQ27XXX Flags */
62 #define BQ27XXX_FLAG_DSC BIT(0)
63 #define BQ27XXX_FLAG_SOCF BIT(1) /* State-of-Charge threshold final */
64 #define BQ27XXX_FLAG_SOC1 BIT(2) /* State-of-Charge threshold 1 */
65 #define BQ27XXX_FLAG_CFGUP BIT(4)
66 #define BQ27XXX_FLAG_FC BIT(9)
67 #define BQ27XXX_FLAG_OTD BIT(14)
68 #define BQ27XXX_FLAG_OTC BIT(15)
69 #define BQ27XXX_FLAG_UT BIT(14)
70 #define BQ27XXX_FLAG_OT BIT(15)
71
72 /* BQ27000 has different layout for Flags register */
73 #define BQ27000_FLAG_EDVF BIT(0) /* Final End-of-Discharge-Voltage flag */
74 #define BQ27000_FLAG_EDV1 BIT(1) /* First End-of-Discharge-Voltage flag */
75 #define BQ27000_FLAG_CI BIT(4) /* Capacity Inaccurate flag */
76 #define BQ27000_FLAG_FC BIT(5)
77 #define BQ27000_FLAG_CHGS BIT(7) /* Charge state flag */
78
79 /* BQ27Z561 has different layout for Flags register */
80 #define BQ27Z561_FLAG_FDC BIT(4) /* Battery fully discharged */
81 #define BQ27Z561_FLAG_FC BIT(5) /* Battery fully charged */
82 #define BQ27Z561_FLAG_DIS_CH BIT(6) /* Battery is discharging */
83
84 /* control register params */
85 #define BQ27XXX_SEALED 0x20
86 #define BQ27XXX_SET_CFGUPDATE 0x13
87 #define BQ27XXX_SOFT_RESET 0x42
88 #define BQ27XXX_RESET 0x41
89
90 #define BQ27XXX_RS (20) /* Resistor sense mOhm */
91 #define BQ27XXX_POWER_CONSTANT (29200) /* 29.2 µV^2 * 1000 */
92 #define BQ27XXX_CURRENT_CONSTANT (3570) /* 3.57 µV * 1000 */
93
94 #define INVALID_REG_ADDR 0xff
95
96 /*
97 * bq27xxx_reg_index - Register names
98 *
99 * These are indexes into a device's register mapping array.
100 */
101
102 enum bq27xxx_reg_index {
103 BQ27XXX_REG_CTRL = 0, /* Control */
104 BQ27XXX_REG_TEMP, /* Temperature */
105 BQ27XXX_REG_INT_TEMP, /* Internal Temperature */
106 BQ27XXX_REG_VOLT, /* Voltage */
107 BQ27XXX_REG_AI, /* Average Current */
108 BQ27XXX_REG_FLAGS, /* Flags */
109 BQ27XXX_REG_TTE, /* Time-to-Empty */
110 BQ27XXX_REG_TTF, /* Time-to-Full */
111 BQ27XXX_REG_TTES, /* Time-to-Empty Standby */
112 BQ27XXX_REG_TTECP, /* Time-to-Empty at Constant Power */
113 BQ27XXX_REG_NAC, /* Nominal Available Capacity */
114 BQ27XXX_REG_RC, /* Remaining Capacity */
115 BQ27XXX_REG_FCC, /* Full Charge Capacity */
116 BQ27XXX_REG_CYCT, /* Cycle Count */
117 BQ27XXX_REG_AE, /* Available Energy */
118 BQ27XXX_REG_SOC, /* State-of-Charge */
119 BQ27XXX_REG_DCAP, /* Design Capacity */
120 BQ27XXX_REG_AP, /* Average Power */
121 BQ27XXX_DM_CTRL, /* Block Data Control */
122 BQ27XXX_DM_CLASS, /* Data Class */
123 BQ27XXX_DM_BLOCK, /* Data Block */
124 BQ27XXX_DM_DATA, /* Block Data */
125 BQ27XXX_DM_CKSUM, /* Block Data Checksum */
126 BQ27XXX_REG_MAX, /* sentinel */
127 };
128
129 #define BQ27XXX_DM_REG_ROWS \
130 [BQ27XXX_DM_CTRL] = 0x61, \
131 [BQ27XXX_DM_CLASS] = 0x3e, \
132 [BQ27XXX_DM_BLOCK] = 0x3f, \
133 [BQ27XXX_DM_DATA] = 0x40, \
134 [BQ27XXX_DM_CKSUM] = 0x60
135
136 /* Register mappings */
137 static u8
138 bq27000_regs[BQ27XXX_REG_MAX] = {
139 [BQ27XXX_REG_CTRL] = 0x00,
140 [BQ27XXX_REG_TEMP] = 0x06,
141 [BQ27XXX_REG_INT_TEMP] = INVALID_REG_ADDR,
142 [BQ27XXX_REG_VOLT] = 0x08,
143 [BQ27XXX_REG_AI] = 0x14,
144 [BQ27XXX_REG_FLAGS] = 0x0a,
145 [BQ27XXX_REG_TTE] = 0x16,
146 [BQ27XXX_REG_TTF] = 0x18,
147 [BQ27XXX_REG_TTES] = 0x1c,
148 [BQ27XXX_REG_TTECP] = 0x26,
149 [BQ27XXX_REG_NAC] = 0x0c,
150 [BQ27XXX_REG_RC] = INVALID_REG_ADDR,
151 [BQ27XXX_REG_FCC] = 0x12,
152 [BQ27XXX_REG_CYCT] = 0x2a,
153 [BQ27XXX_REG_AE] = 0x22,
154 [BQ27XXX_REG_SOC] = 0x0b,
155 [BQ27XXX_REG_DCAP] = 0x76,
156 [BQ27XXX_REG_AP] = 0x24,
157 [BQ27XXX_DM_CTRL] = INVALID_REG_ADDR,
158 [BQ27XXX_DM_CLASS] = INVALID_REG_ADDR,
159 [BQ27XXX_DM_BLOCK] = INVALID_REG_ADDR,
160 [BQ27XXX_DM_DATA] = INVALID_REG_ADDR,
161 [BQ27XXX_DM_CKSUM] = INVALID_REG_ADDR,
162 },
163 bq27010_regs[BQ27XXX_REG_MAX] = {
164 [BQ27XXX_REG_CTRL] = 0x00,
165 [BQ27XXX_REG_TEMP] = 0x06,
166 [BQ27XXX_REG_INT_TEMP] = INVALID_REG_ADDR,
167 [BQ27XXX_REG_VOLT] = 0x08,
168 [BQ27XXX_REG_AI] = 0x14,
169 [BQ27XXX_REG_FLAGS] = 0x0a,
170 [BQ27XXX_REG_TTE] = 0x16,
171 [BQ27XXX_REG_TTF] = 0x18,
172 [BQ27XXX_REG_TTES] = 0x1c,
173 [BQ27XXX_REG_TTECP] = 0x26,
174 [BQ27XXX_REG_NAC] = 0x0c,
175 [BQ27XXX_REG_RC] = INVALID_REG_ADDR,
176 [BQ27XXX_REG_FCC] = 0x12,
177 [BQ27XXX_REG_CYCT] = 0x2a,
178 [BQ27XXX_REG_AE] = INVALID_REG_ADDR,
179 [BQ27XXX_REG_SOC] = 0x0b,
180 [BQ27XXX_REG_DCAP] = 0x76,
181 [BQ27XXX_REG_AP] = INVALID_REG_ADDR,
182 [BQ27XXX_DM_CTRL] = INVALID_REG_ADDR,
183 [BQ27XXX_DM_CLASS] = INVALID_REG_ADDR,
184 [BQ27XXX_DM_BLOCK] = INVALID_REG_ADDR,
185 [BQ27XXX_DM_DATA] = INVALID_REG_ADDR,
186 [BQ27XXX_DM_CKSUM] = INVALID_REG_ADDR,
187 },
188 bq2750x_regs[BQ27XXX_REG_MAX] = {
189 [BQ27XXX_REG_CTRL] = 0x00,
190 [BQ27XXX_REG_TEMP] = 0x06,
191 [BQ27XXX_REG_INT_TEMP] = 0x28,
192 [BQ27XXX_REG_VOLT] = 0x08,
193 [BQ27XXX_REG_AI] = 0x14,
194 [BQ27XXX_REG_FLAGS] = 0x0a,
195 [BQ27XXX_REG_TTE] = 0x16,
196 [BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
197 [BQ27XXX_REG_TTES] = 0x1a,
198 [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
199 [BQ27XXX_REG_NAC] = 0x0c,
200 [BQ27XXX_REG_RC] = 0x10,
201 [BQ27XXX_REG_FCC] = 0x12,
202 [BQ27XXX_REG_CYCT] = 0x2a,
203 [BQ27XXX_REG_AE] = INVALID_REG_ADDR,
204 [BQ27XXX_REG_SOC] = 0x2c,
205 [BQ27XXX_REG_DCAP] = 0x3c,
206 [BQ27XXX_REG_AP] = INVALID_REG_ADDR,
207 BQ27XXX_DM_REG_ROWS,
208 },
209 #define bq2751x_regs bq27510g3_regs
210 #define bq2752x_regs bq27510g3_regs
211 bq27500_regs[BQ27XXX_REG_MAX] = {
212 [BQ27XXX_REG_CTRL] = 0x00,
213 [BQ27XXX_REG_TEMP] = 0x06,
214 [BQ27XXX_REG_INT_TEMP] = INVALID_REG_ADDR,
215 [BQ27XXX_REG_VOLT] = 0x08,
216 [BQ27XXX_REG_AI] = 0x14,
217 [BQ27XXX_REG_FLAGS] = 0x0a,
218 [BQ27XXX_REG_TTE] = 0x16,
219 [BQ27XXX_REG_TTF] = 0x18,
220 [BQ27XXX_REG_TTES] = 0x1c,
221 [BQ27XXX_REG_TTECP] = 0x26,
222 [BQ27XXX_REG_NAC] = 0x0c,
223 [BQ27XXX_REG_RC] = 0x10,
224 [BQ27XXX_REG_FCC] = 0x12,
225 [BQ27XXX_REG_CYCT] = 0x2a,
226 [BQ27XXX_REG_AE] = 0x22,
227 [BQ27XXX_REG_SOC] = 0x2c,
228 [BQ27XXX_REG_DCAP] = 0x3c,
229 [BQ27XXX_REG_AP] = 0x24,
230 BQ27XXX_DM_REG_ROWS,
231 },
232 #define bq27510g1_regs bq27500_regs
233 #define bq27510g2_regs bq27500_regs
234 bq27510g3_regs[BQ27XXX_REG_MAX] = {
235 [BQ27XXX_REG_CTRL] = 0x00,
236 [BQ27XXX_REG_TEMP] = 0x06,
237 [BQ27XXX_REG_INT_TEMP] = 0x28,
238 [BQ27XXX_REG_VOLT] = 0x08,
239 [BQ27XXX_REG_AI] = 0x14,
240 [BQ27XXX_REG_FLAGS] = 0x0a,
241 [BQ27XXX_REG_TTE] = 0x16,
242 [BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
243 [BQ27XXX_REG_TTES] = 0x1a,
244 [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
245 [BQ27XXX_REG_NAC] = 0x0c,
246 [BQ27XXX_REG_RC] = 0x10,
247 [BQ27XXX_REG_FCC] = 0x12,
248 [BQ27XXX_REG_CYCT] = 0x1e,
249 [BQ27XXX_REG_AE] = INVALID_REG_ADDR,
250 [BQ27XXX_REG_SOC] = 0x20,
251 [BQ27XXX_REG_DCAP] = 0x2e,
252 [BQ27XXX_REG_AP] = INVALID_REG_ADDR,
253 BQ27XXX_DM_REG_ROWS,
254 },
255 bq27520g1_regs[BQ27XXX_REG_MAX] = {
256 [BQ27XXX_REG_CTRL] = 0x00,
257 [BQ27XXX_REG_TEMP] = 0x06,
258 [BQ27XXX_REG_INT_TEMP] = INVALID_REG_ADDR,
259 [BQ27XXX_REG_VOLT] = 0x08,
260 [BQ27XXX_REG_AI] = 0x14,
261 [BQ27XXX_REG_FLAGS] = 0x0a,
262 [BQ27XXX_REG_TTE] = 0x16,
263 [BQ27XXX_REG_TTF] = 0x18,
264 [BQ27XXX_REG_TTES] = 0x1c,
265 [BQ27XXX_REG_TTECP] = 0x26,
266 [BQ27XXX_REG_NAC] = 0x0c,
267 [BQ27XXX_REG_RC] = 0x10,
268 [BQ27XXX_REG_FCC] = 0x12,
269 [BQ27XXX_REG_CYCT] = INVALID_REG_ADDR,
270 [BQ27XXX_REG_AE] = 0x22,
271 [BQ27XXX_REG_SOC] = 0x2c,
272 [BQ27XXX_REG_DCAP] = 0x3c,
273 [BQ27XXX_REG_AP] = 0x24,
274 BQ27XXX_DM_REG_ROWS,
275 },
276 bq27520g2_regs[BQ27XXX_REG_MAX] = {
277 [BQ27XXX_REG_CTRL] = 0x00,
278 [BQ27XXX_REG_TEMP] = 0x06,
279 [BQ27XXX_REG_INT_TEMP] = 0x36,
280 [BQ27XXX_REG_VOLT] = 0x08,
281 [BQ27XXX_REG_AI] = 0x14,
282 [BQ27XXX_REG_FLAGS] = 0x0a,
283 [BQ27XXX_REG_TTE] = 0x16,
284 [BQ27XXX_REG_TTF] = 0x18,
285 [BQ27XXX_REG_TTES] = 0x1c,
286 [BQ27XXX_REG_TTECP] = 0x26,
287 [BQ27XXX_REG_NAC] = 0x0c,
288 [BQ27XXX_REG_RC] = 0x10,
289 [BQ27XXX_REG_FCC] = 0x12,
290 [BQ27XXX_REG_CYCT] = 0x2a,
291 [BQ27XXX_REG_AE] = 0x22,
292 [BQ27XXX_REG_SOC] = 0x2c,
293 [BQ27XXX_REG_DCAP] = 0x3c,
294 [BQ27XXX_REG_AP] = 0x24,
295 BQ27XXX_DM_REG_ROWS,
296 },
297 bq27520g3_regs[BQ27XXX_REG_MAX] = {
298 [BQ27XXX_REG_CTRL] = 0x00,
299 [BQ27XXX_REG_TEMP] = 0x06,
300 [BQ27XXX_REG_INT_TEMP] = 0x36,
301 [BQ27XXX_REG_VOLT] = 0x08,
302 [BQ27XXX_REG_AI] = 0x14,
303 [BQ27XXX_REG_FLAGS] = 0x0a,
304 [BQ27XXX_REG_TTE] = 0x16,
305 [BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
306 [BQ27XXX_REG_TTES] = 0x1c,
307 [BQ27XXX_REG_TTECP] = 0x26,
308 [BQ27XXX_REG_NAC] = 0x0c,
309 [BQ27XXX_REG_RC] = 0x10,
310 [BQ27XXX_REG_FCC] = 0x12,
311 [BQ27XXX_REG_CYCT] = 0x2a,
312 [BQ27XXX_REG_AE] = 0x22,
313 [BQ27XXX_REG_SOC] = 0x2c,
314 [BQ27XXX_REG_DCAP] = 0x3c,
315 [BQ27XXX_REG_AP] = 0x24,
316 BQ27XXX_DM_REG_ROWS,
317 },
318 bq27520g4_regs[BQ27XXX_REG_MAX] = {
319 [BQ27XXX_REG_CTRL] = 0x00,
320 [BQ27XXX_REG_TEMP] = 0x06,
321 [BQ27XXX_REG_INT_TEMP] = 0x28,
322 [BQ27XXX_REG_VOLT] = 0x08,
323 [BQ27XXX_REG_AI] = 0x14,
324 [BQ27XXX_REG_FLAGS] = 0x0a,
325 [BQ27XXX_REG_TTE] = 0x16,
326 [BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
327 [BQ27XXX_REG_TTES] = 0x1c,
328 [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
329 [BQ27XXX_REG_NAC] = 0x0c,
330 [BQ27XXX_REG_RC] = 0x10,
331 [BQ27XXX_REG_FCC] = 0x12,
332 [BQ27XXX_REG_CYCT] = 0x1e,
333 [BQ27XXX_REG_AE] = INVALID_REG_ADDR,
334 [BQ27XXX_REG_SOC] = 0x20,
335 [BQ27XXX_REG_DCAP] = INVALID_REG_ADDR,
336 [BQ27XXX_REG_AP] = INVALID_REG_ADDR,
337 BQ27XXX_DM_REG_ROWS,
338 },
339 bq27521_regs[BQ27XXX_REG_MAX] = {
340 [BQ27XXX_REG_CTRL] = 0x02,
341 [BQ27XXX_REG_TEMP] = 0x0a,
342 [BQ27XXX_REG_INT_TEMP] = INVALID_REG_ADDR,
343 [BQ27XXX_REG_VOLT] = 0x0c,
344 [BQ27XXX_REG_AI] = 0x0e,
345 [BQ27XXX_REG_FLAGS] = 0x08,
346 [BQ27XXX_REG_TTE] = INVALID_REG_ADDR,
347 [BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
348 [BQ27XXX_REG_TTES] = INVALID_REG_ADDR,
349 [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
350 [BQ27XXX_REG_NAC] = INVALID_REG_ADDR,
351 [BQ27XXX_REG_RC] = INVALID_REG_ADDR,
352 [BQ27XXX_REG_FCC] = INVALID_REG_ADDR,
353 [BQ27XXX_REG_CYCT] = INVALID_REG_ADDR,
354 [BQ27XXX_REG_AE] = INVALID_REG_ADDR,
355 [BQ27XXX_REG_SOC] = INVALID_REG_ADDR,
356 [BQ27XXX_REG_DCAP] = INVALID_REG_ADDR,
357 [BQ27XXX_REG_AP] = INVALID_REG_ADDR,
358 [BQ27XXX_DM_CTRL] = INVALID_REG_ADDR,
359 [BQ27XXX_DM_CLASS] = INVALID_REG_ADDR,
360 [BQ27XXX_DM_BLOCK] = INVALID_REG_ADDR,
361 [BQ27XXX_DM_DATA] = INVALID_REG_ADDR,
362 [BQ27XXX_DM_CKSUM] = INVALID_REG_ADDR,
363 },
364 bq27530_regs[BQ27XXX_REG_MAX] = {
365 [BQ27XXX_REG_CTRL] = 0x00,
366 [BQ27XXX_REG_TEMP] = 0x06,
367 [BQ27XXX_REG_INT_TEMP] = 0x32,
368 [BQ27XXX_REG_VOLT] = 0x08,
369 [BQ27XXX_REG_AI] = 0x14,
370 [BQ27XXX_REG_FLAGS] = 0x0a,
371 [BQ27XXX_REG_TTE] = 0x16,
372 [BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
373 [BQ27XXX_REG_TTES] = INVALID_REG_ADDR,
374 [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
375 [BQ27XXX_REG_NAC] = 0x0c,
376 [BQ27XXX_REG_RC] = 0x10,
377 [BQ27XXX_REG_FCC] = 0x12,
378 [BQ27XXX_REG_CYCT] = 0x2a,
379 [BQ27XXX_REG_AE] = INVALID_REG_ADDR,
380 [BQ27XXX_REG_SOC] = 0x2c,
381 [BQ27XXX_REG_DCAP] = INVALID_REG_ADDR,
382 [BQ27XXX_REG_AP] = 0x24,
383 BQ27XXX_DM_REG_ROWS,
384 },
385 #define bq27531_regs bq27530_regs
386 bq27541_regs[BQ27XXX_REG_MAX] = {
387 [BQ27XXX_REG_CTRL] = 0x00,
388 [BQ27XXX_REG_TEMP] = 0x06,
389 [BQ27XXX_REG_INT_TEMP] = 0x28,
390 [BQ27XXX_REG_VOLT] = 0x08,
391 [BQ27XXX_REG_AI] = 0x14,
392 [BQ27XXX_REG_FLAGS] = 0x0a,
393 [BQ27XXX_REG_TTE] = 0x16,
394 [BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
395 [BQ27XXX_REG_TTES] = INVALID_REG_ADDR,
396 [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
397 [BQ27XXX_REG_NAC] = 0x0c,
398 [BQ27XXX_REG_RC] = 0x10,
399 [BQ27XXX_REG_FCC] = 0x12,
400 [BQ27XXX_REG_CYCT] = 0x2a,
401 [BQ27XXX_REG_AE] = INVALID_REG_ADDR,
402 [BQ27XXX_REG_SOC] = 0x2c,
403 [BQ27XXX_REG_DCAP] = 0x3c,
404 [BQ27XXX_REG_AP] = 0x24,
405 BQ27XXX_DM_REG_ROWS,
406 },
407 #define bq27542_regs bq27541_regs
408 #define bq27546_regs bq27541_regs
409 #define bq27742_regs bq27541_regs
410 bq27545_regs[BQ27XXX_REG_MAX] = {
411 [BQ27XXX_REG_CTRL] = 0x00,
412 [BQ27XXX_REG_TEMP] = 0x06,
413 [BQ27XXX_REG_INT_TEMP] = 0x28,
414 [BQ27XXX_REG_VOLT] = 0x08,
415 [BQ27XXX_REG_AI] = 0x14,
416 [BQ27XXX_REG_FLAGS] = 0x0a,
417 [BQ27XXX_REG_TTE] = 0x16,
418 [BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
419 [BQ27XXX_REG_TTES] = INVALID_REG_ADDR,
420 [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
421 [BQ27XXX_REG_NAC] = 0x0c,
422 [BQ27XXX_REG_RC] = 0x10,
423 [BQ27XXX_REG_FCC] = 0x12,
424 [BQ27XXX_REG_CYCT] = 0x2a,
425 [BQ27XXX_REG_AE] = INVALID_REG_ADDR,
426 [BQ27XXX_REG_SOC] = 0x2c,
427 [BQ27XXX_REG_DCAP] = INVALID_REG_ADDR,
428 [BQ27XXX_REG_AP] = 0x24,
429 BQ27XXX_DM_REG_ROWS,
430 },
431 bq27421_regs[BQ27XXX_REG_MAX] = {
432 [BQ27XXX_REG_CTRL] = 0x00,
433 [BQ27XXX_REG_TEMP] = 0x02,
434 [BQ27XXX_REG_INT_TEMP] = 0x1e,
435 [BQ27XXX_REG_VOLT] = 0x04,
436 [BQ27XXX_REG_AI] = 0x10,
437 [BQ27XXX_REG_FLAGS] = 0x06,
438 [BQ27XXX_REG_TTE] = INVALID_REG_ADDR,
439 [BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
440 [BQ27XXX_REG_TTES] = INVALID_REG_ADDR,
441 [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
442 [BQ27XXX_REG_NAC] = 0x08,
443 [BQ27XXX_REG_RC] = 0x0c,
444 [BQ27XXX_REG_FCC] = 0x0e,
445 [BQ27XXX_REG_CYCT] = INVALID_REG_ADDR,
446 [BQ27XXX_REG_AE] = INVALID_REG_ADDR,
447 [BQ27XXX_REG_SOC] = 0x1c,
448 [BQ27XXX_REG_DCAP] = 0x3c,
449 [BQ27XXX_REG_AP] = 0x18,
450 BQ27XXX_DM_REG_ROWS,
451 },
452 bq27426_regs[BQ27XXX_REG_MAX] = {
453 [BQ27XXX_REG_CTRL] = 0x00,
454 [BQ27XXX_REG_TEMP] = 0x02,
455 [BQ27XXX_REG_INT_TEMP] = 0x1e,
456 [BQ27XXX_REG_VOLT] = 0x04,
457 [BQ27XXX_REG_AI] = 0x10,
458 [BQ27XXX_REG_FLAGS] = 0x06,
459 [BQ27XXX_REG_TTE] = INVALID_REG_ADDR,
460 [BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
461 [BQ27XXX_REG_TTES] = INVALID_REG_ADDR,
462 [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
463 [BQ27XXX_REG_NAC] = 0x08,
464 [BQ27XXX_REG_RC] = 0x0c,
465 [BQ27XXX_REG_FCC] = 0x0e,
466 [BQ27XXX_REG_CYCT] = INVALID_REG_ADDR,
467 [BQ27XXX_REG_AE] = INVALID_REG_ADDR,
468 [BQ27XXX_REG_SOC] = 0x1c,
469 [BQ27XXX_REG_DCAP] = INVALID_REG_ADDR,
470 [BQ27XXX_REG_AP] = 0x18,
471 BQ27XXX_DM_REG_ROWS,
472 },
473 #define bq27411_regs bq27421_regs
474 #define bq27425_regs bq27421_regs
475 #define bq27441_regs bq27421_regs
476 #define bq27621_regs bq27421_regs
477 bq27z561_regs[BQ27XXX_REG_MAX] = {
478 [BQ27XXX_REG_CTRL] = 0x00,
479 [BQ27XXX_REG_TEMP] = 0x06,
480 [BQ27XXX_REG_INT_TEMP] = INVALID_REG_ADDR,
481 [BQ27XXX_REG_VOLT] = 0x08,
482 [BQ27XXX_REG_AI] = 0x14,
483 [BQ27XXX_REG_FLAGS] = 0x0a,
484 [BQ27XXX_REG_TTE] = 0x16,
485 [BQ27XXX_REG_TTF] = 0x18,
486 [BQ27XXX_REG_TTES] = INVALID_REG_ADDR,
487 [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
488 [BQ27XXX_REG_NAC] = INVALID_REG_ADDR,
489 [BQ27XXX_REG_RC] = 0x10,
490 [BQ27XXX_REG_FCC] = 0x12,
491 [BQ27XXX_REG_CYCT] = 0x2a,
492 [BQ27XXX_REG_AE] = 0x22,
493 [BQ27XXX_REG_SOC] = 0x2c,
494 [BQ27XXX_REG_DCAP] = 0x3c,
495 [BQ27XXX_REG_AP] = 0x22,
496 BQ27XXX_DM_REG_ROWS,
497 },
498 bq28z610_regs[BQ27XXX_REG_MAX] = {
499 [BQ27XXX_REG_CTRL] = 0x00,
500 [BQ27XXX_REG_TEMP] = 0x06,
501 [BQ27XXX_REG_INT_TEMP] = INVALID_REG_ADDR,
502 [BQ27XXX_REG_VOLT] = 0x08,
503 [BQ27XXX_REG_AI] = 0x14,
504 [BQ27XXX_REG_FLAGS] = 0x0a,
505 [BQ27XXX_REG_TTE] = 0x16,
506 [BQ27XXX_REG_TTF] = 0x18,
507 [BQ27XXX_REG_TTES] = INVALID_REG_ADDR,
508 [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
509 [BQ27XXX_REG_NAC] = INVALID_REG_ADDR,
510 [BQ27XXX_REG_RC] = 0x10,
511 [BQ27XXX_REG_FCC] = 0x12,
512 [BQ27XXX_REG_CYCT] = 0x2a,
513 [BQ27XXX_REG_AE] = 0x22,
514 [BQ27XXX_REG_SOC] = 0x2c,
515 [BQ27XXX_REG_DCAP] = 0x3c,
516 [BQ27XXX_REG_AP] = 0x22,
517 BQ27XXX_DM_REG_ROWS,
518 },
519 bq34z100_regs[BQ27XXX_REG_MAX] = {
520 [BQ27XXX_REG_CTRL] = 0x00,
521 [BQ27XXX_REG_TEMP] = 0x0c,
522 [BQ27XXX_REG_INT_TEMP] = 0x2a,
523 [BQ27XXX_REG_VOLT] = 0x08,
524 [BQ27XXX_REG_AI] = 0x0a,
525 [BQ27XXX_REG_FLAGS] = 0x0e,
526 [BQ27XXX_REG_TTE] = 0x18,
527 [BQ27XXX_REG_TTF] = 0x1a,
528 [BQ27XXX_REG_TTES] = 0x1e,
529 [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
530 [BQ27XXX_REG_NAC] = INVALID_REG_ADDR,
531 [BQ27XXX_REG_RC] = 0x04,
532 [BQ27XXX_REG_FCC] = 0x06,
533 [BQ27XXX_REG_CYCT] = 0x2c,
534 [BQ27XXX_REG_AE] = 0x24,
535 [BQ27XXX_REG_SOC] = 0x02,
536 [BQ27XXX_REG_DCAP] = 0x3c,
537 [BQ27XXX_REG_AP] = 0x22,
538 BQ27XXX_DM_REG_ROWS,
539 },
540 bq78z100_regs[BQ27XXX_REG_MAX] = {
541 [BQ27XXX_REG_CTRL] = 0x00,
542 [BQ27XXX_REG_TEMP] = 0x06,
543 [BQ27XXX_REG_INT_TEMP] = 0x28,
544 [BQ27XXX_REG_VOLT] = 0x08,
545 [BQ27XXX_REG_AI] = 0x14,
546 [BQ27XXX_REG_FLAGS] = 0x0a,
547 [BQ27XXX_REG_TTE] = 0x16,
548 [BQ27XXX_REG_TTF] = 0x18,
549 [BQ27XXX_REG_TTES] = 0x1c,
550 [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
551 [BQ27XXX_REG_NAC] = INVALID_REG_ADDR,
552 [BQ27XXX_REG_RC] = 0x10,
553 [BQ27XXX_REG_FCC] = 0x12,
554 [BQ27XXX_REG_CYCT] = 0x2a,
555 [BQ27XXX_REG_AE] = INVALID_REG_ADDR,
556 [BQ27XXX_REG_SOC] = 0x2c,
557 [BQ27XXX_REG_DCAP] = 0x3c,
558 [BQ27XXX_REG_AP] = 0x22,
559 BQ27XXX_DM_REG_ROWS,
560 };
561
562 static enum power_supply_property bq27000_props[] = {
563 POWER_SUPPLY_PROP_STATUS,
564 POWER_SUPPLY_PROP_PRESENT,
565 POWER_SUPPLY_PROP_VOLTAGE_NOW,
566 POWER_SUPPLY_PROP_CURRENT_NOW,
567 POWER_SUPPLY_PROP_CAPACITY,
568 POWER_SUPPLY_PROP_CAPACITY_LEVEL,
569 POWER_SUPPLY_PROP_TEMP,
570 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
571 POWER_SUPPLY_PROP_TIME_TO_EMPTY_AVG,
572 POWER_SUPPLY_PROP_TIME_TO_FULL_NOW,
573 POWER_SUPPLY_PROP_TECHNOLOGY,
574 POWER_SUPPLY_PROP_CHARGE_FULL,
575 POWER_SUPPLY_PROP_CHARGE_NOW,
576 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
577 POWER_SUPPLY_PROP_CYCLE_COUNT,
578 POWER_SUPPLY_PROP_ENERGY_NOW,
579 POWER_SUPPLY_PROP_POWER_AVG,
580 POWER_SUPPLY_PROP_HEALTH,
581 POWER_SUPPLY_PROP_MANUFACTURER,
582 };
583
584 static enum power_supply_property bq27010_props[] = {
585 POWER_SUPPLY_PROP_STATUS,
586 POWER_SUPPLY_PROP_PRESENT,
587 POWER_SUPPLY_PROP_VOLTAGE_NOW,
588 POWER_SUPPLY_PROP_CURRENT_NOW,
589 POWER_SUPPLY_PROP_CAPACITY,
590 POWER_SUPPLY_PROP_CAPACITY_LEVEL,
591 POWER_SUPPLY_PROP_TEMP,
592 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
593 POWER_SUPPLY_PROP_TIME_TO_EMPTY_AVG,
594 POWER_SUPPLY_PROP_TIME_TO_FULL_NOW,
595 POWER_SUPPLY_PROP_TECHNOLOGY,
596 POWER_SUPPLY_PROP_CHARGE_FULL,
597 POWER_SUPPLY_PROP_CHARGE_NOW,
598 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
599 POWER_SUPPLY_PROP_CYCLE_COUNT,
600 POWER_SUPPLY_PROP_HEALTH,
601 POWER_SUPPLY_PROP_MANUFACTURER,
602 };
603
604 #define bq2750x_props bq27510g3_props
605 #define bq2751x_props bq27510g3_props
606 #define bq2752x_props bq27510g3_props
607
608 static enum power_supply_property bq27500_props[] = {
609 POWER_SUPPLY_PROP_STATUS,
610 POWER_SUPPLY_PROP_PRESENT,
611 POWER_SUPPLY_PROP_VOLTAGE_NOW,
612 POWER_SUPPLY_PROP_CURRENT_NOW,
613 POWER_SUPPLY_PROP_CAPACITY,
614 POWER_SUPPLY_PROP_CAPACITY_LEVEL,
615 POWER_SUPPLY_PROP_TEMP,
616 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
617 POWER_SUPPLY_PROP_TIME_TO_FULL_NOW,
618 POWER_SUPPLY_PROP_TECHNOLOGY,
619 POWER_SUPPLY_PROP_CHARGE_FULL,
620 POWER_SUPPLY_PROP_CHARGE_NOW,
621 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
622 POWER_SUPPLY_PROP_CYCLE_COUNT,
623 POWER_SUPPLY_PROP_ENERGY_NOW,
624 POWER_SUPPLY_PROP_POWER_AVG,
625 POWER_SUPPLY_PROP_HEALTH,
626 POWER_SUPPLY_PROP_MANUFACTURER,
627 };
628 #define bq27510g1_props bq27500_props
629 #define bq27510g2_props bq27500_props
630
631 static enum power_supply_property bq27510g3_props[] = {
632 POWER_SUPPLY_PROP_STATUS,
633 POWER_SUPPLY_PROP_PRESENT,
634 POWER_SUPPLY_PROP_VOLTAGE_NOW,
635 POWER_SUPPLY_PROP_CURRENT_NOW,
636 POWER_SUPPLY_PROP_CAPACITY,
637 POWER_SUPPLY_PROP_CAPACITY_LEVEL,
638 POWER_SUPPLY_PROP_TEMP,
639 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
640 POWER_SUPPLY_PROP_TECHNOLOGY,
641 POWER_SUPPLY_PROP_CHARGE_FULL,
642 POWER_SUPPLY_PROP_CHARGE_NOW,
643 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
644 POWER_SUPPLY_PROP_CYCLE_COUNT,
645 POWER_SUPPLY_PROP_HEALTH,
646 POWER_SUPPLY_PROP_MANUFACTURER,
647 };
648
649 static enum power_supply_property bq27520g1_props[] = {
650 POWER_SUPPLY_PROP_STATUS,
651 POWER_SUPPLY_PROP_PRESENT,
652 POWER_SUPPLY_PROP_VOLTAGE_NOW,
653 POWER_SUPPLY_PROP_CURRENT_NOW,
654 POWER_SUPPLY_PROP_CAPACITY,
655 POWER_SUPPLY_PROP_CAPACITY_LEVEL,
656 POWER_SUPPLY_PROP_TEMP,
657 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
658 POWER_SUPPLY_PROP_TIME_TO_FULL_NOW,
659 POWER_SUPPLY_PROP_TECHNOLOGY,
660 POWER_SUPPLY_PROP_CHARGE_FULL,
661 POWER_SUPPLY_PROP_CHARGE_NOW,
662 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
663 POWER_SUPPLY_PROP_ENERGY_NOW,
664 POWER_SUPPLY_PROP_POWER_AVG,
665 POWER_SUPPLY_PROP_HEALTH,
666 POWER_SUPPLY_PROP_MANUFACTURER,
667 };
668
669 #define bq27520g2_props bq27500_props
670
671 static enum power_supply_property bq27520g3_props[] = {
672 POWER_SUPPLY_PROP_STATUS,
673 POWER_SUPPLY_PROP_PRESENT,
674 POWER_SUPPLY_PROP_VOLTAGE_NOW,
675 POWER_SUPPLY_PROP_CURRENT_NOW,
676 POWER_SUPPLY_PROP_CAPACITY,
677 POWER_SUPPLY_PROP_CAPACITY_LEVEL,
678 POWER_SUPPLY_PROP_TEMP,
679 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
680 POWER_SUPPLY_PROP_TECHNOLOGY,
681 POWER_SUPPLY_PROP_CHARGE_FULL,
682 POWER_SUPPLY_PROP_CHARGE_NOW,
683 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
684 POWER_SUPPLY_PROP_CYCLE_COUNT,
685 POWER_SUPPLY_PROP_ENERGY_NOW,
686 POWER_SUPPLY_PROP_POWER_AVG,
687 POWER_SUPPLY_PROP_HEALTH,
688 POWER_SUPPLY_PROP_MANUFACTURER,
689 };
690
691 static enum power_supply_property bq27520g4_props[] = {
692 POWER_SUPPLY_PROP_STATUS,
693 POWER_SUPPLY_PROP_PRESENT,
694 POWER_SUPPLY_PROP_VOLTAGE_NOW,
695 POWER_SUPPLY_PROP_CURRENT_NOW,
696 POWER_SUPPLY_PROP_CAPACITY,
697 POWER_SUPPLY_PROP_CAPACITY_LEVEL,
698 POWER_SUPPLY_PROP_TEMP,
699 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
700 POWER_SUPPLY_PROP_TECHNOLOGY,
701 POWER_SUPPLY_PROP_CHARGE_FULL,
702 POWER_SUPPLY_PROP_CHARGE_NOW,
703 POWER_SUPPLY_PROP_CYCLE_COUNT,
704 POWER_SUPPLY_PROP_HEALTH,
705 POWER_SUPPLY_PROP_MANUFACTURER,
706 };
707
708 static enum power_supply_property bq27521_props[] = {
709 POWER_SUPPLY_PROP_STATUS,
710 POWER_SUPPLY_PROP_PRESENT,
711 POWER_SUPPLY_PROP_VOLTAGE_NOW,
712 POWER_SUPPLY_PROP_CURRENT_NOW,
713 POWER_SUPPLY_PROP_TEMP,
714 POWER_SUPPLY_PROP_TECHNOLOGY,
715 };
716
717 static enum power_supply_property bq27530_props[] = {
718 POWER_SUPPLY_PROP_STATUS,
719 POWER_SUPPLY_PROP_PRESENT,
720 POWER_SUPPLY_PROP_VOLTAGE_NOW,
721 POWER_SUPPLY_PROP_CURRENT_NOW,
722 POWER_SUPPLY_PROP_CAPACITY,
723 POWER_SUPPLY_PROP_CAPACITY_LEVEL,
724 POWER_SUPPLY_PROP_TEMP,
725 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
726 POWER_SUPPLY_PROP_TECHNOLOGY,
727 POWER_SUPPLY_PROP_CHARGE_FULL,
728 POWER_SUPPLY_PROP_CHARGE_NOW,
729 POWER_SUPPLY_PROP_POWER_AVG,
730 POWER_SUPPLY_PROP_HEALTH,
731 POWER_SUPPLY_PROP_CYCLE_COUNT,
732 POWER_SUPPLY_PROP_MANUFACTURER,
733 };
734 #define bq27531_props bq27530_props
735
736 static enum power_supply_property bq27541_props[] = {
737 POWER_SUPPLY_PROP_STATUS,
738 POWER_SUPPLY_PROP_PRESENT,
739 POWER_SUPPLY_PROP_VOLTAGE_NOW,
740 POWER_SUPPLY_PROP_CURRENT_NOW,
741 POWER_SUPPLY_PROP_CAPACITY,
742 POWER_SUPPLY_PROP_CAPACITY_LEVEL,
743 POWER_SUPPLY_PROP_TEMP,
744 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
745 POWER_SUPPLY_PROP_TECHNOLOGY,
746 POWER_SUPPLY_PROP_CHARGE_FULL,
747 POWER_SUPPLY_PROP_CHARGE_NOW,
748 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
749 POWER_SUPPLY_PROP_CYCLE_COUNT,
750 POWER_SUPPLY_PROP_POWER_AVG,
751 POWER_SUPPLY_PROP_HEALTH,
752 POWER_SUPPLY_PROP_MANUFACTURER,
753 };
754 #define bq27542_props bq27541_props
755 #define bq27546_props bq27541_props
756 #define bq27742_props bq27541_props
757
758 static enum power_supply_property bq27545_props[] = {
759 POWER_SUPPLY_PROP_STATUS,
760 POWER_SUPPLY_PROP_PRESENT,
761 POWER_SUPPLY_PROP_VOLTAGE_NOW,
762 POWER_SUPPLY_PROP_CURRENT_NOW,
763 POWER_SUPPLY_PROP_CAPACITY,
764 POWER_SUPPLY_PROP_CAPACITY_LEVEL,
765 POWER_SUPPLY_PROP_TEMP,
766 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
767 POWER_SUPPLY_PROP_TECHNOLOGY,
768 POWER_SUPPLY_PROP_CHARGE_FULL,
769 POWER_SUPPLY_PROP_CHARGE_NOW,
770 POWER_SUPPLY_PROP_HEALTH,
771 POWER_SUPPLY_PROP_CYCLE_COUNT,
772 POWER_SUPPLY_PROP_POWER_AVG,
773 POWER_SUPPLY_PROP_MANUFACTURER,
774 };
775
776 static enum power_supply_property bq27421_props[] = {
777 POWER_SUPPLY_PROP_STATUS,
778 POWER_SUPPLY_PROP_PRESENT,
779 POWER_SUPPLY_PROP_VOLTAGE_NOW,
780 POWER_SUPPLY_PROP_CURRENT_NOW,
781 POWER_SUPPLY_PROP_CAPACITY,
782 POWER_SUPPLY_PROP_CAPACITY_LEVEL,
783 POWER_SUPPLY_PROP_TEMP,
784 POWER_SUPPLY_PROP_TECHNOLOGY,
785 POWER_SUPPLY_PROP_CHARGE_FULL,
786 POWER_SUPPLY_PROP_CHARGE_NOW,
787 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
788 POWER_SUPPLY_PROP_MANUFACTURER,
789 };
790 #define bq27411_props bq27421_props
791 #define bq27425_props bq27421_props
792 #define bq27441_props bq27421_props
793 #define bq27621_props bq27421_props
794
795 static enum power_supply_property bq27426_props[] = {
796 POWER_SUPPLY_PROP_STATUS,
797 POWER_SUPPLY_PROP_PRESENT,
798 POWER_SUPPLY_PROP_VOLTAGE_NOW,
799 POWER_SUPPLY_PROP_CURRENT_NOW,
800 POWER_SUPPLY_PROP_CAPACITY,
801 POWER_SUPPLY_PROP_CAPACITY_LEVEL,
802 POWER_SUPPLY_PROP_TEMP,
803 POWER_SUPPLY_PROP_TECHNOLOGY,
804 POWER_SUPPLY_PROP_CHARGE_FULL,
805 POWER_SUPPLY_PROP_CHARGE_NOW,
806 POWER_SUPPLY_PROP_MANUFACTURER,
807 };
808
809 static enum power_supply_property bq27z561_props[] = {
810 POWER_SUPPLY_PROP_STATUS,
811 POWER_SUPPLY_PROP_PRESENT,
812 POWER_SUPPLY_PROP_VOLTAGE_NOW,
813 POWER_SUPPLY_PROP_CURRENT_NOW,
814 POWER_SUPPLY_PROP_CAPACITY,
815 POWER_SUPPLY_PROP_CAPACITY_LEVEL,
816 POWER_SUPPLY_PROP_TEMP,
817 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
818 POWER_SUPPLY_PROP_TIME_TO_FULL_NOW,
819 POWER_SUPPLY_PROP_TECHNOLOGY,
820 POWER_SUPPLY_PROP_CHARGE_FULL,
821 POWER_SUPPLY_PROP_CHARGE_NOW,
822 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
823 POWER_SUPPLY_PROP_CYCLE_COUNT,
824 POWER_SUPPLY_PROP_POWER_AVG,
825 POWER_SUPPLY_PROP_HEALTH,
826 POWER_SUPPLY_PROP_MANUFACTURER,
827 };
828
829 static enum power_supply_property bq28z610_props[] = {
830 POWER_SUPPLY_PROP_STATUS,
831 POWER_SUPPLY_PROP_PRESENT,
832 POWER_SUPPLY_PROP_VOLTAGE_NOW,
833 POWER_SUPPLY_PROP_CURRENT_NOW,
834 POWER_SUPPLY_PROP_CAPACITY,
835 POWER_SUPPLY_PROP_CAPACITY_LEVEL,
836 POWER_SUPPLY_PROP_TEMP,
837 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
838 POWER_SUPPLY_PROP_TIME_TO_FULL_NOW,
839 POWER_SUPPLY_PROP_TECHNOLOGY,
840 POWER_SUPPLY_PROP_CHARGE_FULL,
841 POWER_SUPPLY_PROP_CHARGE_NOW,
842 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
843 POWER_SUPPLY_PROP_CYCLE_COUNT,
844 POWER_SUPPLY_PROP_POWER_AVG,
845 POWER_SUPPLY_PROP_HEALTH,
846 POWER_SUPPLY_PROP_MANUFACTURER,
847 };
848
849 static enum power_supply_property bq34z100_props[] = {
850 POWER_SUPPLY_PROP_STATUS,
851 POWER_SUPPLY_PROP_PRESENT,
852 POWER_SUPPLY_PROP_VOLTAGE_NOW,
853 POWER_SUPPLY_PROP_CURRENT_NOW,
854 POWER_SUPPLY_PROP_CAPACITY,
855 POWER_SUPPLY_PROP_CAPACITY_LEVEL,
856 POWER_SUPPLY_PROP_TEMP,
857 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
858 POWER_SUPPLY_PROP_TIME_TO_EMPTY_AVG,
859 POWER_SUPPLY_PROP_TIME_TO_FULL_NOW,
860 POWER_SUPPLY_PROP_TECHNOLOGY,
861 POWER_SUPPLY_PROP_CHARGE_FULL,
862 POWER_SUPPLY_PROP_CHARGE_NOW,
863 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
864 POWER_SUPPLY_PROP_CYCLE_COUNT,
865 POWER_SUPPLY_PROP_ENERGY_NOW,
866 POWER_SUPPLY_PROP_POWER_AVG,
867 POWER_SUPPLY_PROP_HEALTH,
868 POWER_SUPPLY_PROP_MANUFACTURER,
869 };
870
871 static enum power_supply_property bq78z100_props[] = {
872 POWER_SUPPLY_PROP_STATUS,
873 POWER_SUPPLY_PROP_PRESENT,
874 POWER_SUPPLY_PROP_VOLTAGE_NOW,
875 POWER_SUPPLY_PROP_CURRENT_NOW,
876 POWER_SUPPLY_PROP_CAPACITY,
877 POWER_SUPPLY_PROP_CAPACITY_LEVEL,
878 POWER_SUPPLY_PROP_TEMP,
879 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
880 POWER_SUPPLY_PROP_TIME_TO_FULL_NOW,
881 POWER_SUPPLY_PROP_TECHNOLOGY,
882 POWER_SUPPLY_PROP_CHARGE_FULL,
883 POWER_SUPPLY_PROP_CHARGE_NOW,
884 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
885 POWER_SUPPLY_PROP_CYCLE_COUNT,
886 POWER_SUPPLY_PROP_POWER_AVG,
887 POWER_SUPPLY_PROP_HEALTH,
888 POWER_SUPPLY_PROP_MANUFACTURER,
889 };
890
891 struct bq27xxx_dm_reg {
892 u8 subclass_id;
893 u8 offset;
894 u8 bytes;
895 u16 min, max;
896 };
897
898 enum bq27xxx_dm_reg_id {
899 BQ27XXX_DM_DESIGN_CAPACITY = 0,
900 BQ27XXX_DM_DESIGN_ENERGY,
901 BQ27XXX_DM_TERMINATE_VOLTAGE,
902 };
903
904 #define bq27000_dm_regs NULL
905 #define bq27010_dm_regs NULL
906 #define bq2750x_dm_regs NULL
907 #define bq2751x_dm_regs NULL
908 #define bq2752x_dm_regs NULL
909
910 #if 0 /* not yet tested */
911 static struct bq27xxx_dm_reg bq27500_dm_regs[] = {
912 [BQ27XXX_DM_DESIGN_CAPACITY] = { 48, 10, 2, 0, 65535 },
913 [BQ27XXX_DM_DESIGN_ENERGY] = { }, /* missing on chip */
914 [BQ27XXX_DM_TERMINATE_VOLTAGE] = { 80, 48, 2, 1000, 32767 },
915 };
916 #else
917 #define bq27500_dm_regs NULL
918 #endif
919
920 /* todo create data memory definitions from datasheets and test on chips */
921 #define bq27510g1_dm_regs NULL
922 #define bq27510g2_dm_regs NULL
923 #define bq27510g3_dm_regs NULL
924 #define bq27520g1_dm_regs NULL
925 #define bq27520g2_dm_regs NULL
926 #define bq27520g3_dm_regs NULL
927 #define bq27520g4_dm_regs NULL
928 #define bq27521_dm_regs NULL
929 #define bq27530_dm_regs NULL
930 #define bq27531_dm_regs NULL
931 #define bq27541_dm_regs NULL
932 #define bq27542_dm_regs NULL
933 #define bq27546_dm_regs NULL
934 #define bq27742_dm_regs NULL
935
936 #if 0 /* not yet tested */
937 static struct bq27xxx_dm_reg bq27545_dm_regs[] = {
938 [BQ27XXX_DM_DESIGN_CAPACITY] = { 48, 23, 2, 0, 32767 },
939 [BQ27XXX_DM_DESIGN_ENERGY] = { 48, 25, 2, 0, 32767 },
940 [BQ27XXX_DM_TERMINATE_VOLTAGE] = { 80, 67, 2, 2800, 3700 },
941 };
942 #else
943 #define bq27545_dm_regs NULL
944 #endif
945
946 static struct bq27xxx_dm_reg bq27411_dm_regs[] = {
947 [BQ27XXX_DM_DESIGN_CAPACITY] = { 82, 10, 2, 0, 32767 },
948 [BQ27XXX_DM_DESIGN_ENERGY] = { 82, 12, 2, 0, 32767 },
949 [BQ27XXX_DM_TERMINATE_VOLTAGE] = { 82, 16, 2, 2800, 3700 },
950 };
951
952 static struct bq27xxx_dm_reg bq27421_dm_regs[] = {
953 [BQ27XXX_DM_DESIGN_CAPACITY] = { 82, 10, 2, 0, 8000 },
954 [BQ27XXX_DM_DESIGN_ENERGY] = { 82, 12, 2, 0, 32767 },
955 [BQ27XXX_DM_TERMINATE_VOLTAGE] = { 82, 16, 2, 2500, 3700 },
956 };
957
958 static struct bq27xxx_dm_reg bq27425_dm_regs[] = {
959 [BQ27XXX_DM_DESIGN_CAPACITY] = { 82, 12, 2, 0, 32767 },
960 [BQ27XXX_DM_DESIGN_ENERGY] = { 82, 14, 2, 0, 32767 },
961 [BQ27XXX_DM_TERMINATE_VOLTAGE] = { 82, 18, 2, 2800, 3700 },
962 };
963
964 static struct bq27xxx_dm_reg bq27426_dm_regs[] = {
965 [BQ27XXX_DM_DESIGN_CAPACITY] = { 82, 6, 2, 0, 8000 },
966 [BQ27XXX_DM_DESIGN_ENERGY] = { 82, 8, 2, 0, 32767 },
967 [BQ27XXX_DM_TERMINATE_VOLTAGE] = { 82, 10, 2, 2500, 3700 },
968 };
969
970 #if 0 /* not yet tested */
971 #define bq27441_dm_regs bq27421_dm_regs
972 #else
973 #define bq27441_dm_regs NULL
974 #endif
975
976 #if 0 /* not yet tested */
977 static struct bq27xxx_dm_reg bq27621_dm_regs[] = {
978 [BQ27XXX_DM_DESIGN_CAPACITY] = { 82, 3, 2, 0, 8000 },
979 [BQ27XXX_DM_DESIGN_ENERGY] = { 82, 5, 2, 0, 32767 },
980 [BQ27XXX_DM_TERMINATE_VOLTAGE] = { 82, 9, 2, 2500, 3700 },
981 };
982 #else
983 #define bq27621_dm_regs NULL
984 #endif
985
986 #define bq27z561_dm_regs NULL
987 #define bq28z610_dm_regs NULL
988 #define bq34z100_dm_regs NULL
989 #define bq78z100_dm_regs NULL
990
991 #define BQ27XXX_O_ZERO BIT(0)
992 #define BQ27XXX_O_OTDC BIT(1) /* has OTC/OTD overtemperature flags */
993 #define BQ27XXX_O_UTOT BIT(2) /* has OT overtemperature flag */
994 #define BQ27XXX_O_CFGUP BIT(3)
995 #define BQ27XXX_O_RAM BIT(4)
996 #define BQ27Z561_O_BITS BIT(5)
997 #define BQ27XXX_O_SOC_SI BIT(6) /* SoC is single register */
998 #define BQ27XXX_O_HAS_CI BIT(7) /* has Capacity Inaccurate flag */
999 #define BQ27XXX_O_MUL_CHEM BIT(8) /* multiple chemistries supported */
1000
1001 #define BQ27XXX_DATA(ref, key, opt) { \
1002 .opts = (opt), \
1003 .unseal_key = key, \
1004 .regs = ref##_regs, \
1005 .dm_regs = ref##_dm_regs, \
1006 .props = ref##_props, \
1007 .props_size = ARRAY_SIZE(ref##_props) }
1008
1009 static struct {
1010 u32 opts;
1011 u32 unseal_key;
1012 u8 *regs;
1013 struct bq27xxx_dm_reg *dm_regs;
1014 enum power_supply_property *props;
1015 size_t props_size;
1016 } bq27xxx_chip_data[] = {
1017 [BQ27000] = BQ27XXX_DATA(bq27000, 0 , BQ27XXX_O_ZERO | BQ27XXX_O_SOC_SI | BQ27XXX_O_HAS_CI),
1018 [BQ27010] = BQ27XXX_DATA(bq27010, 0 , BQ27XXX_O_ZERO | BQ27XXX_O_SOC_SI | BQ27XXX_O_HAS_CI),
1019 [BQ2750X] = BQ27XXX_DATA(bq2750x, 0 , BQ27XXX_O_OTDC),
1020 [BQ2751X] = BQ27XXX_DATA(bq2751x, 0 , BQ27XXX_O_OTDC),
1021 [BQ2752X] = BQ27XXX_DATA(bq2752x, 0 , BQ27XXX_O_OTDC),
1022 [BQ27500] = BQ27XXX_DATA(bq27500, 0x04143672, BQ27XXX_O_OTDC),
1023 [BQ27510G1] = BQ27XXX_DATA(bq27510g1, 0 , BQ27XXX_O_OTDC),
1024 [BQ27510G2] = BQ27XXX_DATA(bq27510g2, 0 , BQ27XXX_O_OTDC),
1025 [BQ27510G3] = BQ27XXX_DATA(bq27510g3, 0 , BQ27XXX_O_OTDC),
1026 [BQ27520G1] = BQ27XXX_DATA(bq27520g1, 0 , BQ27XXX_O_OTDC),
1027 [BQ27520G2] = BQ27XXX_DATA(bq27520g2, 0 , BQ27XXX_O_OTDC),
1028 [BQ27520G3] = BQ27XXX_DATA(bq27520g3, 0 , BQ27XXX_O_OTDC),
1029 [BQ27520G4] = BQ27XXX_DATA(bq27520g4, 0 , BQ27XXX_O_OTDC),
1030 [BQ27521] = BQ27XXX_DATA(bq27521, 0 , 0),
1031 [BQ27530] = BQ27XXX_DATA(bq27530, 0 , BQ27XXX_O_UTOT),
1032 [BQ27531] = BQ27XXX_DATA(bq27531, 0 , BQ27XXX_O_UTOT),
1033 [BQ27541] = BQ27XXX_DATA(bq27541, 0 , BQ27XXX_O_OTDC),
1034 [BQ27542] = BQ27XXX_DATA(bq27542, 0 , BQ27XXX_O_OTDC),
1035 [BQ27546] = BQ27XXX_DATA(bq27546, 0 , BQ27XXX_O_OTDC),
1036 [BQ27742] = BQ27XXX_DATA(bq27742, 0 , BQ27XXX_O_OTDC),
1037 [BQ27545] = BQ27XXX_DATA(bq27545, 0x04143672, BQ27XXX_O_OTDC),
1038 [BQ27411] = BQ27XXX_DATA(bq27411, 0x80008000, BQ27XXX_O_UTOT | BQ27XXX_O_CFGUP | BQ27XXX_O_RAM),
1039 [BQ27421] = BQ27XXX_DATA(bq27421, 0x80008000, BQ27XXX_O_UTOT | BQ27XXX_O_CFGUP | BQ27XXX_O_RAM),
1040 [BQ27425] = BQ27XXX_DATA(bq27425, 0x04143672, BQ27XXX_O_UTOT | BQ27XXX_O_CFGUP),
1041 [BQ27426] = BQ27XXX_DATA(bq27426, 0x80008000, BQ27XXX_O_UTOT | BQ27XXX_O_CFGUP | BQ27XXX_O_RAM),
1042 [BQ27441] = BQ27XXX_DATA(bq27441, 0x80008000, BQ27XXX_O_UTOT | BQ27XXX_O_CFGUP | BQ27XXX_O_RAM),
1043 [BQ27621] = BQ27XXX_DATA(bq27621, 0x80008000, BQ27XXX_O_UTOT | BQ27XXX_O_CFGUP | BQ27XXX_O_RAM),
1044 [BQ27Z561] = BQ27XXX_DATA(bq27z561, 0 , BQ27Z561_O_BITS),
1045 [BQ28Z610] = BQ27XXX_DATA(bq28z610, 0 , BQ27Z561_O_BITS),
1046 [BQ34Z100] = BQ27XXX_DATA(bq34z100, 0 , BQ27XXX_O_OTDC | BQ27XXX_O_SOC_SI | \
1047 BQ27XXX_O_HAS_CI | BQ27XXX_O_MUL_CHEM),
1048 [BQ78Z100] = BQ27XXX_DATA(bq78z100, 0 , BQ27Z561_O_BITS),
1049 };
1050
1051 static DEFINE_MUTEX(bq27xxx_list_lock);
1052 static LIST_HEAD(bq27xxx_battery_devices);
1053
1054 #define BQ27XXX_MSLEEP(i) usleep_range((i)*1000, (i)*1000+500)
1055
1056 #define BQ27XXX_DM_SZ 32
1057
1058 /**
1059 * struct bq27xxx_dm_buf - chip data memory buffer
1060 * @class: data memory subclass_id
1061 * @block: data memory block number
1062 * @data: data from/for the block
1063 * @has_data: true if data has been filled by read
1064 * @dirty: true if data has changed since last read/write
1065 *
1066 * Encapsulates info required to manage chip data memory blocks.
1067 */
1068 struct bq27xxx_dm_buf {
1069 u8 class;
1070 u8 block;
1071 u8 data[BQ27XXX_DM_SZ];
1072 bool has_data, dirty;
1073 };
1074
1075 #define BQ27XXX_DM_BUF(di, i) { \
1076 .class = (di)->dm_regs[i].subclass_id, \
1077 .block = (di)->dm_regs[i].offset / BQ27XXX_DM_SZ, \
1078 }
1079
bq27xxx_dm_reg_ptr(struct bq27xxx_dm_buf * buf,struct bq27xxx_dm_reg * reg)1080 static inline __be16 *bq27xxx_dm_reg_ptr(struct bq27xxx_dm_buf *buf,
1081 struct bq27xxx_dm_reg *reg)
1082 {
1083 if (buf->class == reg->subclass_id &&
1084 buf->block == reg->offset / BQ27XXX_DM_SZ)
1085 return (__be16 *) (buf->data + reg->offset % BQ27XXX_DM_SZ);
1086
1087 return NULL;
1088 }
1089
1090 static const char * const bq27xxx_dm_reg_name[] = {
1091 [BQ27XXX_DM_DESIGN_CAPACITY] = "design-capacity",
1092 [BQ27XXX_DM_DESIGN_ENERGY] = "design-energy",
1093 [BQ27XXX_DM_TERMINATE_VOLTAGE] = "terminate-voltage",
1094 };
1095
1096
1097 static bool bq27xxx_dt_to_nvm = true;
1098 module_param_named(dt_monitored_battery_updates_nvm, bq27xxx_dt_to_nvm, bool, 0444);
1099 MODULE_PARM_DESC(dt_monitored_battery_updates_nvm,
1100 "Devicetree monitored-battery config updates data memory on NVM/flash chips.\n"
1101 "Users must set this =0 when installing a different type of battery!\n"
1102 "Default is =1."
1103 #ifndef CONFIG_BATTERY_BQ27XXX_DT_UPDATES_NVM
1104 "\nSetting this affects future kernel updates, not the current configuration."
1105 #endif
1106 );
1107
poll_interval_param_set(const char * val,const struct kernel_param * kp)1108 static int poll_interval_param_set(const char *val, const struct kernel_param *kp)
1109 {
1110 struct bq27xxx_device_info *di;
1111 unsigned int prev_val = *(unsigned int *) kp->arg;
1112 int ret;
1113
1114 ret = param_set_uint(val, kp);
1115 if (ret < 0 || prev_val == *(unsigned int *) kp->arg)
1116 return ret;
1117
1118 mutex_lock(&bq27xxx_list_lock);
1119 list_for_each_entry(di, &bq27xxx_battery_devices, list)
1120 mod_delayed_work(system_wq, &di->work, 0);
1121 mutex_unlock(&bq27xxx_list_lock);
1122
1123 return ret;
1124 }
1125
1126 static const struct kernel_param_ops param_ops_poll_interval = {
1127 .get = param_get_uint,
1128 .set = poll_interval_param_set,
1129 };
1130
1131 static unsigned int poll_interval = 360;
1132 module_param_cb(poll_interval, ¶m_ops_poll_interval, &poll_interval, 0644);
1133 MODULE_PARM_DESC(poll_interval,
1134 "battery poll interval in seconds - 0 disables polling");
1135
1136 /*
1137 * Common code for BQ27xxx devices
1138 */
1139
bq27xxx_read(struct bq27xxx_device_info * di,int reg_index,bool single)1140 static inline int bq27xxx_read(struct bq27xxx_device_info *di, int reg_index,
1141 bool single)
1142 {
1143 int ret;
1144
1145 if (!di || di->regs[reg_index] == INVALID_REG_ADDR)
1146 return -EINVAL;
1147
1148 ret = di->bus.read(di, di->regs[reg_index], single);
1149 if (ret < 0)
1150 dev_dbg(di->dev, "failed to read register 0x%02x (index %d)\n",
1151 di->regs[reg_index], reg_index);
1152
1153 return ret;
1154 }
1155
bq27xxx_write(struct bq27xxx_device_info * di,int reg_index,u16 value,bool single)1156 static inline int bq27xxx_write(struct bq27xxx_device_info *di, int reg_index,
1157 u16 value, bool single)
1158 {
1159 int ret;
1160
1161 if (!di || di->regs[reg_index] == INVALID_REG_ADDR)
1162 return -EINVAL;
1163
1164 if (!di->bus.write)
1165 return -EPERM;
1166
1167 ret = di->bus.write(di, di->regs[reg_index], value, single);
1168 if (ret < 0)
1169 dev_dbg(di->dev, "failed to write register 0x%02x (index %d)\n",
1170 di->regs[reg_index], reg_index);
1171
1172 return ret;
1173 }
1174
bq27xxx_read_block(struct bq27xxx_device_info * di,int reg_index,u8 * data,int len)1175 static inline int bq27xxx_read_block(struct bq27xxx_device_info *di, int reg_index,
1176 u8 *data, int len)
1177 {
1178 int ret;
1179
1180 if (!di || di->regs[reg_index] == INVALID_REG_ADDR)
1181 return -EINVAL;
1182
1183 if (!di->bus.read_bulk)
1184 return -EPERM;
1185
1186 ret = di->bus.read_bulk(di, di->regs[reg_index], data, len);
1187 if (ret < 0)
1188 dev_dbg(di->dev, "failed to read_bulk register 0x%02x (index %d)\n",
1189 di->regs[reg_index], reg_index);
1190
1191 return ret;
1192 }
1193
bq27xxx_write_block(struct bq27xxx_device_info * di,int reg_index,u8 * data,int len)1194 static inline int bq27xxx_write_block(struct bq27xxx_device_info *di, int reg_index,
1195 u8 *data, int len)
1196 {
1197 int ret;
1198
1199 if (!di || di->regs[reg_index] == INVALID_REG_ADDR)
1200 return -EINVAL;
1201
1202 if (!di->bus.write_bulk)
1203 return -EPERM;
1204
1205 ret = di->bus.write_bulk(di, di->regs[reg_index], data, len);
1206 if (ret < 0)
1207 dev_dbg(di->dev, "failed to write_bulk register 0x%02x (index %d)\n",
1208 di->regs[reg_index], reg_index);
1209
1210 return ret;
1211 }
1212
bq27xxx_battery_seal(struct bq27xxx_device_info * di)1213 static int bq27xxx_battery_seal(struct bq27xxx_device_info *di)
1214 {
1215 int ret;
1216
1217 ret = bq27xxx_write(di, BQ27XXX_REG_CTRL, BQ27XXX_SEALED, false);
1218 if (ret < 0) {
1219 dev_err(di->dev, "bus error on seal: %d\n", ret);
1220 return ret;
1221 }
1222
1223 return 0;
1224 }
1225
bq27xxx_battery_unseal(struct bq27xxx_device_info * di)1226 static int bq27xxx_battery_unseal(struct bq27xxx_device_info *di)
1227 {
1228 int ret;
1229
1230 if (di->unseal_key == 0) {
1231 dev_err(di->dev, "unseal failed due to missing key\n");
1232 return -EINVAL;
1233 }
1234
1235 ret = bq27xxx_write(di, BQ27XXX_REG_CTRL, (u16)(di->unseal_key >> 16), false);
1236 if (ret < 0)
1237 goto out;
1238
1239 ret = bq27xxx_write(di, BQ27XXX_REG_CTRL, (u16)di->unseal_key, false);
1240 if (ret < 0)
1241 goto out;
1242
1243 return 0;
1244
1245 out:
1246 dev_err(di->dev, "bus error on unseal: %d\n", ret);
1247 return ret;
1248 }
1249
bq27xxx_battery_checksum_dm_block(struct bq27xxx_dm_buf * buf)1250 static u8 bq27xxx_battery_checksum_dm_block(struct bq27xxx_dm_buf *buf)
1251 {
1252 u16 sum = 0;
1253 int i;
1254
1255 for (i = 0; i < BQ27XXX_DM_SZ; i++)
1256 sum += buf->data[i];
1257 sum &= 0xff;
1258
1259 return 0xff - sum;
1260 }
1261
bq27xxx_battery_read_dm_block(struct bq27xxx_device_info * di,struct bq27xxx_dm_buf * buf)1262 static int bq27xxx_battery_read_dm_block(struct bq27xxx_device_info *di,
1263 struct bq27xxx_dm_buf *buf)
1264 {
1265 int ret;
1266
1267 buf->has_data = false;
1268
1269 ret = bq27xxx_write(di, BQ27XXX_DM_CLASS, buf->class, true);
1270 if (ret < 0)
1271 goto out;
1272
1273 ret = bq27xxx_write(di, BQ27XXX_DM_BLOCK, buf->block, true);
1274 if (ret < 0)
1275 goto out;
1276
1277 BQ27XXX_MSLEEP(1);
1278
1279 ret = bq27xxx_read_block(di, BQ27XXX_DM_DATA, buf->data, BQ27XXX_DM_SZ);
1280 if (ret < 0)
1281 goto out;
1282
1283 ret = bq27xxx_read(di, BQ27XXX_DM_CKSUM, true);
1284 if (ret < 0)
1285 goto out;
1286
1287 if ((u8)ret != bq27xxx_battery_checksum_dm_block(buf)) {
1288 ret = -EINVAL;
1289 goto out;
1290 }
1291
1292 buf->has_data = true;
1293 buf->dirty = false;
1294
1295 return 0;
1296
1297 out:
1298 dev_err(di->dev, "bus error reading chip memory: %d\n", ret);
1299 return ret;
1300 }
1301
bq27xxx_battery_update_dm_block(struct bq27xxx_device_info * di,struct bq27xxx_dm_buf * buf,enum bq27xxx_dm_reg_id reg_id,unsigned int val)1302 static void bq27xxx_battery_update_dm_block(struct bq27xxx_device_info *di,
1303 struct bq27xxx_dm_buf *buf,
1304 enum bq27xxx_dm_reg_id reg_id,
1305 unsigned int val)
1306 {
1307 struct bq27xxx_dm_reg *reg = &di->dm_regs[reg_id];
1308 const char *str = bq27xxx_dm_reg_name[reg_id];
1309 __be16 *prev = bq27xxx_dm_reg_ptr(buf, reg);
1310
1311 if (prev == NULL) {
1312 dev_warn(di->dev, "buffer does not match %s dm spec\n", str);
1313 return;
1314 }
1315
1316 if (reg->bytes != 2) {
1317 dev_warn(di->dev, "%s dm spec has unsupported byte size\n", str);
1318 return;
1319 }
1320
1321 if (!buf->has_data)
1322 return;
1323
1324 if (be16_to_cpup(prev) == val) {
1325 dev_info(di->dev, "%s has %u\n", str, val);
1326 return;
1327 }
1328
1329 #ifdef CONFIG_BATTERY_BQ27XXX_DT_UPDATES_NVM
1330 if (!(di->opts & BQ27XXX_O_RAM) && !bq27xxx_dt_to_nvm) {
1331 #else
1332 if (!(di->opts & BQ27XXX_O_RAM)) {
1333 #endif
1334 /* devicetree and NVM differ; defer to NVM */
1335 dev_warn(di->dev, "%s has %u; update to %u disallowed "
1336 #ifdef CONFIG_BATTERY_BQ27XXX_DT_UPDATES_NVM
1337 "by dt_monitored_battery_updates_nvm=0"
1338 #else
1339 "for flash/NVM data memory"
1340 #endif
1341 "\n", str, be16_to_cpup(prev), val);
1342 return;
1343 }
1344
1345 dev_info(di->dev, "update %s to %u\n", str, val);
1346
1347 *prev = cpu_to_be16(val);
1348 buf->dirty = true;
1349 }
1350
1351 static int bq27xxx_battery_cfgupdate_priv(struct bq27xxx_device_info *di, bool active)
1352 {
1353 const int limit = 100;
1354 u16 cmd = active ? BQ27XXX_SET_CFGUPDATE : BQ27XXX_SOFT_RESET;
1355 int ret, try = limit;
1356
1357 ret = bq27xxx_write(di, BQ27XXX_REG_CTRL, cmd, false);
1358 if (ret < 0)
1359 return ret;
1360
1361 do {
1362 BQ27XXX_MSLEEP(25);
1363 ret = bq27xxx_read(di, BQ27XXX_REG_FLAGS, false);
1364 if (ret < 0)
1365 return ret;
1366 } while (!!(ret & BQ27XXX_FLAG_CFGUP) != active && --try);
1367
1368 if (!try && di->chip != BQ27425) { // 425 has a bug
1369 dev_err(di->dev, "timed out waiting for cfgupdate flag %d\n", active);
1370 return -EINVAL;
1371 }
1372
1373 if (limit - try > 3)
1374 dev_warn(di->dev, "cfgupdate %d, retries %d\n", active, limit - try);
1375
1376 return 0;
1377 }
1378
1379 static inline int bq27xxx_battery_set_cfgupdate(struct bq27xxx_device_info *di)
1380 {
1381 int ret = bq27xxx_battery_cfgupdate_priv(di, true);
1382 if (ret < 0 && ret != -EINVAL)
1383 dev_err(di->dev, "bus error on set_cfgupdate: %d\n", ret);
1384
1385 return ret;
1386 }
1387
1388 static inline int bq27xxx_battery_soft_reset(struct bq27xxx_device_info *di)
1389 {
1390 int ret = bq27xxx_battery_cfgupdate_priv(di, false);
1391 if (ret < 0 && ret != -EINVAL)
1392 dev_err(di->dev, "bus error on soft_reset: %d\n", ret);
1393
1394 return ret;
1395 }
1396
1397 static int bq27xxx_battery_write_dm_block(struct bq27xxx_device_info *di,
1398 struct bq27xxx_dm_buf *buf)
1399 {
1400 bool cfgup = di->opts & BQ27XXX_O_CFGUP;
1401 int ret;
1402
1403 if (!buf->dirty)
1404 return 0;
1405
1406 if (cfgup) {
1407 ret = bq27xxx_battery_set_cfgupdate(di);
1408 if (ret < 0)
1409 return ret;
1410 }
1411
1412 ret = bq27xxx_write(di, BQ27XXX_DM_CTRL, 0, true);
1413 if (ret < 0)
1414 goto out;
1415
1416 ret = bq27xxx_write(di, BQ27XXX_DM_CLASS, buf->class, true);
1417 if (ret < 0)
1418 goto out;
1419
1420 ret = bq27xxx_write(di, BQ27XXX_DM_BLOCK, buf->block, true);
1421 if (ret < 0)
1422 goto out;
1423
1424 BQ27XXX_MSLEEP(1);
1425
1426 ret = bq27xxx_write_block(di, BQ27XXX_DM_DATA, buf->data, BQ27XXX_DM_SZ);
1427 if (ret < 0)
1428 goto out;
1429
1430 ret = bq27xxx_write(di, BQ27XXX_DM_CKSUM,
1431 bq27xxx_battery_checksum_dm_block(buf), true);
1432 if (ret < 0)
1433 goto out;
1434
1435 /* DO NOT read BQ27XXX_DM_CKSUM here to verify it! That may cause NVM
1436 * corruption on the '425 chip (and perhaps others), which can damage
1437 * the chip.
1438 */
1439
1440 if (cfgup) {
1441 BQ27XXX_MSLEEP(1);
1442 ret = bq27xxx_battery_soft_reset(di);
1443 if (ret < 0)
1444 return ret;
1445 } else {
1446 BQ27XXX_MSLEEP(100); /* flash DM updates in <100ms */
1447 }
1448
1449 buf->dirty = false;
1450
1451 return 0;
1452
1453 out:
1454 if (cfgup)
1455 bq27xxx_battery_soft_reset(di);
1456
1457 dev_err(di->dev, "bus error writing chip memory: %d\n", ret);
1458 return ret;
1459 }
1460
1461 static void bq27xxx_battery_set_config(struct bq27xxx_device_info *di,
1462 struct power_supply_battery_info *info)
1463 {
1464 struct bq27xxx_dm_buf bd = BQ27XXX_DM_BUF(di, BQ27XXX_DM_DESIGN_CAPACITY);
1465 struct bq27xxx_dm_buf bt = BQ27XXX_DM_BUF(di, BQ27XXX_DM_TERMINATE_VOLTAGE);
1466 bool updated;
1467
1468 if (bq27xxx_battery_unseal(di) < 0)
1469 return;
1470
1471 if (info->charge_full_design_uah != -EINVAL &&
1472 info->energy_full_design_uwh != -EINVAL) {
1473 bq27xxx_battery_read_dm_block(di, &bd);
1474 /* assume design energy & capacity are in same block */
1475 bq27xxx_battery_update_dm_block(di, &bd,
1476 BQ27XXX_DM_DESIGN_CAPACITY,
1477 info->charge_full_design_uah / 1000);
1478 bq27xxx_battery_update_dm_block(di, &bd,
1479 BQ27XXX_DM_DESIGN_ENERGY,
1480 info->energy_full_design_uwh / 1000);
1481 }
1482
1483 if (info->voltage_min_design_uv != -EINVAL) {
1484 bool same = bd.class == bt.class && bd.block == bt.block;
1485 if (!same)
1486 bq27xxx_battery_read_dm_block(di, &bt);
1487 bq27xxx_battery_update_dm_block(di, same ? &bd : &bt,
1488 BQ27XXX_DM_TERMINATE_VOLTAGE,
1489 info->voltage_min_design_uv / 1000);
1490 }
1491
1492 updated = bd.dirty || bt.dirty;
1493
1494 bq27xxx_battery_write_dm_block(di, &bd);
1495 bq27xxx_battery_write_dm_block(di, &bt);
1496
1497 bq27xxx_battery_seal(di);
1498
1499 if (updated && !(di->opts & BQ27XXX_O_CFGUP)) {
1500 bq27xxx_write(di, BQ27XXX_REG_CTRL, BQ27XXX_RESET, false);
1501 BQ27XXX_MSLEEP(300); /* reset time is not documented */
1502 }
1503 /* assume bq27xxx_battery_update() is called hereafter */
1504 }
1505
1506 static void bq27xxx_battery_settings(struct bq27xxx_device_info *di)
1507 {
1508 struct power_supply_battery_info *info;
1509 unsigned int min, max;
1510
1511 if (power_supply_get_battery_info(di->bat, &info) < 0)
1512 return;
1513
1514 if (!di->dm_regs) {
1515 dev_warn(di->dev, "data memory update not supported for chip\n");
1516 return;
1517 }
1518
1519 if (info->energy_full_design_uwh != info->charge_full_design_uah) {
1520 if (info->energy_full_design_uwh == -EINVAL)
1521 dev_warn(di->dev, "missing battery:energy-full-design-microwatt-hours\n");
1522 else if (info->charge_full_design_uah == -EINVAL)
1523 dev_warn(di->dev, "missing battery:charge-full-design-microamp-hours\n");
1524 }
1525
1526 /* assume min == 0 */
1527 max = di->dm_regs[BQ27XXX_DM_DESIGN_ENERGY].max;
1528 if (info->energy_full_design_uwh > max * 1000) {
1529 dev_err(di->dev, "invalid battery:energy-full-design-microwatt-hours %d\n",
1530 info->energy_full_design_uwh);
1531 info->energy_full_design_uwh = -EINVAL;
1532 }
1533
1534 /* assume min == 0 */
1535 max = di->dm_regs[BQ27XXX_DM_DESIGN_CAPACITY].max;
1536 if (info->charge_full_design_uah > max * 1000) {
1537 dev_err(di->dev, "invalid battery:charge-full-design-microamp-hours %d\n",
1538 info->charge_full_design_uah);
1539 info->charge_full_design_uah = -EINVAL;
1540 }
1541
1542 min = di->dm_regs[BQ27XXX_DM_TERMINATE_VOLTAGE].min;
1543 max = di->dm_regs[BQ27XXX_DM_TERMINATE_VOLTAGE].max;
1544 if ((info->voltage_min_design_uv < min * 1000 ||
1545 info->voltage_min_design_uv > max * 1000) &&
1546 info->voltage_min_design_uv != -EINVAL) {
1547 dev_err(di->dev, "invalid battery:voltage-min-design-microvolt %d\n",
1548 info->voltage_min_design_uv);
1549 info->voltage_min_design_uv = -EINVAL;
1550 }
1551
1552 if ((info->energy_full_design_uwh != -EINVAL &&
1553 info->charge_full_design_uah != -EINVAL) ||
1554 info->voltage_min_design_uv != -EINVAL)
1555 bq27xxx_battery_set_config(di, info);
1556 }
1557
1558 /*
1559 * Return the battery State-of-Charge
1560 * Or < 0 if something fails.
1561 */
1562 static int bq27xxx_battery_read_soc(struct bq27xxx_device_info *di)
1563 {
1564 int soc;
1565
1566 if (di->opts & BQ27XXX_O_SOC_SI)
1567 soc = bq27xxx_read(di, BQ27XXX_REG_SOC, true);
1568 else
1569 soc = bq27xxx_read(di, BQ27XXX_REG_SOC, false);
1570
1571 if (soc < 0)
1572 dev_dbg(di->dev, "error reading State-of-Charge\n");
1573
1574 return soc;
1575 }
1576
1577 /*
1578 * Return a battery charge value in µAh
1579 * Or < 0 if something fails.
1580 */
1581 static int bq27xxx_battery_read_charge(struct bq27xxx_device_info *di, u8 reg,
1582 union power_supply_propval *val)
1583 {
1584 int charge;
1585
1586 charge = bq27xxx_read(di, reg, false);
1587 if (charge < 0) {
1588 dev_dbg(di->dev, "error reading charge register %02x: %d\n",
1589 reg, charge);
1590 return charge;
1591 }
1592
1593 if (di->opts & BQ27XXX_O_ZERO)
1594 charge *= BQ27XXX_CURRENT_CONSTANT / BQ27XXX_RS;
1595 else
1596 charge *= 1000;
1597
1598 val->intval = charge;
1599
1600 return 0;
1601 }
1602
1603 /*
1604 * Return the battery Nominal available capacity in µAh
1605 * Or < 0 if something fails.
1606 */
1607 static inline int bq27xxx_battery_read_nac(struct bq27xxx_device_info *di,
1608 union power_supply_propval *val)
1609 {
1610 return bq27xxx_battery_read_charge(di, BQ27XXX_REG_NAC, val);
1611 }
1612
1613 /*
1614 * Return the battery Remaining Capacity in µAh
1615 * Or < 0 if something fails.
1616 */
1617 static inline int bq27xxx_battery_read_rc(struct bq27xxx_device_info *di,
1618 union power_supply_propval *val)
1619 {
1620 return bq27xxx_battery_read_charge(di, BQ27XXX_REG_RC, val);
1621 }
1622
1623 /*
1624 * Return the battery Full Charge Capacity in µAh
1625 * Or < 0 if something fails.
1626 */
1627 static inline int bq27xxx_battery_read_fcc(struct bq27xxx_device_info *di,
1628 union power_supply_propval *val)
1629 {
1630 return bq27xxx_battery_read_charge(di, BQ27XXX_REG_FCC, val);
1631 }
1632
1633 /*
1634 * Return the Design Capacity in µAh
1635 * Or < 0 if something fails.
1636 */
1637 static int bq27xxx_battery_read_dcap(struct bq27xxx_device_info *di,
1638 union power_supply_propval *val)
1639 {
1640 int dcap;
1641
1642 /* We only have to read charge design full once */
1643 if (di->charge_design_full > 0) {
1644 val->intval = di->charge_design_full;
1645 return 0;
1646 }
1647
1648 if (di->opts & BQ27XXX_O_ZERO)
1649 dcap = bq27xxx_read(di, BQ27XXX_REG_DCAP, true);
1650 else
1651 dcap = bq27xxx_read(di, BQ27XXX_REG_DCAP, false);
1652
1653 if (dcap < 0) {
1654 dev_dbg(di->dev, "error reading design capacity\n");
1655 return dcap;
1656 }
1657
1658 if (di->opts & BQ27XXX_O_ZERO)
1659 dcap = (dcap << 8) * BQ27XXX_CURRENT_CONSTANT / BQ27XXX_RS;
1660 else
1661 dcap *= 1000;
1662
1663 /* Save for later reads */
1664 di->charge_design_full = dcap;
1665
1666 val->intval = dcap;
1667
1668 return 0;
1669 }
1670
1671 /*
1672 * Return the battery Available energy in µWh
1673 * Or < 0 if something fails.
1674 */
1675 static int bq27xxx_battery_read_energy(struct bq27xxx_device_info *di,
1676 union power_supply_propval *val)
1677 {
1678 int ae;
1679
1680 ae = bq27xxx_read(di, BQ27XXX_REG_AE, false);
1681 if (ae < 0) {
1682 dev_dbg(di->dev, "error reading available energy\n");
1683 return ae;
1684 }
1685
1686 if (di->opts & BQ27XXX_O_ZERO)
1687 ae *= BQ27XXX_POWER_CONSTANT / BQ27XXX_RS;
1688 else
1689 ae *= 1000;
1690
1691 val->intval = ae;
1692
1693 return 0;
1694 }
1695
1696 /*
1697 * Return the battery temperature in tenths of degree Celsius
1698 * Or < 0 if something fails.
1699 */
1700 static int bq27xxx_battery_read_temperature(struct bq27xxx_device_info *di,
1701 union power_supply_propval *val)
1702 {
1703 int temp;
1704
1705 temp = bq27xxx_read(di, BQ27XXX_REG_TEMP, false);
1706 if (temp < 0) {
1707 dev_err(di->dev, "error reading temperature\n");
1708 return temp;
1709 }
1710
1711 if (di->opts & BQ27XXX_O_ZERO)
1712 temp = 5 * temp / 2;
1713
1714 /* Convert decidegree Kelvin to Celsius */
1715 temp -= 2731;
1716
1717 val->intval = temp;
1718
1719 return 0;
1720 }
1721
1722 /*
1723 * Return the battery Cycle count total
1724 * Or < 0 if something fails.
1725 */
1726 static int bq27xxx_battery_read_cyct(struct bq27xxx_device_info *di,
1727 union power_supply_propval *val)
1728 {
1729 int cyct;
1730
1731 cyct = bq27xxx_read(di, BQ27XXX_REG_CYCT, false);
1732 if (cyct < 0)
1733 dev_err(di->dev, "error reading cycle count total\n");
1734
1735 val->intval = cyct;
1736
1737 return 0;
1738 }
1739
1740 /*
1741 * Read a time register.
1742 * Return < 0 if something fails.
1743 */
1744 static int bq27xxx_battery_read_time(struct bq27xxx_device_info *di, u8 reg,
1745 union power_supply_propval *val)
1746 {
1747 int tval;
1748
1749 tval = bq27xxx_read(di, reg, false);
1750 if (tval < 0) {
1751 dev_dbg(di->dev, "error reading time register %02x: %d\n",
1752 reg, tval);
1753 return tval;
1754 }
1755
1756 if (tval == 65535)
1757 return -ENODATA;
1758
1759 val->intval = tval * 60;
1760
1761 return 0;
1762 }
1763
1764 /*
1765 * Returns true if a battery over temperature condition is detected
1766 */
1767 static bool bq27xxx_battery_overtemp(struct bq27xxx_device_info *di, u16 flags)
1768 {
1769 if (di->opts & BQ27XXX_O_OTDC)
1770 return flags & (BQ27XXX_FLAG_OTC | BQ27XXX_FLAG_OTD);
1771 if (di->opts & BQ27XXX_O_UTOT)
1772 return flags & BQ27XXX_FLAG_OT;
1773
1774 return false;
1775 }
1776
1777 /*
1778 * Returns true if a battery under temperature condition is detected
1779 */
1780 static bool bq27xxx_battery_undertemp(struct bq27xxx_device_info *di, u16 flags)
1781 {
1782 if (di->opts & BQ27XXX_O_UTOT)
1783 return flags & BQ27XXX_FLAG_UT;
1784
1785 return false;
1786 }
1787
1788 /*
1789 * Returns true if a low state of charge condition is detected
1790 */
1791 static bool bq27xxx_battery_dead(struct bq27xxx_device_info *di, u16 flags)
1792 {
1793 if (di->opts & BQ27XXX_O_ZERO)
1794 return flags & (BQ27000_FLAG_EDV1 | BQ27000_FLAG_EDVF);
1795 else if (di->opts & BQ27Z561_O_BITS)
1796 return flags & BQ27Z561_FLAG_FDC;
1797 else
1798 return flags & (BQ27XXX_FLAG_SOC1 | BQ27XXX_FLAG_SOCF);
1799 }
1800
1801 /*
1802 * Returns true if reported battery capacity is inaccurate
1803 */
1804 static bool bq27xxx_battery_capacity_inaccurate(struct bq27xxx_device_info *di,
1805 u16 flags)
1806 {
1807 if (di->opts & BQ27XXX_O_HAS_CI)
1808 return (flags & BQ27000_FLAG_CI);
1809 else
1810 return false;
1811 }
1812
1813 static int bq27xxx_battery_read_health(struct bq27xxx_device_info *di,
1814 union power_supply_propval *val)
1815 {
1816 int health;
1817
1818 /* Unlikely but important to return first */
1819 if (unlikely(bq27xxx_battery_overtemp(di, di->cache.flags)))
1820 health = POWER_SUPPLY_HEALTH_OVERHEAT;
1821 else if (unlikely(bq27xxx_battery_undertemp(di, di->cache.flags)))
1822 health = POWER_SUPPLY_HEALTH_COLD;
1823 else if (unlikely(bq27xxx_battery_dead(di, di->cache.flags)))
1824 health = POWER_SUPPLY_HEALTH_DEAD;
1825 else if (unlikely(bq27xxx_battery_capacity_inaccurate(di, di->cache.flags)))
1826 health = POWER_SUPPLY_HEALTH_CALIBRATION_REQUIRED;
1827 else
1828 health = POWER_SUPPLY_HEALTH_GOOD;
1829
1830 val->intval = health;
1831
1832 return 0;
1833 }
1834
1835 static bool bq27xxx_battery_is_full(struct bq27xxx_device_info *di, int flags)
1836 {
1837 if (di->opts & BQ27XXX_O_ZERO)
1838 return (flags & BQ27000_FLAG_FC);
1839 else if (di->opts & BQ27Z561_O_BITS)
1840 return (flags & BQ27Z561_FLAG_FC);
1841 else
1842 return (flags & BQ27XXX_FLAG_FC);
1843 }
1844
1845 /*
1846 * Return the battery average current in µA and the status
1847 * Note that current can be negative signed as well
1848 * Or 0 if something fails.
1849 */
1850 static int bq27xxx_battery_current_and_status(
1851 struct bq27xxx_device_info *di,
1852 union power_supply_propval *val_curr,
1853 union power_supply_propval *val_status,
1854 struct bq27xxx_reg_cache *cache)
1855 {
1856 bool single_flags = (di->opts & BQ27XXX_O_ZERO);
1857 int curr;
1858 int flags;
1859
1860 curr = bq27xxx_read(di, BQ27XXX_REG_AI, false);
1861 if (curr < 0) {
1862 dev_err(di->dev, "error reading current\n");
1863 return curr;
1864 }
1865
1866 if (cache) {
1867 flags = cache->flags;
1868 } else {
1869 flags = bq27xxx_read(di, BQ27XXX_REG_FLAGS, single_flags);
1870 if (flags < 0) {
1871 dev_err(di->dev, "error reading flags\n");
1872 return flags;
1873 }
1874 }
1875
1876 if (di->opts & BQ27XXX_O_ZERO) {
1877 if (!(flags & BQ27000_FLAG_CHGS)) {
1878 dev_dbg(di->dev, "negative current!\n");
1879 curr = -curr;
1880 }
1881
1882 curr = curr * BQ27XXX_CURRENT_CONSTANT / BQ27XXX_RS;
1883 } else {
1884 /* Other gauges return signed value */
1885 curr = (int)((s16)curr) * 1000;
1886 }
1887
1888 if (val_curr)
1889 val_curr->intval = curr;
1890
1891 if (val_status) {
1892 if (bq27xxx_battery_is_full(di, flags))
1893 val_status->intval = POWER_SUPPLY_STATUS_FULL;
1894 else if (curr > 0)
1895 val_status->intval = POWER_SUPPLY_STATUS_CHARGING;
1896 else if (curr < 0)
1897 val_status->intval = POWER_SUPPLY_STATUS_DISCHARGING;
1898 else
1899 val_status->intval = POWER_SUPPLY_STATUS_NOT_CHARGING;
1900 }
1901
1902 return 0;
1903 }
1904
1905 static void bq27xxx_battery_update_unlocked(struct bq27xxx_device_info *di)
1906 {
1907 union power_supply_propval status = di->last_status;
1908 struct bq27xxx_reg_cache cache = {0, };
1909 bool has_singe_flag = di->opts & BQ27XXX_O_ZERO;
1910
1911 cache.flags = bq27xxx_read(di, BQ27XXX_REG_FLAGS, has_singe_flag);
1912 if ((cache.flags & 0xff) == 0xff)
1913 cache.flags = -1; /* read error */
1914 if (cache.flags >= 0) {
1915 cache.capacity = bq27xxx_battery_read_soc(di);
1916 di->cache.flags = cache.flags;
1917
1918 /*
1919 * On gauges with signed current reporting the current must be
1920 * checked to detect charging <-> discharging status changes.
1921 */
1922 if (!(di->opts & BQ27XXX_O_ZERO))
1923 bq27xxx_battery_current_and_status(di, NULL, &status, &cache);
1924 }
1925
1926 if ((di->cache.capacity != cache.capacity) ||
1927 (di->cache.flags != cache.flags) ||
1928 (di->last_status.intval != status.intval)) {
1929 di->last_status.intval = status.intval;
1930 power_supply_changed(di->bat);
1931 }
1932
1933 if (memcmp(&di->cache, &cache, sizeof(cache)) != 0)
1934 di->cache = cache;
1935
1936 di->last_update = jiffies;
1937
1938 if (!di->removed && poll_interval > 0)
1939 mod_delayed_work(system_wq, &di->work, poll_interval * HZ);
1940 }
1941
1942 void bq27xxx_battery_update(struct bq27xxx_device_info *di)
1943 {
1944 mutex_lock(&di->lock);
1945 bq27xxx_battery_update_unlocked(di);
1946 mutex_unlock(&di->lock);
1947 }
1948 EXPORT_SYMBOL_GPL(bq27xxx_battery_update);
1949
1950 static void bq27xxx_battery_poll(struct work_struct *work)
1951 {
1952 struct bq27xxx_device_info *di =
1953 container_of(work, struct bq27xxx_device_info,
1954 work.work);
1955
1956 bq27xxx_battery_update(di);
1957 }
1958
1959 /*
1960 * Get the average power in µW
1961 * Return < 0 if something fails.
1962 */
1963 static int bq27xxx_battery_pwr_avg(struct bq27xxx_device_info *di,
1964 union power_supply_propval *val)
1965 {
1966 int power;
1967
1968 power = bq27xxx_read(di, BQ27XXX_REG_AP, false);
1969 if (power < 0) {
1970 dev_err(di->dev,
1971 "error reading average power register %02x: %d\n",
1972 BQ27XXX_REG_AP, power);
1973 return power;
1974 }
1975
1976 if (di->opts & BQ27XXX_O_ZERO)
1977 val->intval = (power * BQ27XXX_POWER_CONSTANT) / BQ27XXX_RS;
1978 else
1979 /* Other gauges return a signed value in units of 10mW */
1980 val->intval = (int)((s16)power) * 10000;
1981
1982 return 0;
1983 }
1984
1985 static int bq27xxx_battery_capacity_level(struct bq27xxx_device_info *di,
1986 union power_supply_propval *val)
1987 {
1988 int level;
1989
1990 if (di->opts & BQ27XXX_O_ZERO) {
1991 if (di->cache.flags & BQ27000_FLAG_FC)
1992 level = POWER_SUPPLY_CAPACITY_LEVEL_FULL;
1993 else if (di->cache.flags & BQ27000_FLAG_EDVF)
1994 level = POWER_SUPPLY_CAPACITY_LEVEL_CRITICAL;
1995 else if (di->cache.flags & BQ27000_FLAG_EDV1)
1996 level = POWER_SUPPLY_CAPACITY_LEVEL_LOW;
1997 else
1998 level = POWER_SUPPLY_CAPACITY_LEVEL_NORMAL;
1999 } else if (di->opts & BQ27Z561_O_BITS) {
2000 if (di->cache.flags & BQ27Z561_FLAG_FC)
2001 level = POWER_SUPPLY_CAPACITY_LEVEL_FULL;
2002 else if (di->cache.flags & BQ27Z561_FLAG_FDC)
2003 level = POWER_SUPPLY_CAPACITY_LEVEL_CRITICAL;
2004 else
2005 level = POWER_SUPPLY_CAPACITY_LEVEL_NORMAL;
2006 } else {
2007 if (di->cache.flags & BQ27XXX_FLAG_FC)
2008 level = POWER_SUPPLY_CAPACITY_LEVEL_FULL;
2009 else if (di->cache.flags & BQ27XXX_FLAG_SOCF)
2010 level = POWER_SUPPLY_CAPACITY_LEVEL_CRITICAL;
2011 else if (di->cache.flags & BQ27XXX_FLAG_SOC1)
2012 level = POWER_SUPPLY_CAPACITY_LEVEL_LOW;
2013 else
2014 level = POWER_SUPPLY_CAPACITY_LEVEL_NORMAL;
2015 }
2016
2017 val->intval = level;
2018
2019 return 0;
2020 }
2021
2022 /*
2023 * Return the battery Voltage in millivolts
2024 * Or < 0 if something fails.
2025 */
2026 static int bq27xxx_battery_voltage(struct bq27xxx_device_info *di,
2027 union power_supply_propval *val)
2028 {
2029 int volt;
2030
2031 volt = bq27xxx_read(di, BQ27XXX_REG_VOLT, false);
2032 if (volt < 0) {
2033 dev_err(di->dev, "error reading voltage\n");
2034 return volt;
2035 }
2036
2037 val->intval = volt * 1000;
2038
2039 return 0;
2040 }
2041
2042 static int bq27xxx_simple_value(int value,
2043 union power_supply_propval *val)
2044 {
2045 if (value < 0)
2046 return value;
2047
2048 val->intval = value;
2049
2050 return 0;
2051 }
2052
2053 static int bq27xxx_battery_get_property(struct power_supply *psy,
2054 enum power_supply_property psp,
2055 union power_supply_propval *val)
2056 {
2057 int ret = 0;
2058 struct bq27xxx_device_info *di = power_supply_get_drvdata(psy);
2059
2060 mutex_lock(&di->lock);
2061 if (time_is_before_jiffies(di->last_update + 5 * HZ))
2062 bq27xxx_battery_update_unlocked(di);
2063 mutex_unlock(&di->lock);
2064
2065 if (psp != POWER_SUPPLY_PROP_PRESENT && di->cache.flags < 0)
2066 return -ENODEV;
2067
2068 switch (psp) {
2069 case POWER_SUPPLY_PROP_STATUS:
2070 ret = bq27xxx_battery_current_and_status(di, NULL, val, NULL);
2071 break;
2072 case POWER_SUPPLY_PROP_VOLTAGE_NOW:
2073 ret = bq27xxx_battery_voltage(di, val);
2074 break;
2075 case POWER_SUPPLY_PROP_PRESENT:
2076 val->intval = di->cache.flags < 0 ? 0 : 1;
2077 break;
2078 case POWER_SUPPLY_PROP_CURRENT_NOW:
2079 ret = bq27xxx_battery_current_and_status(di, val, NULL, NULL);
2080 break;
2081 case POWER_SUPPLY_PROP_CAPACITY:
2082 ret = bq27xxx_simple_value(di->cache.capacity, val);
2083 break;
2084 case POWER_SUPPLY_PROP_CAPACITY_LEVEL:
2085 ret = bq27xxx_battery_capacity_level(di, val);
2086 break;
2087 case POWER_SUPPLY_PROP_TEMP:
2088 ret = bq27xxx_battery_read_temperature(di, val);
2089 break;
2090 case POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW:
2091 ret = bq27xxx_battery_read_time(di, BQ27XXX_REG_TTE, val);
2092 break;
2093 case POWER_SUPPLY_PROP_TIME_TO_EMPTY_AVG:
2094 ret = bq27xxx_battery_read_time(di, BQ27XXX_REG_TTECP, val);
2095 break;
2096 case POWER_SUPPLY_PROP_TIME_TO_FULL_NOW:
2097 ret = bq27xxx_battery_read_time(di, BQ27XXX_REG_TTF, val);
2098 break;
2099 case POWER_SUPPLY_PROP_TECHNOLOGY:
2100 if (di->opts & BQ27XXX_O_MUL_CHEM)
2101 val->intval = POWER_SUPPLY_TECHNOLOGY_UNKNOWN;
2102 else
2103 val->intval = POWER_SUPPLY_TECHNOLOGY_LION;
2104 break;
2105 case POWER_SUPPLY_PROP_CHARGE_NOW:
2106 if (di->regs[BQ27XXX_REG_NAC] != INVALID_REG_ADDR)
2107 ret = bq27xxx_battery_read_nac(di, val);
2108 else
2109 ret = bq27xxx_battery_read_rc(di, val);
2110 break;
2111 case POWER_SUPPLY_PROP_CHARGE_FULL:
2112 ret = bq27xxx_battery_read_fcc(di, val);
2113 break;
2114 case POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN:
2115 ret = bq27xxx_battery_read_dcap(di, val);
2116 break;
2117 /*
2118 * TODO: Implement these to make registers set from
2119 * power_supply_battery_info visible in sysfs.
2120 */
2121 case POWER_SUPPLY_PROP_ENERGY_FULL_DESIGN:
2122 case POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN:
2123 return -EINVAL;
2124 case POWER_SUPPLY_PROP_CYCLE_COUNT:
2125 ret = bq27xxx_battery_read_cyct(di, val);
2126 break;
2127 case POWER_SUPPLY_PROP_ENERGY_NOW:
2128 ret = bq27xxx_battery_read_energy(di, val);
2129 break;
2130 case POWER_SUPPLY_PROP_POWER_AVG:
2131 ret = bq27xxx_battery_pwr_avg(di, val);
2132 break;
2133 case POWER_SUPPLY_PROP_HEALTH:
2134 ret = bq27xxx_battery_read_health(di, val);
2135 break;
2136 case POWER_SUPPLY_PROP_MANUFACTURER:
2137 val->strval = BQ27XXX_MANUFACTURER;
2138 break;
2139 default:
2140 return -EINVAL;
2141 }
2142
2143 return ret;
2144 }
2145
2146 static void bq27xxx_external_power_changed(struct power_supply *psy)
2147 {
2148 struct bq27xxx_device_info *di = power_supply_get_drvdata(psy);
2149
2150 /* After charger plug in/out wait 0.5s for things to stabilize */
2151 mod_delayed_work(system_wq, &di->work, HZ / 2);
2152 }
2153
2154 static void bq27xxx_battery_mutex_destroy(void *data)
2155 {
2156 struct mutex *lock = data;
2157
2158 mutex_destroy(lock);
2159 }
2160
2161 int bq27xxx_battery_setup(struct bq27xxx_device_info *di)
2162 {
2163 struct power_supply_desc *psy_desc;
2164 struct power_supply_config psy_cfg = {
2165 .of_node = di->dev->of_node,
2166 .drv_data = di,
2167 .no_wakeup_source = true,
2168 };
2169 int ret;
2170
2171 INIT_DELAYED_WORK(&di->work, bq27xxx_battery_poll);
2172 mutex_init(&di->lock);
2173 ret = devm_add_action_or_reset(di->dev, bq27xxx_battery_mutex_destroy,
2174 &di->lock);
2175 if (ret)
2176 return ret;
2177
2178 di->regs = bq27xxx_chip_data[di->chip].regs;
2179 di->unseal_key = bq27xxx_chip_data[di->chip].unseal_key;
2180 di->dm_regs = bq27xxx_chip_data[di->chip].dm_regs;
2181 di->opts = bq27xxx_chip_data[di->chip].opts;
2182
2183 psy_desc = devm_kzalloc(di->dev, sizeof(*psy_desc), GFP_KERNEL);
2184 if (!psy_desc)
2185 return -ENOMEM;
2186
2187 psy_desc->name = di->name;
2188 psy_desc->type = POWER_SUPPLY_TYPE_BATTERY;
2189 psy_desc->properties = bq27xxx_chip_data[di->chip].props;
2190 psy_desc->num_properties = bq27xxx_chip_data[di->chip].props_size;
2191 psy_desc->get_property = bq27xxx_battery_get_property;
2192 psy_desc->external_power_changed = bq27xxx_external_power_changed;
2193
2194 di->bat = devm_power_supply_register(di->dev, psy_desc, &psy_cfg);
2195 if (IS_ERR(di->bat))
2196 return dev_err_probe(di->dev, PTR_ERR(di->bat),
2197 "failed to register battery\n");
2198
2199 bq27xxx_battery_settings(di);
2200 bq27xxx_battery_update(di);
2201
2202 mutex_lock(&bq27xxx_list_lock);
2203 list_add(&di->list, &bq27xxx_battery_devices);
2204 mutex_unlock(&bq27xxx_list_lock);
2205
2206 return 0;
2207 }
2208 EXPORT_SYMBOL_GPL(bq27xxx_battery_setup);
2209
2210 void bq27xxx_battery_teardown(struct bq27xxx_device_info *di)
2211 {
2212 mutex_lock(&bq27xxx_list_lock);
2213 list_del(&di->list);
2214 mutex_unlock(&bq27xxx_list_lock);
2215
2216 /* Set removed to avoid bq27xxx_battery_update() re-queuing the work */
2217 mutex_lock(&di->lock);
2218 di->removed = true;
2219 mutex_unlock(&di->lock);
2220
2221 cancel_delayed_work_sync(&di->work);
2222 }
2223 EXPORT_SYMBOL_GPL(bq27xxx_battery_teardown);
2224
2225 #ifdef CONFIG_PM_SLEEP
2226 static int bq27xxx_battery_suspend(struct device *dev)
2227 {
2228 struct bq27xxx_device_info *di = dev_get_drvdata(dev);
2229
2230 cancel_delayed_work(&di->work);
2231 return 0;
2232 }
2233
2234 static int bq27xxx_battery_resume(struct device *dev)
2235 {
2236 struct bq27xxx_device_info *di = dev_get_drvdata(dev);
2237
2238 schedule_delayed_work(&di->work, 0);
2239 return 0;
2240 }
2241 #endif /* CONFIG_PM_SLEEP */
2242
2243 SIMPLE_DEV_PM_OPS(bq27xxx_battery_battery_pm_ops,
2244 bq27xxx_battery_suspend, bq27xxx_battery_resume);
2245 EXPORT_SYMBOL_GPL(bq27xxx_battery_battery_pm_ops);
2246
2247 MODULE_AUTHOR("Rodolfo Giometti <giometti@linux.it>");
2248 MODULE_DESCRIPTION("BQ27xxx battery monitor driver");
2249 MODULE_LICENSE("GPL");
2250