1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * BQ27xxx battery driver 4 * 5 * Copyright (C) 2008 Rodolfo Giometti <giometti@linux.it> 6 * Copyright (C) 2008 Eurotech S.p.A. <info@eurotech.it> 7 * Copyright (C) 2010-2011 Lars-Peter Clausen <lars@metafoo.de> 8 * Copyright (C) 2011 Pali Rohár <pali@kernel.org> 9 * Copyright (C) 2017 Liam Breck <kernel@networkimprov.net> 10 * 11 * Based on a previous work by Copyright (C) 2008 Texas Instruments, Inc. 12 * 13 * Datasheets: 14 * https://www.ti.com/product/bq27000 15 * https://www.ti.com/product/bq27200 16 * https://www.ti.com/product/bq27010 17 * https://www.ti.com/product/bq27210 18 * https://www.ti.com/product/bq27500 19 * https://www.ti.com/product/bq27510-g1 20 * https://www.ti.com/product/bq27510-g2 21 * https://www.ti.com/product/bq27510-g3 22 * https://www.ti.com/product/bq27520-g1 23 * https://www.ti.com/product/bq27520-g2 24 * https://www.ti.com/product/bq27520-g3 25 * https://www.ti.com/product/bq27520-g4 26 * https://www.ti.com/product/bq27530-g1 27 * https://www.ti.com/product/bq27531-g1 28 * https://www.ti.com/product/bq27541-g1 29 * https://www.ti.com/product/bq27542-g1 30 * https://www.ti.com/product/bq27546-g1 31 * https://www.ti.com/product/bq27742-g1 32 * https://www.ti.com/product/bq27545-g1 33 * https://www.ti.com/product/bq27421-g1 34 * https://www.ti.com/product/bq27425-g1 35 * https://www.ti.com/product/bq27426 36 * https://www.ti.com/product/bq27411-g1 37 * https://www.ti.com/product/bq27441-g1 38 * https://www.ti.com/product/bq27621-g1 39 * https://www.ti.com/product/bq27z561 40 * https://www.ti.com/product/bq28z610 41 * https://www.ti.com/product/bq34z100-g1 42 * https://www.ti.com/product/bq78z100 43 */ 44 45 #include <linux/device.h> 46 #include <linux/module.h> 47 #include <linux/mutex.h> 48 #include <linux/param.h> 49 #include <linux/jiffies.h> 50 #include <linux/workqueue.h> 51 #include <linux/delay.h> 52 #include <linux/platform_device.h> 53 #include <linux/power_supply.h> 54 #include <linux/slab.h> 55 #include <linux/of.h> 56 57 #include <linux/power/bq27xxx_battery.h> 58 59 #define BQ27XXX_MANUFACTURER "Texas Instruments" 60 61 /* BQ27XXX Flags */ 62 #define BQ27XXX_FLAG_DSC BIT(0) 63 #define BQ27XXX_FLAG_SOCF BIT(1) /* State-of-Charge threshold final */ 64 #define BQ27XXX_FLAG_SOC1 BIT(2) /* State-of-Charge threshold 1 */ 65 #define BQ27XXX_FLAG_CFGUP BIT(4) 66 #define BQ27XXX_FLAG_FC BIT(9) 67 #define BQ27XXX_FLAG_OTD BIT(14) 68 #define BQ27XXX_FLAG_OTC BIT(15) 69 #define BQ27XXX_FLAG_UT BIT(14) 70 #define BQ27XXX_FLAG_OT BIT(15) 71 72 /* BQ27000 has different layout for Flags register */ 73 #define BQ27000_FLAG_EDVF BIT(0) /* Final End-of-Discharge-Voltage flag */ 74 #define BQ27000_FLAG_EDV1 BIT(1) /* First End-of-Discharge-Voltage flag */ 75 #define BQ27000_FLAG_CI BIT(4) /* Capacity Inaccurate flag */ 76 #define BQ27000_FLAG_FC BIT(5) 77 #define BQ27000_FLAG_CHGS BIT(7) /* Charge state flag */ 78 79 /* BQ27Z561 has different layout for Flags register */ 80 #define BQ27Z561_FLAG_FDC BIT(4) /* Battery fully discharged */ 81 #define BQ27Z561_FLAG_FC BIT(5) /* Battery fully charged */ 82 #define BQ27Z561_FLAG_DIS_CH BIT(6) /* Battery is discharging */ 83 84 /* control register params */ 85 #define BQ27XXX_SEALED 0x20 86 #define BQ27XXX_SET_CFGUPDATE 0x13 87 #define BQ27XXX_SOFT_RESET 0x42 88 #define BQ27XXX_RESET 0x41 89 90 #define BQ27XXX_RS (20) /* Resistor sense mOhm */ 91 #define BQ27XXX_POWER_CONSTANT (29200) /* 29.2 µV^2 * 1000 */ 92 #define BQ27XXX_CURRENT_CONSTANT (3570) /* 3.57 µV * 1000 */ 93 94 #define INVALID_REG_ADDR 0xff 95 96 /* 97 * bq27xxx_reg_index - Register names 98 * 99 * These are indexes into a device's register mapping array. 100 */ 101 102 enum bq27xxx_reg_index { 103 BQ27XXX_REG_CTRL = 0, /* Control */ 104 BQ27XXX_REG_TEMP, /* Temperature */ 105 BQ27XXX_REG_INT_TEMP, /* Internal Temperature */ 106 BQ27XXX_REG_VOLT, /* Voltage */ 107 BQ27XXX_REG_AI, /* Average Current */ 108 BQ27XXX_REG_FLAGS, /* Flags */ 109 BQ27XXX_REG_TTE, /* Time-to-Empty */ 110 BQ27XXX_REG_TTF, /* Time-to-Full */ 111 BQ27XXX_REG_TTES, /* Time-to-Empty Standby */ 112 BQ27XXX_REG_TTECP, /* Time-to-Empty at Constant Power */ 113 BQ27XXX_REG_NAC, /* Nominal Available Capacity */ 114 BQ27XXX_REG_RC, /* Remaining Capacity */ 115 BQ27XXX_REG_FCC, /* Full Charge Capacity */ 116 BQ27XXX_REG_CYCT, /* Cycle Count */ 117 BQ27XXX_REG_AE, /* Available Energy */ 118 BQ27XXX_REG_SOC, /* State-of-Charge */ 119 BQ27XXX_REG_DCAP, /* Design Capacity */ 120 BQ27XXX_REG_AP, /* Average Power */ 121 BQ27XXX_DM_CTRL, /* Block Data Control */ 122 BQ27XXX_DM_CLASS, /* Data Class */ 123 BQ27XXX_DM_BLOCK, /* Data Block */ 124 BQ27XXX_DM_DATA, /* Block Data */ 125 BQ27XXX_DM_CKSUM, /* Block Data Checksum */ 126 BQ27XXX_REG_SEDVF, /* End-of-discharge Voltage */ 127 BQ27XXX_REG_PKCFG, /* Pack Configuration */ 128 BQ27XXX_REG_MAX, /* sentinel */ 129 }; 130 131 #define BQ27XXX_DM_REG_ROWS \ 132 [BQ27XXX_DM_CTRL] = 0x61, \ 133 [BQ27XXX_DM_CLASS] = 0x3e, \ 134 [BQ27XXX_DM_BLOCK] = 0x3f, \ 135 [BQ27XXX_DM_DATA] = 0x40, \ 136 [BQ27XXX_DM_CKSUM] = 0x60 137 138 /* Register mappings */ 139 static u8 140 bq27000_regs[BQ27XXX_REG_MAX] = { 141 [BQ27XXX_REG_CTRL] = 0x00, 142 [BQ27XXX_REG_TEMP] = 0x06, 143 [BQ27XXX_REG_INT_TEMP] = INVALID_REG_ADDR, 144 [BQ27XXX_REG_VOLT] = 0x08, 145 [BQ27XXX_REG_AI] = 0x14, 146 [BQ27XXX_REG_FLAGS] = 0x0a, 147 [BQ27XXX_REG_TTE] = 0x16, 148 [BQ27XXX_REG_TTF] = 0x18, 149 [BQ27XXX_REG_TTES] = 0x1c, 150 [BQ27XXX_REG_TTECP] = 0x26, 151 [BQ27XXX_REG_NAC] = 0x0c, 152 [BQ27XXX_REG_RC] = INVALID_REG_ADDR, 153 [BQ27XXX_REG_FCC] = 0x12, 154 [BQ27XXX_REG_CYCT] = 0x2a, 155 [BQ27XXX_REG_AE] = 0x22, 156 [BQ27XXX_REG_SOC] = 0x0b, 157 [BQ27XXX_REG_DCAP] = 0x76, 158 [BQ27XXX_REG_AP] = 0x24, 159 [BQ27XXX_DM_CTRL] = INVALID_REG_ADDR, 160 [BQ27XXX_DM_CLASS] = INVALID_REG_ADDR, 161 [BQ27XXX_DM_BLOCK] = INVALID_REG_ADDR, 162 [BQ27XXX_DM_DATA] = INVALID_REG_ADDR, 163 [BQ27XXX_DM_CKSUM] = INVALID_REG_ADDR, 164 [BQ27XXX_REG_SEDVF] = 0x77, 165 [BQ27XXX_REG_PKCFG] = 0x7C, 166 }, 167 bq27010_regs[BQ27XXX_REG_MAX] = { 168 [BQ27XXX_REG_CTRL] = 0x00, 169 [BQ27XXX_REG_TEMP] = 0x06, 170 [BQ27XXX_REG_INT_TEMP] = INVALID_REG_ADDR, 171 [BQ27XXX_REG_VOLT] = 0x08, 172 [BQ27XXX_REG_AI] = 0x14, 173 [BQ27XXX_REG_FLAGS] = 0x0a, 174 [BQ27XXX_REG_TTE] = 0x16, 175 [BQ27XXX_REG_TTF] = 0x18, 176 [BQ27XXX_REG_TTES] = 0x1c, 177 [BQ27XXX_REG_TTECP] = 0x26, 178 [BQ27XXX_REG_NAC] = 0x0c, 179 [BQ27XXX_REG_RC] = INVALID_REG_ADDR, 180 [BQ27XXX_REG_FCC] = 0x12, 181 [BQ27XXX_REG_CYCT] = 0x2a, 182 [BQ27XXX_REG_AE] = INVALID_REG_ADDR, 183 [BQ27XXX_REG_SOC] = 0x0b, 184 [BQ27XXX_REG_DCAP] = 0x76, 185 [BQ27XXX_REG_AP] = INVALID_REG_ADDR, 186 [BQ27XXX_DM_CTRL] = INVALID_REG_ADDR, 187 [BQ27XXX_DM_CLASS] = INVALID_REG_ADDR, 188 [BQ27XXX_DM_BLOCK] = INVALID_REG_ADDR, 189 [BQ27XXX_DM_DATA] = INVALID_REG_ADDR, 190 [BQ27XXX_DM_CKSUM] = INVALID_REG_ADDR, 191 [BQ27XXX_REG_SEDVF] = 0x77, 192 [BQ27XXX_REG_PKCFG] = 0x7C, 193 }, 194 bq2750x_regs[BQ27XXX_REG_MAX] = { 195 [BQ27XXX_REG_CTRL] = 0x00, 196 [BQ27XXX_REG_TEMP] = 0x06, 197 [BQ27XXX_REG_INT_TEMP] = 0x28, 198 [BQ27XXX_REG_VOLT] = 0x08, 199 [BQ27XXX_REG_AI] = 0x14, 200 [BQ27XXX_REG_FLAGS] = 0x0a, 201 [BQ27XXX_REG_TTE] = 0x16, 202 [BQ27XXX_REG_TTF] = INVALID_REG_ADDR, 203 [BQ27XXX_REG_TTES] = 0x1a, 204 [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR, 205 [BQ27XXX_REG_NAC] = 0x0c, 206 [BQ27XXX_REG_RC] = 0x10, 207 [BQ27XXX_REG_FCC] = 0x12, 208 [BQ27XXX_REG_CYCT] = 0x2a, 209 [BQ27XXX_REG_AE] = INVALID_REG_ADDR, 210 [BQ27XXX_REG_SOC] = 0x2c, 211 [BQ27XXX_REG_DCAP] = 0x3c, 212 [BQ27XXX_REG_AP] = INVALID_REG_ADDR, 213 BQ27XXX_DM_REG_ROWS, 214 }, 215 #define bq2751x_regs bq27510g3_regs 216 #define bq2752x_regs bq27510g3_regs 217 bq27500_regs[BQ27XXX_REG_MAX] = { 218 [BQ27XXX_REG_CTRL] = 0x00, 219 [BQ27XXX_REG_TEMP] = 0x06, 220 [BQ27XXX_REG_INT_TEMP] = INVALID_REG_ADDR, 221 [BQ27XXX_REG_VOLT] = 0x08, 222 [BQ27XXX_REG_AI] = 0x14, 223 [BQ27XXX_REG_FLAGS] = 0x0a, 224 [BQ27XXX_REG_TTE] = 0x16, 225 [BQ27XXX_REG_TTF] = 0x18, 226 [BQ27XXX_REG_TTES] = 0x1c, 227 [BQ27XXX_REG_TTECP] = 0x26, 228 [BQ27XXX_REG_NAC] = 0x0c, 229 [BQ27XXX_REG_RC] = 0x10, 230 [BQ27XXX_REG_FCC] = 0x12, 231 [BQ27XXX_REG_CYCT] = 0x2a, 232 [BQ27XXX_REG_AE] = 0x22, 233 [BQ27XXX_REG_SOC] = 0x2c, 234 [BQ27XXX_REG_DCAP] = 0x3c, 235 [BQ27XXX_REG_AP] = 0x24, 236 BQ27XXX_DM_REG_ROWS, 237 }, 238 #define bq27510g1_regs bq27500_regs 239 #define bq27510g2_regs bq27500_regs 240 bq27510g3_regs[BQ27XXX_REG_MAX] = { 241 [BQ27XXX_REG_CTRL] = 0x00, 242 [BQ27XXX_REG_TEMP] = 0x06, 243 [BQ27XXX_REG_INT_TEMP] = 0x28, 244 [BQ27XXX_REG_VOLT] = 0x08, 245 [BQ27XXX_REG_AI] = 0x14, 246 [BQ27XXX_REG_FLAGS] = 0x0a, 247 [BQ27XXX_REG_TTE] = 0x16, 248 [BQ27XXX_REG_TTF] = INVALID_REG_ADDR, 249 [BQ27XXX_REG_TTES] = 0x1a, 250 [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR, 251 [BQ27XXX_REG_NAC] = 0x0c, 252 [BQ27XXX_REG_RC] = 0x10, 253 [BQ27XXX_REG_FCC] = 0x12, 254 [BQ27XXX_REG_CYCT] = 0x1e, 255 [BQ27XXX_REG_AE] = INVALID_REG_ADDR, 256 [BQ27XXX_REG_SOC] = 0x20, 257 [BQ27XXX_REG_DCAP] = 0x2e, 258 [BQ27XXX_REG_AP] = INVALID_REG_ADDR, 259 BQ27XXX_DM_REG_ROWS, 260 }, 261 bq27520g1_regs[BQ27XXX_REG_MAX] = { 262 [BQ27XXX_REG_CTRL] = 0x00, 263 [BQ27XXX_REG_TEMP] = 0x06, 264 [BQ27XXX_REG_INT_TEMP] = INVALID_REG_ADDR, 265 [BQ27XXX_REG_VOLT] = 0x08, 266 [BQ27XXX_REG_AI] = 0x14, 267 [BQ27XXX_REG_FLAGS] = 0x0a, 268 [BQ27XXX_REG_TTE] = 0x16, 269 [BQ27XXX_REG_TTF] = 0x18, 270 [BQ27XXX_REG_TTES] = 0x1c, 271 [BQ27XXX_REG_TTECP] = 0x26, 272 [BQ27XXX_REG_NAC] = 0x0c, 273 [BQ27XXX_REG_RC] = 0x10, 274 [BQ27XXX_REG_FCC] = 0x12, 275 [BQ27XXX_REG_CYCT] = INVALID_REG_ADDR, 276 [BQ27XXX_REG_AE] = 0x22, 277 [BQ27XXX_REG_SOC] = 0x2c, 278 [BQ27XXX_REG_DCAP] = 0x3c, 279 [BQ27XXX_REG_AP] = 0x24, 280 BQ27XXX_DM_REG_ROWS, 281 }, 282 bq27520g2_regs[BQ27XXX_REG_MAX] = { 283 [BQ27XXX_REG_CTRL] = 0x00, 284 [BQ27XXX_REG_TEMP] = 0x06, 285 [BQ27XXX_REG_INT_TEMP] = 0x36, 286 [BQ27XXX_REG_VOLT] = 0x08, 287 [BQ27XXX_REG_AI] = 0x14, 288 [BQ27XXX_REG_FLAGS] = 0x0a, 289 [BQ27XXX_REG_TTE] = 0x16, 290 [BQ27XXX_REG_TTF] = 0x18, 291 [BQ27XXX_REG_TTES] = 0x1c, 292 [BQ27XXX_REG_TTECP] = 0x26, 293 [BQ27XXX_REG_NAC] = 0x0c, 294 [BQ27XXX_REG_RC] = 0x10, 295 [BQ27XXX_REG_FCC] = 0x12, 296 [BQ27XXX_REG_CYCT] = 0x2a, 297 [BQ27XXX_REG_AE] = 0x22, 298 [BQ27XXX_REG_SOC] = 0x2c, 299 [BQ27XXX_REG_DCAP] = 0x3c, 300 [BQ27XXX_REG_AP] = 0x24, 301 BQ27XXX_DM_REG_ROWS, 302 }, 303 bq27520g3_regs[BQ27XXX_REG_MAX] = { 304 [BQ27XXX_REG_CTRL] = 0x00, 305 [BQ27XXX_REG_TEMP] = 0x06, 306 [BQ27XXX_REG_INT_TEMP] = 0x36, 307 [BQ27XXX_REG_VOLT] = 0x08, 308 [BQ27XXX_REG_AI] = 0x14, 309 [BQ27XXX_REG_FLAGS] = 0x0a, 310 [BQ27XXX_REG_TTE] = 0x16, 311 [BQ27XXX_REG_TTF] = INVALID_REG_ADDR, 312 [BQ27XXX_REG_TTES] = 0x1c, 313 [BQ27XXX_REG_TTECP] = 0x26, 314 [BQ27XXX_REG_NAC] = 0x0c, 315 [BQ27XXX_REG_RC] = 0x10, 316 [BQ27XXX_REG_FCC] = 0x12, 317 [BQ27XXX_REG_CYCT] = 0x2a, 318 [BQ27XXX_REG_AE] = 0x22, 319 [BQ27XXX_REG_SOC] = 0x2c, 320 [BQ27XXX_REG_DCAP] = 0x3c, 321 [BQ27XXX_REG_AP] = 0x24, 322 BQ27XXX_DM_REG_ROWS, 323 }, 324 bq27520g4_regs[BQ27XXX_REG_MAX] = { 325 [BQ27XXX_REG_CTRL] = 0x00, 326 [BQ27XXX_REG_TEMP] = 0x06, 327 [BQ27XXX_REG_INT_TEMP] = 0x28, 328 [BQ27XXX_REG_VOLT] = 0x08, 329 [BQ27XXX_REG_AI] = 0x14, 330 [BQ27XXX_REG_FLAGS] = 0x0a, 331 [BQ27XXX_REG_TTE] = 0x16, 332 [BQ27XXX_REG_TTF] = INVALID_REG_ADDR, 333 [BQ27XXX_REG_TTES] = 0x1c, 334 [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR, 335 [BQ27XXX_REG_NAC] = 0x0c, 336 [BQ27XXX_REG_RC] = 0x10, 337 [BQ27XXX_REG_FCC] = 0x12, 338 [BQ27XXX_REG_CYCT] = 0x1e, 339 [BQ27XXX_REG_AE] = INVALID_REG_ADDR, 340 [BQ27XXX_REG_SOC] = 0x20, 341 [BQ27XXX_REG_DCAP] = INVALID_REG_ADDR, 342 [BQ27XXX_REG_AP] = INVALID_REG_ADDR, 343 BQ27XXX_DM_REG_ROWS, 344 }, 345 bq27521_regs[BQ27XXX_REG_MAX] = { 346 [BQ27XXX_REG_CTRL] = 0x02, 347 [BQ27XXX_REG_TEMP] = 0x0a, 348 [BQ27XXX_REG_INT_TEMP] = INVALID_REG_ADDR, 349 [BQ27XXX_REG_VOLT] = 0x0c, 350 [BQ27XXX_REG_AI] = 0x0e, 351 [BQ27XXX_REG_FLAGS] = 0x08, 352 [BQ27XXX_REG_TTE] = INVALID_REG_ADDR, 353 [BQ27XXX_REG_TTF] = INVALID_REG_ADDR, 354 [BQ27XXX_REG_TTES] = INVALID_REG_ADDR, 355 [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR, 356 [BQ27XXX_REG_NAC] = INVALID_REG_ADDR, 357 [BQ27XXX_REG_RC] = INVALID_REG_ADDR, 358 [BQ27XXX_REG_FCC] = INVALID_REG_ADDR, 359 [BQ27XXX_REG_CYCT] = INVALID_REG_ADDR, 360 [BQ27XXX_REG_AE] = INVALID_REG_ADDR, 361 [BQ27XXX_REG_SOC] = INVALID_REG_ADDR, 362 [BQ27XXX_REG_DCAP] = INVALID_REG_ADDR, 363 [BQ27XXX_REG_AP] = INVALID_REG_ADDR, 364 [BQ27XXX_DM_CTRL] = INVALID_REG_ADDR, 365 [BQ27XXX_DM_CLASS] = INVALID_REG_ADDR, 366 [BQ27XXX_DM_BLOCK] = INVALID_REG_ADDR, 367 [BQ27XXX_DM_DATA] = INVALID_REG_ADDR, 368 [BQ27XXX_DM_CKSUM] = INVALID_REG_ADDR, 369 }, 370 bq27530_regs[BQ27XXX_REG_MAX] = { 371 [BQ27XXX_REG_CTRL] = 0x00, 372 [BQ27XXX_REG_TEMP] = 0x06, 373 [BQ27XXX_REG_INT_TEMP] = 0x32, 374 [BQ27XXX_REG_VOLT] = 0x08, 375 [BQ27XXX_REG_AI] = 0x14, 376 [BQ27XXX_REG_FLAGS] = 0x0a, 377 [BQ27XXX_REG_TTE] = 0x16, 378 [BQ27XXX_REG_TTF] = INVALID_REG_ADDR, 379 [BQ27XXX_REG_TTES] = INVALID_REG_ADDR, 380 [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR, 381 [BQ27XXX_REG_NAC] = 0x0c, 382 [BQ27XXX_REG_RC] = 0x10, 383 [BQ27XXX_REG_FCC] = 0x12, 384 [BQ27XXX_REG_CYCT] = 0x2a, 385 [BQ27XXX_REG_AE] = INVALID_REG_ADDR, 386 [BQ27XXX_REG_SOC] = 0x2c, 387 [BQ27XXX_REG_DCAP] = INVALID_REG_ADDR, 388 [BQ27XXX_REG_AP] = 0x24, 389 BQ27XXX_DM_REG_ROWS, 390 }, 391 #define bq27531_regs bq27530_regs 392 bq27541_regs[BQ27XXX_REG_MAX] = { 393 [BQ27XXX_REG_CTRL] = 0x00, 394 [BQ27XXX_REG_TEMP] = 0x06, 395 [BQ27XXX_REG_INT_TEMP] = 0x28, 396 [BQ27XXX_REG_VOLT] = 0x08, 397 [BQ27XXX_REG_AI] = 0x14, 398 [BQ27XXX_REG_FLAGS] = 0x0a, 399 [BQ27XXX_REG_TTE] = 0x16, 400 [BQ27XXX_REG_TTF] = INVALID_REG_ADDR, 401 [BQ27XXX_REG_TTES] = INVALID_REG_ADDR, 402 [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR, 403 [BQ27XXX_REG_NAC] = 0x0c, 404 [BQ27XXX_REG_RC] = 0x10, 405 [BQ27XXX_REG_FCC] = 0x12, 406 [BQ27XXX_REG_CYCT] = 0x2a, 407 [BQ27XXX_REG_AE] = INVALID_REG_ADDR, 408 [BQ27XXX_REG_SOC] = 0x2c, 409 [BQ27XXX_REG_DCAP] = 0x3c, 410 [BQ27XXX_REG_AP] = 0x24, 411 BQ27XXX_DM_REG_ROWS, 412 }, 413 #define bq27542_regs bq27541_regs 414 #define bq27546_regs bq27541_regs 415 #define bq27742_regs bq27541_regs 416 bq27545_regs[BQ27XXX_REG_MAX] = { 417 [BQ27XXX_REG_CTRL] = 0x00, 418 [BQ27XXX_REG_TEMP] = 0x06, 419 [BQ27XXX_REG_INT_TEMP] = 0x28, 420 [BQ27XXX_REG_VOLT] = 0x08, 421 [BQ27XXX_REG_AI] = 0x14, 422 [BQ27XXX_REG_FLAGS] = 0x0a, 423 [BQ27XXX_REG_TTE] = 0x16, 424 [BQ27XXX_REG_TTF] = INVALID_REG_ADDR, 425 [BQ27XXX_REG_TTES] = INVALID_REG_ADDR, 426 [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR, 427 [BQ27XXX_REG_NAC] = 0x0c, 428 [BQ27XXX_REG_RC] = 0x10, 429 [BQ27XXX_REG_FCC] = 0x12, 430 [BQ27XXX_REG_CYCT] = 0x2a, 431 [BQ27XXX_REG_AE] = INVALID_REG_ADDR, 432 [BQ27XXX_REG_SOC] = 0x2c, 433 [BQ27XXX_REG_DCAP] = INVALID_REG_ADDR, 434 [BQ27XXX_REG_AP] = 0x24, 435 BQ27XXX_DM_REG_ROWS, 436 }, 437 bq27421_regs[BQ27XXX_REG_MAX] = { 438 [BQ27XXX_REG_CTRL] = 0x00, 439 [BQ27XXX_REG_TEMP] = 0x02, 440 [BQ27XXX_REG_INT_TEMP] = 0x1e, 441 [BQ27XXX_REG_VOLT] = 0x04, 442 [BQ27XXX_REG_AI] = 0x10, 443 [BQ27XXX_REG_FLAGS] = 0x06, 444 [BQ27XXX_REG_TTE] = INVALID_REG_ADDR, 445 [BQ27XXX_REG_TTF] = INVALID_REG_ADDR, 446 [BQ27XXX_REG_TTES] = INVALID_REG_ADDR, 447 [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR, 448 [BQ27XXX_REG_NAC] = 0x08, 449 [BQ27XXX_REG_RC] = 0x0c, 450 [BQ27XXX_REG_FCC] = 0x0e, 451 [BQ27XXX_REG_CYCT] = INVALID_REG_ADDR, 452 [BQ27XXX_REG_AE] = INVALID_REG_ADDR, 453 [BQ27XXX_REG_SOC] = 0x1c, 454 [BQ27XXX_REG_DCAP] = 0x3c, 455 [BQ27XXX_REG_AP] = 0x18, 456 BQ27XXX_DM_REG_ROWS, 457 }, 458 bq27426_regs[BQ27XXX_REG_MAX] = { 459 [BQ27XXX_REG_CTRL] = 0x00, 460 [BQ27XXX_REG_TEMP] = 0x02, 461 [BQ27XXX_REG_INT_TEMP] = 0x1e, 462 [BQ27XXX_REG_VOLT] = 0x04, 463 [BQ27XXX_REG_AI] = 0x10, 464 [BQ27XXX_REG_FLAGS] = 0x06, 465 [BQ27XXX_REG_TTE] = INVALID_REG_ADDR, 466 [BQ27XXX_REG_TTF] = INVALID_REG_ADDR, 467 [BQ27XXX_REG_TTES] = INVALID_REG_ADDR, 468 [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR, 469 [BQ27XXX_REG_NAC] = 0x08, 470 [BQ27XXX_REG_RC] = 0x0c, 471 [BQ27XXX_REG_FCC] = 0x0e, 472 [BQ27XXX_REG_CYCT] = INVALID_REG_ADDR, 473 [BQ27XXX_REG_AE] = INVALID_REG_ADDR, 474 [BQ27XXX_REG_SOC] = 0x1c, 475 [BQ27XXX_REG_DCAP] = INVALID_REG_ADDR, 476 [BQ27XXX_REG_AP] = 0x18, 477 BQ27XXX_DM_REG_ROWS, 478 }, 479 #define bq27411_regs bq27421_regs 480 #define bq27425_regs bq27421_regs 481 #define bq27441_regs bq27421_regs 482 #define bq27621_regs bq27421_regs 483 bq27z561_regs[BQ27XXX_REG_MAX] = { 484 [BQ27XXX_REG_CTRL] = 0x00, 485 [BQ27XXX_REG_TEMP] = 0x06, 486 [BQ27XXX_REG_INT_TEMP] = INVALID_REG_ADDR, 487 [BQ27XXX_REG_VOLT] = 0x08, 488 [BQ27XXX_REG_AI] = 0x14, 489 [BQ27XXX_REG_FLAGS] = 0x0a, 490 [BQ27XXX_REG_TTE] = 0x16, 491 [BQ27XXX_REG_TTF] = 0x18, 492 [BQ27XXX_REG_TTES] = INVALID_REG_ADDR, 493 [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR, 494 [BQ27XXX_REG_NAC] = INVALID_REG_ADDR, 495 [BQ27XXX_REG_RC] = 0x10, 496 [BQ27XXX_REG_FCC] = 0x12, 497 [BQ27XXX_REG_CYCT] = 0x2a, 498 [BQ27XXX_REG_AE] = 0x22, 499 [BQ27XXX_REG_SOC] = 0x2c, 500 [BQ27XXX_REG_DCAP] = 0x3c, 501 [BQ27XXX_REG_AP] = 0x22, 502 BQ27XXX_DM_REG_ROWS, 503 }, 504 bq28z610_regs[BQ27XXX_REG_MAX] = { 505 [BQ27XXX_REG_CTRL] = 0x00, 506 [BQ27XXX_REG_TEMP] = 0x06, 507 [BQ27XXX_REG_INT_TEMP] = INVALID_REG_ADDR, 508 [BQ27XXX_REG_VOLT] = 0x08, 509 [BQ27XXX_REG_AI] = 0x14, 510 [BQ27XXX_REG_FLAGS] = 0x0a, 511 [BQ27XXX_REG_TTE] = 0x16, 512 [BQ27XXX_REG_TTF] = 0x18, 513 [BQ27XXX_REG_TTES] = INVALID_REG_ADDR, 514 [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR, 515 [BQ27XXX_REG_NAC] = INVALID_REG_ADDR, 516 [BQ27XXX_REG_RC] = 0x10, 517 [BQ27XXX_REG_FCC] = 0x12, 518 [BQ27XXX_REG_CYCT] = 0x2a, 519 [BQ27XXX_REG_AE] = 0x22, 520 [BQ27XXX_REG_SOC] = 0x2c, 521 [BQ27XXX_REG_DCAP] = 0x3c, 522 [BQ27XXX_REG_AP] = 0x22, 523 BQ27XXX_DM_REG_ROWS, 524 }, 525 bq34z100_regs[BQ27XXX_REG_MAX] = { 526 [BQ27XXX_REG_CTRL] = 0x00, 527 [BQ27XXX_REG_TEMP] = 0x0c, 528 [BQ27XXX_REG_INT_TEMP] = 0x2a, 529 [BQ27XXX_REG_VOLT] = 0x08, 530 [BQ27XXX_REG_AI] = 0x0a, 531 [BQ27XXX_REG_FLAGS] = 0x0e, 532 [BQ27XXX_REG_TTE] = 0x18, 533 [BQ27XXX_REG_TTF] = 0x1a, 534 [BQ27XXX_REG_TTES] = 0x1e, 535 [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR, 536 [BQ27XXX_REG_NAC] = INVALID_REG_ADDR, 537 [BQ27XXX_REG_RC] = 0x04, 538 [BQ27XXX_REG_FCC] = 0x06, 539 [BQ27XXX_REG_CYCT] = 0x2c, 540 [BQ27XXX_REG_AE] = 0x24, 541 [BQ27XXX_REG_SOC] = 0x02, 542 [BQ27XXX_REG_DCAP] = 0x3c, 543 [BQ27XXX_REG_AP] = 0x22, 544 BQ27XXX_DM_REG_ROWS, 545 }, 546 bq78z100_regs[BQ27XXX_REG_MAX] = { 547 [BQ27XXX_REG_CTRL] = 0x00, 548 [BQ27XXX_REG_TEMP] = 0x06, 549 [BQ27XXX_REG_INT_TEMP] = 0x28, 550 [BQ27XXX_REG_VOLT] = 0x08, 551 [BQ27XXX_REG_AI] = 0x14, 552 [BQ27XXX_REG_FLAGS] = 0x0a, 553 [BQ27XXX_REG_TTE] = 0x16, 554 [BQ27XXX_REG_TTF] = 0x18, 555 [BQ27XXX_REG_TTES] = 0x1c, 556 [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR, 557 [BQ27XXX_REG_NAC] = INVALID_REG_ADDR, 558 [BQ27XXX_REG_RC] = 0x10, 559 [BQ27XXX_REG_FCC] = 0x12, 560 [BQ27XXX_REG_CYCT] = 0x2a, 561 [BQ27XXX_REG_AE] = INVALID_REG_ADDR, 562 [BQ27XXX_REG_SOC] = 0x2c, 563 [BQ27XXX_REG_DCAP] = 0x3c, 564 [BQ27XXX_REG_AP] = 0x22, 565 BQ27XXX_DM_REG_ROWS, 566 }; 567 568 static enum power_supply_property bq27000_props[] = { 569 POWER_SUPPLY_PROP_STATUS, 570 POWER_SUPPLY_PROP_PRESENT, 571 POWER_SUPPLY_PROP_VOLTAGE_NOW, 572 POWER_SUPPLY_PROP_CURRENT_NOW, 573 POWER_SUPPLY_PROP_CAPACITY, 574 POWER_SUPPLY_PROP_CAPACITY_LEVEL, 575 POWER_SUPPLY_PROP_TEMP, 576 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW, 577 POWER_SUPPLY_PROP_TIME_TO_EMPTY_AVG, 578 POWER_SUPPLY_PROP_TIME_TO_FULL_NOW, 579 POWER_SUPPLY_PROP_TECHNOLOGY, 580 POWER_SUPPLY_PROP_CHARGE_FULL, 581 POWER_SUPPLY_PROP_CHARGE_NOW, 582 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN, 583 POWER_SUPPLY_PROP_CYCLE_COUNT, 584 POWER_SUPPLY_PROP_ENERGY_NOW, 585 POWER_SUPPLY_PROP_POWER_AVG, 586 POWER_SUPPLY_PROP_HEALTH, 587 POWER_SUPPLY_PROP_MANUFACTURER, 588 POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN, 589 POWER_SUPPLY_PROP_VOLTAGE_MAX_DESIGN, 590 }; 591 592 static enum power_supply_property bq27010_props[] = { 593 POWER_SUPPLY_PROP_STATUS, 594 POWER_SUPPLY_PROP_PRESENT, 595 POWER_SUPPLY_PROP_VOLTAGE_NOW, 596 POWER_SUPPLY_PROP_CURRENT_NOW, 597 POWER_SUPPLY_PROP_CAPACITY, 598 POWER_SUPPLY_PROP_CAPACITY_LEVEL, 599 POWER_SUPPLY_PROP_TEMP, 600 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW, 601 POWER_SUPPLY_PROP_TIME_TO_EMPTY_AVG, 602 POWER_SUPPLY_PROP_TIME_TO_FULL_NOW, 603 POWER_SUPPLY_PROP_TECHNOLOGY, 604 POWER_SUPPLY_PROP_CHARGE_FULL, 605 POWER_SUPPLY_PROP_CHARGE_NOW, 606 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN, 607 POWER_SUPPLY_PROP_CYCLE_COUNT, 608 POWER_SUPPLY_PROP_HEALTH, 609 POWER_SUPPLY_PROP_MANUFACTURER, 610 POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN, 611 POWER_SUPPLY_PROP_VOLTAGE_MAX_DESIGN, 612 }; 613 614 #define bq2750x_props bq27510g3_props 615 #define bq2751x_props bq27510g3_props 616 #define bq2752x_props bq27510g3_props 617 618 static enum power_supply_property bq27500_props[] = { 619 POWER_SUPPLY_PROP_STATUS, 620 POWER_SUPPLY_PROP_PRESENT, 621 POWER_SUPPLY_PROP_VOLTAGE_NOW, 622 POWER_SUPPLY_PROP_CURRENT_NOW, 623 POWER_SUPPLY_PROP_CAPACITY, 624 POWER_SUPPLY_PROP_CAPACITY_LEVEL, 625 POWER_SUPPLY_PROP_TEMP, 626 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW, 627 POWER_SUPPLY_PROP_TIME_TO_FULL_NOW, 628 POWER_SUPPLY_PROP_TECHNOLOGY, 629 POWER_SUPPLY_PROP_CHARGE_FULL, 630 POWER_SUPPLY_PROP_CHARGE_NOW, 631 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN, 632 POWER_SUPPLY_PROP_CYCLE_COUNT, 633 POWER_SUPPLY_PROP_ENERGY_NOW, 634 POWER_SUPPLY_PROP_POWER_AVG, 635 POWER_SUPPLY_PROP_HEALTH, 636 POWER_SUPPLY_PROP_MANUFACTURER, 637 }; 638 #define bq27510g1_props bq27500_props 639 #define bq27510g2_props bq27500_props 640 641 static enum power_supply_property bq27510g3_props[] = { 642 POWER_SUPPLY_PROP_STATUS, 643 POWER_SUPPLY_PROP_PRESENT, 644 POWER_SUPPLY_PROP_VOLTAGE_NOW, 645 POWER_SUPPLY_PROP_CURRENT_NOW, 646 POWER_SUPPLY_PROP_CAPACITY, 647 POWER_SUPPLY_PROP_CAPACITY_LEVEL, 648 POWER_SUPPLY_PROP_TEMP, 649 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW, 650 POWER_SUPPLY_PROP_TECHNOLOGY, 651 POWER_SUPPLY_PROP_CHARGE_FULL, 652 POWER_SUPPLY_PROP_CHARGE_NOW, 653 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN, 654 POWER_SUPPLY_PROP_CYCLE_COUNT, 655 POWER_SUPPLY_PROP_HEALTH, 656 POWER_SUPPLY_PROP_MANUFACTURER, 657 }; 658 659 static enum power_supply_property bq27520g1_props[] = { 660 POWER_SUPPLY_PROP_STATUS, 661 POWER_SUPPLY_PROP_PRESENT, 662 POWER_SUPPLY_PROP_VOLTAGE_NOW, 663 POWER_SUPPLY_PROP_CURRENT_NOW, 664 POWER_SUPPLY_PROP_CAPACITY, 665 POWER_SUPPLY_PROP_CAPACITY_LEVEL, 666 POWER_SUPPLY_PROP_TEMP, 667 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW, 668 POWER_SUPPLY_PROP_TIME_TO_FULL_NOW, 669 POWER_SUPPLY_PROP_TECHNOLOGY, 670 POWER_SUPPLY_PROP_CHARGE_FULL, 671 POWER_SUPPLY_PROP_CHARGE_NOW, 672 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN, 673 POWER_SUPPLY_PROP_ENERGY_NOW, 674 POWER_SUPPLY_PROP_POWER_AVG, 675 POWER_SUPPLY_PROP_HEALTH, 676 POWER_SUPPLY_PROP_MANUFACTURER, 677 }; 678 679 #define bq27520g2_props bq27500_props 680 681 static enum power_supply_property bq27520g3_props[] = { 682 POWER_SUPPLY_PROP_STATUS, 683 POWER_SUPPLY_PROP_PRESENT, 684 POWER_SUPPLY_PROP_VOLTAGE_NOW, 685 POWER_SUPPLY_PROP_CURRENT_NOW, 686 POWER_SUPPLY_PROP_CAPACITY, 687 POWER_SUPPLY_PROP_CAPACITY_LEVEL, 688 POWER_SUPPLY_PROP_TEMP, 689 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW, 690 POWER_SUPPLY_PROP_TECHNOLOGY, 691 POWER_SUPPLY_PROP_CHARGE_FULL, 692 POWER_SUPPLY_PROP_CHARGE_NOW, 693 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN, 694 POWER_SUPPLY_PROP_CYCLE_COUNT, 695 POWER_SUPPLY_PROP_ENERGY_NOW, 696 POWER_SUPPLY_PROP_POWER_AVG, 697 POWER_SUPPLY_PROP_HEALTH, 698 POWER_SUPPLY_PROP_MANUFACTURER, 699 }; 700 701 static enum power_supply_property bq27520g4_props[] = { 702 POWER_SUPPLY_PROP_STATUS, 703 POWER_SUPPLY_PROP_PRESENT, 704 POWER_SUPPLY_PROP_VOLTAGE_NOW, 705 POWER_SUPPLY_PROP_CURRENT_NOW, 706 POWER_SUPPLY_PROP_CAPACITY, 707 POWER_SUPPLY_PROP_CAPACITY_LEVEL, 708 POWER_SUPPLY_PROP_TEMP, 709 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW, 710 POWER_SUPPLY_PROP_TECHNOLOGY, 711 POWER_SUPPLY_PROP_CHARGE_FULL, 712 POWER_SUPPLY_PROP_CHARGE_NOW, 713 POWER_SUPPLY_PROP_CYCLE_COUNT, 714 POWER_SUPPLY_PROP_HEALTH, 715 POWER_SUPPLY_PROP_MANUFACTURER, 716 }; 717 718 static enum power_supply_property bq27521_props[] = { 719 POWER_SUPPLY_PROP_STATUS, 720 POWER_SUPPLY_PROP_PRESENT, 721 POWER_SUPPLY_PROP_VOLTAGE_NOW, 722 POWER_SUPPLY_PROP_CURRENT_NOW, 723 POWER_SUPPLY_PROP_TEMP, 724 POWER_SUPPLY_PROP_TECHNOLOGY, 725 }; 726 727 static enum power_supply_property bq27530_props[] = { 728 POWER_SUPPLY_PROP_STATUS, 729 POWER_SUPPLY_PROP_PRESENT, 730 POWER_SUPPLY_PROP_VOLTAGE_NOW, 731 POWER_SUPPLY_PROP_CURRENT_NOW, 732 POWER_SUPPLY_PROP_CAPACITY, 733 POWER_SUPPLY_PROP_CAPACITY_LEVEL, 734 POWER_SUPPLY_PROP_TEMP, 735 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW, 736 POWER_SUPPLY_PROP_TECHNOLOGY, 737 POWER_SUPPLY_PROP_CHARGE_FULL, 738 POWER_SUPPLY_PROP_CHARGE_NOW, 739 POWER_SUPPLY_PROP_POWER_AVG, 740 POWER_SUPPLY_PROP_HEALTH, 741 POWER_SUPPLY_PROP_CYCLE_COUNT, 742 POWER_SUPPLY_PROP_MANUFACTURER, 743 }; 744 #define bq27531_props bq27530_props 745 746 static enum power_supply_property bq27541_props[] = { 747 POWER_SUPPLY_PROP_STATUS, 748 POWER_SUPPLY_PROP_PRESENT, 749 POWER_SUPPLY_PROP_VOLTAGE_NOW, 750 POWER_SUPPLY_PROP_CURRENT_NOW, 751 POWER_SUPPLY_PROP_CAPACITY, 752 POWER_SUPPLY_PROP_CAPACITY_LEVEL, 753 POWER_SUPPLY_PROP_TEMP, 754 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW, 755 POWER_SUPPLY_PROP_TECHNOLOGY, 756 POWER_SUPPLY_PROP_CHARGE_FULL, 757 POWER_SUPPLY_PROP_CHARGE_NOW, 758 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN, 759 POWER_SUPPLY_PROP_CYCLE_COUNT, 760 POWER_SUPPLY_PROP_POWER_AVG, 761 POWER_SUPPLY_PROP_HEALTH, 762 POWER_SUPPLY_PROP_MANUFACTURER, 763 }; 764 #define bq27542_props bq27541_props 765 #define bq27546_props bq27541_props 766 #define bq27742_props bq27541_props 767 768 static enum power_supply_property bq27545_props[] = { 769 POWER_SUPPLY_PROP_STATUS, 770 POWER_SUPPLY_PROP_PRESENT, 771 POWER_SUPPLY_PROP_VOLTAGE_NOW, 772 POWER_SUPPLY_PROP_CURRENT_NOW, 773 POWER_SUPPLY_PROP_CAPACITY, 774 POWER_SUPPLY_PROP_CAPACITY_LEVEL, 775 POWER_SUPPLY_PROP_TEMP, 776 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW, 777 POWER_SUPPLY_PROP_TECHNOLOGY, 778 POWER_SUPPLY_PROP_CHARGE_FULL, 779 POWER_SUPPLY_PROP_CHARGE_NOW, 780 POWER_SUPPLY_PROP_HEALTH, 781 POWER_SUPPLY_PROP_CYCLE_COUNT, 782 POWER_SUPPLY_PROP_POWER_AVG, 783 POWER_SUPPLY_PROP_MANUFACTURER, 784 }; 785 786 static enum power_supply_property bq27421_props[] = { 787 POWER_SUPPLY_PROP_STATUS, 788 POWER_SUPPLY_PROP_PRESENT, 789 POWER_SUPPLY_PROP_VOLTAGE_NOW, 790 POWER_SUPPLY_PROP_CURRENT_NOW, 791 POWER_SUPPLY_PROP_CAPACITY, 792 POWER_SUPPLY_PROP_CAPACITY_LEVEL, 793 POWER_SUPPLY_PROP_TEMP, 794 POWER_SUPPLY_PROP_TECHNOLOGY, 795 POWER_SUPPLY_PROP_CHARGE_FULL, 796 POWER_SUPPLY_PROP_CHARGE_NOW, 797 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN, 798 POWER_SUPPLY_PROP_MANUFACTURER, 799 }; 800 #define bq27411_props bq27421_props 801 #define bq27425_props bq27421_props 802 #define bq27441_props bq27421_props 803 #define bq27621_props bq27421_props 804 805 static enum power_supply_property bq27426_props[] = { 806 POWER_SUPPLY_PROP_STATUS, 807 POWER_SUPPLY_PROP_PRESENT, 808 POWER_SUPPLY_PROP_VOLTAGE_NOW, 809 POWER_SUPPLY_PROP_CURRENT_NOW, 810 POWER_SUPPLY_PROP_CAPACITY, 811 POWER_SUPPLY_PROP_CAPACITY_LEVEL, 812 POWER_SUPPLY_PROP_TEMP, 813 POWER_SUPPLY_PROP_TECHNOLOGY, 814 POWER_SUPPLY_PROP_CHARGE_FULL, 815 POWER_SUPPLY_PROP_CHARGE_NOW, 816 POWER_SUPPLY_PROP_MANUFACTURER, 817 }; 818 819 static enum power_supply_property bq27z561_props[] = { 820 POWER_SUPPLY_PROP_STATUS, 821 POWER_SUPPLY_PROP_PRESENT, 822 POWER_SUPPLY_PROP_VOLTAGE_NOW, 823 POWER_SUPPLY_PROP_CURRENT_NOW, 824 POWER_SUPPLY_PROP_CAPACITY, 825 POWER_SUPPLY_PROP_CAPACITY_LEVEL, 826 POWER_SUPPLY_PROP_TEMP, 827 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW, 828 POWER_SUPPLY_PROP_TIME_TO_FULL_NOW, 829 POWER_SUPPLY_PROP_TECHNOLOGY, 830 POWER_SUPPLY_PROP_CHARGE_FULL, 831 POWER_SUPPLY_PROP_CHARGE_NOW, 832 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN, 833 POWER_SUPPLY_PROP_CYCLE_COUNT, 834 POWER_SUPPLY_PROP_POWER_AVG, 835 POWER_SUPPLY_PROP_HEALTH, 836 POWER_SUPPLY_PROP_MANUFACTURER, 837 }; 838 839 static enum power_supply_property bq28z610_props[] = { 840 POWER_SUPPLY_PROP_STATUS, 841 POWER_SUPPLY_PROP_PRESENT, 842 POWER_SUPPLY_PROP_VOLTAGE_NOW, 843 POWER_SUPPLY_PROP_CURRENT_NOW, 844 POWER_SUPPLY_PROP_CAPACITY, 845 POWER_SUPPLY_PROP_CAPACITY_LEVEL, 846 POWER_SUPPLY_PROP_TEMP, 847 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW, 848 POWER_SUPPLY_PROP_TIME_TO_FULL_NOW, 849 POWER_SUPPLY_PROP_TECHNOLOGY, 850 POWER_SUPPLY_PROP_CHARGE_FULL, 851 POWER_SUPPLY_PROP_CHARGE_NOW, 852 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN, 853 POWER_SUPPLY_PROP_CYCLE_COUNT, 854 POWER_SUPPLY_PROP_POWER_AVG, 855 POWER_SUPPLY_PROP_HEALTH, 856 POWER_SUPPLY_PROP_MANUFACTURER, 857 }; 858 859 static enum power_supply_property bq34z100_props[] = { 860 POWER_SUPPLY_PROP_STATUS, 861 POWER_SUPPLY_PROP_PRESENT, 862 POWER_SUPPLY_PROP_VOLTAGE_NOW, 863 POWER_SUPPLY_PROP_CURRENT_NOW, 864 POWER_SUPPLY_PROP_CAPACITY, 865 POWER_SUPPLY_PROP_CAPACITY_LEVEL, 866 POWER_SUPPLY_PROP_TEMP, 867 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW, 868 POWER_SUPPLY_PROP_TIME_TO_EMPTY_AVG, 869 POWER_SUPPLY_PROP_TIME_TO_FULL_NOW, 870 POWER_SUPPLY_PROP_TECHNOLOGY, 871 POWER_SUPPLY_PROP_CHARGE_FULL, 872 POWER_SUPPLY_PROP_CHARGE_NOW, 873 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN, 874 POWER_SUPPLY_PROP_CYCLE_COUNT, 875 POWER_SUPPLY_PROP_ENERGY_NOW, 876 POWER_SUPPLY_PROP_POWER_AVG, 877 POWER_SUPPLY_PROP_HEALTH, 878 POWER_SUPPLY_PROP_MANUFACTURER, 879 }; 880 881 static enum power_supply_property bq78z100_props[] = { 882 POWER_SUPPLY_PROP_STATUS, 883 POWER_SUPPLY_PROP_PRESENT, 884 POWER_SUPPLY_PROP_VOLTAGE_NOW, 885 POWER_SUPPLY_PROP_CURRENT_NOW, 886 POWER_SUPPLY_PROP_CAPACITY, 887 POWER_SUPPLY_PROP_CAPACITY_LEVEL, 888 POWER_SUPPLY_PROP_TEMP, 889 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW, 890 POWER_SUPPLY_PROP_TIME_TO_FULL_NOW, 891 POWER_SUPPLY_PROP_TECHNOLOGY, 892 POWER_SUPPLY_PROP_CHARGE_FULL, 893 POWER_SUPPLY_PROP_CHARGE_NOW, 894 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN, 895 POWER_SUPPLY_PROP_CYCLE_COUNT, 896 POWER_SUPPLY_PROP_POWER_AVG, 897 POWER_SUPPLY_PROP_HEALTH, 898 POWER_SUPPLY_PROP_MANUFACTURER, 899 }; 900 901 struct bq27xxx_dm_reg { 902 u8 subclass_id; 903 u8 offset; 904 u8 bytes; 905 u16 min, max; 906 }; 907 908 enum bq27xxx_dm_reg_id { 909 BQ27XXX_DM_DESIGN_CAPACITY = 0, 910 BQ27XXX_DM_DESIGN_ENERGY, 911 BQ27XXX_DM_TERMINATE_VOLTAGE, 912 }; 913 914 #define bq27000_dm_regs NULL 915 #define bq27010_dm_regs NULL 916 #define bq2750x_dm_regs NULL 917 #define bq2751x_dm_regs NULL 918 #define bq2752x_dm_regs NULL 919 920 #if 0 /* not yet tested */ 921 static struct bq27xxx_dm_reg bq27500_dm_regs[] = { 922 [BQ27XXX_DM_DESIGN_CAPACITY] = { 48, 10, 2, 0, 65535 }, 923 [BQ27XXX_DM_DESIGN_ENERGY] = { }, /* missing on chip */ 924 [BQ27XXX_DM_TERMINATE_VOLTAGE] = { 80, 48, 2, 1000, 32767 }, 925 }; 926 #else 927 #define bq27500_dm_regs NULL 928 #endif 929 930 /* todo create data memory definitions from datasheets and test on chips */ 931 #define bq27510g1_dm_regs NULL 932 #define bq27510g2_dm_regs NULL 933 #define bq27510g3_dm_regs NULL 934 #define bq27520g1_dm_regs NULL 935 #define bq27520g2_dm_regs NULL 936 #define bq27520g3_dm_regs NULL 937 #define bq27520g4_dm_regs NULL 938 #define bq27521_dm_regs NULL 939 #define bq27530_dm_regs NULL 940 #define bq27531_dm_regs NULL 941 #define bq27541_dm_regs NULL 942 #define bq27542_dm_regs NULL 943 #define bq27546_dm_regs NULL 944 #define bq27742_dm_regs NULL 945 946 #if 0 /* not yet tested */ 947 static struct bq27xxx_dm_reg bq27545_dm_regs[] = { 948 [BQ27XXX_DM_DESIGN_CAPACITY] = { 48, 23, 2, 0, 32767 }, 949 [BQ27XXX_DM_DESIGN_ENERGY] = { 48, 25, 2, 0, 32767 }, 950 [BQ27XXX_DM_TERMINATE_VOLTAGE] = { 80, 67, 2, 2800, 3700 }, 951 }; 952 #else 953 #define bq27545_dm_regs NULL 954 #endif 955 956 static struct bq27xxx_dm_reg bq27411_dm_regs[] = { 957 [BQ27XXX_DM_DESIGN_CAPACITY] = { 82, 10, 2, 0, 32767 }, 958 [BQ27XXX_DM_DESIGN_ENERGY] = { 82, 12, 2, 0, 32767 }, 959 [BQ27XXX_DM_TERMINATE_VOLTAGE] = { 82, 16, 2, 2800, 3700 }, 960 }; 961 962 static struct bq27xxx_dm_reg bq27421_dm_regs[] = { 963 [BQ27XXX_DM_DESIGN_CAPACITY] = { 82, 10, 2, 0, 8000 }, 964 [BQ27XXX_DM_DESIGN_ENERGY] = { 82, 12, 2, 0, 32767 }, 965 [BQ27XXX_DM_TERMINATE_VOLTAGE] = { 82, 16, 2, 2500, 3700 }, 966 }; 967 968 static struct bq27xxx_dm_reg bq27425_dm_regs[] = { 969 [BQ27XXX_DM_DESIGN_CAPACITY] = { 82, 12, 2, 0, 32767 }, 970 [BQ27XXX_DM_DESIGN_ENERGY] = { 82, 14, 2, 0, 32767 }, 971 [BQ27XXX_DM_TERMINATE_VOLTAGE] = { 82, 18, 2, 2800, 3700 }, 972 }; 973 974 static struct bq27xxx_dm_reg bq27426_dm_regs[] = { 975 [BQ27XXX_DM_DESIGN_CAPACITY] = { 82, 6, 2, 0, 8000 }, 976 [BQ27XXX_DM_DESIGN_ENERGY] = { 82, 8, 2, 0, 32767 }, 977 [BQ27XXX_DM_TERMINATE_VOLTAGE] = { 82, 10, 2, 2500, 3700 }, 978 }; 979 980 #if 0 /* not yet tested */ 981 #define bq27441_dm_regs bq27421_dm_regs 982 #else 983 #define bq27441_dm_regs NULL 984 #endif 985 986 #if 0 /* not yet tested */ 987 static struct bq27xxx_dm_reg bq27621_dm_regs[] = { 988 [BQ27XXX_DM_DESIGN_CAPACITY] = { 82, 3, 2, 0, 8000 }, 989 [BQ27XXX_DM_DESIGN_ENERGY] = { 82, 5, 2, 0, 32767 }, 990 [BQ27XXX_DM_TERMINATE_VOLTAGE] = { 82, 9, 2, 2500, 3700 }, 991 }; 992 #else 993 #define bq27621_dm_regs NULL 994 #endif 995 996 #define bq27z561_dm_regs NULL 997 #define bq28z610_dm_regs NULL 998 #define bq34z100_dm_regs NULL 999 #define bq78z100_dm_regs NULL 1000 1001 #define BQ27XXX_O_ZERO BIT(0) 1002 #define BQ27XXX_O_OTDC BIT(1) /* has OTC/OTD overtemperature flags */ 1003 #define BQ27XXX_O_UTOT BIT(2) /* has OT overtemperature flag */ 1004 #define BQ27XXX_O_CFGUP BIT(3) 1005 #define BQ27XXX_O_RAM BIT(4) 1006 #define BQ27Z561_O_BITS BIT(5) 1007 #define BQ27XXX_O_SOC_SI BIT(6) /* SoC is single register */ 1008 #define BQ27XXX_O_HAS_CI BIT(7) /* has Capacity Inaccurate flag */ 1009 #define BQ27XXX_O_MUL_CHEM BIT(8) /* multiple chemistries supported */ 1010 1011 #define BQ27XXX_DATA(ref, key, opt) { \ 1012 .opts = (opt), \ 1013 .unseal_key = key, \ 1014 .regs = ref##_regs, \ 1015 .dm_regs = ref##_dm_regs, \ 1016 .props = ref##_props, \ 1017 .props_size = ARRAY_SIZE(ref##_props) } 1018 1019 static struct { 1020 u32 opts; 1021 u32 unseal_key; 1022 u8 *regs; 1023 struct bq27xxx_dm_reg *dm_regs; 1024 enum power_supply_property *props; 1025 size_t props_size; 1026 } bq27xxx_chip_data[] = { 1027 [BQ27000] = BQ27XXX_DATA(bq27000, 0 , BQ27XXX_O_ZERO | BQ27XXX_O_SOC_SI | BQ27XXX_O_HAS_CI), 1028 [BQ27010] = BQ27XXX_DATA(bq27010, 0 , BQ27XXX_O_ZERO | BQ27XXX_O_SOC_SI | BQ27XXX_O_HAS_CI), 1029 [BQ2750X] = BQ27XXX_DATA(bq2750x, 0 , BQ27XXX_O_OTDC), 1030 [BQ2751X] = BQ27XXX_DATA(bq2751x, 0 , BQ27XXX_O_OTDC), 1031 [BQ2752X] = BQ27XXX_DATA(bq2752x, 0 , BQ27XXX_O_OTDC), 1032 [BQ27500] = BQ27XXX_DATA(bq27500, 0x04143672, BQ27XXX_O_OTDC), 1033 [BQ27510G1] = BQ27XXX_DATA(bq27510g1, 0 , BQ27XXX_O_OTDC), 1034 [BQ27510G2] = BQ27XXX_DATA(bq27510g2, 0 , BQ27XXX_O_OTDC), 1035 [BQ27510G3] = BQ27XXX_DATA(bq27510g3, 0 , BQ27XXX_O_OTDC), 1036 [BQ27520G1] = BQ27XXX_DATA(bq27520g1, 0 , BQ27XXX_O_OTDC), 1037 [BQ27520G2] = BQ27XXX_DATA(bq27520g2, 0 , BQ27XXX_O_OTDC), 1038 [BQ27520G3] = BQ27XXX_DATA(bq27520g3, 0 , BQ27XXX_O_OTDC), 1039 [BQ27520G4] = BQ27XXX_DATA(bq27520g4, 0 , BQ27XXX_O_OTDC), 1040 [BQ27521] = BQ27XXX_DATA(bq27521, 0 , 0), 1041 [BQ27530] = BQ27XXX_DATA(bq27530, 0 , BQ27XXX_O_UTOT), 1042 [BQ27531] = BQ27XXX_DATA(bq27531, 0 , BQ27XXX_O_UTOT), 1043 [BQ27541] = BQ27XXX_DATA(bq27541, 0 , BQ27XXX_O_OTDC), 1044 [BQ27542] = BQ27XXX_DATA(bq27542, 0 , BQ27XXX_O_OTDC), 1045 [BQ27546] = BQ27XXX_DATA(bq27546, 0 , BQ27XXX_O_OTDC), 1046 [BQ27742] = BQ27XXX_DATA(bq27742, 0 , BQ27XXX_O_OTDC), 1047 [BQ27545] = BQ27XXX_DATA(bq27545, 0x04143672, BQ27XXX_O_OTDC), 1048 [BQ27411] = BQ27XXX_DATA(bq27411, 0x80008000, BQ27XXX_O_UTOT | BQ27XXX_O_CFGUP | BQ27XXX_O_RAM), 1049 [BQ27421] = BQ27XXX_DATA(bq27421, 0x80008000, BQ27XXX_O_UTOT | BQ27XXX_O_CFGUP | BQ27XXX_O_RAM), 1050 [BQ27425] = BQ27XXX_DATA(bq27425, 0x04143672, BQ27XXX_O_UTOT | BQ27XXX_O_CFGUP), 1051 [BQ27426] = BQ27XXX_DATA(bq27426, 0x80008000, BQ27XXX_O_UTOT | BQ27XXX_O_CFGUP | BQ27XXX_O_RAM), 1052 [BQ27441] = BQ27XXX_DATA(bq27441, 0x80008000, BQ27XXX_O_UTOT | BQ27XXX_O_CFGUP | BQ27XXX_O_RAM), 1053 [BQ27621] = BQ27XXX_DATA(bq27621, 0x80008000, BQ27XXX_O_UTOT | BQ27XXX_O_CFGUP | BQ27XXX_O_RAM), 1054 [BQ27Z561] = BQ27XXX_DATA(bq27z561, 0 , BQ27Z561_O_BITS), 1055 [BQ28Z610] = BQ27XXX_DATA(bq28z610, 0 , BQ27Z561_O_BITS), 1056 [BQ34Z100] = BQ27XXX_DATA(bq34z100, 0 , BQ27XXX_O_OTDC | BQ27XXX_O_SOC_SI | \ 1057 BQ27XXX_O_HAS_CI | BQ27XXX_O_MUL_CHEM), 1058 [BQ78Z100] = BQ27XXX_DATA(bq78z100, 0 , BQ27Z561_O_BITS), 1059 }; 1060 1061 static DEFINE_MUTEX(bq27xxx_list_lock); 1062 static LIST_HEAD(bq27xxx_battery_devices); 1063 1064 #define BQ27XXX_MSLEEP(i) usleep_range((i)*1000, (i)*1000+500) 1065 1066 #define BQ27XXX_DM_SZ 32 1067 1068 /** 1069 * struct bq27xxx_dm_buf - chip data memory buffer 1070 * @class: data memory subclass_id 1071 * @block: data memory block number 1072 * @data: data from/for the block 1073 * @has_data: true if data has been filled by read 1074 * @dirty: true if data has changed since last read/write 1075 * 1076 * Encapsulates info required to manage chip data memory blocks. 1077 */ 1078 struct bq27xxx_dm_buf { 1079 u8 class; 1080 u8 block; 1081 u8 data[BQ27XXX_DM_SZ]; 1082 bool has_data, dirty; 1083 }; 1084 1085 #define BQ27XXX_DM_BUF(di, i) { \ 1086 .class = (di)->dm_regs[i].subclass_id, \ 1087 .block = (di)->dm_regs[i].offset / BQ27XXX_DM_SZ, \ 1088 } 1089 1090 static inline __be16 *bq27xxx_dm_reg_ptr(struct bq27xxx_dm_buf *buf, 1091 struct bq27xxx_dm_reg *reg) 1092 { 1093 if (buf->class == reg->subclass_id && 1094 buf->block == reg->offset / BQ27XXX_DM_SZ) 1095 return (__be16 *) (buf->data + reg->offset % BQ27XXX_DM_SZ); 1096 1097 return NULL; 1098 } 1099 1100 static const char * const bq27xxx_dm_reg_name[] = { 1101 [BQ27XXX_DM_DESIGN_CAPACITY] = "design-capacity", 1102 [BQ27XXX_DM_DESIGN_ENERGY] = "design-energy", 1103 [BQ27XXX_DM_TERMINATE_VOLTAGE] = "terminate-voltage", 1104 }; 1105 1106 1107 static bool bq27xxx_dt_to_nvm = true; 1108 module_param_named(dt_monitored_battery_updates_nvm, bq27xxx_dt_to_nvm, bool, 0444); 1109 MODULE_PARM_DESC(dt_monitored_battery_updates_nvm, 1110 "Devicetree monitored-battery config updates data memory on NVM/flash chips.\n" 1111 "Users must set this =0 when installing a different type of battery!\n" 1112 "Default is =1." 1113 #ifndef CONFIG_BATTERY_BQ27XXX_DT_UPDATES_NVM 1114 "\nSetting this affects future kernel updates, not the current configuration." 1115 #endif 1116 ); 1117 1118 static int poll_interval_param_set(const char *val, const struct kernel_param *kp) 1119 { 1120 struct bq27xxx_device_info *di; 1121 unsigned int prev_val = *(unsigned int *) kp->arg; 1122 int ret; 1123 1124 ret = param_set_uint(val, kp); 1125 if (ret < 0 || prev_val == *(unsigned int *) kp->arg) 1126 return ret; 1127 1128 mutex_lock(&bq27xxx_list_lock); 1129 list_for_each_entry(di, &bq27xxx_battery_devices, list) 1130 mod_delayed_work(system_percpu_wq, &di->work, 0); 1131 mutex_unlock(&bq27xxx_list_lock); 1132 1133 return ret; 1134 } 1135 1136 static const struct kernel_param_ops param_ops_poll_interval = { 1137 .get = param_get_uint, 1138 .set = poll_interval_param_set, 1139 }; 1140 1141 static unsigned int poll_interval = 360; 1142 module_param_cb(poll_interval, ¶m_ops_poll_interval, &poll_interval, 0644); 1143 MODULE_PARM_DESC(poll_interval, 1144 "battery poll interval in seconds - 0 disables polling"); 1145 1146 /* 1147 * Common code for BQ27xxx devices 1148 */ 1149 1150 static inline int bq27xxx_read(struct bq27xxx_device_info *di, int reg_index, 1151 bool single) 1152 { 1153 int ret; 1154 1155 if (!di || di->regs[reg_index] == INVALID_REG_ADDR) 1156 return -EINVAL; 1157 1158 ret = di->bus.read(di, di->regs[reg_index], single); 1159 if (ret < 0) 1160 dev_dbg(di->dev, "failed to read register 0x%02x (index %d)\n", 1161 di->regs[reg_index], reg_index); 1162 1163 return ret; 1164 } 1165 1166 static inline int bq27xxx_write(struct bq27xxx_device_info *di, int reg_index, 1167 u16 value, bool single) 1168 { 1169 int ret; 1170 1171 if (!di || di->regs[reg_index] == INVALID_REG_ADDR) 1172 return -EINVAL; 1173 1174 if (!di->bus.write) 1175 return -EOPNOTSUPP; 1176 1177 ret = di->bus.write(di, di->regs[reg_index], value, single); 1178 if (ret < 0) 1179 dev_dbg(di->dev, "failed to write register 0x%02x (index %d)\n", 1180 di->regs[reg_index], reg_index); 1181 1182 return ret; 1183 } 1184 1185 static inline int bq27xxx_read_block(struct bq27xxx_device_info *di, int reg_index, 1186 u8 *data, int len) 1187 { 1188 int ret; 1189 1190 if (!di || di->regs[reg_index] == INVALID_REG_ADDR) 1191 return -EINVAL; 1192 1193 if (!di->bus.read_bulk) 1194 return -EOPNOTSUPP; 1195 1196 ret = di->bus.read_bulk(di, di->regs[reg_index], data, len); 1197 if (ret < 0) 1198 dev_dbg(di->dev, "failed to read_bulk register 0x%02x (index %d)\n", 1199 di->regs[reg_index], reg_index); 1200 1201 return ret; 1202 } 1203 1204 static inline int bq27xxx_write_block(struct bq27xxx_device_info *di, int reg_index, 1205 u8 *data, int len) 1206 { 1207 int ret; 1208 1209 if (!di || di->regs[reg_index] == INVALID_REG_ADDR) 1210 return -EINVAL; 1211 1212 if (!di->bus.write_bulk) 1213 return -EOPNOTSUPP; 1214 1215 ret = di->bus.write_bulk(di, di->regs[reg_index], data, len); 1216 if (ret < 0) 1217 dev_dbg(di->dev, "failed to write_bulk register 0x%02x (index %d)\n", 1218 di->regs[reg_index], reg_index); 1219 1220 return ret; 1221 } 1222 1223 static int bq27xxx_battery_seal(struct bq27xxx_device_info *di) 1224 { 1225 int ret; 1226 1227 ret = bq27xxx_write(di, BQ27XXX_REG_CTRL, BQ27XXX_SEALED, false); 1228 if (ret < 0) { 1229 dev_err(di->dev, "bus error on seal: %d\n", ret); 1230 return ret; 1231 } 1232 1233 return 0; 1234 } 1235 1236 static int bq27xxx_battery_unseal(struct bq27xxx_device_info *di) 1237 { 1238 int ret; 1239 1240 if (di->unseal_key == 0) { 1241 dev_err(di->dev, "unseal failed due to missing key\n"); 1242 return -EINVAL; 1243 } 1244 1245 ret = bq27xxx_write(di, BQ27XXX_REG_CTRL, (u16)(di->unseal_key >> 16), false); 1246 if (ret < 0) 1247 goto out; 1248 1249 ret = bq27xxx_write(di, BQ27XXX_REG_CTRL, (u16)di->unseal_key, false); 1250 if (ret < 0) 1251 goto out; 1252 1253 return 0; 1254 1255 out: 1256 dev_err(di->dev, "bus error on unseal: %d\n", ret); 1257 return ret; 1258 } 1259 1260 static u8 bq27xxx_battery_checksum_dm_block(struct bq27xxx_dm_buf *buf) 1261 { 1262 u16 sum = 0; 1263 int i; 1264 1265 for (i = 0; i < BQ27XXX_DM_SZ; i++) 1266 sum += buf->data[i]; 1267 sum &= 0xff; 1268 1269 return 0xff - sum; 1270 } 1271 1272 static int bq27xxx_battery_read_dm_block(struct bq27xxx_device_info *di, 1273 struct bq27xxx_dm_buf *buf) 1274 { 1275 int ret; 1276 1277 buf->has_data = false; 1278 1279 ret = bq27xxx_write(di, BQ27XXX_DM_CLASS, buf->class, true); 1280 if (ret < 0) 1281 goto out; 1282 1283 ret = bq27xxx_write(di, BQ27XXX_DM_BLOCK, buf->block, true); 1284 if (ret < 0) 1285 goto out; 1286 1287 BQ27XXX_MSLEEP(1); 1288 1289 ret = bq27xxx_read_block(di, BQ27XXX_DM_DATA, buf->data, BQ27XXX_DM_SZ); 1290 if (ret < 0) 1291 goto out; 1292 1293 ret = bq27xxx_read(di, BQ27XXX_DM_CKSUM, true); 1294 if (ret < 0) 1295 goto out; 1296 1297 if ((u8)ret != bq27xxx_battery_checksum_dm_block(buf)) { 1298 ret = -EINVAL; 1299 goto out; 1300 } 1301 1302 buf->has_data = true; 1303 buf->dirty = false; 1304 1305 return 0; 1306 1307 out: 1308 dev_err(di->dev, "bus error reading chip memory: %d\n", ret); 1309 return ret; 1310 } 1311 1312 static void bq27xxx_battery_update_dm_block(struct bq27xxx_device_info *di, 1313 struct bq27xxx_dm_buf *buf, 1314 enum bq27xxx_dm_reg_id reg_id, 1315 unsigned int val) 1316 { 1317 struct bq27xxx_dm_reg *reg = &di->dm_regs[reg_id]; 1318 const char *str = bq27xxx_dm_reg_name[reg_id]; 1319 __be16 *prev = bq27xxx_dm_reg_ptr(buf, reg); 1320 1321 if (prev == NULL) { 1322 dev_warn(di->dev, "buffer does not match %s dm spec\n", str); 1323 return; 1324 } 1325 1326 if (reg->bytes != 2) { 1327 dev_warn(di->dev, "%s dm spec has unsupported byte size\n", str); 1328 return; 1329 } 1330 1331 if (!buf->has_data) 1332 return; 1333 1334 if (be16_to_cpup(prev) == val) { 1335 dev_info(di->dev, "%s has %u\n", str, val); 1336 return; 1337 } 1338 1339 #ifdef CONFIG_BATTERY_BQ27XXX_DT_UPDATES_NVM 1340 if (!(di->opts & BQ27XXX_O_RAM) && !bq27xxx_dt_to_nvm) { 1341 #else 1342 if (!(di->opts & BQ27XXX_O_RAM)) { 1343 #endif 1344 /* devicetree and NVM differ; defer to NVM */ 1345 dev_warn(di->dev, "%s has %u; update to %u disallowed " 1346 #ifdef CONFIG_BATTERY_BQ27XXX_DT_UPDATES_NVM 1347 "by dt_monitored_battery_updates_nvm=0" 1348 #else 1349 "for flash/NVM data memory" 1350 #endif 1351 "\n", str, be16_to_cpup(prev), val); 1352 return; 1353 } 1354 1355 dev_info(di->dev, "update %s to %u\n", str, val); 1356 1357 *prev = cpu_to_be16(val); 1358 buf->dirty = true; 1359 } 1360 1361 static int bq27xxx_battery_cfgupdate_priv(struct bq27xxx_device_info *di, bool active) 1362 { 1363 const int limit = 100; 1364 u16 cmd = active ? BQ27XXX_SET_CFGUPDATE : BQ27XXX_SOFT_RESET; 1365 int ret, try = limit; 1366 1367 ret = bq27xxx_write(di, BQ27XXX_REG_CTRL, cmd, false); 1368 if (ret < 0) 1369 return ret; 1370 1371 do { 1372 BQ27XXX_MSLEEP(25); 1373 ret = bq27xxx_read(di, BQ27XXX_REG_FLAGS, false); 1374 if (ret < 0) 1375 return ret; 1376 } while (!!(ret & BQ27XXX_FLAG_CFGUP) != active && --try); 1377 1378 if (!try && di->chip != BQ27425) { // 425 has a bug 1379 dev_err(di->dev, "timed out waiting for cfgupdate flag %d\n", active); 1380 return -EINVAL; 1381 } 1382 1383 if (limit - try > 3) 1384 dev_warn(di->dev, "cfgupdate %d, retries %d\n", active, limit - try); 1385 1386 return 0; 1387 } 1388 1389 static inline int bq27xxx_battery_set_cfgupdate(struct bq27xxx_device_info *di) 1390 { 1391 int ret = bq27xxx_battery_cfgupdate_priv(di, true); 1392 if (ret < 0 && ret != -EINVAL) 1393 dev_err(di->dev, "bus error on set_cfgupdate: %d\n", ret); 1394 1395 return ret; 1396 } 1397 1398 static inline int bq27xxx_battery_soft_reset(struct bq27xxx_device_info *di) 1399 { 1400 int ret = bq27xxx_battery_cfgupdate_priv(di, false); 1401 if (ret < 0 && ret != -EINVAL) 1402 dev_err(di->dev, "bus error on soft_reset: %d\n", ret); 1403 1404 return ret; 1405 } 1406 1407 static int bq27xxx_battery_write_dm_block(struct bq27xxx_device_info *di, 1408 struct bq27xxx_dm_buf *buf) 1409 { 1410 bool cfgup = di->opts & BQ27XXX_O_CFGUP; 1411 int ret; 1412 1413 if (!buf->dirty) 1414 return 0; 1415 1416 if (cfgup) { 1417 ret = bq27xxx_battery_set_cfgupdate(di); 1418 if (ret < 0) 1419 return ret; 1420 } 1421 1422 ret = bq27xxx_write(di, BQ27XXX_DM_CTRL, 0, true); 1423 if (ret < 0) 1424 goto out; 1425 1426 ret = bq27xxx_write(di, BQ27XXX_DM_CLASS, buf->class, true); 1427 if (ret < 0) 1428 goto out; 1429 1430 ret = bq27xxx_write(di, BQ27XXX_DM_BLOCK, buf->block, true); 1431 if (ret < 0) 1432 goto out; 1433 1434 BQ27XXX_MSLEEP(1); 1435 1436 ret = bq27xxx_write_block(di, BQ27XXX_DM_DATA, buf->data, BQ27XXX_DM_SZ); 1437 if (ret < 0) 1438 goto out; 1439 1440 ret = bq27xxx_write(di, BQ27XXX_DM_CKSUM, 1441 bq27xxx_battery_checksum_dm_block(buf), true); 1442 if (ret < 0) 1443 goto out; 1444 1445 /* DO NOT read BQ27XXX_DM_CKSUM here to verify it! That may cause NVM 1446 * corruption on the '425 chip (and perhaps others), which can damage 1447 * the chip. 1448 */ 1449 1450 if (cfgup) { 1451 BQ27XXX_MSLEEP(1); 1452 ret = bq27xxx_battery_soft_reset(di); 1453 if (ret < 0) 1454 return ret; 1455 } else { 1456 BQ27XXX_MSLEEP(100); /* flash DM updates in <100ms */ 1457 } 1458 1459 buf->dirty = false; 1460 1461 return 0; 1462 1463 out: 1464 if (cfgup) 1465 bq27xxx_battery_soft_reset(di); 1466 1467 dev_err(di->dev, "bus error writing chip memory: %d\n", ret); 1468 return ret; 1469 } 1470 1471 static void bq27xxx_battery_set_config(struct bq27xxx_device_info *di, 1472 struct power_supply_battery_info *info) 1473 { 1474 struct bq27xxx_dm_buf bd = BQ27XXX_DM_BUF(di, BQ27XXX_DM_DESIGN_CAPACITY); 1475 struct bq27xxx_dm_buf bt = BQ27XXX_DM_BUF(di, BQ27XXX_DM_TERMINATE_VOLTAGE); 1476 bool updated; 1477 1478 if (bq27xxx_battery_unseal(di) < 0) 1479 return; 1480 1481 if (info->charge_full_design_uah != -EINVAL && 1482 info->energy_full_design_uwh != -EINVAL) { 1483 bq27xxx_battery_read_dm_block(di, &bd); 1484 /* assume design energy & capacity are in same block */ 1485 bq27xxx_battery_update_dm_block(di, &bd, 1486 BQ27XXX_DM_DESIGN_CAPACITY, 1487 info->charge_full_design_uah / 1000); 1488 bq27xxx_battery_update_dm_block(di, &bd, 1489 BQ27XXX_DM_DESIGN_ENERGY, 1490 info->energy_full_design_uwh / 1000); 1491 } 1492 1493 if (info->voltage_min_design_uv != -EINVAL) { 1494 bool same = bd.class == bt.class && bd.block == bt.block; 1495 if (!same) 1496 bq27xxx_battery_read_dm_block(di, &bt); 1497 bq27xxx_battery_update_dm_block(di, same ? &bd : &bt, 1498 BQ27XXX_DM_TERMINATE_VOLTAGE, 1499 info->voltage_min_design_uv / 1000); 1500 } 1501 1502 updated = bd.dirty || bt.dirty; 1503 1504 bq27xxx_battery_write_dm_block(di, &bd); 1505 bq27xxx_battery_write_dm_block(di, &bt); 1506 1507 bq27xxx_battery_seal(di); 1508 1509 if (updated && !(di->opts & BQ27XXX_O_CFGUP)) { 1510 bq27xxx_write(di, BQ27XXX_REG_CTRL, BQ27XXX_RESET, false); 1511 BQ27XXX_MSLEEP(300); /* reset time is not documented */ 1512 } 1513 /* assume bq27xxx_battery_update() is called hereafter */ 1514 } 1515 1516 static void bq27xxx_battery_settings(struct bq27xxx_device_info *di) 1517 { 1518 struct power_supply_battery_info *info; 1519 unsigned int min, max; 1520 1521 if (power_supply_get_battery_info(di->bat, &info) < 0) 1522 return; 1523 1524 if (!di->dm_regs) { 1525 dev_warn(di->dev, "data memory update not supported for chip\n"); 1526 return; 1527 } 1528 1529 if (info->energy_full_design_uwh != info->charge_full_design_uah) { 1530 if (info->energy_full_design_uwh == -EINVAL) 1531 dev_warn(di->dev, "missing battery:energy-full-design-microwatt-hours\n"); 1532 else if (info->charge_full_design_uah == -EINVAL) 1533 dev_warn(di->dev, "missing battery:charge-full-design-microamp-hours\n"); 1534 } 1535 1536 /* assume min == 0 */ 1537 max = di->dm_regs[BQ27XXX_DM_DESIGN_ENERGY].max; 1538 if (info->energy_full_design_uwh > max * 1000) { 1539 dev_err(di->dev, "invalid battery:energy-full-design-microwatt-hours %d\n", 1540 info->energy_full_design_uwh); 1541 info->energy_full_design_uwh = -EINVAL; 1542 } 1543 1544 /* assume min == 0 */ 1545 max = di->dm_regs[BQ27XXX_DM_DESIGN_CAPACITY].max; 1546 if (info->charge_full_design_uah > max * 1000) { 1547 dev_err(di->dev, "invalid battery:charge-full-design-microamp-hours %d\n", 1548 info->charge_full_design_uah); 1549 info->charge_full_design_uah = -EINVAL; 1550 } 1551 1552 min = di->dm_regs[BQ27XXX_DM_TERMINATE_VOLTAGE].min; 1553 max = di->dm_regs[BQ27XXX_DM_TERMINATE_VOLTAGE].max; 1554 if ((info->voltage_min_design_uv < min * 1000 || 1555 info->voltage_min_design_uv > max * 1000) && 1556 info->voltage_min_design_uv != -EINVAL) { 1557 dev_err(di->dev, "invalid battery:voltage-min-design-microvolt %d\n", 1558 info->voltage_min_design_uv); 1559 info->voltage_min_design_uv = -EINVAL; 1560 } 1561 1562 if ((info->energy_full_design_uwh != -EINVAL && 1563 info->charge_full_design_uah != -EINVAL) || 1564 info->voltage_min_design_uv != -EINVAL) 1565 bq27xxx_battery_set_config(di, info); 1566 } 1567 1568 /* 1569 * Return the battery State-of-Charge 1570 * Or < 0 if something fails. 1571 */ 1572 static int bq27xxx_battery_read_soc(struct bq27xxx_device_info *di) 1573 { 1574 int soc; 1575 1576 if (di->opts & BQ27XXX_O_SOC_SI) 1577 soc = bq27xxx_read(di, BQ27XXX_REG_SOC, true); 1578 else 1579 soc = bq27xxx_read(di, BQ27XXX_REG_SOC, false); 1580 1581 if (soc < 0) 1582 dev_dbg(di->dev, "error reading State-of-Charge\n"); 1583 1584 return soc; 1585 } 1586 1587 /* 1588 * Return a battery charge value in µAh 1589 * Or < 0 if something fails. 1590 */ 1591 static int bq27xxx_battery_read_charge(struct bq27xxx_device_info *di, u8 reg, 1592 union power_supply_propval *val) 1593 { 1594 int charge; 1595 1596 charge = bq27xxx_read(di, reg, false); 1597 if (charge < 0) { 1598 dev_dbg(di->dev, "error reading charge register %02x: %d\n", 1599 reg, charge); 1600 return charge; 1601 } 1602 1603 if (di->opts & BQ27XXX_O_ZERO) 1604 charge *= BQ27XXX_CURRENT_CONSTANT / BQ27XXX_RS; 1605 else 1606 charge *= 1000; 1607 1608 val->intval = charge; 1609 1610 return 0; 1611 } 1612 1613 /* 1614 * Return the battery Nominal available capacity in µAh 1615 * Or < 0 if something fails. 1616 */ 1617 static inline int bq27xxx_battery_read_nac(struct bq27xxx_device_info *di, 1618 union power_supply_propval *val) 1619 { 1620 return bq27xxx_battery_read_charge(di, BQ27XXX_REG_NAC, val); 1621 } 1622 1623 /* 1624 * Return the battery Remaining Capacity in µAh 1625 * Or < 0 if something fails. 1626 */ 1627 static inline int bq27xxx_battery_read_rc(struct bq27xxx_device_info *di, 1628 union power_supply_propval *val) 1629 { 1630 return bq27xxx_battery_read_charge(di, BQ27XXX_REG_RC, val); 1631 } 1632 1633 /* 1634 * Return the battery Full Charge Capacity in µAh 1635 * Or < 0 if something fails. 1636 */ 1637 static inline int bq27xxx_battery_read_fcc(struct bq27xxx_device_info *di, 1638 union power_supply_propval *val) 1639 { 1640 return bq27xxx_battery_read_charge(di, BQ27XXX_REG_FCC, val); 1641 } 1642 1643 /* 1644 * Return the Design Capacity in µAh 1645 * Or < 0 if something fails. 1646 */ 1647 static int bq27xxx_battery_read_dcap(struct bq27xxx_device_info *di, 1648 union power_supply_propval *val) 1649 { 1650 int dcap; 1651 1652 /* We only have to read charge design full once */ 1653 if (di->charge_design_full > 0) { 1654 val->intval = di->charge_design_full; 1655 return 0; 1656 } 1657 1658 if (di->opts & BQ27XXX_O_ZERO) 1659 dcap = bq27xxx_read(di, BQ27XXX_REG_DCAP, true); 1660 else 1661 dcap = bq27xxx_read(di, BQ27XXX_REG_DCAP, false); 1662 1663 if (dcap < 0) { 1664 dev_dbg(di->dev, "error reading design capacity\n"); 1665 return dcap; 1666 } 1667 1668 if (di->opts & BQ27XXX_O_ZERO) 1669 dcap = (dcap << 8) * BQ27XXX_CURRENT_CONSTANT / BQ27XXX_RS; 1670 else 1671 dcap *= 1000; 1672 1673 /* Save for later reads */ 1674 di->charge_design_full = dcap; 1675 1676 val->intval = dcap; 1677 1678 return 0; 1679 } 1680 1681 /* 1682 * Return the battery Available energy in µWh 1683 * Or < 0 if something fails. 1684 */ 1685 static int bq27xxx_battery_read_energy(struct bq27xxx_device_info *di, 1686 union power_supply_propval *val) 1687 { 1688 int ae; 1689 1690 ae = bq27xxx_read(di, BQ27XXX_REG_AE, false); 1691 if (ae < 0) { 1692 dev_dbg(di->dev, "error reading available energy\n"); 1693 return ae; 1694 } 1695 1696 if (di->opts & BQ27XXX_O_ZERO) 1697 ae *= BQ27XXX_POWER_CONSTANT / BQ27XXX_RS; 1698 else 1699 ae *= 1000; 1700 1701 val->intval = ae; 1702 1703 return 0; 1704 } 1705 1706 /* 1707 * Return the battery temperature in tenths of degree Celsius 1708 * Or < 0 if something fails. 1709 */ 1710 static int bq27xxx_battery_read_temperature(struct bq27xxx_device_info *di, 1711 union power_supply_propval *val) 1712 { 1713 int temp; 1714 1715 temp = bq27xxx_read(di, BQ27XXX_REG_TEMP, false); 1716 if (temp < 0) { 1717 dev_err(di->dev, "error reading temperature\n"); 1718 return temp; 1719 } 1720 1721 if (di->opts & BQ27XXX_O_ZERO) 1722 temp = 5 * temp / 2; 1723 1724 /* Convert decidegree Kelvin to Celsius */ 1725 temp -= 2731; 1726 1727 val->intval = temp; 1728 1729 return 0; 1730 } 1731 1732 /* 1733 * Return the battery Cycle count total 1734 * Or < 0 if something fails. 1735 */ 1736 static int bq27xxx_battery_read_cyct(struct bq27xxx_device_info *di, 1737 union power_supply_propval *val) 1738 { 1739 int cyct; 1740 1741 cyct = bq27xxx_read(di, BQ27XXX_REG_CYCT, false); 1742 if (cyct < 0) 1743 dev_err(di->dev, "error reading cycle count total\n"); 1744 1745 val->intval = cyct; 1746 1747 return 0; 1748 } 1749 1750 /* 1751 * Read a time register. 1752 * Return < 0 if something fails. 1753 */ 1754 static int bq27xxx_battery_read_time(struct bq27xxx_device_info *di, u8 reg, 1755 union power_supply_propval *val) 1756 { 1757 int tval; 1758 1759 tval = bq27xxx_read(di, reg, false); 1760 if (tval < 0) { 1761 dev_dbg(di->dev, "error reading time register %02x: %d\n", 1762 reg, tval); 1763 return tval; 1764 } 1765 1766 if (tval == 65535) 1767 return -ENODATA; 1768 1769 val->intval = tval * 60; 1770 1771 return 0; 1772 } 1773 1774 /* 1775 * Returns true if a battery over temperature condition is detected 1776 */ 1777 static bool bq27xxx_battery_overtemp(struct bq27xxx_device_info *di, u16 flags) 1778 { 1779 if (di->opts & BQ27XXX_O_OTDC) 1780 return flags & (BQ27XXX_FLAG_OTC | BQ27XXX_FLAG_OTD); 1781 if (di->opts & BQ27XXX_O_UTOT) 1782 return flags & BQ27XXX_FLAG_OT; 1783 1784 return false; 1785 } 1786 1787 /* 1788 * Returns true if a battery under temperature condition is detected 1789 */ 1790 static bool bq27xxx_battery_undertemp(struct bq27xxx_device_info *di, u16 flags) 1791 { 1792 if (di->opts & BQ27XXX_O_UTOT) 1793 return flags & BQ27XXX_FLAG_UT; 1794 1795 return false; 1796 } 1797 1798 /* 1799 * Returns true if a low state of charge condition is detected 1800 */ 1801 static bool bq27xxx_battery_dead(struct bq27xxx_device_info *di, u16 flags) 1802 { 1803 if (di->opts & BQ27XXX_O_ZERO) 1804 return flags & (BQ27000_FLAG_EDV1 | BQ27000_FLAG_EDVF); 1805 else if (di->opts & BQ27Z561_O_BITS) 1806 return flags & BQ27Z561_FLAG_FDC; 1807 else 1808 return flags & (BQ27XXX_FLAG_SOC1 | BQ27XXX_FLAG_SOCF); 1809 } 1810 1811 /* 1812 * Returns true if reported battery capacity is inaccurate 1813 */ 1814 static bool bq27xxx_battery_capacity_inaccurate(struct bq27xxx_device_info *di, 1815 u16 flags) 1816 { 1817 if (di->opts & BQ27XXX_O_HAS_CI) 1818 return (flags & BQ27000_FLAG_CI); 1819 else 1820 return false; 1821 } 1822 1823 static int bq27xxx_battery_read_health(struct bq27xxx_device_info *di, 1824 union power_supply_propval *val) 1825 { 1826 int health; 1827 1828 /* Unlikely but important to return first */ 1829 if (unlikely(bq27xxx_battery_overtemp(di, di->cache.flags))) 1830 health = POWER_SUPPLY_HEALTH_OVERHEAT; 1831 else if (unlikely(bq27xxx_battery_undertemp(di, di->cache.flags))) 1832 health = POWER_SUPPLY_HEALTH_COLD; 1833 else if (unlikely(bq27xxx_battery_dead(di, di->cache.flags))) 1834 health = POWER_SUPPLY_HEALTH_DEAD; 1835 else if (unlikely(bq27xxx_battery_capacity_inaccurate(di, di->cache.flags))) 1836 health = POWER_SUPPLY_HEALTH_CALIBRATION_REQUIRED; 1837 else 1838 health = POWER_SUPPLY_HEALTH_GOOD; 1839 1840 val->intval = health; 1841 1842 return 0; 1843 } 1844 1845 static bool bq27xxx_battery_is_full(struct bq27xxx_device_info *di, int flags) 1846 { 1847 if (di->opts & BQ27XXX_O_ZERO) 1848 return (flags & BQ27000_FLAG_FC); 1849 else if (di->opts & BQ27Z561_O_BITS) 1850 return (flags & BQ27Z561_FLAG_FC); 1851 else 1852 return (flags & BQ27XXX_FLAG_FC); 1853 } 1854 1855 /* 1856 * Return the battery average current in µA and the status 1857 * Note that current can be negative signed as well 1858 * Or 0 if something fails. 1859 */ 1860 static int bq27xxx_battery_current_and_status( 1861 struct bq27xxx_device_info *di, 1862 union power_supply_propval *val_curr, 1863 union power_supply_propval *val_status, 1864 struct bq27xxx_reg_cache *cache) 1865 { 1866 bool single_flags = (di->opts & BQ27XXX_O_ZERO); 1867 int curr; 1868 int flags; 1869 1870 curr = bq27xxx_read(di, BQ27XXX_REG_AI, false); 1871 if (curr < 0) { 1872 dev_err(di->dev, "error reading current\n"); 1873 return curr; 1874 } 1875 1876 if (cache) { 1877 flags = cache->flags; 1878 } else { 1879 flags = bq27xxx_read(di, BQ27XXX_REG_FLAGS, single_flags); 1880 if (flags < 0) { 1881 dev_err(di->dev, "error reading flags\n"); 1882 return flags; 1883 } 1884 } 1885 1886 if (di->opts & BQ27XXX_O_ZERO) { 1887 if (!(flags & BQ27000_FLAG_CHGS)) { 1888 dev_dbg(di->dev, "negative current!\n"); 1889 curr = -curr; 1890 } 1891 1892 curr = curr * BQ27XXX_CURRENT_CONSTANT / BQ27XXX_RS; 1893 } else { 1894 /* Other gauges return signed value */ 1895 curr = (int)((s16)curr) * 1000; 1896 } 1897 1898 if (val_curr) 1899 val_curr->intval = curr; 1900 1901 if (val_status) { 1902 if (bq27xxx_battery_is_full(di, flags)) 1903 val_status->intval = POWER_SUPPLY_STATUS_FULL; 1904 else if (curr > 0) 1905 val_status->intval = POWER_SUPPLY_STATUS_CHARGING; 1906 else if (curr < 0) 1907 val_status->intval = POWER_SUPPLY_STATUS_DISCHARGING; 1908 else 1909 val_status->intval = POWER_SUPPLY_STATUS_NOT_CHARGING; 1910 } 1911 1912 return 0; 1913 } 1914 1915 static void bq27xxx_battery_update_unlocked(struct bq27xxx_device_info *di) 1916 { 1917 union power_supply_propval status = di->last_status; 1918 struct bq27xxx_reg_cache cache = {0, }; 1919 bool has_singe_flag = di->opts & BQ27XXX_O_ZERO; 1920 1921 cache.flags = bq27xxx_read(di, BQ27XXX_REG_FLAGS, has_singe_flag); 1922 if (di->chip == BQ27000 && (cache.flags & 0xff) == 0xff) 1923 cache.flags = -ENODEV; /* bq27000 hdq read error */ 1924 if (cache.flags >= 0) { 1925 cache.capacity = bq27xxx_battery_read_soc(di); 1926 1927 /* 1928 * On gauges with signed current reporting the current must be 1929 * checked to detect charging <-> discharging status changes. 1930 */ 1931 if (!(di->opts & BQ27XXX_O_ZERO)) 1932 bq27xxx_battery_current_and_status(di, NULL, &status, &cache); 1933 } 1934 1935 if ((di->cache.capacity != cache.capacity) || 1936 (di->cache.flags != cache.flags) || 1937 (di->last_status.intval != status.intval)) { 1938 di->last_status.intval = status.intval; 1939 power_supply_changed(di->bat); 1940 } 1941 1942 if (memcmp(&di->cache, &cache, sizeof(cache)) != 0) 1943 di->cache = cache; 1944 1945 di->last_update = jiffies; 1946 1947 if (!di->removed && poll_interval > 0) 1948 mod_delayed_work(system_percpu_wq, &di->work, poll_interval * HZ); 1949 } 1950 1951 void bq27xxx_battery_update(struct bq27xxx_device_info *di) 1952 { 1953 mutex_lock(&di->lock); 1954 bq27xxx_battery_update_unlocked(di); 1955 mutex_unlock(&di->lock); 1956 } 1957 EXPORT_SYMBOL_GPL(bq27xxx_battery_update); 1958 1959 static void bq27xxx_battery_poll(struct work_struct *work) 1960 { 1961 struct bq27xxx_device_info *di = 1962 container_of(work, struct bq27xxx_device_info, 1963 work.work); 1964 1965 bq27xxx_battery_update(di); 1966 } 1967 1968 /* 1969 * Get the average power in µW 1970 * Return < 0 if something fails. 1971 */ 1972 static int bq27xxx_battery_pwr_avg(struct bq27xxx_device_info *di, 1973 union power_supply_propval *val) 1974 { 1975 int power; 1976 1977 power = bq27xxx_read(di, BQ27XXX_REG_AP, false); 1978 if (power < 0) { 1979 dev_err(di->dev, 1980 "error reading average power register %02x: %d\n", 1981 BQ27XXX_REG_AP, power); 1982 return power; 1983 } 1984 1985 if (di->opts & BQ27XXX_O_ZERO) 1986 val->intval = (power * BQ27XXX_POWER_CONSTANT) / BQ27XXX_RS; 1987 else 1988 /* Other gauges return a signed value in units of 10mW */ 1989 val->intval = (int)((s16)power) * 10000; 1990 1991 return 0; 1992 } 1993 1994 static int bq27xxx_battery_capacity_level(struct bq27xxx_device_info *di, 1995 union power_supply_propval *val) 1996 { 1997 int level; 1998 1999 if (di->opts & BQ27XXX_O_ZERO) { 2000 if (di->cache.flags & BQ27000_FLAG_FC) 2001 level = POWER_SUPPLY_CAPACITY_LEVEL_FULL; 2002 else if (di->cache.flags & BQ27000_FLAG_EDVF) 2003 level = POWER_SUPPLY_CAPACITY_LEVEL_CRITICAL; 2004 else if (di->cache.flags & BQ27000_FLAG_EDV1) 2005 level = POWER_SUPPLY_CAPACITY_LEVEL_LOW; 2006 else 2007 level = POWER_SUPPLY_CAPACITY_LEVEL_NORMAL; 2008 } else if (di->opts & BQ27Z561_O_BITS) { 2009 if (di->cache.flags & BQ27Z561_FLAG_FC) 2010 level = POWER_SUPPLY_CAPACITY_LEVEL_FULL; 2011 else if (di->cache.flags & BQ27Z561_FLAG_FDC) 2012 level = POWER_SUPPLY_CAPACITY_LEVEL_CRITICAL; 2013 else 2014 level = POWER_SUPPLY_CAPACITY_LEVEL_NORMAL; 2015 } else { 2016 if (di->cache.flags & BQ27XXX_FLAG_FC) 2017 level = POWER_SUPPLY_CAPACITY_LEVEL_FULL; 2018 else if (di->cache.flags & BQ27XXX_FLAG_SOCF) 2019 level = POWER_SUPPLY_CAPACITY_LEVEL_CRITICAL; 2020 else if (di->cache.flags & BQ27XXX_FLAG_SOC1) 2021 level = POWER_SUPPLY_CAPACITY_LEVEL_LOW; 2022 else 2023 level = POWER_SUPPLY_CAPACITY_LEVEL_NORMAL; 2024 } 2025 2026 val->intval = level; 2027 2028 return 0; 2029 } 2030 2031 /* 2032 * Return the battery Voltage in millivolts 2033 * Or < 0 if something fails. 2034 */ 2035 static int bq27xxx_battery_voltage(struct bq27xxx_device_info *di, 2036 union power_supply_propval *val) 2037 { 2038 int volt; 2039 2040 volt = bq27xxx_read(di, BQ27XXX_REG_VOLT, false); 2041 if (volt < 0) { 2042 dev_err(di->dev, "error reading voltage\n"); 2043 return volt; 2044 } 2045 2046 val->intval = volt * 1000; 2047 2048 return 0; 2049 } 2050 2051 /* 2052 * Return the design maximum battery Voltage in microvolts, or < 0 if something 2053 * fails. The programmed value of the maximum battery voltage is determined by 2054 * QV0 and QV1 (bits 5 and 6) in the Pack Configuration register. 2055 */ 2056 static int bq27xxx_battery_read_dmax_volt(struct bq27xxx_device_info *di, 2057 union power_supply_propval *val) 2058 { 2059 int reg_val, qv; 2060 2061 if (di->voltage_max_design > 0) { 2062 val->intval = di->voltage_max_design; 2063 return 0; 2064 } 2065 2066 reg_val = bq27xxx_read(di, BQ27XXX_REG_PKCFG, true); 2067 if (reg_val < 0) { 2068 dev_err(di->dev, "error reading design max voltage\n"); 2069 return reg_val; 2070 } 2071 2072 qv = (reg_val >> 5) & 0x3; 2073 val->intval = 3968000 + 48000 * qv; 2074 2075 di->voltage_max_design = val->intval; 2076 2077 return 0; 2078 } 2079 2080 /* 2081 * Return the design minimum battery Voltage in microvolts 2082 * Or < 0 if something fails. 2083 */ 2084 static int bq27xxx_battery_read_dmin_volt(struct bq27xxx_device_info *di, 2085 union power_supply_propval *val) 2086 { 2087 int volt; 2088 2089 /* We only have to read design minimum voltage once */ 2090 if (di->voltage_min_design > 0) { 2091 val->intval = di->voltage_min_design; 2092 return 0; 2093 } 2094 2095 volt = bq27xxx_read(di, BQ27XXX_REG_SEDVF, true); 2096 if (volt < 0) { 2097 dev_err(di->dev, "error reading design min voltage\n"); 2098 return volt; 2099 } 2100 2101 /* SEDVF = Design EDVF / 8 - 256 */ 2102 val->intval = volt * 8000 + 2048000; 2103 2104 /* Save for later reads */ 2105 di->voltage_min_design = val->intval; 2106 2107 return 0; 2108 } 2109 2110 static int bq27xxx_simple_value(int value, 2111 union power_supply_propval *val) 2112 { 2113 if (value < 0) 2114 return value; 2115 2116 val->intval = value; 2117 2118 return 0; 2119 } 2120 2121 static int bq27xxx_battery_get_property(struct power_supply *psy, 2122 enum power_supply_property psp, 2123 union power_supply_propval *val) 2124 { 2125 int ret = 0; 2126 struct bq27xxx_device_info *di = power_supply_get_drvdata(psy); 2127 2128 mutex_lock(&di->lock); 2129 if (time_is_before_jiffies(di->last_update + 5 * HZ)) 2130 bq27xxx_battery_update_unlocked(di); 2131 mutex_unlock(&di->lock); 2132 2133 if (psp != POWER_SUPPLY_PROP_PRESENT && di->cache.flags < 0) 2134 return di->cache.flags; 2135 2136 switch (psp) { 2137 case POWER_SUPPLY_PROP_STATUS: 2138 ret = bq27xxx_battery_current_and_status(di, NULL, val, NULL); 2139 break; 2140 case POWER_SUPPLY_PROP_VOLTAGE_NOW: 2141 ret = bq27xxx_battery_voltage(di, val); 2142 break; 2143 case POWER_SUPPLY_PROP_PRESENT: 2144 val->intval = di->cache.flags < 0 ? 0 : 1; 2145 break; 2146 case POWER_SUPPLY_PROP_CURRENT_NOW: 2147 ret = bq27xxx_battery_current_and_status(di, val, NULL, NULL); 2148 break; 2149 case POWER_SUPPLY_PROP_CAPACITY: 2150 ret = bq27xxx_simple_value(di->cache.capacity, val); 2151 break; 2152 case POWER_SUPPLY_PROP_CAPACITY_LEVEL: 2153 ret = bq27xxx_battery_capacity_level(di, val); 2154 break; 2155 case POWER_SUPPLY_PROP_TEMP: 2156 ret = bq27xxx_battery_read_temperature(di, val); 2157 break; 2158 case POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW: 2159 ret = bq27xxx_battery_read_time(di, BQ27XXX_REG_TTE, val); 2160 break; 2161 case POWER_SUPPLY_PROP_TIME_TO_EMPTY_AVG: 2162 ret = bq27xxx_battery_read_time(di, BQ27XXX_REG_TTECP, val); 2163 break; 2164 case POWER_SUPPLY_PROP_TIME_TO_FULL_NOW: 2165 ret = bq27xxx_battery_read_time(di, BQ27XXX_REG_TTF, val); 2166 break; 2167 case POWER_SUPPLY_PROP_TECHNOLOGY: 2168 if (di->opts & BQ27XXX_O_MUL_CHEM) 2169 val->intval = POWER_SUPPLY_TECHNOLOGY_UNKNOWN; 2170 else 2171 val->intval = POWER_SUPPLY_TECHNOLOGY_LION; 2172 break; 2173 case POWER_SUPPLY_PROP_CHARGE_NOW: 2174 if (di->regs[BQ27XXX_REG_NAC] != INVALID_REG_ADDR) 2175 ret = bq27xxx_battery_read_nac(di, val); 2176 else 2177 ret = bq27xxx_battery_read_rc(di, val); 2178 break; 2179 case POWER_SUPPLY_PROP_CHARGE_FULL: 2180 ret = bq27xxx_battery_read_fcc(di, val); 2181 break; 2182 case POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN: 2183 ret = bq27xxx_battery_read_dcap(di, val); 2184 break; 2185 /* 2186 * TODO: Implement these to make registers set from 2187 * power_supply_battery_info visible in sysfs. 2188 */ 2189 case POWER_SUPPLY_PROP_ENERGY_FULL_DESIGN: 2190 return -EINVAL; 2191 case POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN: 2192 ret = bq27xxx_battery_read_dmin_volt(di, val); 2193 break; 2194 case POWER_SUPPLY_PROP_VOLTAGE_MAX_DESIGN: 2195 ret = bq27xxx_battery_read_dmax_volt(di, val); 2196 break; 2197 case POWER_SUPPLY_PROP_CYCLE_COUNT: 2198 ret = bq27xxx_battery_read_cyct(di, val); 2199 break; 2200 case POWER_SUPPLY_PROP_ENERGY_NOW: 2201 ret = bq27xxx_battery_read_energy(di, val); 2202 break; 2203 case POWER_SUPPLY_PROP_POWER_AVG: 2204 ret = bq27xxx_battery_pwr_avg(di, val); 2205 break; 2206 case POWER_SUPPLY_PROP_HEALTH: 2207 ret = bq27xxx_battery_read_health(di, val); 2208 break; 2209 case POWER_SUPPLY_PROP_MANUFACTURER: 2210 val->strval = BQ27XXX_MANUFACTURER; 2211 break; 2212 default: 2213 return -EINVAL; 2214 } 2215 2216 return ret; 2217 } 2218 2219 static void bq27xxx_external_power_changed(struct power_supply *psy) 2220 { 2221 struct bq27xxx_device_info *di = power_supply_get_drvdata(psy); 2222 2223 /* After charger plug in/out wait 0.5s for things to stabilize */ 2224 mod_delayed_work(system_percpu_wq, &di->work, HZ / 2); 2225 } 2226 2227 int bq27xxx_battery_setup(struct bq27xxx_device_info *di) 2228 { 2229 struct power_supply_desc *psy_desc; 2230 struct power_supply_config psy_cfg = { 2231 .fwnode = dev_fwnode(di->dev), 2232 .drv_data = di, 2233 .no_wakeup_source = true, 2234 }; 2235 int ret; 2236 2237 INIT_DELAYED_WORK(&di->work, bq27xxx_battery_poll); 2238 ret = devm_mutex_init(di->dev, &di->lock); 2239 if (ret) 2240 return ret; 2241 2242 di->regs = bq27xxx_chip_data[di->chip].regs; 2243 di->unseal_key = bq27xxx_chip_data[di->chip].unseal_key; 2244 di->dm_regs = bq27xxx_chip_data[di->chip].dm_regs; 2245 di->opts = bq27xxx_chip_data[di->chip].opts; 2246 2247 psy_desc = devm_kzalloc(di->dev, sizeof(*psy_desc), GFP_KERNEL); 2248 if (!psy_desc) 2249 return -ENOMEM; 2250 2251 psy_desc->name = di->name; 2252 psy_desc->type = POWER_SUPPLY_TYPE_BATTERY; 2253 psy_desc->properties = bq27xxx_chip_data[di->chip].props; 2254 psy_desc->num_properties = bq27xxx_chip_data[di->chip].props_size; 2255 psy_desc->get_property = bq27xxx_battery_get_property; 2256 psy_desc->external_power_changed = bq27xxx_external_power_changed; 2257 2258 di->bat = devm_power_supply_register(di->dev, psy_desc, &psy_cfg); 2259 if (IS_ERR(di->bat)) 2260 return dev_err_probe(di->dev, PTR_ERR(di->bat), 2261 "failed to register battery\n"); 2262 2263 bq27xxx_battery_settings(di); 2264 bq27xxx_battery_update(di); 2265 2266 mutex_lock(&bq27xxx_list_lock); 2267 list_add(&di->list, &bq27xxx_battery_devices); 2268 mutex_unlock(&bq27xxx_list_lock); 2269 2270 return 0; 2271 } 2272 EXPORT_SYMBOL_GPL(bq27xxx_battery_setup); 2273 2274 void bq27xxx_battery_teardown(struct bq27xxx_device_info *di) 2275 { 2276 mutex_lock(&bq27xxx_list_lock); 2277 list_del(&di->list); 2278 mutex_unlock(&bq27xxx_list_lock); 2279 2280 /* Set removed to avoid bq27xxx_battery_update() re-queuing the work */ 2281 mutex_lock(&di->lock); 2282 di->removed = true; 2283 mutex_unlock(&di->lock); 2284 2285 cancel_delayed_work_sync(&di->work); 2286 } 2287 EXPORT_SYMBOL_GPL(bq27xxx_battery_teardown); 2288 2289 #ifdef CONFIG_PM_SLEEP 2290 static int bq27xxx_battery_suspend(struct device *dev) 2291 { 2292 struct bq27xxx_device_info *di = dev_get_drvdata(dev); 2293 2294 cancel_delayed_work(&di->work); 2295 return 0; 2296 } 2297 2298 static int bq27xxx_battery_resume(struct device *dev) 2299 { 2300 struct bq27xxx_device_info *di = dev_get_drvdata(dev); 2301 2302 schedule_delayed_work(&di->work, 0); 2303 return 0; 2304 } 2305 #endif /* CONFIG_PM_SLEEP */ 2306 2307 SIMPLE_DEV_PM_OPS(bq27xxx_battery_battery_pm_ops, 2308 bq27xxx_battery_suspend, bq27xxx_battery_resume); 2309 EXPORT_SYMBOL_GPL(bq27xxx_battery_battery_pm_ops); 2310 2311 MODULE_AUTHOR("Rodolfo Giometti <giometti@linux.it>"); 2312 MODULE_DESCRIPTION("BQ27xxx battery monitor driver"); 2313 MODULE_LICENSE("GPL"); 2314