xref: /linux/arch/powerpc/kernel/setup-common.c (revision ad952db4a865e96ec98d4c5874a4699fe3286d56)
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  * Common boot and setup code for both 32-bit and 64-bit.
4  * Extracted from arch/powerpc/kernel/setup_64.c.
5  *
6  * Copyright (C) 2001 PPC64 Team, IBM Corp
7  */
8 
9 #undef DEBUG
10 
11 #include <linux/export.h>
12 #include <linux/panic_notifier.h>
13 #include <linux/string.h>
14 #include <linux/sched.h>
15 #include <linux/init.h>
16 #include <linux/kernel.h>
17 #include <linux/reboot.h>
18 #include <linux/delay.h>
19 #include <linux/initrd.h>
20 #include <linux/platform_device.h>
21 #include <linux/printk.h>
22 #include <linux/seq_file.h>
23 #include <linux/ioport.h>
24 #include <linux/console.h>
25 #include <linux/root_dev.h>
26 #include <linux/cpu.h>
27 #include <linux/unistd.h>
28 #include <linux/seq_buf.h>
29 #include <linux/serial.h>
30 #include <linux/serial_8250.h>
31 #include <linux/percpu.h>
32 #include <linux/memblock.h>
33 #include <linux/of.h>
34 #include <linux/of_fdt.h>
35 #include <linux/of_irq.h>
36 #include <linux/hugetlb.h>
37 #include <linux/pgtable.h>
38 #include <asm/kexec.h>
39 #include <asm/io.h>
40 #include <asm/paca.h>
41 #include <asm/processor.h>
42 #include <asm/vdso_datapage.h>
43 #include <asm/smp.h>
44 #include <asm/elf.h>
45 #include <asm/machdep.h>
46 #include <asm/time.h>
47 #include <asm/cputable.h>
48 #include <asm/sections.h>
49 #include <asm/firmware.h>
50 #include <asm/btext.h>
51 #include <asm/nvram.h>
52 #include <asm/setup.h>
53 #include <asm/rtas.h>
54 #include <asm/iommu.h>
55 #include <asm/serial.h>
56 #include <asm/cache.h>
57 #include <asm/page.h>
58 #include <asm/mmu.h>
59 #include <asm/xmon.h>
60 #include <asm/cputhreads.h>
61 #include <mm/mmu_decl.h>
62 #include <asm/archrandom.h>
63 #include <asm/fadump.h>
64 #include <asm/udbg.h>
65 #include <asm/hugetlb.h>
66 #include <asm/livepatch.h>
67 #include <asm/mmu_context.h>
68 #include <asm/cpu_has_feature.h>
69 #include <asm/kasan.h>
70 #include <asm/mce.h>
71 #include <asm/systemcfg.h>
72 
73 #include "setup.h"
74 
75 #ifdef DEBUG
76 #define DBG(fmt...) udbg_printf(fmt)
77 #else
78 #define DBG(fmt...)
79 #endif
80 
81 /* The main machine-dep calls structure
82  */
83 struct machdep_calls ppc_md;
84 EXPORT_SYMBOL(ppc_md);
85 struct machdep_calls *machine_id;
86 EXPORT_SYMBOL(machine_id);
87 
88 int boot_cpuid = -1;
89 EXPORT_SYMBOL_GPL(boot_cpuid);
90 int __initdata boot_core_hwid = -1;
91 
92 #ifdef CONFIG_PPC64
93 int boot_cpu_hwid = -1;
94 #endif
95 
96 /*
97  * These are used in binfmt_elf.c to put aux entries on the stack
98  * for each elf executable being started.
99  */
100 int dcache_bsize;
101 int icache_bsize;
102 
103 /* Variables required to store legacy IO irq routing */
104 int of_i8042_kbd_irq;
105 EXPORT_SYMBOL_GPL(of_i8042_kbd_irq);
106 int of_i8042_aux_irq;
107 EXPORT_SYMBOL_GPL(of_i8042_aux_irq);
108 
109 #ifdef __DO_IRQ_CANON
110 /* XXX should go elsewhere eventually */
111 int ppc_do_canonicalize_irqs;
112 EXPORT_SYMBOL(ppc_do_canonicalize_irqs);
113 #endif
114 
115 #ifdef CONFIG_CRASH_DUMP
116 /* This keeps a track of which one is the crashing cpu. */
117 int crashing_cpu = -1;
118 #endif
119 
120 /* also used by kexec */
machine_shutdown(void)121 void machine_shutdown(void)
122 {
123 	/*
124 	 * if fadump is active, cleanup the fadump registration before we
125 	 * shutdown.
126 	 */
127 	fadump_cleanup();
128 
129 	if (ppc_md.machine_shutdown)
130 		ppc_md.machine_shutdown();
131 }
132 
machine_hang(void)133 static void machine_hang(void)
134 {
135 	pr_emerg("System Halted, OK to turn off power\n");
136 	local_irq_disable();
137 	while (1)
138 		;
139 }
140 
machine_restart(char * cmd)141 void machine_restart(char *cmd)
142 {
143 	machine_shutdown();
144 	if (ppc_md.restart)
145 		ppc_md.restart(cmd);
146 
147 	smp_send_stop();
148 
149 	do_kernel_restart(cmd);
150 	mdelay(1000);
151 
152 	machine_hang();
153 }
154 
machine_power_off(void)155 void machine_power_off(void)
156 {
157 	machine_shutdown();
158 	do_kernel_power_off();
159 	smp_send_stop();
160 	machine_hang();
161 }
162 /* Used by the G5 thermal driver */
163 EXPORT_SYMBOL_GPL(machine_power_off);
164 
165 void (*pm_power_off)(void);
166 EXPORT_SYMBOL_GPL(pm_power_off);
167 
arch_get_random_seed_longs(unsigned long * v,size_t max_longs)168 size_t __must_check arch_get_random_seed_longs(unsigned long *v, size_t max_longs)
169 {
170 	if (max_longs && ppc_md.get_random_seed && ppc_md.get_random_seed(v))
171 		return 1;
172 	return 0;
173 }
174 EXPORT_SYMBOL(arch_get_random_seed_longs);
175 
machine_halt(void)176 void machine_halt(void)
177 {
178 	machine_shutdown();
179 	if (ppc_md.halt)
180 		ppc_md.halt();
181 
182 	smp_send_stop();
183 	machine_hang();
184 }
185 
186 #ifdef CONFIG_SMP
187 DEFINE_PER_CPU(unsigned int, cpu_pvr);
188 #endif
189 
show_cpuinfo_summary(struct seq_file * m)190 static void show_cpuinfo_summary(struct seq_file *m)
191 {
192 	struct device_node *root;
193 	const char *model = NULL;
194 	unsigned long bogosum = 0;
195 	int i;
196 
197 	if (IS_ENABLED(CONFIG_SMP) && IS_ENABLED(CONFIG_PPC32)) {
198 		for_each_online_cpu(i)
199 			bogosum += loops_per_jiffy;
200 		seq_printf(m, "total bogomips\t: %lu.%02lu\n",
201 			   bogosum / (500000 / HZ), bogosum / (5000 / HZ) % 100);
202 	}
203 	seq_printf(m, "timebase\t: %lu\n", ppc_tb_freq);
204 	if (ppc_md.name)
205 		seq_printf(m, "platform\t: %s\n", ppc_md.name);
206 	root = of_find_node_by_path("/");
207 	if (root)
208 		model = of_get_property(root, "model", NULL);
209 	if (model)
210 		seq_printf(m, "model\t\t: %s\n", model);
211 	of_node_put(root);
212 
213 	if (ppc_md.show_cpuinfo != NULL)
214 		ppc_md.show_cpuinfo(m);
215 
216 	/* Display the amount of memory */
217 	if (IS_ENABLED(CONFIG_PPC32))
218 		seq_printf(m, "Memory\t\t: %d MB\n",
219 			   (unsigned int)(total_memory / (1024 * 1024)));
220 }
221 
show_cpuinfo(struct seq_file * m,void * v)222 static int show_cpuinfo(struct seq_file *m, void *v)
223 {
224 	unsigned long cpu_id = (unsigned long)v - 1;
225 	unsigned int pvr;
226 	unsigned long proc_freq;
227 	unsigned short maj;
228 	unsigned short min;
229 
230 #ifdef CONFIG_SMP
231 	pvr = per_cpu(cpu_pvr, cpu_id);
232 #else
233 	pvr = mfspr(SPRN_PVR);
234 #endif
235 	maj = (pvr >> 8) & 0xFF;
236 	min = pvr & 0xFF;
237 
238 	seq_printf(m, "processor\t: %lu\ncpu\t\t: ", cpu_id);
239 
240 	if (cur_cpu_spec->pvr_mask && cur_cpu_spec->cpu_name)
241 		seq_puts(m, cur_cpu_spec->cpu_name);
242 	else
243 		seq_printf(m, "unknown (%08x)", pvr);
244 
245 	if (cpu_has_feature(CPU_FTR_ALTIVEC))
246 		seq_puts(m, ", altivec supported");
247 
248 	seq_putc(m, '\n');
249 
250 #ifdef CONFIG_TAU
251 	if (cpu_has_feature(CPU_FTR_TAU)) {
252 		if (IS_ENABLED(CONFIG_TAU_AVERAGE)) {
253 			/* more straightforward, but potentially misleading */
254 			seq_printf(m,  "temperature \t: %u C (uncalibrated)\n",
255 				   cpu_temp(cpu_id));
256 		} else {
257 			/* show the actual temp sensor range */
258 			u32 temp;
259 			temp = cpu_temp_both(cpu_id);
260 			seq_printf(m, "temperature \t: %u-%u C (uncalibrated)\n",
261 				   temp & 0xff, temp >> 16);
262 		}
263 	}
264 #endif /* CONFIG_TAU */
265 
266 	/*
267 	 * Platforms that have variable clock rates, should implement
268 	 * the method ppc_md.get_proc_freq() that reports the clock
269 	 * rate of a given cpu. The rest can use ppc_proc_freq to
270 	 * report the clock rate that is same across all cpus.
271 	 */
272 	if (ppc_md.get_proc_freq)
273 		proc_freq = ppc_md.get_proc_freq(cpu_id);
274 	else
275 		proc_freq = ppc_proc_freq;
276 
277 	if (proc_freq)
278 		seq_printf(m, "clock\t\t: %lu.%06luMHz\n",
279 			   proc_freq / 1000000, proc_freq % 1000000);
280 
281 	/* If we are a Freescale core do a simple check so
282 	 * we don't have to keep adding cases in the future */
283 	if (PVR_VER(pvr) & 0x8000) {
284 		switch (PVR_VER(pvr)) {
285 		case 0x8000:	/* 7441/7450/7451, Voyager */
286 		case 0x8001:	/* 7445/7455, Apollo 6 */
287 		case 0x8002:	/* 7447/7457, Apollo 7 */
288 		case 0x8003:	/* 7447A, Apollo 7 PM */
289 		case 0x8004:	/* 7448, Apollo 8 */
290 		case 0x800c:	/* 7410, Nitro */
291 			maj = ((pvr >> 8) & 0xF);
292 			min = PVR_MIN(pvr);
293 			break;
294 		default:	/* e500/book-e */
295 			maj = PVR_MAJ(pvr);
296 			min = PVR_MIN(pvr);
297 			break;
298 		}
299 	} else {
300 		switch (PVR_VER(pvr)) {
301 			case 0x1008:	/* 740P/750P ?? */
302 				maj = ((pvr >> 8) & 0xFF) - 1;
303 				min = pvr & 0xFF;
304 				break;
305 			case 0x004e: /* POWER9 bits 12-15 give chip type */
306 			case 0x0080: /* POWER10 bit 12 gives SMT8/4 */
307 				maj = (pvr >> 8) & 0x0F;
308 				min = pvr & 0xFF;
309 				break;
310 			default:
311 				maj = (pvr >> 8) & 0xFF;
312 				min = pvr & 0xFF;
313 				break;
314 		}
315 	}
316 
317 	seq_printf(m, "revision\t: %hd.%hd (pvr %04x %04x)\n",
318 		   maj, min, PVR_VER(pvr), PVR_REV(pvr));
319 
320 	if (IS_ENABLED(CONFIG_PPC32))
321 		seq_printf(m, "bogomips\t: %lu.%02lu\n", loops_per_jiffy / (500000 / HZ),
322 			   (loops_per_jiffy / (5000 / HZ)) % 100);
323 
324 	seq_putc(m, '\n');
325 
326 	/* If this is the last cpu, print the summary */
327 	if (cpumask_next(cpu_id, cpu_online_mask) >= nr_cpu_ids)
328 		show_cpuinfo_summary(m);
329 
330 	return 0;
331 }
332 
c_start(struct seq_file * m,loff_t * pos)333 static void *c_start(struct seq_file *m, loff_t *pos)
334 {
335 	if (*pos == 0)	/* just in case, cpu 0 is not the first */
336 		*pos = cpumask_first(cpu_online_mask);
337 	else
338 		*pos = cpumask_next(*pos - 1, cpu_online_mask);
339 	if ((*pos) < nr_cpu_ids)
340 		return (void *)(unsigned long)(*pos + 1);
341 	return NULL;
342 }
343 
c_next(struct seq_file * m,void * v,loff_t * pos)344 static void *c_next(struct seq_file *m, void *v, loff_t *pos)
345 {
346 	(*pos)++;
347 	return c_start(m, pos);
348 }
349 
c_stop(struct seq_file * m,void * v)350 static void c_stop(struct seq_file *m, void *v)
351 {
352 }
353 
354 const struct seq_operations cpuinfo_op = {
355 	.start	= c_start,
356 	.next	= c_next,
357 	.stop	= c_stop,
358 	.show	= show_cpuinfo,
359 };
360 
check_for_initrd(void)361 void __init check_for_initrd(void)
362 {
363 #ifdef CONFIG_BLK_DEV_INITRD
364 	DBG(" -> check_for_initrd()  initrd_start=0x%lx  initrd_end=0x%lx\n",
365 	    initrd_start, initrd_end);
366 
367 	/* If we were passed an initrd, set the ROOT_DEV properly if the values
368 	 * look sensible. If not, clear initrd reference.
369 	 */
370 	if (is_kernel_addr(initrd_start) && is_kernel_addr(initrd_end) &&
371 	    initrd_end > initrd_start)
372 		ROOT_DEV = Root_RAM0;
373 	else
374 		initrd_start = initrd_end = 0;
375 
376 	if (initrd_start)
377 		pr_info("Found initrd at 0x%lx:0x%lx\n", initrd_start, initrd_end);
378 
379 	DBG(" <- check_for_initrd()\n");
380 #endif /* CONFIG_BLK_DEV_INITRD */
381 }
382 
383 #ifdef CONFIG_SMP
384 
385 int threads_per_core, threads_per_subcore, threads_shift __read_mostly;
386 cpumask_t threads_core_mask __read_mostly;
387 EXPORT_SYMBOL_GPL(threads_per_core);
388 EXPORT_SYMBOL_GPL(threads_per_subcore);
389 EXPORT_SYMBOL_GPL(threads_shift);
390 EXPORT_SYMBOL_GPL(threads_core_mask);
391 
cpu_init_thread_core_maps(int tpc)392 static void __init cpu_init_thread_core_maps(int tpc)
393 {
394 	int i;
395 
396 	threads_per_core = tpc;
397 	threads_per_subcore = tpc;
398 	cpumask_clear(&threads_core_mask);
399 
400 	/* This implementation only supports power of 2 number of threads
401 	 * for simplicity and performance
402 	 */
403 	threads_shift = ilog2(tpc);
404 	BUG_ON(tpc != (1 << threads_shift));
405 
406 	for (i = 0; i < tpc; i++)
407 		cpumask_set_cpu(i, &threads_core_mask);
408 
409 	printk(KERN_INFO "CPU maps initialized for %d thread%s per core\n",
410 	       tpc, str_plural(tpc));
411 	printk(KERN_DEBUG " (thread shift is %d)\n", threads_shift);
412 }
413 
414 
415 u32 *cpu_to_phys_id = NULL;
416 
assign_threads(unsigned int cpu,unsigned int nthreads,bool present,const __be32 * hw_ids)417 static int assign_threads(unsigned int cpu, unsigned int nthreads, bool present,
418 			  const __be32 *hw_ids)
419 {
420 	for (int i = 0; i < nthreads && cpu < nr_cpu_ids; i++) {
421 		__be32 hwid;
422 
423 		hwid = be32_to_cpu(hw_ids[i]);
424 
425 		DBG("    thread %d -> cpu %d (hard id %d)\n", i, cpu, hwid);
426 
427 		set_cpu_present(cpu, present);
428 		set_cpu_possible(cpu, true);
429 		cpu_to_phys_id[cpu] = hwid;
430 		cpu++;
431 	}
432 
433 	return cpu;
434 }
435 
436 /**
437  * setup_cpu_maps - initialize the following cpu maps:
438  *                  cpu_possible_mask
439  *                  cpu_present_mask
440  *
441  * Having the possible map set up early allows us to restrict allocations
442  * of things like irqstacks to nr_cpu_ids rather than NR_CPUS.
443  *
444  * We do not initialize the online map here; cpus set their own bits in
445  * cpu_online_mask as they come up.
446  *
447  * This function is valid only for Open Firmware systems.  finish_device_tree
448  * must be called before using this.
449  *
450  * While we're here, we may as well set the "physical" cpu ids in the paca.
451  *
452  * NOTE: This must match the parsing done in early_init_dt_scan_cpus.
453  */
smp_setup_cpu_maps(void)454 void __init smp_setup_cpu_maps(void)
455 {
456 	struct device_node *dn;
457 	int cpu = 0;
458 	int nthreads = 1;
459 
460 	DBG("smp_setup_cpu_maps()\n");
461 
462 	cpu_to_phys_id = memblock_alloc_or_panic(nr_cpu_ids * sizeof(u32),
463 					__alignof__(u32));
464 
465 	for_each_node_by_type(dn, "cpu") {
466 		const __be32 *intserv;
467 		__be32 cpu_be;
468 		int len;
469 
470 		DBG("  * %pOF...\n", dn);
471 
472 		intserv = of_get_property(dn, "ibm,ppc-interrupt-server#s",
473 				&len);
474 		if (intserv) {
475 			DBG("    ibm,ppc-interrupt-server#s -> %lu threads\n",
476 			    (len / sizeof(int)));
477 		} else {
478 			DBG("    no ibm,ppc-interrupt-server#s -> 1 thread\n");
479 			intserv = of_get_property(dn, "reg", &len);
480 			if (!intserv) {
481 				cpu_be = cpu_to_be32(cpu);
482 				/* XXX: what is this? uninitialized?? */
483 				intserv = &cpu_be;	/* assume logical == phys */
484 				len = 4;
485 			}
486 		}
487 
488 		nthreads = len / sizeof(int);
489 
490 		bool avail = of_device_is_available(dn);
491 		if (!avail)
492 			avail = !of_property_match_string(dn,
493 					"enable-method", "spin-table");
494 
495 		if (boot_core_hwid >= 0) {
496 			if (cpu == 0) {
497 				pr_info("Skipping CPU node %pOF to allow for boot core.\n", dn);
498 				cpu = nthreads;
499 				continue;
500 			}
501 
502 			if (be32_to_cpu(intserv[0]) == boot_core_hwid) {
503 				pr_info("Renumbered boot core %pOF to logical 0\n", dn);
504 				assign_threads(0, nthreads, avail, intserv);
505 				of_node_put(dn);
506 				break;
507 			}
508 		} else if (cpu >= nr_cpu_ids) {
509 			of_node_put(dn);
510 			break;
511 		}
512 
513 		if (cpu < nr_cpu_ids)
514 			cpu = assign_threads(cpu, nthreads, avail, intserv);
515 	}
516 
517 	/* If no SMT supported, nthreads is forced to 1 */
518 	if (!cpu_has_feature(CPU_FTR_SMT)) {
519 		DBG("  SMT disabled ! nthreads forced to 1\n");
520 		nthreads = 1;
521 	}
522 
523 #ifdef CONFIG_PPC64
524 	/*
525 	 * On pSeries LPAR, we need to know how many cpus
526 	 * could possibly be added to this partition.
527 	 */
528 	if (firmware_has_feature(FW_FEATURE_LPAR) &&
529 	    (dn = of_find_node_by_path("/rtas"))) {
530 		int num_addr_cell, num_size_cell, maxcpus;
531 		const __be32 *ireg;
532 
533 		num_addr_cell = of_n_addr_cells(dn);
534 		num_size_cell = of_n_size_cells(dn);
535 
536 		ireg = of_get_property(dn, "ibm,lrdr-capacity", NULL);
537 
538 		if (!ireg)
539 			goto out;
540 
541 		maxcpus = be32_to_cpup(ireg + num_addr_cell + num_size_cell);
542 
543 		/* Double maxcpus for processors which have SMT capability */
544 		if (cpu_has_feature(CPU_FTR_SMT))
545 			maxcpus *= nthreads;
546 
547 		if (maxcpus > nr_cpu_ids) {
548 			printk(KERN_WARNING
549 			       "Partition configured for %d cpus, "
550 			       "operating system maximum is %u.\n",
551 			       maxcpus, nr_cpu_ids);
552 			maxcpus = nr_cpu_ids;
553 		} else
554 			printk(KERN_INFO "Partition configured for %d cpus.\n",
555 			       maxcpus);
556 
557 		for (cpu = 0; cpu < maxcpus; cpu++)
558 			set_cpu_possible(cpu, true);
559 	out:
560 		of_node_put(dn);
561 	}
562 #endif
563 #ifdef CONFIG_PPC64_PROC_SYSTEMCFG
564 	systemcfg->processorCount = num_present_cpus();
565 #endif /* CONFIG_PPC64 */
566 
567         /* Initialize CPU <=> thread mapping/
568 	 *
569 	 * WARNING: We assume that the number of threads is the same for
570 	 * every CPU in the system. If that is not the case, then some code
571 	 * here will have to be reworked
572 	 */
573 	cpu_init_thread_core_maps(nthreads);
574 
575 	/* Now that possible cpus are set, set nr_cpu_ids for later use */
576 	setup_nr_cpu_ids();
577 
578 	free_unused_pacas();
579 }
580 #endif /* CONFIG_SMP */
581 
582 #ifdef CONFIG_PCSPKR_PLATFORM
add_pcspkr(void)583 static __init int add_pcspkr(void)
584 {
585 	struct device_node *np;
586 	struct platform_device *pd;
587 	int ret;
588 
589 	np = of_find_compatible_node(NULL, NULL, "pnpPNP,100");
590 	of_node_put(np);
591 	if (!np)
592 		return -ENODEV;
593 
594 	pd = platform_device_alloc("pcspkr", -1);
595 	if (!pd)
596 		return -ENOMEM;
597 
598 	ret = platform_device_add(pd);
599 	if (ret)
600 		platform_device_put(pd);
601 
602 	return ret;
603 }
604 device_initcall(add_pcspkr);
605 #endif	/* CONFIG_PCSPKR_PLATFORM */
606 
607 static char ppc_hw_desc_buf[128] __initdata;
608 
609 struct seq_buf ppc_hw_desc __initdata = {
610 	.buffer = ppc_hw_desc_buf,
611 	.size = sizeof(ppc_hw_desc_buf),
612 	.len = 0,
613 };
614 
probe_machine(void)615 static __init void probe_machine(void)
616 {
617 	extern struct machdep_calls __machine_desc_start;
618 	extern struct machdep_calls __machine_desc_end;
619 	unsigned int i;
620 
621 	/*
622 	 * Iterate all ppc_md structures until we find the proper
623 	 * one for the current machine type
624 	 */
625 	DBG("Probing machine type ...\n");
626 
627 	/*
628 	 * Check ppc_md is empty, if not we have a bug, ie, we setup an
629 	 * entry before probe_machine() which will be overwritten
630 	 */
631 	for (i = 0; i < (sizeof(ppc_md) / sizeof(void *)); i++) {
632 		if (((void **)&ppc_md)[i]) {
633 			printk(KERN_ERR "Entry %d in ppc_md non empty before"
634 			       " machine probe !\n", i);
635 		}
636 	}
637 
638 	for (machine_id = &__machine_desc_start;
639 	     machine_id < &__machine_desc_end;
640 	     machine_id++) {
641 		DBG("  %s ...\n", machine_id->name);
642 		if (machine_id->compatible && !of_machine_is_compatible(machine_id->compatible))
643 			continue;
644 		if (machine_id->compatibles && !of_machine_compatible_match(machine_id->compatibles))
645 			continue;
646 		memcpy(&ppc_md, machine_id, sizeof(struct machdep_calls));
647 		if (ppc_md.probe && !ppc_md.probe())
648 			continue;
649 		DBG("   %s match !\n", machine_id->name);
650 		break;
651 	}
652 	/* What can we do if we didn't find ? */
653 	if (machine_id >= &__machine_desc_end) {
654 		pr_err("No suitable machine description found !\n");
655 		for (;;);
656 	}
657 
658 	// Append the machine name to other info we've gathered
659 	seq_buf_puts(&ppc_hw_desc, ppc_md.name);
660 
661 	// Set the generic hardware description shown in oopses
662 	dump_stack_set_arch_desc(ppc_hw_desc.buffer);
663 
664 	pr_info("Hardware name: %s\n", ppc_hw_desc.buffer);
665 }
666 
667 /* Match a class of boards, not a specific device configuration. */
check_legacy_ioport(unsigned long base_port)668 int check_legacy_ioport(unsigned long base_port)
669 {
670 	struct device_node *parent, *np = NULL;
671 	int ret = -ENODEV;
672 
673 	switch(base_port) {
674 	case I8042_DATA_REG:
675 		if (!(np = of_find_compatible_node(NULL, NULL, "pnpPNP,303")))
676 			np = of_find_compatible_node(NULL, NULL, "pnpPNP,f03");
677 		if (np) {
678 			parent = of_get_parent(np);
679 
680 			of_i8042_kbd_irq = irq_of_parse_and_map(parent, 0);
681 			if (!of_i8042_kbd_irq)
682 				of_i8042_kbd_irq = 1;
683 
684 			of_i8042_aux_irq = irq_of_parse_and_map(parent, 1);
685 			if (!of_i8042_aux_irq)
686 				of_i8042_aux_irq = 12;
687 
688 			of_node_put(np);
689 			np = parent;
690 			break;
691 		}
692 		np = of_find_node_by_type(NULL, "8042");
693 		/* Pegasos has no device_type on its 8042 node, look for the
694 		 * name instead */
695 		if (!np)
696 			np = of_find_node_by_name(NULL, "8042");
697 		if (np) {
698 			of_i8042_kbd_irq = 1;
699 			of_i8042_aux_irq = 12;
700 		}
701 		break;
702 	case FDC_BASE: /* FDC1 */
703 		np = of_find_node_by_type(NULL, "fdc");
704 		break;
705 	default:
706 		/* ipmi is supposed to fail here */
707 		break;
708 	}
709 	if (!np)
710 		return ret;
711 	parent = of_get_parent(np);
712 	if (parent) {
713 		if (of_node_is_type(parent, "isa"))
714 			ret = 0;
715 		of_node_put(parent);
716 	}
717 	of_node_put(np);
718 	return ret;
719 }
720 EXPORT_SYMBOL(check_legacy_ioport);
721 
722 /*
723  * Panic notifiers setup
724  *
725  * We have 3 notifiers for powerpc, each one from a different "nature":
726  *
727  * - ppc_panic_fadump_handler() is a hypervisor notifier, which hard-disables
728  *   IRQs and deal with the Firmware-Assisted dump, when it is configured;
729  *   should run early in the panic path.
730  *
731  * - dump_kernel_offset() is an informative notifier, just showing the KASLR
732  *   offset if we have RANDOMIZE_BASE set.
733  *
734  * - ppc_panic_platform_handler() is a low-level handler that's registered
735  *   only if the platform wishes to perform final actions in the panic path,
736  *   hence it should run late and might not even return. Currently, only
737  *   pseries and ps3 platforms register callbacks.
738  */
ppc_panic_fadump_handler(struct notifier_block * this,unsigned long event,void * ptr)739 static int ppc_panic_fadump_handler(struct notifier_block *this,
740 				    unsigned long event, void *ptr)
741 {
742 	/*
743 	 * panic does a local_irq_disable, but we really
744 	 * want interrupts to be hard disabled.
745 	 */
746 	hard_irq_disable();
747 
748 	/*
749 	 * If firmware-assisted dump has been registered then trigger
750 	 * its callback and let the firmware handles everything else.
751 	 */
752 	crash_fadump(NULL, ptr);
753 
754 	return NOTIFY_DONE;
755 }
756 
dump_kernel_offset(struct notifier_block * self,unsigned long v,void * p)757 static int dump_kernel_offset(struct notifier_block *self, unsigned long v,
758 			      void *p)
759 {
760 	pr_emerg("Kernel Offset: 0x%lx from 0x%lx\n",
761 		 kaslr_offset(), KERNELBASE);
762 
763 	return NOTIFY_DONE;
764 }
765 
ppc_panic_platform_handler(struct notifier_block * this,unsigned long event,void * ptr)766 static int ppc_panic_platform_handler(struct notifier_block *this,
767 				      unsigned long event, void *ptr)
768 {
769 	/*
770 	 * This handler is only registered if we have a panic callback
771 	 * on ppc_md, hence NULL check is not needed.
772 	 * Also, it may not return, so it runs really late on panic path.
773 	 */
774 	ppc_md.panic(ptr);
775 
776 	return NOTIFY_DONE;
777 }
778 
779 static struct notifier_block ppc_fadump_block = {
780 	.notifier_call = ppc_panic_fadump_handler,
781 	.priority = INT_MAX, /* run early, to notify the firmware ASAP */
782 };
783 
784 static struct notifier_block kernel_offset_notifier = {
785 	.notifier_call = dump_kernel_offset,
786 };
787 
788 static struct notifier_block ppc_panic_block = {
789 	.notifier_call = ppc_panic_platform_handler,
790 	.priority = INT_MIN, /* may not return; must be done last */
791 };
792 
setup_panic(void)793 void __init setup_panic(void)
794 {
795 	/* Hard-disables IRQs + deal with FW-assisted dump (fadump) */
796 	atomic_notifier_chain_register(&panic_notifier_list,
797 				       &ppc_fadump_block);
798 
799 	if (IS_ENABLED(CONFIG_RANDOMIZE_BASE) && kaslr_offset() > 0)
800 		atomic_notifier_chain_register(&panic_notifier_list,
801 					       &kernel_offset_notifier);
802 
803 	/* Low-level platform-specific routines that should run on panic */
804 	if (ppc_md.panic)
805 		atomic_notifier_chain_register(&panic_notifier_list,
806 					       &ppc_panic_block);
807 }
808 
809 #ifdef CONFIG_CHECK_CACHE_COHERENCY
810 /*
811  * For platforms that have configurable cache-coherency.  This function
812  * checks that the cache coherency setting of the kernel matches the setting
813  * left by the firmware, as indicated in the device tree.  Since a mismatch
814  * will eventually result in DMA failures, we print * and error and call
815  * BUG() in that case.
816  */
817 
818 #define KERNEL_COHERENCY	(!IS_ENABLED(CONFIG_NOT_COHERENT_CACHE))
819 
check_cache_coherency(void)820 static int __init check_cache_coherency(void)
821 {
822 	struct device_node *np;
823 	const void *prop;
824 	bool devtree_coherency;
825 
826 	np = of_find_node_by_path("/");
827 	prop = of_get_property(np, "coherency-off", NULL);
828 	of_node_put(np);
829 
830 	devtree_coherency = prop ? false : true;
831 
832 	if (devtree_coherency != KERNEL_COHERENCY) {
833 		printk(KERN_ERR
834 			"kernel coherency:%s != device tree_coherency:%s\n",
835 			str_on_off(KERNEL_COHERENCY),
836 			str_on_off(devtree_coherency));
837 		BUG();
838 	}
839 
840 	return 0;
841 }
842 
843 late_initcall(check_cache_coherency);
844 #endif /* CONFIG_CHECK_CACHE_COHERENCY */
845 
ppc_printk_progress(char * s,unsigned short hex)846 void ppc_printk_progress(char *s, unsigned short hex)
847 {
848 	pr_info("%s\n", s);
849 }
850 
print_system_info(void)851 static __init void print_system_info(void)
852 {
853 	pr_info("-----------------------------------------------------\n");
854 	pr_info("phys_mem_size     = 0x%llx\n",
855 		(unsigned long long)memblock_phys_mem_size());
856 
857 	pr_info("dcache_bsize      = 0x%x\n", dcache_bsize);
858 	pr_info("icache_bsize      = 0x%x\n", icache_bsize);
859 
860 	pr_info("cpu_features      = 0x%016lx\n", cur_cpu_spec->cpu_features);
861 	pr_info("  possible        = 0x%016lx\n",
862 		(unsigned long)CPU_FTRS_POSSIBLE);
863 	pr_info("  always          = 0x%016lx\n",
864 		(unsigned long)CPU_FTRS_ALWAYS);
865 	pr_info("cpu_user_features = 0x%08x 0x%08x\n",
866 		cur_cpu_spec->cpu_user_features,
867 		cur_cpu_spec->cpu_user_features2);
868 	pr_info("mmu_features      = 0x%08x\n", cur_cpu_spec->mmu_features);
869 #ifdef CONFIG_PPC64
870 	pr_info("firmware_features = 0x%016lx\n", powerpc_firmware_features);
871 #ifdef CONFIG_PPC_BOOK3S
872 	pr_info("vmalloc start     = 0x%lx\n", KERN_VIRT_START);
873 	pr_info("IO start          = 0x%lx\n", KERN_IO_START);
874 	pr_info("vmemmap start     = 0x%lx\n", (unsigned long)vmemmap);
875 #endif
876 #endif
877 
878 	if (!early_radix_enabled())
879 		print_system_hash_info();
880 
881 	if (PHYSICAL_START > 0)
882 		pr_info("physical_start    = 0x%llx\n",
883 		       (unsigned long long)PHYSICAL_START);
884 	pr_info("-----------------------------------------------------\n");
885 }
886 
887 #ifdef CONFIG_SMP
smp_setup_pacas(void)888 static void __init smp_setup_pacas(void)
889 {
890 	int cpu;
891 
892 	for_each_possible_cpu(cpu) {
893 		if (cpu == smp_processor_id())
894 			continue;
895 		allocate_paca(cpu);
896 		set_hard_smp_processor_id(cpu, cpu_to_phys_id[cpu]);
897 	}
898 
899 	memblock_free(cpu_to_phys_id, nr_cpu_ids * sizeof(u32));
900 	cpu_to_phys_id = NULL;
901 }
902 #endif
903 
904 /*
905  * Called into from start_kernel this initializes memblock, which is used
906  * to manage page allocation until mem_init is called.
907  */
setup_arch(char ** cmdline_p)908 void __init setup_arch(char **cmdline_p)
909 {
910 	kasan_init();
911 
912 	*cmdline_p = boot_command_line;
913 
914 	/* Set a half-reasonable default so udelay does something sensible */
915 	loops_per_jiffy = 500000000 / HZ;
916 
917 	/* Unflatten the device-tree passed by prom_init or kexec */
918 	unflatten_device_tree();
919 
920 	/*
921 	 * Initialize cache line/block info from device-tree (on ppc64) or
922 	 * just cputable (on ppc32).
923 	 */
924 	initialize_cache_info();
925 
926 	/* Initialize RTAS if available. */
927 	rtas_initialize();
928 
929 	/* Check if we have an initrd provided via the device-tree. */
930 	check_for_initrd();
931 
932 	/* Probe the machine type, establish ppc_md. */
933 	probe_machine();
934 
935 	/* Setup panic notifier if requested by the platform. */
936 	setup_panic();
937 
938 	/*
939 	 * Configure ppc_md.power_save (ppc32 only, 64-bit machines do
940 	 * it from their respective probe() function.
941 	 */
942 	setup_power_save();
943 
944 	/* Discover standard serial ports. */
945 	find_legacy_serial_ports();
946 
947 	/* Register early console with the printk subsystem. */
948 	register_early_udbg_console();
949 
950 	/* Setup the various CPU maps based on the device-tree. */
951 	smp_setup_cpu_maps();
952 
953 	/* Initialize xmon. */
954 	xmon_setup();
955 
956 	/* Check the SMT related command line arguments (ppc64). */
957 	check_smt_enabled();
958 
959 	/* Parse memory topology */
960 	mem_topology_setup();
961 	high_memory = (void *)__va(max_low_pfn * PAGE_SIZE);
962 
963 	/*
964 	 * Release secondary cpus out of their spinloops at 0x60 now that
965 	 * we can map physical -> logical CPU ids.
966 	 *
967 	 * Freescale Book3e parts spin in a loop provided by firmware,
968 	 * so smp_release_cpus() does nothing for them.
969 	 */
970 #ifdef CONFIG_SMP
971 	smp_setup_pacas();
972 
973 	/* On BookE, setup per-core TLB data structures. */
974 	setup_tlb_core_data();
975 #endif
976 
977 	/* Print various info about the machine that has been gathered so far. */
978 	print_system_info();
979 
980 	klp_init_thread_info(&init_task);
981 
982 	setup_initial_init_mm(_stext, _etext, _edata, _end);
983 	/* sched_init() does the mmgrab(&init_mm) for the primary CPU */
984 	VM_WARN_ON(cpumask_test_cpu(smp_processor_id(), mm_cpumask(&init_mm)));
985 	cpumask_set_cpu(smp_processor_id(), mm_cpumask(&init_mm));
986 	inc_mm_active_cpus(&init_mm);
987 	mm_iommu_init(&init_mm);
988 
989 	irqstack_early_init();
990 	exc_lvl_early_init();
991 	emergency_stack_init();
992 
993 	mce_init();
994 	smp_release_cpus();
995 
996 	initmem_init();
997 
998 	/*
999 	 * Reserve large chunks of memory for use by CMA for kdump, fadump, KVM and
1000 	 * hugetlb. These must be called after initmem_init(), so that
1001 	 * pageblock_order is initialised.
1002 	 */
1003 	fadump_cma_init();
1004 	kdump_cma_reserve();
1005 	kvm_cma_reserve();
1006 	gigantic_hugetlb_cma_reserve();
1007 
1008 	early_memtest(min_low_pfn << PAGE_SHIFT, max_low_pfn << PAGE_SHIFT);
1009 
1010 	if (ppc_md.setup_arch)
1011 		ppc_md.setup_arch();
1012 
1013 	setup_barrier_nospec();
1014 	setup_spectre_v2();
1015 
1016 	paging_init();
1017 
1018 	/* Initialize the MMU context management stuff. */
1019 	mmu_context_init();
1020 
1021 	/* Interrupt code needs to be 64K-aligned. */
1022 	if (IS_ENABLED(CONFIG_PPC64) && (unsigned long)_stext & 0xffff)
1023 		panic("Kernelbase not 64K-aligned (0x%lx)!\n",
1024 		      (unsigned long)_stext);
1025 }
1026