xref: /linux/drivers/net/ethernet/broadcom/bnxt/bnxt_ptp.c (revision 65ae975e97d5aab3ee9dc5ec701b12090572ed43)
1 /* Broadcom NetXtreme-C/E network driver.
2  *
3  * Copyright (c) 2021 Broadcom Inc.
4  *
5  * This program is free software; you can redistribute it and/or modify
6  * it under the terms of the GNU General Public License as published by
7  * the Free Software Foundation.
8  */
9 #include <linux/kernel.h>
10 #include <linux/errno.h>
11 #include <linux/pci.h>
12 #include <linux/netdevice.h>
13 #include <linux/etherdevice.h>
14 #include <linux/net_tstamp.h>
15 #include <linux/timekeeping.h>
16 #include <linux/ptp_classify.h>
17 #include <linux/clocksource.h>
18 #include "bnxt_hsi.h"
19 #include "bnxt.h"
20 #include "bnxt_hwrm.h"
21 #include "bnxt_ptp.h"
22 
bnxt_ptp_cfg_settime(struct bnxt * bp,u64 time)23 static int bnxt_ptp_cfg_settime(struct bnxt *bp, u64 time)
24 {
25 	struct hwrm_func_ptp_cfg_input *req;
26 	int rc;
27 
28 	rc = hwrm_req_init(bp, req, HWRM_FUNC_PTP_CFG);
29 	if (rc)
30 		return rc;
31 
32 	req->enables = cpu_to_le16(FUNC_PTP_CFG_REQ_ENABLES_PTP_SET_TIME);
33 	req->ptp_set_time = cpu_to_le64(time);
34 	return hwrm_req_send(bp, req);
35 }
36 
bnxt_ptp_parse(struct sk_buff * skb,u16 * seq_id,u16 * hdr_off)37 int bnxt_ptp_parse(struct sk_buff *skb, u16 *seq_id, u16 *hdr_off)
38 {
39 	unsigned int ptp_class;
40 	struct ptp_header *hdr;
41 
42 	ptp_class = ptp_classify_raw(skb);
43 
44 	switch (ptp_class & PTP_CLASS_VMASK) {
45 	case PTP_CLASS_V1:
46 	case PTP_CLASS_V2:
47 		hdr = ptp_parse_header(skb, ptp_class);
48 		if (!hdr)
49 			return -EINVAL;
50 
51 		*hdr_off = (u8 *)hdr - skb->data;
52 		*seq_id	 = ntohs(hdr->sequence_id);
53 		return 0;
54 	default:
55 		return -ERANGE;
56 	}
57 }
58 
bnxt_ptp_settime(struct ptp_clock_info * ptp_info,const struct timespec64 * ts)59 static int bnxt_ptp_settime(struct ptp_clock_info *ptp_info,
60 			    const struct timespec64 *ts)
61 {
62 	struct bnxt_ptp_cfg *ptp = container_of(ptp_info, struct bnxt_ptp_cfg,
63 						ptp_info);
64 	u64 ns = timespec64_to_ns(ts);
65 	unsigned long flags;
66 
67 	if (BNXT_PTP_USE_RTC(ptp->bp))
68 		return bnxt_ptp_cfg_settime(ptp->bp, ns);
69 
70 	write_seqlock_irqsave(&ptp->ptp_lock, flags);
71 	timecounter_init(&ptp->tc, &ptp->cc, ns);
72 	write_sequnlock_irqrestore(&ptp->ptp_lock, flags);
73 	return 0;
74 }
75 
76 /* Caller holds ptp_lock */
__bnxt_refclk_read(struct bnxt * bp,struct ptp_system_timestamp * sts,u64 * ns)77 static int __bnxt_refclk_read(struct bnxt *bp, struct ptp_system_timestamp *sts,
78 			      u64 *ns)
79 {
80 	struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
81 	u32 high_before, high_now, low;
82 
83 	if (test_bit(BNXT_STATE_IN_FW_RESET, &bp->state))
84 		return -EIO;
85 
86 	high_before = readl(bp->bar0 + ptp->refclk_mapped_regs[1]);
87 	ptp_read_system_prets(sts);
88 	low = readl(bp->bar0 + ptp->refclk_mapped_regs[0]);
89 	ptp_read_system_postts(sts);
90 	high_now = readl(bp->bar0 + ptp->refclk_mapped_regs[1]);
91 	if (high_now != high_before) {
92 		ptp_read_system_prets(sts);
93 		low = readl(bp->bar0 + ptp->refclk_mapped_regs[0]);
94 		ptp_read_system_postts(sts);
95 	}
96 	*ns = ((u64)high_now << 32) | low;
97 
98 	return 0;
99 }
100 
bnxt_refclk_read(struct bnxt * bp,struct ptp_system_timestamp * sts,u64 * ns)101 static int bnxt_refclk_read(struct bnxt *bp, struct ptp_system_timestamp *sts,
102 			    u64 *ns)
103 {
104 	struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
105 	unsigned long flags;
106 	int rc;
107 
108 	/* We have to serialize reg access and FW reset */
109 	read_seqlock_excl_irqsave(&ptp->ptp_lock, flags);
110 	rc = __bnxt_refclk_read(bp, sts, ns);
111 	read_sequnlock_excl_irqrestore(&ptp->ptp_lock, flags);
112 	return rc;
113 }
114 
bnxt_refclk_read_low(struct bnxt * bp,struct ptp_system_timestamp * sts,u32 * low)115 static int bnxt_refclk_read_low(struct bnxt *bp, struct ptp_system_timestamp *sts,
116 				u32 *low)
117 {
118 	struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
119 	unsigned long flags;
120 
121 	/* We have to serialize reg access and FW reset */
122 	read_seqlock_excl_irqsave(&ptp->ptp_lock, flags);
123 
124 	if (test_bit(BNXT_STATE_IN_FW_RESET, &bp->state)) {
125 		read_sequnlock_excl_irqrestore(&ptp->ptp_lock, flags);
126 		return -EIO;
127 	}
128 
129 	ptp_read_system_prets(sts);
130 	*low = readl(bp->bar0 + ptp->refclk_mapped_regs[0]);
131 	ptp_read_system_postts(sts);
132 
133 	read_sequnlock_excl_irqrestore(&ptp->ptp_lock, flags);
134 	return 0;
135 }
136 
bnxt_ptp_get_current_time(struct bnxt * bp)137 static void bnxt_ptp_get_current_time(struct bnxt *bp)
138 {
139 	struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
140 
141 	if (!ptp)
142 		return;
143 	WRITE_ONCE(ptp->old_time, ptp->current_time >> BNXT_HI_TIMER_SHIFT);
144 	bnxt_refclk_read(bp, NULL, &ptp->current_time);
145 }
146 
bnxt_hwrm_port_ts_query(struct bnxt * bp,u32 flags,u64 * ts,u32 txts_tmo,int slot)147 static int bnxt_hwrm_port_ts_query(struct bnxt *bp, u32 flags, u64 *ts,
148 				   u32 txts_tmo, int slot)
149 {
150 	struct hwrm_port_ts_query_output *resp;
151 	struct hwrm_port_ts_query_input *req;
152 	int rc;
153 
154 	rc = hwrm_req_init(bp, req, HWRM_PORT_TS_QUERY);
155 	if (rc)
156 		return rc;
157 
158 	req->flags = cpu_to_le32(flags);
159 	if ((flags & PORT_TS_QUERY_REQ_FLAGS_PATH) ==
160 	    PORT_TS_QUERY_REQ_FLAGS_PATH_TX) {
161 		struct bnxt_ptp_tx_req *txts_req = &bp->ptp_cfg->txts_req[slot];
162 		u32 tmo_us = txts_tmo * 1000;
163 
164 		req->enables = cpu_to_le16(BNXT_PTP_QTS_TX_ENABLES);
165 		req->ptp_seq_id = cpu_to_le32(txts_req->tx_seqid);
166 		req->ptp_hdr_offset = cpu_to_le16(txts_req->tx_hdr_off);
167 		if (!tmo_us)
168 			tmo_us = BNXT_PTP_QTS_TIMEOUT;
169 		tmo_us = min(tmo_us, BNXT_PTP_QTS_MAX_TMO_US);
170 		req->ts_req_timeout = cpu_to_le16(tmo_us);
171 	}
172 	resp = hwrm_req_hold(bp, req);
173 
174 	rc = hwrm_req_send_silent(bp, req);
175 	if (!rc)
176 		*ts = le64_to_cpu(resp->ptp_msg_ts);
177 	hwrm_req_drop(bp, req);
178 	return rc;
179 }
180 
bnxt_ptp_gettimex(struct ptp_clock_info * ptp_info,struct timespec64 * ts,struct ptp_system_timestamp * sts)181 static int bnxt_ptp_gettimex(struct ptp_clock_info *ptp_info,
182 			     struct timespec64 *ts,
183 			     struct ptp_system_timestamp *sts)
184 {
185 	struct bnxt_ptp_cfg *ptp = container_of(ptp_info, struct bnxt_ptp_cfg,
186 						ptp_info);
187 	u64 ns, cycles;
188 	u32 low;
189 	int rc;
190 
191 	rc = bnxt_refclk_read_low(ptp->bp, sts, &low);
192 	if (rc)
193 		return rc;
194 
195 	cycles = bnxt_extend_cycles_32b_to_48b(ptp, low);
196 	ns = bnxt_timecounter_cyc2time(ptp, cycles);
197 	*ts = ns_to_timespec64(ns);
198 
199 	return 0;
200 }
201 
bnxt_ptp_update_current_time(struct bnxt * bp)202 void bnxt_ptp_update_current_time(struct bnxt *bp)
203 {
204 	struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
205 
206 	bnxt_refclk_read(ptp->bp, NULL, &ptp->current_time);
207 	WRITE_ONCE(ptp->old_time, ptp->current_time >> BNXT_HI_TIMER_SHIFT);
208 }
209 
bnxt_ptp_adjphc(struct bnxt_ptp_cfg * ptp,s64 delta)210 static int bnxt_ptp_adjphc(struct bnxt_ptp_cfg *ptp, s64 delta)
211 {
212 	struct hwrm_port_mac_cfg_input *req;
213 	int rc;
214 
215 	rc = hwrm_req_init(ptp->bp, req, HWRM_PORT_MAC_CFG);
216 	if (rc)
217 		return rc;
218 
219 	req->enables = cpu_to_le32(PORT_MAC_CFG_REQ_ENABLES_PTP_ADJ_PHASE);
220 	req->ptp_adj_phase = cpu_to_le64(delta);
221 
222 	rc = hwrm_req_send(ptp->bp, req);
223 	if (rc) {
224 		netdev_err(ptp->bp->dev, "ptp adjphc failed. rc = %x\n", rc);
225 	} else {
226 		bnxt_ptp_update_current_time(ptp->bp);
227 	}
228 
229 	return rc;
230 }
231 
bnxt_ptp_adjtime(struct ptp_clock_info * ptp_info,s64 delta)232 static int bnxt_ptp_adjtime(struct ptp_clock_info *ptp_info, s64 delta)
233 {
234 	struct bnxt_ptp_cfg *ptp = container_of(ptp_info, struct bnxt_ptp_cfg,
235 						ptp_info);
236 	unsigned long flags;
237 
238 	if (BNXT_PTP_USE_RTC(ptp->bp))
239 		return bnxt_ptp_adjphc(ptp, delta);
240 
241 	write_seqlock_irqsave(&ptp->ptp_lock, flags);
242 	timecounter_adjtime(&ptp->tc, delta);
243 	write_sequnlock_irqrestore(&ptp->ptp_lock, flags);
244 	return 0;
245 }
246 
bnxt_ptp_adjfine_rtc(struct bnxt * bp,long scaled_ppm)247 static int bnxt_ptp_adjfine_rtc(struct bnxt *bp, long scaled_ppm)
248 {
249 	s32 ppb = scaled_ppm_to_ppb(scaled_ppm);
250 	struct hwrm_port_mac_cfg_input *req;
251 	int rc;
252 
253 	rc = hwrm_req_init(bp, req, HWRM_PORT_MAC_CFG);
254 	if (rc)
255 		return rc;
256 
257 	req->ptp_freq_adj_ppb = cpu_to_le32(ppb);
258 	req->enables = cpu_to_le32(PORT_MAC_CFG_REQ_ENABLES_PTP_FREQ_ADJ_PPB);
259 	rc = hwrm_req_send(bp, req);
260 	if (rc)
261 		netdev_err(bp->dev,
262 			   "ptp adjfine failed. rc = %d\n", rc);
263 	return rc;
264 }
265 
bnxt_ptp_adjfine(struct ptp_clock_info * ptp_info,long scaled_ppm)266 static int bnxt_ptp_adjfine(struct ptp_clock_info *ptp_info, long scaled_ppm)
267 {
268 	struct bnxt_ptp_cfg *ptp = container_of(ptp_info, struct bnxt_ptp_cfg,
269 						ptp_info);
270 	struct bnxt *bp = ptp->bp;
271 	unsigned long flags;
272 
273 	if (!BNXT_MH(bp))
274 		return bnxt_ptp_adjfine_rtc(bp, scaled_ppm);
275 
276 	write_seqlock_irqsave(&ptp->ptp_lock, flags);
277 	timecounter_read(&ptp->tc);
278 	ptp->cc.mult = adjust_by_scaled_ppm(ptp->cmult, scaled_ppm);
279 	write_sequnlock_irqrestore(&ptp->ptp_lock, flags);
280 	return 0;
281 }
282 
bnxt_ptp_pps_event(struct bnxt * bp,u32 data1,u32 data2)283 void bnxt_ptp_pps_event(struct bnxt *bp, u32 data1, u32 data2)
284 {
285 	struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
286 	struct ptp_clock_event event;
287 	u64 ns, pps_ts;
288 
289 	pps_ts = EVENT_PPS_TS(data2, data1);
290 	ns = bnxt_timecounter_cyc2time(ptp, pps_ts);
291 
292 	switch (EVENT_DATA2_PPS_EVENT_TYPE(data2)) {
293 	case ASYNC_EVENT_CMPL_PPS_TIMESTAMP_EVENT_DATA2_EVENT_TYPE_INTERNAL:
294 		event.pps_times.ts_real = ns_to_timespec64(ns);
295 		event.type = PTP_CLOCK_PPSUSR;
296 		event.index = EVENT_DATA2_PPS_PIN_NUM(data2);
297 		break;
298 	case ASYNC_EVENT_CMPL_PPS_TIMESTAMP_EVENT_DATA2_EVENT_TYPE_EXTERNAL:
299 		event.timestamp = ns;
300 		event.type = PTP_CLOCK_EXTTS;
301 		event.index = EVENT_DATA2_PPS_PIN_NUM(data2);
302 		break;
303 	}
304 
305 	ptp_clock_event(bp->ptp_cfg->ptp_clock, &event);
306 }
307 
bnxt_ptp_cfg_pin(struct bnxt * bp,u8 pin,u8 usage)308 static int bnxt_ptp_cfg_pin(struct bnxt *bp, u8 pin, u8 usage)
309 {
310 	struct hwrm_func_ptp_pin_cfg_input *req;
311 	struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
312 	u8 state = usage != BNXT_PPS_PIN_NONE;
313 	u8 *pin_state, *pin_usg;
314 	u32 enables;
315 	int rc;
316 
317 	if (!TSIO_PIN_VALID(pin)) {
318 		netdev_err(ptp->bp->dev, "1PPS: Invalid pin. Check pin-function configuration\n");
319 		return -EOPNOTSUPP;
320 	}
321 
322 	rc = hwrm_req_init(ptp->bp, req, HWRM_FUNC_PTP_PIN_CFG);
323 	if (rc)
324 		return rc;
325 
326 	enables = (FUNC_PTP_PIN_CFG_REQ_ENABLES_PIN0_STATE |
327 		   FUNC_PTP_PIN_CFG_REQ_ENABLES_PIN0_USAGE) << (pin * 2);
328 	req->enables = cpu_to_le32(enables);
329 
330 	pin_state = &req->pin0_state;
331 	pin_usg = &req->pin0_usage;
332 
333 	*(pin_state + (pin * 2)) = state;
334 	*(pin_usg + (pin * 2)) = usage;
335 
336 	rc = hwrm_req_send(ptp->bp, req);
337 	if (rc)
338 		return rc;
339 
340 	ptp->pps_info.pins[pin].usage = usage;
341 	ptp->pps_info.pins[pin].state = state;
342 
343 	return 0;
344 }
345 
bnxt_ptp_cfg_event(struct bnxt * bp,u8 event)346 static int bnxt_ptp_cfg_event(struct bnxt *bp, u8 event)
347 {
348 	struct hwrm_func_ptp_cfg_input *req;
349 	int rc;
350 
351 	rc = hwrm_req_init(bp, req, HWRM_FUNC_PTP_CFG);
352 	if (rc)
353 		return rc;
354 
355 	req->enables = cpu_to_le16(FUNC_PTP_CFG_REQ_ENABLES_PTP_PPS_EVENT);
356 	req->ptp_pps_event = event;
357 	return hwrm_req_send(bp, req);
358 }
359 
bnxt_ptp_cfg_tstamp_filters(struct bnxt * bp)360 int bnxt_ptp_cfg_tstamp_filters(struct bnxt *bp)
361 {
362 	struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
363 	struct hwrm_port_mac_cfg_input *req;
364 	int rc;
365 
366 	if (!ptp || !ptp->tstamp_filters)
367 		return -EIO;
368 
369 	rc = hwrm_req_init(bp, req, HWRM_PORT_MAC_CFG);
370 	if (rc)
371 		goto out;
372 
373 	if (!(bp->fw_cap & BNXT_FW_CAP_RX_ALL_PKT_TS) && (ptp->tstamp_filters &
374 	    (PORT_MAC_CFG_REQ_FLAGS_ALL_RX_TS_CAPTURE_ENABLE |
375 	     PORT_MAC_CFG_REQ_FLAGS_ALL_RX_TS_CAPTURE_DISABLE))) {
376 		ptp->tstamp_filters &= ~(PORT_MAC_CFG_REQ_FLAGS_ALL_RX_TS_CAPTURE_ENABLE |
377 					 PORT_MAC_CFG_REQ_FLAGS_ALL_RX_TS_CAPTURE_DISABLE);
378 		netdev_warn(bp->dev, "Unsupported FW for all RX pkts timestamp filter\n");
379 	}
380 
381 	req->flags = cpu_to_le32(ptp->tstamp_filters);
382 	req->enables = cpu_to_le32(PORT_MAC_CFG_REQ_ENABLES_RX_TS_CAPTURE_PTP_MSG_TYPE);
383 	req->rx_ts_capture_ptp_msg_type = cpu_to_le16(ptp->rxctl);
384 
385 	rc = hwrm_req_send(bp, req);
386 	if (!rc) {
387 		bp->ptp_all_rx_tstamp = !!(ptp->tstamp_filters &
388 					   PORT_MAC_CFG_REQ_FLAGS_ALL_RX_TS_CAPTURE_ENABLE);
389 		return 0;
390 	}
391 	ptp->tstamp_filters = 0;
392 out:
393 	bp->ptp_all_rx_tstamp = 0;
394 	netdev_warn(bp->dev, "Failed to configure HW packet timestamp filters\n");
395 	return rc;
396 }
397 
bnxt_ptp_reapply_pps(struct bnxt * bp)398 void bnxt_ptp_reapply_pps(struct bnxt *bp)
399 {
400 	struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
401 	struct bnxt_pps *pps;
402 	u32 pin = 0;
403 	int rc;
404 
405 	if (!ptp || !(bp->fw_cap & BNXT_FW_CAP_PTP_PPS) ||
406 	    !(ptp->ptp_info.pin_config))
407 		return;
408 	pps = &ptp->pps_info;
409 	for (pin = 0; pin < BNXT_MAX_TSIO_PINS; pin++) {
410 		if (pps->pins[pin].state) {
411 			rc = bnxt_ptp_cfg_pin(bp, pin, pps->pins[pin].usage);
412 			if (!rc && pps->pins[pin].event)
413 				rc = bnxt_ptp_cfg_event(bp,
414 							pps->pins[pin].event);
415 			if (rc)
416 				netdev_err(bp->dev, "1PPS: Failed to configure pin%d\n",
417 					   pin);
418 		}
419 	}
420 }
421 
bnxt_get_target_cycles(struct bnxt_ptp_cfg * ptp,u64 target_ns,u64 * cycles_delta)422 static int bnxt_get_target_cycles(struct bnxt_ptp_cfg *ptp, u64 target_ns,
423 				  u64 *cycles_delta)
424 {
425 	u64 cycles_now;
426 	u64 nsec_now, nsec_delta;
427 	int rc;
428 
429 	rc = bnxt_refclk_read(ptp->bp, NULL, &cycles_now);
430 	if (rc)
431 		return rc;
432 
433 	nsec_now = bnxt_timecounter_cyc2time(ptp, cycles_now);
434 
435 	nsec_delta = target_ns - nsec_now;
436 	*cycles_delta = div64_u64(nsec_delta << ptp->cc.shift, ptp->cc.mult);
437 	return 0;
438 }
439 
bnxt_ptp_perout_cfg(struct bnxt_ptp_cfg * ptp,struct ptp_clock_request * rq)440 static int bnxt_ptp_perout_cfg(struct bnxt_ptp_cfg *ptp,
441 			       struct ptp_clock_request *rq)
442 {
443 	struct hwrm_func_ptp_cfg_input *req;
444 	struct bnxt *bp = ptp->bp;
445 	struct timespec64 ts;
446 	u64 target_ns, delta;
447 	u16 enables;
448 	int rc;
449 
450 	ts.tv_sec = rq->perout.start.sec;
451 	ts.tv_nsec = rq->perout.start.nsec;
452 	target_ns = timespec64_to_ns(&ts);
453 
454 	rc = bnxt_get_target_cycles(ptp, target_ns, &delta);
455 	if (rc)
456 		return rc;
457 
458 	rc = hwrm_req_init(bp, req, HWRM_FUNC_PTP_CFG);
459 	if (rc)
460 		return rc;
461 
462 	enables = FUNC_PTP_CFG_REQ_ENABLES_PTP_FREQ_ADJ_EXT_PERIOD |
463 		  FUNC_PTP_CFG_REQ_ENABLES_PTP_FREQ_ADJ_EXT_UP |
464 		  FUNC_PTP_CFG_REQ_ENABLES_PTP_FREQ_ADJ_EXT_PHASE;
465 	req->enables = cpu_to_le16(enables);
466 	req->ptp_pps_event = 0;
467 	req->ptp_freq_adj_dll_source = 0;
468 	req->ptp_freq_adj_dll_phase = 0;
469 	req->ptp_freq_adj_ext_period = cpu_to_le32(NSEC_PER_SEC);
470 	req->ptp_freq_adj_ext_up = 0;
471 	req->ptp_freq_adj_ext_phase_lower = cpu_to_le32(delta);
472 
473 	return hwrm_req_send(bp, req);
474 }
475 
bnxt_ptp_enable(struct ptp_clock_info * ptp_info,struct ptp_clock_request * rq,int on)476 static int bnxt_ptp_enable(struct ptp_clock_info *ptp_info,
477 			   struct ptp_clock_request *rq, int on)
478 {
479 	struct bnxt_ptp_cfg *ptp = container_of(ptp_info, struct bnxt_ptp_cfg,
480 						ptp_info);
481 	struct bnxt *bp = ptp->bp;
482 	int pin_id;
483 	int rc;
484 
485 	switch (rq->type) {
486 	case PTP_CLK_REQ_EXTTS:
487 		/* Configure an External PPS IN */
488 		pin_id = ptp_find_pin(ptp->ptp_clock, PTP_PF_EXTTS,
489 				      rq->extts.index);
490 		if (!TSIO_PIN_VALID(pin_id))
491 			return -EOPNOTSUPP;
492 		if (!on)
493 			break;
494 		rc = bnxt_ptp_cfg_pin(bp, pin_id, BNXT_PPS_PIN_PPS_IN);
495 		if (rc)
496 			return rc;
497 		rc = bnxt_ptp_cfg_event(bp, BNXT_PPS_EVENT_EXTERNAL);
498 		if (!rc)
499 			ptp->pps_info.pins[pin_id].event = BNXT_PPS_EVENT_EXTERNAL;
500 		return rc;
501 	case PTP_CLK_REQ_PEROUT:
502 		/* Configure a Periodic PPS OUT */
503 		pin_id = ptp_find_pin(ptp->ptp_clock, PTP_PF_PEROUT,
504 				      rq->perout.index);
505 		if (!TSIO_PIN_VALID(pin_id))
506 			return -EOPNOTSUPP;
507 		if (!on)
508 			break;
509 
510 		rc = bnxt_ptp_cfg_pin(bp, pin_id, BNXT_PPS_PIN_PPS_OUT);
511 		if (!rc)
512 			rc = bnxt_ptp_perout_cfg(ptp, rq);
513 
514 		return rc;
515 	case PTP_CLK_REQ_PPS:
516 		/* Configure PHC PPS IN */
517 		rc = bnxt_ptp_cfg_pin(bp, 0, BNXT_PPS_PIN_PPS_IN);
518 		if (rc)
519 			return rc;
520 		rc = bnxt_ptp_cfg_event(bp, BNXT_PPS_EVENT_INTERNAL);
521 		if (!rc)
522 			ptp->pps_info.pins[0].event = BNXT_PPS_EVENT_INTERNAL;
523 		return rc;
524 	default:
525 		netdev_err(ptp->bp->dev, "Unrecognized PIN function\n");
526 		return -EOPNOTSUPP;
527 	}
528 
529 	return bnxt_ptp_cfg_pin(bp, pin_id, BNXT_PPS_PIN_NONE);
530 }
531 
bnxt_hwrm_ptp_cfg(struct bnxt * bp)532 static int bnxt_hwrm_ptp_cfg(struct bnxt *bp)
533 {
534 	struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
535 	u32 flags = 0;
536 
537 	switch (ptp->rx_filter) {
538 	case HWTSTAMP_FILTER_ALL:
539 		flags = PORT_MAC_CFG_REQ_FLAGS_ALL_RX_TS_CAPTURE_ENABLE;
540 		break;
541 	case HWTSTAMP_FILTER_NONE:
542 		flags = PORT_MAC_CFG_REQ_FLAGS_PTP_RX_TS_CAPTURE_DISABLE;
543 		if (bp->fw_cap & BNXT_FW_CAP_RX_ALL_PKT_TS)
544 			flags |= PORT_MAC_CFG_REQ_FLAGS_ALL_RX_TS_CAPTURE_DISABLE;
545 		break;
546 	case HWTSTAMP_FILTER_PTP_V2_EVENT:
547 	case HWTSTAMP_FILTER_PTP_V2_SYNC:
548 	case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
549 		flags = PORT_MAC_CFG_REQ_FLAGS_PTP_RX_TS_CAPTURE_ENABLE;
550 		break;
551 	}
552 
553 	if (ptp->tx_tstamp_en)
554 		flags |= PORT_MAC_CFG_REQ_FLAGS_PTP_TX_TS_CAPTURE_ENABLE;
555 	else
556 		flags |= PORT_MAC_CFG_REQ_FLAGS_PTP_TX_TS_CAPTURE_DISABLE;
557 
558 	ptp->tstamp_filters = flags;
559 
560 	return bnxt_ptp_cfg_tstamp_filters(bp);
561 }
562 
bnxt_hwtstamp_set(struct net_device * dev,struct ifreq * ifr)563 int bnxt_hwtstamp_set(struct net_device *dev, struct ifreq *ifr)
564 {
565 	struct bnxt *bp = netdev_priv(dev);
566 	struct hwtstamp_config stmpconf;
567 	struct bnxt_ptp_cfg *ptp;
568 	u16 old_rxctl;
569 	int old_rx_filter, rc;
570 	u8 old_tx_tstamp_en;
571 
572 	ptp = bp->ptp_cfg;
573 	if (!ptp)
574 		return -EOPNOTSUPP;
575 
576 	if (copy_from_user(&stmpconf, ifr->ifr_data, sizeof(stmpconf)))
577 		return -EFAULT;
578 
579 	if (stmpconf.tx_type != HWTSTAMP_TX_ON &&
580 	    stmpconf.tx_type != HWTSTAMP_TX_OFF)
581 		return -ERANGE;
582 
583 	old_rx_filter = ptp->rx_filter;
584 	old_rxctl = ptp->rxctl;
585 	old_tx_tstamp_en = ptp->tx_tstamp_en;
586 	switch (stmpconf.rx_filter) {
587 	case HWTSTAMP_FILTER_NONE:
588 		ptp->rxctl = 0;
589 		ptp->rx_filter = HWTSTAMP_FILTER_NONE;
590 		break;
591 	case HWTSTAMP_FILTER_ALL:
592 		if (bp->fw_cap & BNXT_FW_CAP_RX_ALL_PKT_TS) {
593 			ptp->rx_filter = HWTSTAMP_FILTER_ALL;
594 			break;
595 		}
596 		return -EOPNOTSUPP;
597 	case HWTSTAMP_FILTER_PTP_V2_EVENT:
598 	case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
599 	case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
600 		ptp->rxctl = BNXT_PTP_MSG_EVENTS;
601 		ptp->rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT;
602 		break;
603 	case HWTSTAMP_FILTER_PTP_V2_SYNC:
604 	case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
605 	case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
606 		ptp->rxctl = BNXT_PTP_MSG_SYNC;
607 		ptp->rx_filter = HWTSTAMP_FILTER_PTP_V2_SYNC;
608 		break;
609 	case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
610 	case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
611 	case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
612 		ptp->rxctl = BNXT_PTP_MSG_DELAY_REQ;
613 		ptp->rx_filter = HWTSTAMP_FILTER_PTP_V2_DELAY_REQ;
614 		break;
615 	default:
616 		return -ERANGE;
617 	}
618 
619 	if (stmpconf.tx_type == HWTSTAMP_TX_ON)
620 		ptp->tx_tstamp_en = 1;
621 	else
622 		ptp->tx_tstamp_en = 0;
623 
624 	rc = bnxt_hwrm_ptp_cfg(bp);
625 	if (rc)
626 		goto ts_set_err;
627 
628 	stmpconf.rx_filter = ptp->rx_filter;
629 	return copy_to_user(ifr->ifr_data, &stmpconf, sizeof(stmpconf)) ?
630 		-EFAULT : 0;
631 
632 ts_set_err:
633 	ptp->rx_filter = old_rx_filter;
634 	ptp->rxctl = old_rxctl;
635 	ptp->tx_tstamp_en = old_tx_tstamp_en;
636 	return rc;
637 }
638 
bnxt_hwtstamp_get(struct net_device * dev,struct ifreq * ifr)639 int bnxt_hwtstamp_get(struct net_device *dev, struct ifreq *ifr)
640 {
641 	struct bnxt *bp = netdev_priv(dev);
642 	struct hwtstamp_config stmpconf;
643 	struct bnxt_ptp_cfg *ptp;
644 
645 	ptp = bp->ptp_cfg;
646 	if (!ptp)
647 		return -EOPNOTSUPP;
648 
649 	stmpconf.flags = 0;
650 	stmpconf.tx_type = ptp->tx_tstamp_en ? HWTSTAMP_TX_ON : HWTSTAMP_TX_OFF;
651 
652 	stmpconf.rx_filter = ptp->rx_filter;
653 	return copy_to_user(ifr->ifr_data, &stmpconf, sizeof(stmpconf)) ?
654 		-EFAULT : 0;
655 }
656 
bnxt_map_regs(struct bnxt * bp,u32 * reg_arr,int count,int reg_win)657 static int bnxt_map_regs(struct bnxt *bp, u32 *reg_arr, int count, int reg_win)
658 {
659 	u32 reg_base = *reg_arr & BNXT_GRC_BASE_MASK;
660 	u32 win_off;
661 	int i;
662 
663 	for (i = 0; i < count; i++) {
664 		if ((reg_arr[i] & BNXT_GRC_BASE_MASK) != reg_base)
665 			return -ERANGE;
666 	}
667 	win_off = BNXT_GRCPF_REG_WINDOW_BASE_OUT + (reg_win - 1) * 4;
668 	writel(reg_base, bp->bar0 + win_off);
669 	return 0;
670 }
671 
bnxt_map_ptp_regs(struct bnxt * bp)672 static int bnxt_map_ptp_regs(struct bnxt *bp)
673 {
674 	struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
675 	u32 *reg_arr;
676 	int rc, i;
677 
678 	reg_arr = ptp->refclk_regs;
679 	if (BNXT_CHIP_P5(bp)) {
680 		rc = bnxt_map_regs(bp, reg_arr, 2, BNXT_PTP_GRC_WIN);
681 		if (rc)
682 			return rc;
683 		for (i = 0; i < 2; i++)
684 			ptp->refclk_mapped_regs[i] = BNXT_PTP_GRC_WIN_BASE +
685 				(ptp->refclk_regs[i] & BNXT_GRC_OFFSET_MASK);
686 		return 0;
687 	}
688 	if (bp->flags & BNXT_FLAG_CHIP_P7) {
689 		for (i = 0; i < 2; i++) {
690 			if (reg_arr[i] & BNXT_GRC_BASE_MASK)
691 				return -EINVAL;
692 			ptp->refclk_mapped_regs[i] = reg_arr[i];
693 		}
694 		return 0;
695 	}
696 	return -ENODEV;
697 }
698 
bnxt_unmap_ptp_regs(struct bnxt * bp)699 static void bnxt_unmap_ptp_regs(struct bnxt *bp)
700 {
701 	writel(0, bp->bar0 + BNXT_GRCPF_REG_WINDOW_BASE_OUT +
702 		  (BNXT_PTP_GRC_WIN - 1) * 4);
703 }
704 
bnxt_cc_read(const struct cyclecounter * cc)705 static u64 bnxt_cc_read(const struct cyclecounter *cc)
706 {
707 	struct bnxt_ptp_cfg *ptp = container_of(cc, struct bnxt_ptp_cfg, cc);
708 	u64 ns = 0;
709 
710 	__bnxt_refclk_read(ptp->bp, NULL, &ns);
711 	return ns;
712 }
713 
bnxt_stamp_tx_skb(struct bnxt * bp,int slot)714 static int bnxt_stamp_tx_skb(struct bnxt *bp, int slot)
715 {
716 	struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
717 	struct skb_shared_hwtstamps timestamp;
718 	struct bnxt_ptp_tx_req *txts_req;
719 	unsigned long now = jiffies;
720 	u64 ts = 0, ns = 0;
721 	u32 tmo = 0;
722 	int rc;
723 
724 	txts_req = &ptp->txts_req[slot];
725 	/* make sure bnxt_get_tx_ts_p5() has updated abs_txts_tmo */
726 	smp_rmb();
727 	if (!time_after_eq(now, txts_req->abs_txts_tmo))
728 		tmo = jiffies_to_msecs(txts_req->abs_txts_tmo - now);
729 	rc = bnxt_hwrm_port_ts_query(bp, PORT_TS_QUERY_REQ_FLAGS_PATH_TX, &ts,
730 				     tmo, slot);
731 	if (!rc) {
732 		memset(&timestamp, 0, sizeof(timestamp));
733 		ns = bnxt_timecounter_cyc2time(ptp, ts);
734 		timestamp.hwtstamp = ns_to_ktime(ns);
735 		skb_tstamp_tx(txts_req->tx_skb, &timestamp);
736 		ptp->stats.ts_pkts++;
737 	} else {
738 		if (!time_after_eq(jiffies, txts_req->abs_txts_tmo))
739 			return -EAGAIN;
740 
741 		ptp->stats.ts_lost++;
742 		netdev_warn_once(bp->dev,
743 				 "TS query for TX timer failed rc = %x\n", rc);
744 	}
745 
746 	dev_kfree_skb_any(txts_req->tx_skb);
747 	txts_req->tx_skb = NULL;
748 
749 	return 0;
750 }
751 
bnxt_ptp_ts_aux_work(struct ptp_clock_info * ptp_info)752 static long bnxt_ptp_ts_aux_work(struct ptp_clock_info *ptp_info)
753 {
754 	struct bnxt_ptp_cfg *ptp = container_of(ptp_info, struct bnxt_ptp_cfg,
755 						ptp_info);
756 	unsigned long now = jiffies;
757 	struct bnxt *bp = ptp->bp;
758 	u16 cons = ptp->txts_cons;
759 	unsigned long flags;
760 	u32 num_requests;
761 	int rc = 0;
762 
763 	num_requests = BNXT_MAX_TX_TS - READ_ONCE(ptp->tx_avail);
764 	while (num_requests--) {
765 		if (IS_ERR(ptp->txts_req[cons].tx_skb))
766 			goto next_slot;
767 		if (!ptp->txts_req[cons].tx_skb)
768 			break;
769 		rc = bnxt_stamp_tx_skb(bp, cons);
770 		if (rc == -EAGAIN)
771 			break;
772 next_slot:
773 		BNXT_PTP_INC_TX_AVAIL(ptp);
774 		cons = NEXT_TXTS(cons);
775 	}
776 	ptp->txts_cons = cons;
777 
778 	if (!time_after_eq(now, ptp->next_period)) {
779 		if (rc == -EAGAIN)
780 			return 0;
781 		return ptp->next_period - now;
782 	}
783 
784 	bnxt_ptp_get_current_time(bp);
785 	ptp->next_period = now + HZ;
786 	if (time_after_eq(now, ptp->next_overflow_check)) {
787 		write_seqlock_irqsave(&ptp->ptp_lock, flags);
788 		timecounter_read(&ptp->tc);
789 		write_sequnlock_irqrestore(&ptp->ptp_lock, flags);
790 		ptp->next_overflow_check = now + BNXT_PHC_OVERFLOW_PERIOD;
791 	}
792 	if (rc == -EAGAIN)
793 		return 0;
794 	return HZ;
795 }
796 
bnxt_ptp_get_txts_prod(struct bnxt_ptp_cfg * ptp,u16 * prod)797 int bnxt_ptp_get_txts_prod(struct bnxt_ptp_cfg *ptp, u16 *prod)
798 {
799 	spin_lock_bh(&ptp->ptp_tx_lock);
800 	if (ptp->tx_avail) {
801 		*prod = ptp->txts_prod;
802 		ptp->txts_prod = NEXT_TXTS(*prod);
803 		ptp->tx_avail--;
804 		spin_unlock_bh(&ptp->ptp_tx_lock);
805 		return 0;
806 	}
807 	spin_unlock_bh(&ptp->ptp_tx_lock);
808 	atomic64_inc(&ptp->stats.ts_err);
809 	return -ENOSPC;
810 }
811 
bnxt_get_tx_ts_p5(struct bnxt * bp,struct sk_buff * skb,u16 prod)812 void bnxt_get_tx_ts_p5(struct bnxt *bp, struct sk_buff *skb, u16 prod)
813 {
814 	struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
815 	struct bnxt_ptp_tx_req *txts_req;
816 
817 	txts_req = &ptp->txts_req[prod];
818 	txts_req->abs_txts_tmo = jiffies + msecs_to_jiffies(ptp->txts_tmo);
819 	/* make sure abs_txts_tmo is written first */
820 	smp_wmb();
821 	txts_req->tx_skb = skb;
822 	ptp_schedule_worker(ptp->ptp_clock, 0);
823 }
824 
bnxt_get_rx_ts_p5(struct bnxt * bp,u64 * ts,u32 pkt_ts)825 int bnxt_get_rx_ts_p5(struct bnxt *bp, u64 *ts, u32 pkt_ts)
826 {
827 	struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
828 
829 	if (!ptp)
830 		return -ENODEV;
831 
832 	*ts = bnxt_extend_cycles_32b_to_48b(ptp, pkt_ts);
833 
834 	return 0;
835 }
836 
bnxt_tx_ts_cmp(struct bnxt * bp,struct bnxt_napi * bnapi,struct tx_ts_cmp * tscmp)837 void bnxt_tx_ts_cmp(struct bnxt *bp, struct bnxt_napi *bnapi,
838 		    struct tx_ts_cmp *tscmp)
839 {
840 	struct skb_shared_hwtstamps timestamp = {};
841 	struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
842 	u32 opaque = tscmp->tx_ts_cmp_opaque;
843 	struct bnxt_tx_ring_info *txr;
844 	struct bnxt_sw_tx_bd *tx_buf;
845 	u64 ts, ns;
846 	u16 cons;
847 
848 	txr = bnapi->tx_ring[TX_OPAQUE_RING(opaque)];
849 	ts = BNXT_GET_TX_TS_48B_NS(tscmp);
850 	cons = TX_OPAQUE_IDX(opaque);
851 	tx_buf = &txr->tx_buf_ring[RING_TX(bp, cons)];
852 	if (tx_buf->is_ts_pkt) {
853 		if (BNXT_TX_TS_ERR(tscmp)) {
854 			netdev_err(bp->dev,
855 				   "timestamp completion error 0x%x 0x%x\n",
856 				   le32_to_cpu(tscmp->tx_ts_cmp_flags_type),
857 				   le32_to_cpu(tscmp->tx_ts_cmp_errors_v));
858 		} else {
859 			ns = bnxt_timecounter_cyc2time(ptp, ts);
860 			timestamp.hwtstamp = ns_to_ktime(ns);
861 			skb_tstamp_tx(tx_buf->skb, &timestamp);
862 		}
863 		tx_buf->is_ts_pkt = 0;
864 	}
865 }
866 
867 static const struct ptp_clock_info bnxt_ptp_caps = {
868 	.owner		= THIS_MODULE,
869 	.name		= "bnxt clock",
870 	.max_adj	= BNXT_MAX_PHC_DRIFT,
871 	.n_alarm	= 0,
872 	.n_ext_ts	= 0,
873 	.n_per_out	= 0,
874 	.n_pins		= 0,
875 	.pps		= 0,
876 	.adjfine	= bnxt_ptp_adjfine,
877 	.adjtime	= bnxt_ptp_adjtime,
878 	.do_aux_work	= bnxt_ptp_ts_aux_work,
879 	.gettimex64	= bnxt_ptp_gettimex,
880 	.settime64	= bnxt_ptp_settime,
881 	.enable		= bnxt_ptp_enable,
882 };
883 
bnxt_ptp_verify(struct ptp_clock_info * ptp_info,unsigned int pin,enum ptp_pin_function func,unsigned int chan)884 static int bnxt_ptp_verify(struct ptp_clock_info *ptp_info, unsigned int pin,
885 			   enum ptp_pin_function func, unsigned int chan)
886 {
887 	struct bnxt_ptp_cfg *ptp = container_of(ptp_info, struct bnxt_ptp_cfg,
888 						ptp_info);
889 	/* Allow only PPS pin function configuration */
890 	if (ptp->pps_info.pins[pin].usage <= BNXT_PPS_PIN_PPS_OUT &&
891 	    func != PTP_PF_PHYSYNC)
892 		return 0;
893 	else
894 		return -EOPNOTSUPP;
895 }
896 
bnxt_ptp_pps_init(struct bnxt * bp)897 static int bnxt_ptp_pps_init(struct bnxt *bp)
898 {
899 	struct hwrm_func_ptp_pin_qcfg_output *resp;
900 	struct hwrm_func_ptp_pin_qcfg_input *req;
901 	struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
902 	struct ptp_clock_info *ptp_info;
903 	struct bnxt_pps *pps_info;
904 	u8 *pin_usg;
905 	u32 i, rc;
906 
907 	/* Query current/default PIN CFG */
908 	rc = hwrm_req_init(bp, req, HWRM_FUNC_PTP_PIN_QCFG);
909 	if (rc)
910 		return rc;
911 
912 	resp = hwrm_req_hold(bp, req);
913 	rc = hwrm_req_send(bp, req);
914 	if (rc || !resp->num_pins) {
915 		hwrm_req_drop(bp, req);
916 		return -EOPNOTSUPP;
917 	}
918 
919 	ptp_info = &ptp->ptp_info;
920 	pps_info = &ptp->pps_info;
921 	pps_info->num_pins = resp->num_pins;
922 	ptp_info->n_pins = pps_info->num_pins;
923 	ptp_info->pin_config = kcalloc(ptp_info->n_pins,
924 				       sizeof(*ptp_info->pin_config),
925 				       GFP_KERNEL);
926 	if (!ptp_info->pin_config) {
927 		hwrm_req_drop(bp, req);
928 		return -ENOMEM;
929 	}
930 
931 	/* Report the TSIO capability to kernel */
932 	pin_usg = &resp->pin0_usage;
933 	for (i = 0; i < pps_info->num_pins; i++, pin_usg++) {
934 		snprintf(ptp_info->pin_config[i].name,
935 			 sizeof(ptp_info->pin_config[i].name), "bnxt_pps%d", i);
936 		ptp_info->pin_config[i].index = i;
937 		ptp_info->pin_config[i].chan = i;
938 		if (*pin_usg == BNXT_PPS_PIN_PPS_IN)
939 			ptp_info->pin_config[i].func = PTP_PF_EXTTS;
940 		else if (*pin_usg == BNXT_PPS_PIN_PPS_OUT)
941 			ptp_info->pin_config[i].func = PTP_PF_PEROUT;
942 		else
943 			ptp_info->pin_config[i].func = PTP_PF_NONE;
944 
945 		pps_info->pins[i].usage = *pin_usg;
946 	}
947 	hwrm_req_drop(bp, req);
948 
949 	/* Only 1 each of ext_ts and per_out pins is available in HW */
950 	ptp_info->n_ext_ts = 1;
951 	ptp_info->n_per_out = 1;
952 	ptp_info->pps = 1;
953 	ptp_info->verify = bnxt_ptp_verify;
954 
955 	return 0;
956 }
957 
bnxt_pps_config_ok(struct bnxt * bp)958 static bool bnxt_pps_config_ok(struct bnxt *bp)
959 {
960 	struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
961 
962 	return !(bp->fw_cap & BNXT_FW_CAP_PTP_PPS) == !ptp->ptp_info.pin_config;
963 }
964 
bnxt_ptp_timecounter_init(struct bnxt * bp,bool init_tc)965 static void bnxt_ptp_timecounter_init(struct bnxt *bp, bool init_tc)
966 {
967 	struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
968 	unsigned long flags;
969 
970 	if (!ptp->ptp_clock) {
971 		memset(&ptp->cc, 0, sizeof(ptp->cc));
972 		ptp->cc.read = bnxt_cc_read;
973 		ptp->cc.mask = CYCLECOUNTER_MASK(48);
974 		if (BNXT_MH(bp)) {
975 			/* Use timecounter based non-real time mode */
976 			ptp->cc.shift = BNXT_CYCLES_SHIFT;
977 			ptp->cc.mult = clocksource_khz2mult(BNXT_DEVCLK_FREQ, ptp->cc.shift);
978 			ptp->cmult = ptp->cc.mult;
979 		} else {
980 			ptp->cc.shift = 0;
981 			ptp->cc.mult = 1;
982 		}
983 		ptp->next_overflow_check = jiffies + BNXT_PHC_OVERFLOW_PERIOD;
984 	}
985 	if (init_tc) {
986 		write_seqlock_irqsave(&ptp->ptp_lock, flags);
987 		timecounter_init(&ptp->tc, &ptp->cc, ktime_to_ns(ktime_get_real()));
988 		write_sequnlock_irqrestore(&ptp->ptp_lock, flags);
989 	}
990 }
991 
992 /* Caller holds ptp_lock */
bnxt_ptp_rtc_timecounter_init(struct bnxt_ptp_cfg * ptp,u64 ns)993 void bnxt_ptp_rtc_timecounter_init(struct bnxt_ptp_cfg *ptp, u64 ns)
994 {
995 	timecounter_init(&ptp->tc, &ptp->cc, ns);
996 	/* For RTC, cycle_last must be in sync with the timecounter value. */
997 	ptp->tc.cycle_last = ns & ptp->cc.mask;
998 }
999 
bnxt_ptp_init_rtc(struct bnxt * bp,bool phc_cfg)1000 int bnxt_ptp_init_rtc(struct bnxt *bp, bool phc_cfg)
1001 {
1002 	struct timespec64 tsp;
1003 	unsigned long flags;
1004 	u64 ns;
1005 	int rc;
1006 
1007 	if (!bp->ptp_cfg || !BNXT_PTP_USE_RTC(bp))
1008 		return -ENODEV;
1009 
1010 	if (!phc_cfg) {
1011 		ktime_get_real_ts64(&tsp);
1012 		ns = timespec64_to_ns(&tsp);
1013 		rc = bnxt_ptp_cfg_settime(bp, ns);
1014 		if (rc)
1015 			return rc;
1016 	} else {
1017 		rc = bnxt_hwrm_port_ts_query(bp, PORT_TS_QUERY_REQ_FLAGS_CURRENT_TIME,
1018 					     &ns, 0, 0);
1019 		if (rc)
1020 			return rc;
1021 	}
1022 	write_seqlock_irqsave(&bp->ptp_cfg->ptp_lock, flags);
1023 	bnxt_ptp_rtc_timecounter_init(bp->ptp_cfg, ns);
1024 	write_sequnlock_irqrestore(&bp->ptp_cfg->ptp_lock, flags);
1025 
1026 	return 0;
1027 }
1028 
bnxt_ptp_free(struct bnxt * bp)1029 static void bnxt_ptp_free(struct bnxt *bp)
1030 {
1031 	struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
1032 
1033 	if (ptp->ptp_clock) {
1034 		ptp_clock_unregister(ptp->ptp_clock);
1035 		ptp->ptp_clock = NULL;
1036 		kfree(ptp->ptp_info.pin_config);
1037 		ptp->ptp_info.pin_config = NULL;
1038 	}
1039 }
1040 
bnxt_ptp_init(struct bnxt * bp)1041 int bnxt_ptp_init(struct bnxt *bp)
1042 {
1043 	struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
1044 	int rc;
1045 
1046 	if (!ptp)
1047 		return 0;
1048 
1049 	rc = bnxt_map_ptp_regs(bp);
1050 	if (rc)
1051 		return rc;
1052 
1053 	if (ptp->ptp_clock && bnxt_pps_config_ok(bp))
1054 		return 0;
1055 
1056 	bnxt_ptp_free(bp);
1057 
1058 	WRITE_ONCE(ptp->tx_avail, BNXT_MAX_TX_TS);
1059 	seqlock_init(&ptp->ptp_lock);
1060 	spin_lock_init(&ptp->ptp_tx_lock);
1061 
1062 	if (BNXT_PTP_USE_RTC(bp)) {
1063 		bnxt_ptp_timecounter_init(bp, false);
1064 		rc = bnxt_ptp_init_rtc(bp, ptp->rtc_configured);
1065 		if (rc)
1066 			goto out;
1067 	} else {
1068 		bnxt_ptp_timecounter_init(bp, true);
1069 		bnxt_ptp_adjfine_rtc(bp, 0);
1070 	}
1071 	bnxt_hwrm_func_drv_rgtr(bp, NULL, 0, true);
1072 
1073 	ptp->ptp_info = bnxt_ptp_caps;
1074 	if ((bp->fw_cap & BNXT_FW_CAP_PTP_PPS)) {
1075 		if (bnxt_ptp_pps_init(bp))
1076 			netdev_err(bp->dev, "1pps not initialized, continuing without 1pps support\n");
1077 	}
1078 	ptp->ptp_clock = ptp_clock_register(&ptp->ptp_info, &bp->pdev->dev);
1079 	if (IS_ERR(ptp->ptp_clock)) {
1080 		int err = PTR_ERR(ptp->ptp_clock);
1081 
1082 		ptp->ptp_clock = NULL;
1083 		rc = err;
1084 		goto out;
1085 	}
1086 
1087 	ptp->stats.ts_pkts = 0;
1088 	ptp->stats.ts_lost = 0;
1089 	atomic64_set(&ptp->stats.ts_err, 0);
1090 
1091 	if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) {
1092 		bnxt_refclk_read(bp, NULL, &ptp->current_time);
1093 		WRITE_ONCE(ptp->old_time, ptp->current_time >> BNXT_HI_TIMER_SHIFT);
1094 		ptp_schedule_worker(ptp->ptp_clock, 0);
1095 	}
1096 	ptp->txts_tmo = BNXT_PTP_DFLT_TX_TMO;
1097 	return 0;
1098 
1099 out:
1100 	bnxt_ptp_free(bp);
1101 	bnxt_unmap_ptp_regs(bp);
1102 	return rc;
1103 }
1104 
bnxt_ptp_clear(struct bnxt * bp)1105 void bnxt_ptp_clear(struct bnxt *bp)
1106 {
1107 	struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
1108 	int i;
1109 
1110 	if (!ptp)
1111 		return;
1112 
1113 	if (ptp->ptp_clock)
1114 		ptp_clock_unregister(ptp->ptp_clock);
1115 
1116 	ptp->ptp_clock = NULL;
1117 	kfree(ptp->ptp_info.pin_config);
1118 	ptp->ptp_info.pin_config = NULL;
1119 
1120 	for (i = 0; i < BNXT_MAX_TX_TS; i++) {
1121 		if (ptp->txts_req[i].tx_skb) {
1122 			dev_kfree_skb_any(ptp->txts_req[i].tx_skb);
1123 			ptp->txts_req[i].tx_skb = NULL;
1124 		}
1125 	}
1126 
1127 	bnxt_unmap_ptp_regs(bp);
1128 }
1129