1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2
3 #include <linux/bitfield.h>
4 #include <linux/firmware.h>
5 #include <linux/i2c.h>
6 #include <linux/module.h>
7 #include <linux/mutex.h>
8 #include <linux/regmap.h>
9 #include <linux/units.h>
10
11 #include <linux/iio/events.h>
12 #include <linux/iio/iio.h>
13 #include <linux/iio/sysfs.h>
14 #include <linux/iio/trigger.h>
15 #include <linux/iio/triggered_buffer.h>
16 #include <linux/iio/trigger_consumer.h>
17
18 #include "bmi270.h"
19
20 #define BMI270_CHIP_ID_REG 0x00
21
22 /* Checked to prevent sending incompatible firmware to BMI160 devices */
23 #define BMI160_CHIP_ID_VAL 0xD1
24
25 #define BMI260_CHIP_ID_VAL 0x27
26 #define BMI270_CHIP_ID_VAL 0x24
27 #define BMI270_CHIP_ID_MSK GENMASK(7, 0)
28
29 #define BMI270_ACCEL_X_REG 0x0c
30 #define BMI270_ANG_VEL_X_REG 0x12
31
32 #define BMI270_INT_STATUS_0_REG 0x1c
33 #define BMI270_INT_STATUS_0_STEP_CNT_MSK BIT(1)
34 #define BMI270_INT_STATUS_0_NOMOTION_MSK BIT(5)
35 #define BMI270_INT_STATUS_0_MOTION_MSK BIT(6)
36
37 #define BMI270_INT_STATUS_1_REG 0x1d
38 #define BMI270_INT_STATUS_1_ACC_GYR_DRDY_MSK GENMASK(7, 6)
39
40 #define BMI270_SC_OUT_0_REG 0x1e
41
42 #define BMI270_INTERNAL_STATUS_REG 0x21
43 #define BMI270_INTERNAL_STATUS_MSG_MSK GENMASK(3, 0)
44 #define BMI270_INTERNAL_STATUS_MSG_INIT_OK 0x01
45 #define BMI270_INTERNAL_STATUS_AXES_REMAP_ERR_MSK BIT(5)
46 #define BMI270_INTERNAL_STATUS_ODR_50HZ_ERR_MSK BIT(6)
47
48 #define BMI270_TEMPERATURE_0_REG 0x22
49
50 #define BMI270_FEAT_PAGE_REG 0x2f
51
52 #define BMI270_ACC_CONF_REG 0x40
53 #define BMI270_ACC_CONF_ODR_MSK GENMASK(3, 0)
54 #define BMI270_ACC_CONF_ODR_100HZ 0x08
55 #define BMI270_ACC_CONF_BWP_MSK GENMASK(6, 4)
56 #define BMI270_ACC_CONF_BWP_NORMAL_MODE 0x02
57 #define BMI270_ACC_CONF_FILTER_PERF_MSK BIT(7)
58
59 #define BMI270_ACC_CONF_RANGE_REG 0x41
60 #define BMI270_ACC_CONF_RANGE_MSK GENMASK(1, 0)
61
62 #define BMI270_GYR_CONF_REG 0x42
63 #define BMI270_GYR_CONF_ODR_MSK GENMASK(3, 0)
64 #define BMI270_GYR_CONF_ODR_200HZ 0x09
65 #define BMI270_GYR_CONF_BWP_MSK GENMASK(5, 4)
66 #define BMI270_GYR_CONF_BWP_NORMAL_MODE 0x02
67 #define BMI270_GYR_CONF_NOISE_PERF_MSK BIT(6)
68 #define BMI270_GYR_CONF_FILTER_PERF_MSK BIT(7)
69
70 #define BMI270_GYR_CONF_RANGE_REG 0x43
71 #define BMI270_GYR_CONF_RANGE_MSK GENMASK(2, 0)
72
73 #define BMI270_INT1_IO_CTRL_REG 0x53
74 #define BMI270_INT2_IO_CTRL_REG 0x54
75 #define BMI270_INT_IO_CTRL_LVL_MSK BIT(1)
76 #define BMI270_INT_IO_CTRL_OD_MSK BIT(2)
77 #define BMI270_INT_IO_CTRL_OP_MSK BIT(3)
78 #define BMI270_INT_IO_LVL_OD_OP_MSK GENMASK(3, 1)
79
80 #define BMI270_INT_LATCH_REG 0x55
81 #define BMI270_INT_LATCH_REG_MSK BIT(0)
82
83 #define BMI270_INT1_MAP_FEAT_REG 0x56
84 #define BMI270_INT2_MAP_FEAT_REG 0x57
85 #define BMI270_INT_MAP_FEAT_STEP_CNT_WTRMRK_MSK BIT(1)
86 #define BMI270_INT_MAP_FEAT_NOMOTION_MSK BIT(5)
87 #define BMI270_INT_MAP_FEAT_ANYMOTION_MSK BIT(6)
88
89 #define BMI270_INT_MAP_DATA_REG 0x58
90 #define BMI270_INT_MAP_DATA_DRDY_INT1_MSK BIT(2)
91 #define BMI270_INT_MAP_DATA_DRDY_INT2_MSK BIT(6)
92
93 #define BMI270_INIT_CTRL_REG 0x59
94 #define BMI270_INIT_CTRL_LOAD_DONE_MSK BIT(0)
95
96 #define BMI270_INIT_DATA_REG 0x5e
97
98 #define BMI270_PWR_CONF_REG 0x7c
99 #define BMI270_PWR_CONF_ADV_PWR_SAVE_MSK BIT(0)
100 #define BMI270_PWR_CONF_FIFO_WKUP_MSK BIT(1)
101 #define BMI270_PWR_CONF_FUP_EN_MSK BIT(2)
102
103 #define BMI270_PWR_CTRL_REG 0x7d
104 #define BMI270_PWR_CTRL_AUX_EN_MSK BIT(0)
105 #define BMI270_PWR_CTRL_GYR_EN_MSK BIT(1)
106 #define BMI270_PWR_CTRL_ACCEL_EN_MSK BIT(2)
107 #define BMI270_PWR_CTRL_TEMP_EN_MSK BIT(3)
108
109 #define BMI270_STEP_SC26_WTRMRK_MSK GENMASK(9, 0)
110 #define BMI270_STEP_SC26_RST_CNT_MSK BIT(10)
111 #define BMI270_STEP_SC26_EN_CNT_MSK BIT(12)
112
113 #define BMI270_FEAT_MOTION_DURATION_MSK GENMASK(12, 0)
114 #define BMI270_FEAT_MOTION_X_EN_MSK BIT(13)
115 #define BMI270_FEAT_MOTION_Y_EN_MSK BIT(14)
116 #define BMI270_FEAT_MOTION_Z_EN_MSK BIT(15)
117 #define BMI270_FEAT_MOTION_XYZ_EN_MSK GENMASK(15, 13)
118 #define BMI270_FEAT_MOTION_THRESHOLD_MSK GENMASK(10, 0)
119 #define BMI270_FEAT_MOTION_OUT_CONF_MSK GENMASK(14, 11)
120 #define BMI270_FEAT_MOTION_ENABLE_MSK BIT(15)
121
122 #define BMI270_MOTION_XYZ_MSK GENMASK(2, 0)
123
124 /* See pages 92 and 93 of the datasheet */
125 #define BMI270_MOTION_THRES_FULL_SCALE GENMASK(10, 0)
126 #define BMI270_MOTION_DURAT_SCALE 50
127 #define BMI270_MOTION_DURAT_MAX 162
128
129 /* 9.81 * 1000000 m/s^2 */
130 #define BMI270_G_MICRO_M_S_2 9810000
131
132 /* See datasheet section 4.6.14, Temperature Sensor */
133 #define BMI270_TEMP_OFFSET 11776
134 #define BMI270_TEMP_SCALE 1953125
135
136 /* See page 90 of datasheet. The step counter "holds implicitly a 20x factor" */
137 #define BMI270_STEP_COUNTER_FACTOR 20
138 #define BMI270_STEP_COUNTER_MAX 20460
139
140 #define BMI270_INT_MICRO_TO_RAW(val, val2, scale) \
141 ((val) * (scale) + ((val2) * (scale)) / MEGA)
142 #define BMI270_RAW_TO_MICRO(raw, scale) \
143 ((((raw) % (scale)) * MEGA) / scale)
144
145 #define BMI260_INIT_DATA_FILE "bmi260-init-data.fw"
146 #define BMI270_INIT_DATA_FILE "bmi270-init-data.fw"
147
148 enum bmi270_irq_pin {
149 BMI270_IRQ_DISABLED,
150 BMI270_IRQ_INT1,
151 BMI270_IRQ_INT2,
152 };
153
154 struct bmi270_data {
155 struct device *dev;
156 struct regmap *regmap;
157 const struct bmi270_chip_info *chip_info;
158 enum bmi270_irq_pin irq_pin;
159 struct iio_trigger *trig;
160 /* Protect device's private data from concurrent access */
161 struct mutex mutex;
162 bool steps_enabled;
163
164 /*
165 * Where IIO_DMA_MINALIGN may be larger than 8 bytes, align to
166 * that to ensure a DMA safe buffer.
167 */
168 struct {
169 __le16 channels[6];
170 aligned_s64 timestamp;
171 } buffer __aligned(IIO_DMA_MINALIGN);
172 /*
173 * Variable to access feature registers. It can be accessed concurrently
174 * with the 'buffer' variable
175 */
176 __le16 regval __aligned(IIO_DMA_MINALIGN);
177 };
178
179 enum bmi270_scan {
180 BMI270_SCAN_ACCEL_X,
181 BMI270_SCAN_ACCEL_Y,
182 BMI270_SCAN_ACCEL_Z,
183 BMI270_SCAN_GYRO_X,
184 BMI270_SCAN_GYRO_Y,
185 BMI270_SCAN_GYRO_Z,
186 BMI270_SCAN_TIMESTAMP,
187 };
188
189 static const unsigned long bmi270_avail_scan_masks[] = {
190 (BIT(BMI270_SCAN_ACCEL_X) |
191 BIT(BMI270_SCAN_ACCEL_Y) |
192 BIT(BMI270_SCAN_ACCEL_Z) |
193 BIT(BMI270_SCAN_GYRO_X) |
194 BIT(BMI270_SCAN_GYRO_Y) |
195 BIT(BMI270_SCAN_GYRO_Z)),
196 0
197 };
198
199 const struct bmi270_chip_info bmi260_chip_info = {
200 .name = "bmi260",
201 .chip_id = BMI260_CHIP_ID_VAL,
202 .fw_name = BMI260_INIT_DATA_FILE,
203 };
204 EXPORT_SYMBOL_NS_GPL(bmi260_chip_info, "IIO_BMI270");
205
206 const struct bmi270_chip_info bmi270_chip_info = {
207 .name = "bmi270",
208 .chip_id = BMI270_CHIP_ID_VAL,
209 .fw_name = BMI270_INIT_DATA_FILE,
210 };
211 EXPORT_SYMBOL_NS_GPL(bmi270_chip_info, "IIO_BMI270");
212
213 enum bmi270_sensor_type {
214 BMI270_ACCEL = 0,
215 BMI270_GYRO,
216 BMI270_TEMP,
217 };
218
219 struct bmi270_scale {
220 int scale;
221 int uscale;
222 };
223
224 struct bmi270_odr {
225 int odr;
226 int uodr;
227 };
228
229 static const struct bmi270_scale bmi270_accel_scale[] = {
230 { 0, 598 },
231 { 0, 1197 },
232 { 0, 2394 },
233 { 0, 4788 },
234 };
235
236 static const struct bmi270_scale bmi270_gyro_scale[] = {
237 { 0, 1065 },
238 { 0, 532 },
239 { 0, 266 },
240 { 0, 133 },
241 { 0, 66 },
242 };
243
244 static const struct bmi270_scale bmi270_temp_scale[] = {
245 { BMI270_TEMP_SCALE / MICRO, BMI270_TEMP_SCALE % MICRO },
246 };
247
248 struct bmi270_scale_item {
249 const struct bmi270_scale *tbl;
250 int num;
251 };
252
253 static const struct bmi270_scale_item bmi270_scale_table[] = {
254 [BMI270_ACCEL] = {
255 .tbl = bmi270_accel_scale,
256 .num = ARRAY_SIZE(bmi270_accel_scale),
257 },
258 [BMI270_GYRO] = {
259 .tbl = bmi270_gyro_scale,
260 .num = ARRAY_SIZE(bmi270_gyro_scale),
261 },
262 [BMI270_TEMP] = {
263 .tbl = bmi270_temp_scale,
264 .num = ARRAY_SIZE(bmi270_temp_scale),
265 },
266 };
267
268 static const struct bmi270_odr bmi270_accel_odr[] = {
269 { 0, 781250 },
270 { 1, 562500 },
271 { 3, 125000 },
272 { 6, 250000 },
273 { 12, 500000 },
274 { 25, 0 },
275 { 50, 0 },
276 { 100, 0 },
277 { 200, 0 },
278 { 400, 0 },
279 { 800, 0 },
280 { 1600, 0 },
281 };
282
283 static const u8 bmi270_accel_odr_vals[] = {
284 0x01,
285 0x02,
286 0x03,
287 0x04,
288 0x05,
289 0x06,
290 0x07,
291 0x08,
292 0x09,
293 0x0A,
294 0x0B,
295 0x0C,
296 };
297
298 static const struct bmi270_odr bmi270_gyro_odr[] = {
299 { 25, 0 },
300 { 50, 0 },
301 { 100, 0 },
302 { 200, 0 },
303 { 400, 0 },
304 { 800, 0 },
305 { 1600, 0 },
306 { 3200, 0 },
307 };
308
309 static const u8 bmi270_gyro_odr_vals[] = {
310 0x06,
311 0x07,
312 0x08,
313 0x09,
314 0x0A,
315 0x0B,
316 0x0C,
317 0x0D,
318 };
319
320 struct bmi270_odr_item {
321 const struct bmi270_odr *tbl;
322 const u8 *vals;
323 int num;
324 };
325
326 static const struct bmi270_odr_item bmi270_odr_table[] = {
327 [BMI270_ACCEL] = {
328 .tbl = bmi270_accel_odr,
329 .vals = bmi270_accel_odr_vals,
330 .num = ARRAY_SIZE(bmi270_accel_odr),
331 },
332 [BMI270_GYRO] = {
333 .tbl = bmi270_gyro_odr,
334 .vals = bmi270_gyro_odr_vals,
335 .num = ARRAY_SIZE(bmi270_gyro_odr),
336 },
337 };
338
339 enum bmi270_feature_reg_id {
340 /* Page 1 registers */
341 BMI270_ANYMO1_REG,
342 BMI270_ANYMO2_REG,
343 /* Page 2 registers */
344 BMI270_NOMO1_REG,
345 BMI270_NOMO2_REG,
346 /* Page 6 registers */
347 BMI270_SC_26_REG,
348 };
349
350 struct bmi270_feature_reg {
351 u8 page;
352 u8 addr;
353 };
354
355 static const struct bmi270_feature_reg bmi270_feature_regs[] = {
356 [BMI270_ANYMO1_REG] = {
357 .page = 1,
358 .addr = 0x3c,
359 },
360 [BMI270_ANYMO2_REG] = {
361 .page = 1,
362 .addr = 0x3e,
363 },
364 [BMI270_NOMO1_REG] = {
365 .page = 2,
366 .addr = 0x30,
367 },
368 [BMI270_NOMO2_REG] = {
369 .page = 2,
370 .addr = 0x32,
371 },
372 [BMI270_SC_26_REG] = {
373 .page = 6,
374 .addr = 0x32,
375 },
376 };
377
bmi270_write_feature_reg(struct bmi270_data * data,enum bmi270_feature_reg_id id,u16 val)378 static int bmi270_write_feature_reg(struct bmi270_data *data,
379 enum bmi270_feature_reg_id id,
380 u16 val)
381 {
382 const struct bmi270_feature_reg *reg = &bmi270_feature_regs[id];
383 int ret;
384
385 ret = regmap_write(data->regmap, BMI270_FEAT_PAGE_REG, reg->page);
386 if (ret)
387 return ret;
388
389 data->regval = cpu_to_le16(val);
390 return regmap_bulk_write(data->regmap, reg->addr, &data->regval,
391 sizeof(data->regval));
392 }
393
bmi270_read_feature_reg(struct bmi270_data * data,enum bmi270_feature_reg_id id,u16 * val)394 static int bmi270_read_feature_reg(struct bmi270_data *data,
395 enum bmi270_feature_reg_id id,
396 u16 *val)
397 {
398 const struct bmi270_feature_reg *reg = &bmi270_feature_regs[id];
399 int ret;
400
401 ret = regmap_write(data->regmap, BMI270_FEAT_PAGE_REG, reg->page);
402 if (ret)
403 return ret;
404
405 ret = regmap_bulk_read(data->regmap, reg->addr, &data->regval,
406 sizeof(data->regval));
407 if (ret)
408 return ret;
409
410 *val = le16_to_cpu(data->regval);
411 return 0;
412 }
413
bmi270_update_feature_reg(struct bmi270_data * data,enum bmi270_feature_reg_id id,u16 mask,u16 val)414 static int bmi270_update_feature_reg(struct bmi270_data *data,
415 enum bmi270_feature_reg_id id,
416 u16 mask, u16 val)
417 {
418 u16 regval;
419 int ret;
420
421 ret = bmi270_read_feature_reg(data, id, ®val);
422 if (ret)
423 return ret;
424
425 regval = (regval & ~mask) | (val & mask);
426
427 return bmi270_write_feature_reg(data, id, regval);
428 }
429
bmi270_enable_steps(struct bmi270_data * data,int val)430 static int bmi270_enable_steps(struct bmi270_data *data, int val)
431 {
432 int ret;
433
434 guard(mutex)(&data->mutex);
435 if (data->steps_enabled)
436 return 0;
437
438 ret = bmi270_update_feature_reg(data, BMI270_SC_26_REG,
439 BMI270_STEP_SC26_EN_CNT_MSK,
440 FIELD_PREP(BMI270_STEP_SC26_EN_CNT_MSK,
441 val ? 1 : 0));
442 if (ret)
443 return ret;
444
445 data->steps_enabled = true;
446 return 0;
447 }
448
bmi270_read_steps(struct bmi270_data * data,int * val)449 static int bmi270_read_steps(struct bmi270_data *data, int *val)
450 {
451 __le16 steps_count;
452 int ret;
453
454 ret = regmap_bulk_read(data->regmap, BMI270_SC_OUT_0_REG, &steps_count,
455 sizeof(steps_count));
456 if (ret)
457 return ret;
458
459 *val = sign_extend32(le16_to_cpu(steps_count), 15);
460 return IIO_VAL_INT;
461 }
462
bmi270_int_map_reg(enum bmi270_irq_pin pin)463 static int bmi270_int_map_reg(enum bmi270_irq_pin pin)
464 {
465 switch (pin) {
466 case BMI270_IRQ_INT1:
467 return BMI270_INT1_MAP_FEAT_REG;
468 case BMI270_IRQ_INT2:
469 return BMI270_INT2_MAP_FEAT_REG;
470 default:
471 return -EINVAL;
472 }
473 }
474
bmi270_step_wtrmrk_en(struct bmi270_data * data,bool state)475 static int bmi270_step_wtrmrk_en(struct bmi270_data *data, bool state)
476 {
477 int reg;
478
479 guard(mutex)(&data->mutex);
480 if (!data->steps_enabled)
481 return -EINVAL;
482
483 reg = bmi270_int_map_reg(data->irq_pin);
484 if (reg < 0)
485 return reg;
486
487 return regmap_update_bits(data->regmap, reg,
488 BMI270_INT_MAP_FEAT_STEP_CNT_WTRMRK_MSK,
489 FIELD_PREP(BMI270_INT_MAP_FEAT_STEP_CNT_WTRMRK_MSK,
490 state));
491 }
492
bmi270_motion_reg(enum iio_event_type type,enum iio_event_info info)493 static int bmi270_motion_reg(enum iio_event_type type, enum iio_event_info info)
494 {
495 switch (info) {
496 case IIO_EV_INFO_PERIOD:
497 switch (type) {
498 case IIO_EV_TYPE_MAG_ADAPTIVE:
499 return BMI270_ANYMO1_REG;
500 case IIO_EV_TYPE_ROC:
501 return BMI270_NOMO1_REG;
502 default:
503 return -EINVAL;
504 }
505 case IIO_EV_INFO_VALUE:
506 switch (type) {
507 case IIO_EV_TYPE_MAG_ADAPTIVE:
508 return BMI270_ANYMO2_REG;
509 case IIO_EV_TYPE_ROC:
510 return BMI270_NOMO2_REG;
511 default:
512 return -EINVAL;
513 }
514 default:
515 return -EINVAL;
516 }
517 }
518
bmi270_anymotion_event_en(struct bmi270_data * data,struct iio_chan_spec const * chan,bool state)519 static int bmi270_anymotion_event_en(struct bmi270_data *data,
520 struct iio_chan_spec const *chan,
521 bool state)
522 {
523 u16 axis_msk, axis_field_val, regval;
524 int ret, irq_reg;
525 bool axis_en;
526
527 irq_reg = bmi270_int_map_reg(data->irq_pin);
528 if (irq_reg < 0)
529 return irq_reg;
530
531 guard(mutex)(&data->mutex);
532
533 ret = bmi270_read_feature_reg(data, BMI270_ANYMO1_REG, ®val);
534 if (ret)
535 return ret;
536
537 switch (chan->channel2) {
538 case IIO_MOD_X:
539 axis_msk = BMI270_FEAT_MOTION_X_EN_MSK;
540 axis_field_val = FIELD_PREP(BMI270_FEAT_MOTION_X_EN_MSK, state);
541 axis_en = FIELD_GET(BMI270_FEAT_MOTION_Y_EN_MSK, regval) |
542 FIELD_GET(BMI270_FEAT_MOTION_Z_EN_MSK, regval);
543 break;
544 case IIO_MOD_Y:
545 axis_msk = BMI270_FEAT_MOTION_Y_EN_MSK;
546 axis_field_val = FIELD_PREP(BMI270_FEAT_MOTION_Y_EN_MSK, state);
547 axis_en = FIELD_GET(BMI270_FEAT_MOTION_X_EN_MSK, regval) |
548 FIELD_GET(BMI270_FEAT_MOTION_Z_EN_MSK, regval);
549 break;
550 case IIO_MOD_Z:
551 axis_msk = BMI270_FEAT_MOTION_Z_EN_MSK;
552 axis_field_val = FIELD_PREP(BMI270_FEAT_MOTION_Z_EN_MSK, state);
553 axis_en = FIELD_GET(BMI270_FEAT_MOTION_X_EN_MSK, regval) |
554 FIELD_GET(BMI270_FEAT_MOTION_Y_EN_MSK, regval);
555 break;
556 default:
557 return -EINVAL;
558 }
559
560 ret = bmi270_update_feature_reg(data, BMI270_ANYMO1_REG, axis_msk,
561 axis_field_val);
562 if (ret)
563 return ret;
564
565 ret = bmi270_update_feature_reg(data, BMI270_ANYMO2_REG,
566 BMI270_FEAT_MOTION_ENABLE_MSK,
567 FIELD_PREP(BMI270_FEAT_MOTION_ENABLE_MSK,
568 state || axis_en));
569 if (ret)
570 return ret;
571
572 return regmap_update_bits(data->regmap, irq_reg,
573 BMI270_INT_MAP_FEAT_ANYMOTION_MSK,
574 FIELD_PREP(BMI270_INT_MAP_FEAT_ANYMOTION_MSK,
575 state || axis_en));
576 }
577
bmi270_nomotion_event_en(struct bmi270_data * data,bool state)578 static int bmi270_nomotion_event_en(struct bmi270_data *data, bool state)
579 {
580 int ret, irq_reg;
581
582 irq_reg = bmi270_int_map_reg(data->irq_pin);
583 if (irq_reg < 0)
584 return irq_reg;
585
586 guard(mutex)(&data->mutex);
587
588 ret = bmi270_update_feature_reg(data, BMI270_NOMO1_REG,
589 BMI270_FEAT_MOTION_XYZ_EN_MSK,
590 FIELD_PREP(BMI270_FEAT_MOTION_XYZ_EN_MSK,
591 state ? BMI270_MOTION_XYZ_MSK : 0));
592 if (ret)
593 return ret;
594
595 ret = bmi270_update_feature_reg(data, BMI270_NOMO2_REG,
596 BMI270_FEAT_MOTION_ENABLE_MSK,
597 FIELD_PREP(BMI270_FEAT_MOTION_ENABLE_MSK,
598 state));
599 if (ret)
600 return ret;
601
602 return regmap_update_bits(data->regmap, irq_reg,
603 BMI270_INT_MAP_FEAT_NOMOTION_MSK,
604 FIELD_PREP(BMI270_INT_MAP_FEAT_NOMOTION_MSK,
605 state));
606 }
607
bmi270_set_scale(struct bmi270_data * data,int chan_type,int uscale)608 static int bmi270_set_scale(struct bmi270_data *data, int chan_type, int uscale)
609 {
610 int i;
611 int reg, mask;
612 struct bmi270_scale_item bmi270_scale_item;
613
614 switch (chan_type) {
615 case IIO_ACCEL:
616 reg = BMI270_ACC_CONF_RANGE_REG;
617 mask = BMI270_ACC_CONF_RANGE_MSK;
618 bmi270_scale_item = bmi270_scale_table[BMI270_ACCEL];
619 break;
620 case IIO_ANGL_VEL:
621 reg = BMI270_GYR_CONF_RANGE_REG;
622 mask = BMI270_GYR_CONF_RANGE_MSK;
623 bmi270_scale_item = bmi270_scale_table[BMI270_GYRO];
624 break;
625 default:
626 return -EINVAL;
627 }
628
629 guard(mutex)(&data->mutex);
630
631 for (i = 0; i < bmi270_scale_item.num; i++) {
632 if (bmi270_scale_item.tbl[i].uscale != uscale)
633 continue;
634
635 return regmap_update_bits(data->regmap, reg, mask, i);
636 }
637
638 return -EINVAL;
639 }
640
bmi270_get_scale(struct bmi270_data * data,int chan_type,int * scale,int * uscale)641 static int bmi270_get_scale(struct bmi270_data *data, int chan_type, int *scale,
642 int *uscale)
643 {
644 int ret;
645 unsigned int val;
646 struct bmi270_scale_item bmi270_scale_item;
647
648 switch (chan_type) {
649 case IIO_ACCEL:
650 ret = regmap_read(data->regmap, BMI270_ACC_CONF_RANGE_REG, &val);
651 if (ret)
652 return ret;
653
654 val = FIELD_GET(BMI270_ACC_CONF_RANGE_MSK, val);
655 bmi270_scale_item = bmi270_scale_table[BMI270_ACCEL];
656 break;
657 case IIO_ANGL_VEL:
658 ret = regmap_read(data->regmap, BMI270_GYR_CONF_RANGE_REG, &val);
659 if (ret)
660 return ret;
661
662 val = FIELD_GET(BMI270_GYR_CONF_RANGE_MSK, val);
663 bmi270_scale_item = bmi270_scale_table[BMI270_GYRO];
664 break;
665 case IIO_TEMP:
666 val = 0;
667 bmi270_scale_item = bmi270_scale_table[BMI270_TEMP];
668 break;
669 default:
670 return -EINVAL;
671 }
672
673 if (val >= bmi270_scale_item.num)
674 return -EINVAL;
675
676 *scale = bmi270_scale_item.tbl[val].scale;
677 *uscale = bmi270_scale_item.tbl[val].uscale;
678 return 0;
679 }
680
bmi270_set_odr(struct bmi270_data * data,int chan_type,int odr,int uodr)681 static int bmi270_set_odr(struct bmi270_data *data, int chan_type, int odr,
682 int uodr)
683 {
684 int i;
685 int reg, mask;
686 struct bmi270_odr_item bmi270_odr_item;
687
688 switch (chan_type) {
689 case IIO_ACCEL:
690 reg = BMI270_ACC_CONF_REG;
691 mask = BMI270_ACC_CONF_ODR_MSK;
692 bmi270_odr_item = bmi270_odr_table[BMI270_ACCEL];
693 break;
694 case IIO_ANGL_VEL:
695 reg = BMI270_GYR_CONF_REG;
696 mask = BMI270_GYR_CONF_ODR_MSK;
697 bmi270_odr_item = bmi270_odr_table[BMI270_GYRO];
698 break;
699 default:
700 return -EINVAL;
701 }
702
703 guard(mutex)(&data->mutex);
704
705 for (i = 0; i < bmi270_odr_item.num; i++) {
706 if (bmi270_odr_item.tbl[i].odr != odr ||
707 bmi270_odr_item.tbl[i].uodr != uodr)
708 continue;
709
710 return regmap_update_bits(data->regmap, reg, mask,
711 bmi270_odr_item.vals[i]);
712 }
713
714 return -EINVAL;
715 }
716
bmi270_get_odr(struct bmi270_data * data,int chan_type,int * odr,int * uodr)717 static int bmi270_get_odr(struct bmi270_data *data, int chan_type, int *odr,
718 int *uodr)
719 {
720 int i, val, ret;
721 struct bmi270_odr_item bmi270_odr_item;
722
723 guard(mutex)(&data->mutex);
724
725 switch (chan_type) {
726 case IIO_ACCEL:
727 ret = regmap_read(data->regmap, BMI270_ACC_CONF_REG, &val);
728 if (ret)
729 return ret;
730
731 val = FIELD_GET(BMI270_ACC_CONF_ODR_MSK, val);
732 bmi270_odr_item = bmi270_odr_table[BMI270_ACCEL];
733 break;
734 case IIO_ANGL_VEL:
735 ret = regmap_read(data->regmap, BMI270_GYR_CONF_REG, &val);
736 if (ret)
737 return ret;
738
739 val = FIELD_GET(BMI270_GYR_CONF_ODR_MSK, val);
740 bmi270_odr_item = bmi270_odr_table[BMI270_GYRO];
741 break;
742 default:
743 return -EINVAL;
744 }
745
746 for (i = 0; i < bmi270_odr_item.num; i++) {
747 if (val != bmi270_odr_item.vals[i])
748 continue;
749
750 *odr = bmi270_odr_item.tbl[i].odr;
751 *uodr = bmi270_odr_item.tbl[i].uodr;
752 return 0;
753 }
754
755 return -EINVAL;
756 }
757
bmi270_irq_thread_handler(int irq,void * private)758 static irqreturn_t bmi270_irq_thread_handler(int irq, void *private)
759 {
760 struct iio_dev *indio_dev = private;
761 struct bmi270_data *data = iio_priv(indio_dev);
762 unsigned int status0, status1;
763 s64 timestamp = iio_get_time_ns(indio_dev);
764 int ret;
765
766 scoped_guard(mutex, &data->mutex) {
767 ret = regmap_read(data->regmap, BMI270_INT_STATUS_0_REG,
768 &status0);
769 if (ret)
770 return IRQ_NONE;
771
772 ret = regmap_read(data->regmap, BMI270_INT_STATUS_1_REG,
773 &status1);
774 if (ret)
775 return IRQ_NONE;
776 }
777
778 if (FIELD_GET(BMI270_INT_STATUS_1_ACC_GYR_DRDY_MSK, status1))
779 iio_trigger_poll_nested(data->trig);
780
781 if (FIELD_GET(BMI270_INT_STATUS_0_MOTION_MSK, status0))
782 iio_push_event(indio_dev, IIO_MOD_EVENT_CODE(IIO_ACCEL, 0,
783 IIO_MOD_X_OR_Y_OR_Z,
784 IIO_EV_TYPE_MAG_ADAPTIVE,
785 IIO_EV_DIR_RISING),
786 timestamp);
787
788 if (FIELD_GET(BMI270_INT_STATUS_0_NOMOTION_MSK, status0))
789 iio_push_event(indio_dev, IIO_MOD_EVENT_CODE(IIO_ACCEL, 0,
790 IIO_MOD_X_AND_Y_AND_Z,
791 IIO_EV_TYPE_ROC,
792 IIO_EV_DIR_RISING),
793 timestamp);
794
795 if (FIELD_GET(BMI270_INT_STATUS_0_STEP_CNT_MSK, status0))
796 iio_push_event(indio_dev, IIO_UNMOD_EVENT_CODE(IIO_STEPS, 0,
797 IIO_EV_TYPE_CHANGE,
798 IIO_EV_DIR_NONE),
799 timestamp);
800
801 return IRQ_HANDLED;
802 }
803
bmi270_data_rdy_trigger_set_state(struct iio_trigger * trig,bool state)804 static int bmi270_data_rdy_trigger_set_state(struct iio_trigger *trig,
805 bool state)
806 {
807 struct bmi270_data *data = iio_trigger_get_drvdata(trig);
808 unsigned int field_value = 0;
809 unsigned int mask;
810
811 guard(mutex)(&data->mutex);
812
813 switch (data->irq_pin) {
814 case BMI270_IRQ_INT1:
815 mask = BMI270_INT_MAP_DATA_DRDY_INT1_MSK;
816 set_mask_bits(&field_value, BMI270_INT_MAP_DATA_DRDY_INT1_MSK,
817 FIELD_PREP(BMI270_INT_MAP_DATA_DRDY_INT1_MSK,
818 state));
819 break;
820 case BMI270_IRQ_INT2:
821 mask = BMI270_INT_MAP_DATA_DRDY_INT2_MSK;
822 set_mask_bits(&field_value, BMI270_INT_MAP_DATA_DRDY_INT2_MSK,
823 FIELD_PREP(BMI270_INT_MAP_DATA_DRDY_INT2_MSK,
824 state));
825 break;
826 default:
827 return -EINVAL;
828 }
829
830 return regmap_update_bits(data->regmap, BMI270_INT_MAP_DATA_REG, mask,
831 field_value);
832 }
833
834 static const struct iio_trigger_ops bmi270_trigger_ops = {
835 .set_trigger_state = &bmi270_data_rdy_trigger_set_state,
836 };
837
bmi270_trigger_handler(int irq,void * p)838 static irqreturn_t bmi270_trigger_handler(int irq, void *p)
839 {
840 struct iio_poll_func *pf = p;
841 struct iio_dev *indio_dev = pf->indio_dev;
842 struct bmi270_data *data = iio_priv(indio_dev);
843 int ret;
844
845 guard(mutex)(&data->mutex);
846
847 ret = regmap_bulk_read(data->regmap, BMI270_ACCEL_X_REG,
848 &data->buffer.channels,
849 sizeof(data->buffer.channels));
850
851 if (ret)
852 goto done;
853
854 iio_push_to_buffers_with_timestamp(indio_dev, &data->buffer,
855 pf->timestamp);
856 done:
857 iio_trigger_notify_done(indio_dev->trig);
858 return IRQ_HANDLED;
859 }
860
bmi270_get_data(struct bmi270_data * data,int chan_type,int axis,int * val)861 static int bmi270_get_data(struct bmi270_data *data, int chan_type, int axis,
862 int *val)
863 {
864 __le16 sample;
865 int reg;
866 int ret;
867
868 switch (chan_type) {
869 case IIO_ACCEL:
870 reg = BMI270_ACCEL_X_REG + (axis - IIO_MOD_X) * 2;
871 break;
872 case IIO_ANGL_VEL:
873 reg = BMI270_ANG_VEL_X_REG + (axis - IIO_MOD_X) * 2;
874 break;
875 case IIO_TEMP:
876 reg = BMI270_TEMPERATURE_0_REG;
877 break;
878 default:
879 return -EINVAL;
880 }
881
882 guard(mutex)(&data->mutex);
883
884 ret = regmap_bulk_read(data->regmap, reg, &sample, sizeof(sample));
885 if (ret)
886 return ret;
887
888 *val = sign_extend32(le16_to_cpu(sample), 15);
889
890 return IIO_VAL_INT;
891 }
892
bmi270_read_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int * val,int * val2,long mask)893 static int bmi270_read_raw(struct iio_dev *indio_dev,
894 struct iio_chan_spec const *chan,
895 int *val, int *val2, long mask)
896 {
897 int ret;
898 struct bmi270_data *data = iio_priv(indio_dev);
899
900 switch (mask) {
901 case IIO_CHAN_INFO_PROCESSED:
902 return bmi270_read_steps(data, val);
903 case IIO_CHAN_INFO_RAW:
904 if (!iio_device_claim_direct(indio_dev))
905 return -EBUSY;
906 ret = bmi270_get_data(data, chan->type, chan->channel2, val);
907 iio_device_release_direct(indio_dev);
908 return ret;
909 case IIO_CHAN_INFO_SCALE:
910 ret = bmi270_get_scale(data, chan->type, val, val2);
911 return ret ? ret : IIO_VAL_INT_PLUS_MICRO;
912 case IIO_CHAN_INFO_OFFSET:
913 switch (chan->type) {
914 case IIO_TEMP:
915 *val = BMI270_TEMP_OFFSET;
916 return IIO_VAL_INT;
917 default:
918 return -EINVAL;
919 }
920 case IIO_CHAN_INFO_SAMP_FREQ:
921 ret = bmi270_get_odr(data, chan->type, val, val2);
922 return ret ? ret : IIO_VAL_INT_PLUS_MICRO;
923 case IIO_CHAN_INFO_ENABLE:
924 *val = data->steps_enabled ? 1 : 0;
925 return IIO_VAL_INT;
926 default:
927 return -EINVAL;
928 }
929 }
930
bmi270_write_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int val,int val2,long mask)931 static int bmi270_write_raw(struct iio_dev *indio_dev,
932 struct iio_chan_spec const *chan,
933 int val, int val2, long mask)
934 {
935 struct bmi270_data *data = iio_priv(indio_dev);
936 int ret;
937
938 switch (mask) {
939 case IIO_CHAN_INFO_SCALE:
940 if (!iio_device_claim_direct(indio_dev))
941 return -EBUSY;
942 ret = bmi270_set_scale(data, chan->type, val2);
943 iio_device_release_direct(indio_dev);
944 return ret;
945 case IIO_CHAN_INFO_SAMP_FREQ:
946 if (!iio_device_claim_direct(indio_dev))
947 return -EBUSY;
948 ret = bmi270_set_odr(data, chan->type, val, val2);
949 iio_device_release_direct(indio_dev);
950 return ret;
951 case IIO_CHAN_INFO_ENABLE:
952 return bmi270_enable_steps(data, val);
953 case IIO_CHAN_INFO_PROCESSED: {
954 if (val || !data->steps_enabled)
955 return -EINVAL;
956
957 guard(mutex)(&data->mutex);
958 /* Clear step counter value */
959 return bmi270_update_feature_reg(data, BMI270_SC_26_REG,
960 BMI270_STEP_SC26_RST_CNT_MSK,
961 FIELD_PREP(BMI270_STEP_SC26_RST_CNT_MSK,
962 1));
963 }
964 default:
965 return -EINVAL;
966 }
967 }
968
bmi270_read_avail(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,const int ** vals,int * type,int * length,long mask)969 static int bmi270_read_avail(struct iio_dev *indio_dev,
970 struct iio_chan_spec const *chan,
971 const int **vals, int *type, int *length,
972 long mask)
973 {
974 switch (mask) {
975 case IIO_CHAN_INFO_SCALE:
976 *type = IIO_VAL_INT_PLUS_MICRO;
977 switch (chan->type) {
978 case IIO_ANGL_VEL:
979 *vals = (const int *)bmi270_gyro_scale;
980 *length = ARRAY_SIZE(bmi270_gyro_scale) * 2;
981 return IIO_AVAIL_LIST;
982 case IIO_ACCEL:
983 *vals = (const int *)bmi270_accel_scale;
984 *length = ARRAY_SIZE(bmi270_accel_scale) * 2;
985 return IIO_AVAIL_LIST;
986 default:
987 return -EINVAL;
988 }
989 case IIO_CHAN_INFO_SAMP_FREQ:
990 *type = IIO_VAL_INT_PLUS_MICRO;
991 switch (chan->type) {
992 case IIO_ANGL_VEL:
993 *vals = (const int *)bmi270_gyro_odr;
994 *length = ARRAY_SIZE(bmi270_gyro_odr) * 2;
995 return IIO_AVAIL_LIST;
996 case IIO_ACCEL:
997 *vals = (const int *)bmi270_accel_odr;
998 *length = ARRAY_SIZE(bmi270_accel_odr) * 2;
999 return IIO_AVAIL_LIST;
1000 default:
1001 return -EINVAL;
1002 }
1003 default:
1004 return -EINVAL;
1005 }
1006 }
1007
in_accel_value_available_show(struct device * dev,struct device_attribute * attr,char * buf)1008 static ssize_t in_accel_value_available_show(struct device *dev,
1009 struct device_attribute *attr,
1010 char *buf)
1011 {
1012 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
1013 struct bmi270_data *data = iio_priv(indio_dev);
1014 int ret, scale, uscale;
1015 unsigned int step, max;
1016
1017 ret = bmi270_get_scale(data, IIO_ACCEL, &scale, &uscale);
1018 if (ret)
1019 return ret;
1020
1021 max = BMI270_G_MICRO_M_S_2 / uscale;
1022 step = max / BMI270_MOTION_THRES_FULL_SCALE;
1023
1024 return sysfs_emit(buf, "[0 %u %u]\n", step, max);
1025 }
1026
1027 static IIO_DEVICE_ATTR_RO(in_accel_value_available, 0);
1028
1029 static IIO_CONST_ATTR(in_accel_period_available, "[0.0 0.02 162.0]");
1030
1031 static struct attribute *bmi270_event_attributes[] = {
1032 &iio_dev_attr_in_accel_value_available.dev_attr.attr,
1033 &iio_const_attr_in_accel_period_available.dev_attr.attr,
1034 NULL
1035 };
1036
1037 static const struct attribute_group bmi270_event_attribute_group = {
1038 .attrs = bmi270_event_attributes,
1039 };
1040
bmi270_write_event_config(struct iio_dev * indio_dev,const struct iio_chan_spec * chan,enum iio_event_type type,enum iio_event_direction dir,bool state)1041 static int bmi270_write_event_config(struct iio_dev *indio_dev,
1042 const struct iio_chan_spec *chan,
1043 enum iio_event_type type,
1044 enum iio_event_direction dir, bool state)
1045 {
1046 struct bmi270_data *data = iio_priv(indio_dev);
1047
1048 switch (type) {
1049 case IIO_EV_TYPE_MAG_ADAPTIVE:
1050 return bmi270_anymotion_event_en(data, chan, state);
1051 case IIO_EV_TYPE_ROC:
1052 return bmi270_nomotion_event_en(data, state);
1053 case IIO_EV_TYPE_CHANGE:
1054 return bmi270_step_wtrmrk_en(data, state);
1055 default:
1056 return -EINVAL;
1057 }
1058 }
1059
bmi270_read_event_config(struct iio_dev * indio_dev,const struct iio_chan_spec * chan,enum iio_event_type type,enum iio_event_direction dir)1060 static int bmi270_read_event_config(struct iio_dev *indio_dev,
1061 const struct iio_chan_spec *chan,
1062 enum iio_event_type type,
1063 enum iio_event_direction dir)
1064 {
1065 struct bmi270_data *data = iio_priv(indio_dev);
1066 bool feat_en, axis_en;
1067 int ret, reg, regval;
1068 u16 motion_reg;
1069
1070 guard(mutex)(&data->mutex);
1071
1072 reg = bmi270_int_map_reg(data->irq_pin);
1073 if (reg < 0)
1074 return reg;
1075
1076 ret = regmap_read(data->regmap, reg, ®val);
1077 if (ret)
1078 return ret;
1079
1080 switch (chan->type) {
1081 case IIO_STEPS:
1082 return !!FIELD_GET(BMI270_INT_MAP_FEAT_STEP_CNT_WTRMRK_MSK, regval);
1083 case IIO_ACCEL:
1084 switch (type) {
1085 case IIO_EV_TYPE_ROC:
1086 return !!FIELD_GET(BMI270_INT_MAP_FEAT_NOMOTION_MSK, regval);
1087 case IIO_EV_TYPE_MAG_ADAPTIVE:
1088 ret = bmi270_read_feature_reg(data, BMI270_ANYMO1_REG,
1089 &motion_reg);
1090 if (ret)
1091 return ret;
1092
1093 feat_en = FIELD_GET(BMI270_INT_MAP_FEAT_ANYMOTION_MSK,
1094 regval);
1095 switch (chan->channel2) {
1096 case IIO_MOD_X:
1097 axis_en = FIELD_GET(BMI270_FEAT_MOTION_X_EN_MSK,
1098 motion_reg);
1099 break;
1100 case IIO_MOD_Y:
1101 axis_en = FIELD_GET(BMI270_FEAT_MOTION_Y_EN_MSK,
1102 motion_reg);
1103 break;
1104 case IIO_MOD_Z:
1105 axis_en = FIELD_GET(BMI270_FEAT_MOTION_Z_EN_MSK,
1106 motion_reg);
1107 break;
1108 default:
1109 return -EINVAL;
1110 }
1111 return axis_en && feat_en;
1112 default:
1113 return -EINVAL;
1114 }
1115 default:
1116 return -EINVAL;
1117 }
1118 }
1119
bmi270_write_event_value(struct iio_dev * indio_dev,const struct iio_chan_spec * chan,enum iio_event_type type,enum iio_event_direction dir,enum iio_event_info info,int val,int val2)1120 static int bmi270_write_event_value(struct iio_dev *indio_dev,
1121 const struct iio_chan_spec *chan,
1122 enum iio_event_type type,
1123 enum iio_event_direction dir,
1124 enum iio_event_info info,
1125 int val, int val2)
1126 {
1127 struct bmi270_data *data = iio_priv(indio_dev);
1128 unsigned int raw, mask, regval;
1129 int ret, reg, scale, uscale;
1130 u64 tmp;
1131
1132 guard(mutex)(&data->mutex);
1133
1134 if (type == IIO_EV_TYPE_CHANGE) {
1135 if (!in_range(val, 0, BMI270_STEP_COUNTER_MAX + 1))
1136 return -EINVAL;
1137
1138 raw = val / BMI270_STEP_COUNTER_FACTOR;
1139 mask = BMI270_STEP_SC26_WTRMRK_MSK;
1140 regval = FIELD_PREP(BMI270_STEP_SC26_WTRMRK_MSK, raw);
1141 return bmi270_update_feature_reg(data, BMI270_SC_26_REG, mask,
1142 regval);
1143 }
1144
1145 reg = bmi270_motion_reg(type, info);
1146 if (reg < 0)
1147 return reg;
1148
1149 switch (info) {
1150 case IIO_EV_INFO_VALUE:
1151 ret = bmi270_get_scale(data, IIO_ACCEL, &scale, &uscale);
1152 if (ret)
1153 return ret;
1154
1155 if (!in_range(val, 0, (BMI270_G_MICRO_M_S_2 / uscale) + 1))
1156 return -EINVAL;
1157
1158 tmp = (u64)val * BMI270_MOTION_THRES_FULL_SCALE * uscale;
1159 raw = DIV_ROUND_CLOSEST_ULL(tmp, BMI270_G_MICRO_M_S_2);
1160 mask = BMI270_FEAT_MOTION_THRESHOLD_MSK;
1161 regval = FIELD_PREP(BMI270_FEAT_MOTION_THRESHOLD_MSK, raw);
1162 return bmi270_update_feature_reg(data, reg, mask, regval);
1163 case IIO_EV_INFO_PERIOD:
1164 if (!in_range(val, 0, BMI270_MOTION_DURAT_MAX + 1))
1165 return -EINVAL;
1166
1167 raw = BMI270_INT_MICRO_TO_RAW(val, val2,
1168 BMI270_MOTION_DURAT_SCALE);
1169 mask = BMI270_FEAT_MOTION_DURATION_MSK;
1170 regval = FIELD_PREP(BMI270_FEAT_MOTION_DURATION_MSK, raw);
1171 return bmi270_update_feature_reg(data, reg, mask, regval);
1172 default:
1173 return -EINVAL;
1174 }
1175 }
1176
bmi270_read_event_value(struct iio_dev * indio_dev,const struct iio_chan_spec * chan,enum iio_event_type type,enum iio_event_direction dir,enum iio_event_info info,int * val,int * val2)1177 static int bmi270_read_event_value(struct iio_dev *indio_dev,
1178 const struct iio_chan_spec *chan,
1179 enum iio_event_type type,
1180 enum iio_event_direction dir,
1181 enum iio_event_info info,
1182 int *val, int *val2)
1183 {
1184 struct bmi270_data *data = iio_priv(indio_dev);
1185 int ret, reg, scale, uscale;
1186 unsigned int raw;
1187 u16 regval;
1188 u64 tmp;
1189
1190 guard(mutex)(&data->mutex);
1191
1192 if (type == IIO_EV_TYPE_CHANGE) {
1193 ret = bmi270_read_feature_reg(data, BMI270_SC_26_REG, ®val);
1194 if (ret)
1195 return ret;
1196
1197 raw = FIELD_GET(BMI270_STEP_SC26_WTRMRK_MSK, regval);
1198 *val = raw * BMI270_STEP_COUNTER_FACTOR;
1199 return IIO_VAL_INT;
1200 }
1201
1202 reg = bmi270_motion_reg(type, info);
1203 if (reg < 0)
1204 return reg;
1205
1206 switch (info) {
1207 case IIO_EV_INFO_VALUE:
1208 ret = bmi270_read_feature_reg(data, reg, ®val);
1209 if (ret)
1210 return ret;
1211
1212 ret = bmi270_get_scale(data, IIO_ACCEL, &scale, &uscale);
1213 if (ret)
1214 return ret;
1215
1216 raw = FIELD_GET(BMI270_FEAT_MOTION_THRESHOLD_MSK, regval);
1217 tmp = (u64)raw * BMI270_G_MICRO_M_S_2;
1218 *val = DIV_ROUND_CLOSEST_ULL(tmp,
1219 BMI270_MOTION_THRES_FULL_SCALE * uscale);
1220 return IIO_VAL_INT;
1221 case IIO_EV_INFO_PERIOD:
1222 ret = bmi270_read_feature_reg(data, reg, ®val);
1223 if (ret)
1224 return ret;
1225
1226 raw = FIELD_GET(BMI270_FEAT_MOTION_DURATION_MSK, regval);
1227 *val = raw / BMI270_MOTION_DURAT_SCALE;
1228 *val2 = BMI270_RAW_TO_MICRO(raw, BMI270_MOTION_DURAT_SCALE);
1229 return IIO_VAL_INT_PLUS_MICRO;
1230 default:
1231 return -EINVAL;
1232 }
1233 }
1234
1235 static const struct iio_event_spec bmi270_step_wtrmrk_event = {
1236 .type = IIO_EV_TYPE_CHANGE,
1237 .dir = IIO_EV_DIR_NONE,
1238 .mask_shared_by_type = BIT(IIO_EV_INFO_ENABLE) | BIT(IIO_EV_INFO_VALUE),
1239 };
1240
1241 static const struct iio_event_spec bmi270_anymotion_event = {
1242 .type = IIO_EV_TYPE_MAG_ADAPTIVE,
1243 .dir = IIO_EV_DIR_RISING,
1244 .mask_separate = BIT(IIO_EV_INFO_ENABLE),
1245 .mask_shared_by_type = BIT(IIO_EV_INFO_VALUE) | BIT(IIO_EV_INFO_PERIOD),
1246 };
1247
1248 static const struct iio_event_spec bmi270_nomotion_event = {
1249 .type = IIO_EV_TYPE_ROC,
1250 .dir = IIO_EV_DIR_RISING,
1251 .mask_separate = BIT(IIO_EV_INFO_ENABLE),
1252 .mask_shared_by_type = BIT(IIO_EV_INFO_VALUE) | BIT(IIO_EV_INFO_PERIOD),
1253 };
1254
1255 static const struct iio_info bmi270_info = {
1256 .read_raw = bmi270_read_raw,
1257 .write_raw = bmi270_write_raw,
1258 .read_avail = bmi270_read_avail,
1259 .write_event_config = bmi270_write_event_config,
1260 .read_event_config = bmi270_read_event_config,
1261 .write_event_value = bmi270_write_event_value,
1262 .read_event_value = bmi270_read_event_value,
1263 .event_attrs = &bmi270_event_attribute_group,
1264 };
1265
1266 #define BMI270_ACCEL_CHANNEL(_axis) { \
1267 .type = IIO_ACCEL, \
1268 .modified = 1, \
1269 .channel2 = IIO_MOD_##_axis, \
1270 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
1271 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \
1272 BIT(IIO_CHAN_INFO_SAMP_FREQ), \
1273 .info_mask_shared_by_type_available = \
1274 BIT(IIO_CHAN_INFO_SCALE) | \
1275 BIT(IIO_CHAN_INFO_SAMP_FREQ), \
1276 .scan_index = BMI270_SCAN_ACCEL_##_axis, \
1277 .scan_type = { \
1278 .sign = 's', \
1279 .realbits = 16, \
1280 .storagebits = 16, \
1281 .endianness = IIO_LE, \
1282 }, \
1283 .event_spec = &bmi270_anymotion_event, \
1284 .num_event_specs = 1, \
1285 }
1286
1287 #define BMI270_ANG_VEL_CHANNEL(_axis) { \
1288 .type = IIO_ANGL_VEL, \
1289 .modified = 1, \
1290 .channel2 = IIO_MOD_##_axis, \
1291 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
1292 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \
1293 BIT(IIO_CHAN_INFO_SAMP_FREQ), \
1294 .info_mask_shared_by_type_available = \
1295 BIT(IIO_CHAN_INFO_SCALE) | \
1296 BIT(IIO_CHAN_INFO_SAMP_FREQ), \
1297 .scan_index = BMI270_SCAN_GYRO_##_axis, \
1298 .scan_type = { \
1299 .sign = 's', \
1300 .realbits = 16, \
1301 .storagebits = 16, \
1302 .endianness = IIO_LE, \
1303 }, \
1304 }
1305
1306 static const struct iio_chan_spec bmi270_channels[] = {
1307 BMI270_ACCEL_CHANNEL(X),
1308 BMI270_ACCEL_CHANNEL(Y),
1309 BMI270_ACCEL_CHANNEL(Z),
1310 BMI270_ANG_VEL_CHANNEL(X),
1311 BMI270_ANG_VEL_CHANNEL(Y),
1312 BMI270_ANG_VEL_CHANNEL(Z),
1313 {
1314 .type = IIO_TEMP,
1315 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
1316 BIT(IIO_CHAN_INFO_SCALE) |
1317 BIT(IIO_CHAN_INFO_OFFSET),
1318 .scan_index = -1, /* No buffer support */
1319 },
1320 {
1321 .type = IIO_STEPS,
1322 .info_mask_separate = BIT(IIO_CHAN_INFO_ENABLE) |
1323 BIT(IIO_CHAN_INFO_PROCESSED),
1324 .scan_index = -1, /* No buffer support */
1325 .event_spec = &bmi270_step_wtrmrk_event,
1326 .num_event_specs = 1,
1327 },
1328 IIO_CHAN_SOFT_TIMESTAMP(BMI270_SCAN_TIMESTAMP),
1329 {
1330 .type = IIO_ACCEL,
1331 .modified = 1,
1332 .channel2 = IIO_MOD_X_AND_Y_AND_Z,
1333 .scan_index = -1, /* Fake channel */
1334 .event_spec = &bmi270_nomotion_event,
1335 .num_event_specs = 1,
1336 },
1337 };
1338
bmi270_int_pin_config(struct bmi270_data * data,enum bmi270_irq_pin irq_pin,bool active_high,bool open_drain,bool latch)1339 static int bmi270_int_pin_config(struct bmi270_data *data,
1340 enum bmi270_irq_pin irq_pin,
1341 bool active_high, bool open_drain, bool latch)
1342 {
1343 unsigned int reg, field_value;
1344 int ret;
1345
1346 ret = regmap_update_bits(data->regmap, BMI270_INT_LATCH_REG,
1347 BMI270_INT_LATCH_REG_MSK,
1348 FIELD_PREP(BMI270_INT_LATCH_REG_MSK, latch));
1349 if (ret)
1350 return ret;
1351
1352 switch (irq_pin) {
1353 case BMI270_IRQ_INT1:
1354 reg = BMI270_INT1_IO_CTRL_REG;
1355 break;
1356 case BMI270_IRQ_INT2:
1357 reg = BMI270_INT2_IO_CTRL_REG;
1358 break;
1359 default:
1360 return -EINVAL;
1361 }
1362
1363 field_value = FIELD_PREP(BMI270_INT_IO_CTRL_LVL_MSK, active_high) |
1364 FIELD_PREP(BMI270_INT_IO_CTRL_OD_MSK, open_drain) |
1365 FIELD_PREP(BMI270_INT_IO_CTRL_OP_MSK, 1);
1366 return regmap_update_bits(data->regmap, reg,
1367 BMI270_INT_IO_LVL_OD_OP_MSK, field_value);
1368 }
1369
bmi270_trigger_probe(struct bmi270_data * data,struct iio_dev * indio_dev)1370 static int bmi270_trigger_probe(struct bmi270_data *data,
1371 struct iio_dev *indio_dev)
1372 {
1373 bool open_drain, active_high, latch;
1374 struct fwnode_handle *fwnode;
1375 enum bmi270_irq_pin irq_pin;
1376 int ret, irq, irq_type;
1377
1378 fwnode = dev_fwnode(data->dev);
1379 if (!fwnode)
1380 return -ENODEV;
1381
1382 irq = fwnode_irq_get_byname(fwnode, "INT1");
1383 if (irq > 0) {
1384 irq_pin = BMI270_IRQ_INT1;
1385 } else {
1386 irq = fwnode_irq_get_byname(fwnode, "INT2");
1387 if (irq < 0)
1388 return 0;
1389
1390 irq_pin = BMI270_IRQ_INT2;
1391 }
1392
1393 irq_type = irq_get_trigger_type(irq);
1394 switch (irq_type) {
1395 case IRQF_TRIGGER_RISING:
1396 latch = false;
1397 active_high = true;
1398 break;
1399 case IRQF_TRIGGER_HIGH:
1400 latch = true;
1401 active_high = true;
1402 break;
1403 case IRQF_TRIGGER_FALLING:
1404 latch = false;
1405 active_high = false;
1406 break;
1407 case IRQF_TRIGGER_LOW:
1408 latch = true;
1409 active_high = false;
1410 break;
1411 default:
1412 return dev_err_probe(data->dev, -EINVAL,
1413 "Invalid interrupt type 0x%x specified\n",
1414 irq_type);
1415 }
1416
1417 open_drain = fwnode_property_read_bool(fwnode, "drive-open-drain");
1418
1419 ret = bmi270_int_pin_config(data, irq_pin, active_high, open_drain,
1420 latch);
1421 if (ret)
1422 return dev_err_probe(data->dev, ret,
1423 "Failed to configure irq line\n");
1424
1425 data->trig = devm_iio_trigger_alloc(data->dev, "%s-trig-%d",
1426 indio_dev->name, irq_pin);
1427 if (!data->trig)
1428 return -ENOMEM;
1429
1430 data->trig->ops = &bmi270_trigger_ops;
1431 iio_trigger_set_drvdata(data->trig, data);
1432
1433 ret = devm_request_threaded_irq(data->dev, irq, NULL,
1434 bmi270_irq_thread_handler,
1435 IRQF_ONESHOT, "bmi270-int", indio_dev);
1436 if (ret)
1437 return dev_err_probe(data->dev, ret, "Failed to request IRQ\n");
1438
1439 ret = devm_iio_trigger_register(data->dev, data->trig);
1440 if (ret)
1441 return dev_err_probe(data->dev, ret,
1442 "Trigger registration failed\n");
1443
1444 /* Disable axes for motion events */
1445 ret = bmi270_update_feature_reg(data, BMI270_ANYMO1_REG,
1446 BMI270_FEAT_MOTION_XYZ_EN_MSK,
1447 FIELD_PREP(BMI270_FEAT_MOTION_XYZ_EN_MSK, 0));
1448 if (ret)
1449 return ret;
1450
1451 data->irq_pin = irq_pin;
1452
1453 return 0;
1454 }
1455
bmi270_validate_chip_id(struct bmi270_data * data)1456 static int bmi270_validate_chip_id(struct bmi270_data *data)
1457 {
1458 int chip_id;
1459 int ret;
1460 struct device *dev = data->dev;
1461 struct regmap *regmap = data->regmap;
1462
1463 ret = regmap_read(regmap, BMI270_CHIP_ID_REG, &chip_id);
1464 if (ret)
1465 return dev_err_probe(dev, ret, "Failed to read chip id");
1466
1467 /*
1468 * Some manufacturers use "BMI0160" for both the BMI160 and
1469 * BMI260. If the device is actually a BMI160, the bmi160
1470 * driver should handle it and this driver should not.
1471 */
1472 if (chip_id == BMI160_CHIP_ID_VAL)
1473 return -ENODEV;
1474
1475 if (chip_id != data->chip_info->chip_id)
1476 dev_info(dev, "Unexpected chip id 0x%x", chip_id);
1477
1478 if (chip_id == bmi260_chip_info.chip_id)
1479 data->chip_info = &bmi260_chip_info;
1480 else if (chip_id == bmi270_chip_info.chip_id)
1481 data->chip_info = &bmi270_chip_info;
1482
1483 return 0;
1484 }
1485
bmi270_write_calibration_data(struct bmi270_data * data)1486 static int bmi270_write_calibration_data(struct bmi270_data *data)
1487 {
1488 int ret;
1489 int status = 0;
1490 const struct firmware *init_data;
1491 struct device *dev = data->dev;
1492 struct regmap *regmap = data->regmap;
1493
1494 ret = regmap_clear_bits(regmap, BMI270_PWR_CONF_REG,
1495 BMI270_PWR_CONF_ADV_PWR_SAVE_MSK);
1496 if (ret)
1497 return dev_err_probe(dev, ret,
1498 "Failed to write power configuration");
1499
1500 /*
1501 * After disabling advanced power save, all registers are accessible
1502 * after a 450us delay. This delay is specified in table A of the
1503 * datasheet.
1504 */
1505 usleep_range(450, 1000);
1506
1507 ret = regmap_clear_bits(regmap, BMI270_INIT_CTRL_REG,
1508 BMI270_INIT_CTRL_LOAD_DONE_MSK);
1509 if (ret)
1510 return dev_err_probe(dev, ret,
1511 "Failed to prepare device to load init data");
1512
1513 ret = request_firmware(&init_data, data->chip_info->fw_name, dev);
1514 if (ret)
1515 return dev_err_probe(dev, ret, "Failed to load init data file");
1516
1517 ret = regmap_bulk_write(regmap, BMI270_INIT_DATA_REG,
1518 init_data->data, init_data->size);
1519 release_firmware(init_data);
1520 if (ret)
1521 return dev_err_probe(dev, ret, "Failed to write init data");
1522
1523 ret = regmap_set_bits(regmap, BMI270_INIT_CTRL_REG,
1524 BMI270_INIT_CTRL_LOAD_DONE_MSK);
1525 if (ret)
1526 return dev_err_probe(dev, ret,
1527 "Failed to stop device initialization");
1528
1529 /*
1530 * Wait at least 140ms for the device to complete configuration.
1531 * This delay is specified in table C of the datasheet.
1532 */
1533 usleep_range(140000, 160000);
1534
1535 ret = regmap_read(regmap, BMI270_INTERNAL_STATUS_REG, &status);
1536 if (ret)
1537 return dev_err_probe(dev, ret, "Failed to read internal status");
1538
1539 if (status != BMI270_INTERNAL_STATUS_MSG_INIT_OK)
1540 return dev_err_probe(dev, -ENODEV, "Device failed to initialize");
1541
1542 return 0;
1543 }
1544
bmi270_configure_imu(struct bmi270_data * data)1545 static int bmi270_configure_imu(struct bmi270_data *data)
1546 {
1547 int ret;
1548 struct device *dev = data->dev;
1549 struct regmap *regmap = data->regmap;
1550
1551 ret = regmap_set_bits(regmap, BMI270_PWR_CTRL_REG,
1552 BMI270_PWR_CTRL_AUX_EN_MSK |
1553 BMI270_PWR_CTRL_GYR_EN_MSK |
1554 BMI270_PWR_CTRL_ACCEL_EN_MSK |
1555 BMI270_PWR_CTRL_TEMP_EN_MSK);
1556 if (ret)
1557 return dev_err_probe(dev, ret, "Failed to enable accelerometer and gyroscope");
1558
1559 ret = regmap_set_bits(regmap, BMI270_ACC_CONF_REG,
1560 FIELD_PREP(BMI270_ACC_CONF_ODR_MSK,
1561 BMI270_ACC_CONF_ODR_100HZ) |
1562 FIELD_PREP(BMI270_ACC_CONF_BWP_MSK,
1563 BMI270_ACC_CONF_BWP_NORMAL_MODE));
1564 if (ret)
1565 return dev_err_probe(dev, ret, "Failed to configure accelerometer");
1566
1567 ret = regmap_set_bits(regmap, BMI270_GYR_CONF_REG,
1568 FIELD_PREP(BMI270_GYR_CONF_ODR_MSK,
1569 BMI270_GYR_CONF_ODR_200HZ) |
1570 FIELD_PREP(BMI270_GYR_CONF_BWP_MSK,
1571 BMI270_GYR_CONF_BWP_NORMAL_MODE));
1572 if (ret)
1573 return dev_err_probe(dev, ret, "Failed to configure gyroscope");
1574
1575 /* Enable FIFO_WKUP, Disable ADV_PWR_SAVE and FUP_EN */
1576 ret = regmap_write(regmap, BMI270_PWR_CONF_REG,
1577 BMI270_PWR_CONF_FIFO_WKUP_MSK);
1578 if (ret)
1579 return dev_err_probe(dev, ret, "Failed to set power configuration");
1580
1581 return 0;
1582 }
1583
bmi270_chip_init(struct bmi270_data * data)1584 static int bmi270_chip_init(struct bmi270_data *data)
1585 {
1586 int ret;
1587
1588 ret = bmi270_validate_chip_id(data);
1589 if (ret)
1590 return ret;
1591
1592 ret = bmi270_write_calibration_data(data);
1593 if (ret)
1594 return ret;
1595
1596 return bmi270_configure_imu(data);
1597 }
1598
bmi270_core_probe(struct device * dev,struct regmap * regmap,const struct bmi270_chip_info * chip_info)1599 int bmi270_core_probe(struct device *dev, struct regmap *regmap,
1600 const struct bmi270_chip_info *chip_info)
1601 {
1602 int ret;
1603 struct bmi270_data *data;
1604 struct iio_dev *indio_dev;
1605
1606 indio_dev = devm_iio_device_alloc(dev, sizeof(*data));
1607 if (!indio_dev)
1608 return -ENOMEM;
1609
1610 data = iio_priv(indio_dev);
1611 data->dev = dev;
1612 data->regmap = regmap;
1613 data->chip_info = chip_info;
1614 data->irq_pin = BMI270_IRQ_DISABLED;
1615 mutex_init(&data->mutex);
1616
1617 ret = bmi270_chip_init(data);
1618 if (ret)
1619 return ret;
1620
1621 indio_dev->channels = bmi270_channels;
1622 indio_dev->num_channels = ARRAY_SIZE(bmi270_channels);
1623 indio_dev->name = chip_info->name;
1624 indio_dev->available_scan_masks = bmi270_avail_scan_masks;
1625 indio_dev->modes = INDIO_DIRECT_MODE;
1626 indio_dev->info = &bmi270_info;
1627 dev_set_drvdata(data->dev, indio_dev);
1628
1629 ret = bmi270_trigger_probe(data, indio_dev);
1630 if (ret)
1631 return ret;
1632
1633 ret = devm_iio_triggered_buffer_setup(dev, indio_dev,
1634 iio_pollfunc_store_time,
1635 bmi270_trigger_handler, NULL);
1636 if (ret)
1637 return ret;
1638
1639 return devm_iio_device_register(dev, indio_dev);
1640 }
1641 EXPORT_SYMBOL_NS_GPL(bmi270_core_probe, "IIO_BMI270");
1642
bmi270_core_runtime_suspend(struct device * dev)1643 static int bmi270_core_runtime_suspend(struct device *dev)
1644 {
1645 struct iio_dev *indio_dev = dev_get_drvdata(dev);
1646
1647 return iio_device_suspend_triggering(indio_dev);
1648 }
1649
bmi270_core_runtime_resume(struct device * dev)1650 static int bmi270_core_runtime_resume(struct device *dev)
1651 {
1652 struct iio_dev *indio_dev = dev_get_drvdata(dev);
1653
1654 return iio_device_resume_triggering(indio_dev);
1655 }
1656
1657 const struct dev_pm_ops bmi270_core_pm_ops = {
1658 RUNTIME_PM_OPS(bmi270_core_runtime_suspend, bmi270_core_runtime_resume, NULL)
1659 };
1660 EXPORT_SYMBOL_NS_GPL(bmi270_core_pm_ops, "IIO_BMI270");
1661
1662 MODULE_AUTHOR("Alex Lanzano");
1663 MODULE_DESCRIPTION("BMI270 driver");
1664 MODULE_LICENSE("GPL");
1665