| /linux/drivers/net/wireless/quantenna/qtnfmac/pcie/ |
| H A D | pearl_pcie_regs.h | 8 #define PCIE_HDP_CTRL(base) ((base) + 0x2c00) argument
9 #define PCIE_HDP_AXI_CTRL(base) ((base) + 0x2c04) argument
10 #define PCIE_HDP_HOST_WR_DESC0(base) ((base) + 0x2c10) argument
11 #define PCIE_HDP_HOST_WR_DESC0_H(base) ((base) + 0x2c14) argument
12 #define PCIE_HDP_HOST_WR_DESC1(base) ((base) + 0x2c18) argument
13 #define PCIE_HDP_HOST_WR_DESC1_H(base) ((base) + 0x2c1c) argument
14 #define PCIE_HDP_HOST_WR_DESC2(base) ((base) + 0x2c20) argument
15 #define PCIE_HDP_HOST_WR_DESC2_H(base) ((base) + 0x2c24) argument
16 #define PCIE_HDP_HOST_WR_DESC3(base) ((base) + 0x2c28) argument
17 #define PCIE_HDP_HOST_WR_DESC4_H(base) ((base) + 0x2c2c) argument
[all …]
|
| H A D | topaz_pcie_regs.h | 8 #define PCIE_DMA_WR_INTR_STATUS(base) ((base) + 0x9bc) argument
9 #define PCIE_DMA_WR_INTR_MASK(base) ((base) + 0x9c4) argument
10 #define PCIE_DMA_WR_INTR_CLR(base) ((base) + 0x9c8) argument
11 #define PCIE_DMA_WR_ERR_STATUS(base) ((base) + 0x9cc) argument
12 #define PCIE_DMA_WR_DONE_IMWR_ADDR_LOW(base) ((base) + 0x9D0) argument
13 #define PCIE_DMA_WR_DONE_IMWR_ADDR_HIGH(base) ((base) + 0x9d4) argument
15 #define PCIE_DMA_RD_INTR_STATUS(base) ((base) + 0x310) argument
16 #define PCIE_DMA_RD_INTR_MASK(base) ((base) + 0x319) argument
17 #define PCIE_DMA_RD_INTR_CLR(base) ((base) + 0x31c) argument
18 #define PCIE_DMA_RD_ERR_STATUS_LOW(base) ((base) + 0x324) argument
[all …]
|
| /linux/drivers/scsi/ |
| H A D | nsp32_io.h | 12 static inline void nsp32_write1(unsigned int base, in nsp32_write1()
19 static inline unsigned char nsp32_read1(unsigned int base, in nsp32_read1()
25 static inline void nsp32_write2(unsigned int base, in nsp32_write2()
32 static inline unsigned short nsp32_read2(unsigned int base, in nsp32_read2()
38 static inline void nsp32_write4(unsigned int base, in nsp32_write4()
45 static inline unsigned long nsp32_read4(unsigned int base, in nsp32_read4()
53 static inline void nsp32_mmio_write1(unsigned long base, in nsp32_mmio_write1()
64 static inline unsigned char nsp32_mmio_read1(unsigned long base, in nsp32_mmio_read1()
74 static inline void nsp32_mmio_write2(unsigned long base, in nsp32_mmio_write2()
85 static inline unsigned short nsp32_mmio_read2(unsigned long base, in nsp32_mmio_read2()
[all …]
|
| H A D | aha1740.h | 19 #define HID0(base) (base + 0x0) argument
20 #define HID1(base) (base + 0x1) argument
21 #define HID2(base) (base + 0x2) argument
22 #define HID3(base) (base + 0x3) argument
23 #define EBCNTRL(base) (base + 0x4) argument
24 #define PORTADR(base) (base + 0x40) argument
25 #define BIOSADR(base) (base + 0x41) argument
26 #define INTDEF(base) (base + 0x42) argument
27 #define SCSIDEF(base) (base + 0x43) argument
28 #define BUSDEF(base) (base + 0x44) argument
[all …]
|
| H A D | myrb.c | 164 void __iomem *base = cb->io_base; in myrb_qcmd() local
807 void __iomem *base = cb->io_base; in myrb_enable_mmio() local
2515 static inline void DAC960_LA_hw_mbox_new_cmd(void __iomem *base) in DAC960_LA_hw_mbox_new_cmd() argument
2520 static inline void DAC960_LA_ack_hw_mbox_status(void __iomem *base) in DAC960_LA_ack_hw_mbox_status() argument
2525 DAC960_LA_reset_ctrl(void __iomem * base) DAC960_LA_reset_ctrl() argument
2530 DAC960_LA_mem_mbox_new_cmd(void __iomem * base) DAC960_LA_mem_mbox_new_cmd() argument
2535 DAC960_LA_hw_mbox_is_full(void __iomem * base) DAC960_LA_hw_mbox_is_full() argument
2542 DAC960_LA_init_in_progress(void __iomem * base) DAC960_LA_init_in_progress() argument
2549 DAC960_LA_ack_hw_mbox_intr(void __iomem * base) DAC960_LA_ack_hw_mbox_intr() argument
2554 DAC960_LA_ack_intr(void __iomem * base) DAC960_LA_ack_intr() argument
2560 DAC960_LA_hw_mbox_status_available(void __iomem * base) DAC960_LA_hw_mbox_status_available() argument
2567 DAC960_LA_enable_intr(void __iomem * base) DAC960_LA_enable_intr() argument
2575 DAC960_LA_disable_intr(void __iomem * base) DAC960_LA_disable_intr() argument
2596 DAC960_LA_write_hw_mbox(void __iomem * base,union myrb_cmd_mbox * mbox) DAC960_LA_write_hw_mbox() argument
2605 DAC960_LA_read_status(void __iomem * base) DAC960_LA_read_status() argument
2611 DAC960_LA_read_error_status(void __iomem * base,unsigned char * error,unsigned char * param0,unsigned char * param1) DAC960_LA_read_error_status() argument
2628 DAC960_LA_mbox_init(struct pci_dev * pdev,void __iomem * base,union myrb_cmd_mbox * mbox) DAC960_LA_mbox_init() argument
2666 DAC960_LA_hw_init(struct pci_dev * pdev,struct myrb_hba * cb,void __iomem * base) DAC960_LA_hw_init() argument
2710 void __iomem *base = cb->io_base; DAC960_LA_intr_handler() local
2762 DAC960_PG_hw_mbox_new_cmd(void __iomem * base) DAC960_PG_hw_mbox_new_cmd() argument
2767 DAC960_PG_ack_hw_mbox_status(void __iomem * base) DAC960_PG_ack_hw_mbox_status() argument
2772 DAC960_PG_reset_ctrl(void __iomem * base) DAC960_PG_reset_ctrl() argument
2777 DAC960_PG_mem_mbox_new_cmd(void __iomem * base) DAC960_PG_mem_mbox_new_cmd() argument
2782 DAC960_PG_hw_mbox_is_full(void __iomem * base) DAC960_PG_hw_mbox_is_full() argument
2789 DAC960_PG_init_in_progress(void __iomem * base) DAC960_PG_init_in_progress() argument
2796 DAC960_PG_ack_hw_mbox_intr(void __iomem * base) DAC960_PG_ack_hw_mbox_intr() argument
2801 DAC960_PG_ack_intr(void __iomem * base) DAC960_PG_ack_intr() argument
2807 DAC960_PG_hw_mbox_status_available(void __iomem * base) DAC960_PG_hw_mbox_status_available() argument
2814 DAC960_PG_enable_intr(void __iomem * base) DAC960_PG_enable_intr() argument
2822 DAC960_PG_disable_intr(void __iomem * base) DAC960_PG_disable_intr() argument
2842 DAC960_PG_write_hw_mbox(void __iomem * base,union myrb_cmd_mbox * mbox) DAC960_PG_write_hw_mbox() argument
2852 DAC960_PG_read_status(void __iomem * base) DAC960_PG_read_status() argument
2858 DAC960_PG_read_error_status(void __iomem * base,unsigned char * error,unsigned char * param0,unsigned char * param1) DAC960_PG_read_error_status() argument
2874 DAC960_PG_mbox_init(struct pci_dev * pdev,void __iomem * base,union myrb_cmd_mbox * mbox) DAC960_PG_mbox_init() argument
2914 DAC960_PG_hw_init(struct pci_dev * pdev,struct myrb_hba * cb,void __iomem * base) DAC960_PG_hw_init() argument
2958 void __iomem *base = cb->io_base; DAC960_PG_intr_handler() local
3010 DAC960_PD_hw_mbox_new_cmd(void __iomem * base) DAC960_PD_hw_mbox_new_cmd() argument
3015 DAC960_PD_ack_hw_mbox_status(void __iomem * base) DAC960_PD_ack_hw_mbox_status() argument
3020 DAC960_PD_reset_ctrl(void __iomem * base) DAC960_PD_reset_ctrl() argument
3025 DAC960_PD_hw_mbox_is_full(void __iomem * base) DAC960_PD_hw_mbox_is_full() argument
3032 DAC960_PD_init_in_progress(void __iomem * base) DAC960_PD_init_in_progress() argument
3039 DAC960_PD_ack_intr(void __iomem * base) DAC960_PD_ack_intr() argument
3044 DAC960_PD_hw_mbox_status_available(void __iomem * base) DAC960_PD_hw_mbox_status_available() argument
3051 DAC960_PD_enable_intr(void __iomem * base) DAC960_PD_enable_intr() argument
3056 DAC960_PD_disable_intr(void __iomem * base) DAC960_PD_disable_intr() argument
3061 DAC960_PD_write_cmd_mbox(void __iomem * base,union myrb_cmd_mbox * mbox) DAC960_PD_write_cmd_mbox() argument
3071 DAC960_PD_read_status_cmd_ident(void __iomem * base) DAC960_PD_read_status_cmd_ident() argument
3077 DAC960_PD_read_status(void __iomem * base) DAC960_PD_read_status() argument
3083 DAC960_PD_read_error_status(void __iomem * base,unsigned char * error,unsigned char * param0,unsigned char * param1) DAC960_PD_read_error_status() argument
3100 void __iomem *base = cb->io_base; DAC960_PD_qcmd() local
3110 DAC960_PD_hw_init(struct pci_dev * pdev,struct myrb_hba * cb,void __iomem * base) DAC960_PD_hw_init() argument
3154 void __iomem *base = cb->io_base; DAC960_PD_intr_handler() local
3239 void __iomem *base = cb->io_base; DAC960_P_qcmd() local
3276 DAC960_P_hw_init(struct pci_dev * pdev,struct myrb_hba * cb,void __iomem * base) DAC960_P_hw_init() argument
3320 void __iomem *base = cb->io_base; DAC960_P_intr_handler() local
[all...] |
| H A D | myrs.c | 106 void __iomem *base = cs->io_base; in myrs_qcmd() local
484 void __iomem *base = cs->io_base; in myrs_enable_mmio_mbox() local
2398 static inline void DAC960_GEM_hw_mbox_new_cmd(void __iomem *base) in DAC960_GEM_hw_mbox_new_cmd() argument
2405 static inline void DAC960_GEM_ack_hw_mbox_status(void __iomem *base) in DAC960_GEM_ack_hw_mbox_status() argument
2412 DAC960_GEM_reset_ctrl(void __iomem * base) DAC960_GEM_reset_ctrl() argument
2419 DAC960_GEM_mem_mbox_new_cmd(void __iomem * base) DAC960_GEM_mem_mbox_new_cmd() argument
2426 DAC960_GEM_hw_mbox_is_full(void __iomem * base) DAC960_GEM_hw_mbox_is_full() argument
2434 DAC960_GEM_init_in_progress(void __iomem * base) DAC960_GEM_init_in_progress() argument
2442 DAC960_GEM_ack_hw_mbox_intr(void __iomem * base) DAC960_GEM_ack_hw_mbox_intr() argument
2449 DAC960_GEM_ack_intr(void __iomem * base) DAC960_GEM_ack_intr() argument
2457 DAC960_GEM_hw_mbox_status_available(void __iomem * base) DAC960_GEM_hw_mbox_status_available() argument
2465 DAC960_GEM_enable_intr(void __iomem * base) DAC960_GEM_enable_intr() argument
2472 DAC960_GEM_disable_intr(void __iomem * base) DAC960_GEM_disable_intr() argument
2491 DAC960_GEM_write_hw_mbox(void __iomem * base,dma_addr_t cmd_mbox_addr) DAC960_GEM_write_hw_mbox() argument
2497 DAC960_GEM_read_cmd_status(void __iomem * base) DAC960_GEM_read_cmd_status() argument
2503 DAC960_GEM_read_error_status(void __iomem * base,unsigned char * error,unsigned char * param0,unsigned char * param1) DAC960_GEM_read_error_status() argument
2519 DAC960_GEM_mbox_init(void __iomem * base,dma_addr_t mbox_addr) DAC960_GEM_mbox_init() argument
2537 DAC960_GEM_hw_init(struct pci_dev * pdev,struct myrs_hba * cs,void __iomem * base) DAC960_GEM_hw_init() argument
2576 void __iomem *base = cs->io_base; DAC960_GEM_intr_handler() local
2631 DAC960_BA_hw_mbox_new_cmd(void __iomem * base) DAC960_BA_hw_mbox_new_cmd() argument
2636 DAC960_BA_ack_hw_mbox_status(void __iomem * base) DAC960_BA_ack_hw_mbox_status() argument
2641 DAC960_BA_reset_ctrl(void __iomem * base) DAC960_BA_reset_ctrl() argument
2646 DAC960_BA_mem_mbox_new_cmd(void __iomem * base) DAC960_BA_mem_mbox_new_cmd() argument
2651 DAC960_BA_hw_mbox_is_full(void __iomem * base) DAC960_BA_hw_mbox_is_full() argument
2659 DAC960_BA_init_in_progress(void __iomem * base) DAC960_BA_init_in_progress() argument
2667 DAC960_BA_ack_hw_mbox_intr(void __iomem * base) DAC960_BA_ack_hw_mbox_intr() argument
2672 DAC960_BA_ack_intr(void __iomem * base) DAC960_BA_ack_intr() argument
2678 DAC960_BA_hw_mbox_status_available(void __iomem * base) DAC960_BA_hw_mbox_status_available() argument
2686 DAC960_BA_enable_intr(void __iomem * base) DAC960_BA_enable_intr() argument
2691 DAC960_BA_disable_intr(void __iomem * base) DAC960_BA_disable_intr() argument
2709 DAC960_BA_write_hw_mbox(void __iomem * base,dma_addr_t cmd_mbox_addr) DAC960_BA_write_hw_mbox() argument
2715 DAC960_BA_read_cmd_status(void __iomem * base) DAC960_BA_read_cmd_status() argument
2721 DAC960_BA_read_error_status(void __iomem * base,unsigned char * error,unsigned char * param0,unsigned char * param1) DAC960_BA_read_error_status() argument
2738 DAC960_BA_mbox_init(void __iomem * base,dma_addr_t mbox_addr) DAC960_BA_mbox_init() argument
2756 DAC960_BA_hw_init(struct pci_dev * pdev,struct myrs_hba * cs,void __iomem * base) DAC960_BA_hw_init() argument
2795 void __iomem *base = cs->io_base; DAC960_BA_intr_handler() local
2850 DAC960_LP_hw_mbox_new_cmd(void __iomem * base) DAC960_LP_hw_mbox_new_cmd() argument
2855 DAC960_LP_ack_hw_mbox_status(void __iomem * base) DAC960_LP_ack_hw_mbox_status() argument
2860 DAC960_LP_reset_ctrl(void __iomem * base) DAC960_LP_reset_ctrl() argument
2865 DAC960_LP_mem_mbox_new_cmd(void __iomem * base) DAC960_LP_mem_mbox_new_cmd() argument
2870 DAC960_LP_hw_mbox_is_full(void __iomem * base) DAC960_LP_hw_mbox_is_full() argument
2878 DAC960_LP_init_in_progress(void __iomem * base) DAC960_LP_init_in_progress() argument
2886 DAC960_LP_ack_hw_mbox_intr(void __iomem * base) DAC960_LP_ack_hw_mbox_intr() argument
2891 DAC960_LP_ack_intr(void __iomem * base) DAC960_LP_ack_intr() argument
2897 DAC960_LP_hw_mbox_status_available(void __iomem * base) DAC960_LP_hw_mbox_status_available() argument
2905 DAC960_LP_enable_intr(void __iomem * base) DAC960_LP_enable_intr() argument
2910 DAC960_LP_disable_intr(void __iomem * base) DAC960_LP_disable_intr() argument
2927 DAC960_LP_write_hw_mbox(void __iomem * base,dma_addr_t cmd_mbox_addr) DAC960_LP_write_hw_mbox() argument
2933 DAC960_LP_read_cmd_status(void __iomem * base) DAC960_LP_read_cmd_status() argument
2939 DAC960_LP_read_error_status(void __iomem * base,unsigned char * error,unsigned char * param0,unsigned char * param1) DAC960_LP_read_error_status() argument
2956 DAC960_LP_mbox_init(void __iomem * base,dma_addr_t mbox_addr) DAC960_LP_mbox_init() argument
2974 DAC960_LP_hw_init(struct pci_dev * pdev,struct myrs_hba * cs,void __iomem * base) DAC960_LP_hw_init() argument
3014 void __iomem *base = cs->io_base; DAC960_LP_intr_handler() local
[all...] |
| /linux/arch/loongarch/lib/ |
| H A D | xor_simd.c | 19 #define LD(reg, base, offset) \ argument
21 #define ST(reg, base, offset) \ argument
25 #define LD_INOUT_LINE(base) \ argument
31 #define LD_AND_XOR_LINE(base) \ argument
41 #define ST_LINE(base) \ argument
62 #define LD(reg, base, offset) \ argument
64 #define ST(reg, base, offset) \ argument
68 #define LD_INOUT_LINE(base) \ argument
72 #define LD_AND_XOR_LINE(base) \ argument
78 #define ST_LINE(base) \ argument
|
| /linux/arch/arm/mm/ |
| H A D | cache-l2x0.c | 66 static void l2c_write_sec(unsigned long val, void __iomem *base, unsigned reg) in l2c_write_sec()
81 static inline void l2c_set_debug(void __iomem *base, unsigned long val) in l2c_set_debug()
92 static inline void l2c_unlock(void __iomem *base, unsigned num) in l2c_unlock()
104 static void l2c_configure(void __iomem *base) in l2c_configure()
113 static void l2c_enable(void __iomem *base, unsigned num_lock) in l2c_enable()
135 void __iomem *base = l2x0_base; in l2c_disable() local
144 static void l2c_save(void __iomem *base) in l2c_save()
151 void __iomem *base = l2x0_base; in l2c_resume() local
174 static void __l2c210_cache_sync(void __iomem *base) in __l2c210_cache_sync()
190 void __iomem *base = l2x0_base; in l2c210_inv_range() local
[all …]
|
| /linux/lib/ |
| H A D | kstrtox.c | 26 const char *_parse_integer_fixup_radix(const char *s, unsigned int *base) in _parse_integer_fixup_radix() argument
52 unsigned int _parse_integer_limit(const char *s, unsigned int base, unsigned long long *p, in _parse_integer_limit() argument
91 _parse_integer(const char * s,unsigned int base,unsigned long long * p) _parse_integer() argument
96 _kstrtoull(const char * s,unsigned int base,unsigned long long * res) _kstrtoull() argument
132 kstrtoull(const char * s,unsigned int base,unsigned long long * res) kstrtoull() argument
156 kstrtoll(const char * s,unsigned int base,long long * res) kstrtoll() argument
181 _kstrtoul(const char * s,unsigned int base,unsigned long * res) _kstrtoul() argument
197 _kstrtol(const char * s,unsigned int base,long * res) _kstrtol() argument
228 kstrtouint(const char * s,unsigned int base,unsigned int * res) kstrtouint() argument
259 kstrtoint(const char * s,unsigned int base,int * res) kstrtoint() argument
275 kstrtou16(const char * s,unsigned int base,u16 * res) kstrtou16() argument
291 kstrtos16(const char * s,unsigned int base,s16 * res) kstrtos16() argument
307 kstrtou8(const char * s,unsigned int base,u8 * res) kstrtou8() argument
323 kstrtos8(const char * s,unsigned int base,s8 * res) kstrtos8() argument
[all...] |
| /linux/drivers/scsi/pcmcia/ |
| H A D | nsp_io.h | 30 static inline void nsp_write(unsigned int base, in nsp_write()
37 static inline unsigned char nsp_read(unsigned int base, in nsp_read()
75 static inline void nsp_fifo8_read(unsigned int base, in nsp_fifo8_read()
94 static inline void nsp_fifo16_read(unsigned int base, in nsp_fifo16_read()
113 static inline void nsp_fifo32_read(unsigned int base, in nsp_fifo32_read()
132 static inline void nsp_fifo8_write(unsigned int base, in nsp_fifo8_write()
150 static inline void nsp_fifo16_write(unsigned int base, in nsp_fifo16_write()
168 static inline void nsp_fifo32_write(unsigned int base, in nsp_fifo32_write()
178 static inline void nsp_mmio_write(unsigned long base, in nsp_mmio_write()
187 static inline unsigned char nsp_mmio_read(unsigned long base, in nsp_mmio_read()
[all …]
|
| /linux/arch/powerpc/kernel/ |
| H A D | fpu.S | 26 #define __REST_1FPVSR(n,c,base) \ argument
35 #define __REST_32FPVSRS(n,c,base) \ argument
44 #define __SAVE_32FPVSRS(n,c,base) \ argument
53 #define __REST_1FPVSR(n,b,base) REST_FPR(n, base) argument
54 #define __REST_32FPVSRS(n,b,base) REST_32FPRS(n, base) argument
55 #define __SAVE_32FPVSRS(n,b,base) SAVE_32FPRS(n, base) argument
57 #define REST_1FPVSR(n,c,base) __REST_1FPVSR(n,__REG_##c,__REG_##base) argument
58 #define REST_32FPVSRS(n,c,base) __REST_32FPVSRS(n,__REG_##c,__REG_##base) argument
59 #define SAVE_32FPVSRS(n,c,base) __SAVE_32FPVSRS(n,__REG_##c,__REG_##base) argument
|
| H A D | tm.S | 20 #define __SAVE_32FPRS_VSRS(n,c,base) \ argument
28 #define __REST_32FPRS_VSRS(n,c,base) \ argument
37 #define __SAVE_32FPRS_VSRS(n,c,base) SAVE_32FPRS(n, base) argument
38 #define __REST_32FPRS_VSRS(n,c,base) REST_32FPRS(n, base) argument
40 #define SAVE_32FPRS_VSRS(n,c,base) \ argument
42 #define REST_32FPRS_VSRS(n,c,base) \ argument
|
| /linux/drivers/s390/block/ |
| H A D | dasd_ioctl.c | 41 struct dasd_device *base; in dasd_ioctl_enable() local
62 struct dasd_device *base; in dasd_ioctl_disable() local
94 struct dasd_device *base; dasd_ioctl_quiesce() local
115 struct dasd_device *base; dasd_ioctl_resume() local
138 struct dasd_device *base; dasd_ioctl_abortio() local
173 struct dasd_device *base; dasd_ioctl_allowio() local
194 struct dasd_device *base; dasd_format() local
232 struct dasd_device *base; dasd_check_format() local
252 struct dasd_device *base; dasd_ioctl_format() local
290 struct dasd_device *base; dasd_ioctl_check_format() local
341 struct dasd_device *base; dasd_ioctl_release_space() local
503 struct dasd_device *base; __dasd_ioctl_information() local
579 struct dasd_device *base; dasd_set_read_only() local
614 struct dasd_device *base; dasd_ioctl() local
712 struct dasd_device *base; dasd_biodasdinfo() local
[all...] |
| /linux/arch/mips/alchemy/common/ |
| H A D | usb.c | 98 static inline void __au1300_usb_phyctl(void __iomem *base, int enable) in __au1300_usb_phyctl()
123 static inline void __au1300_ohci_control(void __iomem *base, int enable, int id) in __au1300_ohci_control()
163 static inline void __au1300_ehci_control(void __iomem *base, int enable) in __au1300_ehci_control()
204 static inline void __au1300_udc_control(void __iomem *base, int enable) in __au1300_udc_control()
235 static inline void __au1300_otg_control(void __iomem *base, int enable) in __au1300_otg_control()
267 void __iomem *base = in au1300_usb_control() local
295 void __iomem *base = in au1300_usb_init() local
316 static inline void __au1200_ohci_control(void __iomem *base, int enable) in __au1200_ohci_control()
330 static inline void __au1200_ehci_control(void __iomem *base, int enable) in __au1200_ehci_control()
346 static inline void __au1200_udc_control(void __iomem *base, int enable) in __au1200_udc_control()
[all …]
|
| H A D | irq.c | 291 void __iomem *base = (void __iomem *)KSEG1ADDR(AU1000_IC0_PHYS_ADDR); in au1x_ic0_unmask() local
301 void __iomem *base = (void __iomem *)KSEG1ADDR(AU1000_IC1_PHYS_ADDR); in au1x_ic1_unmask() local
311 void __iomem *base = (void __iomem *)KSEG1ADDR(AU1000_IC0_PHYS_ADDR); in au1x_ic0_mask() local
321 void __iomem *base = (void __iomem *)KSEG1ADDR(AU1000_IC1_PHYS_ADDR); in au1x_ic1_mask() local
331 void __iomem *base = (void __iomem *)KSEG1ADDR(AU1000_IC0_PHYS_ADDR); in au1x_ic0_ack() local
345 void __iomem *base = (void __iomem *)KSEG1ADDR(AU1000_IC1_PHYS_ADDR); in au1x_ic1_ack() local
359 void __iomem *base = (void __iomem *)KSEG1ADDR(AU1000_IC0_PHYS_ADDR); in au1x_ic0_maskack() local
371 void __iomem *base = (void __iomem *)KSEG1ADDR(AU1000_IC1_PHYS_ADDR); in au1x_ic1_maskack() local
432 void __iomem *base; in au1x_ic_settype() local
715 static inline void ic_init(void __iomem *base) in ic_init()
[all …]
|
| /linux/drivers/gpu/drm/nouveau/nvkm/subdev/bar/ |
| H A D | nv50.c | 32 nv50_bar_flush(struct nvkm_bar *base) in nv50_bar_flush() argument
47 nv50_bar_bar1_vmm(struct nvkm_bar *base) in nv50_bar_bar1_vmm() argument
53 nv50_bar_bar1_wait(struct nvkm_bar *base) in nv50_bar_bar1_wait() argument
65 nv50_bar_bar1_init(struct nvkm_bar *base) in nv50_bar_bar1_init() argument
73 nv50_bar_bar2_vmm(struct nvkm_bar * base) nv50_bar_bar2_vmm() argument
85 nv50_bar_bar2_init(struct nvkm_bar * base) nv50_bar_bar2_init() argument
95 nv50_bar_init(struct nvkm_bar * base) nv50_bar_init() argument
106 nv50_bar_oneinit(struct nvkm_bar * base) nv50_bar_oneinit() argument
204 nv50_bar_dtor(struct nvkm_bar * base) nv50_bar_dtor() argument
[all...] |
| /linux/drivers/block/ |
| H A D | swim.c | 63 #define swim_write(base, reg, v) out_8(&(base)->write_##reg, (v)) argument
64 #define swim_read(base, reg) in_8(&(base)->read_##reg) argument
87 #define iwm_write(base, reg, v) out_8(&(base)->reg, (v)) argument
88 #define iwm_read(base, reg) in_8(&(base)->reg) argument
211 struct swim __iomem *base; member
223 set_swim_mode(struct swim __iomem * base,int enable) set_swim_mode() argument
248 get_swim_mode(struct swim __iomem * base) get_swim_mode() argument
270 swim_select(struct swim __iomem * base,int sel) swim_select() argument
279 swim_action(struct swim __iomem * base,int action) swim_action() argument
295 swim_readbit(struct swim __iomem * base,int bit) swim_readbit() argument
308 swim_drive(struct swim __iomem * base,enum drive_location location) swim_drive() argument
320 swim_motor(struct swim __iomem * base,enum motor_action action) swim_motor() argument
341 swim_eject(struct swim __iomem * base) swim_eject() argument
357 swim_head(struct swim __iomem * base,enum head head) swim_head() argument
367 swim_step(struct swim __iomem * base) swim_step() argument
385 swim_track00(struct swim __iomem * base) swim_track00() argument
407 swim_seek(struct swim __iomem * base,int step) swim_seek() argument
428 struct swim __iomem *base = fs->swd->base; swim_track() local
445 struct swim __iomem *base = fs->swd->base; floppy_eject() local
461 struct swim __iomem *base = fs->swd->base; swim_read_sector() local
498 struct swim __iomem *base = fs->swd->base; floppy_read_sectors() local
585 struct swim __iomem *base = fs->swd->base; setup_medium() local
614 struct swim __iomem *base = fs->swd->base; floppy_open() local
674 struct swim __iomem *base = fs->swd->base; floppy_release() local
751 struct swim __iomem *base = swd->base; swim_add_floppy() local
795 struct swim __iomem *base = swd->base; swim_floppy_init() local
[all...] |
| /linux/arch/arm/plat-orion/ |
| H A D | pcie.c | 55 u32 orion_pcie_dev_id(void __iomem *base) in orion_pcie_dev_id()
60 u32 orion_pcie_rev(void __iomem *base) in orion_pcie_rev()
65 int orion_pcie_link_up(void __iomem *base) in orion_pcie_link_up()
70 int __init orion_pcie_x4_mode(void __iomem *base) in orion_pcie_x4_mode()
75 int orion_pcie_get_local_bus_nr(void __iomem *base) in orion_pcie_get_local_bus_nr()
82 void __init orion_pcie_set_local_bus_nr(void __iomem *base, int nr) in orion_pcie_set_local_bus_nr()
92 void __init orion_pcie_reset(void __iomem *base) in orion_pcie_reset()
123 static void __init orion_pcie_setup_wins(void __iomem *base) in orion_pcie_setup_wins()
181 void __init orion_pcie_setup(void __iomem *base) in orion_pcie_setup()
208 int orion_pcie_rd_conf(void __iomem *base, struct pci_bus *bus, in orion_pcie_rd_conf()
[all …]
|
| /linux/drivers/clocksource/ |
| H A D | timer-rtl-otto.c | 57 static inline unsigned int rttm_get_counter(void __iomem *base) in rttm_get_counter()
62 static inline void rttm_set_period(void __iomem *base, unsigned int period) in rttm_set_period()
67 static inline void rttm_disable_timer(void __iomem *base) in rttm_disable_timer()
72 static inline void rttm_enable_timer(void __iomem *base, u32 mode, u32 divisor) in rttm_enable_timer()
77 static inline void rttm_ack_irq(void __iomem *base) in rttm_ack_irq()
82 static inline void rttm_enable_irq(void __iomem *base) in rttm_enable_irq()
87 static inline void rttm_disable_irq(void __iomem *base) in rttm_disable_irq()
93 #define RTTM_DEBUG(base) \ argument
109 static void rttm_bounce_timer(void __iomem *base, u32 mode) in rttm_bounce_timer()
125 static void rttm_stop_timer(void __iomem *base) in rttm_stop_timer()
[all …]
|
| H A D | timer-gx6605s.c | 28 void __iomem *base = timer_of_base(to_timer_of(ce)); in gx6605s_timer_interrupt() local
40 void __iomem *base = timer_of_base(to_timer_of(ce)); in gx6605s_timer_set_oneshot() local
55 void __iomem *base = timer_of_base(to_timer_of(ce)); in gx6605s_timer_set_next_event() local
69 void __iomem *base = timer_of_base(to_timer_of(ce)); in gx6605s_timer_shutdown() local
96 void __iomem *base; in gx6605s_sched_clock_read() local
103 static void gx6605s_clkevt_init(void __iomem *base) in gx6605s_clkevt_init()
112 static int gx6605s_clksrc_init(void __iomem *base) in gx6605s_clksrc_init()
|
| H A D | timer-goldfish.c | 16 void __iomem *base; member
32 void __iomem *base = timerdrv->base; in goldfish_timer_read() local
51 void __iomem *base = timerdrv->base; in goldfish_timer_set_oneshot() local
63 void __iomem *base = timerdrv->base; goldfish_timer_shutdown() local
74 void __iomem *base = timerdrv->base; goldfish_timer_next_event() local
91 void __iomem *base = timerdrv->base; goldfish_timer_irq() local
100 goldfish_timer_init(int irq,void __iomem * base) goldfish_timer_init() argument
[all...] |
| /linux/drivers/gpu/drm/i915/ |
| H A D | i915_perf_oa_regs.h | 100 #define GEN12_OACTXCONTROL(base) _MMIO((base) + 0x360) argument
172 #define GEN12_OAM_MMIO_TRG(base) \ argument
175 #define GEN12_OAM_HEAD_POINTER(base) \ argument
177 #define GEN12_OAM_TAIL_POINTER(base) \ argument
179 #define GEN12_OAM_BUFFER(base) \ argument
181 #define GEN12_OAM_CONTEXT_CONTROL(base) \ argument
183 #define GEN12_OAM_CONTROL(base) \ argument
185 #define GEN12_OAM_DEBUG(base) \ argument
187 #define GEN12_OAM_STATUS(base) \ argument
192 #define GEN12_OAM_CEC0_0(base) \ argument
[all …]
|
| /linux/drivers/gpio/ |
| H A D | gpio-winbond.c | 131 unsigned long base; member
142 static int winbond_sio_enter(unsigned long base) in winbond_sio_enter()
157 static void winbond_sio_select_logical(unsigned long base, u8 dev) in winbond_sio_select_logical()
163 static void winbond_sio_leave(unsigned long base) in winbond_sio_leave()
170 static void winbond_sio_reg_write(unsigned long base, u8 reg, u8 data) in winbond_sio_reg_write()
176 static u8 winbond_sio_reg_read(unsigned long base, u8 reg) in winbond_sio_reg_read()
182 static void winbond_sio_reg_bset(unsigned long base, u8 reg, u8 bit) in winbond_sio_reg_bset()
191 static void winbond_sio_reg_bclear(unsigned long base, u8 reg, u8 bit) in winbond_sio_reg_bclear()
200 static bool winbond_sio_reg_btest(unsigned long base, u8 reg, u8 bit) in winbond_sio_reg_btest()
385 unsigned long *base = gpiochip_get_data(gc); in winbond_gpio_get() local
[all …]
|
| /linux/kernel/time/ |
| H A D | hrtimer.c | 121 static inline bool hrtimer_base_is_online(struct hrtimer_cpu_base *base) in hrtimer_base_is_online()
167 struct hrtimer_clock_base *base; in lock_hrtimer_base() local
223 static inline struct hrtimer_cpu_base *get_target_base(struct hrtimer_cpu_base *base, int pinned) in get_target_base()
251 switch_hrtimer_base(struct hrtimer *timer, struct hrtimer_clock_base *base, in switch_hrtimer_base()
305 struct hrtimer_clock_base *base = timer->base; in lock_hrtimer_base() local
509 #define for_each_active_base(base, cpu_base, active) \ argument
517 struct hrtimer_clock_base *base; in __hrtimer_next_event_base() local
635 static inline ktime_t hrtimer_update_base(struct hrtimer_cpu_base *base) in hrtimer_update_base()
740 struct hrtimer_cpu_base *base = this_cpu_ptr(&hrtimer_bases); in hrtimer_switch_to_hres() local
776 struct hrtimer_cpu_base *base = this_cpu_ptr(&hrtimer_bases); in retrigger_next_event() local
[all …]
|
| /linux/drivers/mtd/chips/ |
| H A D | cfi_probe.c | 39 #define xip_allowed(base, map) \ argument
46 #define xip_enable(base, map, cfi) \ argument
52 #define xip_disable_qry(base, map, cfi) \ argument
61 #define xip_allowed(base, map) do { } while (0) argument
62 #define xip_enable(base, ma argument
63 xip_disable_qry(base,map,cfi) global() argument
96 cfi_probe_chip(struct map_info * map,__u32 base,unsigned long * chip_map,struct cfi_private * cfi) cfi_probe_chip() argument
199 __u32 base = 0; cfi_chip_setup() local
[all...] |