1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * ASIX AX8817X based USB 2.0 Ethernet Devices
4 * Copyright (C) 2003-2006 David Hollis <dhollis@davehollis.com>
5 * Copyright (C) 2005 Phil Chang <pchang23@sbcglobal.net>
6 * Copyright (C) 2006 James Painter <jamie.painter@iname.com>
7 * Copyright (c) 2002-2003 TiVo Inc.
8 */
9
10 #include "asix.h"
11
12 #define PHY_MODE_MARVELL 0x0000
13 #define MII_MARVELL_LED_CTRL 0x0018
14 #define MII_MARVELL_STATUS 0x001b
15 #define MII_MARVELL_CTRL 0x0014
16
17 #define MARVELL_LED_MANUAL 0x0019
18
19 #define MARVELL_STATUS_HWCFG 0x0004
20
21 #define MARVELL_CTRL_TXDELAY 0x0002
22 #define MARVELL_CTRL_RXDELAY 0x0080
23
24 #define PHY_MODE_RTL8211CL 0x000C
25
26 #define AX88772A_PHY14H 0x14
27 #define AX88772A_PHY14H_DEFAULT 0x442C
28
29 #define AX88772A_PHY15H 0x15
30 #define AX88772A_PHY15H_DEFAULT 0x03C8
31
32 #define AX88772A_PHY16H 0x16
33 #define AX88772A_PHY16H_DEFAULT 0x4044
34
35 struct ax88172_int_data {
36 __le16 res1;
37 u8 link;
38 __le16 res2;
39 u8 status;
40 __le16 res3;
41 } __packed;
42
asix_status(struct usbnet * dev,struct urb * urb)43 static void asix_status(struct usbnet *dev, struct urb *urb)
44 {
45 struct ax88172_int_data *event;
46 int link;
47
48 if (urb->actual_length < 8)
49 return;
50
51 event = urb->transfer_buffer;
52 link = event->link & 0x01;
53 if (netif_carrier_ok(dev->net) != link) {
54 usbnet_link_change(dev, link, 1);
55 netdev_dbg(dev->net, "Link Status is: %d\n", link);
56 }
57 }
58
asix_set_netdev_dev_addr(struct usbnet * dev,u8 * addr)59 static void asix_set_netdev_dev_addr(struct usbnet *dev, u8 *addr)
60 {
61 if (is_valid_ether_addr(addr)) {
62 eth_hw_addr_set(dev->net, addr);
63 } else {
64 netdev_info(dev->net, "invalid hw address, using random\n");
65 eth_hw_addr_random(dev->net);
66 }
67 }
68
69 /* Get the PHY Identifier from the PHYSID1 & PHYSID2 MII registers */
asix_get_phyid(struct usbnet * dev)70 static u32 asix_get_phyid(struct usbnet *dev)
71 {
72 int phy_reg;
73 u32 phy_id;
74 int i;
75
76 /* Poll for the rare case the FW or phy isn't ready yet. */
77 for (i = 0; i < 100; i++) {
78 phy_reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID1);
79 if (phy_reg < 0)
80 return 0;
81 if (phy_reg != 0 && phy_reg != 0xFFFF)
82 break;
83 mdelay(1);
84 }
85
86 if (phy_reg <= 0 || phy_reg == 0xFFFF)
87 return 0;
88
89 phy_id = (phy_reg & 0xffff) << 16;
90
91 phy_reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID2);
92 if (phy_reg < 0)
93 return 0;
94
95 phy_id |= (phy_reg & 0xffff);
96
97 return phy_id;
98 }
99
asix_get_link(struct net_device * net)100 static u32 asix_get_link(struct net_device *net)
101 {
102 struct usbnet *dev = netdev_priv(net);
103
104 return mii_link_ok(&dev->mii);
105 }
106
asix_ioctl(struct net_device * net,struct ifreq * rq,int cmd)107 static int asix_ioctl (struct net_device *net, struct ifreq *rq, int cmd)
108 {
109 struct usbnet *dev = netdev_priv(net);
110
111 return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL);
112 }
113
114 /* We need to override some ethtool_ops so we require our
115 own structure so we don't interfere with other usbnet
116 devices that may be connected at the same time. */
117 static const struct ethtool_ops ax88172_ethtool_ops = {
118 .get_drvinfo = asix_get_drvinfo,
119 .get_link = asix_get_link,
120 .get_msglevel = usbnet_get_msglevel,
121 .set_msglevel = usbnet_set_msglevel,
122 .get_wol = asix_get_wol,
123 .set_wol = asix_set_wol,
124 .get_eeprom_len = asix_get_eeprom_len,
125 .get_eeprom = asix_get_eeprom,
126 .set_eeprom = asix_set_eeprom,
127 .nway_reset = usbnet_nway_reset,
128 .get_link_ksettings = usbnet_get_link_ksettings_mii,
129 .set_link_ksettings = usbnet_set_link_ksettings_mii,
130 };
131
ax88172_set_multicast(struct net_device * net)132 static void ax88172_set_multicast(struct net_device *net)
133 {
134 struct usbnet *dev = netdev_priv(net);
135 struct asix_data *data = (struct asix_data *)&dev->data;
136 u8 rx_ctl = 0x8c;
137
138 if (net->flags & IFF_PROMISC) {
139 rx_ctl |= 0x01;
140 } else if (net->flags & IFF_ALLMULTI ||
141 netdev_mc_count(net) > AX_MAX_MCAST) {
142 rx_ctl |= 0x02;
143 } else if (netdev_mc_empty(net)) {
144 /* just broadcast and directed */
145 } else {
146 /* We use the 20 byte dev->data
147 * for our 8 byte filter buffer
148 * to avoid allocating memory that
149 * is tricky to free later */
150 struct netdev_hw_addr *ha;
151 u32 crc_bits;
152
153 memset(data->multi_filter, 0, AX_MCAST_FILTER_SIZE);
154
155 /* Build the multicast hash filter. */
156 netdev_for_each_mc_addr(ha, net) {
157 crc_bits = ether_crc(ETH_ALEN, ha->addr) >> 26;
158 data->multi_filter[crc_bits >> 3] |=
159 1 << (crc_bits & 7);
160 }
161
162 asix_write_cmd_async(dev, AX_CMD_WRITE_MULTI_FILTER, 0, 0,
163 AX_MCAST_FILTER_SIZE, data->multi_filter);
164
165 rx_ctl |= 0x10;
166 }
167
168 asix_write_cmd_async(dev, AX_CMD_WRITE_RX_CTL, rx_ctl, 0, 0, NULL);
169 }
170
ax88172_link_reset(struct usbnet * dev)171 static int ax88172_link_reset(struct usbnet *dev)
172 {
173 u8 mode;
174 struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
175
176 mii_check_media(&dev->mii, 1, 1);
177 mii_ethtool_gset(&dev->mii, &ecmd);
178 mode = AX88172_MEDIUM_DEFAULT;
179
180 if (ecmd.duplex != DUPLEX_FULL)
181 mode |= ~AX88172_MEDIUM_FD;
182
183 netdev_dbg(dev->net, "ax88172_link_reset() speed: %u duplex: %d setting mode to 0x%04x\n",
184 ethtool_cmd_speed(&ecmd), ecmd.duplex, mode);
185
186 asix_write_medium_mode(dev, mode, 0);
187
188 return 0;
189 }
190
191 static const struct net_device_ops ax88172_netdev_ops = {
192 .ndo_open = usbnet_open,
193 .ndo_stop = usbnet_stop,
194 .ndo_start_xmit = usbnet_start_xmit,
195 .ndo_tx_timeout = usbnet_tx_timeout,
196 .ndo_change_mtu = usbnet_change_mtu,
197 .ndo_get_stats64 = dev_get_tstats64,
198 .ndo_set_mac_address = eth_mac_addr,
199 .ndo_validate_addr = eth_validate_addr,
200 .ndo_eth_ioctl = asix_ioctl,
201 .ndo_set_rx_mode = ax88172_set_multicast,
202 };
203
asix_phy_reset(struct usbnet * dev,unsigned int reset_bits)204 static void asix_phy_reset(struct usbnet *dev, unsigned int reset_bits)
205 {
206 unsigned int timeout = 5000;
207
208 asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, reset_bits);
209
210 /* give phy_id a chance to process reset */
211 udelay(500);
212
213 /* See IEEE 802.3 "22.2.4.1.1 Reset": 500ms max */
214 while (timeout--) {
215 if (asix_mdio_read(dev->net, dev->mii.phy_id, MII_BMCR)
216 & BMCR_RESET)
217 udelay(100);
218 else
219 return;
220 }
221
222 netdev_err(dev->net, "BMCR_RESET timeout on phy_id %d\n",
223 dev->mii.phy_id);
224 }
225
ax88172_bind(struct usbnet * dev,struct usb_interface * intf)226 static int ax88172_bind(struct usbnet *dev, struct usb_interface *intf)
227 {
228 int ret = 0;
229 u8 buf[ETH_ALEN] = {0};
230 int i;
231 unsigned long gpio_bits = dev->driver_info->data;
232
233 usbnet_get_endpoints(dev,intf);
234
235 /* Toggle the GPIOs in a manufacturer/model specific way */
236 for (i = 2; i >= 0; i--) {
237 ret = asix_write_cmd(dev, AX_CMD_WRITE_GPIOS,
238 (gpio_bits >> (i * 8)) & 0xff, 0, 0, NULL, 0);
239 if (ret < 0)
240 goto out;
241 msleep(5);
242 }
243
244 ret = asix_write_rx_ctl(dev, 0x80, 0);
245 if (ret < 0)
246 goto out;
247
248 /* Get the MAC address */
249 ret = asix_read_cmd(dev, AX88172_CMD_READ_NODE_ID,
250 0, 0, ETH_ALEN, buf, 0);
251 if (ret < 0) {
252 netdev_dbg(dev->net, "read AX_CMD_READ_NODE_ID failed: %d\n",
253 ret);
254 goto out;
255 }
256
257 asix_set_netdev_dev_addr(dev, buf);
258
259 /* Initialize MII structure */
260 dev->mii.dev = dev->net;
261 dev->mii.mdio_read = asix_mdio_read;
262 dev->mii.mdio_write = asix_mdio_write;
263 dev->mii.phy_id_mask = 0x3f;
264 dev->mii.reg_num_mask = 0x1f;
265
266 dev->mii.phy_id = asix_read_phy_addr(dev, true);
267 if (dev->mii.phy_id < 0)
268 return dev->mii.phy_id;
269
270 dev->net->netdev_ops = &ax88172_netdev_ops;
271 dev->net->ethtool_ops = &ax88172_ethtool_ops;
272 dev->net->needed_headroom = 4; /* cf asix_tx_fixup() */
273 dev->net->needed_tailroom = 4; /* cf asix_tx_fixup() */
274
275 asix_phy_reset(dev, BMCR_RESET);
276 asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
277 ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP);
278 mii_nway_restart(&dev->mii);
279
280 return 0;
281
282 out:
283 return ret;
284 }
285
ax88772_ethtool_get_strings(struct net_device * netdev,u32 sset,u8 * data)286 static void ax88772_ethtool_get_strings(struct net_device *netdev, u32 sset,
287 u8 *data)
288 {
289 switch (sset) {
290 case ETH_SS_TEST:
291 net_selftest_get_strings(data);
292 break;
293 }
294 }
295
ax88772_ethtool_get_sset_count(struct net_device * ndev,int sset)296 static int ax88772_ethtool_get_sset_count(struct net_device *ndev, int sset)
297 {
298 switch (sset) {
299 case ETH_SS_TEST:
300 return net_selftest_get_count();
301 default:
302 return -EOPNOTSUPP;
303 }
304 }
305
ax88772_ethtool_get_pauseparam(struct net_device * ndev,struct ethtool_pauseparam * pause)306 static void ax88772_ethtool_get_pauseparam(struct net_device *ndev,
307 struct ethtool_pauseparam *pause)
308 {
309 struct usbnet *dev = netdev_priv(ndev);
310 struct asix_common_private *priv = dev->driver_priv;
311
312 phylink_ethtool_get_pauseparam(priv->phylink, pause);
313 }
314
ax88772_ethtool_set_pauseparam(struct net_device * ndev,struct ethtool_pauseparam * pause)315 static int ax88772_ethtool_set_pauseparam(struct net_device *ndev,
316 struct ethtool_pauseparam *pause)
317 {
318 struct usbnet *dev = netdev_priv(ndev);
319 struct asix_common_private *priv = dev->driver_priv;
320
321 return phylink_ethtool_set_pauseparam(priv->phylink, pause);
322 }
323
324 static const struct ethtool_ops ax88772_ethtool_ops = {
325 .get_drvinfo = asix_get_drvinfo,
326 .get_link = usbnet_get_link,
327 .get_msglevel = usbnet_get_msglevel,
328 .set_msglevel = usbnet_set_msglevel,
329 .get_wol = asix_get_wol,
330 .set_wol = asix_set_wol,
331 .get_eeprom_len = asix_get_eeprom_len,
332 .get_eeprom = asix_get_eeprom,
333 .set_eeprom = asix_set_eeprom,
334 .nway_reset = phy_ethtool_nway_reset,
335 .get_link_ksettings = phy_ethtool_get_link_ksettings,
336 .set_link_ksettings = phy_ethtool_set_link_ksettings,
337 .self_test = net_selftest,
338 .get_strings = ax88772_ethtool_get_strings,
339 .get_sset_count = ax88772_ethtool_get_sset_count,
340 .get_pauseparam = ax88772_ethtool_get_pauseparam,
341 .set_pauseparam = ax88772_ethtool_set_pauseparam,
342 };
343
ax88772_reset(struct usbnet * dev)344 static int ax88772_reset(struct usbnet *dev)
345 {
346 struct asix_data *data = (struct asix_data *)&dev->data;
347 struct asix_common_private *priv = dev->driver_priv;
348 int ret;
349
350 /* Rewrite MAC address */
351 ether_addr_copy(data->mac_addr, dev->net->dev_addr);
352 ret = asix_write_cmd(dev, AX_CMD_WRITE_NODE_ID, 0, 0,
353 ETH_ALEN, data->mac_addr, 0);
354 if (ret < 0)
355 goto out;
356
357 /* Set RX_CTL to default values with 2k buffer, and enable cactus */
358 ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL, 0);
359 if (ret < 0)
360 goto out;
361
362 ret = asix_write_medium_mode(dev, AX88772_MEDIUM_DEFAULT, 0);
363 if (ret < 0)
364 goto out;
365
366 phylink_start(priv->phylink);
367
368 return 0;
369
370 out:
371 return ret;
372 }
373
ax88772_hw_reset(struct usbnet * dev,int in_pm)374 static int ax88772_hw_reset(struct usbnet *dev, int in_pm)
375 {
376 struct asix_data *data = (struct asix_data *)&dev->data;
377 struct asix_common_private *priv = dev->driver_priv;
378 u16 rx_ctl;
379 int ret;
380
381 ret = asix_write_gpio(dev, AX_GPIO_RSE | AX_GPIO_GPO_2 |
382 AX_GPIO_GPO2EN, 5, in_pm);
383 if (ret < 0)
384 goto out;
385
386 ret = asix_write_cmd(dev, AX_CMD_SW_PHY_SELECT, priv->embd_phy,
387 0, 0, NULL, in_pm);
388 if (ret < 0) {
389 netdev_dbg(dev->net, "Select PHY #1 failed: %d\n", ret);
390 goto out;
391 }
392
393 if (priv->embd_phy) {
394 ret = asix_sw_reset(dev, AX_SWRESET_IPPD, in_pm);
395 if (ret < 0)
396 goto out;
397
398 usleep_range(10000, 11000);
399
400 ret = asix_sw_reset(dev, AX_SWRESET_CLEAR, in_pm);
401 if (ret < 0)
402 goto out;
403
404 msleep(60);
405
406 ret = asix_sw_reset(dev, AX_SWRESET_IPRL | AX_SWRESET_PRL,
407 in_pm);
408 if (ret < 0)
409 goto out;
410 } else {
411 ret = asix_sw_reset(dev, AX_SWRESET_IPPD | AX_SWRESET_PRL,
412 in_pm);
413 if (ret < 0)
414 goto out;
415 }
416
417 msleep(150);
418
419 if (in_pm && (!asix_mdio_read_nopm(dev->net, dev->mii.phy_id,
420 MII_PHYSID1))){
421 ret = -EIO;
422 goto out;
423 }
424
425 ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL, in_pm);
426 if (ret < 0)
427 goto out;
428
429 ret = asix_write_medium_mode(dev, AX88772_MEDIUM_DEFAULT, in_pm);
430 if (ret < 0)
431 goto out;
432
433 ret = asix_write_cmd(dev, AX_CMD_WRITE_IPG0,
434 AX88772_IPG0_DEFAULT | AX88772_IPG1_DEFAULT,
435 AX88772_IPG2_DEFAULT, 0, NULL, in_pm);
436 if (ret < 0) {
437 netdev_dbg(dev->net, "Write IPG,IPG1,IPG2 failed: %d\n", ret);
438 goto out;
439 }
440
441 /* Rewrite MAC address */
442 ether_addr_copy(data->mac_addr, dev->net->dev_addr);
443 ret = asix_write_cmd(dev, AX_CMD_WRITE_NODE_ID, 0, 0,
444 ETH_ALEN, data->mac_addr, in_pm);
445 if (ret < 0)
446 goto out;
447
448 /* Set RX_CTL to default values with 2k buffer, and enable cactus */
449 ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL, in_pm);
450 if (ret < 0)
451 goto out;
452
453 rx_ctl = asix_read_rx_ctl(dev, in_pm);
454 netdev_dbg(dev->net, "RX_CTL is 0x%04x after all initializations\n",
455 rx_ctl);
456
457 rx_ctl = asix_read_medium_status(dev, in_pm);
458 netdev_dbg(dev->net,
459 "Medium Status is 0x%04x after all initializations\n",
460 rx_ctl);
461
462 return 0;
463
464 out:
465 return ret;
466 }
467
ax88772a_hw_reset(struct usbnet * dev,int in_pm)468 static int ax88772a_hw_reset(struct usbnet *dev, int in_pm)
469 {
470 struct asix_data *data = (struct asix_data *)&dev->data;
471 struct asix_common_private *priv = dev->driver_priv;
472 u16 rx_ctl, phy14h, phy15h, phy16h;
473 int ret;
474
475 ret = asix_write_gpio(dev, AX_GPIO_RSE, 5, in_pm);
476 if (ret < 0)
477 goto out;
478
479 ret = asix_write_cmd(dev, AX_CMD_SW_PHY_SELECT, priv->embd_phy |
480 AX_PHYSEL_SSEN, 0, 0, NULL, in_pm);
481 if (ret < 0) {
482 netdev_dbg(dev->net, "Select PHY #1 failed: %d\n", ret);
483 goto out;
484 }
485 usleep_range(10000, 11000);
486
487 ret = asix_sw_reset(dev, AX_SWRESET_IPPD | AX_SWRESET_IPRL, in_pm);
488 if (ret < 0)
489 goto out;
490
491 usleep_range(10000, 11000);
492
493 ret = asix_sw_reset(dev, AX_SWRESET_IPRL, in_pm);
494 if (ret < 0)
495 goto out;
496
497 msleep(160);
498
499 ret = asix_sw_reset(dev, AX_SWRESET_CLEAR, in_pm);
500 if (ret < 0)
501 goto out;
502
503 ret = asix_sw_reset(dev, AX_SWRESET_IPRL, in_pm);
504 if (ret < 0)
505 goto out;
506
507 msleep(200);
508
509 if (in_pm && (!asix_mdio_read_nopm(dev->net, dev->mii.phy_id,
510 MII_PHYSID1))) {
511 ret = -1;
512 goto out;
513 }
514
515 if (priv->chipcode == AX_AX88772B_CHIPCODE) {
516 ret = asix_write_cmd(dev, AX_QCTCTRL, 0x8000, 0x8001,
517 0, NULL, in_pm);
518 if (ret < 0) {
519 netdev_dbg(dev->net, "Write BQ setting failed: %d\n",
520 ret);
521 goto out;
522 }
523 } else if (priv->chipcode == AX_AX88772A_CHIPCODE) {
524 /* Check if the PHY registers have default settings */
525 phy14h = asix_mdio_read_nopm(dev->net, dev->mii.phy_id,
526 AX88772A_PHY14H);
527 phy15h = asix_mdio_read_nopm(dev->net, dev->mii.phy_id,
528 AX88772A_PHY15H);
529 phy16h = asix_mdio_read_nopm(dev->net, dev->mii.phy_id,
530 AX88772A_PHY16H);
531
532 netdev_dbg(dev->net,
533 "772a_hw_reset: MR20=0x%x MR21=0x%x MR22=0x%x\n",
534 phy14h, phy15h, phy16h);
535
536 /* Restore PHY registers default setting if not */
537 if (phy14h != AX88772A_PHY14H_DEFAULT)
538 asix_mdio_write_nopm(dev->net, dev->mii.phy_id,
539 AX88772A_PHY14H,
540 AX88772A_PHY14H_DEFAULT);
541 if (phy15h != AX88772A_PHY15H_DEFAULT)
542 asix_mdio_write_nopm(dev->net, dev->mii.phy_id,
543 AX88772A_PHY15H,
544 AX88772A_PHY15H_DEFAULT);
545 if (phy16h != AX88772A_PHY16H_DEFAULT)
546 asix_mdio_write_nopm(dev->net, dev->mii.phy_id,
547 AX88772A_PHY16H,
548 AX88772A_PHY16H_DEFAULT);
549 }
550
551 ret = asix_write_cmd(dev, AX_CMD_WRITE_IPG0,
552 AX88772_IPG0_DEFAULT | AX88772_IPG1_DEFAULT,
553 AX88772_IPG2_DEFAULT, 0, NULL, in_pm);
554 if (ret < 0) {
555 netdev_dbg(dev->net, "Write IPG,IPG1,IPG2 failed: %d\n", ret);
556 goto out;
557 }
558
559 /* Rewrite MAC address */
560 memcpy(data->mac_addr, dev->net->dev_addr, ETH_ALEN);
561 ret = asix_write_cmd(dev, AX_CMD_WRITE_NODE_ID, 0, 0, ETH_ALEN,
562 data->mac_addr, in_pm);
563 if (ret < 0)
564 goto out;
565
566 /* Set RX_CTL to default values with 2k buffer, and enable cactus */
567 ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL, in_pm);
568 if (ret < 0)
569 goto out;
570
571 ret = asix_write_medium_mode(dev, AX88772_MEDIUM_DEFAULT, in_pm);
572 if (ret < 0)
573 return ret;
574
575 /* Set RX_CTL to default values with 2k buffer, and enable cactus */
576 ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL, in_pm);
577 if (ret < 0)
578 goto out;
579
580 rx_ctl = asix_read_rx_ctl(dev, in_pm);
581 netdev_dbg(dev->net, "RX_CTL is 0x%04x after all initializations\n",
582 rx_ctl);
583
584 rx_ctl = asix_read_medium_status(dev, in_pm);
585 netdev_dbg(dev->net,
586 "Medium Status is 0x%04x after all initializations\n",
587 rx_ctl);
588
589 return 0;
590
591 out:
592 return ret;
593 }
594
595 static const struct net_device_ops ax88772_netdev_ops = {
596 .ndo_open = usbnet_open,
597 .ndo_stop = usbnet_stop,
598 .ndo_start_xmit = usbnet_start_xmit,
599 .ndo_tx_timeout = usbnet_tx_timeout,
600 .ndo_change_mtu = usbnet_change_mtu,
601 .ndo_get_stats64 = dev_get_tstats64,
602 .ndo_set_mac_address = asix_set_mac_address,
603 .ndo_validate_addr = eth_validate_addr,
604 .ndo_eth_ioctl = phy_do_ioctl_running,
605 .ndo_set_rx_mode = asix_set_multicast,
606 };
607
ax88772_suspend(struct usbnet * dev)608 static void ax88772_suspend(struct usbnet *dev)
609 {
610 struct asix_common_private *priv = dev->driver_priv;
611 u16 medium;
612
613 if (netif_running(dev->net)) {
614 rtnl_lock();
615 phylink_suspend(priv->phylink, false);
616 rtnl_unlock();
617 }
618
619 /* Stop MAC operation */
620 medium = asix_read_medium_status(dev, 1);
621 medium &= ~AX_MEDIUM_RE;
622 asix_write_medium_mode(dev, medium, 1);
623
624 netdev_dbg(dev->net, "ax88772_suspend: medium=0x%04x\n",
625 asix_read_medium_status(dev, 1));
626 }
627
628 /* Notes on PM callbacks and locking context:
629 *
630 * - asix_suspend()/asix_resume() are invoked for both runtime PM and
631 * system-wide suspend/resume. For struct usb_driver the ->resume()
632 * callback does not receive pm_message_t, so the resume type cannot
633 * be distinguished here.
634 *
635 * - The MAC driver must hold RTNL when calling phylink interfaces such as
636 * phylink_suspend()/resume(). Those calls will also perform MDIO I/O.
637 *
638 * - Taking RTNL and doing MDIO from a runtime-PM resume callback (while
639 * the USB PM lock is held) is fragile. Since autosuspend brings no
640 * measurable power saving here, we block it by holding a PM usage
641 * reference in ax88772_bind().
642 */
asix_suspend(struct usb_interface * intf,pm_message_t message)643 static int asix_suspend(struct usb_interface *intf, pm_message_t message)
644 {
645 struct usbnet *dev = usb_get_intfdata(intf);
646 struct asix_common_private *priv = dev->driver_priv;
647
648 if (priv && priv->suspend)
649 priv->suspend(dev);
650
651 return usbnet_suspend(intf, message);
652 }
653
ax88772_resume(struct usbnet * dev)654 static void ax88772_resume(struct usbnet *dev)
655 {
656 struct asix_common_private *priv = dev->driver_priv;
657 int i;
658
659 for (i = 0; i < 3; i++)
660 if (!priv->reset(dev, 1))
661 break;
662
663 if (netif_running(dev->net)) {
664 rtnl_lock();
665 phylink_resume(priv->phylink);
666 rtnl_unlock();
667 }
668 }
669
asix_resume(struct usb_interface * intf)670 static int asix_resume(struct usb_interface *intf)
671 {
672 struct usbnet *dev = usb_get_intfdata(intf);
673 struct asix_common_private *priv = dev->driver_priv;
674
675 if (priv && priv->resume)
676 priv->resume(dev);
677
678 return usbnet_resume(intf);
679 }
680
ax88772_init_mdio(struct usbnet * dev)681 static int ax88772_init_mdio(struct usbnet *dev)
682 {
683 struct asix_common_private *priv = dev->driver_priv;
684 int ret;
685
686 priv->mdio = mdiobus_alloc();
687 if (!priv->mdio)
688 return -ENOMEM;
689
690 priv->mdio->priv = dev;
691 priv->mdio->read = &asix_mdio_bus_read;
692 priv->mdio->write = &asix_mdio_bus_write;
693 priv->mdio->name = "Asix MDIO Bus";
694 priv->mdio->phy_mask = ~(BIT(priv->phy_addr & 0x1f) | BIT(AX_EMBD_PHY_ADDR));
695 /* mii bus name is usb-<usb bus number>-<usb device number> */
696 snprintf(priv->mdio->id, MII_BUS_ID_SIZE, "usb-%03d:%03d",
697 dev->udev->bus->busnum, dev->udev->devnum);
698
699 ret = mdiobus_register(priv->mdio);
700 if (ret) {
701 netdev_err(dev->net, "Could not register MDIO bus (err %d)\n", ret);
702 mdiobus_free(priv->mdio);
703 priv->mdio = NULL;
704 }
705
706 return ret;
707 }
708
ax88772_mdio_unregister(struct asix_common_private * priv)709 static void ax88772_mdio_unregister(struct asix_common_private *priv)
710 {
711 mdiobus_unregister(priv->mdio);
712 mdiobus_free(priv->mdio);
713 }
714
ax88772_init_phy(struct usbnet * dev)715 static int ax88772_init_phy(struct usbnet *dev)
716 {
717 struct asix_common_private *priv = dev->driver_priv;
718 int ret;
719
720 priv->phydev = mdiobus_get_phy(priv->mdio, priv->phy_addr);
721 if (!priv->phydev) {
722 netdev_err(dev->net, "Could not find PHY\n");
723 return -ENODEV;
724 }
725
726 ret = phylink_connect_phy(priv->phylink, priv->phydev);
727 if (ret) {
728 netdev_err(dev->net, "Could not connect PHY\n");
729 return ret;
730 }
731
732 phy_suspend(priv->phydev);
733 priv->phydev->mac_managed_pm = true;
734
735 phy_attached_info(priv->phydev);
736
737 if (priv->embd_phy)
738 return 0;
739
740 /* In case main PHY is not the embedded PHY and MAC is RMII clock
741 * provider, we need to suspend embedded PHY by keeping PLL enabled
742 * (AX_SWRESET_IPPD == 0).
743 */
744 priv->phydev_int = mdiobus_get_phy(priv->mdio, AX_EMBD_PHY_ADDR);
745 if (!priv->phydev_int) {
746 rtnl_lock();
747 phylink_disconnect_phy(priv->phylink);
748 rtnl_unlock();
749 netdev_err(dev->net, "Could not find internal PHY\n");
750 return -ENODEV;
751 }
752
753 priv->phydev_int->mac_managed_pm = true;
754 phy_suspend(priv->phydev_int);
755
756 return 0;
757 }
758
ax88772_mac_config(struct phylink_config * config,unsigned int mode,const struct phylink_link_state * state)759 static void ax88772_mac_config(struct phylink_config *config, unsigned int mode,
760 const struct phylink_link_state *state)
761 {
762 /* Nothing to do */
763 }
764
ax88772_mac_link_down(struct phylink_config * config,unsigned int mode,phy_interface_t interface)765 static void ax88772_mac_link_down(struct phylink_config *config,
766 unsigned int mode, phy_interface_t interface)
767 {
768 struct usbnet *dev = netdev_priv(to_net_dev(config->dev));
769
770 asix_write_medium_mode(dev, 0, 0);
771 }
772
ax88772_mac_link_up(struct phylink_config * config,struct phy_device * phy,unsigned int mode,phy_interface_t interface,int speed,int duplex,bool tx_pause,bool rx_pause)773 static void ax88772_mac_link_up(struct phylink_config *config,
774 struct phy_device *phy,
775 unsigned int mode, phy_interface_t interface,
776 int speed, int duplex,
777 bool tx_pause, bool rx_pause)
778 {
779 struct usbnet *dev = netdev_priv(to_net_dev(config->dev));
780 u16 m = AX_MEDIUM_AC | AX_MEDIUM_RE;
781
782 m |= duplex ? AX_MEDIUM_FD : 0;
783
784 switch (speed) {
785 case SPEED_100:
786 m |= AX_MEDIUM_PS;
787 break;
788 case SPEED_10:
789 break;
790 default:
791 return;
792 }
793
794 if (tx_pause)
795 m |= AX_MEDIUM_TFC;
796
797 if (rx_pause)
798 m |= AX_MEDIUM_RFC;
799
800 asix_write_medium_mode(dev, m, 0);
801 }
802
803 static const struct phylink_mac_ops ax88772_phylink_mac_ops = {
804 .mac_config = ax88772_mac_config,
805 .mac_link_down = ax88772_mac_link_down,
806 .mac_link_up = ax88772_mac_link_up,
807 };
808
ax88772_phylink_setup(struct usbnet * dev)809 static int ax88772_phylink_setup(struct usbnet *dev)
810 {
811 struct asix_common_private *priv = dev->driver_priv;
812 phy_interface_t phy_if_mode;
813 struct phylink *phylink;
814
815 priv->phylink_config.dev = &dev->net->dev;
816 priv->phylink_config.type = PHYLINK_NETDEV;
817 priv->phylink_config.mac_capabilities = MAC_SYM_PAUSE | MAC_ASYM_PAUSE |
818 MAC_10 | MAC_100;
819
820 __set_bit(PHY_INTERFACE_MODE_INTERNAL,
821 priv->phylink_config.supported_interfaces);
822 __set_bit(PHY_INTERFACE_MODE_RMII,
823 priv->phylink_config.supported_interfaces);
824
825 if (priv->embd_phy)
826 phy_if_mode = PHY_INTERFACE_MODE_INTERNAL;
827 else
828 phy_if_mode = PHY_INTERFACE_MODE_RMII;
829
830 phylink = phylink_create(&priv->phylink_config, dev->net->dev.fwnode,
831 phy_if_mode, &ax88772_phylink_mac_ops);
832 if (IS_ERR(phylink))
833 return PTR_ERR(phylink);
834
835 priv->phylink = phylink;
836 return 0;
837 }
838
ax88772_bind(struct usbnet * dev,struct usb_interface * intf)839 static int ax88772_bind(struct usbnet *dev, struct usb_interface *intf)
840 {
841 struct asix_common_private *priv;
842 u8 buf[ETH_ALEN] = {0};
843 int ret, i;
844
845 priv = devm_kzalloc(&dev->udev->dev, sizeof(*priv), GFP_KERNEL);
846 if (!priv)
847 return -ENOMEM;
848
849 dev->driver_priv = priv;
850
851 usbnet_get_endpoints(dev, intf);
852
853 /* Maybe the boot loader passed the MAC address via device tree */
854 if (!eth_platform_get_mac_address(&dev->udev->dev, buf)) {
855 netif_dbg(dev, ifup, dev->net,
856 "MAC address read from device tree");
857 } else {
858 /* Try getting the MAC address from EEPROM */
859 if (dev->driver_info->data & FLAG_EEPROM_MAC) {
860 for (i = 0; i < (ETH_ALEN >> 1); i++) {
861 ret = asix_read_cmd(dev, AX_CMD_READ_EEPROM,
862 0x04 + i, 0, 2, buf + i * 2,
863 0);
864 if (ret < 0)
865 break;
866 }
867 } else {
868 ret = asix_read_cmd(dev, AX_CMD_READ_NODE_ID,
869 0, 0, ETH_ALEN, buf, 0);
870 }
871
872 if (ret < 0) {
873 netdev_dbg(dev->net, "Failed to read MAC address: %d\n",
874 ret);
875 return ret;
876 }
877 }
878
879 asix_set_netdev_dev_addr(dev, buf);
880
881 dev->net->netdev_ops = &ax88772_netdev_ops;
882 dev->net->ethtool_ops = &ax88772_ethtool_ops;
883 dev->net->needed_headroom = 4; /* cf asix_tx_fixup() */
884 dev->net->needed_tailroom = 4; /* cf asix_tx_fixup() */
885
886 ret = asix_read_phy_addr(dev, true);
887 if (ret < 0)
888 return ret;
889
890 priv->phy_addr = ret;
891 priv->embd_phy = ((priv->phy_addr & 0x1f) == AX_EMBD_PHY_ADDR);
892
893 ret = asix_read_cmd(dev, AX_CMD_STATMNGSTS_REG, 0, 0, 1,
894 &priv->chipcode, 0);
895 if (ret < 0) {
896 netdev_dbg(dev->net, "Failed to read STATMNGSTS_REG: %d\n", ret);
897 return ret;
898 }
899
900 priv->chipcode &= AX_CHIPCODE_MASK;
901
902 priv->resume = ax88772_resume;
903 priv->suspend = ax88772_suspend;
904 if (priv->chipcode == AX_AX88772_CHIPCODE)
905 priv->reset = ax88772_hw_reset;
906 else
907 priv->reset = ax88772a_hw_reset;
908
909 ret = priv->reset(dev, 0);
910 if (ret < 0) {
911 netdev_dbg(dev->net, "Failed to reset AX88772: %d\n", ret);
912 return ret;
913 }
914
915 /* Asix framing packs multiple eth frames into a 2K usb bulk transfer */
916 if (dev->driver_info->flags & FLAG_FRAMING_AX) {
917 /* hard_mtu is still the default - the device does not support
918 jumbo eth frames */
919 dev->rx_urb_size = 2048;
920 }
921
922 priv->presvd_phy_bmcr = 0;
923 priv->presvd_phy_advertise = 0;
924
925 ret = ax88772_init_mdio(dev);
926 if (ret)
927 goto mdio_err;
928
929 ret = ax88772_phylink_setup(dev);
930 if (ret)
931 goto phylink_err;
932
933 ret = ax88772_init_phy(dev);
934 if (ret)
935 goto initphy_err;
936
937 /* Keep this interface runtime-PM active by taking a usage ref.
938 * Prevents runtime suspend while bound and avoids resume paths
939 * that could deadlock (autoresume under RTNL while USB PM lock
940 * is held, phylink/MDIO wants RTNL).
941 */
942 pm_runtime_get_noresume(&intf->dev);
943
944 return 0;
945
946 initphy_err:
947 phylink_destroy(priv->phylink);
948 phylink_err:
949 ax88772_mdio_unregister(priv);
950 mdio_err:
951 return ret;
952 }
953
ax88772_stop(struct usbnet * dev)954 static int ax88772_stop(struct usbnet *dev)
955 {
956 struct asix_common_private *priv = dev->driver_priv;
957
958 phylink_stop(priv->phylink);
959
960 return 0;
961 }
962
ax88772_unbind(struct usbnet * dev,struct usb_interface * intf)963 static void ax88772_unbind(struct usbnet *dev, struct usb_interface *intf)
964 {
965 struct asix_common_private *priv = dev->driver_priv;
966
967 rtnl_lock();
968 phylink_disconnect_phy(priv->phylink);
969 rtnl_unlock();
970 phylink_destroy(priv->phylink);
971 ax88772_mdio_unregister(priv);
972 asix_rx_fixup_common_free(dev->driver_priv);
973 /* Drop the PM usage ref taken in bind() */
974 pm_runtime_put(&intf->dev);
975 }
976
ax88178_unbind(struct usbnet * dev,struct usb_interface * intf)977 static void ax88178_unbind(struct usbnet *dev, struct usb_interface *intf)
978 {
979 asix_rx_fixup_common_free(dev->driver_priv);
980 kfree(dev->driver_priv);
981 }
982
983 static const struct ethtool_ops ax88178_ethtool_ops = {
984 .get_drvinfo = asix_get_drvinfo,
985 .get_link = asix_get_link,
986 .get_msglevel = usbnet_get_msglevel,
987 .set_msglevel = usbnet_set_msglevel,
988 .get_wol = asix_get_wol,
989 .set_wol = asix_set_wol,
990 .get_eeprom_len = asix_get_eeprom_len,
991 .get_eeprom = asix_get_eeprom,
992 .set_eeprom = asix_set_eeprom,
993 .nway_reset = usbnet_nway_reset,
994 .get_link_ksettings = usbnet_get_link_ksettings_mii,
995 .set_link_ksettings = usbnet_set_link_ksettings_mii,
996 };
997
marvell_phy_init(struct usbnet * dev)998 static int marvell_phy_init(struct usbnet *dev)
999 {
1000 struct asix_data *data = (struct asix_data *)&dev->data;
1001 u16 reg;
1002
1003 netdev_dbg(dev->net, "marvell_phy_init()\n");
1004
1005 reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_MARVELL_STATUS);
1006 netdev_dbg(dev->net, "MII_MARVELL_STATUS = 0x%04x\n", reg);
1007
1008 asix_mdio_write(dev->net, dev->mii.phy_id, MII_MARVELL_CTRL,
1009 MARVELL_CTRL_RXDELAY | MARVELL_CTRL_TXDELAY);
1010
1011 if (data->ledmode) {
1012 reg = asix_mdio_read(dev->net, dev->mii.phy_id,
1013 MII_MARVELL_LED_CTRL);
1014 netdev_dbg(dev->net, "MII_MARVELL_LED_CTRL (1) = 0x%04x\n", reg);
1015
1016 reg &= 0xf8ff;
1017 reg |= (1 + 0x0100);
1018 asix_mdio_write(dev->net, dev->mii.phy_id,
1019 MII_MARVELL_LED_CTRL, reg);
1020
1021 reg = asix_mdio_read(dev->net, dev->mii.phy_id,
1022 MII_MARVELL_LED_CTRL);
1023 netdev_dbg(dev->net, "MII_MARVELL_LED_CTRL (2) = 0x%04x\n", reg);
1024 }
1025
1026 return 0;
1027 }
1028
rtl8211cl_phy_init(struct usbnet * dev)1029 static int rtl8211cl_phy_init(struct usbnet *dev)
1030 {
1031 struct asix_data *data = (struct asix_data *)&dev->data;
1032
1033 netdev_dbg(dev->net, "rtl8211cl_phy_init()\n");
1034
1035 asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0x0005);
1036 asix_mdio_write (dev->net, dev->mii.phy_id, 0x0c, 0);
1037 asix_mdio_write (dev->net, dev->mii.phy_id, 0x01,
1038 asix_mdio_read (dev->net, dev->mii.phy_id, 0x01) | 0x0080);
1039 asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0);
1040
1041 if (data->ledmode == 12) {
1042 asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0x0002);
1043 asix_mdio_write (dev->net, dev->mii.phy_id, 0x1a, 0x00cb);
1044 asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0);
1045 }
1046
1047 return 0;
1048 }
1049
marvell_led_status(struct usbnet * dev,u16 speed)1050 static int marvell_led_status(struct usbnet *dev, u16 speed)
1051 {
1052 u16 reg = asix_mdio_read(dev->net, dev->mii.phy_id, MARVELL_LED_MANUAL);
1053
1054 netdev_dbg(dev->net, "marvell_led_status() read 0x%04x\n", reg);
1055
1056 /* Clear out the center LED bits - 0x03F0 */
1057 reg &= 0xfc0f;
1058
1059 switch (speed) {
1060 case SPEED_1000:
1061 reg |= 0x03e0;
1062 break;
1063 case SPEED_100:
1064 reg |= 0x03b0;
1065 break;
1066 default:
1067 reg |= 0x02f0;
1068 }
1069
1070 netdev_dbg(dev->net, "marvell_led_status() writing 0x%04x\n", reg);
1071 asix_mdio_write(dev->net, dev->mii.phy_id, MARVELL_LED_MANUAL, reg);
1072
1073 return 0;
1074 }
1075
ax88178_reset(struct usbnet * dev)1076 static int ax88178_reset(struct usbnet *dev)
1077 {
1078 struct asix_data *data = (struct asix_data *)&dev->data;
1079 int ret;
1080 __le16 eeprom;
1081 u8 status;
1082 int gpio0 = 0;
1083 u32 phyid;
1084
1085 ret = asix_read_cmd(dev, AX_CMD_READ_GPIOS, 0, 0, 1, &status, 0);
1086 if (ret < 0) {
1087 netdev_dbg(dev->net, "Failed to read GPIOS: %d\n", ret);
1088 return ret;
1089 }
1090
1091 netdev_dbg(dev->net, "GPIO Status: 0x%04x\n", status);
1092
1093 asix_write_cmd(dev, AX_CMD_WRITE_ENABLE, 0, 0, 0, NULL, 0);
1094 ret = asix_read_cmd(dev, AX_CMD_READ_EEPROM, 0x0017, 0, 2, &eeprom, 0);
1095 if (ret < 0) {
1096 netdev_dbg(dev->net, "Failed to read EEPROM: %d\n", ret);
1097 return ret;
1098 }
1099
1100 asix_write_cmd(dev, AX_CMD_WRITE_DISABLE, 0, 0, 0, NULL, 0);
1101
1102 netdev_dbg(dev->net, "EEPROM index 0x17 is 0x%04x\n", eeprom);
1103
1104 if (eeprom == cpu_to_le16(0xffff)) {
1105 data->phymode = PHY_MODE_MARVELL;
1106 data->ledmode = 0;
1107 gpio0 = 1;
1108 } else {
1109 data->phymode = le16_to_cpu(eeprom) & 0x7F;
1110 data->ledmode = le16_to_cpu(eeprom) >> 8;
1111 gpio0 = (le16_to_cpu(eeprom) & 0x80) ? 0 : 1;
1112 }
1113 netdev_dbg(dev->net, "GPIO0: %d, PhyMode: %d\n", gpio0, data->phymode);
1114
1115 /* Power up external GigaPHY through AX88178 GPIO pin */
1116 asix_write_gpio(dev, AX_GPIO_RSE | AX_GPIO_GPO_1 |
1117 AX_GPIO_GPO1EN, 40, 0);
1118 if ((le16_to_cpu(eeprom) >> 8) != 1) {
1119 asix_write_gpio(dev, 0x003c, 30, 0);
1120 asix_write_gpio(dev, 0x001c, 300, 0);
1121 asix_write_gpio(dev, 0x003c, 30, 0);
1122 } else {
1123 netdev_dbg(dev->net, "gpio phymode == 1 path\n");
1124 asix_write_gpio(dev, AX_GPIO_GPO1EN, 30, 0);
1125 asix_write_gpio(dev, AX_GPIO_GPO1EN | AX_GPIO_GPO_1, 30, 0);
1126 }
1127
1128 /* Read PHYID register *AFTER* powering up PHY */
1129 phyid = asix_get_phyid(dev);
1130 netdev_dbg(dev->net, "PHYID=0x%08x\n", phyid);
1131
1132 /* Set AX88178 to enable MII/GMII/RGMII interface for external PHY */
1133 asix_write_cmd(dev, AX_CMD_SW_PHY_SELECT, 0, 0, 0, NULL, 0);
1134
1135 asix_sw_reset(dev, 0, 0);
1136 msleep(150);
1137
1138 asix_sw_reset(dev, AX_SWRESET_PRL | AX_SWRESET_IPPD, 0);
1139 msleep(150);
1140
1141 asix_write_rx_ctl(dev, 0, 0);
1142
1143 if (data->phymode == PHY_MODE_MARVELL) {
1144 marvell_phy_init(dev);
1145 msleep(60);
1146 } else if (data->phymode == PHY_MODE_RTL8211CL)
1147 rtl8211cl_phy_init(dev);
1148
1149 asix_phy_reset(dev, BMCR_RESET | BMCR_ANENABLE);
1150 asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
1151 ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP);
1152 asix_mdio_write(dev->net, dev->mii.phy_id, MII_CTRL1000,
1153 ADVERTISE_1000FULL);
1154
1155 asix_write_medium_mode(dev, AX88178_MEDIUM_DEFAULT, 0);
1156 mii_nway_restart(&dev->mii);
1157
1158 /* Rewrite MAC address */
1159 memcpy(data->mac_addr, dev->net->dev_addr, ETH_ALEN);
1160 ret = asix_write_cmd(dev, AX_CMD_WRITE_NODE_ID, 0, 0, ETH_ALEN,
1161 data->mac_addr, 0);
1162 if (ret < 0)
1163 return ret;
1164
1165 ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL, 0);
1166 if (ret < 0)
1167 return ret;
1168
1169 return 0;
1170 }
1171
ax88178_link_reset(struct usbnet * dev)1172 static int ax88178_link_reset(struct usbnet *dev)
1173 {
1174 u16 mode;
1175 struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
1176 struct asix_data *data = (struct asix_data *)&dev->data;
1177 u32 speed;
1178
1179 netdev_dbg(dev->net, "ax88178_link_reset()\n");
1180
1181 mii_check_media(&dev->mii, 1, 1);
1182 mii_ethtool_gset(&dev->mii, &ecmd);
1183 mode = AX88178_MEDIUM_DEFAULT;
1184 speed = ethtool_cmd_speed(&ecmd);
1185
1186 if (speed == SPEED_1000)
1187 mode |= AX_MEDIUM_GM;
1188 else if (speed == SPEED_100)
1189 mode |= AX_MEDIUM_PS;
1190 else
1191 mode &= ~(AX_MEDIUM_PS | AX_MEDIUM_GM);
1192
1193 mode |= AX_MEDIUM_ENCK;
1194
1195 if (ecmd.duplex == DUPLEX_FULL)
1196 mode |= AX_MEDIUM_FD;
1197 else
1198 mode &= ~AX_MEDIUM_FD;
1199
1200 netdev_dbg(dev->net, "ax88178_link_reset() speed: %u duplex: %d setting mode to 0x%04x\n",
1201 speed, ecmd.duplex, mode);
1202
1203 asix_write_medium_mode(dev, mode, 0);
1204
1205 if (data->phymode == PHY_MODE_MARVELL && data->ledmode)
1206 marvell_led_status(dev, speed);
1207
1208 return 0;
1209 }
1210
ax88178_set_mfb(struct usbnet * dev)1211 static void ax88178_set_mfb(struct usbnet *dev)
1212 {
1213 u16 mfb = AX_RX_CTL_MFB_16384;
1214 u16 rxctl;
1215 u16 medium;
1216 int old_rx_urb_size = dev->rx_urb_size;
1217
1218 if (dev->hard_mtu < 2048) {
1219 dev->rx_urb_size = 2048;
1220 mfb = AX_RX_CTL_MFB_2048;
1221 } else if (dev->hard_mtu < 4096) {
1222 dev->rx_urb_size = 4096;
1223 mfb = AX_RX_CTL_MFB_4096;
1224 } else if (dev->hard_mtu < 8192) {
1225 dev->rx_urb_size = 8192;
1226 mfb = AX_RX_CTL_MFB_8192;
1227 } else if (dev->hard_mtu < 16384) {
1228 dev->rx_urb_size = 16384;
1229 mfb = AX_RX_CTL_MFB_16384;
1230 }
1231
1232 rxctl = asix_read_rx_ctl(dev, 0);
1233 asix_write_rx_ctl(dev, (rxctl & ~AX_RX_CTL_MFB_16384) | mfb, 0);
1234
1235 medium = asix_read_medium_status(dev, 0);
1236 if (dev->net->mtu > 1500)
1237 medium |= AX_MEDIUM_JFE;
1238 else
1239 medium &= ~AX_MEDIUM_JFE;
1240 asix_write_medium_mode(dev, medium, 0);
1241
1242 if (dev->rx_urb_size > old_rx_urb_size)
1243 usbnet_unlink_rx_urbs(dev);
1244 }
1245
ax88178_change_mtu(struct net_device * net,int new_mtu)1246 static int ax88178_change_mtu(struct net_device *net, int new_mtu)
1247 {
1248 struct usbnet *dev = netdev_priv(net);
1249 int ll_mtu = new_mtu + net->hard_header_len + 4;
1250
1251 netdev_dbg(dev->net, "ax88178_change_mtu() new_mtu=%d\n", new_mtu);
1252
1253 if ((ll_mtu % dev->maxpacket) == 0)
1254 return -EDOM;
1255
1256 WRITE_ONCE(net->mtu, new_mtu);
1257 dev->hard_mtu = net->mtu + net->hard_header_len;
1258 ax88178_set_mfb(dev);
1259
1260 /* max qlen depend on hard_mtu and rx_urb_size */
1261 usbnet_update_max_qlen(dev);
1262
1263 return 0;
1264 }
1265
1266 static const struct net_device_ops ax88178_netdev_ops = {
1267 .ndo_open = usbnet_open,
1268 .ndo_stop = usbnet_stop,
1269 .ndo_start_xmit = usbnet_start_xmit,
1270 .ndo_tx_timeout = usbnet_tx_timeout,
1271 .ndo_get_stats64 = dev_get_tstats64,
1272 .ndo_set_mac_address = asix_set_mac_address,
1273 .ndo_validate_addr = eth_validate_addr,
1274 .ndo_set_rx_mode = asix_set_multicast,
1275 .ndo_eth_ioctl = asix_ioctl,
1276 .ndo_change_mtu = ax88178_change_mtu,
1277 };
1278
ax88178_bind(struct usbnet * dev,struct usb_interface * intf)1279 static int ax88178_bind(struct usbnet *dev, struct usb_interface *intf)
1280 {
1281 int ret;
1282 u8 buf[ETH_ALEN] = {0};
1283
1284 usbnet_get_endpoints(dev,intf);
1285
1286 /* Get the MAC address */
1287 ret = asix_read_cmd(dev, AX_CMD_READ_NODE_ID, 0, 0, ETH_ALEN, buf, 0);
1288 if (ret < 0) {
1289 netdev_dbg(dev->net, "Failed to read MAC address: %d\n", ret);
1290 return ret;
1291 }
1292
1293 asix_set_netdev_dev_addr(dev, buf);
1294
1295 /* Initialize MII structure */
1296 dev->mii.dev = dev->net;
1297 dev->mii.mdio_read = asix_mdio_read;
1298 dev->mii.mdio_write = asix_mdio_write;
1299 dev->mii.phy_id_mask = 0x1f;
1300 dev->mii.reg_num_mask = 0xff;
1301 dev->mii.supports_gmii = 1;
1302
1303 dev->mii.phy_id = asix_read_phy_addr(dev, true);
1304 if (dev->mii.phy_id < 0)
1305 return dev->mii.phy_id;
1306
1307 dev->net->netdev_ops = &ax88178_netdev_ops;
1308 dev->net->ethtool_ops = &ax88178_ethtool_ops;
1309 dev->net->max_mtu = 16384 - (dev->net->hard_header_len + 4);
1310
1311 /* Blink LEDS so users know driver saw dongle */
1312 asix_sw_reset(dev, 0, 0);
1313 msleep(150);
1314
1315 asix_sw_reset(dev, AX_SWRESET_PRL | AX_SWRESET_IPPD, 0);
1316 msleep(150);
1317
1318 /* Asix framing packs multiple eth frames into a 2K usb bulk transfer */
1319 if (dev->driver_info->flags & FLAG_FRAMING_AX) {
1320 /* hard_mtu is still the default - the device does not support
1321 jumbo eth frames */
1322 dev->rx_urb_size = 2048;
1323 }
1324
1325 dev->driver_priv = kzalloc(sizeof(struct asix_common_private), GFP_KERNEL);
1326 if (!dev->driver_priv)
1327 return -ENOMEM;
1328
1329 return 0;
1330 }
1331
1332 static const struct driver_info ax8817x_info = {
1333 .description = "ASIX AX8817x USB 2.0 Ethernet",
1334 .bind = ax88172_bind,
1335 .status = asix_status,
1336 .link_reset = ax88172_link_reset,
1337 .reset = ax88172_link_reset,
1338 .flags = FLAG_ETHER | FLAG_LINK_INTR,
1339 .data = 0x00130103,
1340 };
1341
1342 static const struct driver_info dlink_dub_e100_info = {
1343 .description = "DLink DUB-E100 USB Ethernet",
1344 .bind = ax88172_bind,
1345 .status = asix_status,
1346 .link_reset = ax88172_link_reset,
1347 .reset = ax88172_link_reset,
1348 .flags = FLAG_ETHER | FLAG_LINK_INTR,
1349 .data = 0x009f9d9f,
1350 };
1351
1352 static const struct driver_info netgear_fa120_info = {
1353 .description = "Netgear FA-120 USB Ethernet",
1354 .bind = ax88172_bind,
1355 .status = asix_status,
1356 .link_reset = ax88172_link_reset,
1357 .reset = ax88172_link_reset,
1358 .flags = FLAG_ETHER | FLAG_LINK_INTR,
1359 .data = 0x00130103,
1360 };
1361
1362 static const struct driver_info hawking_uf200_info = {
1363 .description = "Hawking UF200 USB Ethernet",
1364 .bind = ax88172_bind,
1365 .status = asix_status,
1366 .link_reset = ax88172_link_reset,
1367 .reset = ax88172_link_reset,
1368 .flags = FLAG_ETHER | FLAG_LINK_INTR,
1369 .data = 0x001f1d1f,
1370 };
1371
1372 static const struct driver_info ax88772_info = {
1373 .description = "ASIX AX88772 USB 2.0 Ethernet",
1374 .bind = ax88772_bind,
1375 .unbind = ax88772_unbind,
1376 .reset = ax88772_reset,
1377 .stop = ax88772_stop,
1378 .flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_MULTI_PACKET,
1379 .rx_fixup = asix_rx_fixup_common,
1380 .tx_fixup = asix_tx_fixup,
1381 };
1382
1383 static const struct driver_info ax88772b_info = {
1384 .description = "ASIX AX88772B USB 2.0 Ethernet",
1385 .bind = ax88772_bind,
1386 .unbind = ax88772_unbind,
1387 .reset = ax88772_reset,
1388 .stop = ax88772_stop,
1389 .flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_MULTI_PACKET,
1390 .rx_fixup = asix_rx_fixup_common,
1391 .tx_fixup = asix_tx_fixup,
1392 .data = FLAG_EEPROM_MAC,
1393 };
1394
1395 static const struct driver_info lxausb_t1l_info = {
1396 .description = "Linux Automation GmbH USB 10Base-T1L",
1397 .bind = ax88772_bind,
1398 .unbind = ax88772_unbind,
1399 .reset = ax88772_reset,
1400 .stop = ax88772_stop,
1401 .flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_MULTI_PACKET,
1402 .rx_fixup = asix_rx_fixup_common,
1403 .tx_fixup = asix_tx_fixup,
1404 .data = FLAG_EEPROM_MAC,
1405 };
1406
1407 static const struct driver_info ax88178_info = {
1408 .description = "ASIX AX88178 USB 2.0 Ethernet",
1409 .bind = ax88178_bind,
1410 .unbind = ax88178_unbind,
1411 .status = asix_status,
1412 .link_reset = ax88178_link_reset,
1413 .reset = ax88178_reset,
1414 .flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_LINK_INTR |
1415 FLAG_MULTI_PACKET,
1416 .rx_fixup = asix_rx_fixup_common,
1417 .tx_fixup = asix_tx_fixup,
1418 };
1419
1420 /*
1421 * USBLINK 20F9 "USB 2.0 LAN" USB ethernet adapter, typically found in
1422 * no-name packaging.
1423 * USB device strings are:
1424 * 1: Manufacturer: USBLINK
1425 * 2: Product: HG20F9 USB2.0
1426 * 3: Serial: 000003
1427 * Appears to be compatible with Asix 88772B.
1428 */
1429 static const struct driver_info hg20f9_info = {
1430 .description = "HG20F9 USB 2.0 Ethernet",
1431 .bind = ax88772_bind,
1432 .unbind = ax88772_unbind,
1433 .reset = ax88772_reset,
1434 .flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_MULTI_PACKET,
1435 .rx_fixup = asix_rx_fixup_common,
1436 .tx_fixup = asix_tx_fixup,
1437 .data = FLAG_EEPROM_MAC,
1438 };
1439
1440 static const struct driver_info lyconsys_fibergecko100_info = {
1441 .description = "LyconSys FiberGecko 100 USB 2.0 to SFP Adapter",
1442 .bind = ax88178_bind,
1443 .status = asix_status,
1444 .link_reset = ax88178_link_reset,
1445 .reset = ax88178_link_reset,
1446 .flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_LINK_INTR |
1447 FLAG_MULTI_PACKET,
1448 .rx_fixup = asix_rx_fixup_common,
1449 .tx_fixup = asix_tx_fixup,
1450 .data = 0x20061201,
1451 };
1452
1453 static const struct usb_device_id products [] = {
1454 {
1455 // Linksys USB200M
1456 USB_DEVICE (0x077b, 0x2226),
1457 .driver_info = (unsigned long) &ax8817x_info,
1458 }, {
1459 // Netgear FA120
1460 USB_DEVICE (0x0846, 0x1040),
1461 .driver_info = (unsigned long) &netgear_fa120_info,
1462 }, {
1463 // DLink DUB-E100
1464 USB_DEVICE (0x2001, 0x1a00),
1465 .driver_info = (unsigned long) &dlink_dub_e100_info,
1466 }, {
1467 // Intellinet, ST Lab USB Ethernet
1468 USB_DEVICE (0x0b95, 0x1720),
1469 .driver_info = (unsigned long) &ax8817x_info,
1470 }, {
1471 // Hawking UF200, TrendNet TU2-ET100
1472 USB_DEVICE (0x07b8, 0x420a),
1473 .driver_info = (unsigned long) &hawking_uf200_info,
1474 }, {
1475 // Billionton Systems, USB2AR
1476 USB_DEVICE (0x08dd, 0x90ff),
1477 .driver_info = (unsigned long) &ax8817x_info,
1478 }, {
1479 // Billionton Systems, GUSB2AM-1G-B
1480 USB_DEVICE(0x08dd, 0x0114),
1481 .driver_info = (unsigned long) &ax88178_info,
1482 }, {
1483 // ATEN UC210T
1484 USB_DEVICE (0x0557, 0x2009),
1485 .driver_info = (unsigned long) &ax8817x_info,
1486 }, {
1487 // Buffalo LUA-U2-KTX
1488 USB_DEVICE (0x0411, 0x003d),
1489 .driver_info = (unsigned long) &ax8817x_info,
1490 }, {
1491 // Buffalo LUA-U2-GT 10/100/1000
1492 USB_DEVICE (0x0411, 0x006e),
1493 .driver_info = (unsigned long) &ax88178_info,
1494 }, {
1495 // Sitecom LN-029 "USB 2.0 10/100 Ethernet adapter"
1496 USB_DEVICE (0x6189, 0x182d),
1497 .driver_info = (unsigned long) &ax8817x_info,
1498 }, {
1499 // Sitecom LN-031 "USB 2.0 10/100/1000 Ethernet adapter"
1500 USB_DEVICE (0x0df6, 0x0056),
1501 .driver_info = (unsigned long) &ax88178_info,
1502 }, {
1503 // Sitecom LN-028 "USB 2.0 10/100/1000 Ethernet adapter"
1504 USB_DEVICE (0x0df6, 0x061c),
1505 .driver_info = (unsigned long) &ax88178_info,
1506 }, {
1507 // corega FEther USB2-TX
1508 USB_DEVICE (0x07aa, 0x0017),
1509 .driver_info = (unsigned long) &ax8817x_info,
1510 }, {
1511 // Surecom EP-1427X-2
1512 USB_DEVICE (0x1189, 0x0893),
1513 .driver_info = (unsigned long) &ax8817x_info,
1514 }, {
1515 // goodway corp usb gwusb2e
1516 USB_DEVICE (0x1631, 0x6200),
1517 .driver_info = (unsigned long) &ax8817x_info,
1518 }, {
1519 // JVC MP-PRX1 Port Replicator
1520 USB_DEVICE (0x04f1, 0x3008),
1521 .driver_info = (unsigned long) &ax8817x_info,
1522 }, {
1523 // Lenovo U2L100P 10/100
1524 USB_DEVICE (0x17ef, 0x7203),
1525 .driver_info = (unsigned long)&ax88772b_info,
1526 }, {
1527 // ASIX AX88772B 10/100
1528 USB_DEVICE (0x0b95, 0x772b),
1529 .driver_info = (unsigned long) &ax88772b_info,
1530 }, {
1531 // ASIX AX88772 10/100
1532 USB_DEVICE (0x0b95, 0x7720),
1533 .driver_info = (unsigned long) &ax88772_info,
1534 }, {
1535 // ASIX AX88178 10/100/1000
1536 USB_DEVICE (0x0b95, 0x1780),
1537 .driver_info = (unsigned long) &ax88178_info,
1538 }, {
1539 // Logitec LAN-GTJ/U2A
1540 USB_DEVICE (0x0789, 0x0160),
1541 .driver_info = (unsigned long) &ax88178_info,
1542 }, {
1543 // Linksys USB200M Rev 2
1544 USB_DEVICE (0x13b1, 0x0018),
1545 .driver_info = (unsigned long) &ax88772_info,
1546 }, {
1547 // 0Q0 cable ethernet
1548 USB_DEVICE (0x1557, 0x7720),
1549 .driver_info = (unsigned long) &ax88772_info,
1550 }, {
1551 // DLink DUB-E100 H/W Ver B1
1552 USB_DEVICE (0x07d1, 0x3c05),
1553 .driver_info = (unsigned long) &ax88772_info,
1554 }, {
1555 // DLink DUB-E100 H/W Ver B1 Alternate
1556 USB_DEVICE (0x2001, 0x3c05),
1557 .driver_info = (unsigned long) &ax88772_info,
1558 }, {
1559 // DLink DUB-E100 H/W Ver C1
1560 USB_DEVICE (0x2001, 0x1a02),
1561 .driver_info = (unsigned long) &ax88772_info,
1562 }, {
1563 // Linksys USB1000
1564 USB_DEVICE (0x1737, 0x0039),
1565 .driver_info = (unsigned long) &ax88178_info,
1566 }, {
1567 // IO-DATA ETG-US2
1568 USB_DEVICE (0x04bb, 0x0930),
1569 .driver_info = (unsigned long) &ax88178_info,
1570 }, {
1571 // Belkin F5D5055
1572 USB_DEVICE(0x050d, 0x5055),
1573 .driver_info = (unsigned long) &ax88178_info,
1574 }, {
1575 // Apple USB Ethernet Adapter
1576 USB_DEVICE(0x05ac, 0x1402),
1577 .driver_info = (unsigned long) &ax88772_info,
1578 }, {
1579 // Cables-to-Go USB Ethernet Adapter
1580 USB_DEVICE(0x0b95, 0x772a),
1581 .driver_info = (unsigned long) &ax88772_info,
1582 }, {
1583 // ABOCOM for pci
1584 USB_DEVICE(0x14ea, 0xab11),
1585 .driver_info = (unsigned long) &ax88178_info,
1586 }, {
1587 // ASIX 88772a
1588 USB_DEVICE(0x0db0, 0xa877),
1589 .driver_info = (unsigned long) &ax88772_info,
1590 }, {
1591 // Asus USB Ethernet Adapter
1592 USB_DEVICE (0x0b95, 0x7e2b),
1593 .driver_info = (unsigned long)&ax88772b_info,
1594 }, {
1595 /* ASIX 88172a demo board */
1596 USB_DEVICE(0x0b95, 0x172a),
1597 .driver_info = (unsigned long) &ax88172a_info,
1598 }, {
1599 /*
1600 * USBLINK HG20F9 "USB 2.0 LAN"
1601 * Appears to have gazumped Linksys's manufacturer ID but
1602 * doesn't (yet) conflict with any known Linksys product.
1603 */
1604 USB_DEVICE(0x066b, 0x20f9),
1605 .driver_info = (unsigned long) &hg20f9_info,
1606 }, {
1607 // Linux Automation GmbH USB 10Base-T1L
1608 USB_DEVICE(0x33f7, 0x0004),
1609 .driver_info = (unsigned long) &lxausb_t1l_info,
1610 }, {
1611 /* LyconSys FiberGecko 100 */
1612 USB_DEVICE(0x1d2a, 0x0801),
1613 .driver_info = (unsigned long) &lyconsys_fibergecko100_info,
1614 },
1615 { }, // END
1616 };
1617 MODULE_DEVICE_TABLE(usb, products);
1618
1619 static struct usb_driver asix_driver = {
1620 .name = DRIVER_NAME,
1621 .id_table = products,
1622 .probe = usbnet_probe,
1623 .suspend = asix_suspend,
1624 .resume = asix_resume,
1625 .reset_resume = asix_resume,
1626 .disconnect = usbnet_disconnect,
1627 /* usbnet enables autosuspend by default (supports_autosuspend=1).
1628 * We keep runtime-PM active for AX88772* by taking a PM usage
1629 * reference in ax88772_bind() (pm_runtime_get_noresume()) and
1630 * dropping it in unbind(), which effectively blocks autosuspend.
1631 */
1632 .supports_autosuspend = 1,
1633 .disable_hub_initiated_lpm = 1,
1634 };
1635
1636 module_usb_driver(asix_driver);
1637
1638 MODULE_AUTHOR("David Hollis");
1639 MODULE_VERSION(DRIVER_VERSION);
1640 MODULE_DESCRIPTION("ASIX AX8817X based USB 2.0 Ethernet Devices");
1641 MODULE_LICENSE("GPL");
1642
1643