xref: /linux/arch/mips/alchemy/common/platform.c (revision a1ff5a7d78a036d6c2178ee5acd6ba4946243800)
1 /*
2  * Platform device support for Au1x00 SoCs.
3  *
4  * Copyright 2004, Matt Porter <mporter@kernel.crashing.org>
5  *
6  * (C) Copyright Embedded Alley Solutions, Inc 2005
7  * Author: Pantelis Antoniou <pantelis@embeddedalley.com>
8  *
9  * This file is licensed under the terms of the GNU General Public
10  * License version 2.  This program is licensed "as is" without any
11  * warranty of any kind, whether express or implied.
12  */
13 
14 #include <linux/clk.h>
15 #include <linux/dma-mapping.h>
16 #include <linux/etherdevice.h>
17 #include <linux/init.h>
18 #include <linux/platform_device.h>
19 #include <linux/serial_8250.h>
20 #include <linux/slab.h>
21 #include <linux/usb/ehci_pdriver.h>
22 #include <linux/usb/ohci_pdriver.h>
23 
24 #include <asm/mach-au1x00/au1000.h>
25 #include <asm/mach-au1x00/au1xxx_dbdma.h>
26 #include <asm/mach-au1x00/au1100_mmc.h>
27 #include <asm/mach-au1x00/au1xxx_eth.h>
28 
29 #include <prom.h>
30 
alchemy_8250_pm(struct uart_port * port,unsigned int state,unsigned int old_state)31 static void alchemy_8250_pm(struct uart_port *port, unsigned int state,
32 			    unsigned int old_state)
33 {
34 #ifdef CONFIG_SERIAL_8250
35 	switch (state) {
36 	case 0:
37 		alchemy_uart_enable(CPHYSADDR(port->membase));
38 		serial8250_do_pm(port, state, old_state);
39 		break;
40 	case 3:		/* power off */
41 		serial8250_do_pm(port, state, old_state);
42 		alchemy_uart_disable(CPHYSADDR(port->membase));
43 		break;
44 	default:
45 		serial8250_do_pm(port, state, old_state);
46 		break;
47 	}
48 #endif
49 }
50 
51 #define PORT(_base, _irq)					\
52 	{							\
53 		.mapbase	= _base,			\
54 		.mapsize	= 0x1000,			\
55 		.irq		= _irq,				\
56 		.regshift	= 2,				\
57 		.flags		= UPF_SKIP_TEST | UPF_IOREMAP | \
58 				  UPF_FIXED_TYPE,		\
59 		.type		= PORT_16550A,			\
60 		.pm		= alchemy_8250_pm,		\
61 	}
62 
63 static struct plat_serial8250_port au1x00_uart_data[][4] __initdata = {
64 	[ALCHEMY_CPU_AU1000] = {
65 		PORT(AU1000_UART0_PHYS_ADDR, AU1000_UART0_INT),
66 		PORT(AU1000_UART1_PHYS_ADDR, AU1000_UART1_INT),
67 		PORT(AU1000_UART2_PHYS_ADDR, AU1000_UART2_INT),
68 		PORT(AU1000_UART3_PHYS_ADDR, AU1000_UART3_INT),
69 	},
70 	[ALCHEMY_CPU_AU1500] = {
71 		PORT(AU1000_UART0_PHYS_ADDR, AU1500_UART0_INT),
72 		PORT(AU1000_UART3_PHYS_ADDR, AU1500_UART3_INT),
73 	},
74 	[ALCHEMY_CPU_AU1100] = {
75 		PORT(AU1000_UART0_PHYS_ADDR, AU1100_UART0_INT),
76 		PORT(AU1000_UART1_PHYS_ADDR, AU1100_UART1_INT),
77 		PORT(AU1000_UART3_PHYS_ADDR, AU1100_UART3_INT),
78 	},
79 	[ALCHEMY_CPU_AU1550] = {
80 		PORT(AU1000_UART0_PHYS_ADDR, AU1550_UART0_INT),
81 		PORT(AU1000_UART1_PHYS_ADDR, AU1550_UART1_INT),
82 		PORT(AU1000_UART3_PHYS_ADDR, AU1550_UART3_INT),
83 	},
84 	[ALCHEMY_CPU_AU1200] = {
85 		PORT(AU1000_UART0_PHYS_ADDR, AU1200_UART0_INT),
86 		PORT(AU1000_UART1_PHYS_ADDR, AU1200_UART1_INT),
87 	},
88 	[ALCHEMY_CPU_AU1300] = {
89 		PORT(AU1300_UART0_PHYS_ADDR, AU1300_UART0_INT),
90 		PORT(AU1300_UART1_PHYS_ADDR, AU1300_UART1_INT),
91 		PORT(AU1300_UART2_PHYS_ADDR, AU1300_UART2_INT),
92 		PORT(AU1300_UART3_PHYS_ADDR, AU1300_UART3_INT),
93 	},
94 };
95 
96 static struct platform_device au1xx0_uart_device = {
97 	.name			= "serial8250",
98 	.id			= PLAT8250_DEV_AU1X00,
99 };
100 
alchemy_setup_uarts(int ctype)101 static void __init alchemy_setup_uarts(int ctype)
102 {
103 	long uartclk;
104 	int s = sizeof(struct plat_serial8250_port);
105 	int c = alchemy_get_uarts(ctype);
106 	struct plat_serial8250_port *ports;
107 	struct clk *clk = clk_get(NULL, ALCHEMY_PERIPH_CLK);
108 
109 	if (IS_ERR(clk))
110 		return;
111 	if (clk_prepare_enable(clk)) {
112 		clk_put(clk);
113 		return;
114 	}
115 	uartclk = clk_get_rate(clk);
116 	clk_put(clk);
117 
118 	ports = kcalloc(s, (c + 1), GFP_KERNEL);
119 	if (!ports) {
120 		printk(KERN_INFO "Alchemy: no memory for UART data\n");
121 		return;
122 	}
123 	memcpy(ports, au1x00_uart_data[ctype], s * c);
124 	au1xx0_uart_device.dev.platform_data = ports;
125 
126 	/* Fill up uartclk. */
127 	for (s = 0; s < c; s++) {
128 		ports[s].uartclk = uartclk;
129 		if (au_platform_setup(&ports[s]) < 0) {
130 			kfree(ports);
131 			printk(KERN_INFO "Alchemy: missing support for UARTs\n");
132 			return;
133 		}
134 	}
135 	if (platform_device_register(&au1xx0_uart_device))
136 		printk(KERN_INFO "Alchemy: failed to register UARTs\n");
137 }
138 
139 
140 static u64 alchemy_all_dmamask = DMA_BIT_MASK(32);
141 
142 /* Power on callback for the ehci platform driver */
alchemy_ehci_power_on(struct platform_device * pdev)143 static int alchemy_ehci_power_on(struct platform_device *pdev)
144 {
145 	return alchemy_usb_control(ALCHEMY_USB_EHCI0, 1);
146 }
147 
148 /* Power off/suspend callback for the ehci platform driver */
alchemy_ehci_power_off(struct platform_device * pdev)149 static void alchemy_ehci_power_off(struct platform_device *pdev)
150 {
151 	alchemy_usb_control(ALCHEMY_USB_EHCI0, 0);
152 }
153 
154 static struct usb_ehci_pdata alchemy_ehci_pdata = {
155 	.no_io_watchdog = 1,
156 	.power_on	= alchemy_ehci_power_on,
157 	.power_off	= alchemy_ehci_power_off,
158 	.power_suspend	= alchemy_ehci_power_off,
159 };
160 
161 /* Power on callback for the ohci platform driver */
alchemy_ohci_power_on(struct platform_device * pdev)162 static int alchemy_ohci_power_on(struct platform_device *pdev)
163 {
164 	int unit;
165 
166 	unit = (pdev->id == 1) ?
167 		ALCHEMY_USB_OHCI1 : ALCHEMY_USB_OHCI0;
168 
169 	return alchemy_usb_control(unit, 1);
170 }
171 
172 /* Power off/suspend callback for the ohci platform driver */
alchemy_ohci_power_off(struct platform_device * pdev)173 static void alchemy_ohci_power_off(struct platform_device *pdev)
174 {
175 	int unit;
176 
177 	unit = (pdev->id == 1) ?
178 		ALCHEMY_USB_OHCI1 : ALCHEMY_USB_OHCI0;
179 
180 	alchemy_usb_control(unit, 0);
181 }
182 
183 static struct usb_ohci_pdata alchemy_ohci_pdata = {
184 	.power_on		= alchemy_ohci_power_on,
185 	.power_off		= alchemy_ohci_power_off,
186 	.power_suspend		= alchemy_ohci_power_off,
187 };
188 
189 static unsigned long alchemy_ohci_data[][2] __initdata = {
190 	[ALCHEMY_CPU_AU1000] = { AU1000_USB_OHCI_PHYS_ADDR, AU1000_USB_HOST_INT },
191 	[ALCHEMY_CPU_AU1500] = { AU1000_USB_OHCI_PHYS_ADDR, AU1500_USB_HOST_INT },
192 	[ALCHEMY_CPU_AU1100] = { AU1000_USB_OHCI_PHYS_ADDR, AU1100_USB_HOST_INT },
193 	[ALCHEMY_CPU_AU1550] = { AU1550_USB_OHCI_PHYS_ADDR, AU1550_USB_HOST_INT },
194 	[ALCHEMY_CPU_AU1200] = { AU1200_USB_OHCI_PHYS_ADDR, AU1200_USB_INT },
195 	[ALCHEMY_CPU_AU1300] = { AU1300_USB_OHCI0_PHYS_ADDR, AU1300_USB_INT },
196 };
197 
198 static unsigned long alchemy_ehci_data[][2] __initdata = {
199 	[ALCHEMY_CPU_AU1200] = { AU1200_USB_EHCI_PHYS_ADDR, AU1200_USB_INT },
200 	[ALCHEMY_CPU_AU1300] = { AU1300_USB_EHCI_PHYS_ADDR, AU1300_USB_INT },
201 };
202 
_new_usbres(struct resource ** r,struct platform_device ** d)203 static int __init _new_usbres(struct resource **r, struct platform_device **d)
204 {
205 	*r = kcalloc(2, sizeof(struct resource), GFP_KERNEL);
206 	if (!*r)
207 		return -ENOMEM;
208 	*d = kzalloc(sizeof(struct platform_device), GFP_KERNEL);
209 	if (!*d) {
210 		kfree(*r);
211 		return -ENOMEM;
212 	}
213 
214 	(*d)->dev.coherent_dma_mask = DMA_BIT_MASK(32);
215 	(*d)->num_resources = 2;
216 	(*d)->resource = *r;
217 
218 	return 0;
219 }
220 
alchemy_setup_usb(int ctype)221 static void __init alchemy_setup_usb(int ctype)
222 {
223 	struct resource *res;
224 	struct platform_device *pdev;
225 
226 	/* setup OHCI0.  Every variant has one */
227 	if (_new_usbres(&res, &pdev))
228 		return;
229 
230 	res[0].start = alchemy_ohci_data[ctype][0];
231 	res[0].end = res[0].start + 0x100 - 1;
232 	res[0].flags = IORESOURCE_MEM;
233 	res[1].start = alchemy_ohci_data[ctype][1];
234 	res[1].end = res[1].start;
235 	res[1].flags = IORESOURCE_IRQ;
236 	pdev->name = "ohci-platform";
237 	pdev->id = 0;
238 	pdev->dev.dma_mask = &alchemy_all_dmamask;
239 	pdev->dev.platform_data = &alchemy_ohci_pdata;
240 
241 	if (platform_device_register(pdev))
242 		printk(KERN_INFO "Alchemy USB: cannot add OHCI0\n");
243 
244 
245 	/* setup EHCI0: Au1200/Au1300 */
246 	if ((ctype == ALCHEMY_CPU_AU1200) || (ctype == ALCHEMY_CPU_AU1300)) {
247 		if (_new_usbres(&res, &pdev))
248 			return;
249 
250 		res[0].start = alchemy_ehci_data[ctype][0];
251 		res[0].end = res[0].start + 0x100 - 1;
252 		res[0].flags = IORESOURCE_MEM;
253 		res[1].start = alchemy_ehci_data[ctype][1];
254 		res[1].end = res[1].start;
255 		res[1].flags = IORESOURCE_IRQ;
256 		pdev->name = "ehci-platform";
257 		pdev->id = 0;
258 		pdev->dev.dma_mask = &alchemy_all_dmamask;
259 		pdev->dev.platform_data = &alchemy_ehci_pdata;
260 
261 		if (platform_device_register(pdev))
262 			printk(KERN_INFO "Alchemy USB: cannot add EHCI0\n");
263 	}
264 
265 	/* Au1300: OHCI1 */
266 	if (ctype == ALCHEMY_CPU_AU1300) {
267 		if (_new_usbres(&res, &pdev))
268 			return;
269 
270 		res[0].start = AU1300_USB_OHCI1_PHYS_ADDR;
271 		res[0].end = res[0].start + 0x100 - 1;
272 		res[0].flags = IORESOURCE_MEM;
273 		res[1].start = AU1300_USB_INT;
274 		res[1].end = res[1].start;
275 		res[1].flags = IORESOURCE_IRQ;
276 		pdev->name = "ohci-platform";
277 		pdev->id = 1;
278 		pdev->dev.dma_mask = &alchemy_all_dmamask;
279 		pdev->dev.platform_data = &alchemy_ohci_pdata;
280 
281 		if (platform_device_register(pdev))
282 			printk(KERN_INFO "Alchemy USB: cannot add OHCI1\n");
283 	}
284 }
285 
286 /* Macro to help defining the Ethernet MAC resources */
287 #define MAC_RES_COUNT	4	/* MAC regs, MAC en, MAC INT, MACDMA regs */
288 #define MAC_RES(_base, _enable, _irq, _macdma)		\
289 	{						\
290 		.start	= _base,			\
291 		.end	= _base + 0xffff,		\
292 		.flags	= IORESOURCE_MEM,		\
293 	},						\
294 	{						\
295 		.start	= _enable,			\
296 		.end	= _enable + 0x3,		\
297 		.flags	= IORESOURCE_MEM,		\
298 	},						\
299 	{						\
300 		.start	= _irq,				\
301 		.end	= _irq,				\
302 		.flags	= IORESOURCE_IRQ		\
303 	},						\
304 	{						\
305 		.start	= _macdma,			\
306 		.end	= _macdma + 0x1ff,		\
307 		.flags	= IORESOURCE_MEM,		\
308 	}
309 
310 static struct resource au1xxx_eth0_resources[][MAC_RES_COUNT] __initdata = {
311 	[ALCHEMY_CPU_AU1000] = {
312 		MAC_RES(AU1000_MAC0_PHYS_ADDR,
313 			AU1000_MACEN_PHYS_ADDR,
314 			AU1000_MAC0_DMA_INT,
315 			AU1000_MACDMA0_PHYS_ADDR)
316 	},
317 	[ALCHEMY_CPU_AU1500] = {
318 		MAC_RES(AU1500_MAC0_PHYS_ADDR,
319 			AU1500_MACEN_PHYS_ADDR,
320 			AU1500_MAC0_DMA_INT,
321 			AU1000_MACDMA0_PHYS_ADDR)
322 	},
323 	[ALCHEMY_CPU_AU1100] = {
324 		MAC_RES(AU1000_MAC0_PHYS_ADDR,
325 			AU1000_MACEN_PHYS_ADDR,
326 			AU1100_MAC0_DMA_INT,
327 			AU1000_MACDMA0_PHYS_ADDR)
328 	},
329 	[ALCHEMY_CPU_AU1550] = {
330 		MAC_RES(AU1000_MAC0_PHYS_ADDR,
331 			AU1000_MACEN_PHYS_ADDR,
332 			AU1550_MAC0_DMA_INT,
333 			AU1000_MACDMA0_PHYS_ADDR)
334 	},
335 };
336 
337 static struct au1000_eth_platform_data au1xxx_eth0_platform_data = {
338 	.phy1_search_mac0 = 1,
339 };
340 
341 static struct platform_device au1xxx_eth0_device = {
342 	.name		= "au1000-eth",
343 	.id		= 0,
344 	.num_resources	= MAC_RES_COUNT,
345 	.dev = {
346 		.dma_mask               = &alchemy_all_dmamask,
347 		.coherent_dma_mask      = DMA_BIT_MASK(32),
348 		.platform_data          = &au1xxx_eth0_platform_data,
349 	},
350 };
351 
352 static struct resource au1xxx_eth1_resources[][MAC_RES_COUNT] __initdata = {
353 	[ALCHEMY_CPU_AU1000] = {
354 		MAC_RES(AU1000_MAC1_PHYS_ADDR,
355 			AU1000_MACEN_PHYS_ADDR + 4,
356 			AU1000_MAC1_DMA_INT,
357 			AU1000_MACDMA1_PHYS_ADDR)
358 	},
359 	[ALCHEMY_CPU_AU1500] = {
360 		MAC_RES(AU1500_MAC1_PHYS_ADDR,
361 			AU1500_MACEN_PHYS_ADDR + 4,
362 			AU1500_MAC1_DMA_INT,
363 			AU1000_MACDMA1_PHYS_ADDR)
364 	},
365 	[ALCHEMY_CPU_AU1550] = {
366 		MAC_RES(AU1000_MAC1_PHYS_ADDR,
367 			AU1000_MACEN_PHYS_ADDR + 4,
368 			AU1550_MAC1_DMA_INT,
369 			AU1000_MACDMA1_PHYS_ADDR)
370 	},
371 };
372 
373 static struct au1000_eth_platform_data au1xxx_eth1_platform_data = {
374 	.phy1_search_mac0 = 1,
375 };
376 
377 static struct platform_device au1xxx_eth1_device = {
378 	.name		= "au1000-eth",
379 	.id		= 1,
380 	.num_resources	= MAC_RES_COUNT,
381 	.dev = {
382 		.dma_mask               = &alchemy_all_dmamask,
383 		.coherent_dma_mask      = DMA_BIT_MASK(32),
384 		.platform_data          = &au1xxx_eth1_platform_data,
385 	},
386 };
387 
au1xxx_override_eth_cfg(unsigned int port,struct au1000_eth_platform_data * eth_data)388 void __init au1xxx_override_eth_cfg(unsigned int port,
389 			struct au1000_eth_platform_data *eth_data)
390 {
391 	if (!eth_data || port > 1)
392 		return;
393 
394 	if (port == 0)
395 		memcpy(&au1xxx_eth0_platform_data, eth_data,
396 			sizeof(struct au1000_eth_platform_data));
397 	else
398 		memcpy(&au1xxx_eth1_platform_data, eth_data,
399 			sizeof(struct au1000_eth_platform_data));
400 }
401 
alchemy_setup_macs(int ctype)402 static void __init alchemy_setup_macs(int ctype)
403 {
404 	int ret, i;
405 	unsigned char ethaddr[6];
406 	struct resource *macres;
407 
408 	/* Handle 1st MAC */
409 	if (alchemy_get_macs(ctype) < 1)
410 		return;
411 
412 	macres = kmemdup_array(au1xxx_eth0_resources[ctype], MAC_RES_COUNT,
413 			       sizeof(*macres), GFP_KERNEL);
414 	if (!macres) {
415 		printk(KERN_INFO "Alchemy: no memory for MAC0 resources\n");
416 		return;
417 	}
418 	au1xxx_eth0_device.resource = macres;
419 
420 	i = prom_get_ethernet_addr(ethaddr);
421 	if (!i && !is_valid_ether_addr(au1xxx_eth0_platform_data.mac))
422 		memcpy(au1xxx_eth0_platform_data.mac, ethaddr, 6);
423 
424 	ret = platform_device_register(&au1xxx_eth0_device);
425 	if (ret)
426 		printk(KERN_INFO "Alchemy: failed to register MAC0\n");
427 
428 
429 	/* Handle 2nd MAC */
430 	if (alchemy_get_macs(ctype) < 2)
431 		return;
432 
433 	macres = kmemdup_array(au1xxx_eth1_resources[ctype], MAC_RES_COUNT,
434 			       sizeof(*macres), GFP_KERNEL);
435 	if (!macres) {
436 		printk(KERN_INFO "Alchemy: no memory for MAC1 resources\n");
437 		return;
438 	}
439 	au1xxx_eth1_device.resource = macres;
440 
441 	ethaddr[5] += 1;	/* next addr for 2nd MAC */
442 	if (!i && !is_valid_ether_addr(au1xxx_eth1_platform_data.mac))
443 		memcpy(au1xxx_eth1_platform_data.mac, ethaddr, 6);
444 
445 	/* Register second MAC if enabled in pinfunc */
446 	if (!(alchemy_rdsys(AU1000_SYS_PINFUNC) & SYS_PF_NI2)) {
447 		ret = platform_device_register(&au1xxx_eth1_device);
448 		if (ret)
449 			printk(KERN_INFO "Alchemy: failed to register MAC1\n");
450 	}
451 }
452 
au1xxx_platform_init(void)453 static int __init au1xxx_platform_init(void)
454 {
455 	int ctype = alchemy_get_cputype();
456 
457 	alchemy_setup_uarts(ctype);
458 	alchemy_setup_macs(ctype);
459 	alchemy_setup_usb(ctype);
460 
461 	return 0;
462 }
463 
464 arch_initcall(au1xxx_platform_init);
465