1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * Copyright(c) 2007 Atheros Corporation. All rights reserved.
4 *
5 * Derived from Intel e1000 driver
6 * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
7 */
8
9 #include "atl1e.h"
10
11 char atl1e_driver_name[] = "ATL1E";
12 #define PCI_DEVICE_ID_ATTANSIC_L1E 0x1026
13 /*
14 * atl1e_pci_tbl - PCI Device ID Table
15 *
16 * Wildcard entries (PCI_ANY_ID) should come last
17 * Last entry must be all 0s
18 *
19 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
20 * Class, Class Mask, private data (not used) }
21 */
22 static const struct pci_device_id atl1e_pci_tbl[] = {
23 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L1E)},
24 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, 0x1066)},
25 /* required last entry */
26 { 0 }
27 };
28 MODULE_DEVICE_TABLE(pci, atl1e_pci_tbl);
29
30 MODULE_AUTHOR("Atheros Corporation, <xiong.huang@atheros.com>, Jie Yang <jie.yang@atheros.com>");
31 MODULE_DESCRIPTION("Atheros 1000M Ethernet Network Driver");
32 MODULE_LICENSE("GPL");
33
34 static void atl1e_setup_mac_ctrl(struct atl1e_adapter *adapter);
35
36 static const u16
37 atl1e_rx_page_vld_regs[AT_MAX_RECEIVE_QUEUE][AT_PAGE_NUM_PER_QUEUE] =
38 {
39 {REG_HOST_RXF0_PAGE0_VLD, REG_HOST_RXF0_PAGE1_VLD},
40 {REG_HOST_RXF1_PAGE0_VLD, REG_HOST_RXF1_PAGE1_VLD},
41 {REG_HOST_RXF2_PAGE0_VLD, REG_HOST_RXF2_PAGE1_VLD},
42 {REG_HOST_RXF3_PAGE0_VLD, REG_HOST_RXF3_PAGE1_VLD}
43 };
44
45 static const u16 atl1e_rx_page_hi_addr_regs[AT_MAX_RECEIVE_QUEUE] =
46 {
47 REG_RXF0_BASE_ADDR_HI,
48 REG_RXF1_BASE_ADDR_HI,
49 REG_RXF2_BASE_ADDR_HI,
50 REG_RXF3_BASE_ADDR_HI
51 };
52
53 static const u16
54 atl1e_rx_page_lo_addr_regs[AT_MAX_RECEIVE_QUEUE][AT_PAGE_NUM_PER_QUEUE] =
55 {
56 {REG_HOST_RXF0_PAGE0_LO, REG_HOST_RXF0_PAGE1_LO},
57 {REG_HOST_RXF1_PAGE0_LO, REG_HOST_RXF1_PAGE1_LO},
58 {REG_HOST_RXF2_PAGE0_LO, REG_HOST_RXF2_PAGE1_LO},
59 {REG_HOST_RXF3_PAGE0_LO, REG_HOST_RXF3_PAGE1_LO}
60 };
61
62 static const u16
63 atl1e_rx_page_write_offset_regs[AT_MAX_RECEIVE_QUEUE][AT_PAGE_NUM_PER_QUEUE] =
64 {
65 {REG_HOST_RXF0_MB0_LO, REG_HOST_RXF0_MB1_LO},
66 {REG_HOST_RXF1_MB0_LO, REG_HOST_RXF1_MB1_LO},
67 {REG_HOST_RXF2_MB0_LO, REG_HOST_RXF2_MB1_LO},
68 {REG_HOST_RXF3_MB0_LO, REG_HOST_RXF3_MB1_LO}
69 };
70
71 static const u16 atl1e_pay_load_size[] = {
72 128, 256, 512, 1024, 2048, 4096,
73 };
74
75 /**
76 * atl1e_irq_enable - Enable default interrupt generation settings
77 * @adapter: board private structure
78 */
atl1e_irq_enable(struct atl1e_adapter * adapter)79 static inline void atl1e_irq_enable(struct atl1e_adapter *adapter)
80 {
81 if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
82 AT_WRITE_REG(&adapter->hw, REG_ISR, 0);
83 AT_WRITE_REG(&adapter->hw, REG_IMR, IMR_NORMAL_MASK);
84 AT_WRITE_FLUSH(&adapter->hw);
85 }
86 }
87
88 /**
89 * atl1e_irq_disable - Mask off interrupt generation on the NIC
90 * @adapter: board private structure
91 */
atl1e_irq_disable(struct atl1e_adapter * adapter)92 static inline void atl1e_irq_disable(struct atl1e_adapter *adapter)
93 {
94 atomic_inc(&adapter->irq_sem);
95 AT_WRITE_REG(&adapter->hw, REG_IMR, 0);
96 AT_WRITE_FLUSH(&adapter->hw);
97 synchronize_irq(adapter->pdev->irq);
98 }
99
100 /**
101 * atl1e_irq_reset - reset interrupt confiure on the NIC
102 * @adapter: board private structure
103 */
atl1e_irq_reset(struct atl1e_adapter * adapter)104 static inline void atl1e_irq_reset(struct atl1e_adapter *adapter)
105 {
106 atomic_set(&adapter->irq_sem, 0);
107 AT_WRITE_REG(&adapter->hw, REG_ISR, 0);
108 AT_WRITE_REG(&adapter->hw, REG_IMR, 0);
109 AT_WRITE_FLUSH(&adapter->hw);
110 }
111
112 /**
113 * atl1e_phy_config - Timer Call-back
114 * @t: timer list containing pointer to netdev cast into an unsigned long
115 */
atl1e_phy_config(struct timer_list * t)116 static void atl1e_phy_config(struct timer_list *t)
117 {
118 struct atl1e_adapter *adapter = timer_container_of(adapter, t,
119 phy_config_timer);
120 struct atl1e_hw *hw = &adapter->hw;
121 unsigned long flags;
122
123 spin_lock_irqsave(&adapter->mdio_lock, flags);
124 atl1e_restart_autoneg(hw);
125 spin_unlock_irqrestore(&adapter->mdio_lock, flags);
126 }
127
atl1e_reinit_locked(struct atl1e_adapter * adapter)128 void atl1e_reinit_locked(struct atl1e_adapter *adapter)
129 {
130 while (test_and_set_bit(__AT_RESETTING, &adapter->flags))
131 msleep(1);
132 atl1e_down(adapter);
133 atl1e_up(adapter);
134 clear_bit(__AT_RESETTING, &adapter->flags);
135 }
136
atl1e_reset_task(struct work_struct * work)137 static void atl1e_reset_task(struct work_struct *work)
138 {
139 struct atl1e_adapter *adapter;
140 adapter = container_of(work, struct atl1e_adapter, reset_task);
141
142 atl1e_reinit_locked(adapter);
143 }
144
atl1e_check_link(struct atl1e_adapter * adapter)145 static int atl1e_check_link(struct atl1e_adapter *adapter)
146 {
147 struct atl1e_hw *hw = &adapter->hw;
148 struct net_device *netdev = adapter->netdev;
149 int err = 0;
150 u16 speed, duplex, phy_data;
151
152 /* MII_BMSR must read twice */
153 atl1e_read_phy_reg(hw, MII_BMSR, &phy_data);
154 atl1e_read_phy_reg(hw, MII_BMSR, &phy_data);
155 if ((phy_data & BMSR_LSTATUS) == 0) {
156 /* link down */
157 if (netif_carrier_ok(netdev)) { /* old link state: Up */
158 u32 value;
159 /* disable rx */
160 value = AT_READ_REG(hw, REG_MAC_CTRL);
161 value &= ~MAC_CTRL_RX_EN;
162 AT_WRITE_REG(hw, REG_MAC_CTRL, value);
163 adapter->link_speed = SPEED_0;
164 netif_carrier_off(netdev);
165 netif_stop_queue(netdev);
166 }
167 } else {
168 /* Link Up */
169 err = atl1e_get_speed_and_duplex(hw, &speed, &duplex);
170 if (unlikely(err))
171 return err;
172
173 /* link result is our setting */
174 if (adapter->link_speed != speed ||
175 adapter->link_duplex != duplex) {
176 adapter->link_speed = speed;
177 adapter->link_duplex = duplex;
178 atl1e_setup_mac_ctrl(adapter);
179 netdev_info(netdev,
180 "NIC Link is Up <%d Mbps %s Duplex>\n",
181 adapter->link_speed,
182 adapter->link_duplex == FULL_DUPLEX ?
183 "Full" : "Half");
184 }
185
186 if (!netif_carrier_ok(netdev)) {
187 /* Link down -> Up */
188 netif_carrier_on(netdev);
189 netif_wake_queue(netdev);
190 }
191 }
192 return 0;
193 }
194
195 /**
196 * atl1e_link_chg_task - deal with link change event Out of interrupt context
197 * @work: work struct with driver info
198 */
atl1e_link_chg_task(struct work_struct * work)199 static void atl1e_link_chg_task(struct work_struct *work)
200 {
201 struct atl1e_adapter *adapter;
202 unsigned long flags;
203
204 adapter = container_of(work, struct atl1e_adapter, link_chg_task);
205 spin_lock_irqsave(&adapter->mdio_lock, flags);
206 atl1e_check_link(adapter);
207 spin_unlock_irqrestore(&adapter->mdio_lock, flags);
208 }
209
atl1e_link_chg_event(struct atl1e_adapter * adapter)210 static void atl1e_link_chg_event(struct atl1e_adapter *adapter)
211 {
212 struct net_device *netdev = adapter->netdev;
213 u16 phy_data = 0;
214 u16 link_up = 0;
215
216 spin_lock(&adapter->mdio_lock);
217 atl1e_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data);
218 atl1e_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data);
219 spin_unlock(&adapter->mdio_lock);
220 link_up = phy_data & BMSR_LSTATUS;
221 /* notify upper layer link down ASAP */
222 if (!link_up) {
223 if (netif_carrier_ok(netdev)) {
224 /* old link state: Up */
225 netdev_info(netdev, "NIC Link is Down\n");
226 adapter->link_speed = SPEED_0;
227 netif_stop_queue(netdev);
228 }
229 }
230 schedule_work(&adapter->link_chg_task);
231 }
232
atl1e_del_timer(struct atl1e_adapter * adapter)233 static void atl1e_del_timer(struct atl1e_adapter *adapter)
234 {
235 timer_delete_sync(&adapter->phy_config_timer);
236 }
237
atl1e_cancel_work(struct atl1e_adapter * adapter)238 static void atl1e_cancel_work(struct atl1e_adapter *adapter)
239 {
240 cancel_work_sync(&adapter->reset_task);
241 cancel_work_sync(&adapter->link_chg_task);
242 }
243
244 /**
245 * atl1e_tx_timeout - Respond to a Tx Hang
246 * @netdev: network interface device structure
247 * @txqueue: the index of the hanging queue
248 */
atl1e_tx_timeout(struct net_device * netdev,unsigned int txqueue)249 static void atl1e_tx_timeout(struct net_device *netdev, unsigned int txqueue)
250 {
251 struct atl1e_adapter *adapter = netdev_priv(netdev);
252
253 /* Do the reset outside of interrupt context */
254 schedule_work(&adapter->reset_task);
255 }
256
257 /**
258 * atl1e_set_multi - Multicast and Promiscuous mode set
259 * @netdev: network interface device structure
260 *
261 * The set_multi entry point is called whenever the multicast address
262 * list or the network interface flags are updated. This routine is
263 * responsible for configuring the hardware for proper multicast,
264 * promiscuous mode, and all-multi behavior.
265 */
atl1e_set_multi(struct net_device * netdev)266 static void atl1e_set_multi(struct net_device *netdev)
267 {
268 struct atl1e_adapter *adapter = netdev_priv(netdev);
269 struct atl1e_hw *hw = &adapter->hw;
270 struct netdev_hw_addr *ha;
271 u32 mac_ctrl_data = 0;
272 u32 hash_value;
273
274 /* Check for Promiscuous and All Multicast modes */
275 mac_ctrl_data = AT_READ_REG(hw, REG_MAC_CTRL);
276
277 if (netdev->flags & IFF_PROMISC) {
278 mac_ctrl_data |= MAC_CTRL_PROMIS_EN;
279 } else if (netdev->flags & IFF_ALLMULTI) {
280 mac_ctrl_data |= MAC_CTRL_MC_ALL_EN;
281 mac_ctrl_data &= ~MAC_CTRL_PROMIS_EN;
282 } else {
283 mac_ctrl_data &= ~(MAC_CTRL_PROMIS_EN | MAC_CTRL_MC_ALL_EN);
284 }
285
286 AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data);
287
288 /* clear the old settings from the multicast hash table */
289 AT_WRITE_REG(hw, REG_RX_HASH_TABLE, 0);
290 AT_WRITE_REG_ARRAY(hw, REG_RX_HASH_TABLE, 1, 0);
291
292 /* comoute mc addresses' hash value ,and put it into hash table */
293 netdev_for_each_mc_addr(ha, netdev) {
294 hash_value = atl1e_hash_mc_addr(hw, ha->addr);
295 atl1e_hash_set(hw, hash_value);
296 }
297 }
298
__atl1e_rx_mode(netdev_features_t features,u32 * mac_ctrl_data)299 static void __atl1e_rx_mode(netdev_features_t features, u32 *mac_ctrl_data)
300 {
301
302 if (features & NETIF_F_RXALL) {
303 /* enable RX of ALL frames */
304 *mac_ctrl_data |= MAC_CTRL_DBG;
305 } else {
306 /* disable RX of ALL frames */
307 *mac_ctrl_data &= ~MAC_CTRL_DBG;
308 }
309 }
310
atl1e_rx_mode(struct net_device * netdev,netdev_features_t features)311 static void atl1e_rx_mode(struct net_device *netdev,
312 netdev_features_t features)
313 {
314 struct atl1e_adapter *adapter = netdev_priv(netdev);
315 u32 mac_ctrl_data = 0;
316
317 netdev_dbg(adapter->netdev, "%s\n", __func__);
318
319 atl1e_irq_disable(adapter);
320 mac_ctrl_data = AT_READ_REG(&adapter->hw, REG_MAC_CTRL);
321 __atl1e_rx_mode(features, &mac_ctrl_data);
322 AT_WRITE_REG(&adapter->hw, REG_MAC_CTRL, mac_ctrl_data);
323 atl1e_irq_enable(adapter);
324 }
325
326
__atl1e_vlan_mode(netdev_features_t features,u32 * mac_ctrl_data)327 static void __atl1e_vlan_mode(netdev_features_t features, u32 *mac_ctrl_data)
328 {
329 if (features & NETIF_F_HW_VLAN_CTAG_RX) {
330 /* enable VLAN tag insert/strip */
331 *mac_ctrl_data |= MAC_CTRL_RMV_VLAN;
332 } else {
333 /* disable VLAN tag insert/strip */
334 *mac_ctrl_data &= ~MAC_CTRL_RMV_VLAN;
335 }
336 }
337
atl1e_vlan_mode(struct net_device * netdev,netdev_features_t features)338 static void atl1e_vlan_mode(struct net_device *netdev,
339 netdev_features_t features)
340 {
341 struct atl1e_adapter *adapter = netdev_priv(netdev);
342 u32 mac_ctrl_data = 0;
343
344 netdev_dbg(adapter->netdev, "%s\n", __func__);
345
346 atl1e_irq_disable(adapter);
347 mac_ctrl_data = AT_READ_REG(&adapter->hw, REG_MAC_CTRL);
348 __atl1e_vlan_mode(features, &mac_ctrl_data);
349 AT_WRITE_REG(&adapter->hw, REG_MAC_CTRL, mac_ctrl_data);
350 atl1e_irq_enable(adapter);
351 }
352
atl1e_restore_vlan(struct atl1e_adapter * adapter)353 static void atl1e_restore_vlan(struct atl1e_adapter *adapter)
354 {
355 netdev_dbg(adapter->netdev, "%s\n", __func__);
356 atl1e_vlan_mode(adapter->netdev, adapter->netdev->features);
357 }
358
359 /**
360 * atl1e_set_mac_addr - Change the Ethernet Address of the NIC
361 * @netdev: network interface device structure
362 * @p: pointer to an address structure
363 *
364 * Returns 0 on success, negative on failure
365 */
atl1e_set_mac_addr(struct net_device * netdev,void * p)366 static int atl1e_set_mac_addr(struct net_device *netdev, void *p)
367 {
368 struct atl1e_adapter *adapter = netdev_priv(netdev);
369 struct sockaddr *addr = p;
370
371 if (!is_valid_ether_addr(addr->sa_data))
372 return -EADDRNOTAVAIL;
373
374 if (netif_running(netdev))
375 return -EBUSY;
376
377 eth_hw_addr_set(netdev, addr->sa_data);
378 memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
379
380 atl1e_hw_set_mac_addr(&adapter->hw);
381
382 return 0;
383 }
384
atl1e_fix_features(struct net_device * netdev,netdev_features_t features)385 static netdev_features_t atl1e_fix_features(struct net_device *netdev,
386 netdev_features_t features)
387 {
388 /*
389 * Since there is no support for separate rx/tx vlan accel
390 * enable/disable make sure tx flag is always in same state as rx.
391 */
392 if (features & NETIF_F_HW_VLAN_CTAG_RX)
393 features |= NETIF_F_HW_VLAN_CTAG_TX;
394 else
395 features &= ~NETIF_F_HW_VLAN_CTAG_TX;
396
397 return features;
398 }
399
atl1e_set_features(struct net_device * netdev,netdev_features_t features)400 static int atl1e_set_features(struct net_device *netdev,
401 netdev_features_t features)
402 {
403 netdev_features_t changed = netdev->features ^ features;
404
405 if (changed & NETIF_F_HW_VLAN_CTAG_RX)
406 atl1e_vlan_mode(netdev, features);
407
408 if (changed & NETIF_F_RXALL)
409 atl1e_rx_mode(netdev, features);
410
411
412 return 0;
413 }
414
415 /**
416 * atl1e_change_mtu - Change the Maximum Transfer Unit
417 * @netdev: network interface device structure
418 * @new_mtu: new value for maximum frame size
419 *
420 * Returns 0 on success, negative on failure
421 */
atl1e_change_mtu(struct net_device * netdev,int new_mtu)422 static int atl1e_change_mtu(struct net_device *netdev, int new_mtu)
423 {
424 struct atl1e_adapter *adapter = netdev_priv(netdev);
425 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
426
427 /* set MTU */
428 if (netif_running(netdev)) {
429 while (test_and_set_bit(__AT_RESETTING, &adapter->flags))
430 msleep(1);
431 WRITE_ONCE(netdev->mtu, new_mtu);
432 adapter->hw.max_frame_size = new_mtu;
433 adapter->hw.rx_jumbo_th = (max_frame + 7) >> 3;
434 atl1e_down(adapter);
435 atl1e_up(adapter);
436 clear_bit(__AT_RESETTING, &adapter->flags);
437 }
438 return 0;
439 }
440
441 /*
442 * caller should hold mdio_lock
443 */
atl1e_mdio_read(struct net_device * netdev,int phy_id,int reg_num)444 static int atl1e_mdio_read(struct net_device *netdev, int phy_id, int reg_num)
445 {
446 struct atl1e_adapter *adapter = netdev_priv(netdev);
447 u16 result;
448
449 atl1e_read_phy_reg(&adapter->hw, reg_num & MDIO_REG_ADDR_MASK, &result);
450 return result;
451 }
452
atl1e_mdio_write(struct net_device * netdev,int phy_id,int reg_num,int val)453 static void atl1e_mdio_write(struct net_device *netdev, int phy_id,
454 int reg_num, int val)
455 {
456 struct atl1e_adapter *adapter = netdev_priv(netdev);
457
458 if (atl1e_write_phy_reg(&adapter->hw,
459 reg_num & MDIO_REG_ADDR_MASK, val))
460 netdev_err(netdev, "write phy register failed\n");
461 }
462
atl1e_mii_ioctl(struct net_device * netdev,struct ifreq * ifr,int cmd)463 static int atl1e_mii_ioctl(struct net_device *netdev,
464 struct ifreq *ifr, int cmd)
465 {
466 struct atl1e_adapter *adapter = netdev_priv(netdev);
467 struct mii_ioctl_data *data = if_mii(ifr);
468 unsigned long flags;
469 int retval = 0;
470
471 if (!netif_running(netdev))
472 return -EINVAL;
473
474 spin_lock_irqsave(&adapter->mdio_lock, flags);
475 switch (cmd) {
476 case SIOCGMIIPHY:
477 data->phy_id = 0;
478 break;
479
480 case SIOCGMIIREG:
481 if (atl1e_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
482 &data->val_out)) {
483 retval = -EIO;
484 goto out;
485 }
486 break;
487
488 case SIOCSMIIREG:
489 if (data->reg_num & ~(0x1F)) {
490 retval = -EFAULT;
491 goto out;
492 }
493
494 netdev_dbg(adapter->netdev, "<atl1e_mii_ioctl> write %x %x\n",
495 data->reg_num, data->val_in);
496 if (atl1e_write_phy_reg(&adapter->hw,
497 data->reg_num, data->val_in)) {
498 retval = -EIO;
499 goto out;
500 }
501 break;
502
503 default:
504 retval = -EOPNOTSUPP;
505 break;
506 }
507 out:
508 spin_unlock_irqrestore(&adapter->mdio_lock, flags);
509 return retval;
510
511 }
512
atl1e_ioctl(struct net_device * netdev,struct ifreq * ifr,int cmd)513 static int atl1e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
514 {
515 switch (cmd) {
516 case SIOCGMIIPHY:
517 case SIOCGMIIREG:
518 case SIOCSMIIREG:
519 return atl1e_mii_ioctl(netdev, ifr, cmd);
520 default:
521 return -EOPNOTSUPP;
522 }
523 }
524
atl1e_setup_pcicmd(struct pci_dev * pdev)525 static void atl1e_setup_pcicmd(struct pci_dev *pdev)
526 {
527 u16 cmd;
528
529 pci_read_config_word(pdev, PCI_COMMAND, &cmd);
530 cmd &= ~(PCI_COMMAND_INTX_DISABLE | PCI_COMMAND_IO);
531 cmd |= (PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER);
532 pci_write_config_word(pdev, PCI_COMMAND, cmd);
533
534 /*
535 * some motherboards BIOS(PXE/EFI) driver may set PME
536 * while they transfer control to OS (Windows/Linux)
537 * so we should clear this bit before NIC work normally
538 */
539 pci_write_config_dword(pdev, REG_PM_CTRLSTAT, 0);
540 msleep(1);
541 }
542
543 /**
544 * atl1e_alloc_queues - Allocate memory for all rings
545 * @adapter: board private structure to initialize
546 *
547 */
atl1e_alloc_queues(struct atl1e_adapter * adapter)548 static int atl1e_alloc_queues(struct atl1e_adapter *adapter)
549 {
550 return 0;
551 }
552
553 /**
554 * atl1e_sw_init - Initialize general software structures (struct atl1e_adapter)
555 * @adapter: board private structure to initialize
556 *
557 * atl1e_sw_init initializes the Adapter private data structure.
558 * Fields are initialized based on PCI device information and
559 * OS network device settings (MTU size).
560 */
atl1e_sw_init(struct atl1e_adapter * adapter)561 static int atl1e_sw_init(struct atl1e_adapter *adapter)
562 {
563 struct atl1e_hw *hw = &adapter->hw;
564 struct pci_dev *pdev = adapter->pdev;
565 u32 phy_status_data = 0;
566
567 adapter->wol = 0;
568 adapter->link_speed = SPEED_0; /* hardware init */
569 adapter->link_duplex = FULL_DUPLEX;
570 adapter->num_rx_queues = 1;
571
572 /* PCI config space info */
573 hw->vendor_id = pdev->vendor;
574 hw->device_id = pdev->device;
575 hw->subsystem_vendor_id = pdev->subsystem_vendor;
576 hw->subsystem_id = pdev->subsystem_device;
577 hw->revision_id = pdev->revision;
578
579 pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
580
581 phy_status_data = AT_READ_REG(hw, REG_PHY_STATUS);
582 /* nic type */
583 if (hw->revision_id >= 0xF0) {
584 hw->nic_type = athr_l2e_revB;
585 } else {
586 if (phy_status_data & PHY_STATUS_100M)
587 hw->nic_type = athr_l1e;
588 else
589 hw->nic_type = athr_l2e_revA;
590 }
591
592 phy_status_data = AT_READ_REG(hw, REG_PHY_STATUS);
593
594 if (phy_status_data & PHY_STATUS_EMI_CA)
595 hw->emi_ca = true;
596 else
597 hw->emi_ca = false;
598
599 hw->phy_configured = false;
600 hw->preamble_len = 7;
601 hw->max_frame_size = adapter->netdev->mtu;
602 hw->rx_jumbo_th = (hw->max_frame_size + ETH_HLEN +
603 VLAN_HLEN + ETH_FCS_LEN + 7) >> 3;
604
605 hw->rrs_type = atl1e_rrs_disable;
606 hw->indirect_tab = 0;
607 hw->base_cpu = 0;
608
609 /* need confirm */
610
611 hw->ict = 50000; /* 100ms */
612 hw->smb_timer = 200000; /* 200ms */
613 hw->tpd_burst = 5;
614 hw->rrd_thresh = 1;
615 hw->tpd_thresh = adapter->tx_ring.count / 2;
616 hw->rx_count_down = 4; /* 2us resolution */
617 hw->tx_count_down = hw->imt * 4 / 3;
618 hw->dmar_block = atl1e_dma_req_1024;
619 hw->dmaw_block = atl1e_dma_req_1024;
620 hw->dmar_dly_cnt = 15;
621 hw->dmaw_dly_cnt = 4;
622
623 if (atl1e_alloc_queues(adapter)) {
624 netdev_err(adapter->netdev, "Unable to allocate memory for queues\n");
625 return -ENOMEM;
626 }
627
628 atomic_set(&adapter->irq_sem, 1);
629 spin_lock_init(&adapter->mdio_lock);
630
631 set_bit(__AT_DOWN, &adapter->flags);
632
633 return 0;
634 }
635
636 /**
637 * atl1e_clean_tx_ring - Free Tx-skb
638 * @adapter: board private structure
639 */
atl1e_clean_tx_ring(struct atl1e_adapter * adapter)640 static void atl1e_clean_tx_ring(struct atl1e_adapter *adapter)
641 {
642 struct atl1e_tx_ring *tx_ring = &adapter->tx_ring;
643 struct atl1e_tx_buffer *tx_buffer = NULL;
644 struct pci_dev *pdev = adapter->pdev;
645 u16 index, ring_count;
646
647 if (tx_ring->desc == NULL || tx_ring->tx_buffer == NULL)
648 return;
649
650 ring_count = tx_ring->count;
651 /* first unmmap dma */
652 for (index = 0; index < ring_count; index++) {
653 tx_buffer = &tx_ring->tx_buffer[index];
654 if (tx_buffer->dma) {
655 if (tx_buffer->flags & ATL1E_TX_PCIMAP_SINGLE)
656 dma_unmap_single(&pdev->dev, tx_buffer->dma,
657 tx_buffer->length,
658 DMA_TO_DEVICE);
659 else if (tx_buffer->flags & ATL1E_TX_PCIMAP_PAGE)
660 dma_unmap_page(&pdev->dev, tx_buffer->dma,
661 tx_buffer->length,
662 DMA_TO_DEVICE);
663 tx_buffer->dma = 0;
664 }
665 }
666 /* second free skb */
667 for (index = 0; index < ring_count; index++) {
668 tx_buffer = &tx_ring->tx_buffer[index];
669 if (tx_buffer->skb) {
670 dev_kfree_skb_any(tx_buffer->skb);
671 tx_buffer->skb = NULL;
672 }
673 }
674 /* Zero out Tx-buffers */
675 memset(tx_ring->desc, 0, sizeof(struct atl1e_tpd_desc) *
676 ring_count);
677 memset(tx_ring->tx_buffer, 0, sizeof(struct atl1e_tx_buffer) *
678 ring_count);
679 }
680
681 /**
682 * atl1e_clean_rx_ring - Free rx-reservation skbs
683 * @adapter: board private structure
684 */
atl1e_clean_rx_ring(struct atl1e_adapter * adapter)685 static void atl1e_clean_rx_ring(struct atl1e_adapter *adapter)
686 {
687 struct atl1e_rx_ring *rx_ring =
688 &adapter->rx_ring;
689 struct atl1e_rx_page_desc *rx_page_desc = rx_ring->rx_page_desc;
690 u16 i, j;
691
692
693 if (adapter->ring_vir_addr == NULL)
694 return;
695 /* Zero out the descriptor ring */
696 for (i = 0; i < adapter->num_rx_queues; i++) {
697 for (j = 0; j < AT_PAGE_NUM_PER_QUEUE; j++) {
698 if (rx_page_desc[i].rx_page[j].addr != NULL) {
699 memset(rx_page_desc[i].rx_page[j].addr, 0,
700 rx_ring->real_page_size);
701 }
702 }
703 }
704 }
705
atl1e_cal_ring_size(struct atl1e_adapter * adapter,u32 * ring_size)706 static void atl1e_cal_ring_size(struct atl1e_adapter *adapter, u32 *ring_size)
707 {
708 *ring_size = ((u32)(adapter->tx_ring.count *
709 sizeof(struct atl1e_tpd_desc) + 7
710 /* tx ring, qword align */
711 + adapter->rx_ring.real_page_size * AT_PAGE_NUM_PER_QUEUE *
712 adapter->num_rx_queues + 31
713 /* rx ring, 32 bytes align */
714 + (1 + AT_PAGE_NUM_PER_QUEUE * adapter->num_rx_queues) *
715 sizeof(u32) + 3));
716 /* tx, rx cmd, dword align */
717 }
718
atl1e_init_ring_resources(struct atl1e_adapter * adapter)719 static void atl1e_init_ring_resources(struct atl1e_adapter *adapter)
720 {
721 struct atl1e_rx_ring *rx_ring = NULL;
722
723 rx_ring = &adapter->rx_ring;
724
725 rx_ring->real_page_size = adapter->rx_ring.page_size
726 + adapter->hw.max_frame_size
727 + ETH_HLEN + VLAN_HLEN
728 + ETH_FCS_LEN;
729 rx_ring->real_page_size = roundup(rx_ring->real_page_size, 32);
730 atl1e_cal_ring_size(adapter, &adapter->ring_size);
731
732 adapter->ring_vir_addr = NULL;
733 adapter->rx_ring.desc = NULL;
734 rwlock_init(&adapter->tx_ring.tx_lock);
735 }
736
737 /*
738 * Read / Write Ptr Initialize:
739 */
atl1e_init_ring_ptrs(struct atl1e_adapter * adapter)740 static void atl1e_init_ring_ptrs(struct atl1e_adapter *adapter)
741 {
742 struct atl1e_tx_ring *tx_ring = NULL;
743 struct atl1e_rx_ring *rx_ring = NULL;
744 struct atl1e_rx_page_desc *rx_page_desc = NULL;
745 int i, j;
746
747 tx_ring = &adapter->tx_ring;
748 rx_ring = &adapter->rx_ring;
749 rx_page_desc = rx_ring->rx_page_desc;
750
751 tx_ring->next_to_use = 0;
752 atomic_set(&tx_ring->next_to_clean, 0);
753
754 for (i = 0; i < adapter->num_rx_queues; i++) {
755 rx_page_desc[i].rx_using = 0;
756 rx_page_desc[i].rx_nxseq = 0;
757 for (j = 0; j < AT_PAGE_NUM_PER_QUEUE; j++) {
758 *rx_page_desc[i].rx_page[j].write_offset_addr = 0;
759 rx_page_desc[i].rx_page[j].read_offset = 0;
760 }
761 }
762 }
763
764 /**
765 * atl1e_free_ring_resources - Free Tx / RX descriptor Resources
766 * @adapter: board private structure
767 *
768 * Free all transmit software resources
769 */
atl1e_free_ring_resources(struct atl1e_adapter * adapter)770 static void atl1e_free_ring_resources(struct atl1e_adapter *adapter)
771 {
772 struct pci_dev *pdev = adapter->pdev;
773
774 atl1e_clean_tx_ring(adapter);
775 atl1e_clean_rx_ring(adapter);
776
777 if (adapter->ring_vir_addr) {
778 dma_free_coherent(&pdev->dev, adapter->ring_size,
779 adapter->ring_vir_addr, adapter->ring_dma);
780 adapter->ring_vir_addr = NULL;
781 }
782
783 if (adapter->tx_ring.tx_buffer) {
784 kfree(adapter->tx_ring.tx_buffer);
785 adapter->tx_ring.tx_buffer = NULL;
786 }
787 }
788
789 /**
790 * atl1e_setup_ring_resources - allocate Tx / RX descriptor resources
791 * @adapter: board private structure
792 *
793 * Return 0 on success, negative on failure
794 */
atl1e_setup_ring_resources(struct atl1e_adapter * adapter)795 static int atl1e_setup_ring_resources(struct atl1e_adapter *adapter)
796 {
797 struct pci_dev *pdev = adapter->pdev;
798 struct atl1e_tx_ring *tx_ring;
799 struct atl1e_rx_ring *rx_ring;
800 struct atl1e_rx_page_desc *rx_page_desc;
801 int size, i, j;
802 u32 offset = 0;
803 int err = 0;
804
805 if (adapter->ring_vir_addr != NULL)
806 return 0; /* alloced already */
807
808 tx_ring = &adapter->tx_ring;
809 rx_ring = &adapter->rx_ring;
810
811 /* real ring DMA buffer */
812
813 size = adapter->ring_size;
814 adapter->ring_vir_addr = dma_alloc_coherent(&pdev->dev,
815 adapter->ring_size,
816 &adapter->ring_dma, GFP_KERNEL);
817 if (adapter->ring_vir_addr == NULL) {
818 netdev_err(adapter->netdev,
819 "dma_alloc_coherent failed, size = D%d\n", size);
820 return -ENOMEM;
821 }
822
823 rx_page_desc = rx_ring->rx_page_desc;
824
825 /* Init TPD Ring */
826 tx_ring->dma = roundup(adapter->ring_dma, 8);
827 offset = tx_ring->dma - adapter->ring_dma;
828 tx_ring->desc = adapter->ring_vir_addr + offset;
829 size = sizeof(struct atl1e_tx_buffer) * (tx_ring->count);
830 tx_ring->tx_buffer = kzalloc(size, GFP_KERNEL);
831 if (tx_ring->tx_buffer == NULL) {
832 err = -ENOMEM;
833 goto failed;
834 }
835
836 /* Init RXF-Pages */
837 offset += (sizeof(struct atl1e_tpd_desc) * tx_ring->count);
838 offset = roundup(offset, 32);
839
840 for (i = 0; i < adapter->num_rx_queues; i++) {
841 for (j = 0; j < AT_PAGE_NUM_PER_QUEUE; j++) {
842 rx_page_desc[i].rx_page[j].dma =
843 adapter->ring_dma + offset;
844 rx_page_desc[i].rx_page[j].addr =
845 adapter->ring_vir_addr + offset;
846 offset += rx_ring->real_page_size;
847 }
848 }
849
850 /* Init CMB dma address */
851 tx_ring->cmb_dma = adapter->ring_dma + offset;
852 tx_ring->cmb = adapter->ring_vir_addr + offset;
853 offset += sizeof(u32);
854
855 for (i = 0; i < adapter->num_rx_queues; i++) {
856 for (j = 0; j < AT_PAGE_NUM_PER_QUEUE; j++) {
857 rx_page_desc[i].rx_page[j].write_offset_dma =
858 adapter->ring_dma + offset;
859 rx_page_desc[i].rx_page[j].write_offset_addr =
860 adapter->ring_vir_addr + offset;
861 offset += sizeof(u32);
862 }
863 }
864
865 if (unlikely(offset > adapter->ring_size)) {
866 netdev_err(adapter->netdev, "offset(%d) > ring size(%d) !!\n",
867 offset, adapter->ring_size);
868 err = -1;
869 goto free_buffer;
870 }
871
872 return 0;
873 free_buffer:
874 kfree(tx_ring->tx_buffer);
875 tx_ring->tx_buffer = NULL;
876 failed:
877 if (adapter->ring_vir_addr != NULL) {
878 dma_free_coherent(&pdev->dev, adapter->ring_size,
879 adapter->ring_vir_addr, adapter->ring_dma);
880 adapter->ring_vir_addr = NULL;
881 }
882 return err;
883 }
884
atl1e_configure_des_ring(struct atl1e_adapter * adapter)885 static inline void atl1e_configure_des_ring(struct atl1e_adapter *adapter)
886 {
887
888 struct atl1e_hw *hw = &adapter->hw;
889 struct atl1e_rx_ring *rx_ring = &adapter->rx_ring;
890 struct atl1e_tx_ring *tx_ring = &adapter->tx_ring;
891 struct atl1e_rx_page_desc *rx_page_desc = NULL;
892 int i, j;
893
894 AT_WRITE_REG(hw, REG_DESC_BASE_ADDR_HI,
895 (u32)((adapter->ring_dma & AT_DMA_HI_ADDR_MASK) >> 32));
896 AT_WRITE_REG(hw, REG_TPD_BASE_ADDR_LO,
897 (u32)((tx_ring->dma) & AT_DMA_LO_ADDR_MASK));
898 AT_WRITE_REG(hw, REG_TPD_RING_SIZE, (u16)(tx_ring->count));
899 AT_WRITE_REG(hw, REG_HOST_TX_CMB_LO,
900 (u32)((tx_ring->cmb_dma) & AT_DMA_LO_ADDR_MASK));
901
902 rx_page_desc = rx_ring->rx_page_desc;
903 /* RXF Page Physical address / Page Length */
904 for (i = 0; i < AT_MAX_RECEIVE_QUEUE; i++) {
905 AT_WRITE_REG(hw, atl1e_rx_page_hi_addr_regs[i],
906 (u32)((adapter->ring_dma &
907 AT_DMA_HI_ADDR_MASK) >> 32));
908 for (j = 0; j < AT_PAGE_NUM_PER_QUEUE; j++) {
909 u32 page_phy_addr;
910 u32 offset_phy_addr;
911
912 page_phy_addr = rx_page_desc[i].rx_page[j].dma;
913 offset_phy_addr =
914 rx_page_desc[i].rx_page[j].write_offset_dma;
915
916 AT_WRITE_REG(hw, atl1e_rx_page_lo_addr_regs[i][j],
917 page_phy_addr & AT_DMA_LO_ADDR_MASK);
918 AT_WRITE_REG(hw, atl1e_rx_page_write_offset_regs[i][j],
919 offset_phy_addr & AT_DMA_LO_ADDR_MASK);
920 AT_WRITE_REGB(hw, atl1e_rx_page_vld_regs[i][j], 1);
921 }
922 }
923 /* Page Length */
924 AT_WRITE_REG(hw, REG_HOST_RXFPAGE_SIZE, rx_ring->page_size);
925 /* Load all of base address above */
926 AT_WRITE_REG(hw, REG_LOAD_PTR, 1);
927 }
928
atl1e_configure_tx(struct atl1e_adapter * adapter)929 static inline void atl1e_configure_tx(struct atl1e_adapter *adapter)
930 {
931 struct atl1e_hw *hw = &adapter->hw;
932 u32 dev_ctrl_data = 0;
933 u32 max_pay_load = 0;
934 u32 jumbo_thresh = 0;
935 u32 extra_size = 0; /* Jumbo frame threshold in QWORD unit */
936
937 /* configure TXQ param */
938 if (hw->nic_type != athr_l2e_revB) {
939 extra_size = ETH_HLEN + VLAN_HLEN + ETH_FCS_LEN;
940 if (hw->max_frame_size <= 1500) {
941 jumbo_thresh = hw->max_frame_size + extra_size;
942 } else if (hw->max_frame_size < 6*1024) {
943 jumbo_thresh =
944 (hw->max_frame_size + extra_size) * 2 / 3;
945 } else {
946 jumbo_thresh = (hw->max_frame_size + extra_size) / 2;
947 }
948 AT_WRITE_REG(hw, REG_TX_EARLY_TH, (jumbo_thresh + 7) >> 3);
949 }
950
951 dev_ctrl_data = AT_READ_REG(hw, REG_DEVICE_CTRL);
952
953 max_pay_load = ((dev_ctrl_data >> DEVICE_CTRL_MAX_PAYLOAD_SHIFT)) &
954 DEVICE_CTRL_MAX_PAYLOAD_MASK;
955
956 hw->dmaw_block = min_t(u32, max_pay_load, hw->dmaw_block);
957
958 max_pay_load = ((dev_ctrl_data >> DEVICE_CTRL_MAX_RREQ_SZ_SHIFT)) &
959 DEVICE_CTRL_MAX_RREQ_SZ_MASK;
960 hw->dmar_block = min_t(u32, max_pay_load, hw->dmar_block);
961
962 if (hw->nic_type != athr_l2e_revB)
963 AT_WRITE_REGW(hw, REG_TXQ_CTRL + 2,
964 atl1e_pay_load_size[hw->dmar_block]);
965 /* enable TXQ */
966 AT_WRITE_REGW(hw, REG_TXQ_CTRL,
967 (((u16)hw->tpd_burst & TXQ_CTRL_NUM_TPD_BURST_MASK)
968 << TXQ_CTRL_NUM_TPD_BURST_SHIFT)
969 | TXQ_CTRL_ENH_MODE | TXQ_CTRL_EN);
970 }
971
atl1e_configure_rx(struct atl1e_adapter * adapter)972 static inline void atl1e_configure_rx(struct atl1e_adapter *adapter)
973 {
974 struct atl1e_hw *hw = &adapter->hw;
975 u32 rxf_len = 0;
976 u32 rxf_low = 0;
977 u32 rxf_high = 0;
978 u32 rxf_thresh_data = 0;
979 u32 rxq_ctrl_data = 0;
980
981 if (hw->nic_type != athr_l2e_revB) {
982 AT_WRITE_REGW(hw, REG_RXQ_JMBOSZ_RRDTIM,
983 (u16)((hw->rx_jumbo_th & RXQ_JMBOSZ_TH_MASK) <<
984 RXQ_JMBOSZ_TH_SHIFT |
985 (1 & RXQ_JMBO_LKAH_MASK) <<
986 RXQ_JMBO_LKAH_SHIFT));
987
988 rxf_len = AT_READ_REG(hw, REG_SRAM_RXF_LEN);
989 rxf_high = rxf_len * 4 / 5;
990 rxf_low = rxf_len / 5;
991 rxf_thresh_data = ((rxf_high & RXQ_RXF_PAUSE_TH_HI_MASK)
992 << RXQ_RXF_PAUSE_TH_HI_SHIFT) |
993 ((rxf_low & RXQ_RXF_PAUSE_TH_LO_MASK)
994 << RXQ_RXF_PAUSE_TH_LO_SHIFT);
995
996 AT_WRITE_REG(hw, REG_RXQ_RXF_PAUSE_THRESH, rxf_thresh_data);
997 }
998
999 /* RRS */
1000 AT_WRITE_REG(hw, REG_IDT_TABLE, hw->indirect_tab);
1001 AT_WRITE_REG(hw, REG_BASE_CPU_NUMBER, hw->base_cpu);
1002
1003 if (hw->rrs_type & atl1e_rrs_ipv4)
1004 rxq_ctrl_data |= RXQ_CTRL_HASH_TYPE_IPV4;
1005
1006 if (hw->rrs_type & atl1e_rrs_ipv4_tcp)
1007 rxq_ctrl_data |= RXQ_CTRL_HASH_TYPE_IPV4_TCP;
1008
1009 if (hw->rrs_type & atl1e_rrs_ipv6)
1010 rxq_ctrl_data |= RXQ_CTRL_HASH_TYPE_IPV6;
1011
1012 if (hw->rrs_type & atl1e_rrs_ipv6_tcp)
1013 rxq_ctrl_data |= RXQ_CTRL_HASH_TYPE_IPV6_TCP;
1014
1015 if (hw->rrs_type != atl1e_rrs_disable)
1016 rxq_ctrl_data |=
1017 (RXQ_CTRL_HASH_ENABLE | RXQ_CTRL_RSS_MODE_MQUESINT);
1018
1019 rxq_ctrl_data |= RXQ_CTRL_IPV6_XSUM_VERIFY_EN | RXQ_CTRL_PBA_ALIGN_32 |
1020 RXQ_CTRL_CUT_THRU_EN | RXQ_CTRL_EN;
1021
1022 AT_WRITE_REG(hw, REG_RXQ_CTRL, rxq_ctrl_data);
1023 }
1024
atl1e_configure_dma(struct atl1e_adapter * adapter)1025 static inline void atl1e_configure_dma(struct atl1e_adapter *adapter)
1026 {
1027 struct atl1e_hw *hw = &adapter->hw;
1028 u32 dma_ctrl_data = 0;
1029
1030 dma_ctrl_data = DMA_CTRL_RXCMB_EN;
1031 dma_ctrl_data |= (((u32)hw->dmar_block) & DMA_CTRL_DMAR_BURST_LEN_MASK)
1032 << DMA_CTRL_DMAR_BURST_LEN_SHIFT;
1033 dma_ctrl_data |= (((u32)hw->dmaw_block) & DMA_CTRL_DMAW_BURST_LEN_MASK)
1034 << DMA_CTRL_DMAW_BURST_LEN_SHIFT;
1035 dma_ctrl_data |= DMA_CTRL_DMAR_REQ_PRI | DMA_CTRL_DMAR_OUT_ORDER;
1036 dma_ctrl_data |= (((u32)hw->dmar_dly_cnt) & DMA_CTRL_DMAR_DLY_CNT_MASK)
1037 << DMA_CTRL_DMAR_DLY_CNT_SHIFT;
1038 dma_ctrl_data |= (((u32)hw->dmaw_dly_cnt) & DMA_CTRL_DMAW_DLY_CNT_MASK)
1039 << DMA_CTRL_DMAW_DLY_CNT_SHIFT;
1040
1041 AT_WRITE_REG(hw, REG_DMA_CTRL, dma_ctrl_data);
1042 }
1043
atl1e_setup_mac_ctrl(struct atl1e_adapter * adapter)1044 static void atl1e_setup_mac_ctrl(struct atl1e_adapter *adapter)
1045 {
1046 u32 value;
1047 struct atl1e_hw *hw = &adapter->hw;
1048 struct net_device *netdev = adapter->netdev;
1049
1050 /* Config MAC CTRL Register */
1051 value = MAC_CTRL_TX_EN |
1052 MAC_CTRL_RX_EN ;
1053
1054 if (FULL_DUPLEX == adapter->link_duplex)
1055 value |= MAC_CTRL_DUPLX;
1056
1057 value |= ((u32)((SPEED_1000 == adapter->link_speed) ?
1058 MAC_CTRL_SPEED_1000 : MAC_CTRL_SPEED_10_100) <<
1059 MAC_CTRL_SPEED_SHIFT);
1060 value |= (MAC_CTRL_TX_FLOW | MAC_CTRL_RX_FLOW);
1061
1062 value |= (MAC_CTRL_ADD_CRC | MAC_CTRL_PAD);
1063 value |= (((u32)adapter->hw.preamble_len &
1064 MAC_CTRL_PRMLEN_MASK) << MAC_CTRL_PRMLEN_SHIFT);
1065
1066 __atl1e_vlan_mode(netdev->features, &value);
1067
1068 value |= MAC_CTRL_BC_EN;
1069 if (netdev->flags & IFF_PROMISC)
1070 value |= MAC_CTRL_PROMIS_EN;
1071 if (netdev->flags & IFF_ALLMULTI)
1072 value |= MAC_CTRL_MC_ALL_EN;
1073 if (netdev->features & NETIF_F_RXALL)
1074 value |= MAC_CTRL_DBG;
1075 AT_WRITE_REG(hw, REG_MAC_CTRL, value);
1076 }
1077
1078 /**
1079 * atl1e_configure - Configure Transmit&Receive Unit after Reset
1080 * @adapter: board private structure
1081 *
1082 * Configure the Tx /Rx unit of the MAC after a reset.
1083 */
atl1e_configure(struct atl1e_adapter * adapter)1084 static int atl1e_configure(struct atl1e_adapter *adapter)
1085 {
1086 struct atl1e_hw *hw = &adapter->hw;
1087
1088 u32 intr_status_data = 0;
1089
1090 /* clear interrupt status */
1091 AT_WRITE_REG(hw, REG_ISR, ~0);
1092
1093 /* 1. set MAC Address */
1094 atl1e_hw_set_mac_addr(hw);
1095
1096 /* 2. Init the Multicast HASH table done by set_muti */
1097
1098 /* 3. Clear any WOL status */
1099 AT_WRITE_REG(hw, REG_WOL_CTRL, 0);
1100
1101 /* 4. Descripter Ring BaseMem/Length/Read ptr/Write ptr
1102 * TPD Ring/SMB/RXF0 Page CMBs, they use the same
1103 * High 32bits memory */
1104 atl1e_configure_des_ring(adapter);
1105
1106 /* 5. set Interrupt Moderator Timer */
1107 AT_WRITE_REGW(hw, REG_IRQ_MODU_TIMER_INIT, hw->imt);
1108 AT_WRITE_REGW(hw, REG_IRQ_MODU_TIMER2_INIT, hw->imt);
1109 AT_WRITE_REG(hw, REG_MASTER_CTRL, MASTER_CTRL_LED_MODE |
1110 MASTER_CTRL_ITIMER_EN | MASTER_CTRL_ITIMER2_EN);
1111
1112 /* 6. rx/tx threshold to trig interrupt */
1113 AT_WRITE_REGW(hw, REG_TRIG_RRD_THRESH, hw->rrd_thresh);
1114 AT_WRITE_REGW(hw, REG_TRIG_TPD_THRESH, hw->tpd_thresh);
1115 AT_WRITE_REGW(hw, REG_TRIG_RXTIMER, hw->rx_count_down);
1116 AT_WRITE_REGW(hw, REG_TRIG_TXTIMER, hw->tx_count_down);
1117
1118 /* 7. set Interrupt Clear Timer */
1119 AT_WRITE_REGW(hw, REG_CMBDISDMA_TIMER, hw->ict);
1120
1121 /* 8. set MTU */
1122 AT_WRITE_REG(hw, REG_MTU, hw->max_frame_size + ETH_HLEN +
1123 VLAN_HLEN + ETH_FCS_LEN);
1124
1125 /* 9. config TXQ early tx threshold */
1126 atl1e_configure_tx(adapter);
1127
1128 /* 10. config RXQ */
1129 atl1e_configure_rx(adapter);
1130
1131 /* 11. config DMA Engine */
1132 atl1e_configure_dma(adapter);
1133
1134 /* 12. smb timer to trig interrupt */
1135 AT_WRITE_REG(hw, REG_SMB_STAT_TIMER, hw->smb_timer);
1136
1137 intr_status_data = AT_READ_REG(hw, REG_ISR);
1138 if (unlikely((intr_status_data & ISR_PHY_LINKDOWN) != 0)) {
1139 netdev_err(adapter->netdev,
1140 "atl1e_configure failed, PCIE phy link down\n");
1141 return -1;
1142 }
1143
1144 AT_WRITE_REG(hw, REG_ISR, 0x7fffffff);
1145 return 0;
1146 }
1147
1148 /**
1149 * atl1e_get_stats - Get System Network Statistics
1150 * @netdev: network interface device structure
1151 *
1152 * Returns the address of the device statistics structure.
1153 * The statistics are actually updated from the timer callback.
1154 */
atl1e_get_stats(struct net_device * netdev)1155 static struct net_device_stats *atl1e_get_stats(struct net_device *netdev)
1156 {
1157 struct atl1e_adapter *adapter = netdev_priv(netdev);
1158 struct atl1e_hw_stats *hw_stats = &adapter->hw_stats;
1159 struct net_device_stats *net_stats = &netdev->stats;
1160
1161 net_stats->rx_bytes = hw_stats->rx_byte_cnt;
1162 net_stats->tx_bytes = hw_stats->tx_byte_cnt;
1163 net_stats->multicast = hw_stats->rx_mcast;
1164 net_stats->collisions = hw_stats->tx_1_col +
1165 hw_stats->tx_2_col +
1166 hw_stats->tx_late_col +
1167 hw_stats->tx_abort_col;
1168
1169 net_stats->rx_errors = hw_stats->rx_frag +
1170 hw_stats->rx_fcs_err +
1171 hw_stats->rx_len_err +
1172 hw_stats->rx_sz_ov +
1173 hw_stats->rx_rrd_ov +
1174 hw_stats->rx_align_err +
1175 hw_stats->rx_rxf_ov;
1176
1177 net_stats->rx_fifo_errors = hw_stats->rx_rxf_ov;
1178 net_stats->rx_length_errors = hw_stats->rx_len_err;
1179 net_stats->rx_crc_errors = hw_stats->rx_fcs_err;
1180 net_stats->rx_frame_errors = hw_stats->rx_align_err;
1181 net_stats->rx_dropped = hw_stats->rx_rrd_ov;
1182
1183 net_stats->tx_errors = hw_stats->tx_late_col +
1184 hw_stats->tx_abort_col +
1185 hw_stats->tx_underrun +
1186 hw_stats->tx_trunc;
1187
1188 net_stats->tx_fifo_errors = hw_stats->tx_underrun;
1189 net_stats->tx_aborted_errors = hw_stats->tx_abort_col;
1190 net_stats->tx_window_errors = hw_stats->tx_late_col;
1191
1192 net_stats->rx_packets = hw_stats->rx_ok + net_stats->rx_errors;
1193 net_stats->tx_packets = hw_stats->tx_ok + net_stats->tx_errors;
1194
1195 return net_stats;
1196 }
1197
atl1e_update_hw_stats(struct atl1e_adapter * adapter)1198 static void atl1e_update_hw_stats(struct atl1e_adapter *adapter)
1199 {
1200 u16 hw_reg_addr = 0;
1201 unsigned long *stats_item = NULL;
1202
1203 /* update rx status */
1204 hw_reg_addr = REG_MAC_RX_STATUS_BIN;
1205 stats_item = &adapter->hw_stats.rx_ok;
1206 while (hw_reg_addr <= REG_MAC_RX_STATUS_END) {
1207 *stats_item += AT_READ_REG(&adapter->hw, hw_reg_addr);
1208 stats_item++;
1209 hw_reg_addr += 4;
1210 }
1211 /* update tx status */
1212 hw_reg_addr = REG_MAC_TX_STATUS_BIN;
1213 stats_item = &adapter->hw_stats.tx_ok;
1214 while (hw_reg_addr <= REG_MAC_TX_STATUS_END) {
1215 *stats_item += AT_READ_REG(&adapter->hw, hw_reg_addr);
1216 stats_item++;
1217 hw_reg_addr += 4;
1218 }
1219 }
1220
atl1e_clear_phy_int(struct atl1e_adapter * adapter)1221 static inline void atl1e_clear_phy_int(struct atl1e_adapter *adapter)
1222 {
1223 u16 phy_data;
1224
1225 spin_lock(&adapter->mdio_lock);
1226 atl1e_read_phy_reg(&adapter->hw, MII_INT_STATUS, &phy_data);
1227 spin_unlock(&adapter->mdio_lock);
1228 }
1229
atl1e_clean_tx_irq(struct atl1e_adapter * adapter)1230 static bool atl1e_clean_tx_irq(struct atl1e_adapter *adapter)
1231 {
1232 struct atl1e_tx_ring *tx_ring = &adapter->tx_ring;
1233 struct atl1e_tx_buffer *tx_buffer = NULL;
1234 u16 hw_next_to_clean = AT_READ_REGW(&adapter->hw, REG_TPD_CONS_IDX);
1235 u16 next_to_clean = atomic_read(&tx_ring->next_to_clean);
1236
1237 if (unlikely(hw_next_to_clean >= tx_ring->count))
1238 hw_next_to_clean = next_to_clean;
1239
1240 while (next_to_clean != hw_next_to_clean) {
1241 tx_buffer = &tx_ring->tx_buffer[next_to_clean];
1242 if (tx_buffer->dma) {
1243 if (tx_buffer->flags & ATL1E_TX_PCIMAP_SINGLE)
1244 dma_unmap_single(&adapter->pdev->dev,
1245 tx_buffer->dma,
1246 tx_buffer->length,
1247 DMA_TO_DEVICE);
1248 else if (tx_buffer->flags & ATL1E_TX_PCIMAP_PAGE)
1249 dma_unmap_page(&adapter->pdev->dev,
1250 tx_buffer->dma,
1251 tx_buffer->length,
1252 DMA_TO_DEVICE);
1253 tx_buffer->dma = 0;
1254 }
1255
1256 if (tx_buffer->skb) {
1257 dev_consume_skb_irq(tx_buffer->skb);
1258 tx_buffer->skb = NULL;
1259 }
1260
1261 if (++next_to_clean == tx_ring->count)
1262 next_to_clean = 0;
1263 }
1264
1265 atomic_set(&tx_ring->next_to_clean, next_to_clean);
1266
1267 if (netif_queue_stopped(adapter->netdev) &&
1268 netif_carrier_ok(adapter->netdev)) {
1269 netif_wake_queue(adapter->netdev);
1270 }
1271
1272 return true;
1273 }
1274
1275 /**
1276 * atl1e_intr - Interrupt Handler
1277 * @irq: interrupt number
1278 * @data: pointer to a network interface device structure
1279 */
atl1e_intr(int irq,void * data)1280 static irqreturn_t atl1e_intr(int irq, void *data)
1281 {
1282 struct net_device *netdev = data;
1283 struct atl1e_adapter *adapter = netdev_priv(netdev);
1284 struct atl1e_hw *hw = &adapter->hw;
1285 int max_ints = AT_MAX_INT_WORK;
1286 int handled = IRQ_NONE;
1287 u32 status;
1288
1289 do {
1290 status = AT_READ_REG(hw, REG_ISR);
1291 if ((status & IMR_NORMAL_MASK) == 0 ||
1292 (status & ISR_DIS_INT) != 0) {
1293 if (max_ints != AT_MAX_INT_WORK)
1294 handled = IRQ_HANDLED;
1295 break;
1296 }
1297 /* link event */
1298 if (status & ISR_GPHY)
1299 atl1e_clear_phy_int(adapter);
1300 /* Ack ISR */
1301 AT_WRITE_REG(hw, REG_ISR, status | ISR_DIS_INT);
1302
1303 handled = IRQ_HANDLED;
1304 /* check if PCIE PHY Link down */
1305 if (status & ISR_PHY_LINKDOWN) {
1306 netdev_err(adapter->netdev,
1307 "pcie phy linkdown %x\n", status);
1308 if (netif_running(adapter->netdev)) {
1309 /* reset MAC */
1310 atl1e_irq_reset(adapter);
1311 schedule_work(&adapter->reset_task);
1312 break;
1313 }
1314 }
1315
1316 /* check if DMA read/write error */
1317 if (status & (ISR_DMAR_TO_RST | ISR_DMAW_TO_RST)) {
1318 netdev_err(adapter->netdev,
1319 "PCIE DMA RW error (status = 0x%x)\n",
1320 status);
1321 atl1e_irq_reset(adapter);
1322 schedule_work(&adapter->reset_task);
1323 break;
1324 }
1325
1326 if (status & ISR_SMB)
1327 atl1e_update_hw_stats(adapter);
1328
1329 /* link event */
1330 if (status & (ISR_GPHY | ISR_MANUAL)) {
1331 netdev->stats.tx_carrier_errors++;
1332 atl1e_link_chg_event(adapter);
1333 break;
1334 }
1335
1336 /* transmit event */
1337 if (status & ISR_TX_EVENT)
1338 atl1e_clean_tx_irq(adapter);
1339
1340 if (status & ISR_RX_EVENT) {
1341 /*
1342 * disable rx interrupts, without
1343 * the synchronize_irq bit
1344 */
1345 AT_WRITE_REG(hw, REG_IMR,
1346 IMR_NORMAL_MASK & ~ISR_RX_EVENT);
1347 AT_WRITE_FLUSH(hw);
1348 if (likely(napi_schedule_prep(
1349 &adapter->napi)))
1350 __napi_schedule(&adapter->napi);
1351 }
1352 } while (--max_ints > 0);
1353 /* re-enable Interrupt*/
1354 AT_WRITE_REG(&adapter->hw, REG_ISR, 0);
1355
1356 return handled;
1357 }
1358
atl1e_rx_checksum(struct atl1e_adapter * adapter,struct sk_buff * skb,struct atl1e_recv_ret_status * prrs)1359 static inline void atl1e_rx_checksum(struct atl1e_adapter *adapter,
1360 struct sk_buff *skb, struct atl1e_recv_ret_status *prrs)
1361 {
1362 u8 *packet = (u8 *)(prrs + 1);
1363 struct iphdr *iph;
1364 u16 head_len = ETH_HLEN;
1365 u16 pkt_flags;
1366 u16 err_flags;
1367
1368 skb_checksum_none_assert(skb);
1369 pkt_flags = prrs->pkt_flag;
1370 err_flags = prrs->err_flag;
1371 if (((pkt_flags & RRS_IS_IPV4) || (pkt_flags & RRS_IS_IPV6)) &&
1372 ((pkt_flags & RRS_IS_TCP) || (pkt_flags & RRS_IS_UDP))) {
1373 if (pkt_flags & RRS_IS_IPV4) {
1374 if (pkt_flags & RRS_IS_802_3)
1375 head_len += 8;
1376 iph = (struct iphdr *) (packet + head_len);
1377 if (iph->frag_off != 0 && !(pkt_flags & RRS_IS_IP_DF))
1378 goto hw_xsum;
1379 }
1380 if (!(err_flags & (RRS_ERR_IP_CSUM | RRS_ERR_L4_CSUM))) {
1381 skb->ip_summed = CHECKSUM_UNNECESSARY;
1382 return;
1383 }
1384 }
1385
1386 hw_xsum :
1387 return;
1388 }
1389
atl1e_get_rx_page(struct atl1e_adapter * adapter,u8 que)1390 static struct atl1e_rx_page *atl1e_get_rx_page(struct atl1e_adapter *adapter,
1391 u8 que)
1392 {
1393 struct atl1e_rx_page_desc *rx_page_desc =
1394 (struct atl1e_rx_page_desc *) adapter->rx_ring.rx_page_desc;
1395 u8 rx_using = rx_page_desc[que].rx_using;
1396
1397 return &(rx_page_desc[que].rx_page[rx_using]);
1398 }
1399
atl1e_clean_rx_irq(struct atl1e_adapter * adapter,u8 que,int * work_done,int work_to_do)1400 static void atl1e_clean_rx_irq(struct atl1e_adapter *adapter, u8 que,
1401 int *work_done, int work_to_do)
1402 {
1403 struct net_device *netdev = adapter->netdev;
1404 struct atl1e_rx_ring *rx_ring = &adapter->rx_ring;
1405 struct atl1e_rx_page_desc *rx_page_desc =
1406 (struct atl1e_rx_page_desc *) rx_ring->rx_page_desc;
1407 struct sk_buff *skb = NULL;
1408 struct atl1e_rx_page *rx_page = atl1e_get_rx_page(adapter, que);
1409 u32 packet_size, write_offset;
1410 struct atl1e_recv_ret_status *prrs;
1411
1412 write_offset = *(rx_page->write_offset_addr);
1413 if (likely(rx_page->read_offset < write_offset)) {
1414 do {
1415 if (*work_done >= work_to_do)
1416 break;
1417 (*work_done)++;
1418 /* get new packet's rrs */
1419 prrs = (struct atl1e_recv_ret_status *) (rx_page->addr +
1420 rx_page->read_offset);
1421 /* check sequence number */
1422 if (prrs->seq_num != rx_page_desc[que].rx_nxseq) {
1423 netdev_err(netdev,
1424 "rx sequence number error (rx=%d) (expect=%d)\n",
1425 prrs->seq_num,
1426 rx_page_desc[que].rx_nxseq);
1427 rx_page_desc[que].rx_nxseq++;
1428 /* just for debug use */
1429 AT_WRITE_REG(&adapter->hw, REG_DEBUG_DATA0,
1430 (((u32)prrs->seq_num) << 16) |
1431 rx_page_desc[que].rx_nxseq);
1432 goto fatal_err;
1433 }
1434 rx_page_desc[que].rx_nxseq++;
1435
1436 /* error packet */
1437 if ((prrs->pkt_flag & RRS_IS_ERR_FRAME) &&
1438 !(netdev->features & NETIF_F_RXALL)) {
1439 if (prrs->err_flag & (RRS_ERR_BAD_CRC |
1440 RRS_ERR_DRIBBLE | RRS_ERR_CODE |
1441 RRS_ERR_TRUNC)) {
1442 /* hardware error, discard this packet*/
1443 netdev_err(netdev,
1444 "rx packet desc error %x\n",
1445 *((u32 *)prrs + 1));
1446 goto skip_pkt;
1447 }
1448 }
1449
1450 packet_size = ((prrs->word1 >> RRS_PKT_SIZE_SHIFT) &
1451 RRS_PKT_SIZE_MASK);
1452 if (likely(!(netdev->features & NETIF_F_RXFCS)))
1453 packet_size -= 4; /* CRC */
1454
1455 skb = netdev_alloc_skb_ip_align(netdev, packet_size);
1456 if (skb == NULL)
1457 goto skip_pkt;
1458
1459 memcpy(skb->data, (u8 *)(prrs + 1), packet_size);
1460 skb_put(skb, packet_size);
1461 skb->protocol = eth_type_trans(skb, netdev);
1462 atl1e_rx_checksum(adapter, skb, prrs);
1463
1464 if (prrs->pkt_flag & RRS_IS_VLAN_TAG) {
1465 u16 vlan_tag = (prrs->vtag >> 4) |
1466 ((prrs->vtag & 7) << 13) |
1467 ((prrs->vtag & 8) << 9);
1468 netdev_dbg(netdev,
1469 "RXD VLAN TAG<RRD>=0x%04x\n",
1470 prrs->vtag);
1471 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vlan_tag);
1472 }
1473 napi_gro_receive(&adapter->napi, skb);
1474
1475 skip_pkt:
1476 /* skip current packet whether it's ok or not. */
1477 rx_page->read_offset +=
1478 (((u32)((prrs->word1 >> RRS_PKT_SIZE_SHIFT) &
1479 RRS_PKT_SIZE_MASK) +
1480 sizeof(struct atl1e_recv_ret_status) + 31) &
1481 0xFFFFFFE0);
1482
1483 if (rx_page->read_offset >= rx_ring->page_size) {
1484 /* mark this page clean */
1485 u16 reg_addr;
1486 u8 rx_using;
1487
1488 rx_page->read_offset =
1489 *(rx_page->write_offset_addr) = 0;
1490 rx_using = rx_page_desc[que].rx_using;
1491 reg_addr =
1492 atl1e_rx_page_vld_regs[que][rx_using];
1493 AT_WRITE_REGB(&adapter->hw, reg_addr, 1);
1494 rx_page_desc[que].rx_using ^= 1;
1495 rx_page = atl1e_get_rx_page(adapter, que);
1496 }
1497 write_offset = *(rx_page->write_offset_addr);
1498 } while (rx_page->read_offset < write_offset);
1499 }
1500
1501 return;
1502
1503 fatal_err:
1504 if (!test_bit(__AT_DOWN, &adapter->flags))
1505 schedule_work(&adapter->reset_task);
1506 }
1507
1508 /**
1509 * atl1e_clean - NAPI Rx polling callback
1510 * @napi: napi info
1511 * @budget: number of packets to clean
1512 */
atl1e_clean(struct napi_struct * napi,int budget)1513 static int atl1e_clean(struct napi_struct *napi, int budget)
1514 {
1515 struct atl1e_adapter *adapter =
1516 container_of(napi, struct atl1e_adapter, napi);
1517 u32 imr_data;
1518 int work_done = 0;
1519
1520 /* Keep link state information with original netdev */
1521 if (!netif_carrier_ok(adapter->netdev))
1522 goto quit_polling;
1523
1524 atl1e_clean_rx_irq(adapter, 0, &work_done, budget);
1525
1526 /* If no Tx and not enough Rx work done, exit the polling mode */
1527 if (work_done < budget) {
1528 quit_polling:
1529 napi_complete_done(napi, work_done);
1530 imr_data = AT_READ_REG(&adapter->hw, REG_IMR);
1531 AT_WRITE_REG(&adapter->hw, REG_IMR, imr_data | ISR_RX_EVENT);
1532 /* test debug */
1533 if (test_bit(__AT_DOWN, &adapter->flags)) {
1534 atomic_dec(&adapter->irq_sem);
1535 netdev_err(adapter->netdev,
1536 "atl1e_clean is called when AT_DOWN\n");
1537 }
1538 /* reenable RX intr */
1539 /*atl1e_irq_enable(adapter); */
1540
1541 }
1542 return work_done;
1543 }
1544
1545 #ifdef CONFIG_NET_POLL_CONTROLLER
1546
1547 /*
1548 * Polling 'interrupt' - used by things like netconsole to send skbs
1549 * without having to re-enable interrupts. It's not called while
1550 * the interrupt routine is executing.
1551 */
atl1e_netpoll(struct net_device * netdev)1552 static void atl1e_netpoll(struct net_device *netdev)
1553 {
1554 struct atl1e_adapter *adapter = netdev_priv(netdev);
1555
1556 disable_irq(adapter->pdev->irq);
1557 atl1e_intr(adapter->pdev->irq, netdev);
1558 enable_irq(adapter->pdev->irq);
1559 }
1560 #endif
1561
atl1e_tpd_avail(struct atl1e_adapter * adapter)1562 static inline u16 atl1e_tpd_avail(struct atl1e_adapter *adapter)
1563 {
1564 struct atl1e_tx_ring *tx_ring = &adapter->tx_ring;
1565 u16 next_to_use = 0;
1566 u16 next_to_clean = 0;
1567
1568 next_to_clean = atomic_read(&tx_ring->next_to_clean);
1569 next_to_use = tx_ring->next_to_use;
1570
1571 return (u16)(next_to_clean > next_to_use) ?
1572 (next_to_clean - next_to_use - 1) :
1573 (tx_ring->count + next_to_clean - next_to_use - 1);
1574 }
1575
1576 /*
1577 * get next usable tpd
1578 * Note: should call atl1e_tdp_avail to make sure
1579 * there is enough tpd to use
1580 */
atl1e_get_tpd(struct atl1e_adapter * adapter)1581 static struct atl1e_tpd_desc *atl1e_get_tpd(struct atl1e_adapter *adapter)
1582 {
1583 struct atl1e_tx_ring *tx_ring = &adapter->tx_ring;
1584 u16 next_to_use = 0;
1585
1586 next_to_use = tx_ring->next_to_use;
1587 if (++tx_ring->next_to_use == tx_ring->count)
1588 tx_ring->next_to_use = 0;
1589
1590 memset(&tx_ring->desc[next_to_use], 0, sizeof(struct atl1e_tpd_desc));
1591 return &tx_ring->desc[next_to_use];
1592 }
1593
1594 static struct atl1e_tx_buffer *
atl1e_get_tx_buffer(struct atl1e_adapter * adapter,struct atl1e_tpd_desc * tpd)1595 atl1e_get_tx_buffer(struct atl1e_adapter *adapter, struct atl1e_tpd_desc *tpd)
1596 {
1597 struct atl1e_tx_ring *tx_ring = &adapter->tx_ring;
1598
1599 return &tx_ring->tx_buffer[tpd - tx_ring->desc];
1600 }
1601
1602 /* Calculate the transmit packet descript needed*/
atl1e_cal_tdp_req(const struct sk_buff * skb)1603 static u16 atl1e_cal_tdp_req(const struct sk_buff *skb)
1604 {
1605 int i = 0;
1606 u16 tpd_req = 1;
1607 u16 fg_size = 0;
1608 u16 proto_hdr_len = 0;
1609
1610 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
1611 fg_size = skb_frag_size(&skb_shinfo(skb)->frags[i]);
1612 tpd_req += ((fg_size + MAX_TX_BUF_LEN - 1) >> MAX_TX_BUF_SHIFT);
1613 }
1614
1615 if (skb_is_gso(skb)) {
1616 if (skb->protocol == htons(ETH_P_IP) ||
1617 (skb_shinfo(skb)->gso_type == SKB_GSO_TCPV6)) {
1618 proto_hdr_len = skb_tcp_all_headers(skb);
1619 if (proto_hdr_len < skb_headlen(skb)) {
1620 tpd_req += ((skb_headlen(skb) - proto_hdr_len +
1621 MAX_TX_BUF_LEN - 1) >>
1622 MAX_TX_BUF_SHIFT);
1623 }
1624 }
1625
1626 }
1627 return tpd_req;
1628 }
1629
atl1e_tso_csum(struct atl1e_adapter * adapter,struct sk_buff * skb,struct atl1e_tpd_desc * tpd)1630 static int atl1e_tso_csum(struct atl1e_adapter *adapter,
1631 struct sk_buff *skb, struct atl1e_tpd_desc *tpd)
1632 {
1633 unsigned short offload_type;
1634 u8 hdr_len;
1635 u32 real_len;
1636
1637 if (skb_is_gso(skb)) {
1638 int err;
1639
1640 err = skb_cow_head(skb, 0);
1641 if (err < 0)
1642 return err;
1643
1644 offload_type = skb_shinfo(skb)->gso_type;
1645
1646 if (offload_type & SKB_GSO_TCPV4) {
1647 real_len = (((unsigned char *)ip_hdr(skb) - skb->data)
1648 + ntohs(ip_hdr(skb)->tot_len));
1649
1650 if (real_len < skb->len) {
1651 err = pskb_trim(skb, real_len);
1652 if (err)
1653 return err;
1654 }
1655
1656 hdr_len = skb_tcp_all_headers(skb);
1657 if (unlikely(skb->len == hdr_len)) {
1658 /* only xsum need */
1659 netdev_warn(adapter->netdev,
1660 "IPV4 tso with zero data??\n");
1661 goto check_sum;
1662 } else {
1663 ip_hdr(skb)->check = 0;
1664 ip_hdr(skb)->tot_len = 0;
1665 tcp_hdr(skb)->check = ~csum_tcpudp_magic(
1666 ip_hdr(skb)->saddr,
1667 ip_hdr(skb)->daddr,
1668 0, IPPROTO_TCP, 0);
1669 tpd->word3 |= (ip_hdr(skb)->ihl &
1670 TDP_V4_IPHL_MASK) <<
1671 TPD_V4_IPHL_SHIFT;
1672 tpd->word3 |= ((tcp_hdrlen(skb) >> 2) &
1673 TPD_TCPHDRLEN_MASK) <<
1674 TPD_TCPHDRLEN_SHIFT;
1675 tpd->word3 |= ((skb_shinfo(skb)->gso_size) &
1676 TPD_MSS_MASK) << TPD_MSS_SHIFT;
1677 tpd->word3 |= 1 << TPD_SEGMENT_EN_SHIFT;
1678 }
1679 return 0;
1680 }
1681 }
1682
1683 check_sum:
1684 if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
1685 u8 css, cso;
1686
1687 cso = skb_checksum_start_offset(skb);
1688 if (unlikely(cso & 0x1)) {
1689 netdev_err(adapter->netdev,
1690 "payload offset should not ant event number\n");
1691 return -1;
1692 } else {
1693 css = cso + skb->csum_offset;
1694 tpd->word3 |= (cso & TPD_PLOADOFFSET_MASK) <<
1695 TPD_PLOADOFFSET_SHIFT;
1696 tpd->word3 |= (css & TPD_CCSUMOFFSET_MASK) <<
1697 TPD_CCSUMOFFSET_SHIFT;
1698 tpd->word3 |= 1 << TPD_CC_SEGMENT_EN_SHIFT;
1699 }
1700 }
1701
1702 return 0;
1703 }
1704
atl1e_tx_map(struct atl1e_adapter * adapter,struct sk_buff * skb,struct atl1e_tpd_desc * tpd)1705 static int atl1e_tx_map(struct atl1e_adapter *adapter,
1706 struct sk_buff *skb, struct atl1e_tpd_desc *tpd)
1707 {
1708 struct atl1e_tpd_desc *use_tpd = NULL;
1709 struct atl1e_tx_buffer *tx_buffer = NULL;
1710 u16 buf_len = skb_headlen(skb);
1711 u16 map_len = 0;
1712 u16 mapped_len = 0;
1713 u16 hdr_len = 0;
1714 u16 nr_frags;
1715 u16 f;
1716 int segment;
1717 int ring_start = adapter->tx_ring.next_to_use;
1718 int ring_end;
1719
1720 nr_frags = skb_shinfo(skb)->nr_frags;
1721 segment = (tpd->word3 >> TPD_SEGMENT_EN_SHIFT) & TPD_SEGMENT_EN_MASK;
1722 if (segment) {
1723 /* TSO */
1724 hdr_len = skb_tcp_all_headers(skb);
1725 map_len = hdr_len;
1726 use_tpd = tpd;
1727
1728 tx_buffer = atl1e_get_tx_buffer(adapter, use_tpd);
1729 tx_buffer->length = map_len;
1730 tx_buffer->dma = dma_map_single(&adapter->pdev->dev,
1731 skb->data, hdr_len,
1732 DMA_TO_DEVICE);
1733 if (dma_mapping_error(&adapter->pdev->dev, tx_buffer->dma))
1734 return -ENOSPC;
1735
1736 ATL1E_SET_PCIMAP_TYPE(tx_buffer, ATL1E_TX_PCIMAP_SINGLE);
1737 mapped_len += map_len;
1738 use_tpd->buffer_addr = cpu_to_le64(tx_buffer->dma);
1739 use_tpd->word2 = (use_tpd->word2 & (~TPD_BUFLEN_MASK)) |
1740 ((cpu_to_le32(tx_buffer->length) &
1741 TPD_BUFLEN_MASK) << TPD_BUFLEN_SHIFT);
1742 }
1743
1744 while (mapped_len < buf_len) {
1745 /* mapped_len == 0, means we should use the first tpd,
1746 which is given by caller */
1747 if (mapped_len == 0) {
1748 use_tpd = tpd;
1749 } else {
1750 use_tpd = atl1e_get_tpd(adapter);
1751 memcpy(use_tpd, tpd, sizeof(struct atl1e_tpd_desc));
1752 }
1753 tx_buffer = atl1e_get_tx_buffer(adapter, use_tpd);
1754 tx_buffer->skb = NULL;
1755
1756 tx_buffer->length = map_len =
1757 ((buf_len - mapped_len) >= MAX_TX_BUF_LEN) ?
1758 MAX_TX_BUF_LEN : (buf_len - mapped_len);
1759 tx_buffer->dma =
1760 dma_map_single(&adapter->pdev->dev,
1761 skb->data + mapped_len, map_len,
1762 DMA_TO_DEVICE);
1763
1764 if (dma_mapping_error(&adapter->pdev->dev, tx_buffer->dma)) {
1765 /* We need to unwind the mappings we've done */
1766 ring_end = adapter->tx_ring.next_to_use;
1767 adapter->tx_ring.next_to_use = ring_start;
1768 while (adapter->tx_ring.next_to_use != ring_end) {
1769 tpd = atl1e_get_tpd(adapter);
1770 tx_buffer = atl1e_get_tx_buffer(adapter, tpd);
1771 dma_unmap_single(&adapter->pdev->dev,
1772 tx_buffer->dma,
1773 tx_buffer->length,
1774 DMA_TO_DEVICE);
1775 }
1776 /* Reset the tx rings next pointer */
1777 adapter->tx_ring.next_to_use = ring_start;
1778 return -ENOSPC;
1779 }
1780
1781 ATL1E_SET_PCIMAP_TYPE(tx_buffer, ATL1E_TX_PCIMAP_SINGLE);
1782 mapped_len += map_len;
1783 use_tpd->buffer_addr = cpu_to_le64(tx_buffer->dma);
1784 use_tpd->word2 = (use_tpd->word2 & (~TPD_BUFLEN_MASK)) |
1785 ((cpu_to_le32(tx_buffer->length) &
1786 TPD_BUFLEN_MASK) << TPD_BUFLEN_SHIFT);
1787 }
1788
1789 for (f = 0; f < nr_frags; f++) {
1790 const skb_frag_t *frag = &skb_shinfo(skb)->frags[f];
1791 u16 i;
1792 u16 seg_num;
1793
1794 buf_len = skb_frag_size(frag);
1795
1796 seg_num = (buf_len + MAX_TX_BUF_LEN - 1) / MAX_TX_BUF_LEN;
1797 for (i = 0; i < seg_num; i++) {
1798 use_tpd = atl1e_get_tpd(adapter);
1799 memcpy(use_tpd, tpd, sizeof(struct atl1e_tpd_desc));
1800
1801 tx_buffer = atl1e_get_tx_buffer(adapter, use_tpd);
1802 BUG_ON(tx_buffer->skb);
1803
1804 tx_buffer->skb = NULL;
1805 tx_buffer->length =
1806 (buf_len > MAX_TX_BUF_LEN) ?
1807 MAX_TX_BUF_LEN : buf_len;
1808 buf_len -= tx_buffer->length;
1809
1810 tx_buffer->dma = skb_frag_dma_map(&adapter->pdev->dev,
1811 frag,
1812 (i * MAX_TX_BUF_LEN),
1813 tx_buffer->length,
1814 DMA_TO_DEVICE);
1815
1816 if (dma_mapping_error(&adapter->pdev->dev, tx_buffer->dma)) {
1817 /* We need to unwind the mappings we've done */
1818 ring_end = adapter->tx_ring.next_to_use;
1819 adapter->tx_ring.next_to_use = ring_start;
1820 while (adapter->tx_ring.next_to_use != ring_end) {
1821 tpd = atl1e_get_tpd(adapter);
1822 tx_buffer = atl1e_get_tx_buffer(adapter, tpd);
1823 dma_unmap_page(&adapter->pdev->dev, tx_buffer->dma,
1824 tx_buffer->length, DMA_TO_DEVICE);
1825 }
1826
1827 /* Reset the ring next to use pointer */
1828 adapter->tx_ring.next_to_use = ring_start;
1829 return -ENOSPC;
1830 }
1831
1832 ATL1E_SET_PCIMAP_TYPE(tx_buffer, ATL1E_TX_PCIMAP_PAGE);
1833 use_tpd->buffer_addr = cpu_to_le64(tx_buffer->dma);
1834 use_tpd->word2 = (use_tpd->word2 & (~TPD_BUFLEN_MASK)) |
1835 ((cpu_to_le32(tx_buffer->length) &
1836 TPD_BUFLEN_MASK) << TPD_BUFLEN_SHIFT);
1837 }
1838 }
1839
1840 if ((tpd->word3 >> TPD_SEGMENT_EN_SHIFT) & TPD_SEGMENT_EN_MASK)
1841 /* note this one is a tcp header */
1842 tpd->word3 |= 1 << TPD_HDRFLAG_SHIFT;
1843 /* The last tpd */
1844
1845 use_tpd->word3 |= 1 << TPD_EOP_SHIFT;
1846 /* The last buffer info contain the skb address,
1847 so it will be free after unmap */
1848 tx_buffer->skb = skb;
1849 return 0;
1850 }
1851
atl1e_tx_queue(struct atl1e_adapter * adapter,u16 count,struct atl1e_tpd_desc * tpd)1852 static void atl1e_tx_queue(struct atl1e_adapter *adapter, u16 count,
1853 struct atl1e_tpd_desc *tpd)
1854 {
1855 struct atl1e_tx_ring *tx_ring = &adapter->tx_ring;
1856 /* Force memory writes to complete before letting h/w
1857 * know there are new descriptors to fetch. (Only
1858 * applicable for weak-ordered memory model archs,
1859 * such as IA-64). */
1860 wmb();
1861 AT_WRITE_REG(&adapter->hw, REG_MB_TPD_PROD_IDX, tx_ring->next_to_use);
1862 }
1863
atl1e_xmit_frame(struct sk_buff * skb,struct net_device * netdev)1864 static netdev_tx_t atl1e_xmit_frame(struct sk_buff *skb,
1865 struct net_device *netdev)
1866 {
1867 struct atl1e_adapter *adapter = netdev_priv(netdev);
1868 u16 tpd_req = 1;
1869 struct atl1e_tpd_desc *tpd;
1870
1871 if (test_bit(__AT_DOWN, &adapter->flags)) {
1872 dev_kfree_skb_any(skb);
1873 return NETDEV_TX_OK;
1874 }
1875
1876 if (unlikely(skb->len <= 0)) {
1877 dev_kfree_skb_any(skb);
1878 return NETDEV_TX_OK;
1879 }
1880 tpd_req = atl1e_cal_tdp_req(skb);
1881
1882 if (atl1e_tpd_avail(adapter) < tpd_req) {
1883 /* no enough descriptor, just stop queue */
1884 netif_stop_queue(netdev);
1885 return NETDEV_TX_BUSY;
1886 }
1887
1888 tpd = atl1e_get_tpd(adapter);
1889
1890 if (skb_vlan_tag_present(skb)) {
1891 u16 vlan_tag = skb_vlan_tag_get(skb);
1892 u16 atl1e_vlan_tag;
1893
1894 tpd->word3 |= 1 << TPD_INS_VL_TAG_SHIFT;
1895 AT_VLAN_TAG_TO_TPD_TAG(vlan_tag, atl1e_vlan_tag);
1896 tpd->word2 |= (atl1e_vlan_tag & TPD_VLANTAG_MASK) <<
1897 TPD_VLAN_SHIFT;
1898 }
1899
1900 if (skb->protocol == htons(ETH_P_8021Q))
1901 tpd->word3 |= 1 << TPD_VL_TAGGED_SHIFT;
1902
1903 if (skb_network_offset(skb) != ETH_HLEN)
1904 tpd->word3 |= 1 << TPD_ETHTYPE_SHIFT; /* 802.3 frame */
1905
1906 /* do TSO and check sum */
1907 if (atl1e_tso_csum(adapter, skb, tpd) != 0) {
1908 dev_kfree_skb_any(skb);
1909 return NETDEV_TX_OK;
1910 }
1911
1912 if (atl1e_tx_map(adapter, skb, tpd)) {
1913 dev_kfree_skb_any(skb);
1914 goto out;
1915 }
1916
1917 atl1e_tx_queue(adapter, tpd_req, tpd);
1918 out:
1919 return NETDEV_TX_OK;
1920 }
1921
atl1e_free_irq(struct atl1e_adapter * adapter)1922 static void atl1e_free_irq(struct atl1e_adapter *adapter)
1923 {
1924 struct net_device *netdev = adapter->netdev;
1925
1926 free_irq(adapter->pdev->irq, netdev);
1927 }
1928
atl1e_request_irq(struct atl1e_adapter * adapter)1929 static int atl1e_request_irq(struct atl1e_adapter *adapter)
1930 {
1931 struct pci_dev *pdev = adapter->pdev;
1932 struct net_device *netdev = adapter->netdev;
1933 int err = 0;
1934
1935 err = request_irq(pdev->irq, atl1e_intr, IRQF_SHARED, netdev->name,
1936 netdev);
1937 if (err) {
1938 netdev_dbg(adapter->netdev,
1939 "Unable to allocate interrupt Error: %d\n", err);
1940 return err;
1941 }
1942 netdev_dbg(netdev, "atl1e_request_irq OK\n");
1943 return err;
1944 }
1945
atl1e_up(struct atl1e_adapter * adapter)1946 int atl1e_up(struct atl1e_adapter *adapter)
1947 {
1948 struct net_device *netdev = adapter->netdev;
1949 int err = 0;
1950 u32 val;
1951
1952 /* hardware has been reset, we need to reload some things */
1953 err = atl1e_init_hw(&adapter->hw);
1954 if (err) {
1955 err = -EIO;
1956 return err;
1957 }
1958 atl1e_init_ring_ptrs(adapter);
1959 atl1e_set_multi(netdev);
1960 atl1e_restore_vlan(adapter);
1961
1962 if (atl1e_configure(adapter)) {
1963 err = -EIO;
1964 goto err_up;
1965 }
1966
1967 clear_bit(__AT_DOWN, &adapter->flags);
1968 napi_enable(&adapter->napi);
1969 atl1e_irq_enable(adapter);
1970 val = AT_READ_REG(&adapter->hw, REG_MASTER_CTRL);
1971 AT_WRITE_REG(&adapter->hw, REG_MASTER_CTRL,
1972 val | MASTER_CTRL_MANUAL_INT);
1973
1974 err_up:
1975 return err;
1976 }
1977
atl1e_down(struct atl1e_adapter * adapter)1978 void atl1e_down(struct atl1e_adapter *adapter)
1979 {
1980 struct net_device *netdev = adapter->netdev;
1981
1982 /* signal that we're down so the interrupt handler does not
1983 * reschedule our watchdog timer */
1984 set_bit(__AT_DOWN, &adapter->flags);
1985
1986 netif_stop_queue(netdev);
1987
1988 /* reset MAC to disable all RX/TX */
1989 atl1e_reset_hw(&adapter->hw);
1990 msleep(1);
1991
1992 napi_disable(&adapter->napi);
1993 atl1e_del_timer(adapter);
1994 atl1e_irq_disable(adapter);
1995
1996 netif_carrier_off(netdev);
1997 adapter->link_speed = SPEED_0;
1998 adapter->link_duplex = -1;
1999 atl1e_clean_tx_ring(adapter);
2000 atl1e_clean_rx_ring(adapter);
2001 }
2002
2003 /**
2004 * atl1e_open - Called when a network interface is made active
2005 * @netdev: network interface device structure
2006 *
2007 * Returns 0 on success, negative value on failure
2008 *
2009 * The open entry point is called when a network interface is made
2010 * active by the system (IFF_UP). At this point all resources needed
2011 * for transmit and receive operations are allocated, the interrupt
2012 * handler is registered with the OS, the watchdog timer is started,
2013 * and the stack is notified that the interface is ready.
2014 */
atl1e_open(struct net_device * netdev)2015 static int atl1e_open(struct net_device *netdev)
2016 {
2017 struct atl1e_adapter *adapter = netdev_priv(netdev);
2018 int err;
2019
2020 /* disallow open during test */
2021 if (test_bit(__AT_TESTING, &adapter->flags))
2022 return -EBUSY;
2023
2024 /* allocate rx/tx dma buffer & descriptors */
2025 atl1e_init_ring_resources(adapter);
2026 err = atl1e_setup_ring_resources(adapter);
2027 if (unlikely(err))
2028 return err;
2029
2030 err = atl1e_request_irq(adapter);
2031 if (unlikely(err))
2032 goto err_req_irq;
2033
2034 err = atl1e_up(adapter);
2035 if (unlikely(err))
2036 goto err_up;
2037
2038 return 0;
2039
2040 err_up:
2041 atl1e_free_irq(adapter);
2042 err_req_irq:
2043 atl1e_free_ring_resources(adapter);
2044 atl1e_reset_hw(&adapter->hw);
2045
2046 return err;
2047 }
2048
2049 /**
2050 * atl1e_close - Disables a network interface
2051 * @netdev: network interface device structure
2052 *
2053 * Returns 0, this is not allowed to fail
2054 *
2055 * The close entry point is called when an interface is de-activated
2056 * by the OS. The hardware is still under the drivers control, but
2057 * needs to be disabled. A global MAC reset is issued to stop the
2058 * hardware, and all transmit and receive resources are freed.
2059 */
atl1e_close(struct net_device * netdev)2060 static int atl1e_close(struct net_device *netdev)
2061 {
2062 struct atl1e_adapter *adapter = netdev_priv(netdev);
2063
2064 WARN_ON(test_bit(__AT_RESETTING, &adapter->flags));
2065 atl1e_down(adapter);
2066 atl1e_free_irq(adapter);
2067 atl1e_free_ring_resources(adapter);
2068
2069 return 0;
2070 }
2071
atl1e_suspend(struct pci_dev * pdev,pm_message_t state)2072 static int atl1e_suspend(struct pci_dev *pdev, pm_message_t state)
2073 {
2074 struct net_device *netdev = pci_get_drvdata(pdev);
2075 struct atl1e_adapter *adapter = netdev_priv(netdev);
2076 struct atl1e_hw *hw = &adapter->hw;
2077 u32 ctrl = 0;
2078 u32 mac_ctrl_data = 0;
2079 u32 wol_ctrl_data = 0;
2080 u16 mii_advertise_data = 0;
2081 u16 mii_bmsr_data = 0;
2082 u16 mii_intr_status_data = 0;
2083 u32 wufc = adapter->wol;
2084 u32 i;
2085 #ifdef CONFIG_PM
2086 int retval = 0;
2087 #endif
2088
2089 if (netif_running(netdev)) {
2090 WARN_ON(test_bit(__AT_RESETTING, &adapter->flags));
2091 atl1e_down(adapter);
2092 }
2093 netif_device_detach(netdev);
2094
2095 #ifdef CONFIG_PM
2096 retval = pci_save_state(pdev);
2097 if (retval)
2098 return retval;
2099 #endif
2100
2101 if (wufc) {
2102 /* get link status */
2103 atl1e_read_phy_reg(hw, MII_BMSR, &mii_bmsr_data);
2104 atl1e_read_phy_reg(hw, MII_BMSR, &mii_bmsr_data);
2105
2106 mii_advertise_data = ADVERTISE_10HALF;
2107
2108 if ((atl1e_write_phy_reg(hw, MII_CTRL1000, 0) != 0) ||
2109 (atl1e_write_phy_reg(hw,
2110 MII_ADVERTISE, mii_advertise_data) != 0) ||
2111 (atl1e_phy_commit(hw)) != 0) {
2112 netdev_dbg(adapter->netdev, "set phy register failed\n");
2113 goto wol_dis;
2114 }
2115
2116 hw->phy_configured = false; /* re-init PHY when resume */
2117
2118 /* turn on magic packet wol */
2119 if (wufc & AT_WUFC_MAG)
2120 wol_ctrl_data |= WOL_MAGIC_EN | WOL_MAGIC_PME_EN;
2121
2122 if (wufc & AT_WUFC_LNKC) {
2123 /* if orignal link status is link, just wait for retrive link */
2124 if (mii_bmsr_data & BMSR_LSTATUS) {
2125 for (i = 0; i < AT_SUSPEND_LINK_TIMEOUT; i++) {
2126 msleep(100);
2127 atl1e_read_phy_reg(hw, MII_BMSR,
2128 &mii_bmsr_data);
2129 if (mii_bmsr_data & BMSR_LSTATUS)
2130 break;
2131 }
2132
2133 if ((mii_bmsr_data & BMSR_LSTATUS) == 0)
2134 netdev_dbg(adapter->netdev,
2135 "Link may change when suspend\n");
2136 }
2137 wol_ctrl_data |= WOL_LINK_CHG_EN | WOL_LINK_CHG_PME_EN;
2138 /* only link up can wake up */
2139 if (atl1e_write_phy_reg(hw, MII_INT_CTRL, 0x400) != 0) {
2140 netdev_dbg(adapter->netdev,
2141 "read write phy register failed\n");
2142 goto wol_dis;
2143 }
2144 }
2145 /* clear phy interrupt */
2146 atl1e_read_phy_reg(hw, MII_INT_STATUS, &mii_intr_status_data);
2147 /* Config MAC Ctrl register */
2148 mac_ctrl_data = MAC_CTRL_RX_EN;
2149 /* set to 10/100M halt duplex */
2150 mac_ctrl_data |= MAC_CTRL_SPEED_10_100 << MAC_CTRL_SPEED_SHIFT;
2151 mac_ctrl_data |= (((u32)adapter->hw.preamble_len &
2152 MAC_CTRL_PRMLEN_MASK) <<
2153 MAC_CTRL_PRMLEN_SHIFT);
2154
2155 __atl1e_vlan_mode(netdev->features, &mac_ctrl_data);
2156
2157 /* magic packet maybe Broadcast&multicast&Unicast frame */
2158 if (wufc & AT_WUFC_MAG)
2159 mac_ctrl_data |= MAC_CTRL_BC_EN;
2160
2161 netdev_dbg(adapter->netdev, "suspend MAC=0x%x\n",
2162 mac_ctrl_data);
2163
2164 AT_WRITE_REG(hw, REG_WOL_CTRL, wol_ctrl_data);
2165 AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data);
2166 /* pcie patch */
2167 ctrl = AT_READ_REG(hw, REG_PCIE_PHYMISC);
2168 ctrl |= PCIE_PHYMISC_FORCE_RCV_DET;
2169 AT_WRITE_REG(hw, REG_PCIE_PHYMISC, ctrl);
2170 pci_enable_wake(pdev, pci_choose_state(pdev, state), 1);
2171 goto suspend_exit;
2172 }
2173 wol_dis:
2174
2175 /* WOL disabled */
2176 AT_WRITE_REG(hw, REG_WOL_CTRL, 0);
2177
2178 /* pcie patch */
2179 ctrl = AT_READ_REG(hw, REG_PCIE_PHYMISC);
2180 ctrl |= PCIE_PHYMISC_FORCE_RCV_DET;
2181 AT_WRITE_REG(hw, REG_PCIE_PHYMISC, ctrl);
2182
2183 atl1e_force_ps(hw);
2184 hw->phy_configured = false; /* re-init PHY when resume */
2185
2186 pci_enable_wake(pdev, pci_choose_state(pdev, state), 0);
2187
2188 suspend_exit:
2189
2190 if (netif_running(netdev))
2191 atl1e_free_irq(adapter);
2192
2193 pci_disable_device(pdev);
2194
2195 pci_set_power_state(pdev, pci_choose_state(pdev, state));
2196
2197 return 0;
2198 }
2199
2200 #ifdef CONFIG_PM
atl1e_resume(struct pci_dev * pdev)2201 static int atl1e_resume(struct pci_dev *pdev)
2202 {
2203 struct net_device *netdev = pci_get_drvdata(pdev);
2204 struct atl1e_adapter *adapter = netdev_priv(netdev);
2205 u32 err;
2206
2207 pci_set_power_state(pdev, PCI_D0);
2208 pci_restore_state(pdev);
2209
2210 err = pci_enable_device(pdev);
2211 if (err) {
2212 netdev_err(adapter->netdev,
2213 "Cannot enable PCI device from suspend\n");
2214 return err;
2215 }
2216
2217 pci_set_master(pdev);
2218
2219 AT_READ_REG(&adapter->hw, REG_WOL_CTRL); /* clear WOL status */
2220
2221 pci_enable_wake(pdev, PCI_D3hot, 0);
2222 pci_enable_wake(pdev, PCI_D3cold, 0);
2223
2224 AT_WRITE_REG(&adapter->hw, REG_WOL_CTRL, 0);
2225
2226 if (netif_running(netdev)) {
2227 err = atl1e_request_irq(adapter);
2228 if (err)
2229 return err;
2230 }
2231
2232 atl1e_reset_hw(&adapter->hw);
2233
2234 if (netif_running(netdev))
2235 atl1e_up(adapter);
2236
2237 netif_device_attach(netdev);
2238
2239 return 0;
2240 }
2241 #endif
2242
atl1e_shutdown(struct pci_dev * pdev)2243 static void atl1e_shutdown(struct pci_dev *pdev)
2244 {
2245 atl1e_suspend(pdev, PMSG_SUSPEND);
2246 }
2247
2248 static const struct net_device_ops atl1e_netdev_ops = {
2249 .ndo_open = atl1e_open,
2250 .ndo_stop = atl1e_close,
2251 .ndo_start_xmit = atl1e_xmit_frame,
2252 .ndo_get_stats = atl1e_get_stats,
2253 .ndo_set_rx_mode = atl1e_set_multi,
2254 .ndo_validate_addr = eth_validate_addr,
2255 .ndo_set_mac_address = atl1e_set_mac_addr,
2256 .ndo_fix_features = atl1e_fix_features,
2257 .ndo_set_features = atl1e_set_features,
2258 .ndo_change_mtu = atl1e_change_mtu,
2259 .ndo_eth_ioctl = atl1e_ioctl,
2260 .ndo_tx_timeout = atl1e_tx_timeout,
2261 #ifdef CONFIG_NET_POLL_CONTROLLER
2262 .ndo_poll_controller = atl1e_netpoll,
2263 #endif
2264
2265 };
2266
atl1e_init_netdev(struct net_device * netdev,struct pci_dev * pdev)2267 static int atl1e_init_netdev(struct net_device *netdev, struct pci_dev *pdev)
2268 {
2269 SET_NETDEV_DEV(netdev, &pdev->dev);
2270 pci_set_drvdata(pdev, netdev);
2271
2272 netdev->netdev_ops = &atl1e_netdev_ops;
2273
2274 netdev->watchdog_timeo = AT_TX_WATCHDOG;
2275 /* MTU range: 42 - 8170 */
2276 netdev->min_mtu = ETH_ZLEN - (ETH_HLEN + VLAN_HLEN);
2277 netdev->max_mtu = MAX_JUMBO_FRAME_SIZE -
2278 (ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN);
2279 atl1e_set_ethtool_ops(netdev);
2280
2281 netdev->hw_features = NETIF_F_SG | NETIF_F_HW_CSUM | NETIF_F_TSO |
2282 NETIF_F_HW_VLAN_CTAG_RX;
2283 netdev->features = netdev->hw_features | NETIF_F_HW_VLAN_CTAG_TX;
2284 /* not enabled by default */
2285 netdev->hw_features |= NETIF_F_RXALL | NETIF_F_RXFCS;
2286 return 0;
2287 }
2288
2289 /**
2290 * atl1e_probe - Device Initialization Routine
2291 * @pdev: PCI device information struct
2292 * @ent: entry in atl1e_pci_tbl
2293 *
2294 * Returns 0 on success, negative on failure
2295 *
2296 * atl1e_probe initializes an adapter identified by a pci_dev structure.
2297 * The OS initialization, configuring of the adapter private structure,
2298 * and a hardware reset occur.
2299 */
atl1e_probe(struct pci_dev * pdev,const struct pci_device_id * ent)2300 static int atl1e_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
2301 {
2302 struct net_device *netdev;
2303 struct atl1e_adapter *adapter = NULL;
2304 static int cards_found;
2305
2306 int err = 0;
2307
2308 err = pci_enable_device(pdev);
2309 if (err)
2310 return dev_err_probe(&pdev->dev, err, "cannot enable PCI device\n");
2311
2312 /*
2313 * The atl1e chip can DMA to 64-bit addresses, but it uses a single
2314 * shared register for the high 32 bits, so only a single, aligned,
2315 * 4 GB physical address range can be used at a time.
2316 *
2317 * Supporting 64-bit DMA on this hardware is more trouble than it's
2318 * worth. It is far easier to limit to 32-bit DMA than update
2319 * various kernel subsystems to support the mechanics required by a
2320 * fixed-high-32-bit system.
2321 */
2322 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
2323 if (err) {
2324 dev_err(&pdev->dev, "No usable DMA configuration,aborting\n");
2325 goto err_dma;
2326 }
2327
2328 err = pci_request_regions(pdev, atl1e_driver_name);
2329 if (err) {
2330 dev_err(&pdev->dev, "cannot obtain PCI resources\n");
2331 goto err_pci_reg;
2332 }
2333
2334 pci_set_master(pdev);
2335
2336 netdev = alloc_etherdev(sizeof(struct atl1e_adapter));
2337 if (netdev == NULL) {
2338 err = -ENOMEM;
2339 goto err_alloc_etherdev;
2340 }
2341
2342 err = atl1e_init_netdev(netdev, pdev);
2343 if (err) {
2344 netdev_err(netdev, "init netdevice failed\n");
2345 goto err_init_netdev;
2346 }
2347 adapter = netdev_priv(netdev);
2348 adapter->bd_number = cards_found;
2349 adapter->netdev = netdev;
2350 adapter->pdev = pdev;
2351 adapter->hw.adapter = adapter;
2352 adapter->hw.hw_addr = pci_iomap(pdev, BAR_0, 0);
2353 if (!adapter->hw.hw_addr) {
2354 err = -EIO;
2355 netdev_err(netdev, "cannot map device registers\n");
2356 goto err_ioremap;
2357 }
2358
2359 /* init mii data */
2360 adapter->mii.dev = netdev;
2361 adapter->mii.mdio_read = atl1e_mdio_read;
2362 adapter->mii.mdio_write = atl1e_mdio_write;
2363 adapter->mii.phy_id_mask = 0x1f;
2364 adapter->mii.reg_num_mask = MDIO_REG_ADDR_MASK;
2365
2366 netif_napi_add(netdev, &adapter->napi, atl1e_clean);
2367
2368 timer_setup(&adapter->phy_config_timer, atl1e_phy_config, 0);
2369
2370 /* get user settings */
2371 atl1e_check_options(adapter);
2372 /*
2373 * Mark all PCI regions associated with PCI device
2374 * pdev as being reserved by owner atl1e_driver_name
2375 * Enables bus-mastering on the device and calls
2376 * pcibios_set_master to do the needed arch specific settings
2377 */
2378 atl1e_setup_pcicmd(pdev);
2379 /* setup the private structure */
2380 err = atl1e_sw_init(adapter);
2381 if (err) {
2382 netdev_err(netdev, "net device private data init failed\n");
2383 goto err_sw_init;
2384 }
2385
2386 /* Init GPHY as early as possible due to power saving issue */
2387 atl1e_phy_init(&adapter->hw);
2388 /* reset the controller to
2389 * put the device in a known good starting state */
2390 err = atl1e_reset_hw(&adapter->hw);
2391 if (err) {
2392 err = -EIO;
2393 goto err_reset;
2394 }
2395
2396 if (atl1e_read_mac_addr(&adapter->hw) != 0) {
2397 err = -EIO;
2398 netdev_err(netdev, "get mac address failed\n");
2399 goto err_eeprom;
2400 }
2401
2402 eth_hw_addr_set(netdev, adapter->hw.mac_addr);
2403 netdev_dbg(netdev, "mac address : %pM\n", adapter->hw.mac_addr);
2404
2405 INIT_WORK(&adapter->reset_task, atl1e_reset_task);
2406 INIT_WORK(&adapter->link_chg_task, atl1e_link_chg_task);
2407 netif_set_tso_max_size(netdev, MAX_TSO_SEG_SIZE);
2408 err = register_netdev(netdev);
2409 if (err) {
2410 netdev_err(netdev, "register netdevice failed\n");
2411 goto err_register;
2412 }
2413
2414 /* assume we have no link for now */
2415 netif_stop_queue(netdev);
2416 netif_carrier_off(netdev);
2417
2418 cards_found++;
2419
2420 return 0;
2421
2422 err_reset:
2423 err_register:
2424 err_sw_init:
2425 err_eeprom:
2426 pci_iounmap(pdev, adapter->hw.hw_addr);
2427 err_init_netdev:
2428 err_ioremap:
2429 free_netdev(netdev);
2430 err_alloc_etherdev:
2431 pci_release_regions(pdev);
2432 err_pci_reg:
2433 err_dma:
2434 pci_disable_device(pdev);
2435 return err;
2436 }
2437
2438 /**
2439 * atl1e_remove - Device Removal Routine
2440 * @pdev: PCI device information struct
2441 *
2442 * atl1e_remove is called by the PCI subsystem to alert the driver
2443 * that it should release a PCI device. The could be caused by a
2444 * Hot-Plug event, or because the driver is going to be removed from
2445 * memory.
2446 */
atl1e_remove(struct pci_dev * pdev)2447 static void atl1e_remove(struct pci_dev *pdev)
2448 {
2449 struct net_device *netdev = pci_get_drvdata(pdev);
2450 struct atl1e_adapter *adapter = netdev_priv(netdev);
2451
2452 /*
2453 * flush_scheduled work may reschedule our watchdog task, so
2454 * explicitly disable watchdog tasks from being rescheduled
2455 */
2456 set_bit(__AT_DOWN, &adapter->flags);
2457
2458 atl1e_del_timer(adapter);
2459 atl1e_cancel_work(adapter);
2460
2461 unregister_netdev(netdev);
2462 atl1e_free_ring_resources(adapter);
2463 atl1e_force_ps(&adapter->hw);
2464 pci_iounmap(pdev, adapter->hw.hw_addr);
2465 pci_release_regions(pdev);
2466 free_netdev(netdev);
2467 pci_disable_device(pdev);
2468 }
2469
2470 /**
2471 * atl1e_io_error_detected - called when PCI error is detected
2472 * @pdev: Pointer to PCI device
2473 * @state: The current pci connection state
2474 *
2475 * This function is called after a PCI bus error affecting
2476 * this device has been detected.
2477 */
2478 static pci_ers_result_t
atl1e_io_error_detected(struct pci_dev * pdev,pci_channel_state_t state)2479 atl1e_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
2480 {
2481 struct net_device *netdev = pci_get_drvdata(pdev);
2482 struct atl1e_adapter *adapter = netdev_priv(netdev);
2483
2484 netif_device_detach(netdev);
2485
2486 if (state == pci_channel_io_perm_failure)
2487 return PCI_ERS_RESULT_DISCONNECT;
2488
2489 if (netif_running(netdev))
2490 atl1e_down(adapter);
2491
2492 pci_disable_device(pdev);
2493
2494 /* Request a slot reset. */
2495 return PCI_ERS_RESULT_NEED_RESET;
2496 }
2497
2498 /**
2499 * atl1e_io_slot_reset - called after the pci bus has been reset.
2500 * @pdev: Pointer to PCI device
2501 *
2502 * Restart the card from scratch, as if from a cold-boot. Implementation
2503 * resembles the first-half of the e1000_resume routine.
2504 */
atl1e_io_slot_reset(struct pci_dev * pdev)2505 static pci_ers_result_t atl1e_io_slot_reset(struct pci_dev *pdev)
2506 {
2507 struct net_device *netdev = pci_get_drvdata(pdev);
2508 struct atl1e_adapter *adapter = netdev_priv(netdev);
2509
2510 if (pci_enable_device(pdev)) {
2511 netdev_err(adapter->netdev,
2512 "Cannot re-enable PCI device after reset\n");
2513 return PCI_ERS_RESULT_DISCONNECT;
2514 }
2515 pci_set_master(pdev);
2516
2517 pci_enable_wake(pdev, PCI_D3hot, 0);
2518 pci_enable_wake(pdev, PCI_D3cold, 0);
2519
2520 atl1e_reset_hw(&adapter->hw);
2521
2522 return PCI_ERS_RESULT_RECOVERED;
2523 }
2524
2525 /**
2526 * atl1e_io_resume - called when traffic can start flowing again.
2527 * @pdev: Pointer to PCI device
2528 *
2529 * This callback is called when the error recovery driver tells us that
2530 * its OK to resume normal operation. Implementation resembles the
2531 * second-half of the atl1e_resume routine.
2532 */
atl1e_io_resume(struct pci_dev * pdev)2533 static void atl1e_io_resume(struct pci_dev *pdev)
2534 {
2535 struct net_device *netdev = pci_get_drvdata(pdev);
2536 struct atl1e_adapter *adapter = netdev_priv(netdev);
2537
2538 if (netif_running(netdev)) {
2539 if (atl1e_up(adapter)) {
2540 netdev_err(adapter->netdev,
2541 "can't bring device back up after reset\n");
2542 return;
2543 }
2544 }
2545
2546 netif_device_attach(netdev);
2547 }
2548
2549 static const struct pci_error_handlers atl1e_err_handler = {
2550 .error_detected = atl1e_io_error_detected,
2551 .slot_reset = atl1e_io_slot_reset,
2552 .resume = atl1e_io_resume,
2553 };
2554
2555 static struct pci_driver atl1e_driver = {
2556 .name = atl1e_driver_name,
2557 .id_table = atl1e_pci_tbl,
2558 .probe = atl1e_probe,
2559 .remove = atl1e_remove,
2560 /* Power Management Hooks */
2561 #ifdef CONFIG_PM
2562 .suspend = atl1e_suspend,
2563 .resume = atl1e_resume,
2564 #endif
2565 .shutdown = atl1e_shutdown,
2566 .err_handler = &atl1e_err_handler
2567 };
2568
2569 module_pci_driver(atl1e_driver);
2570