xref: /linux/drivers/net/wireless/ath/ath12k/wmi.c (revision d69eb204c255c35abd9e8cb621484e8074c75eaa)
1 // SPDX-License-Identifier: BSD-3-Clause-Clear
2 /*
3  * Copyright (c) 2018-2021 The Linux Foundation. All rights reserved.
4  * Copyright (c) 2021-2025 Qualcomm Innovation Center, Inc. All rights reserved.
5  */
6 #include <linux/skbuff.h>
7 #include <linux/ctype.h>
8 #include <net/mac80211.h>
9 #include <net/cfg80211.h>
10 #include <linux/completion.h>
11 #include <linux/if_ether.h>
12 #include <linux/types.h>
13 #include <linux/pci.h>
14 #include <linux/uuid.h>
15 #include <linux/time.h>
16 #include <linux/of.h>
17 #include "core.h"
18 #include "debugfs.h"
19 #include "debug.h"
20 #include "mac.h"
21 #include "hw.h"
22 #include "peer.h"
23 #include "p2p.h"
24 #include "testmode.h"
25 
26 struct ath12k_wmi_svc_ready_parse {
27 	bool wmi_svc_bitmap_done;
28 };
29 
30 struct wmi_tlv_fw_stats_parse {
31 	const struct wmi_stats_event *ev;
32 	struct ath12k_fw_stats *stats;
33 };
34 
35 struct ath12k_wmi_dma_ring_caps_parse {
36 	struct ath12k_wmi_dma_ring_caps_params *dma_ring_caps;
37 	u32 n_dma_ring_caps;
38 };
39 
40 struct ath12k_wmi_service_ext_arg {
41 	u32 default_conc_scan_config_bits;
42 	u32 default_fw_config_bits;
43 	struct ath12k_wmi_ppe_threshold_arg ppet;
44 	u32 he_cap_info;
45 	u32 mpdu_density;
46 	u32 max_bssid_rx_filters;
47 	u32 num_hw_modes;
48 	u32 num_phy;
49 };
50 
51 struct ath12k_wmi_svc_rdy_ext_parse {
52 	struct ath12k_wmi_service_ext_arg arg;
53 	const struct ath12k_wmi_soc_mac_phy_hw_mode_caps_params *hw_caps;
54 	const struct ath12k_wmi_hw_mode_cap_params *hw_mode_caps;
55 	u32 n_hw_mode_caps;
56 	u32 tot_phy_id;
57 	struct ath12k_wmi_hw_mode_cap_params pref_hw_mode_caps;
58 	struct ath12k_wmi_mac_phy_caps_params *mac_phy_caps;
59 	u32 n_mac_phy_caps;
60 	const struct ath12k_wmi_soc_hal_reg_caps_params *soc_hal_reg_caps;
61 	const struct ath12k_wmi_hal_reg_caps_ext_params *ext_hal_reg_caps;
62 	u32 n_ext_hal_reg_caps;
63 	struct ath12k_wmi_dma_ring_caps_parse dma_caps_parse;
64 	bool hw_mode_done;
65 	bool mac_phy_done;
66 	bool ext_hal_reg_done;
67 	bool mac_phy_chainmask_combo_done;
68 	bool mac_phy_chainmask_cap_done;
69 	bool oem_dma_ring_cap_done;
70 	bool dma_ring_cap_done;
71 };
72 
73 struct ath12k_wmi_svc_rdy_ext2_arg {
74 	u32 reg_db_version;
75 	u32 hw_min_max_tx_power_2ghz;
76 	u32 hw_min_max_tx_power_5ghz;
77 	u32 chwidth_num_peer_caps;
78 	u32 preamble_puncture_bw;
79 	u32 max_user_per_ppdu_ofdma;
80 	u32 max_user_per_ppdu_mumimo;
81 	u32 target_cap_flags;
82 	u32 eht_cap_mac_info[WMI_MAX_EHTCAP_MAC_SIZE];
83 	u32 max_num_linkview_peers;
84 	u32 max_num_msduq_supported_per_tid;
85 	u32 default_num_msduq_supported_per_tid;
86 };
87 
88 struct ath12k_wmi_svc_rdy_ext2_parse {
89 	struct ath12k_wmi_svc_rdy_ext2_arg arg;
90 	struct ath12k_wmi_dma_ring_caps_parse dma_caps_parse;
91 	bool dma_ring_cap_done;
92 	bool spectral_bin_scaling_done;
93 	bool mac_phy_caps_ext_done;
94 	bool hal_reg_caps_ext2_done;
95 	bool scan_radio_caps_ext2_done;
96 	bool twt_caps_done;
97 	bool htt_msdu_idx_to_qtype_map_done;
98 	bool dbs_or_sbs_cap_ext_done;
99 };
100 
101 struct ath12k_wmi_rdy_parse {
102 	u32 num_extra_mac_addr;
103 };
104 
105 struct ath12k_wmi_dma_buf_release_arg {
106 	struct ath12k_wmi_dma_buf_release_fixed_params fixed;
107 	const struct ath12k_wmi_dma_buf_release_entry_params *buf_entry;
108 	const struct ath12k_wmi_dma_buf_release_meta_data_params *meta_data;
109 	u32 num_buf_entry;
110 	u32 num_meta;
111 	bool buf_entry_done;
112 	bool meta_data_done;
113 };
114 
115 struct ath12k_wmi_tlv_policy {
116 	size_t min_len;
117 };
118 
119 struct wmi_tlv_mgmt_rx_parse {
120 	const struct ath12k_wmi_mgmt_rx_params *fixed;
121 	const u8 *frame_buf;
122 	bool frame_buf_done;
123 };
124 
125 static const struct ath12k_wmi_tlv_policy ath12k_wmi_tlv_policies[] = {
126 	[WMI_TAG_ARRAY_BYTE] = { .min_len = 0 },
127 	[WMI_TAG_ARRAY_UINT32] = { .min_len = 0 },
128 	[WMI_TAG_SERVICE_READY_EVENT] = {
129 		.min_len = sizeof(struct wmi_service_ready_event) },
130 	[WMI_TAG_SERVICE_READY_EXT_EVENT] = {
131 		.min_len = sizeof(struct wmi_service_ready_ext_event) },
132 	[WMI_TAG_SOC_MAC_PHY_HW_MODE_CAPS] = {
133 		.min_len = sizeof(struct ath12k_wmi_soc_mac_phy_hw_mode_caps_params) },
134 	[WMI_TAG_SOC_HAL_REG_CAPABILITIES] = {
135 		.min_len = sizeof(struct ath12k_wmi_soc_hal_reg_caps_params) },
136 	[WMI_TAG_VDEV_START_RESPONSE_EVENT] = {
137 		.min_len = sizeof(struct wmi_vdev_start_resp_event) },
138 	[WMI_TAG_PEER_DELETE_RESP_EVENT] = {
139 		.min_len = sizeof(struct wmi_peer_delete_resp_event) },
140 	[WMI_TAG_OFFLOAD_BCN_TX_STATUS_EVENT] = {
141 		.min_len = sizeof(struct wmi_bcn_tx_status_event) },
142 	[WMI_TAG_VDEV_STOPPED_EVENT] = {
143 		.min_len = sizeof(struct wmi_vdev_stopped_event) },
144 	[WMI_TAG_REG_CHAN_LIST_CC_EXT_EVENT] = {
145 		.min_len = sizeof(struct wmi_reg_chan_list_cc_ext_event) },
146 	[WMI_TAG_MGMT_RX_HDR] = {
147 		.min_len = sizeof(struct ath12k_wmi_mgmt_rx_params) },
148 	[WMI_TAG_MGMT_TX_COMPL_EVENT] = {
149 		.min_len = sizeof(struct wmi_mgmt_tx_compl_event) },
150 	[WMI_TAG_SCAN_EVENT] = {
151 		.min_len = sizeof(struct wmi_scan_event) },
152 	[WMI_TAG_PEER_STA_KICKOUT_EVENT] = {
153 		.min_len = sizeof(struct wmi_peer_sta_kickout_event) },
154 	[WMI_TAG_ROAM_EVENT] = {
155 		.min_len = sizeof(struct wmi_roam_event) },
156 	[WMI_TAG_CHAN_INFO_EVENT] = {
157 		.min_len = sizeof(struct wmi_chan_info_event) },
158 	[WMI_TAG_PDEV_BSS_CHAN_INFO_EVENT] = {
159 		.min_len = sizeof(struct wmi_pdev_bss_chan_info_event) },
160 	[WMI_TAG_VDEV_INSTALL_KEY_COMPLETE_EVENT] = {
161 		.min_len = sizeof(struct wmi_vdev_install_key_compl_event) },
162 	[WMI_TAG_READY_EVENT] = {
163 		.min_len = sizeof(struct ath12k_wmi_ready_event_min_params) },
164 	[WMI_TAG_SERVICE_AVAILABLE_EVENT] = {
165 		.min_len = sizeof(struct wmi_service_available_event) },
166 	[WMI_TAG_PEER_ASSOC_CONF_EVENT] = {
167 		.min_len = sizeof(struct wmi_peer_assoc_conf_event) },
168 	[WMI_TAG_RFKILL_EVENT] = {
169 		.min_len = sizeof(struct wmi_rfkill_state_change_event) },
170 	[WMI_TAG_PDEV_CTL_FAILSAFE_CHECK_EVENT] = {
171 		.min_len = sizeof(struct wmi_pdev_ctl_failsafe_chk_event) },
172 	[WMI_TAG_HOST_SWFDA_EVENT] = {
173 		.min_len = sizeof(struct wmi_fils_discovery_event) },
174 	[WMI_TAG_OFFLOAD_PRB_RSP_TX_STATUS_EVENT] = {
175 		.min_len = sizeof(struct wmi_probe_resp_tx_status_event) },
176 	[WMI_TAG_VDEV_DELETE_RESP_EVENT] = {
177 		.min_len = sizeof(struct wmi_vdev_delete_resp_event) },
178 	[WMI_TAG_TWT_ENABLE_COMPLETE_EVENT] = {
179 		.min_len = sizeof(struct wmi_twt_enable_event) },
180 	[WMI_TAG_TWT_DISABLE_COMPLETE_EVENT] = {
181 		.min_len = sizeof(struct wmi_twt_disable_event) },
182 	[WMI_TAG_P2P_NOA_INFO] = {
183 		.min_len = sizeof(struct ath12k_wmi_p2p_noa_info) },
184 	[WMI_TAG_P2P_NOA_EVENT] = {
185 		.min_len = sizeof(struct wmi_p2p_noa_event) },
186 	[WMI_TAG_11D_NEW_COUNTRY_EVENT] = {
187 		.min_len = sizeof(struct wmi_11d_new_cc_event) },
188 };
189 
ath12k_wmi_tlv_hdr(u32 cmd,u32 len)190 __le32 ath12k_wmi_tlv_hdr(u32 cmd, u32 len)
191 {
192 	return le32_encode_bits(cmd, WMI_TLV_TAG) |
193 		le32_encode_bits(len, WMI_TLV_LEN);
194 }
195 
ath12k_wmi_tlv_cmd_hdr(u32 cmd,u32 len)196 static __le32 ath12k_wmi_tlv_cmd_hdr(u32 cmd, u32 len)
197 {
198 	return ath12k_wmi_tlv_hdr(cmd, len - TLV_HDR_SIZE);
199 }
200 
ath12k_wmi_init_qcn9274(struct ath12k_base * ab,struct ath12k_wmi_resource_config_arg * config)201 void ath12k_wmi_init_qcn9274(struct ath12k_base *ab,
202 			     struct ath12k_wmi_resource_config_arg *config)
203 {
204 	config->num_vdevs = ab->num_radios * TARGET_NUM_VDEVS(ab);
205 	config->num_peers = ab->num_radios *
206 		ath12k_core_get_max_peers_per_radio(ab);
207 	config->num_offload_peers = TARGET_NUM_OFFLD_PEERS;
208 	config->num_offload_reorder_buffs = TARGET_NUM_OFFLD_REORDER_BUFFS;
209 	config->num_peer_keys = TARGET_NUM_PEER_KEYS;
210 	config->ast_skid_limit = TARGET_AST_SKID_LIMIT;
211 	config->tx_chain_mask = (1 << ab->target_caps.num_rf_chains) - 1;
212 	config->rx_chain_mask = (1 << ab->target_caps.num_rf_chains) - 1;
213 	config->rx_timeout_pri[0] = TARGET_RX_TIMEOUT_LO_PRI;
214 	config->rx_timeout_pri[1] = TARGET_RX_TIMEOUT_LO_PRI;
215 	config->rx_timeout_pri[2] = TARGET_RX_TIMEOUT_LO_PRI;
216 	config->rx_timeout_pri[3] = TARGET_RX_TIMEOUT_HI_PRI;
217 
218 	if (test_bit(ATH12K_FLAG_RAW_MODE, &ab->dev_flags))
219 		config->rx_decap_mode = TARGET_DECAP_MODE_RAW;
220 	else
221 		config->rx_decap_mode = TARGET_DECAP_MODE_NATIVE_WIFI;
222 
223 	config->scan_max_pending_req = TARGET_SCAN_MAX_PENDING_REQS;
224 	config->bmiss_offload_max_vdev = TARGET_BMISS_OFFLOAD_MAX_VDEV;
225 	config->roam_offload_max_vdev = TARGET_ROAM_OFFLOAD_MAX_VDEV;
226 	config->roam_offload_max_ap_profiles = TARGET_ROAM_OFFLOAD_MAX_AP_PROFILES;
227 	config->num_mcast_groups = TARGET_NUM_MCAST_GROUPS;
228 	config->num_mcast_table_elems = TARGET_NUM_MCAST_TABLE_ELEMS;
229 	config->mcast2ucast_mode = TARGET_MCAST2UCAST_MODE;
230 	config->tx_dbg_log_size = TARGET_TX_DBG_LOG_SIZE;
231 	config->num_wds_entries = TARGET_NUM_WDS_ENTRIES;
232 	config->dma_burst_size = TARGET_DMA_BURST_SIZE;
233 	config->rx_skip_defrag_timeout_dup_detection_check =
234 		TARGET_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK;
235 	config->vow_config = TARGET_VOW_CONFIG;
236 	config->gtk_offload_max_vdev = TARGET_GTK_OFFLOAD_MAX_VDEV;
237 	config->num_msdu_desc = TARGET_NUM_MSDU_DESC;
238 	config->beacon_tx_offload_max_vdev = ab->num_radios * TARGET_MAX_BCN_OFFLD;
239 	config->rx_batchmode = TARGET_RX_BATCHMODE;
240 	/* Indicates host supports peer map v3 and unmap v2 support */
241 	config->peer_map_unmap_version = 0x32;
242 	config->twt_ap_pdev_count = ab->num_radios;
243 	config->twt_ap_sta_count = 1000;
244 	config->ema_max_vap_cnt = ab->num_radios;
245 	config->ema_max_profile_period = TARGET_EMA_MAX_PROFILE_PERIOD;
246 	config->beacon_tx_offload_max_vdev += config->ema_max_vap_cnt;
247 
248 	if (test_bit(WMI_TLV_SERVICE_PEER_METADATA_V1A_V1B_SUPPORT, ab->wmi_ab.svc_map))
249 		config->peer_metadata_ver = ATH12K_PEER_METADATA_V1B;
250 }
251 
ath12k_wmi_init_wcn7850(struct ath12k_base * ab,struct ath12k_wmi_resource_config_arg * config)252 void ath12k_wmi_init_wcn7850(struct ath12k_base *ab,
253 			     struct ath12k_wmi_resource_config_arg *config)
254 {
255 	config->num_vdevs = 4;
256 	config->num_peers = 16;
257 	config->num_tids = 32;
258 
259 	config->num_offload_peers = 3;
260 	config->num_offload_reorder_buffs = 3;
261 	config->num_peer_keys = TARGET_NUM_PEER_KEYS;
262 	config->ast_skid_limit = TARGET_AST_SKID_LIMIT;
263 	config->tx_chain_mask = (1 << ab->target_caps.num_rf_chains) - 1;
264 	config->rx_chain_mask = (1 << ab->target_caps.num_rf_chains) - 1;
265 	config->rx_timeout_pri[0] = TARGET_RX_TIMEOUT_LO_PRI;
266 	config->rx_timeout_pri[1] = TARGET_RX_TIMEOUT_LO_PRI;
267 	config->rx_timeout_pri[2] = TARGET_RX_TIMEOUT_LO_PRI;
268 	config->rx_timeout_pri[3] = TARGET_RX_TIMEOUT_HI_PRI;
269 	config->rx_decap_mode = TARGET_DECAP_MODE_NATIVE_WIFI;
270 	config->scan_max_pending_req = TARGET_SCAN_MAX_PENDING_REQS;
271 	config->bmiss_offload_max_vdev = TARGET_BMISS_OFFLOAD_MAX_VDEV;
272 	config->roam_offload_max_vdev = TARGET_ROAM_OFFLOAD_MAX_VDEV;
273 	config->roam_offload_max_ap_profiles = TARGET_ROAM_OFFLOAD_MAX_AP_PROFILES;
274 	config->num_mcast_groups = 0;
275 	config->num_mcast_table_elems = 0;
276 	config->mcast2ucast_mode = 0;
277 	config->tx_dbg_log_size = TARGET_TX_DBG_LOG_SIZE;
278 	config->num_wds_entries = 0;
279 	config->dma_burst_size = 0;
280 	config->rx_skip_defrag_timeout_dup_detection_check = 0;
281 	config->vow_config = TARGET_VOW_CONFIG;
282 	config->gtk_offload_max_vdev = 2;
283 	config->num_msdu_desc = 0x400;
284 	config->beacon_tx_offload_max_vdev = 2;
285 	config->rx_batchmode = TARGET_RX_BATCHMODE;
286 
287 	config->peer_map_unmap_version = 0x1;
288 	config->use_pdev_id = 1;
289 	config->max_frag_entries = 0xa;
290 	config->num_tdls_vdevs = 0x1;
291 	config->num_tdls_conn_table_entries = 8;
292 	config->beacon_tx_offload_max_vdev = 0x2;
293 	config->num_multicast_filter_entries = 0x20;
294 	config->num_wow_filters = 0x16;
295 	config->num_keep_alive_pattern = 0;
296 }
297 
298 #define PRIMAP(_hw_mode_) \
299 	[_hw_mode_] = _hw_mode_##_PRI
300 
301 static const int ath12k_hw_mode_pri_map[] = {
302 	PRIMAP(WMI_HOST_HW_MODE_SINGLE),
303 	PRIMAP(WMI_HOST_HW_MODE_DBS),
304 	PRIMAP(WMI_HOST_HW_MODE_SBS_PASSIVE),
305 	PRIMAP(WMI_HOST_HW_MODE_SBS),
306 	PRIMAP(WMI_HOST_HW_MODE_DBS_SBS),
307 	PRIMAP(WMI_HOST_HW_MODE_DBS_OR_SBS),
308 	/* keep last */
309 	PRIMAP(WMI_HOST_HW_MODE_MAX),
310 };
311 
312 static int
ath12k_wmi_tlv_iter(struct ath12k_base * ab,const void * ptr,size_t len,int (* iter)(struct ath12k_base * ab,u16 tag,u16 len,const void * ptr,void * data),void * data)313 ath12k_wmi_tlv_iter(struct ath12k_base *ab, const void *ptr, size_t len,
314 		    int (*iter)(struct ath12k_base *ab, u16 tag, u16 len,
315 				const void *ptr, void *data),
316 		    void *data)
317 {
318 	const void *begin = ptr;
319 	const struct wmi_tlv *tlv;
320 	u16 tlv_tag, tlv_len;
321 	int ret;
322 
323 	while (len > 0) {
324 		if (len < sizeof(*tlv)) {
325 			ath12k_err(ab, "wmi tlv parse failure at byte %zd (%zu bytes left, %zu expected)\n",
326 				   ptr - begin, len, sizeof(*tlv));
327 			return -EINVAL;
328 		}
329 
330 		tlv = ptr;
331 		tlv_tag = le32_get_bits(tlv->header, WMI_TLV_TAG);
332 		tlv_len = le32_get_bits(tlv->header, WMI_TLV_LEN);
333 		ptr += sizeof(*tlv);
334 		len -= sizeof(*tlv);
335 
336 		if (tlv_len > len) {
337 			ath12k_err(ab, "wmi tlv parse failure of tag %u at byte %zd (%zu bytes left, %u expected)\n",
338 				   tlv_tag, ptr - begin, len, tlv_len);
339 			return -EINVAL;
340 		}
341 
342 		if (tlv_tag < ARRAY_SIZE(ath12k_wmi_tlv_policies) &&
343 		    ath12k_wmi_tlv_policies[tlv_tag].min_len &&
344 		    ath12k_wmi_tlv_policies[tlv_tag].min_len > tlv_len) {
345 			ath12k_err(ab, "wmi tlv parse failure of tag %u at byte %zd (%u bytes is less than min length %zu)\n",
346 				   tlv_tag, ptr - begin, tlv_len,
347 				   ath12k_wmi_tlv_policies[tlv_tag].min_len);
348 			return -EINVAL;
349 		}
350 
351 		ret = iter(ab, tlv_tag, tlv_len, ptr, data);
352 		if (ret)
353 			return ret;
354 
355 		ptr += tlv_len;
356 		len -= tlv_len;
357 	}
358 
359 	return 0;
360 }
361 
ath12k_wmi_tlv_iter_parse(struct ath12k_base * ab,u16 tag,u16 len,const void * ptr,void * data)362 static int ath12k_wmi_tlv_iter_parse(struct ath12k_base *ab, u16 tag, u16 len,
363 				     const void *ptr, void *data)
364 {
365 	const void **tb = data;
366 
367 	if (tag < WMI_TAG_MAX)
368 		tb[tag] = ptr;
369 
370 	return 0;
371 }
372 
ath12k_wmi_tlv_parse(struct ath12k_base * ar,const void ** tb,const void * ptr,size_t len)373 static int ath12k_wmi_tlv_parse(struct ath12k_base *ar, const void **tb,
374 				const void *ptr, size_t len)
375 {
376 	return ath12k_wmi_tlv_iter(ar, ptr, len, ath12k_wmi_tlv_iter_parse,
377 				   (void *)tb);
378 }
379 
380 static const void **
ath12k_wmi_tlv_parse_alloc(struct ath12k_base * ab,struct sk_buff * skb,gfp_t gfp)381 ath12k_wmi_tlv_parse_alloc(struct ath12k_base *ab,
382 			   struct sk_buff *skb, gfp_t gfp)
383 {
384 	const void **tb;
385 	int ret;
386 
387 	tb = kcalloc(WMI_TAG_MAX, sizeof(*tb), gfp);
388 	if (!tb)
389 		return ERR_PTR(-ENOMEM);
390 
391 	ret = ath12k_wmi_tlv_parse(ab, tb, skb->data, skb->len);
392 	if (ret) {
393 		kfree(tb);
394 		return ERR_PTR(ret);
395 	}
396 
397 	return tb;
398 }
399 
ath12k_wmi_cmd_send_nowait(struct ath12k_wmi_pdev * wmi,struct sk_buff * skb,u32 cmd_id)400 static int ath12k_wmi_cmd_send_nowait(struct ath12k_wmi_pdev *wmi, struct sk_buff *skb,
401 				      u32 cmd_id)
402 {
403 	struct ath12k_skb_cb *skb_cb = ATH12K_SKB_CB(skb);
404 	struct ath12k_base *ab = wmi->wmi_ab->ab;
405 	struct wmi_cmd_hdr *cmd_hdr;
406 	int ret;
407 
408 	if (!skb_push(skb, sizeof(struct wmi_cmd_hdr)))
409 		return -ENOMEM;
410 
411 	cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
412 	cmd_hdr->cmd_id = le32_encode_bits(cmd_id, WMI_CMD_HDR_CMD_ID);
413 
414 	memset(skb_cb, 0, sizeof(*skb_cb));
415 	ret = ath12k_htc_send(&ab->htc, wmi->eid, skb);
416 
417 	if (ret)
418 		goto err_pull;
419 
420 	return 0;
421 
422 err_pull:
423 	skb_pull(skb, sizeof(struct wmi_cmd_hdr));
424 	return ret;
425 }
426 
ath12k_wmi_cmd_send(struct ath12k_wmi_pdev * wmi,struct sk_buff * skb,u32 cmd_id)427 int ath12k_wmi_cmd_send(struct ath12k_wmi_pdev *wmi, struct sk_buff *skb,
428 			u32 cmd_id)
429 {
430 	struct ath12k_wmi_base *wmi_ab = wmi->wmi_ab;
431 	int ret = -EOPNOTSUPP;
432 
433 	might_sleep();
434 
435 	wait_event_timeout(wmi_ab->tx_credits_wq, ({
436 		ret = ath12k_wmi_cmd_send_nowait(wmi, skb, cmd_id);
437 
438 		if (ret && test_bit(ATH12K_FLAG_CRASH_FLUSH, &wmi_ab->ab->dev_flags))
439 			ret = -ESHUTDOWN;
440 
441 		(ret != -EAGAIN);
442 	}), WMI_SEND_TIMEOUT_HZ);
443 
444 	if (ret == -EAGAIN)
445 		ath12k_warn(wmi_ab->ab, "wmi command %d timeout\n", cmd_id);
446 
447 	return ret;
448 }
449 
ath12k_pull_svc_ready_ext(struct ath12k_wmi_pdev * wmi_handle,const void * ptr,struct ath12k_wmi_service_ext_arg * arg)450 static int ath12k_pull_svc_ready_ext(struct ath12k_wmi_pdev *wmi_handle,
451 				     const void *ptr,
452 				     struct ath12k_wmi_service_ext_arg *arg)
453 {
454 	const struct wmi_service_ready_ext_event *ev = ptr;
455 	int i;
456 
457 	if (!ev)
458 		return -EINVAL;
459 
460 	/* Move this to host based bitmap */
461 	arg->default_conc_scan_config_bits =
462 		le32_to_cpu(ev->default_conc_scan_config_bits);
463 	arg->default_fw_config_bits = le32_to_cpu(ev->default_fw_config_bits);
464 	arg->he_cap_info = le32_to_cpu(ev->he_cap_info);
465 	arg->mpdu_density = le32_to_cpu(ev->mpdu_density);
466 	arg->max_bssid_rx_filters = le32_to_cpu(ev->max_bssid_rx_filters);
467 	arg->ppet.numss_m1 = le32_to_cpu(ev->ppet.numss_m1);
468 	arg->ppet.ru_bit_mask = le32_to_cpu(ev->ppet.ru_info);
469 
470 	for (i = 0; i < WMI_MAX_NUM_SS; i++)
471 		arg->ppet.ppet16_ppet8_ru3_ru0[i] =
472 			le32_to_cpu(ev->ppet.ppet16_ppet8_ru3_ru0[i]);
473 
474 	return 0;
475 }
476 
477 static int
ath12k_pull_mac_phy_cap_svc_ready_ext(struct ath12k_wmi_pdev * wmi_handle,struct ath12k_wmi_svc_rdy_ext_parse * svc,u8 hw_mode_id,u8 phy_id,struct ath12k_pdev * pdev)478 ath12k_pull_mac_phy_cap_svc_ready_ext(struct ath12k_wmi_pdev *wmi_handle,
479 				      struct ath12k_wmi_svc_rdy_ext_parse *svc,
480 				      u8 hw_mode_id, u8 phy_id,
481 				      struct ath12k_pdev *pdev)
482 {
483 	const struct ath12k_wmi_mac_phy_caps_params *mac_caps;
484 	const struct ath12k_wmi_soc_mac_phy_hw_mode_caps_params *hw_caps = svc->hw_caps;
485 	const struct ath12k_wmi_hw_mode_cap_params *wmi_hw_mode_caps = svc->hw_mode_caps;
486 	const struct ath12k_wmi_mac_phy_caps_params *wmi_mac_phy_caps = svc->mac_phy_caps;
487 	struct ath12k_base *ab = wmi_handle->wmi_ab->ab;
488 	struct ath12k_band_cap *cap_band;
489 	struct ath12k_pdev_cap *pdev_cap = &pdev->cap;
490 	struct ath12k_fw_pdev *fw_pdev;
491 	u32 phy_map;
492 	u32 hw_idx, phy_idx = 0;
493 	int i;
494 
495 	if (!hw_caps || !wmi_hw_mode_caps || !svc->soc_hal_reg_caps)
496 		return -EINVAL;
497 
498 	for (hw_idx = 0; hw_idx < le32_to_cpu(hw_caps->num_hw_modes); hw_idx++) {
499 		if (hw_mode_id == le32_to_cpu(wmi_hw_mode_caps[hw_idx].hw_mode_id))
500 			break;
501 
502 		phy_map = le32_to_cpu(wmi_hw_mode_caps[hw_idx].phy_id_map);
503 		phy_idx = fls(phy_map);
504 	}
505 
506 	if (hw_idx == le32_to_cpu(hw_caps->num_hw_modes))
507 		return -EINVAL;
508 
509 	phy_idx += phy_id;
510 	if (phy_id >= le32_to_cpu(svc->soc_hal_reg_caps->num_phy))
511 		return -EINVAL;
512 
513 	mac_caps = wmi_mac_phy_caps + phy_idx;
514 
515 	pdev->pdev_id = ath12k_wmi_mac_phy_get_pdev_id(mac_caps);
516 	pdev->hw_link_id = ath12k_wmi_mac_phy_get_hw_link_id(mac_caps);
517 	pdev_cap->supported_bands |= le32_to_cpu(mac_caps->supported_bands);
518 	pdev_cap->ampdu_density = le32_to_cpu(mac_caps->ampdu_density);
519 
520 	fw_pdev = &ab->fw_pdev[ab->fw_pdev_count];
521 	fw_pdev->supported_bands = le32_to_cpu(mac_caps->supported_bands);
522 	fw_pdev->pdev_id = ath12k_wmi_mac_phy_get_pdev_id(mac_caps);
523 	fw_pdev->phy_id = le32_to_cpu(mac_caps->phy_id);
524 	ab->fw_pdev_count++;
525 
526 	/* Take non-zero tx/rx chainmask. If tx/rx chainmask differs from
527 	 * band to band for a single radio, need to see how this should be
528 	 * handled.
529 	 */
530 	if (le32_to_cpu(mac_caps->supported_bands) & WMI_HOST_WLAN_2GHZ_CAP) {
531 		pdev_cap->tx_chain_mask = le32_to_cpu(mac_caps->tx_chain_mask_2g);
532 		pdev_cap->rx_chain_mask = le32_to_cpu(mac_caps->rx_chain_mask_2g);
533 	} else if (le32_to_cpu(mac_caps->supported_bands) & WMI_HOST_WLAN_5GHZ_CAP) {
534 		pdev_cap->vht_cap = le32_to_cpu(mac_caps->vht_cap_info_5g);
535 		pdev_cap->vht_mcs = le32_to_cpu(mac_caps->vht_supp_mcs_5g);
536 		pdev_cap->he_mcs = le32_to_cpu(mac_caps->he_supp_mcs_5g);
537 		pdev_cap->tx_chain_mask = le32_to_cpu(mac_caps->tx_chain_mask_5g);
538 		pdev_cap->rx_chain_mask = le32_to_cpu(mac_caps->rx_chain_mask_5g);
539 		pdev_cap->nss_ratio_enabled =
540 			WMI_NSS_RATIO_EN_DIS_GET(mac_caps->nss_ratio);
541 		pdev_cap->nss_ratio_info =
542 			WMI_NSS_RATIO_INFO_GET(mac_caps->nss_ratio);
543 	} else {
544 		return -EINVAL;
545 	}
546 
547 	/* tx/rx chainmask reported from fw depends on the actual hw chains used,
548 	 * For example, for 4x4 capable macphys, first 4 chains can be used for first
549 	 * mac and the remaining 4 chains can be used for the second mac or vice-versa.
550 	 * In this case, tx/rx chainmask 0xf will be advertised for first mac and 0xf0
551 	 * will be advertised for second mac or vice-versa. Compute the shift value
552 	 * for tx/rx chainmask which will be used to advertise supported ht/vht rates to
553 	 * mac80211.
554 	 */
555 	pdev_cap->tx_chain_mask_shift =
556 			find_first_bit((unsigned long *)&pdev_cap->tx_chain_mask, 32);
557 	pdev_cap->rx_chain_mask_shift =
558 			find_first_bit((unsigned long *)&pdev_cap->rx_chain_mask, 32);
559 
560 	if (le32_to_cpu(mac_caps->supported_bands) & WMI_HOST_WLAN_2GHZ_CAP) {
561 		cap_band = &pdev_cap->band[NL80211_BAND_2GHZ];
562 		cap_band->phy_id = le32_to_cpu(mac_caps->phy_id);
563 		cap_band->max_bw_supported = le32_to_cpu(mac_caps->max_bw_supported_2g);
564 		cap_band->ht_cap_info = le32_to_cpu(mac_caps->ht_cap_info_2g);
565 		cap_band->he_cap_info[0] = le32_to_cpu(mac_caps->he_cap_info_2g);
566 		cap_band->he_cap_info[1] = le32_to_cpu(mac_caps->he_cap_info_2g_ext);
567 		cap_band->he_mcs = le32_to_cpu(mac_caps->he_supp_mcs_2g);
568 		for (i = 0; i < WMI_MAX_HECAP_PHY_SIZE; i++)
569 			cap_band->he_cap_phy_info[i] =
570 				le32_to_cpu(mac_caps->he_cap_phy_info_2g[i]);
571 
572 		cap_band->he_ppet.numss_m1 = le32_to_cpu(mac_caps->he_ppet2g.numss_m1);
573 		cap_band->he_ppet.ru_bit_mask = le32_to_cpu(mac_caps->he_ppet2g.ru_info);
574 
575 		for (i = 0; i < WMI_MAX_NUM_SS; i++)
576 			cap_band->he_ppet.ppet16_ppet8_ru3_ru0[i] =
577 				le32_to_cpu(mac_caps->he_ppet2g.ppet16_ppet8_ru3_ru0[i]);
578 	}
579 
580 	if (le32_to_cpu(mac_caps->supported_bands) & WMI_HOST_WLAN_5GHZ_CAP) {
581 		cap_band = &pdev_cap->band[NL80211_BAND_5GHZ];
582 		cap_band->phy_id = le32_to_cpu(mac_caps->phy_id);
583 		cap_band->max_bw_supported =
584 			le32_to_cpu(mac_caps->max_bw_supported_5g);
585 		cap_band->ht_cap_info = le32_to_cpu(mac_caps->ht_cap_info_5g);
586 		cap_band->he_cap_info[0] = le32_to_cpu(mac_caps->he_cap_info_5g);
587 		cap_band->he_cap_info[1] = le32_to_cpu(mac_caps->he_cap_info_5g_ext);
588 		cap_band->he_mcs = le32_to_cpu(mac_caps->he_supp_mcs_5g);
589 		for (i = 0; i < WMI_MAX_HECAP_PHY_SIZE; i++)
590 			cap_band->he_cap_phy_info[i] =
591 				le32_to_cpu(mac_caps->he_cap_phy_info_5g[i]);
592 
593 		cap_band->he_ppet.numss_m1 = le32_to_cpu(mac_caps->he_ppet5g.numss_m1);
594 		cap_band->he_ppet.ru_bit_mask = le32_to_cpu(mac_caps->he_ppet5g.ru_info);
595 
596 		for (i = 0; i < WMI_MAX_NUM_SS; i++)
597 			cap_band->he_ppet.ppet16_ppet8_ru3_ru0[i] =
598 				le32_to_cpu(mac_caps->he_ppet5g.ppet16_ppet8_ru3_ru0[i]);
599 
600 		cap_band = &pdev_cap->band[NL80211_BAND_6GHZ];
601 		cap_band->max_bw_supported =
602 			le32_to_cpu(mac_caps->max_bw_supported_5g);
603 		cap_band->ht_cap_info = le32_to_cpu(mac_caps->ht_cap_info_5g);
604 		cap_band->he_cap_info[0] = le32_to_cpu(mac_caps->he_cap_info_5g);
605 		cap_band->he_cap_info[1] = le32_to_cpu(mac_caps->he_cap_info_5g_ext);
606 		cap_band->he_mcs = le32_to_cpu(mac_caps->he_supp_mcs_5g);
607 		for (i = 0; i < WMI_MAX_HECAP_PHY_SIZE; i++)
608 			cap_band->he_cap_phy_info[i] =
609 				le32_to_cpu(mac_caps->he_cap_phy_info_5g[i]);
610 
611 		cap_band->he_ppet.numss_m1 = le32_to_cpu(mac_caps->he_ppet5g.numss_m1);
612 		cap_band->he_ppet.ru_bit_mask = le32_to_cpu(mac_caps->he_ppet5g.ru_info);
613 
614 		for (i = 0; i < WMI_MAX_NUM_SS; i++)
615 			cap_band->he_ppet.ppet16_ppet8_ru3_ru0[i] =
616 				le32_to_cpu(mac_caps->he_ppet5g.ppet16_ppet8_ru3_ru0[i]);
617 	}
618 
619 	return 0;
620 }
621 
622 static int
ath12k_pull_reg_cap_svc_rdy_ext(struct ath12k_wmi_pdev * wmi_handle,const struct ath12k_wmi_soc_hal_reg_caps_params * reg_caps,const struct ath12k_wmi_hal_reg_caps_ext_params * ext_caps,u8 phy_idx,struct ath12k_wmi_hal_reg_capabilities_ext_arg * param)623 ath12k_pull_reg_cap_svc_rdy_ext(struct ath12k_wmi_pdev *wmi_handle,
624 				const struct ath12k_wmi_soc_hal_reg_caps_params *reg_caps,
625 				const struct ath12k_wmi_hal_reg_caps_ext_params *ext_caps,
626 				u8 phy_idx,
627 				struct ath12k_wmi_hal_reg_capabilities_ext_arg *param)
628 {
629 	const struct ath12k_wmi_hal_reg_caps_ext_params *ext_reg_cap;
630 
631 	if (!reg_caps || !ext_caps)
632 		return -EINVAL;
633 
634 	if (phy_idx >= le32_to_cpu(reg_caps->num_phy))
635 		return -EINVAL;
636 
637 	ext_reg_cap = &ext_caps[phy_idx];
638 
639 	param->phy_id = le32_to_cpu(ext_reg_cap->phy_id);
640 	param->eeprom_reg_domain = le32_to_cpu(ext_reg_cap->eeprom_reg_domain);
641 	param->eeprom_reg_domain_ext =
642 		le32_to_cpu(ext_reg_cap->eeprom_reg_domain_ext);
643 	param->regcap1 = le32_to_cpu(ext_reg_cap->regcap1);
644 	param->regcap2 = le32_to_cpu(ext_reg_cap->regcap2);
645 	/* check if param->wireless_mode is needed */
646 	param->low_2ghz_chan = le32_to_cpu(ext_reg_cap->low_2ghz_chan);
647 	param->high_2ghz_chan = le32_to_cpu(ext_reg_cap->high_2ghz_chan);
648 	param->low_5ghz_chan = le32_to_cpu(ext_reg_cap->low_5ghz_chan);
649 	param->high_5ghz_chan = le32_to_cpu(ext_reg_cap->high_5ghz_chan);
650 
651 	return 0;
652 }
653 
ath12k_pull_service_ready_tlv(struct ath12k_base * ab,const void * evt_buf,struct ath12k_wmi_target_cap_arg * cap)654 static int ath12k_pull_service_ready_tlv(struct ath12k_base *ab,
655 					 const void *evt_buf,
656 					 struct ath12k_wmi_target_cap_arg *cap)
657 {
658 	const struct wmi_service_ready_event *ev = evt_buf;
659 
660 	if (!ev) {
661 		ath12k_err(ab, "%s: failed by NULL param\n",
662 			   __func__);
663 		return -EINVAL;
664 	}
665 
666 	cap->phy_capability = le32_to_cpu(ev->phy_capability);
667 	cap->max_frag_entry = le32_to_cpu(ev->max_frag_entry);
668 	cap->num_rf_chains = le32_to_cpu(ev->num_rf_chains);
669 	cap->ht_cap_info = le32_to_cpu(ev->ht_cap_info);
670 	cap->vht_cap_info = le32_to_cpu(ev->vht_cap_info);
671 	cap->vht_supp_mcs = le32_to_cpu(ev->vht_supp_mcs);
672 	cap->hw_min_tx_power = le32_to_cpu(ev->hw_min_tx_power);
673 	cap->hw_max_tx_power = le32_to_cpu(ev->hw_max_tx_power);
674 	cap->sys_cap_info = le32_to_cpu(ev->sys_cap_info);
675 	cap->min_pkt_size_enable = le32_to_cpu(ev->min_pkt_size_enable);
676 	cap->max_bcn_ie_size = le32_to_cpu(ev->max_bcn_ie_size);
677 	cap->max_num_scan_channels = le32_to_cpu(ev->max_num_scan_channels);
678 	cap->max_supported_macs = le32_to_cpu(ev->max_supported_macs);
679 	cap->wmi_fw_sub_feat_caps = le32_to_cpu(ev->wmi_fw_sub_feat_caps);
680 	cap->txrx_chainmask = le32_to_cpu(ev->txrx_chainmask);
681 	cap->default_dbs_hw_mode_index = le32_to_cpu(ev->default_dbs_hw_mode_index);
682 	cap->num_msdu_desc = le32_to_cpu(ev->num_msdu_desc);
683 
684 	return 0;
685 }
686 
687 /* Save the wmi_service_bitmap into a linear bitmap. The wmi_services in
688  * wmi_service ready event are advertised in b0-b3 (LSB 4-bits) of each
689  * 4-byte word.
690  */
ath12k_wmi_service_bitmap_copy(struct ath12k_wmi_pdev * wmi,const u32 * wmi_svc_bm)691 static void ath12k_wmi_service_bitmap_copy(struct ath12k_wmi_pdev *wmi,
692 					   const u32 *wmi_svc_bm)
693 {
694 	int i, j;
695 
696 	for (i = 0, j = 0; i < WMI_SERVICE_BM_SIZE && j < WMI_MAX_SERVICE; i++) {
697 		do {
698 			if (wmi_svc_bm[i] & BIT(j % WMI_SERVICE_BITS_IN_SIZE32))
699 				set_bit(j, wmi->wmi_ab->svc_map);
700 		} while (++j % WMI_SERVICE_BITS_IN_SIZE32);
701 	}
702 }
703 
ath12k_wmi_svc_rdy_parse(struct ath12k_base * ab,u16 tag,u16 len,const void * ptr,void * data)704 static int ath12k_wmi_svc_rdy_parse(struct ath12k_base *ab, u16 tag, u16 len,
705 				    const void *ptr, void *data)
706 {
707 	struct ath12k_wmi_svc_ready_parse *svc_ready = data;
708 	struct ath12k_wmi_pdev *wmi_handle = &ab->wmi_ab.wmi[0];
709 	u16 expect_len;
710 
711 	switch (tag) {
712 	case WMI_TAG_SERVICE_READY_EVENT:
713 		if (ath12k_pull_service_ready_tlv(ab, ptr, &ab->target_caps))
714 			return -EINVAL;
715 		break;
716 
717 	case WMI_TAG_ARRAY_UINT32:
718 		if (!svc_ready->wmi_svc_bitmap_done) {
719 			expect_len = WMI_SERVICE_BM_SIZE * sizeof(u32);
720 			if (len < expect_len) {
721 				ath12k_warn(ab, "invalid len %d for the tag 0x%x\n",
722 					    len, tag);
723 				return -EINVAL;
724 			}
725 
726 			ath12k_wmi_service_bitmap_copy(wmi_handle, ptr);
727 
728 			svc_ready->wmi_svc_bitmap_done = true;
729 		}
730 		break;
731 	default:
732 		break;
733 	}
734 
735 	return 0;
736 }
737 
ath12k_service_ready_event(struct ath12k_base * ab,struct sk_buff * skb)738 static int ath12k_service_ready_event(struct ath12k_base *ab, struct sk_buff *skb)
739 {
740 	struct ath12k_wmi_svc_ready_parse svc_ready = { };
741 	int ret;
742 
743 	ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len,
744 				  ath12k_wmi_svc_rdy_parse,
745 				  &svc_ready);
746 	if (ret) {
747 		ath12k_warn(ab, "failed to parse tlv %d\n", ret);
748 		return ret;
749 	}
750 
751 	return 0;
752 }
753 
ath12k_wmi_mgmt_get_freq(struct ath12k * ar,struct ieee80211_tx_info * info)754 static u32 ath12k_wmi_mgmt_get_freq(struct ath12k *ar,
755 				    struct ieee80211_tx_info *info)
756 {
757 	struct ath12k_base *ab = ar->ab;
758 	u32 freq = 0;
759 
760 	if (ab->hw_params->single_pdev_only &&
761 	    ar->scan.is_roc &&
762 	    (info->flags & IEEE80211_TX_CTL_TX_OFFCHAN))
763 		freq = ar->scan.roc_freq;
764 
765 	return freq;
766 }
767 
ath12k_wmi_alloc_skb(struct ath12k_wmi_base * wmi_ab,u32 len)768 struct sk_buff *ath12k_wmi_alloc_skb(struct ath12k_wmi_base *wmi_ab, u32 len)
769 {
770 	struct sk_buff *skb;
771 	struct ath12k_base *ab = wmi_ab->ab;
772 	u32 round_len = roundup(len, 4);
773 
774 	skb = ath12k_htc_alloc_skb(ab, WMI_SKB_HEADROOM + round_len);
775 	if (!skb)
776 		return NULL;
777 
778 	skb_reserve(skb, WMI_SKB_HEADROOM);
779 	if (!IS_ALIGNED((unsigned long)skb->data, 4))
780 		ath12k_warn(ab, "unaligned WMI skb data\n");
781 
782 	skb_put(skb, round_len);
783 	memset(skb->data, 0, round_len);
784 
785 	return skb;
786 }
787 
ath12k_wmi_mgmt_send(struct ath12k_link_vif * arvif,u32 buf_id,struct sk_buff * frame)788 int ath12k_wmi_mgmt_send(struct ath12k_link_vif *arvif, u32 buf_id,
789 			 struct sk_buff *frame)
790 {
791 	struct ath12k *ar = arvif->ar;
792 	struct ath12k_wmi_pdev *wmi = ar->wmi;
793 	struct wmi_mgmt_send_cmd *cmd;
794 	struct ieee80211_tx_info *info = IEEE80211_SKB_CB(frame);
795 	struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)frame->data;
796 	struct ieee80211_vif *vif = ath12k_ahvif_to_vif(arvif->ahvif);
797 	int cmd_len = sizeof(struct ath12k_wmi_mgmt_send_tx_params);
798 	struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)hdr;
799 	struct ath12k_wmi_mlo_mgmt_send_params *ml_params;
800 	struct ath12k_base *ab = ar->ab;
801 	struct wmi_tlv *frame_tlv, *tlv;
802 	struct ath12k_skb_cb *skb_cb;
803 	u32 buf_len, buf_len_aligned;
804 	u32 vdev_id = arvif->vdev_id;
805 	bool link_agnostic = false;
806 	struct sk_buff *skb;
807 	int ret, len;
808 	void *ptr;
809 
810 	buf_len = min_t(int, frame->len, WMI_MGMT_SEND_DOWNLD_LEN);
811 
812 	buf_len_aligned = roundup(buf_len, sizeof(u32));
813 
814 	len = sizeof(*cmd) + sizeof(*frame_tlv) + buf_len_aligned;
815 
816 	if (ieee80211_vif_is_mld(vif)) {
817 		skb_cb = ATH12K_SKB_CB(frame);
818 		if ((skb_cb->flags & ATH12K_SKB_MLO_STA) &&
819 		    ab->hw_params->hw_ops->is_frame_link_agnostic &&
820 		    ab->hw_params->hw_ops->is_frame_link_agnostic(arvif, mgmt)) {
821 			len += cmd_len + TLV_HDR_SIZE + sizeof(*ml_params);
822 			ath12k_generic_dbg(ATH12K_DBG_MGMT,
823 					   "Sending Mgmt Frame fc 0x%0x as link agnostic",
824 					   mgmt->frame_control);
825 			link_agnostic = true;
826 		}
827 	}
828 
829 	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
830 	if (!skb)
831 		return -ENOMEM;
832 
833 	cmd = (struct wmi_mgmt_send_cmd *)skb->data;
834 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_MGMT_TX_SEND_CMD,
835 						 sizeof(*cmd));
836 	cmd->vdev_id = cpu_to_le32(vdev_id);
837 	cmd->desc_id = cpu_to_le32(buf_id);
838 	cmd->chanfreq = cpu_to_le32(ath12k_wmi_mgmt_get_freq(ar, info));
839 	cmd->paddr_lo = cpu_to_le32(lower_32_bits(ATH12K_SKB_CB(frame)->paddr));
840 	cmd->paddr_hi = cpu_to_le32(upper_32_bits(ATH12K_SKB_CB(frame)->paddr));
841 	cmd->frame_len = cpu_to_le32(frame->len);
842 	cmd->buf_len = cpu_to_le32(buf_len);
843 	cmd->tx_params_valid = 0;
844 
845 	frame_tlv = (struct wmi_tlv *)(skb->data + sizeof(*cmd));
846 	frame_tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, buf_len);
847 
848 	memcpy(frame_tlv->value, frame->data, buf_len);
849 
850 	if (!link_agnostic)
851 		goto send;
852 
853 	ptr = skb->data + sizeof(*cmd) + sizeof(*frame_tlv) + buf_len_aligned;
854 
855 	tlv = ptr;
856 
857 	/* Tx params not used currently */
858 	tlv->header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_TX_SEND_PARAMS, cmd_len);
859 	ptr += cmd_len;
860 
861 	tlv = ptr;
862 	tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, sizeof(*ml_params));
863 	ptr += TLV_HDR_SIZE;
864 
865 	ml_params = ptr;
866 	ml_params->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_MLO_TX_SEND_PARAMS,
867 						       sizeof(*ml_params));
868 
869 	ml_params->hw_link_id = cpu_to_le32(WMI_MGMT_LINK_AGNOSTIC_ID);
870 
871 send:
872 	ret = ath12k_wmi_cmd_send(wmi, skb, WMI_MGMT_TX_SEND_CMDID);
873 	if (ret) {
874 		ath12k_warn(ar->ab,
875 			    "failed to submit WMI_MGMT_TX_SEND_CMDID cmd\n");
876 		dev_kfree_skb(skb);
877 	}
878 
879 	return ret;
880 }
881 
ath12k_wmi_send_stats_request_cmd(struct ath12k * ar,u32 stats_id,u32 vdev_id,u32 pdev_id)882 int ath12k_wmi_send_stats_request_cmd(struct ath12k *ar, u32 stats_id,
883 				      u32 vdev_id, u32 pdev_id)
884 {
885 	struct ath12k_wmi_pdev *wmi = ar->wmi;
886 	struct wmi_request_stats_cmd *cmd;
887 	struct sk_buff *skb;
888 	int ret;
889 
890 	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
891 	if (!skb)
892 		return -ENOMEM;
893 
894 	cmd = (struct wmi_request_stats_cmd *)skb->data;
895 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_REQUEST_STATS_CMD,
896 						 sizeof(*cmd));
897 
898 	cmd->stats_id = cpu_to_le32(stats_id);
899 	cmd->vdev_id = cpu_to_le32(vdev_id);
900 	cmd->pdev_id = cpu_to_le32(pdev_id);
901 
902 	ret = ath12k_wmi_cmd_send(wmi, skb, WMI_REQUEST_STATS_CMDID);
903 	if (ret) {
904 		ath12k_warn(ar->ab, "failed to send WMI_REQUEST_STATS cmd\n");
905 		dev_kfree_skb(skb);
906 	}
907 
908 	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
909 		   "WMI request stats 0x%x vdev id %d pdev id %d\n",
910 		   stats_id, vdev_id, pdev_id);
911 
912 	return ret;
913 }
914 
ath12k_wmi_vdev_create(struct ath12k * ar,u8 * macaddr,struct ath12k_wmi_vdev_create_arg * args)915 int ath12k_wmi_vdev_create(struct ath12k *ar, u8 *macaddr,
916 			   struct ath12k_wmi_vdev_create_arg *args)
917 {
918 	struct ath12k_wmi_pdev *wmi = ar->wmi;
919 	struct wmi_vdev_create_cmd *cmd;
920 	struct sk_buff *skb;
921 	struct ath12k_wmi_vdev_txrx_streams_params *txrx_streams;
922 	bool is_ml_vdev = is_valid_ether_addr(args->mld_addr);
923 	struct wmi_vdev_create_mlo_params *ml_params;
924 	struct wmi_tlv *tlv;
925 	int ret, len;
926 	void *ptr;
927 
928 	/* It can be optimized my sending tx/rx chain configuration
929 	 * only for supported bands instead of always sending it for
930 	 * both the bands.
931 	 */
932 	len = sizeof(*cmd) + TLV_HDR_SIZE +
933 		(WMI_NUM_SUPPORTED_BAND_MAX * sizeof(*txrx_streams)) +
934 		(is_ml_vdev ? TLV_HDR_SIZE + sizeof(*ml_params) : 0);
935 
936 	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
937 	if (!skb)
938 		return -ENOMEM;
939 
940 	cmd = (struct wmi_vdev_create_cmd *)skb->data;
941 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_CREATE_CMD,
942 						 sizeof(*cmd));
943 
944 	cmd->vdev_id = cpu_to_le32(args->if_id);
945 	cmd->vdev_type = cpu_to_le32(args->type);
946 	cmd->vdev_subtype = cpu_to_le32(args->subtype);
947 	cmd->num_cfg_txrx_streams = cpu_to_le32(WMI_NUM_SUPPORTED_BAND_MAX);
948 	cmd->pdev_id = cpu_to_le32(args->pdev_id);
949 	cmd->mbssid_flags = cpu_to_le32(args->mbssid_flags);
950 	cmd->mbssid_tx_vdev_id = cpu_to_le32(args->mbssid_tx_vdev_id);
951 	cmd->vdev_stats_id = cpu_to_le32(args->if_stats_id);
952 	ether_addr_copy(cmd->vdev_macaddr.addr, macaddr);
953 
954 	if (args->if_stats_id != ATH12K_INVAL_VDEV_STATS_ID)
955 		cmd->vdev_stats_id_valid = cpu_to_le32(BIT(0));
956 
957 	ptr = skb->data + sizeof(*cmd);
958 	len = WMI_NUM_SUPPORTED_BAND_MAX * sizeof(*txrx_streams);
959 
960 	tlv = ptr;
961 	tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len);
962 
963 	ptr += TLV_HDR_SIZE;
964 	txrx_streams = ptr;
965 	len = sizeof(*txrx_streams);
966 	txrx_streams->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_TXRX_STREAMS,
967 							  len);
968 	txrx_streams->band = cpu_to_le32(WMI_TPC_CHAINMASK_CONFIG_BAND_2G);
969 	txrx_streams->supported_tx_streams =
970 				cpu_to_le32(args->chains[NL80211_BAND_2GHZ].tx);
971 	txrx_streams->supported_rx_streams =
972 				cpu_to_le32(args->chains[NL80211_BAND_2GHZ].rx);
973 
974 	txrx_streams++;
975 	txrx_streams->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_TXRX_STREAMS,
976 							  len);
977 	txrx_streams->band = cpu_to_le32(WMI_TPC_CHAINMASK_CONFIG_BAND_5G);
978 	txrx_streams->supported_tx_streams =
979 				cpu_to_le32(args->chains[NL80211_BAND_5GHZ].tx);
980 	txrx_streams->supported_rx_streams =
981 				cpu_to_le32(args->chains[NL80211_BAND_5GHZ].rx);
982 
983 	ptr += WMI_NUM_SUPPORTED_BAND_MAX * sizeof(*txrx_streams);
984 
985 	if (is_ml_vdev) {
986 		tlv = ptr;
987 		tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT,
988 						 sizeof(*ml_params));
989 		ptr += TLV_HDR_SIZE;
990 		ml_params = ptr;
991 
992 		ml_params->tlv_header =
993 			ath12k_wmi_tlv_cmd_hdr(WMI_TAG_MLO_VDEV_CREATE_PARAMS,
994 					       sizeof(*ml_params));
995 		ether_addr_copy(ml_params->mld_macaddr.addr, args->mld_addr);
996 	}
997 
998 	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
999 		   "WMI vdev create: id %d type %d subtype %d macaddr %pM pdevid %d\n",
1000 		   args->if_id, args->type, args->subtype,
1001 		   macaddr, args->pdev_id);
1002 
1003 	ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_CREATE_CMDID);
1004 	if (ret) {
1005 		ath12k_warn(ar->ab,
1006 			    "failed to submit WMI_VDEV_CREATE_CMDID\n");
1007 		dev_kfree_skb(skb);
1008 	}
1009 
1010 	return ret;
1011 }
1012 
ath12k_wmi_vdev_delete(struct ath12k * ar,u8 vdev_id)1013 int ath12k_wmi_vdev_delete(struct ath12k *ar, u8 vdev_id)
1014 {
1015 	struct ath12k_wmi_pdev *wmi = ar->wmi;
1016 	struct wmi_vdev_delete_cmd *cmd;
1017 	struct sk_buff *skb;
1018 	int ret;
1019 
1020 	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1021 	if (!skb)
1022 		return -ENOMEM;
1023 
1024 	cmd = (struct wmi_vdev_delete_cmd *)skb->data;
1025 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_DELETE_CMD,
1026 						 sizeof(*cmd));
1027 	cmd->vdev_id = cpu_to_le32(vdev_id);
1028 
1029 	ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "WMI vdev delete id %d\n", vdev_id);
1030 
1031 	ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_DELETE_CMDID);
1032 	if (ret) {
1033 		ath12k_warn(ar->ab, "failed to submit WMI_VDEV_DELETE_CMDID\n");
1034 		dev_kfree_skb(skb);
1035 	}
1036 
1037 	return ret;
1038 }
1039 
ath12k_wmi_vdev_stop(struct ath12k * ar,u8 vdev_id)1040 int ath12k_wmi_vdev_stop(struct ath12k *ar, u8 vdev_id)
1041 {
1042 	struct ath12k_wmi_pdev *wmi = ar->wmi;
1043 	struct wmi_vdev_stop_cmd *cmd;
1044 	struct sk_buff *skb;
1045 	int ret;
1046 
1047 	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1048 	if (!skb)
1049 		return -ENOMEM;
1050 
1051 	cmd = (struct wmi_vdev_stop_cmd *)skb->data;
1052 
1053 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_STOP_CMD,
1054 						 sizeof(*cmd));
1055 	cmd->vdev_id = cpu_to_le32(vdev_id);
1056 
1057 	ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "WMI vdev stop id 0x%x\n", vdev_id);
1058 
1059 	ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_STOP_CMDID);
1060 	if (ret) {
1061 		ath12k_warn(ar->ab, "failed to submit WMI_VDEV_STOP cmd\n");
1062 		dev_kfree_skb(skb);
1063 	}
1064 
1065 	return ret;
1066 }
1067 
ath12k_wmi_vdev_down(struct ath12k * ar,u8 vdev_id)1068 int ath12k_wmi_vdev_down(struct ath12k *ar, u8 vdev_id)
1069 {
1070 	struct ath12k_wmi_pdev *wmi = ar->wmi;
1071 	struct wmi_vdev_down_cmd *cmd;
1072 	struct sk_buff *skb;
1073 	int ret;
1074 
1075 	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1076 	if (!skb)
1077 		return -ENOMEM;
1078 
1079 	cmd = (struct wmi_vdev_down_cmd *)skb->data;
1080 
1081 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_DOWN_CMD,
1082 						 sizeof(*cmd));
1083 	cmd->vdev_id = cpu_to_le32(vdev_id);
1084 
1085 	ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "WMI vdev down id 0x%x\n", vdev_id);
1086 
1087 	ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_DOWN_CMDID);
1088 	if (ret) {
1089 		ath12k_warn(ar->ab, "failed to submit WMI_VDEV_DOWN cmd\n");
1090 		dev_kfree_skb(skb);
1091 	}
1092 
1093 	return ret;
1094 }
1095 
ath12k_wmi_put_wmi_channel(struct ath12k_wmi_channel_params * chan,struct wmi_vdev_start_req_arg * arg)1096 static void ath12k_wmi_put_wmi_channel(struct ath12k_wmi_channel_params *chan,
1097 				       struct wmi_vdev_start_req_arg *arg)
1098 {
1099 	u32 center_freq1 = arg->band_center_freq1;
1100 
1101 	memset(chan, 0, sizeof(*chan));
1102 
1103 	chan->mhz = cpu_to_le32(arg->freq);
1104 	chan->band_center_freq1 = cpu_to_le32(center_freq1);
1105 	if (arg->mode == MODE_11BE_EHT320) {
1106 		if (arg->freq > center_freq1)
1107 			chan->band_center_freq1 = cpu_to_le32(center_freq1 + 80);
1108 		else
1109 			chan->band_center_freq1 = cpu_to_le32(center_freq1 - 80);
1110 
1111 		chan->band_center_freq2 = cpu_to_le32(center_freq1);
1112 
1113 	} else if (arg->mode == MODE_11BE_EHT160 ||
1114 		   arg->mode == MODE_11AX_HE160) {
1115 		if (arg->freq > center_freq1)
1116 			chan->band_center_freq1 = cpu_to_le32(center_freq1 + 40);
1117 		else
1118 			chan->band_center_freq1 = cpu_to_le32(center_freq1 - 40);
1119 
1120 		chan->band_center_freq2 = cpu_to_le32(center_freq1);
1121 	} else {
1122 		chan->band_center_freq2 = 0;
1123 	}
1124 
1125 	chan->info |= le32_encode_bits(arg->mode, WMI_CHAN_INFO_MODE);
1126 	if (arg->passive)
1127 		chan->info |= cpu_to_le32(WMI_CHAN_INFO_PASSIVE);
1128 	if (arg->allow_ibss)
1129 		chan->info |= cpu_to_le32(WMI_CHAN_INFO_ADHOC_ALLOWED);
1130 	if (arg->allow_ht)
1131 		chan->info |= cpu_to_le32(WMI_CHAN_INFO_ALLOW_HT);
1132 	if (arg->allow_vht)
1133 		chan->info |= cpu_to_le32(WMI_CHAN_INFO_ALLOW_VHT);
1134 	if (arg->allow_he)
1135 		chan->info |= cpu_to_le32(WMI_CHAN_INFO_ALLOW_HE);
1136 	if (arg->ht40plus)
1137 		chan->info |= cpu_to_le32(WMI_CHAN_INFO_HT40_PLUS);
1138 	if (arg->chan_radar)
1139 		chan->info |= cpu_to_le32(WMI_CHAN_INFO_DFS);
1140 	if (arg->freq2_radar)
1141 		chan->info |= cpu_to_le32(WMI_CHAN_INFO_DFS_FREQ2);
1142 
1143 	chan->reg_info_1 = le32_encode_bits(arg->max_power,
1144 					    WMI_CHAN_REG_INFO1_MAX_PWR) |
1145 		le32_encode_bits(arg->max_reg_power,
1146 				 WMI_CHAN_REG_INFO1_MAX_REG_PWR);
1147 
1148 	chan->reg_info_2 = le32_encode_bits(arg->max_antenna_gain,
1149 					    WMI_CHAN_REG_INFO2_ANT_MAX) |
1150 		le32_encode_bits(arg->max_power, WMI_CHAN_REG_INFO2_MAX_TX_PWR);
1151 }
1152 
ath12k_wmi_vdev_start(struct ath12k * ar,struct wmi_vdev_start_req_arg * arg,bool restart)1153 int ath12k_wmi_vdev_start(struct ath12k *ar, struct wmi_vdev_start_req_arg *arg,
1154 			  bool restart)
1155 {
1156 	struct wmi_vdev_start_mlo_params *ml_params;
1157 	struct wmi_partner_link_info *partner_info;
1158 	struct ath12k_wmi_pdev *wmi = ar->wmi;
1159 	struct wmi_vdev_start_request_cmd *cmd;
1160 	struct sk_buff *skb;
1161 	struct ath12k_wmi_channel_params *chan;
1162 	struct wmi_tlv *tlv;
1163 	void *ptr;
1164 	int ret, len, i, ml_arg_size = 0;
1165 
1166 	if (WARN_ON(arg->ssid_len > sizeof(cmd->ssid.ssid)))
1167 		return -EINVAL;
1168 
1169 	len = sizeof(*cmd) + sizeof(*chan) + TLV_HDR_SIZE;
1170 
1171 	if (!restart && arg->ml.enabled) {
1172 		ml_arg_size = TLV_HDR_SIZE + sizeof(*ml_params) +
1173 			      TLV_HDR_SIZE + (arg->ml.num_partner_links *
1174 					      sizeof(*partner_info));
1175 		len += ml_arg_size;
1176 	}
1177 	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
1178 	if (!skb)
1179 		return -ENOMEM;
1180 
1181 	cmd = (struct wmi_vdev_start_request_cmd *)skb->data;
1182 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_START_REQUEST_CMD,
1183 						 sizeof(*cmd));
1184 	cmd->vdev_id = cpu_to_le32(arg->vdev_id);
1185 	cmd->beacon_interval = cpu_to_le32(arg->bcn_intval);
1186 	cmd->bcn_tx_rate = cpu_to_le32(arg->bcn_tx_rate);
1187 	cmd->dtim_period = cpu_to_le32(arg->dtim_period);
1188 	cmd->num_noa_descriptors = cpu_to_le32(arg->num_noa_descriptors);
1189 	cmd->preferred_rx_streams = cpu_to_le32(arg->pref_rx_streams);
1190 	cmd->preferred_tx_streams = cpu_to_le32(arg->pref_tx_streams);
1191 	cmd->cac_duration_ms = cpu_to_le32(arg->cac_duration_ms);
1192 	cmd->regdomain = cpu_to_le32(arg->regdomain);
1193 	cmd->he_ops = cpu_to_le32(arg->he_ops);
1194 	cmd->punct_bitmap = cpu_to_le32(arg->punct_bitmap);
1195 	cmd->mbssid_flags = cpu_to_le32(arg->mbssid_flags);
1196 	cmd->mbssid_tx_vdev_id = cpu_to_le32(arg->mbssid_tx_vdev_id);
1197 
1198 	if (!restart) {
1199 		if (arg->ssid) {
1200 			cmd->ssid.ssid_len = cpu_to_le32(arg->ssid_len);
1201 			memcpy(cmd->ssid.ssid, arg->ssid, arg->ssid_len);
1202 		}
1203 		if (arg->hidden_ssid)
1204 			cmd->flags |= cpu_to_le32(WMI_VDEV_START_HIDDEN_SSID);
1205 		if (arg->pmf_enabled)
1206 			cmd->flags |= cpu_to_le32(WMI_VDEV_START_PMF_ENABLED);
1207 	}
1208 
1209 	cmd->flags |= cpu_to_le32(WMI_VDEV_START_LDPC_RX_ENABLED);
1210 
1211 	ptr = skb->data + sizeof(*cmd);
1212 	chan = ptr;
1213 
1214 	ath12k_wmi_put_wmi_channel(chan, arg);
1215 
1216 	chan->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_CHANNEL,
1217 						  sizeof(*chan));
1218 	ptr += sizeof(*chan);
1219 
1220 	tlv = ptr;
1221 	tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, 0);
1222 
1223 	/* Note: This is a nested TLV containing:
1224 	 * [wmi_tlv][ath12k_wmi_p2p_noa_descriptor][wmi_tlv]..
1225 	 */
1226 
1227 	ptr += sizeof(*tlv);
1228 
1229 	if (ml_arg_size) {
1230 		tlv = ptr;
1231 		tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT,
1232 						 sizeof(*ml_params));
1233 		ptr += TLV_HDR_SIZE;
1234 
1235 		ml_params = ptr;
1236 
1237 		ml_params->tlv_header =
1238 			ath12k_wmi_tlv_cmd_hdr(WMI_TAG_MLO_VDEV_START_PARAMS,
1239 					       sizeof(*ml_params));
1240 
1241 		ml_params->flags = le32_encode_bits(arg->ml.enabled,
1242 						    ATH12K_WMI_FLAG_MLO_ENABLED) |
1243 				   le32_encode_bits(arg->ml.assoc_link,
1244 						    ATH12K_WMI_FLAG_MLO_ASSOC_LINK) |
1245 				   le32_encode_bits(arg->ml.mcast_link,
1246 						    ATH12K_WMI_FLAG_MLO_MCAST_VDEV) |
1247 				   le32_encode_bits(arg->ml.link_add,
1248 						    ATH12K_WMI_FLAG_MLO_LINK_ADD);
1249 
1250 		ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "vdev %d start ml flags 0x%x\n",
1251 			   arg->vdev_id, ml_params->flags);
1252 
1253 		ptr += sizeof(*ml_params);
1254 
1255 		tlv = ptr;
1256 		tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT,
1257 						 arg->ml.num_partner_links *
1258 						 sizeof(*partner_info));
1259 		ptr += TLV_HDR_SIZE;
1260 
1261 		partner_info = ptr;
1262 
1263 		for (i = 0; i < arg->ml.num_partner_links; i++) {
1264 			partner_info->tlv_header =
1265 				ath12k_wmi_tlv_cmd_hdr(WMI_TAG_MLO_PARTNER_LINK_PARAMS,
1266 						       sizeof(*partner_info));
1267 			partner_info->vdev_id =
1268 				cpu_to_le32(arg->ml.partner_info[i].vdev_id);
1269 			partner_info->hw_link_id =
1270 				cpu_to_le32(arg->ml.partner_info[i].hw_link_id);
1271 			ether_addr_copy(partner_info->vdev_addr.addr,
1272 					arg->ml.partner_info[i].addr);
1273 
1274 			ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "partner vdev %d hw_link_id %d macaddr%pM\n",
1275 				   partner_info->vdev_id, partner_info->hw_link_id,
1276 				   partner_info->vdev_addr.addr);
1277 
1278 			partner_info++;
1279 		}
1280 
1281 		ptr = partner_info;
1282 	}
1283 
1284 	ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "vdev %s id 0x%x freq 0x%x mode 0x%x\n",
1285 		   restart ? "restart" : "start", arg->vdev_id,
1286 		   arg->freq, arg->mode);
1287 
1288 	if (restart)
1289 		ret = ath12k_wmi_cmd_send(wmi, skb,
1290 					  WMI_VDEV_RESTART_REQUEST_CMDID);
1291 	else
1292 		ret = ath12k_wmi_cmd_send(wmi, skb,
1293 					  WMI_VDEV_START_REQUEST_CMDID);
1294 	if (ret) {
1295 		ath12k_warn(ar->ab, "failed to submit vdev_%s cmd\n",
1296 			    restart ? "restart" : "start");
1297 		dev_kfree_skb(skb);
1298 	}
1299 
1300 	return ret;
1301 }
1302 
ath12k_wmi_vdev_up(struct ath12k * ar,struct ath12k_wmi_vdev_up_params * params)1303 int ath12k_wmi_vdev_up(struct ath12k *ar, struct ath12k_wmi_vdev_up_params *params)
1304 {
1305 	struct ath12k_wmi_pdev *wmi = ar->wmi;
1306 	struct wmi_vdev_up_cmd *cmd;
1307 	struct sk_buff *skb;
1308 	int ret;
1309 
1310 	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1311 	if (!skb)
1312 		return -ENOMEM;
1313 
1314 	cmd = (struct wmi_vdev_up_cmd *)skb->data;
1315 
1316 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_UP_CMD,
1317 						 sizeof(*cmd));
1318 	cmd->vdev_id = cpu_to_le32(params->vdev_id);
1319 	cmd->vdev_assoc_id = cpu_to_le32(params->aid);
1320 
1321 	ether_addr_copy(cmd->vdev_bssid.addr, params->bssid);
1322 
1323 	if (params->tx_bssid) {
1324 		ether_addr_copy(cmd->tx_vdev_bssid.addr, params->tx_bssid);
1325 		cmd->nontx_profile_idx = cpu_to_le32(params->nontx_profile_idx);
1326 		cmd->nontx_profile_cnt = cpu_to_le32(params->nontx_profile_cnt);
1327 	}
1328 
1329 	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1330 		   "WMI mgmt vdev up id 0x%x assoc id %d bssid %pM\n",
1331 		   params->vdev_id, params->aid, params->bssid);
1332 
1333 	ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_UP_CMDID);
1334 	if (ret) {
1335 		ath12k_warn(ar->ab, "failed to submit WMI_VDEV_UP cmd\n");
1336 		dev_kfree_skb(skb);
1337 	}
1338 
1339 	return ret;
1340 }
1341 
ath12k_wmi_send_peer_create_cmd(struct ath12k * ar,struct ath12k_wmi_peer_create_arg * arg)1342 int ath12k_wmi_send_peer_create_cmd(struct ath12k *ar,
1343 				    struct ath12k_wmi_peer_create_arg *arg)
1344 {
1345 	struct ath12k_wmi_pdev *wmi = ar->wmi;
1346 	struct wmi_peer_create_cmd *cmd;
1347 	struct sk_buff *skb;
1348 	int ret, len;
1349 	struct wmi_peer_create_mlo_params *ml_param;
1350 	void *ptr;
1351 	struct wmi_tlv *tlv;
1352 
1353 	len = sizeof(*cmd) + TLV_HDR_SIZE + sizeof(*ml_param);
1354 
1355 	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
1356 	if (!skb)
1357 		return -ENOMEM;
1358 
1359 	cmd = (struct wmi_peer_create_cmd *)skb->data;
1360 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PEER_CREATE_CMD,
1361 						 sizeof(*cmd));
1362 
1363 	ether_addr_copy(cmd->peer_macaddr.addr, arg->peer_addr);
1364 	cmd->peer_type = cpu_to_le32(arg->peer_type);
1365 	cmd->vdev_id = cpu_to_le32(arg->vdev_id);
1366 
1367 	ptr = skb->data + sizeof(*cmd);
1368 	tlv = ptr;
1369 	tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT,
1370 					 sizeof(*ml_param));
1371 	ptr += TLV_HDR_SIZE;
1372 	ml_param = ptr;
1373 	ml_param->tlv_header =
1374 			ath12k_wmi_tlv_cmd_hdr(WMI_TAG_MLO_PEER_CREATE_PARAMS,
1375 					       sizeof(*ml_param));
1376 	if (arg->ml_enabled)
1377 		ml_param->flags = cpu_to_le32(ATH12K_WMI_FLAG_MLO_ENABLED);
1378 
1379 	ptr += sizeof(*ml_param);
1380 
1381 	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1382 		   "WMI peer create vdev_id %d peer_addr %pM ml_flags 0x%x\n",
1383 		   arg->vdev_id, arg->peer_addr, ml_param->flags);
1384 
1385 	ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PEER_CREATE_CMDID);
1386 	if (ret) {
1387 		ath12k_warn(ar->ab, "failed to submit WMI_PEER_CREATE cmd\n");
1388 		dev_kfree_skb(skb);
1389 	}
1390 
1391 	return ret;
1392 }
1393 
ath12k_wmi_send_peer_delete_cmd(struct ath12k * ar,const u8 * peer_addr,u8 vdev_id)1394 int ath12k_wmi_send_peer_delete_cmd(struct ath12k *ar,
1395 				    const u8 *peer_addr, u8 vdev_id)
1396 {
1397 	struct ath12k_wmi_pdev *wmi = ar->wmi;
1398 	struct wmi_peer_delete_cmd *cmd;
1399 	struct sk_buff *skb;
1400 	int ret;
1401 
1402 	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1403 	if (!skb)
1404 		return -ENOMEM;
1405 
1406 	cmd = (struct wmi_peer_delete_cmd *)skb->data;
1407 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PEER_DELETE_CMD,
1408 						 sizeof(*cmd));
1409 
1410 	ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
1411 	cmd->vdev_id = cpu_to_le32(vdev_id);
1412 
1413 	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1414 		   "WMI peer delete vdev_id %d peer_addr %pM\n",
1415 		   vdev_id,  peer_addr);
1416 
1417 	ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PEER_DELETE_CMDID);
1418 	if (ret) {
1419 		ath12k_warn(ar->ab, "failed to send WMI_PEER_DELETE cmd\n");
1420 		dev_kfree_skb(skb);
1421 	}
1422 
1423 	return ret;
1424 }
1425 
ath12k_wmi_send_pdev_set_regdomain(struct ath12k * ar,struct ath12k_wmi_pdev_set_regdomain_arg * arg)1426 int ath12k_wmi_send_pdev_set_regdomain(struct ath12k *ar,
1427 				       struct ath12k_wmi_pdev_set_regdomain_arg *arg)
1428 {
1429 	struct ath12k_wmi_pdev *wmi = ar->wmi;
1430 	struct wmi_pdev_set_regdomain_cmd *cmd;
1431 	struct sk_buff *skb;
1432 	int ret;
1433 
1434 	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1435 	if (!skb)
1436 		return -ENOMEM;
1437 
1438 	cmd = (struct wmi_pdev_set_regdomain_cmd *)skb->data;
1439 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SET_REGDOMAIN_CMD,
1440 						 sizeof(*cmd));
1441 
1442 	cmd->reg_domain = cpu_to_le32(arg->current_rd_in_use);
1443 	cmd->reg_domain_2g = cpu_to_le32(arg->current_rd_2g);
1444 	cmd->reg_domain_5g = cpu_to_le32(arg->current_rd_5g);
1445 	cmd->conformance_test_limit_2g = cpu_to_le32(arg->ctl_2g);
1446 	cmd->conformance_test_limit_5g = cpu_to_le32(arg->ctl_5g);
1447 	cmd->dfs_domain = cpu_to_le32(arg->dfs_domain);
1448 	cmd->pdev_id = cpu_to_le32(arg->pdev_id);
1449 
1450 	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1451 		   "WMI pdev regd rd %d rd2g %d rd5g %d domain %d pdev id %d\n",
1452 		   arg->current_rd_in_use, arg->current_rd_2g,
1453 		   arg->current_rd_5g, arg->dfs_domain, arg->pdev_id);
1454 
1455 	ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PDEV_SET_REGDOMAIN_CMDID);
1456 	if (ret) {
1457 		ath12k_warn(ar->ab,
1458 			    "failed to send WMI_PDEV_SET_REGDOMAIN cmd\n");
1459 		dev_kfree_skb(skb);
1460 	}
1461 
1462 	return ret;
1463 }
1464 
ath12k_wmi_set_peer_param(struct ath12k * ar,const u8 * peer_addr,u32 vdev_id,u32 param_id,u32 param_val)1465 int ath12k_wmi_set_peer_param(struct ath12k *ar, const u8 *peer_addr,
1466 			      u32 vdev_id, u32 param_id, u32 param_val)
1467 {
1468 	struct ath12k_wmi_pdev *wmi = ar->wmi;
1469 	struct wmi_peer_set_param_cmd *cmd;
1470 	struct sk_buff *skb;
1471 	int ret;
1472 
1473 	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1474 	if (!skb)
1475 		return -ENOMEM;
1476 
1477 	cmd = (struct wmi_peer_set_param_cmd *)skb->data;
1478 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PEER_SET_PARAM_CMD,
1479 						 sizeof(*cmd));
1480 	ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
1481 	cmd->vdev_id = cpu_to_le32(vdev_id);
1482 	cmd->param_id = cpu_to_le32(param_id);
1483 	cmd->param_value = cpu_to_le32(param_val);
1484 
1485 	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1486 		   "WMI vdev %d peer 0x%pM set param %d value %d\n",
1487 		   vdev_id, peer_addr, param_id, param_val);
1488 
1489 	ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PEER_SET_PARAM_CMDID);
1490 	if (ret) {
1491 		ath12k_warn(ar->ab, "failed to send WMI_PEER_SET_PARAM cmd\n");
1492 		dev_kfree_skb(skb);
1493 	}
1494 
1495 	return ret;
1496 }
1497 
ath12k_wmi_send_peer_flush_tids_cmd(struct ath12k * ar,u8 peer_addr[ETH_ALEN],u32 peer_tid_bitmap,u8 vdev_id)1498 int ath12k_wmi_send_peer_flush_tids_cmd(struct ath12k *ar,
1499 					u8 peer_addr[ETH_ALEN],
1500 					u32 peer_tid_bitmap,
1501 					u8 vdev_id)
1502 {
1503 	struct ath12k_wmi_pdev *wmi = ar->wmi;
1504 	struct wmi_peer_flush_tids_cmd *cmd;
1505 	struct sk_buff *skb;
1506 	int ret;
1507 
1508 	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1509 	if (!skb)
1510 		return -ENOMEM;
1511 
1512 	cmd = (struct wmi_peer_flush_tids_cmd *)skb->data;
1513 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PEER_FLUSH_TIDS_CMD,
1514 						 sizeof(*cmd));
1515 
1516 	ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
1517 	cmd->peer_tid_bitmap = cpu_to_le32(peer_tid_bitmap);
1518 	cmd->vdev_id = cpu_to_le32(vdev_id);
1519 
1520 	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1521 		   "WMI peer flush vdev_id %d peer_addr %pM tids %08x\n",
1522 		   vdev_id, peer_addr, peer_tid_bitmap);
1523 
1524 	ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PEER_FLUSH_TIDS_CMDID);
1525 	if (ret) {
1526 		ath12k_warn(ar->ab,
1527 			    "failed to send WMI_PEER_FLUSH_TIDS cmd\n");
1528 		dev_kfree_skb(skb);
1529 	}
1530 
1531 	return ret;
1532 }
1533 
ath12k_wmi_peer_rx_reorder_queue_setup(struct ath12k * ar,int vdev_id,const u8 * addr,dma_addr_t paddr,u8 tid,u8 ba_window_size_valid,u32 ba_window_size)1534 int ath12k_wmi_peer_rx_reorder_queue_setup(struct ath12k *ar,
1535 					   int vdev_id, const u8 *addr,
1536 					   dma_addr_t paddr, u8 tid,
1537 					   u8 ba_window_size_valid,
1538 					   u32 ba_window_size)
1539 {
1540 	struct wmi_peer_reorder_queue_setup_cmd *cmd;
1541 	struct sk_buff *skb;
1542 	int ret;
1543 
1544 	skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, sizeof(*cmd));
1545 	if (!skb)
1546 		return -ENOMEM;
1547 
1548 	cmd = (struct wmi_peer_reorder_queue_setup_cmd *)skb->data;
1549 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_REORDER_QUEUE_SETUP_CMD,
1550 						 sizeof(*cmd));
1551 
1552 	ether_addr_copy(cmd->peer_macaddr.addr, addr);
1553 	cmd->vdev_id = cpu_to_le32(vdev_id);
1554 	cmd->tid = cpu_to_le32(tid);
1555 	cmd->queue_ptr_lo = cpu_to_le32(lower_32_bits(paddr));
1556 	cmd->queue_ptr_hi = cpu_to_le32(upper_32_bits(paddr));
1557 	cmd->queue_no = cpu_to_le32(tid);
1558 	cmd->ba_window_size_valid = cpu_to_le32(ba_window_size_valid);
1559 	cmd->ba_window_size = cpu_to_le32(ba_window_size);
1560 
1561 	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1562 		   "wmi rx reorder queue setup addr %pM vdev_id %d tid %d\n",
1563 		   addr, vdev_id, tid);
1564 
1565 	ret = ath12k_wmi_cmd_send(ar->wmi, skb,
1566 				  WMI_PEER_REORDER_QUEUE_SETUP_CMDID);
1567 	if (ret) {
1568 		ath12k_warn(ar->ab,
1569 			    "failed to send WMI_PEER_REORDER_QUEUE_SETUP\n");
1570 		dev_kfree_skb(skb);
1571 	}
1572 
1573 	return ret;
1574 }
1575 
1576 int
ath12k_wmi_rx_reord_queue_remove(struct ath12k * ar,struct ath12k_wmi_rx_reorder_queue_remove_arg * arg)1577 ath12k_wmi_rx_reord_queue_remove(struct ath12k *ar,
1578 				 struct ath12k_wmi_rx_reorder_queue_remove_arg *arg)
1579 {
1580 	struct ath12k_wmi_pdev *wmi = ar->wmi;
1581 	struct wmi_peer_reorder_queue_remove_cmd *cmd;
1582 	struct sk_buff *skb;
1583 	int ret;
1584 
1585 	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1586 	if (!skb)
1587 		return -ENOMEM;
1588 
1589 	cmd = (struct wmi_peer_reorder_queue_remove_cmd *)skb->data;
1590 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_REORDER_QUEUE_REMOVE_CMD,
1591 						 sizeof(*cmd));
1592 
1593 	ether_addr_copy(cmd->peer_macaddr.addr, arg->peer_macaddr);
1594 	cmd->vdev_id = cpu_to_le32(arg->vdev_id);
1595 	cmd->tid_mask = cpu_to_le32(arg->peer_tid_bitmap);
1596 
1597 	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1598 		   "%s: peer_macaddr %pM vdev_id %d, tid_map %d", __func__,
1599 		   arg->peer_macaddr, arg->vdev_id, arg->peer_tid_bitmap);
1600 
1601 	ret = ath12k_wmi_cmd_send(wmi, skb,
1602 				  WMI_PEER_REORDER_QUEUE_REMOVE_CMDID);
1603 	if (ret) {
1604 		ath12k_warn(ar->ab,
1605 			    "failed to send WMI_PEER_REORDER_QUEUE_REMOVE_CMDID");
1606 		dev_kfree_skb(skb);
1607 	}
1608 
1609 	return ret;
1610 }
1611 
ath12k_wmi_pdev_set_param(struct ath12k * ar,u32 param_id,u32 param_value,u8 pdev_id)1612 int ath12k_wmi_pdev_set_param(struct ath12k *ar, u32 param_id,
1613 			      u32 param_value, u8 pdev_id)
1614 {
1615 	struct ath12k_wmi_pdev *wmi = ar->wmi;
1616 	struct wmi_pdev_set_param_cmd *cmd;
1617 	struct sk_buff *skb;
1618 	int ret;
1619 
1620 	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1621 	if (!skb)
1622 		return -ENOMEM;
1623 
1624 	cmd = (struct wmi_pdev_set_param_cmd *)skb->data;
1625 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SET_PARAM_CMD,
1626 						 sizeof(*cmd));
1627 	cmd->pdev_id = cpu_to_le32(pdev_id);
1628 	cmd->param_id = cpu_to_le32(param_id);
1629 	cmd->param_value = cpu_to_le32(param_value);
1630 
1631 	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1632 		   "WMI pdev set param %d pdev id %d value %d\n",
1633 		   param_id, pdev_id, param_value);
1634 
1635 	ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PDEV_SET_PARAM_CMDID);
1636 	if (ret) {
1637 		ath12k_warn(ar->ab, "failed to send WMI_PDEV_SET_PARAM cmd\n");
1638 		dev_kfree_skb(skb);
1639 	}
1640 
1641 	return ret;
1642 }
1643 
ath12k_wmi_pdev_set_ps_mode(struct ath12k * ar,int vdev_id,u32 enable)1644 int ath12k_wmi_pdev_set_ps_mode(struct ath12k *ar, int vdev_id, u32 enable)
1645 {
1646 	struct ath12k_wmi_pdev *wmi = ar->wmi;
1647 	struct wmi_pdev_set_ps_mode_cmd *cmd;
1648 	struct sk_buff *skb;
1649 	int ret;
1650 
1651 	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1652 	if (!skb)
1653 		return -ENOMEM;
1654 
1655 	cmd = (struct wmi_pdev_set_ps_mode_cmd *)skb->data;
1656 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_STA_POWERSAVE_MODE_CMD,
1657 						 sizeof(*cmd));
1658 	cmd->vdev_id = cpu_to_le32(vdev_id);
1659 	cmd->sta_ps_mode = cpu_to_le32(enable);
1660 
1661 	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1662 		   "WMI vdev set psmode %d vdev id %d\n",
1663 		   enable, vdev_id);
1664 
1665 	ret = ath12k_wmi_cmd_send(wmi, skb, WMI_STA_POWERSAVE_MODE_CMDID);
1666 	if (ret) {
1667 		ath12k_warn(ar->ab, "failed to send WMI_PDEV_SET_PARAM cmd\n");
1668 		dev_kfree_skb(skb);
1669 	}
1670 
1671 	return ret;
1672 }
1673 
ath12k_wmi_pdev_suspend(struct ath12k * ar,u32 suspend_opt,u32 pdev_id)1674 int ath12k_wmi_pdev_suspend(struct ath12k *ar, u32 suspend_opt,
1675 			    u32 pdev_id)
1676 {
1677 	struct ath12k_wmi_pdev *wmi = ar->wmi;
1678 	struct wmi_pdev_suspend_cmd *cmd;
1679 	struct sk_buff *skb;
1680 	int ret;
1681 
1682 	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1683 	if (!skb)
1684 		return -ENOMEM;
1685 
1686 	cmd = (struct wmi_pdev_suspend_cmd *)skb->data;
1687 
1688 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SUSPEND_CMD,
1689 						 sizeof(*cmd));
1690 
1691 	cmd->suspend_opt = cpu_to_le32(suspend_opt);
1692 	cmd->pdev_id = cpu_to_le32(pdev_id);
1693 
1694 	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1695 		   "WMI pdev suspend pdev_id %d\n", pdev_id);
1696 
1697 	ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PDEV_SUSPEND_CMDID);
1698 	if (ret) {
1699 		ath12k_warn(ar->ab, "failed to send WMI_PDEV_SUSPEND cmd\n");
1700 		dev_kfree_skb(skb);
1701 	}
1702 
1703 	return ret;
1704 }
1705 
ath12k_wmi_pdev_resume(struct ath12k * ar,u32 pdev_id)1706 int ath12k_wmi_pdev_resume(struct ath12k *ar, u32 pdev_id)
1707 {
1708 	struct ath12k_wmi_pdev *wmi = ar->wmi;
1709 	struct wmi_pdev_resume_cmd *cmd;
1710 	struct sk_buff *skb;
1711 	int ret;
1712 
1713 	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1714 	if (!skb)
1715 		return -ENOMEM;
1716 
1717 	cmd = (struct wmi_pdev_resume_cmd *)skb->data;
1718 
1719 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_RESUME_CMD,
1720 						 sizeof(*cmd));
1721 	cmd->pdev_id = cpu_to_le32(pdev_id);
1722 
1723 	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1724 		   "WMI pdev resume pdev id %d\n", pdev_id);
1725 
1726 	ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PDEV_RESUME_CMDID);
1727 	if (ret) {
1728 		ath12k_warn(ar->ab, "failed to send WMI_PDEV_RESUME cmd\n");
1729 		dev_kfree_skb(skb);
1730 	}
1731 
1732 	return ret;
1733 }
1734 
1735 /* TODO FW Support for the cmd is not available yet.
1736  * Can be tested once the command and corresponding
1737  * event is implemented in FW
1738  */
ath12k_wmi_pdev_bss_chan_info_request(struct ath12k * ar,enum wmi_bss_chan_info_req_type type)1739 int ath12k_wmi_pdev_bss_chan_info_request(struct ath12k *ar,
1740 					  enum wmi_bss_chan_info_req_type type)
1741 {
1742 	struct ath12k_wmi_pdev *wmi = ar->wmi;
1743 	struct wmi_pdev_bss_chan_info_req_cmd *cmd;
1744 	struct sk_buff *skb;
1745 	int ret;
1746 
1747 	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1748 	if (!skb)
1749 		return -ENOMEM;
1750 
1751 	cmd = (struct wmi_pdev_bss_chan_info_req_cmd *)skb->data;
1752 
1753 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_BSS_CHAN_INFO_REQUEST,
1754 						 sizeof(*cmd));
1755 	cmd->req_type = cpu_to_le32(type);
1756 	cmd->pdev_id = cpu_to_le32(ar->pdev->pdev_id);
1757 
1758 	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1759 		   "WMI bss chan info req type %d\n", type);
1760 
1761 	ret = ath12k_wmi_cmd_send(wmi, skb,
1762 				  WMI_PDEV_BSS_CHAN_INFO_REQUEST_CMDID);
1763 	if (ret) {
1764 		ath12k_warn(ar->ab,
1765 			    "failed to send WMI_PDEV_BSS_CHAN_INFO_REQUEST cmd\n");
1766 		dev_kfree_skb(skb);
1767 	}
1768 
1769 	return ret;
1770 }
1771 
ath12k_wmi_send_set_ap_ps_param_cmd(struct ath12k * ar,u8 * peer_addr,struct ath12k_wmi_ap_ps_arg * arg)1772 int ath12k_wmi_send_set_ap_ps_param_cmd(struct ath12k *ar, u8 *peer_addr,
1773 					struct ath12k_wmi_ap_ps_arg *arg)
1774 {
1775 	struct ath12k_wmi_pdev *wmi = ar->wmi;
1776 	struct wmi_ap_ps_peer_cmd *cmd;
1777 	struct sk_buff *skb;
1778 	int ret;
1779 
1780 	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1781 	if (!skb)
1782 		return -ENOMEM;
1783 
1784 	cmd = (struct wmi_ap_ps_peer_cmd *)skb->data;
1785 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_AP_PS_PEER_CMD,
1786 						 sizeof(*cmd));
1787 
1788 	cmd->vdev_id = cpu_to_le32(arg->vdev_id);
1789 	ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
1790 	cmd->param = cpu_to_le32(arg->param);
1791 	cmd->value = cpu_to_le32(arg->value);
1792 
1793 	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1794 		   "WMI set ap ps vdev id %d peer %pM param %d value %d\n",
1795 		   arg->vdev_id, peer_addr, arg->param, arg->value);
1796 
1797 	ret = ath12k_wmi_cmd_send(wmi, skb, WMI_AP_PS_PEER_PARAM_CMDID);
1798 	if (ret) {
1799 		ath12k_warn(ar->ab,
1800 			    "failed to send WMI_AP_PS_PEER_PARAM_CMDID\n");
1801 		dev_kfree_skb(skb);
1802 	}
1803 
1804 	return ret;
1805 }
1806 
ath12k_wmi_set_sta_ps_param(struct ath12k * ar,u32 vdev_id,u32 param,u32 param_value)1807 int ath12k_wmi_set_sta_ps_param(struct ath12k *ar, u32 vdev_id,
1808 				u32 param, u32 param_value)
1809 {
1810 	struct ath12k_wmi_pdev *wmi = ar->wmi;
1811 	struct wmi_sta_powersave_param_cmd *cmd;
1812 	struct sk_buff *skb;
1813 	int ret;
1814 
1815 	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1816 	if (!skb)
1817 		return -ENOMEM;
1818 
1819 	cmd = (struct wmi_sta_powersave_param_cmd *)skb->data;
1820 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_STA_POWERSAVE_PARAM_CMD,
1821 						 sizeof(*cmd));
1822 
1823 	cmd->vdev_id = cpu_to_le32(vdev_id);
1824 	cmd->param = cpu_to_le32(param);
1825 	cmd->value = cpu_to_le32(param_value);
1826 
1827 	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1828 		   "WMI set sta ps vdev_id %d param %d value %d\n",
1829 		   vdev_id, param, param_value);
1830 
1831 	ret = ath12k_wmi_cmd_send(wmi, skb, WMI_STA_POWERSAVE_PARAM_CMDID);
1832 	if (ret) {
1833 		ath12k_warn(ar->ab, "failed to send WMI_STA_POWERSAVE_PARAM_CMDID");
1834 		dev_kfree_skb(skb);
1835 	}
1836 
1837 	return ret;
1838 }
1839 
ath12k_wmi_force_fw_hang_cmd(struct ath12k * ar,u32 type,u32 delay_time_ms)1840 int ath12k_wmi_force_fw_hang_cmd(struct ath12k *ar, u32 type, u32 delay_time_ms)
1841 {
1842 	struct ath12k_wmi_pdev *wmi = ar->wmi;
1843 	struct wmi_force_fw_hang_cmd *cmd;
1844 	struct sk_buff *skb;
1845 	int ret, len;
1846 
1847 	len = sizeof(*cmd);
1848 
1849 	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
1850 	if (!skb)
1851 		return -ENOMEM;
1852 
1853 	cmd = (struct wmi_force_fw_hang_cmd *)skb->data;
1854 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_FORCE_FW_HANG_CMD,
1855 						 len);
1856 
1857 	cmd->type = cpu_to_le32(type);
1858 	cmd->delay_time_ms = cpu_to_le32(delay_time_ms);
1859 
1860 	ret = ath12k_wmi_cmd_send(wmi, skb, WMI_FORCE_FW_HANG_CMDID);
1861 
1862 	if (ret) {
1863 		ath12k_warn(ar->ab, "Failed to send WMI_FORCE_FW_HANG_CMDID");
1864 		dev_kfree_skb(skb);
1865 	}
1866 	return ret;
1867 }
1868 
ath12k_wmi_vdev_set_param_cmd(struct ath12k * ar,u32 vdev_id,u32 param_id,u32 param_value)1869 int ath12k_wmi_vdev_set_param_cmd(struct ath12k *ar, u32 vdev_id,
1870 				  u32 param_id, u32 param_value)
1871 {
1872 	struct ath12k_wmi_pdev *wmi = ar->wmi;
1873 	struct wmi_vdev_set_param_cmd *cmd;
1874 	struct sk_buff *skb;
1875 	int ret;
1876 
1877 	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1878 	if (!skb)
1879 		return -ENOMEM;
1880 
1881 	cmd = (struct wmi_vdev_set_param_cmd *)skb->data;
1882 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_SET_PARAM_CMD,
1883 						 sizeof(*cmd));
1884 
1885 	cmd->vdev_id = cpu_to_le32(vdev_id);
1886 	cmd->param_id = cpu_to_le32(param_id);
1887 	cmd->param_value = cpu_to_le32(param_value);
1888 
1889 	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1890 		   "WMI vdev id 0x%x set param %d value %d\n",
1891 		   vdev_id, param_id, param_value);
1892 
1893 	ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_SET_PARAM_CMDID);
1894 	if (ret) {
1895 		ath12k_warn(ar->ab,
1896 			    "failed to send WMI_VDEV_SET_PARAM_CMDID\n");
1897 		dev_kfree_skb(skb);
1898 	}
1899 
1900 	return ret;
1901 }
1902 
ath12k_wmi_send_pdev_temperature_cmd(struct ath12k * ar)1903 int ath12k_wmi_send_pdev_temperature_cmd(struct ath12k *ar)
1904 {
1905 	struct ath12k_wmi_pdev *wmi = ar->wmi;
1906 	struct wmi_get_pdev_temperature_cmd *cmd;
1907 	struct sk_buff *skb;
1908 	int ret;
1909 
1910 	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1911 	if (!skb)
1912 		return -ENOMEM;
1913 
1914 	cmd = (struct wmi_get_pdev_temperature_cmd *)skb->data;
1915 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_GET_TEMPERATURE_CMD,
1916 						 sizeof(*cmd));
1917 	cmd->pdev_id = cpu_to_le32(ar->pdev->pdev_id);
1918 
1919 	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1920 		   "WMI pdev get temperature for pdev_id %d\n", ar->pdev->pdev_id);
1921 
1922 	ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PDEV_GET_TEMPERATURE_CMDID);
1923 	if (ret) {
1924 		ath12k_warn(ar->ab, "failed to send WMI_PDEV_GET_TEMPERATURE cmd\n");
1925 		dev_kfree_skb(skb);
1926 	}
1927 
1928 	return ret;
1929 }
1930 
ath12k_wmi_send_bcn_offload_control_cmd(struct ath12k * ar,u32 vdev_id,u32 bcn_ctrl_op)1931 int ath12k_wmi_send_bcn_offload_control_cmd(struct ath12k *ar,
1932 					    u32 vdev_id, u32 bcn_ctrl_op)
1933 {
1934 	struct ath12k_wmi_pdev *wmi = ar->wmi;
1935 	struct wmi_bcn_offload_ctrl_cmd *cmd;
1936 	struct sk_buff *skb;
1937 	int ret;
1938 
1939 	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1940 	if (!skb)
1941 		return -ENOMEM;
1942 
1943 	cmd = (struct wmi_bcn_offload_ctrl_cmd *)skb->data;
1944 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_BCN_OFFLOAD_CTRL_CMD,
1945 						 sizeof(*cmd));
1946 
1947 	cmd->vdev_id = cpu_to_le32(vdev_id);
1948 	cmd->bcn_ctrl_op = cpu_to_le32(bcn_ctrl_op);
1949 
1950 	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1951 		   "WMI bcn ctrl offload vdev id %d ctrl_op %d\n",
1952 		   vdev_id, bcn_ctrl_op);
1953 
1954 	ret = ath12k_wmi_cmd_send(wmi, skb, WMI_BCN_OFFLOAD_CTRL_CMDID);
1955 	if (ret) {
1956 		ath12k_warn(ar->ab,
1957 			    "failed to send WMI_BCN_OFFLOAD_CTRL_CMDID\n");
1958 		dev_kfree_skb(skb);
1959 	}
1960 
1961 	return ret;
1962 }
1963 
ath12k_wmi_p2p_go_bcn_ie(struct ath12k * ar,u32 vdev_id,const u8 * p2p_ie)1964 int ath12k_wmi_p2p_go_bcn_ie(struct ath12k *ar, u32 vdev_id,
1965 			     const u8 *p2p_ie)
1966 {
1967 	struct ath12k_wmi_pdev *wmi = ar->wmi;
1968 	struct wmi_p2p_go_set_beacon_ie_cmd *cmd;
1969 	size_t p2p_ie_len, aligned_len;
1970 	struct wmi_tlv *tlv;
1971 	struct sk_buff *skb;
1972 	void *ptr;
1973 	int ret, len;
1974 
1975 	p2p_ie_len = p2p_ie[1] + 2;
1976 	aligned_len = roundup(p2p_ie_len, sizeof(u32));
1977 
1978 	len = sizeof(*cmd) + TLV_HDR_SIZE + aligned_len;
1979 
1980 	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
1981 	if (!skb)
1982 		return -ENOMEM;
1983 
1984 	ptr = skb->data;
1985 	cmd = ptr;
1986 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_P2P_GO_SET_BEACON_IE,
1987 						 sizeof(*cmd));
1988 	cmd->vdev_id = cpu_to_le32(vdev_id);
1989 	cmd->ie_buf_len = cpu_to_le32(p2p_ie_len);
1990 
1991 	ptr += sizeof(*cmd);
1992 	tlv = ptr;
1993 	tlv->header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ARRAY_BYTE,
1994 					     aligned_len);
1995 	memcpy(tlv->value, p2p_ie, p2p_ie_len);
1996 
1997 	ret = ath12k_wmi_cmd_send(wmi, skb, WMI_P2P_GO_SET_BEACON_IE);
1998 	if (ret) {
1999 		ath12k_warn(ar->ab, "failed to send WMI_P2P_GO_SET_BEACON_IE\n");
2000 		dev_kfree_skb(skb);
2001 	}
2002 
2003 	return ret;
2004 }
2005 
ath12k_wmi_bcn_tmpl(struct ath12k_link_vif * arvif,struct ieee80211_mutable_offsets * offs,struct sk_buff * bcn,struct ath12k_wmi_bcn_tmpl_ema_arg * ema_args)2006 int ath12k_wmi_bcn_tmpl(struct ath12k_link_vif *arvif,
2007 			struct ieee80211_mutable_offsets *offs,
2008 			struct sk_buff *bcn,
2009 			struct ath12k_wmi_bcn_tmpl_ema_arg *ema_args)
2010 {
2011 	struct ath12k *ar = arvif->ar;
2012 	struct ath12k_wmi_pdev *wmi = ar->wmi;
2013 	struct ath12k_base *ab = ar->ab;
2014 	struct wmi_bcn_tmpl_cmd *cmd;
2015 	struct ath12k_wmi_bcn_prb_info_params *bcn_prb_info;
2016 	struct ath12k_vif *ahvif = arvif->ahvif;
2017 	struct ieee80211_bss_conf *conf;
2018 	u32 vdev_id = arvif->vdev_id;
2019 	struct wmi_tlv *tlv;
2020 	struct sk_buff *skb;
2021 	u32 ema_params = 0;
2022 	void *ptr;
2023 	int ret, len;
2024 	size_t aligned_len = roundup(bcn->len, 4);
2025 
2026 	conf = ath12k_mac_get_link_bss_conf(arvif);
2027 	if (!conf) {
2028 		ath12k_warn(ab,
2029 			    "unable to access bss link conf in beacon template command for vif %pM link %u\n",
2030 			    ahvif->vif->addr, arvif->link_id);
2031 		return -EINVAL;
2032 	}
2033 
2034 	len = sizeof(*cmd) + sizeof(*bcn_prb_info) + TLV_HDR_SIZE + aligned_len;
2035 
2036 	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
2037 	if (!skb)
2038 		return -ENOMEM;
2039 
2040 	cmd = (struct wmi_bcn_tmpl_cmd *)skb->data;
2041 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_BCN_TMPL_CMD,
2042 						 sizeof(*cmd));
2043 	cmd->vdev_id = cpu_to_le32(vdev_id);
2044 	cmd->tim_ie_offset = cpu_to_le32(offs->tim_offset);
2045 
2046 	if (conf->csa_active) {
2047 		cmd->csa_switch_count_offset =
2048 				cpu_to_le32(offs->cntdwn_counter_offs[0]);
2049 		cmd->ext_csa_switch_count_offset =
2050 				cpu_to_le32(offs->cntdwn_counter_offs[1]);
2051 		cmd->csa_event_bitmap = cpu_to_le32(0xFFFFFFFF);
2052 		arvif->current_cntdown_counter = bcn->data[offs->cntdwn_counter_offs[0]];
2053 	}
2054 
2055 	cmd->buf_len = cpu_to_le32(bcn->len);
2056 	cmd->mbssid_ie_offset = cpu_to_le32(offs->mbssid_off);
2057 	if (ema_args) {
2058 		u32p_replace_bits(&ema_params, ema_args->bcn_cnt, WMI_EMA_BEACON_CNT);
2059 		u32p_replace_bits(&ema_params, ema_args->bcn_index, WMI_EMA_BEACON_IDX);
2060 		if (ema_args->bcn_index == 0)
2061 			u32p_replace_bits(&ema_params, 1, WMI_EMA_BEACON_FIRST);
2062 		if (ema_args->bcn_index + 1 == ema_args->bcn_cnt)
2063 			u32p_replace_bits(&ema_params, 1, WMI_EMA_BEACON_LAST);
2064 		cmd->ema_params = cpu_to_le32(ema_params);
2065 	}
2066 	cmd->feature_enable_bitmap =
2067 		cpu_to_le32(u32_encode_bits(arvif->beacon_prot,
2068 					    WMI_BEACON_PROTECTION_EN_BIT));
2069 
2070 	ptr = skb->data + sizeof(*cmd);
2071 
2072 	bcn_prb_info = ptr;
2073 	len = sizeof(*bcn_prb_info);
2074 	bcn_prb_info->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_BCN_PRB_INFO,
2075 							  len);
2076 	bcn_prb_info->caps = 0;
2077 	bcn_prb_info->erp = 0;
2078 
2079 	ptr += sizeof(*bcn_prb_info);
2080 
2081 	tlv = ptr;
2082 	tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, aligned_len);
2083 	memcpy(tlv->value, bcn->data, bcn->len);
2084 
2085 	ret = ath12k_wmi_cmd_send(wmi, skb, WMI_BCN_TMPL_CMDID);
2086 	if (ret) {
2087 		ath12k_warn(ab, "failed to send WMI_BCN_TMPL_CMDID\n");
2088 		dev_kfree_skb(skb);
2089 	}
2090 
2091 	return ret;
2092 }
2093 
ath12k_wmi_vdev_install_key(struct ath12k * ar,struct wmi_vdev_install_key_arg * arg)2094 int ath12k_wmi_vdev_install_key(struct ath12k *ar,
2095 				struct wmi_vdev_install_key_arg *arg)
2096 {
2097 	struct ath12k_wmi_pdev *wmi = ar->wmi;
2098 	struct wmi_vdev_install_key_cmd *cmd;
2099 	struct wmi_tlv *tlv;
2100 	struct sk_buff *skb;
2101 	int ret, len, key_len_aligned;
2102 
2103 	/* WMI_TAG_ARRAY_BYTE needs to be aligned with 4, the actual key
2104 	 * length is specified in cmd->key_len.
2105 	 */
2106 	key_len_aligned = roundup(arg->key_len, 4);
2107 
2108 	len = sizeof(*cmd) + TLV_HDR_SIZE + key_len_aligned;
2109 
2110 	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
2111 	if (!skb)
2112 		return -ENOMEM;
2113 
2114 	cmd = (struct wmi_vdev_install_key_cmd *)skb->data;
2115 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_INSTALL_KEY_CMD,
2116 						 sizeof(*cmd));
2117 	cmd->vdev_id = cpu_to_le32(arg->vdev_id);
2118 	ether_addr_copy(cmd->peer_macaddr.addr, arg->macaddr);
2119 	cmd->key_idx = cpu_to_le32(arg->key_idx);
2120 	cmd->key_flags = cpu_to_le32(arg->key_flags);
2121 	cmd->key_cipher = cpu_to_le32(arg->key_cipher);
2122 	cmd->key_len = cpu_to_le32(arg->key_len);
2123 	cmd->key_txmic_len = cpu_to_le32(arg->key_txmic_len);
2124 	cmd->key_rxmic_len = cpu_to_le32(arg->key_rxmic_len);
2125 
2126 	if (arg->key_rsc_counter)
2127 		cmd->key_rsc_counter = cpu_to_le64(arg->key_rsc_counter);
2128 
2129 	tlv = (struct wmi_tlv *)(skb->data + sizeof(*cmd));
2130 	tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, key_len_aligned);
2131 	memcpy(tlv->value, arg->key_data, arg->key_len);
2132 
2133 	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
2134 		   "WMI vdev install key idx %d cipher %d len %d\n",
2135 		   arg->key_idx, arg->key_cipher, arg->key_len);
2136 
2137 	ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_INSTALL_KEY_CMDID);
2138 	if (ret) {
2139 		ath12k_warn(ar->ab,
2140 			    "failed to send WMI_VDEV_INSTALL_KEY cmd\n");
2141 		dev_kfree_skb(skb);
2142 	}
2143 
2144 	return ret;
2145 }
2146 
ath12k_wmi_copy_peer_flags(struct wmi_peer_assoc_complete_cmd * cmd,struct ath12k_wmi_peer_assoc_arg * arg,bool hw_crypto_disabled)2147 static void ath12k_wmi_copy_peer_flags(struct wmi_peer_assoc_complete_cmd *cmd,
2148 				       struct ath12k_wmi_peer_assoc_arg *arg,
2149 				       bool hw_crypto_disabled)
2150 {
2151 	cmd->peer_flags = 0;
2152 	cmd->peer_flags_ext = 0;
2153 
2154 	if (arg->is_wme_set) {
2155 		if (arg->qos_flag)
2156 			cmd->peer_flags |= cpu_to_le32(WMI_PEER_QOS);
2157 		if (arg->apsd_flag)
2158 			cmd->peer_flags |= cpu_to_le32(WMI_PEER_APSD);
2159 		if (arg->ht_flag)
2160 			cmd->peer_flags |= cpu_to_le32(WMI_PEER_HT);
2161 		if (arg->bw_40)
2162 			cmd->peer_flags |= cpu_to_le32(WMI_PEER_40MHZ);
2163 		if (arg->bw_80)
2164 			cmd->peer_flags |= cpu_to_le32(WMI_PEER_80MHZ);
2165 		if (arg->bw_160)
2166 			cmd->peer_flags |= cpu_to_le32(WMI_PEER_160MHZ);
2167 		if (arg->bw_320)
2168 			cmd->peer_flags_ext |= cpu_to_le32(WMI_PEER_EXT_320MHZ);
2169 
2170 		/* Typically if STBC is enabled for VHT it should be enabled
2171 		 * for HT as well
2172 		 **/
2173 		if (arg->stbc_flag)
2174 			cmd->peer_flags |= cpu_to_le32(WMI_PEER_STBC);
2175 
2176 		/* Typically if LDPC is enabled for VHT it should be enabled
2177 		 * for HT as well
2178 		 **/
2179 		if (arg->ldpc_flag)
2180 			cmd->peer_flags |= cpu_to_le32(WMI_PEER_LDPC);
2181 
2182 		if (arg->static_mimops_flag)
2183 			cmd->peer_flags |= cpu_to_le32(WMI_PEER_STATIC_MIMOPS);
2184 		if (arg->dynamic_mimops_flag)
2185 			cmd->peer_flags |= cpu_to_le32(WMI_PEER_DYN_MIMOPS);
2186 		if (arg->spatial_mux_flag)
2187 			cmd->peer_flags |= cpu_to_le32(WMI_PEER_SPATIAL_MUX);
2188 		if (arg->vht_flag)
2189 			cmd->peer_flags |= cpu_to_le32(WMI_PEER_VHT);
2190 		if (arg->he_flag)
2191 			cmd->peer_flags |= cpu_to_le32(WMI_PEER_HE);
2192 		if (arg->twt_requester)
2193 			cmd->peer_flags |= cpu_to_le32(WMI_PEER_TWT_REQ);
2194 		if (arg->twt_responder)
2195 			cmd->peer_flags |= cpu_to_le32(WMI_PEER_TWT_RESP);
2196 		if (arg->eht_flag)
2197 			cmd->peer_flags_ext |= cpu_to_le32(WMI_PEER_EXT_EHT);
2198 	}
2199 
2200 	/* Suppress authorization for all AUTH modes that need 4-way handshake
2201 	 * (during re-association).
2202 	 * Authorization will be done for these modes on key installation.
2203 	 */
2204 	if (arg->auth_flag)
2205 		cmd->peer_flags |= cpu_to_le32(WMI_PEER_AUTH);
2206 	if (arg->need_ptk_4_way) {
2207 		cmd->peer_flags |= cpu_to_le32(WMI_PEER_NEED_PTK_4_WAY);
2208 		if (!hw_crypto_disabled && arg->is_assoc)
2209 			cmd->peer_flags &= cpu_to_le32(~WMI_PEER_AUTH);
2210 	}
2211 	if (arg->need_gtk_2_way)
2212 		cmd->peer_flags |= cpu_to_le32(WMI_PEER_NEED_GTK_2_WAY);
2213 	/* safe mode bypass the 4-way handshake */
2214 	if (arg->safe_mode_enabled)
2215 		cmd->peer_flags &= cpu_to_le32(~(WMI_PEER_NEED_PTK_4_WAY |
2216 						 WMI_PEER_NEED_GTK_2_WAY));
2217 
2218 	if (arg->is_pmf_enabled)
2219 		cmd->peer_flags |= cpu_to_le32(WMI_PEER_PMF);
2220 
2221 	/* Disable AMSDU for station transmit, if user configures it */
2222 	/* Disable AMSDU for AP transmit to 11n Stations, if user configures
2223 	 * it
2224 	 * if (arg->amsdu_disable) Add after FW support
2225 	 **/
2226 
2227 	/* Target asserts if node is marked HT and all MCS is set to 0.
2228 	 * Mark the node as non-HT if all the mcs rates are disabled through
2229 	 * iwpriv
2230 	 **/
2231 	if (arg->peer_ht_rates.num_rates == 0)
2232 		cmd->peer_flags &= cpu_to_le32(~WMI_PEER_HT);
2233 }
2234 
ath12k_wmi_send_peer_assoc_cmd(struct ath12k * ar,struct ath12k_wmi_peer_assoc_arg * arg)2235 int ath12k_wmi_send_peer_assoc_cmd(struct ath12k *ar,
2236 				   struct ath12k_wmi_peer_assoc_arg *arg)
2237 {
2238 	struct ath12k_wmi_pdev *wmi = ar->wmi;
2239 	struct wmi_peer_assoc_complete_cmd *cmd;
2240 	struct ath12k_wmi_vht_rate_set_params *mcs;
2241 	struct ath12k_wmi_he_rate_set_params *he_mcs;
2242 	struct ath12k_wmi_eht_rate_set_params *eht_mcs;
2243 	struct wmi_peer_assoc_mlo_params *ml_params;
2244 	struct wmi_peer_assoc_mlo_partner_info_params *partner_info;
2245 	struct sk_buff *skb;
2246 	struct wmi_tlv *tlv;
2247 	void *ptr;
2248 	u32 peer_legacy_rates_align, eml_pad_delay, eml_trans_delay;
2249 	u32 peer_ht_rates_align, eml_trans_timeout;
2250 	int i, ret, len;
2251 	u16 eml_cap;
2252 	__le32 v;
2253 
2254 	peer_legacy_rates_align = roundup(arg->peer_legacy_rates.num_rates,
2255 					  sizeof(u32));
2256 	peer_ht_rates_align = roundup(arg->peer_ht_rates.num_rates,
2257 				      sizeof(u32));
2258 
2259 	len = sizeof(*cmd) +
2260 	      TLV_HDR_SIZE + (peer_legacy_rates_align * sizeof(u8)) +
2261 	      TLV_HDR_SIZE + (peer_ht_rates_align * sizeof(u8)) +
2262 	      sizeof(*mcs) + TLV_HDR_SIZE +
2263 	      (sizeof(*he_mcs) * arg->peer_he_mcs_count) +
2264 	      TLV_HDR_SIZE + (sizeof(*eht_mcs) * arg->peer_eht_mcs_count);
2265 
2266 	if (arg->ml.enabled)
2267 		len += TLV_HDR_SIZE + sizeof(*ml_params) +
2268 		       TLV_HDR_SIZE + (arg->ml.num_partner_links * sizeof(*partner_info));
2269 	else
2270 		len += (2 * TLV_HDR_SIZE);
2271 
2272 	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
2273 	if (!skb)
2274 		return -ENOMEM;
2275 
2276 	ptr = skb->data;
2277 
2278 	cmd = ptr;
2279 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PEER_ASSOC_COMPLETE_CMD,
2280 						 sizeof(*cmd));
2281 
2282 	cmd->vdev_id = cpu_to_le32(arg->vdev_id);
2283 
2284 	cmd->peer_new_assoc = cpu_to_le32(arg->peer_new_assoc);
2285 	cmd->peer_associd = cpu_to_le32(arg->peer_associd);
2286 	cmd->punct_bitmap = cpu_to_le32(arg->punct_bitmap);
2287 
2288 	ath12k_wmi_copy_peer_flags(cmd, arg,
2289 				   test_bit(ATH12K_FLAG_HW_CRYPTO_DISABLED,
2290 					    &ar->ab->dev_flags));
2291 
2292 	ether_addr_copy(cmd->peer_macaddr.addr, arg->peer_mac);
2293 
2294 	cmd->peer_rate_caps = cpu_to_le32(arg->peer_rate_caps);
2295 	cmd->peer_caps = cpu_to_le32(arg->peer_caps);
2296 	cmd->peer_listen_intval = cpu_to_le32(arg->peer_listen_intval);
2297 	cmd->peer_ht_caps = cpu_to_le32(arg->peer_ht_caps);
2298 	cmd->peer_max_mpdu = cpu_to_le32(arg->peer_max_mpdu);
2299 	cmd->peer_mpdu_density = cpu_to_le32(arg->peer_mpdu_density);
2300 	cmd->peer_vht_caps = cpu_to_le32(arg->peer_vht_caps);
2301 	cmd->peer_phymode = cpu_to_le32(arg->peer_phymode);
2302 
2303 	/* Update 11ax capabilities */
2304 	cmd->peer_he_cap_info = cpu_to_le32(arg->peer_he_cap_macinfo[0]);
2305 	cmd->peer_he_cap_info_ext = cpu_to_le32(arg->peer_he_cap_macinfo[1]);
2306 	cmd->peer_he_cap_info_internal = cpu_to_le32(arg->peer_he_cap_macinfo_internal);
2307 	cmd->peer_he_caps_6ghz = cpu_to_le32(arg->peer_he_caps_6ghz);
2308 	cmd->peer_he_ops = cpu_to_le32(arg->peer_he_ops);
2309 	for (i = 0; i < WMI_MAX_HECAP_PHY_SIZE; i++)
2310 		cmd->peer_he_cap_phy[i] =
2311 			cpu_to_le32(arg->peer_he_cap_phyinfo[i]);
2312 	cmd->peer_ppet.numss_m1 = cpu_to_le32(arg->peer_ppet.numss_m1);
2313 	cmd->peer_ppet.ru_info = cpu_to_le32(arg->peer_ppet.ru_bit_mask);
2314 	for (i = 0; i < WMI_MAX_NUM_SS; i++)
2315 		cmd->peer_ppet.ppet16_ppet8_ru3_ru0[i] =
2316 			cpu_to_le32(arg->peer_ppet.ppet16_ppet8_ru3_ru0[i]);
2317 
2318 	/* Update 11be capabilities */
2319 	memcpy_and_pad(cmd->peer_eht_cap_mac, sizeof(cmd->peer_eht_cap_mac),
2320 		       arg->peer_eht_cap_mac, sizeof(arg->peer_eht_cap_mac),
2321 		       0);
2322 	memcpy_and_pad(cmd->peer_eht_cap_phy, sizeof(cmd->peer_eht_cap_phy),
2323 		       arg->peer_eht_cap_phy, sizeof(arg->peer_eht_cap_phy),
2324 		       0);
2325 	memcpy_and_pad(&cmd->peer_eht_ppet, sizeof(cmd->peer_eht_ppet),
2326 		       &arg->peer_eht_ppet, sizeof(arg->peer_eht_ppet), 0);
2327 
2328 	/* Update peer legacy rate information */
2329 	ptr += sizeof(*cmd);
2330 
2331 	tlv = ptr;
2332 	tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, peer_legacy_rates_align);
2333 
2334 	ptr += TLV_HDR_SIZE;
2335 
2336 	cmd->num_peer_legacy_rates = cpu_to_le32(arg->peer_legacy_rates.num_rates);
2337 	memcpy(ptr, arg->peer_legacy_rates.rates,
2338 	       arg->peer_legacy_rates.num_rates);
2339 
2340 	/* Update peer HT rate information */
2341 	ptr += peer_legacy_rates_align;
2342 
2343 	tlv = ptr;
2344 	tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, peer_ht_rates_align);
2345 	ptr += TLV_HDR_SIZE;
2346 	cmd->num_peer_ht_rates = cpu_to_le32(arg->peer_ht_rates.num_rates);
2347 	memcpy(ptr, arg->peer_ht_rates.rates,
2348 	       arg->peer_ht_rates.num_rates);
2349 
2350 	/* VHT Rates */
2351 	ptr += peer_ht_rates_align;
2352 
2353 	mcs = ptr;
2354 
2355 	mcs->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VHT_RATE_SET,
2356 						 sizeof(*mcs));
2357 
2358 	cmd->peer_nss = cpu_to_le32(arg->peer_nss);
2359 
2360 	/* Update bandwidth-NSS mapping */
2361 	cmd->peer_bw_rxnss_override = 0;
2362 	cmd->peer_bw_rxnss_override |= cpu_to_le32(arg->peer_bw_rxnss_override);
2363 
2364 	if (arg->vht_capable) {
2365 		mcs->rx_max_rate = cpu_to_le32(arg->rx_max_rate);
2366 		mcs->rx_mcs_set = cpu_to_le32(arg->rx_mcs_set);
2367 		mcs->tx_max_rate = cpu_to_le32(arg->tx_max_rate);
2368 		mcs->tx_mcs_set = cpu_to_le32(arg->tx_mcs_set);
2369 	}
2370 
2371 	/* HE Rates */
2372 	cmd->peer_he_mcs = cpu_to_le32(arg->peer_he_mcs_count);
2373 	cmd->min_data_rate = cpu_to_le32(arg->min_data_rate);
2374 
2375 	ptr += sizeof(*mcs);
2376 
2377 	len = arg->peer_he_mcs_count * sizeof(*he_mcs);
2378 
2379 	tlv = ptr;
2380 	tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len);
2381 	ptr += TLV_HDR_SIZE;
2382 
2383 	/* Loop through the HE rate set */
2384 	for (i = 0; i < arg->peer_he_mcs_count; i++) {
2385 		he_mcs = ptr;
2386 		he_mcs->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_HE_RATE_SET,
2387 							    sizeof(*he_mcs));
2388 
2389 		he_mcs->rx_mcs_set = cpu_to_le32(arg->peer_he_rx_mcs_set[i]);
2390 		he_mcs->tx_mcs_set = cpu_to_le32(arg->peer_he_tx_mcs_set[i]);
2391 		ptr += sizeof(*he_mcs);
2392 	}
2393 
2394 	tlv = ptr;
2395 	len = arg->ml.enabled ? sizeof(*ml_params) : 0;
2396 	tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len);
2397 	ptr += TLV_HDR_SIZE;
2398 	if (!len)
2399 		goto skip_ml_params;
2400 
2401 	ml_params = ptr;
2402 	ml_params->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_MLO_PEER_ASSOC_PARAMS,
2403 						       len);
2404 	ml_params->flags = cpu_to_le32(ATH12K_WMI_FLAG_MLO_ENABLED);
2405 
2406 	if (arg->ml.assoc_link)
2407 		ml_params->flags |= cpu_to_le32(ATH12K_WMI_FLAG_MLO_ASSOC_LINK);
2408 
2409 	if (arg->ml.primary_umac)
2410 		ml_params->flags |= cpu_to_le32(ATH12K_WMI_FLAG_MLO_PRIMARY_UMAC);
2411 
2412 	if (arg->ml.logical_link_idx_valid)
2413 		ml_params->flags |=
2414 			cpu_to_le32(ATH12K_WMI_FLAG_MLO_LOGICAL_LINK_IDX_VALID);
2415 
2416 	if (arg->ml.peer_id_valid)
2417 		ml_params->flags |= cpu_to_le32(ATH12K_WMI_FLAG_MLO_PEER_ID_VALID);
2418 
2419 	ether_addr_copy(ml_params->mld_addr.addr, arg->ml.mld_addr);
2420 	ml_params->logical_link_idx = cpu_to_le32(arg->ml.logical_link_idx);
2421 	ml_params->ml_peer_id = cpu_to_le32(arg->ml.ml_peer_id);
2422 	ml_params->ieee_link_id = cpu_to_le32(arg->ml.ieee_link_id);
2423 
2424 	eml_cap = arg->ml.eml_cap;
2425 	if (u16_get_bits(eml_cap, IEEE80211_EML_CAP_EMLSR_SUPP)) {
2426 		ml_params->flags |= cpu_to_le32(ATH12K_WMI_FLAG_MLO_EMLSR_SUPPORT);
2427 		/* Padding delay */
2428 		eml_pad_delay = ieee80211_emlsr_pad_delay_in_us(eml_cap);
2429 		ml_params->emlsr_padding_delay_us = cpu_to_le32(eml_pad_delay);
2430 		/* Transition delay */
2431 		eml_trans_delay = ieee80211_emlsr_trans_delay_in_us(eml_cap);
2432 		ml_params->emlsr_trans_delay_us = cpu_to_le32(eml_trans_delay);
2433 		/* Transition timeout */
2434 		eml_trans_timeout = ieee80211_eml_trans_timeout_in_us(eml_cap);
2435 		ml_params->emlsr_trans_timeout_us =
2436 					cpu_to_le32(eml_trans_timeout);
2437 		ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "wmi peer %pM emlsr padding delay %u, trans delay %u trans timeout %u",
2438 			   arg->peer_mac, eml_pad_delay, eml_trans_delay,
2439 			   eml_trans_timeout);
2440 	}
2441 
2442 	ptr += sizeof(*ml_params);
2443 
2444 skip_ml_params:
2445 	/* Loop through the EHT rate set */
2446 	len = arg->peer_eht_mcs_count * sizeof(*eht_mcs);
2447 	tlv = ptr;
2448 	tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len);
2449 	ptr += TLV_HDR_SIZE;
2450 
2451 	for (i = 0; i < arg->peer_eht_mcs_count; i++) {
2452 		eht_mcs = ptr;
2453 		eht_mcs->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_EHT_RATE_SET,
2454 							     sizeof(*eht_mcs));
2455 
2456 		eht_mcs->rx_mcs_set = cpu_to_le32(arg->peer_eht_rx_mcs_set[i]);
2457 		eht_mcs->tx_mcs_set = cpu_to_le32(arg->peer_eht_tx_mcs_set[i]);
2458 		ptr += sizeof(*eht_mcs);
2459 	}
2460 
2461 	/* Update MCS15 capability */
2462 	if (arg->eht_disable_mcs15)
2463 		cmd->peer_eht_ops = cpu_to_le32(IEEE80211_EHT_OPER_MCS15_DISABLE);
2464 
2465 	tlv = ptr;
2466 	len = arg->ml.enabled ? arg->ml.num_partner_links * sizeof(*partner_info) : 0;
2467 	/* fill ML Partner links */
2468 	tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len);
2469 	ptr += TLV_HDR_SIZE;
2470 
2471 	if (len == 0)
2472 		goto send;
2473 
2474 	for (i = 0; i < arg->ml.num_partner_links; i++) {
2475 		u32 cmd = WMI_TAG_MLO_PARTNER_LINK_PARAMS_PEER_ASSOC;
2476 
2477 		partner_info = ptr;
2478 		partner_info->tlv_header = ath12k_wmi_tlv_cmd_hdr(cmd,
2479 								  sizeof(*partner_info));
2480 		partner_info->vdev_id = cpu_to_le32(arg->ml.partner_info[i].vdev_id);
2481 		partner_info->hw_link_id =
2482 			cpu_to_le32(arg->ml.partner_info[i].hw_link_id);
2483 		partner_info->flags = cpu_to_le32(ATH12K_WMI_FLAG_MLO_ENABLED);
2484 
2485 		if (arg->ml.partner_info[i].assoc_link)
2486 			partner_info->flags |=
2487 				cpu_to_le32(ATH12K_WMI_FLAG_MLO_ASSOC_LINK);
2488 
2489 		if (arg->ml.partner_info[i].primary_umac)
2490 			partner_info->flags |=
2491 				cpu_to_le32(ATH12K_WMI_FLAG_MLO_PRIMARY_UMAC);
2492 
2493 		if (arg->ml.partner_info[i].logical_link_idx_valid) {
2494 			v = cpu_to_le32(ATH12K_WMI_FLAG_MLO_LINK_ID_VALID);
2495 			partner_info->flags |= v;
2496 		}
2497 
2498 		partner_info->logical_link_idx =
2499 			cpu_to_le32(arg->ml.partner_info[i].logical_link_idx);
2500 		ptr += sizeof(*partner_info);
2501 	}
2502 
2503 send:
2504 	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
2505 		   "wmi peer assoc vdev id %d assoc id %d peer mac %pM peer_flags %x rate_caps %x peer_caps %x listen_intval %d ht_caps %x max_mpdu %d nss %d phymode %d peer_mpdu_density %d vht_caps %x he cap_info %x he ops %x he cap_info_ext %x he phy %x %x %x peer_bw_rxnss_override %x peer_flags_ext %x eht mac_cap %x %x eht phy_cap %x %x %x peer_eht_ops %x\n",
2506 		   cmd->vdev_id, cmd->peer_associd, arg->peer_mac,
2507 		   cmd->peer_flags, cmd->peer_rate_caps, cmd->peer_caps,
2508 		   cmd->peer_listen_intval, cmd->peer_ht_caps,
2509 		   cmd->peer_max_mpdu, cmd->peer_nss, cmd->peer_phymode,
2510 		   cmd->peer_mpdu_density,
2511 		   cmd->peer_vht_caps, cmd->peer_he_cap_info,
2512 		   cmd->peer_he_ops, cmd->peer_he_cap_info_ext,
2513 		   cmd->peer_he_cap_phy[0], cmd->peer_he_cap_phy[1],
2514 		   cmd->peer_he_cap_phy[2],
2515 		   cmd->peer_bw_rxnss_override, cmd->peer_flags_ext,
2516 		   cmd->peer_eht_cap_mac[0], cmd->peer_eht_cap_mac[1],
2517 		   cmd->peer_eht_cap_phy[0], cmd->peer_eht_cap_phy[1],
2518 		   cmd->peer_eht_cap_phy[2], cmd->peer_eht_ops);
2519 
2520 	ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PEER_ASSOC_CMDID);
2521 	if (ret) {
2522 		ath12k_warn(ar->ab,
2523 			    "failed to send WMI_PEER_ASSOC_CMDID\n");
2524 		dev_kfree_skb(skb);
2525 	}
2526 
2527 	return ret;
2528 }
2529 
ath12k_wmi_start_scan_init(struct ath12k * ar,struct ath12k_wmi_scan_req_arg * arg)2530 void ath12k_wmi_start_scan_init(struct ath12k *ar,
2531 				struct ath12k_wmi_scan_req_arg *arg)
2532 {
2533 	/* setup commonly used values */
2534 	arg->scan_req_id = 1;
2535 	arg->scan_priority = WMI_SCAN_PRIORITY_LOW;
2536 	arg->dwell_time_active = 50;
2537 	arg->dwell_time_active_2g = 0;
2538 	arg->dwell_time_passive = 150;
2539 	arg->dwell_time_active_6g = 70;
2540 	arg->dwell_time_passive_6g = 70;
2541 	arg->min_rest_time = 50;
2542 	arg->max_rest_time = 500;
2543 	arg->repeat_probe_time = 0;
2544 	arg->probe_spacing_time = 0;
2545 	arg->idle_time = 0;
2546 	arg->max_scan_time = 20000;
2547 	arg->probe_delay = 5;
2548 	arg->notify_scan_events = WMI_SCAN_EVENT_STARTED |
2549 				  WMI_SCAN_EVENT_COMPLETED |
2550 				  WMI_SCAN_EVENT_BSS_CHANNEL |
2551 				  WMI_SCAN_EVENT_FOREIGN_CHAN |
2552 				  WMI_SCAN_EVENT_DEQUEUED;
2553 	arg->scan_f_chan_stat_evnt = 1;
2554 	arg->num_bssid = 1;
2555 
2556 	/* fill bssid_list[0] with 0xff, otherwise bssid and RA will be
2557 	 * ZEROs in probe request
2558 	 */
2559 	eth_broadcast_addr(arg->bssid_list[0].addr);
2560 }
2561 
ath12k_wmi_copy_scan_event_cntrl_flags(struct wmi_start_scan_cmd * cmd,struct ath12k_wmi_scan_req_arg * arg)2562 static void ath12k_wmi_copy_scan_event_cntrl_flags(struct wmi_start_scan_cmd *cmd,
2563 						   struct ath12k_wmi_scan_req_arg *arg)
2564 {
2565 	/* Scan events subscription */
2566 	if (arg->scan_ev_started)
2567 		cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_STARTED);
2568 	if (arg->scan_ev_completed)
2569 		cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_COMPLETED);
2570 	if (arg->scan_ev_bss_chan)
2571 		cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_BSS_CHANNEL);
2572 	if (arg->scan_ev_foreign_chan)
2573 		cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_FOREIGN_CHAN);
2574 	if (arg->scan_ev_dequeued)
2575 		cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_DEQUEUED);
2576 	if (arg->scan_ev_preempted)
2577 		cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_PREEMPTED);
2578 	if (arg->scan_ev_start_failed)
2579 		cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_START_FAILED);
2580 	if (arg->scan_ev_restarted)
2581 		cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_RESTARTED);
2582 	if (arg->scan_ev_foreign_chn_exit)
2583 		cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_FOREIGN_CHAN_EXIT);
2584 	if (arg->scan_ev_suspended)
2585 		cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_SUSPENDED);
2586 	if (arg->scan_ev_resumed)
2587 		cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_RESUMED);
2588 
2589 	/** Set scan control flags */
2590 	cmd->scan_ctrl_flags = 0;
2591 	if (arg->scan_f_passive)
2592 		cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FLAG_PASSIVE);
2593 	if (arg->scan_f_strict_passive_pch)
2594 		cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FLAG_STRICT_PASSIVE_ON_PCHN);
2595 	if (arg->scan_f_promisc_mode)
2596 		cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FILTER_PROMISCUOS);
2597 	if (arg->scan_f_capture_phy_err)
2598 		cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_CAPTURE_PHY_ERROR);
2599 	if (arg->scan_f_half_rate)
2600 		cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FLAG_HALF_RATE_SUPPORT);
2601 	if (arg->scan_f_quarter_rate)
2602 		cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FLAG_QUARTER_RATE_SUPPORT);
2603 	if (arg->scan_f_cck_rates)
2604 		cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_ADD_CCK_RATES);
2605 	if (arg->scan_f_ofdm_rates)
2606 		cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_ADD_OFDM_RATES);
2607 	if (arg->scan_f_chan_stat_evnt)
2608 		cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_CHAN_STAT_EVENT);
2609 	if (arg->scan_f_filter_prb_req)
2610 		cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FILTER_PROBE_REQ);
2611 	if (arg->scan_f_bcast_probe)
2612 		cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_ADD_BCAST_PROBE_REQ);
2613 	if (arg->scan_f_offchan_mgmt_tx)
2614 		cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_OFFCHAN_MGMT_TX);
2615 	if (arg->scan_f_offchan_data_tx)
2616 		cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_OFFCHAN_DATA_TX);
2617 	if (arg->scan_f_force_active_dfs_chn)
2618 		cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FLAG_FORCE_ACTIVE_ON_DFS);
2619 	if (arg->scan_f_add_tpc_ie_in_probe)
2620 		cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_ADD_TPC_IE_IN_PROBE_REQ);
2621 	if (arg->scan_f_add_ds_ie_in_probe)
2622 		cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_ADD_DS_IE_IN_PROBE_REQ);
2623 	if (arg->scan_f_add_spoofed_mac_in_probe)
2624 		cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_ADD_SPOOF_MAC_IN_PROBE_REQ);
2625 	if (arg->scan_f_add_rand_seq_in_probe)
2626 		cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_RANDOM_SEQ_NO_IN_PROBE_REQ);
2627 	if (arg->scan_f_en_ie_whitelist_in_probe)
2628 		cmd->scan_ctrl_flags |=
2629 			cpu_to_le32(WMI_SCAN_ENABLE_IE_WHTELIST_IN_PROBE_REQ);
2630 
2631 	cmd->scan_ctrl_flags |= le32_encode_bits(arg->adaptive_dwell_time_mode,
2632 						 WMI_SCAN_DWELL_MODE_MASK);
2633 }
2634 
ath12k_wmi_send_scan_start_cmd(struct ath12k * ar,struct ath12k_wmi_scan_req_arg * arg)2635 int ath12k_wmi_send_scan_start_cmd(struct ath12k *ar,
2636 				   struct ath12k_wmi_scan_req_arg *arg)
2637 {
2638 	struct ath12k_wmi_pdev *wmi = ar->wmi;
2639 	struct wmi_start_scan_cmd *cmd;
2640 	struct ath12k_wmi_ssid_params *ssid = NULL;
2641 	struct ath12k_wmi_mac_addr_params *bssid;
2642 	struct sk_buff *skb;
2643 	struct wmi_tlv *tlv;
2644 	void *ptr;
2645 	int i, ret, len;
2646 	u32 *tmp_ptr, extraie_len_with_pad = 0;
2647 	struct ath12k_wmi_hint_short_ssid_arg *s_ssid = NULL;
2648 	struct ath12k_wmi_hint_bssid_arg *hint_bssid = NULL;
2649 
2650 	len = sizeof(*cmd);
2651 
2652 	len += TLV_HDR_SIZE;
2653 	if (arg->num_chan)
2654 		len += arg->num_chan * sizeof(u32);
2655 
2656 	len += TLV_HDR_SIZE;
2657 	if (arg->num_ssids)
2658 		len += arg->num_ssids * sizeof(*ssid);
2659 
2660 	len += TLV_HDR_SIZE;
2661 	if (arg->num_bssid)
2662 		len += sizeof(*bssid) * arg->num_bssid;
2663 
2664 	if (arg->num_hint_bssid)
2665 		len += TLV_HDR_SIZE +
2666 		       arg->num_hint_bssid * sizeof(*hint_bssid);
2667 
2668 	if (arg->num_hint_s_ssid)
2669 		len += TLV_HDR_SIZE +
2670 		       arg->num_hint_s_ssid * sizeof(*s_ssid);
2671 
2672 	len += TLV_HDR_SIZE;
2673 	if (arg->extraie.len)
2674 		extraie_len_with_pad =
2675 			roundup(arg->extraie.len, sizeof(u32));
2676 	if (extraie_len_with_pad <= (wmi->wmi_ab->max_msg_len[ar->pdev_idx] - len)) {
2677 		len += extraie_len_with_pad;
2678 	} else {
2679 		ath12k_warn(ar->ab, "discard large size %d bytes extraie for scan start\n",
2680 			    arg->extraie.len);
2681 		extraie_len_with_pad = 0;
2682 	}
2683 
2684 	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
2685 	if (!skb)
2686 		return -ENOMEM;
2687 
2688 	ptr = skb->data;
2689 
2690 	cmd = ptr;
2691 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_START_SCAN_CMD,
2692 						 sizeof(*cmd));
2693 
2694 	cmd->scan_id = cpu_to_le32(arg->scan_id);
2695 	cmd->scan_req_id = cpu_to_le32(arg->scan_req_id);
2696 	cmd->vdev_id = cpu_to_le32(arg->vdev_id);
2697 	if (ar->state_11d == ATH12K_11D_PREPARING)
2698 		arg->scan_priority = WMI_SCAN_PRIORITY_MEDIUM;
2699 	else
2700 		arg->scan_priority = WMI_SCAN_PRIORITY_LOW;
2701 	cmd->notify_scan_events = cpu_to_le32(arg->notify_scan_events);
2702 
2703 	ath12k_wmi_copy_scan_event_cntrl_flags(cmd, arg);
2704 
2705 	cmd->dwell_time_active = cpu_to_le32(arg->dwell_time_active);
2706 	cmd->dwell_time_active_2g = cpu_to_le32(arg->dwell_time_active_2g);
2707 	cmd->dwell_time_passive = cpu_to_le32(arg->dwell_time_passive);
2708 	cmd->dwell_time_active_6g = cpu_to_le32(arg->dwell_time_active_6g);
2709 	cmd->dwell_time_passive_6g = cpu_to_le32(arg->dwell_time_passive_6g);
2710 	cmd->min_rest_time = cpu_to_le32(arg->min_rest_time);
2711 	cmd->max_rest_time = cpu_to_le32(arg->max_rest_time);
2712 	cmd->repeat_probe_time = cpu_to_le32(arg->repeat_probe_time);
2713 	cmd->probe_spacing_time = cpu_to_le32(arg->probe_spacing_time);
2714 	cmd->idle_time = cpu_to_le32(arg->idle_time);
2715 	cmd->max_scan_time = cpu_to_le32(arg->max_scan_time);
2716 	cmd->probe_delay = cpu_to_le32(arg->probe_delay);
2717 	cmd->burst_duration = cpu_to_le32(arg->burst_duration);
2718 	cmd->num_chan = cpu_to_le32(arg->num_chan);
2719 	cmd->num_bssid = cpu_to_le32(arg->num_bssid);
2720 	cmd->num_ssids = cpu_to_le32(arg->num_ssids);
2721 	cmd->ie_len = cpu_to_le32(arg->extraie.len);
2722 	cmd->n_probes = cpu_to_le32(arg->n_probes);
2723 
2724 	ptr += sizeof(*cmd);
2725 
2726 	len = arg->num_chan * sizeof(u32);
2727 
2728 	tlv = ptr;
2729 	tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, len);
2730 	ptr += TLV_HDR_SIZE;
2731 	tmp_ptr = (u32 *)ptr;
2732 
2733 	memcpy(tmp_ptr, arg->chan_list, arg->num_chan * 4);
2734 
2735 	ptr += len;
2736 
2737 	len = arg->num_ssids * sizeof(*ssid);
2738 	tlv = ptr;
2739 	tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_FIXED_STRUCT, len);
2740 
2741 	ptr += TLV_HDR_SIZE;
2742 
2743 	if (arg->num_ssids) {
2744 		ssid = ptr;
2745 		for (i = 0; i < arg->num_ssids; ++i) {
2746 			ssid->ssid_len = cpu_to_le32(arg->ssid[i].ssid_len);
2747 			memcpy(ssid->ssid, arg->ssid[i].ssid,
2748 			       arg->ssid[i].ssid_len);
2749 			ssid++;
2750 		}
2751 	}
2752 
2753 	ptr += (arg->num_ssids * sizeof(*ssid));
2754 	len = arg->num_bssid * sizeof(*bssid);
2755 	tlv = ptr;
2756 	tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_FIXED_STRUCT, len);
2757 
2758 	ptr += TLV_HDR_SIZE;
2759 	bssid = ptr;
2760 
2761 	if (arg->num_bssid) {
2762 		for (i = 0; i < arg->num_bssid; ++i) {
2763 			ether_addr_copy(bssid->addr,
2764 					arg->bssid_list[i].addr);
2765 			bssid++;
2766 		}
2767 	}
2768 
2769 	ptr += arg->num_bssid * sizeof(*bssid);
2770 
2771 	len = extraie_len_with_pad;
2772 	tlv = ptr;
2773 	tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, len);
2774 	ptr += TLV_HDR_SIZE;
2775 
2776 	if (extraie_len_with_pad)
2777 		memcpy(ptr, arg->extraie.ptr,
2778 		       arg->extraie.len);
2779 
2780 	ptr += extraie_len_with_pad;
2781 
2782 	if (arg->num_hint_s_ssid) {
2783 		len = arg->num_hint_s_ssid * sizeof(*s_ssid);
2784 		tlv = ptr;
2785 		tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_FIXED_STRUCT, len);
2786 		ptr += TLV_HDR_SIZE;
2787 		s_ssid = ptr;
2788 		for (i = 0; i < arg->num_hint_s_ssid; ++i) {
2789 			s_ssid->freq_flags = arg->hint_s_ssid[i].freq_flags;
2790 			s_ssid->short_ssid = arg->hint_s_ssid[i].short_ssid;
2791 			s_ssid++;
2792 		}
2793 		ptr += len;
2794 	}
2795 
2796 	if (arg->num_hint_bssid) {
2797 		len = arg->num_hint_bssid * sizeof(struct ath12k_wmi_hint_bssid_arg);
2798 		tlv = ptr;
2799 		tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_FIXED_STRUCT, len);
2800 		ptr += TLV_HDR_SIZE;
2801 		hint_bssid = ptr;
2802 		for (i = 0; i < arg->num_hint_bssid; ++i) {
2803 			hint_bssid->freq_flags =
2804 				arg->hint_bssid[i].freq_flags;
2805 			ether_addr_copy(&arg->hint_bssid[i].bssid.addr[0],
2806 					&hint_bssid->bssid.addr[0]);
2807 			hint_bssid++;
2808 		}
2809 	}
2810 
2811 	ret = ath12k_wmi_cmd_send(wmi, skb,
2812 				  WMI_START_SCAN_CMDID);
2813 	if (ret) {
2814 		ath12k_warn(ar->ab, "failed to send WMI_START_SCAN_CMDID\n");
2815 		dev_kfree_skb(skb);
2816 	}
2817 
2818 	return ret;
2819 }
2820 
ath12k_wmi_send_scan_stop_cmd(struct ath12k * ar,struct ath12k_wmi_scan_cancel_arg * arg)2821 int ath12k_wmi_send_scan_stop_cmd(struct ath12k *ar,
2822 				  struct ath12k_wmi_scan_cancel_arg *arg)
2823 {
2824 	struct ath12k_wmi_pdev *wmi = ar->wmi;
2825 	struct wmi_stop_scan_cmd *cmd;
2826 	struct sk_buff *skb;
2827 	int ret;
2828 
2829 	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
2830 	if (!skb)
2831 		return -ENOMEM;
2832 
2833 	cmd = (struct wmi_stop_scan_cmd *)skb->data;
2834 
2835 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_STOP_SCAN_CMD,
2836 						 sizeof(*cmd));
2837 
2838 	cmd->vdev_id = cpu_to_le32(arg->vdev_id);
2839 	cmd->requestor = cpu_to_le32(arg->requester);
2840 	cmd->scan_id = cpu_to_le32(arg->scan_id);
2841 	cmd->pdev_id = cpu_to_le32(arg->pdev_id);
2842 	/* stop the scan with the corresponding scan_id */
2843 	if (arg->req_type == WLAN_SCAN_CANCEL_PDEV_ALL) {
2844 		/* Cancelling all scans */
2845 		cmd->req_type = cpu_to_le32(WMI_SCAN_STOP_ALL);
2846 	} else if (arg->req_type == WLAN_SCAN_CANCEL_VDEV_ALL) {
2847 		/* Cancelling VAP scans */
2848 		cmd->req_type = cpu_to_le32(WMI_SCAN_STOP_VAP_ALL);
2849 	} else if (arg->req_type == WLAN_SCAN_CANCEL_SINGLE) {
2850 		/* Cancelling specific scan */
2851 		cmd->req_type = WMI_SCAN_STOP_ONE;
2852 	} else {
2853 		ath12k_warn(ar->ab, "invalid scan cancel req_type %d",
2854 			    arg->req_type);
2855 		dev_kfree_skb(skb);
2856 		return -EINVAL;
2857 	}
2858 
2859 	ret = ath12k_wmi_cmd_send(wmi, skb,
2860 				  WMI_STOP_SCAN_CMDID);
2861 	if (ret) {
2862 		ath12k_warn(ar->ab, "failed to send WMI_STOP_SCAN_CMDID\n");
2863 		dev_kfree_skb(skb);
2864 	}
2865 
2866 	return ret;
2867 }
2868 
ath12k_wmi_send_scan_chan_list_cmd(struct ath12k * ar,struct ath12k_wmi_scan_chan_list_arg * arg)2869 int ath12k_wmi_send_scan_chan_list_cmd(struct ath12k *ar,
2870 				       struct ath12k_wmi_scan_chan_list_arg *arg)
2871 {
2872 	struct ath12k_wmi_pdev *wmi = ar->wmi;
2873 	struct wmi_scan_chan_list_cmd *cmd;
2874 	struct sk_buff *skb;
2875 	struct ath12k_wmi_channel_params *chan_info;
2876 	struct ath12k_wmi_channel_arg *channel_arg;
2877 	struct wmi_tlv *tlv;
2878 	void *ptr;
2879 	int i, ret, len;
2880 	u16 num_send_chans, num_sends = 0, max_chan_limit = 0;
2881 	__le32 *reg1, *reg2;
2882 
2883 	channel_arg = &arg->channel[0];
2884 	while (arg->nallchans) {
2885 		len = sizeof(*cmd) + TLV_HDR_SIZE;
2886 		max_chan_limit = (wmi->wmi_ab->max_msg_len[ar->pdev_idx] - len) /
2887 			sizeof(*chan_info);
2888 
2889 		num_send_chans = min(arg->nallchans, max_chan_limit);
2890 
2891 		arg->nallchans -= num_send_chans;
2892 		len += sizeof(*chan_info) * num_send_chans;
2893 
2894 		skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
2895 		if (!skb)
2896 			return -ENOMEM;
2897 
2898 		cmd = (struct wmi_scan_chan_list_cmd *)skb->data;
2899 		cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_SCAN_CHAN_LIST_CMD,
2900 							 sizeof(*cmd));
2901 		cmd->pdev_id = cpu_to_le32(arg->pdev_id);
2902 		cmd->num_scan_chans = cpu_to_le32(num_send_chans);
2903 		if (num_sends)
2904 			cmd->flags |= cpu_to_le32(WMI_APPEND_TO_EXISTING_CHAN_LIST_FLAG);
2905 
2906 		ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
2907 			   "WMI no.of chan = %d len = %d pdev_id = %d num_sends = %d\n",
2908 			   num_send_chans, len, cmd->pdev_id, num_sends);
2909 
2910 		ptr = skb->data + sizeof(*cmd);
2911 
2912 		len = sizeof(*chan_info) * num_send_chans;
2913 		tlv = ptr;
2914 		tlv->header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ARRAY_STRUCT,
2915 						     len);
2916 		ptr += TLV_HDR_SIZE;
2917 
2918 		for (i = 0; i < num_send_chans; ++i) {
2919 			chan_info = ptr;
2920 			memset(chan_info, 0, sizeof(*chan_info));
2921 			len = sizeof(*chan_info);
2922 			chan_info->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_CHANNEL,
2923 								       len);
2924 
2925 			reg1 = &chan_info->reg_info_1;
2926 			reg2 = &chan_info->reg_info_2;
2927 			chan_info->mhz = cpu_to_le32(channel_arg->mhz);
2928 			chan_info->band_center_freq1 = cpu_to_le32(channel_arg->cfreq1);
2929 			chan_info->band_center_freq2 = cpu_to_le32(channel_arg->cfreq2);
2930 
2931 			if (channel_arg->is_chan_passive)
2932 				chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_PASSIVE);
2933 			if (channel_arg->allow_he)
2934 				chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_ALLOW_HE);
2935 			else if (channel_arg->allow_vht)
2936 				chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_ALLOW_VHT);
2937 			else if (channel_arg->allow_ht)
2938 				chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_ALLOW_HT);
2939 			if (channel_arg->half_rate)
2940 				chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_HALF_RATE);
2941 			if (channel_arg->quarter_rate)
2942 				chan_info->info |=
2943 					cpu_to_le32(WMI_CHAN_INFO_QUARTER_RATE);
2944 
2945 			if (channel_arg->psc_channel)
2946 				chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_PSC);
2947 
2948 			if (channel_arg->dfs_set)
2949 				chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_DFS);
2950 
2951 			chan_info->info |= le32_encode_bits(channel_arg->phy_mode,
2952 							    WMI_CHAN_INFO_MODE);
2953 			*reg1 |= le32_encode_bits(channel_arg->minpower,
2954 						  WMI_CHAN_REG_INFO1_MIN_PWR);
2955 			*reg1 |= le32_encode_bits(channel_arg->maxpower,
2956 						  WMI_CHAN_REG_INFO1_MAX_PWR);
2957 			*reg1 |= le32_encode_bits(channel_arg->maxregpower,
2958 						  WMI_CHAN_REG_INFO1_MAX_REG_PWR);
2959 			*reg1 |= le32_encode_bits(channel_arg->reg_class_id,
2960 						  WMI_CHAN_REG_INFO1_REG_CLS);
2961 			*reg2 |= le32_encode_bits(channel_arg->antennamax,
2962 						  WMI_CHAN_REG_INFO2_ANT_MAX);
2963 			*reg2 |= le32_encode_bits(channel_arg->maxregpower,
2964 						  WMI_CHAN_REG_INFO2_MAX_TX_PWR);
2965 
2966 			ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
2967 				   "WMI chan scan list chan[%d] = %u, chan_info->info %8x\n",
2968 				   i, chan_info->mhz, chan_info->info);
2969 
2970 			ptr += sizeof(*chan_info);
2971 
2972 			channel_arg++;
2973 		}
2974 
2975 		ret = ath12k_wmi_cmd_send(wmi, skb, WMI_SCAN_CHAN_LIST_CMDID);
2976 		if (ret) {
2977 			ath12k_warn(ar->ab, "failed to send WMI_SCAN_CHAN_LIST cmd\n");
2978 			dev_kfree_skb(skb);
2979 			return ret;
2980 		}
2981 
2982 		num_sends++;
2983 	}
2984 
2985 	return 0;
2986 }
2987 
ath12k_wmi_send_wmm_update_cmd(struct ath12k * ar,u32 vdev_id,struct wmi_wmm_params_all_arg * param)2988 int ath12k_wmi_send_wmm_update_cmd(struct ath12k *ar, u32 vdev_id,
2989 				   struct wmi_wmm_params_all_arg *param)
2990 {
2991 	struct ath12k_wmi_pdev *wmi = ar->wmi;
2992 	struct wmi_vdev_set_wmm_params_cmd *cmd;
2993 	struct wmi_wmm_params *wmm_param;
2994 	struct wmi_wmm_params_arg *wmi_wmm_arg;
2995 	struct sk_buff *skb;
2996 	int ret, ac;
2997 
2998 	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
2999 	if (!skb)
3000 		return -ENOMEM;
3001 
3002 	cmd = (struct wmi_vdev_set_wmm_params_cmd *)skb->data;
3003 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_SET_WMM_PARAMS_CMD,
3004 						 sizeof(*cmd));
3005 
3006 	cmd->vdev_id = cpu_to_le32(vdev_id);
3007 	cmd->wmm_param_type = 0;
3008 
3009 	for (ac = 0; ac < WME_NUM_AC; ac++) {
3010 		switch (ac) {
3011 		case WME_AC_BE:
3012 			wmi_wmm_arg = &param->ac_be;
3013 			break;
3014 		case WME_AC_BK:
3015 			wmi_wmm_arg = &param->ac_bk;
3016 			break;
3017 		case WME_AC_VI:
3018 			wmi_wmm_arg = &param->ac_vi;
3019 			break;
3020 		case WME_AC_VO:
3021 			wmi_wmm_arg = &param->ac_vo;
3022 			break;
3023 		}
3024 
3025 		wmm_param = (struct wmi_wmm_params *)&cmd->wmm_params[ac];
3026 		wmm_param->tlv_header =
3027 			ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_SET_WMM_PARAMS_CMD,
3028 					       sizeof(*wmm_param));
3029 
3030 		wmm_param->aifs = cpu_to_le32(wmi_wmm_arg->aifs);
3031 		wmm_param->cwmin = cpu_to_le32(wmi_wmm_arg->cwmin);
3032 		wmm_param->cwmax = cpu_to_le32(wmi_wmm_arg->cwmax);
3033 		wmm_param->txoplimit = cpu_to_le32(wmi_wmm_arg->txop);
3034 		wmm_param->acm = cpu_to_le32(wmi_wmm_arg->acm);
3035 		wmm_param->no_ack = cpu_to_le32(wmi_wmm_arg->no_ack);
3036 
3037 		ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
3038 			   "wmi wmm set ac %d aifs %d cwmin %d cwmax %d txop %d acm %d no_ack %d\n",
3039 			   ac, wmm_param->aifs, wmm_param->cwmin,
3040 			   wmm_param->cwmax, wmm_param->txoplimit,
3041 			   wmm_param->acm, wmm_param->no_ack);
3042 	}
3043 	ret = ath12k_wmi_cmd_send(wmi, skb,
3044 				  WMI_VDEV_SET_WMM_PARAMS_CMDID);
3045 	if (ret) {
3046 		ath12k_warn(ar->ab,
3047 			    "failed to send WMI_VDEV_SET_WMM_PARAMS_CMDID");
3048 		dev_kfree_skb(skb);
3049 	}
3050 
3051 	return ret;
3052 }
3053 
ath12k_wmi_send_dfs_phyerr_offload_enable_cmd(struct ath12k * ar,u32 pdev_id)3054 int ath12k_wmi_send_dfs_phyerr_offload_enable_cmd(struct ath12k *ar,
3055 						  u32 pdev_id)
3056 {
3057 	struct ath12k_wmi_pdev *wmi = ar->wmi;
3058 	struct wmi_dfs_phyerr_offload_cmd *cmd;
3059 	struct sk_buff *skb;
3060 	int ret;
3061 
3062 	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
3063 	if (!skb)
3064 		return -ENOMEM;
3065 
3066 	cmd = (struct wmi_dfs_phyerr_offload_cmd *)skb->data;
3067 	cmd->tlv_header =
3068 		ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_DFS_PHYERR_OFFLOAD_ENABLE_CMD,
3069 				       sizeof(*cmd));
3070 
3071 	cmd->pdev_id = cpu_to_le32(pdev_id);
3072 
3073 	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
3074 		   "WMI dfs phy err offload enable pdev id %d\n", pdev_id);
3075 
3076 	ret = ath12k_wmi_cmd_send(wmi, skb,
3077 				  WMI_PDEV_DFS_PHYERR_OFFLOAD_ENABLE_CMDID);
3078 	if (ret) {
3079 		ath12k_warn(ar->ab,
3080 			    "failed to send WMI_PDEV_DFS_PHYERR_OFFLOAD_ENABLE cmd\n");
3081 		dev_kfree_skb(skb);
3082 	}
3083 
3084 	return ret;
3085 }
3086 
ath12k_wmi_set_bios_cmd(struct ath12k_base * ab,u32 param_id,const u8 * buf,size_t buf_len)3087 int ath12k_wmi_set_bios_cmd(struct ath12k_base *ab, u32 param_id,
3088 			    const u8 *buf, size_t buf_len)
3089 {
3090 	struct ath12k_wmi_base *wmi_ab = &ab->wmi_ab;
3091 	struct wmi_pdev_set_bios_interface_cmd *cmd;
3092 	struct wmi_tlv *tlv;
3093 	struct sk_buff *skb;
3094 	u8 *ptr;
3095 	u32 len, len_aligned;
3096 	int ret;
3097 
3098 	len_aligned = roundup(buf_len, sizeof(u32));
3099 	len = sizeof(*cmd) + TLV_HDR_SIZE + len_aligned;
3100 
3101 	skb = ath12k_wmi_alloc_skb(wmi_ab, len);
3102 	if (!skb)
3103 		return -ENOMEM;
3104 
3105 	cmd = (struct wmi_pdev_set_bios_interface_cmd *)skb->data;
3106 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SET_BIOS_INTERFACE_CMD,
3107 						 sizeof(*cmd));
3108 	cmd->pdev_id = cpu_to_le32(WMI_PDEV_ID_SOC);
3109 	cmd->param_type_id = cpu_to_le32(param_id);
3110 	cmd->length = cpu_to_le32(buf_len);
3111 
3112 	ptr = skb->data + sizeof(*cmd);
3113 	tlv = (struct wmi_tlv *)ptr;
3114 	tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, len_aligned);
3115 	ptr += TLV_HDR_SIZE;
3116 	memcpy(ptr, buf, buf_len);
3117 
3118 	ret = ath12k_wmi_cmd_send(&wmi_ab->wmi[0],
3119 				  skb,
3120 				  WMI_PDEV_SET_BIOS_INTERFACE_CMDID);
3121 	if (ret) {
3122 		ath12k_warn(ab,
3123 			    "failed to send WMI_PDEV_SET_BIOS_INTERFACE_CMDID parameter id %d: %d\n",
3124 			    param_id, ret);
3125 		dev_kfree_skb(skb);
3126 	}
3127 
3128 	return 0;
3129 }
3130 
ath12k_wmi_set_bios_sar_cmd(struct ath12k_base * ab,const u8 * psar_table)3131 int ath12k_wmi_set_bios_sar_cmd(struct ath12k_base *ab, const u8 *psar_table)
3132 {
3133 	struct ath12k_wmi_base *wmi_ab = &ab->wmi_ab;
3134 	struct wmi_pdev_set_bios_sar_table_cmd *cmd;
3135 	struct wmi_tlv *tlv;
3136 	struct sk_buff *skb;
3137 	int ret;
3138 	u8 *buf_ptr;
3139 	u32 len, sar_table_len_aligned, sar_dbs_backoff_len_aligned;
3140 	const u8 *psar_value = psar_table + ATH12K_ACPI_POWER_LIMIT_DATA_OFFSET;
3141 	const u8 *pdbs_value = psar_table + ATH12K_ACPI_DBS_BACKOFF_DATA_OFFSET;
3142 
3143 	sar_table_len_aligned = roundup(ATH12K_ACPI_BIOS_SAR_TABLE_LEN, sizeof(u32));
3144 	sar_dbs_backoff_len_aligned = roundup(ATH12K_ACPI_BIOS_SAR_DBS_BACKOFF_LEN,
3145 					      sizeof(u32));
3146 	len = sizeof(*cmd) + TLV_HDR_SIZE + sar_table_len_aligned +
3147 		TLV_HDR_SIZE + sar_dbs_backoff_len_aligned;
3148 
3149 	skb = ath12k_wmi_alloc_skb(wmi_ab, len);
3150 	if (!skb)
3151 		return -ENOMEM;
3152 
3153 	cmd = (struct wmi_pdev_set_bios_sar_table_cmd *)skb->data;
3154 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SET_BIOS_SAR_TABLE_CMD,
3155 						 sizeof(*cmd));
3156 	cmd->pdev_id = cpu_to_le32(WMI_PDEV_ID_SOC);
3157 	cmd->sar_len = cpu_to_le32(ATH12K_ACPI_BIOS_SAR_TABLE_LEN);
3158 	cmd->dbs_backoff_len = cpu_to_le32(ATH12K_ACPI_BIOS_SAR_DBS_BACKOFF_LEN);
3159 
3160 	buf_ptr = skb->data + sizeof(*cmd);
3161 	tlv = (struct wmi_tlv *)buf_ptr;
3162 	tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE,
3163 					 sar_table_len_aligned);
3164 	buf_ptr += TLV_HDR_SIZE;
3165 	memcpy(buf_ptr, psar_value, ATH12K_ACPI_BIOS_SAR_TABLE_LEN);
3166 
3167 	buf_ptr += sar_table_len_aligned;
3168 	tlv = (struct wmi_tlv *)buf_ptr;
3169 	tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE,
3170 					 sar_dbs_backoff_len_aligned);
3171 	buf_ptr += TLV_HDR_SIZE;
3172 	memcpy(buf_ptr, pdbs_value, ATH12K_ACPI_BIOS_SAR_DBS_BACKOFF_LEN);
3173 
3174 	ret = ath12k_wmi_cmd_send(&wmi_ab->wmi[0],
3175 				  skb,
3176 				  WMI_PDEV_SET_BIOS_SAR_TABLE_CMDID);
3177 	if (ret) {
3178 		ath12k_warn(ab,
3179 			    "failed to send WMI_PDEV_SET_BIOS_INTERFACE_CMDID %d\n",
3180 			    ret);
3181 		dev_kfree_skb(skb);
3182 	}
3183 
3184 	return ret;
3185 }
3186 
ath12k_wmi_set_bios_geo_cmd(struct ath12k_base * ab,const u8 * pgeo_table)3187 int ath12k_wmi_set_bios_geo_cmd(struct ath12k_base *ab, const u8 *pgeo_table)
3188 {
3189 	struct ath12k_wmi_base *wmi_ab = &ab->wmi_ab;
3190 	struct wmi_pdev_set_bios_geo_table_cmd *cmd;
3191 	struct wmi_tlv *tlv;
3192 	struct sk_buff *skb;
3193 	int ret;
3194 	u8 *buf_ptr;
3195 	u32 len, sar_geo_len_aligned;
3196 	const u8 *pgeo_value = pgeo_table + ATH12K_ACPI_GEO_OFFSET_DATA_OFFSET;
3197 
3198 	sar_geo_len_aligned = roundup(ATH12K_ACPI_BIOS_SAR_GEO_OFFSET_LEN, sizeof(u32));
3199 	len = sizeof(*cmd) + TLV_HDR_SIZE + sar_geo_len_aligned;
3200 
3201 	skb = ath12k_wmi_alloc_skb(wmi_ab, len);
3202 	if (!skb)
3203 		return -ENOMEM;
3204 
3205 	cmd = (struct wmi_pdev_set_bios_geo_table_cmd *)skb->data;
3206 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SET_BIOS_GEO_TABLE_CMD,
3207 						 sizeof(*cmd));
3208 	cmd->pdev_id = cpu_to_le32(WMI_PDEV_ID_SOC);
3209 	cmd->geo_len = cpu_to_le32(ATH12K_ACPI_BIOS_SAR_GEO_OFFSET_LEN);
3210 
3211 	buf_ptr = skb->data + sizeof(*cmd);
3212 	tlv = (struct wmi_tlv *)buf_ptr;
3213 	tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, sar_geo_len_aligned);
3214 	buf_ptr += TLV_HDR_SIZE;
3215 	memcpy(buf_ptr, pgeo_value, ATH12K_ACPI_BIOS_SAR_GEO_OFFSET_LEN);
3216 
3217 	ret = ath12k_wmi_cmd_send(&wmi_ab->wmi[0],
3218 				  skb,
3219 				  WMI_PDEV_SET_BIOS_GEO_TABLE_CMDID);
3220 	if (ret) {
3221 		ath12k_warn(ab,
3222 			    "failed to send WMI_PDEV_SET_BIOS_GEO_TABLE_CMDID %d\n",
3223 			    ret);
3224 		dev_kfree_skb(skb);
3225 	}
3226 
3227 	return ret;
3228 }
3229 
ath12k_wmi_delba_send(struct ath12k * ar,u32 vdev_id,const u8 * mac,u32 tid,u32 initiator,u32 reason)3230 int ath12k_wmi_delba_send(struct ath12k *ar, u32 vdev_id, const u8 *mac,
3231 			  u32 tid, u32 initiator, u32 reason)
3232 {
3233 	struct ath12k_wmi_pdev *wmi = ar->wmi;
3234 	struct wmi_delba_send_cmd *cmd;
3235 	struct sk_buff *skb;
3236 	int ret;
3237 
3238 	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
3239 	if (!skb)
3240 		return -ENOMEM;
3241 
3242 	cmd = (struct wmi_delba_send_cmd *)skb->data;
3243 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_DELBA_SEND_CMD,
3244 						 sizeof(*cmd));
3245 	cmd->vdev_id = cpu_to_le32(vdev_id);
3246 	ether_addr_copy(cmd->peer_macaddr.addr, mac);
3247 	cmd->tid = cpu_to_le32(tid);
3248 	cmd->initiator = cpu_to_le32(initiator);
3249 	cmd->reasoncode = cpu_to_le32(reason);
3250 
3251 	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
3252 		   "wmi delba send vdev_id 0x%X mac_addr %pM tid %u initiator %u reason %u\n",
3253 		   vdev_id, mac, tid, initiator, reason);
3254 
3255 	ret = ath12k_wmi_cmd_send(wmi, skb, WMI_DELBA_SEND_CMDID);
3256 
3257 	if (ret) {
3258 		ath12k_warn(ar->ab,
3259 			    "failed to send WMI_DELBA_SEND_CMDID cmd\n");
3260 		dev_kfree_skb(skb);
3261 	}
3262 
3263 	return ret;
3264 }
3265 
ath12k_wmi_addba_set_resp(struct ath12k * ar,u32 vdev_id,const u8 * mac,u32 tid,u32 status)3266 int ath12k_wmi_addba_set_resp(struct ath12k *ar, u32 vdev_id, const u8 *mac,
3267 			      u32 tid, u32 status)
3268 {
3269 	struct ath12k_wmi_pdev *wmi = ar->wmi;
3270 	struct wmi_addba_setresponse_cmd *cmd;
3271 	struct sk_buff *skb;
3272 	int ret;
3273 
3274 	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
3275 	if (!skb)
3276 		return -ENOMEM;
3277 
3278 	cmd = (struct wmi_addba_setresponse_cmd *)skb->data;
3279 	cmd->tlv_header =
3280 		ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ADDBA_SETRESPONSE_CMD,
3281 				       sizeof(*cmd));
3282 	cmd->vdev_id = cpu_to_le32(vdev_id);
3283 	ether_addr_copy(cmd->peer_macaddr.addr, mac);
3284 	cmd->tid = cpu_to_le32(tid);
3285 	cmd->statuscode = cpu_to_le32(status);
3286 
3287 	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
3288 		   "wmi addba set resp vdev_id 0x%X mac_addr %pM tid %u status %u\n",
3289 		   vdev_id, mac, tid, status);
3290 
3291 	ret = ath12k_wmi_cmd_send(wmi, skb, WMI_ADDBA_SET_RESP_CMDID);
3292 
3293 	if (ret) {
3294 		ath12k_warn(ar->ab,
3295 			    "failed to send WMI_ADDBA_SET_RESP_CMDID cmd\n");
3296 		dev_kfree_skb(skb);
3297 	}
3298 
3299 	return ret;
3300 }
3301 
ath12k_wmi_addba_send(struct ath12k * ar,u32 vdev_id,const u8 * mac,u32 tid,u32 buf_size)3302 int ath12k_wmi_addba_send(struct ath12k *ar, u32 vdev_id, const u8 *mac,
3303 			  u32 tid, u32 buf_size)
3304 {
3305 	struct ath12k_wmi_pdev *wmi = ar->wmi;
3306 	struct wmi_addba_send_cmd *cmd;
3307 	struct sk_buff *skb;
3308 	int ret;
3309 
3310 	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
3311 	if (!skb)
3312 		return -ENOMEM;
3313 
3314 	cmd = (struct wmi_addba_send_cmd *)skb->data;
3315 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ADDBA_SEND_CMD,
3316 						 sizeof(*cmd));
3317 	cmd->vdev_id = cpu_to_le32(vdev_id);
3318 	ether_addr_copy(cmd->peer_macaddr.addr, mac);
3319 	cmd->tid = cpu_to_le32(tid);
3320 	cmd->buffersize = cpu_to_le32(buf_size);
3321 
3322 	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
3323 		   "wmi addba send vdev_id 0x%X mac_addr %pM tid %u bufsize %u\n",
3324 		   vdev_id, mac, tid, buf_size);
3325 
3326 	ret = ath12k_wmi_cmd_send(wmi, skb, WMI_ADDBA_SEND_CMDID);
3327 
3328 	if (ret) {
3329 		ath12k_warn(ar->ab,
3330 			    "failed to send WMI_ADDBA_SEND_CMDID cmd\n");
3331 		dev_kfree_skb(skb);
3332 	}
3333 
3334 	return ret;
3335 }
3336 
ath12k_wmi_addba_clear_resp(struct ath12k * ar,u32 vdev_id,const u8 * mac)3337 int ath12k_wmi_addba_clear_resp(struct ath12k *ar, u32 vdev_id, const u8 *mac)
3338 {
3339 	struct ath12k_wmi_pdev *wmi = ar->wmi;
3340 	struct wmi_addba_clear_resp_cmd *cmd;
3341 	struct sk_buff *skb;
3342 	int ret;
3343 
3344 	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
3345 	if (!skb)
3346 		return -ENOMEM;
3347 
3348 	cmd = (struct wmi_addba_clear_resp_cmd *)skb->data;
3349 	cmd->tlv_header =
3350 		ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ADDBA_CLEAR_RESP_CMD,
3351 				       sizeof(*cmd));
3352 	cmd->vdev_id = cpu_to_le32(vdev_id);
3353 	ether_addr_copy(cmd->peer_macaddr.addr, mac);
3354 
3355 	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
3356 		   "wmi addba clear resp vdev_id 0x%X mac_addr %pM\n",
3357 		   vdev_id, mac);
3358 
3359 	ret = ath12k_wmi_cmd_send(wmi, skb, WMI_ADDBA_CLEAR_RESP_CMDID);
3360 
3361 	if (ret) {
3362 		ath12k_warn(ar->ab,
3363 			    "failed to send WMI_ADDBA_CLEAR_RESP_CMDID cmd\n");
3364 		dev_kfree_skb(skb);
3365 	}
3366 
3367 	return ret;
3368 }
3369 
ath12k_wmi_send_init_country_cmd(struct ath12k * ar,struct ath12k_wmi_init_country_arg * arg)3370 int ath12k_wmi_send_init_country_cmd(struct ath12k *ar,
3371 				     struct ath12k_wmi_init_country_arg *arg)
3372 {
3373 	struct ath12k_wmi_pdev *wmi = ar->wmi;
3374 	struct wmi_init_country_cmd *cmd;
3375 	struct sk_buff *skb;
3376 	int ret;
3377 
3378 	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
3379 	if (!skb)
3380 		return -ENOMEM;
3381 
3382 	cmd = (struct wmi_init_country_cmd *)skb->data;
3383 	cmd->tlv_header =
3384 		ath12k_wmi_tlv_cmd_hdr(WMI_TAG_SET_INIT_COUNTRY_CMD,
3385 				       sizeof(*cmd));
3386 
3387 	cmd->pdev_id = cpu_to_le32(ar->pdev->pdev_id);
3388 
3389 	switch (arg->flags) {
3390 	case ALPHA_IS_SET:
3391 		cmd->init_cc_type = WMI_COUNTRY_INFO_TYPE_ALPHA;
3392 		memcpy(&cmd->cc_info.alpha2, arg->cc_info.alpha2, 3);
3393 		break;
3394 	case CC_IS_SET:
3395 		cmd->init_cc_type = cpu_to_le32(WMI_COUNTRY_INFO_TYPE_COUNTRY_CODE);
3396 		cmd->cc_info.country_code =
3397 			cpu_to_le32(arg->cc_info.country_code);
3398 		break;
3399 	case REGDMN_IS_SET:
3400 		cmd->init_cc_type = cpu_to_le32(WMI_COUNTRY_INFO_TYPE_REGDOMAIN);
3401 		cmd->cc_info.regdom_id = cpu_to_le32(arg->cc_info.regdom_id);
3402 		break;
3403 	default:
3404 		ret = -EINVAL;
3405 		goto out;
3406 	}
3407 
3408 	ret = ath12k_wmi_cmd_send(wmi, skb,
3409 				  WMI_SET_INIT_COUNTRY_CMDID);
3410 
3411 out:
3412 	if (ret) {
3413 		ath12k_warn(ar->ab,
3414 			    "failed to send WMI_SET_INIT_COUNTRY CMD :%d\n",
3415 			    ret);
3416 		dev_kfree_skb(skb);
3417 	}
3418 
3419 	return ret;
3420 }
3421 
ath12k_wmi_send_set_current_country_cmd(struct ath12k * ar,struct wmi_set_current_country_arg * arg)3422 int ath12k_wmi_send_set_current_country_cmd(struct ath12k *ar,
3423 					    struct wmi_set_current_country_arg *arg)
3424 {
3425 	struct ath12k_wmi_pdev *wmi = ar->wmi;
3426 	struct wmi_set_current_country_cmd *cmd;
3427 	struct sk_buff *skb;
3428 	int ret;
3429 
3430 	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
3431 	if (!skb)
3432 		return -ENOMEM;
3433 
3434 	cmd = (struct wmi_set_current_country_cmd *)skb->data;
3435 	cmd->tlv_header =
3436 		ath12k_wmi_tlv_cmd_hdr(WMI_TAG_SET_CURRENT_COUNTRY_CMD,
3437 				       sizeof(*cmd));
3438 
3439 	cmd->pdev_id = cpu_to_le32(ar->pdev->pdev_id);
3440 	memcpy(&cmd->new_alpha2, &arg->alpha2, sizeof(arg->alpha2));
3441 	ret = ath12k_wmi_cmd_send(wmi, skb, WMI_SET_CURRENT_COUNTRY_CMDID);
3442 
3443 	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
3444 		   "set current country pdev id %d alpha2 %c%c\n",
3445 		   ar->pdev->pdev_id,
3446 		   arg->alpha2[0],
3447 		   arg->alpha2[1]);
3448 
3449 	if (ret) {
3450 		ath12k_warn(ar->ab,
3451 			    "failed to send WMI_SET_CURRENT_COUNTRY_CMDID: %d\n", ret);
3452 		dev_kfree_skb(skb);
3453 	}
3454 
3455 	return ret;
3456 }
3457 
ath12k_wmi_send_11d_scan_start_cmd(struct ath12k * ar,struct wmi_11d_scan_start_arg * arg)3458 int ath12k_wmi_send_11d_scan_start_cmd(struct ath12k *ar,
3459 				       struct wmi_11d_scan_start_arg *arg)
3460 {
3461 	struct ath12k_wmi_pdev *wmi = ar->wmi;
3462 	struct wmi_11d_scan_start_cmd *cmd;
3463 	struct sk_buff *skb;
3464 	int ret;
3465 
3466 	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
3467 	if (!skb)
3468 		return -ENOMEM;
3469 
3470 	cmd = (struct wmi_11d_scan_start_cmd *)skb->data;
3471 	cmd->tlv_header =
3472 		ath12k_wmi_tlv_cmd_hdr(WMI_TAG_11D_SCAN_START_CMD,
3473 				       sizeof(*cmd));
3474 
3475 	cmd->vdev_id = cpu_to_le32(arg->vdev_id);
3476 	cmd->scan_period_msec = cpu_to_le32(arg->scan_period_msec);
3477 	cmd->start_interval_msec = cpu_to_le32(arg->start_interval_msec);
3478 	ret = ath12k_wmi_cmd_send(wmi, skb, WMI_11D_SCAN_START_CMDID);
3479 
3480 	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
3481 		   "send 11d scan start vdev id %d period %d ms internal %d ms\n",
3482 		   arg->vdev_id, arg->scan_period_msec,
3483 		   arg->start_interval_msec);
3484 
3485 	if (ret) {
3486 		ath12k_warn(ar->ab,
3487 			    "failed to send WMI_11D_SCAN_START_CMDID: %d\n", ret);
3488 		dev_kfree_skb(skb);
3489 	}
3490 
3491 	return ret;
3492 }
3493 
ath12k_wmi_send_11d_scan_stop_cmd(struct ath12k * ar,u32 vdev_id)3494 int ath12k_wmi_send_11d_scan_stop_cmd(struct ath12k *ar, u32 vdev_id)
3495 {
3496 	struct ath12k_wmi_pdev *wmi = ar->wmi;
3497 	struct wmi_11d_scan_stop_cmd *cmd;
3498 	struct sk_buff *skb;
3499 	int ret;
3500 
3501 	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
3502 	if (!skb)
3503 		return -ENOMEM;
3504 
3505 	cmd = (struct wmi_11d_scan_stop_cmd *)skb->data;
3506 	cmd->tlv_header =
3507 		ath12k_wmi_tlv_cmd_hdr(WMI_TAG_11D_SCAN_STOP_CMD,
3508 				       sizeof(*cmd));
3509 
3510 	cmd->vdev_id = cpu_to_le32(vdev_id);
3511 	ret = ath12k_wmi_cmd_send(wmi, skb, WMI_11D_SCAN_STOP_CMDID);
3512 
3513 	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
3514 		   "send 11d scan stop vdev id %d\n",
3515 		   cmd->vdev_id);
3516 
3517 	if (ret) {
3518 		ath12k_warn(ar->ab,
3519 			    "failed to send WMI_11D_SCAN_STOP_CMDID: %d\n", ret);
3520 		dev_kfree_skb(skb);
3521 	}
3522 
3523 	return ret;
3524 }
3525 
3526 int
ath12k_wmi_send_twt_enable_cmd(struct ath12k * ar,u32 pdev_id)3527 ath12k_wmi_send_twt_enable_cmd(struct ath12k *ar, u32 pdev_id)
3528 {
3529 	struct ath12k_wmi_pdev *wmi = ar->wmi;
3530 	struct ath12k_base *ab = wmi->wmi_ab->ab;
3531 	struct wmi_twt_enable_params_cmd *cmd;
3532 	struct sk_buff *skb;
3533 	int ret, len;
3534 
3535 	len = sizeof(*cmd);
3536 
3537 	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
3538 	if (!skb)
3539 		return -ENOMEM;
3540 
3541 	cmd = (struct wmi_twt_enable_params_cmd *)skb->data;
3542 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_TWT_ENABLE_CMD,
3543 						 len);
3544 	cmd->pdev_id = cpu_to_le32(pdev_id);
3545 	cmd->sta_cong_timer_ms = cpu_to_le32(ATH12K_TWT_DEF_STA_CONG_TIMER_MS);
3546 	cmd->default_slot_size = cpu_to_le32(ATH12K_TWT_DEF_DEFAULT_SLOT_SIZE);
3547 	cmd->congestion_thresh_setup =
3548 		cpu_to_le32(ATH12K_TWT_DEF_CONGESTION_THRESH_SETUP);
3549 	cmd->congestion_thresh_teardown =
3550 		cpu_to_le32(ATH12K_TWT_DEF_CONGESTION_THRESH_TEARDOWN);
3551 	cmd->congestion_thresh_critical =
3552 		cpu_to_le32(ATH12K_TWT_DEF_CONGESTION_THRESH_CRITICAL);
3553 	cmd->interference_thresh_teardown =
3554 		cpu_to_le32(ATH12K_TWT_DEF_INTERFERENCE_THRESH_TEARDOWN);
3555 	cmd->interference_thresh_setup =
3556 		cpu_to_le32(ATH12K_TWT_DEF_INTERFERENCE_THRESH_SETUP);
3557 	cmd->min_no_sta_setup = cpu_to_le32(ATH12K_TWT_DEF_MIN_NO_STA_SETUP);
3558 	cmd->min_no_sta_teardown = cpu_to_le32(ATH12K_TWT_DEF_MIN_NO_STA_TEARDOWN);
3559 	cmd->no_of_bcast_mcast_slots =
3560 		cpu_to_le32(ATH12K_TWT_DEF_NO_OF_BCAST_MCAST_SLOTS);
3561 	cmd->min_no_twt_slots = cpu_to_le32(ATH12K_TWT_DEF_MIN_NO_TWT_SLOTS);
3562 	cmd->max_no_sta_twt = cpu_to_le32(ATH12K_TWT_DEF_MAX_NO_STA_TWT);
3563 	cmd->mode_check_interval = cpu_to_le32(ATH12K_TWT_DEF_MODE_CHECK_INTERVAL);
3564 	cmd->add_sta_slot_interval = cpu_to_le32(ATH12K_TWT_DEF_ADD_STA_SLOT_INTERVAL);
3565 	cmd->remove_sta_slot_interval =
3566 		cpu_to_le32(ATH12K_TWT_DEF_REMOVE_STA_SLOT_INTERVAL);
3567 	/* TODO add MBSSID support */
3568 	cmd->mbss_support = 0;
3569 
3570 	ret = ath12k_wmi_cmd_send(wmi, skb,
3571 				  WMI_TWT_ENABLE_CMDID);
3572 	if (ret) {
3573 		ath12k_warn(ab, "Failed to send WMI_TWT_ENABLE_CMDID");
3574 		dev_kfree_skb(skb);
3575 	}
3576 	return ret;
3577 }
3578 
3579 int
ath12k_wmi_send_twt_disable_cmd(struct ath12k * ar,u32 pdev_id)3580 ath12k_wmi_send_twt_disable_cmd(struct ath12k *ar, u32 pdev_id)
3581 {
3582 	struct ath12k_wmi_pdev *wmi = ar->wmi;
3583 	struct ath12k_base *ab = wmi->wmi_ab->ab;
3584 	struct wmi_twt_disable_params_cmd *cmd;
3585 	struct sk_buff *skb;
3586 	int ret, len;
3587 
3588 	len = sizeof(*cmd);
3589 
3590 	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
3591 	if (!skb)
3592 		return -ENOMEM;
3593 
3594 	cmd = (struct wmi_twt_disable_params_cmd *)skb->data;
3595 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_TWT_DISABLE_CMD,
3596 						 len);
3597 	cmd->pdev_id = cpu_to_le32(pdev_id);
3598 
3599 	ret = ath12k_wmi_cmd_send(wmi, skb,
3600 				  WMI_TWT_DISABLE_CMDID);
3601 	if (ret) {
3602 		ath12k_warn(ab, "Failed to send WMI_TWT_DISABLE_CMDID");
3603 		dev_kfree_skb(skb);
3604 	}
3605 	return ret;
3606 }
3607 
3608 int
ath12k_wmi_send_obss_spr_cmd(struct ath12k * ar,u32 vdev_id,struct ieee80211_he_obss_pd * he_obss_pd)3609 ath12k_wmi_send_obss_spr_cmd(struct ath12k *ar, u32 vdev_id,
3610 			     struct ieee80211_he_obss_pd *he_obss_pd)
3611 {
3612 	struct ath12k_wmi_pdev *wmi = ar->wmi;
3613 	struct ath12k_base *ab = wmi->wmi_ab->ab;
3614 	struct wmi_obss_spatial_reuse_params_cmd *cmd;
3615 	struct sk_buff *skb;
3616 	int ret, len;
3617 
3618 	len = sizeof(*cmd);
3619 
3620 	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
3621 	if (!skb)
3622 		return -ENOMEM;
3623 
3624 	cmd = (struct wmi_obss_spatial_reuse_params_cmd *)skb->data;
3625 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_OBSS_SPATIAL_REUSE_SET_CMD,
3626 						 len);
3627 	cmd->vdev_id = cpu_to_le32(vdev_id);
3628 	cmd->enable = cpu_to_le32(he_obss_pd->enable);
3629 	cmd->obss_min = a_cpu_to_sle32(he_obss_pd->min_offset);
3630 	cmd->obss_max = a_cpu_to_sle32(he_obss_pd->max_offset);
3631 
3632 	ret = ath12k_wmi_cmd_send(wmi, skb,
3633 				  WMI_PDEV_OBSS_PD_SPATIAL_REUSE_CMDID);
3634 	if (ret) {
3635 		ath12k_warn(ab,
3636 			    "Failed to send WMI_PDEV_OBSS_PD_SPATIAL_REUSE_CMDID");
3637 		dev_kfree_skb(skb);
3638 	}
3639 	return ret;
3640 }
3641 
ath12k_wmi_obss_color_cfg_cmd(struct ath12k * ar,u32 vdev_id,u8 bss_color,u32 period,bool enable)3642 int ath12k_wmi_obss_color_cfg_cmd(struct ath12k *ar, u32 vdev_id,
3643 				  u8 bss_color, u32 period,
3644 				  bool enable)
3645 {
3646 	struct ath12k_wmi_pdev *wmi = ar->wmi;
3647 	struct ath12k_base *ab = wmi->wmi_ab->ab;
3648 	struct wmi_obss_color_collision_cfg_params_cmd *cmd;
3649 	struct sk_buff *skb;
3650 	int ret, len;
3651 
3652 	len = sizeof(*cmd);
3653 
3654 	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
3655 	if (!skb)
3656 		return -ENOMEM;
3657 
3658 	cmd = (struct wmi_obss_color_collision_cfg_params_cmd *)skb->data;
3659 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_OBSS_COLOR_COLLISION_DET_CONFIG,
3660 						 len);
3661 	cmd->vdev_id = cpu_to_le32(vdev_id);
3662 	cmd->evt_type = enable ? cpu_to_le32(ATH12K_OBSS_COLOR_COLLISION_DETECTION) :
3663 		cpu_to_le32(ATH12K_OBSS_COLOR_COLLISION_DETECTION_DISABLE);
3664 	cmd->current_bss_color = cpu_to_le32(bss_color);
3665 	cmd->detection_period_ms = cpu_to_le32(period);
3666 	cmd->scan_period_ms = cpu_to_le32(ATH12K_BSS_COLOR_COLLISION_SCAN_PERIOD_MS);
3667 	cmd->free_slot_expiry_time_ms = 0;
3668 	cmd->flags = 0;
3669 
3670 	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
3671 		   "wmi_send_obss_color_collision_cfg id %d type %d bss_color %d detect_period %d scan_period %d\n",
3672 		   cmd->vdev_id, cmd->evt_type, cmd->current_bss_color,
3673 		   cmd->detection_period_ms, cmd->scan_period_ms);
3674 
3675 	ret = ath12k_wmi_cmd_send(wmi, skb,
3676 				  WMI_OBSS_COLOR_COLLISION_DET_CONFIG_CMDID);
3677 	if (ret) {
3678 		ath12k_warn(ab, "Failed to send WMI_OBSS_COLOR_COLLISION_DET_CONFIG_CMDID");
3679 		dev_kfree_skb(skb);
3680 	}
3681 	return ret;
3682 }
3683 
ath12k_wmi_send_bss_color_change_enable_cmd(struct ath12k * ar,u32 vdev_id,bool enable)3684 int ath12k_wmi_send_bss_color_change_enable_cmd(struct ath12k *ar, u32 vdev_id,
3685 						bool enable)
3686 {
3687 	struct ath12k_wmi_pdev *wmi = ar->wmi;
3688 	struct ath12k_base *ab = wmi->wmi_ab->ab;
3689 	struct wmi_bss_color_change_enable_params_cmd *cmd;
3690 	struct sk_buff *skb;
3691 	int ret, len;
3692 
3693 	len = sizeof(*cmd);
3694 
3695 	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
3696 	if (!skb)
3697 		return -ENOMEM;
3698 
3699 	cmd = (struct wmi_bss_color_change_enable_params_cmd *)skb->data;
3700 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_BSS_COLOR_CHANGE_ENABLE,
3701 						 len);
3702 	cmd->vdev_id = cpu_to_le32(vdev_id);
3703 	cmd->enable = enable ? cpu_to_le32(1) : 0;
3704 
3705 	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
3706 		   "wmi_send_bss_color_change_enable id %d enable %d\n",
3707 		   cmd->vdev_id, cmd->enable);
3708 
3709 	ret = ath12k_wmi_cmd_send(wmi, skb,
3710 				  WMI_BSS_COLOR_CHANGE_ENABLE_CMDID);
3711 	if (ret) {
3712 		ath12k_warn(ab, "Failed to send WMI_BSS_COLOR_CHANGE_ENABLE_CMDID");
3713 		dev_kfree_skb(skb);
3714 	}
3715 	return ret;
3716 }
3717 
ath12k_wmi_fils_discovery_tmpl(struct ath12k * ar,u32 vdev_id,struct sk_buff * tmpl)3718 int ath12k_wmi_fils_discovery_tmpl(struct ath12k *ar, u32 vdev_id,
3719 				   struct sk_buff *tmpl)
3720 {
3721 	struct wmi_tlv *tlv;
3722 	struct sk_buff *skb;
3723 	void *ptr;
3724 	int ret, len;
3725 	size_t aligned_len;
3726 	struct wmi_fils_discovery_tmpl_cmd *cmd;
3727 
3728 	aligned_len = roundup(tmpl->len, 4);
3729 	len = sizeof(*cmd) + TLV_HDR_SIZE + aligned_len;
3730 
3731 	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
3732 		   "WMI vdev %i set FILS discovery template\n", vdev_id);
3733 
3734 	skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len);
3735 	if (!skb)
3736 		return -ENOMEM;
3737 
3738 	cmd = (struct wmi_fils_discovery_tmpl_cmd *)skb->data;
3739 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_FILS_DISCOVERY_TMPL_CMD,
3740 						 sizeof(*cmd));
3741 	cmd->vdev_id = cpu_to_le32(vdev_id);
3742 	cmd->buf_len = cpu_to_le32(tmpl->len);
3743 	ptr = skb->data + sizeof(*cmd);
3744 
3745 	tlv = ptr;
3746 	tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, aligned_len);
3747 	memcpy(tlv->value, tmpl->data, tmpl->len);
3748 
3749 	ret = ath12k_wmi_cmd_send(ar->wmi, skb, WMI_FILS_DISCOVERY_TMPL_CMDID);
3750 	if (ret) {
3751 		ath12k_warn(ar->ab,
3752 			    "WMI vdev %i failed to send FILS discovery template command\n",
3753 			    vdev_id);
3754 		dev_kfree_skb(skb);
3755 	}
3756 	return ret;
3757 }
3758 
ath12k_wmi_probe_resp_tmpl(struct ath12k * ar,u32 vdev_id,struct sk_buff * tmpl)3759 int ath12k_wmi_probe_resp_tmpl(struct ath12k *ar, u32 vdev_id,
3760 			       struct sk_buff *tmpl)
3761 {
3762 	struct wmi_probe_tmpl_cmd *cmd;
3763 	struct ath12k_wmi_bcn_prb_info_params *probe_info;
3764 	struct wmi_tlv *tlv;
3765 	struct sk_buff *skb;
3766 	void *ptr;
3767 	int ret, len;
3768 	size_t aligned_len = roundup(tmpl->len, 4);
3769 
3770 	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
3771 		   "WMI vdev %i set probe response template\n", vdev_id);
3772 
3773 	len = sizeof(*cmd) + sizeof(*probe_info) + TLV_HDR_SIZE + aligned_len;
3774 
3775 	skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len);
3776 	if (!skb)
3777 		return -ENOMEM;
3778 
3779 	cmd = (struct wmi_probe_tmpl_cmd *)skb->data;
3780 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PRB_TMPL_CMD,
3781 						 sizeof(*cmd));
3782 	cmd->vdev_id = cpu_to_le32(vdev_id);
3783 	cmd->buf_len = cpu_to_le32(tmpl->len);
3784 
3785 	ptr = skb->data + sizeof(*cmd);
3786 
3787 	probe_info = ptr;
3788 	len = sizeof(*probe_info);
3789 	probe_info->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_BCN_PRB_INFO,
3790 							len);
3791 	probe_info->caps = 0;
3792 	probe_info->erp = 0;
3793 
3794 	ptr += sizeof(*probe_info);
3795 
3796 	tlv = ptr;
3797 	tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, aligned_len);
3798 	memcpy(tlv->value, tmpl->data, tmpl->len);
3799 
3800 	ret = ath12k_wmi_cmd_send(ar->wmi, skb, WMI_PRB_TMPL_CMDID);
3801 	if (ret) {
3802 		ath12k_warn(ar->ab,
3803 			    "WMI vdev %i failed to send probe response template command\n",
3804 			    vdev_id);
3805 		dev_kfree_skb(skb);
3806 	}
3807 	return ret;
3808 }
3809 
ath12k_wmi_fils_discovery(struct ath12k * ar,u32 vdev_id,u32 interval,bool unsol_bcast_probe_resp_enabled)3810 int ath12k_wmi_fils_discovery(struct ath12k *ar, u32 vdev_id, u32 interval,
3811 			      bool unsol_bcast_probe_resp_enabled)
3812 {
3813 	struct sk_buff *skb;
3814 	int ret, len;
3815 	struct wmi_fils_discovery_cmd *cmd;
3816 
3817 	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
3818 		   "WMI vdev %i set %s interval to %u TU\n",
3819 		   vdev_id, unsol_bcast_probe_resp_enabled ?
3820 		   "unsolicited broadcast probe response" : "FILS discovery",
3821 		   interval);
3822 
3823 	len = sizeof(*cmd);
3824 	skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len);
3825 	if (!skb)
3826 		return -ENOMEM;
3827 
3828 	cmd = (struct wmi_fils_discovery_cmd *)skb->data;
3829 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ENABLE_FILS_CMD,
3830 						 len);
3831 	cmd->vdev_id = cpu_to_le32(vdev_id);
3832 	cmd->interval = cpu_to_le32(interval);
3833 	cmd->config = cpu_to_le32(unsol_bcast_probe_resp_enabled);
3834 
3835 	ret = ath12k_wmi_cmd_send(ar->wmi, skb, WMI_ENABLE_FILS_CMDID);
3836 	if (ret) {
3837 		ath12k_warn(ar->ab,
3838 			    "WMI vdev %i failed to send FILS discovery enable/disable command\n",
3839 			    vdev_id);
3840 		dev_kfree_skb(skb);
3841 	}
3842 	return ret;
3843 }
3844 
3845 static void
ath12k_fill_band_to_mac_param(struct ath12k_base * soc,struct ath12k_wmi_pdev_band_arg * arg)3846 ath12k_fill_band_to_mac_param(struct ath12k_base  *soc,
3847 			      struct ath12k_wmi_pdev_band_arg *arg)
3848 {
3849 	u8 i;
3850 	struct ath12k_wmi_hal_reg_capabilities_ext_arg *hal_reg_cap;
3851 	struct ath12k_pdev *pdev;
3852 
3853 	for (i = 0; i < soc->num_radios; i++) {
3854 		pdev = &soc->pdevs[i];
3855 		hal_reg_cap = &soc->hal_reg_cap[i];
3856 		arg[i].pdev_id = pdev->pdev_id;
3857 
3858 		switch (pdev->cap.supported_bands) {
3859 		case WMI_HOST_WLAN_2GHZ_5GHZ_CAP:
3860 			arg[i].start_freq = hal_reg_cap->low_2ghz_chan;
3861 			arg[i].end_freq = hal_reg_cap->high_5ghz_chan;
3862 			break;
3863 		case WMI_HOST_WLAN_2GHZ_CAP:
3864 			arg[i].start_freq = hal_reg_cap->low_2ghz_chan;
3865 			arg[i].end_freq = hal_reg_cap->high_2ghz_chan;
3866 			break;
3867 		case WMI_HOST_WLAN_5GHZ_CAP:
3868 			arg[i].start_freq = hal_reg_cap->low_5ghz_chan;
3869 			arg[i].end_freq = hal_reg_cap->high_5ghz_chan;
3870 			break;
3871 		default:
3872 			break;
3873 		}
3874 	}
3875 }
3876 
3877 static void
ath12k_wmi_copy_resource_config(struct ath12k_base * ab,struct ath12k_wmi_resource_config_params * wmi_cfg,struct ath12k_wmi_resource_config_arg * tg_cfg)3878 ath12k_wmi_copy_resource_config(struct ath12k_base *ab,
3879 				struct ath12k_wmi_resource_config_params *wmi_cfg,
3880 				struct ath12k_wmi_resource_config_arg *tg_cfg)
3881 {
3882 	wmi_cfg->num_vdevs = cpu_to_le32(tg_cfg->num_vdevs);
3883 	wmi_cfg->num_peers = cpu_to_le32(tg_cfg->num_peers);
3884 	wmi_cfg->num_offload_peers = cpu_to_le32(tg_cfg->num_offload_peers);
3885 	wmi_cfg->num_offload_reorder_buffs =
3886 		cpu_to_le32(tg_cfg->num_offload_reorder_buffs);
3887 	wmi_cfg->num_peer_keys = cpu_to_le32(tg_cfg->num_peer_keys);
3888 	wmi_cfg->num_tids = cpu_to_le32(tg_cfg->num_tids);
3889 	wmi_cfg->ast_skid_limit = cpu_to_le32(tg_cfg->ast_skid_limit);
3890 	wmi_cfg->tx_chain_mask = cpu_to_le32(tg_cfg->tx_chain_mask);
3891 	wmi_cfg->rx_chain_mask = cpu_to_le32(tg_cfg->rx_chain_mask);
3892 	wmi_cfg->rx_timeout_pri[0] = cpu_to_le32(tg_cfg->rx_timeout_pri[0]);
3893 	wmi_cfg->rx_timeout_pri[1] = cpu_to_le32(tg_cfg->rx_timeout_pri[1]);
3894 	wmi_cfg->rx_timeout_pri[2] = cpu_to_le32(tg_cfg->rx_timeout_pri[2]);
3895 	wmi_cfg->rx_timeout_pri[3] = cpu_to_le32(tg_cfg->rx_timeout_pri[3]);
3896 	wmi_cfg->rx_decap_mode = cpu_to_le32(tg_cfg->rx_decap_mode);
3897 	wmi_cfg->scan_max_pending_req = cpu_to_le32(tg_cfg->scan_max_pending_req);
3898 	wmi_cfg->bmiss_offload_max_vdev = cpu_to_le32(tg_cfg->bmiss_offload_max_vdev);
3899 	wmi_cfg->roam_offload_max_vdev = cpu_to_le32(tg_cfg->roam_offload_max_vdev);
3900 	wmi_cfg->roam_offload_max_ap_profiles =
3901 		cpu_to_le32(tg_cfg->roam_offload_max_ap_profiles);
3902 	wmi_cfg->num_mcast_groups = cpu_to_le32(tg_cfg->num_mcast_groups);
3903 	wmi_cfg->num_mcast_table_elems = cpu_to_le32(tg_cfg->num_mcast_table_elems);
3904 	wmi_cfg->mcast2ucast_mode = cpu_to_le32(tg_cfg->mcast2ucast_mode);
3905 	wmi_cfg->tx_dbg_log_size = cpu_to_le32(tg_cfg->tx_dbg_log_size);
3906 	wmi_cfg->num_wds_entries = cpu_to_le32(tg_cfg->num_wds_entries);
3907 	wmi_cfg->dma_burst_size = cpu_to_le32(tg_cfg->dma_burst_size);
3908 	wmi_cfg->mac_aggr_delim = cpu_to_le32(tg_cfg->mac_aggr_delim);
3909 	wmi_cfg->rx_skip_defrag_timeout_dup_detection_check =
3910 		cpu_to_le32(tg_cfg->rx_skip_defrag_timeout_dup_detection_check);
3911 	wmi_cfg->vow_config = cpu_to_le32(tg_cfg->vow_config);
3912 	wmi_cfg->gtk_offload_max_vdev = cpu_to_le32(tg_cfg->gtk_offload_max_vdev);
3913 	wmi_cfg->num_msdu_desc = cpu_to_le32(tg_cfg->num_msdu_desc);
3914 	wmi_cfg->max_frag_entries = cpu_to_le32(tg_cfg->max_frag_entries);
3915 	wmi_cfg->num_tdls_vdevs = cpu_to_le32(tg_cfg->num_tdls_vdevs);
3916 	wmi_cfg->num_tdls_conn_table_entries =
3917 		cpu_to_le32(tg_cfg->num_tdls_conn_table_entries);
3918 	wmi_cfg->beacon_tx_offload_max_vdev =
3919 		cpu_to_le32(tg_cfg->beacon_tx_offload_max_vdev);
3920 	wmi_cfg->num_multicast_filter_entries =
3921 		cpu_to_le32(tg_cfg->num_multicast_filter_entries);
3922 	wmi_cfg->num_wow_filters = cpu_to_le32(tg_cfg->num_wow_filters);
3923 	wmi_cfg->num_keep_alive_pattern = cpu_to_le32(tg_cfg->num_keep_alive_pattern);
3924 	wmi_cfg->keep_alive_pattern_size = cpu_to_le32(tg_cfg->keep_alive_pattern_size);
3925 	wmi_cfg->max_tdls_concurrent_sleep_sta =
3926 		cpu_to_le32(tg_cfg->max_tdls_concurrent_sleep_sta);
3927 	wmi_cfg->max_tdls_concurrent_buffer_sta =
3928 		cpu_to_le32(tg_cfg->max_tdls_concurrent_buffer_sta);
3929 	wmi_cfg->wmi_send_separate = cpu_to_le32(tg_cfg->wmi_send_separate);
3930 	wmi_cfg->num_ocb_vdevs = cpu_to_le32(tg_cfg->num_ocb_vdevs);
3931 	wmi_cfg->num_ocb_channels = cpu_to_le32(tg_cfg->num_ocb_channels);
3932 	wmi_cfg->num_ocb_schedules = cpu_to_le32(tg_cfg->num_ocb_schedules);
3933 	wmi_cfg->bpf_instruction_size = cpu_to_le32(tg_cfg->bpf_instruction_size);
3934 	wmi_cfg->max_bssid_rx_filters = cpu_to_le32(tg_cfg->max_bssid_rx_filters);
3935 	wmi_cfg->use_pdev_id = cpu_to_le32(tg_cfg->use_pdev_id);
3936 	wmi_cfg->flag1 = cpu_to_le32(tg_cfg->atf_config |
3937 				     WMI_RSRC_CFG_FLAG1_BSS_CHANNEL_INFO_64 |
3938 				     WMI_RSRC_CFG_FLAG1_ACK_RSSI);
3939 	wmi_cfg->peer_map_unmap_version = cpu_to_le32(tg_cfg->peer_map_unmap_version);
3940 	wmi_cfg->sched_params = cpu_to_le32(tg_cfg->sched_params);
3941 	wmi_cfg->twt_ap_pdev_count = cpu_to_le32(tg_cfg->twt_ap_pdev_count);
3942 	wmi_cfg->twt_ap_sta_count = cpu_to_le32(tg_cfg->twt_ap_sta_count);
3943 	wmi_cfg->flags2 = le32_encode_bits(tg_cfg->peer_metadata_ver,
3944 					   WMI_RSRC_CFG_FLAGS2_RX_PEER_METADATA_VERSION);
3945 	wmi_cfg->host_service_flags = cpu_to_le32(tg_cfg->is_reg_cc_ext_event_supported <<
3946 				WMI_RSRC_CFG_HOST_SVC_FLAG_REG_CC_EXT_SUPPORT_BIT);
3947 	if (ab->hw_params->reoq_lut_support)
3948 		wmi_cfg->host_service_flags |=
3949 			cpu_to_le32(1 << WMI_RSRC_CFG_HOST_SVC_FLAG_REO_QREF_SUPPORT_BIT);
3950 	wmi_cfg->ema_max_vap_cnt = cpu_to_le32(tg_cfg->ema_max_vap_cnt);
3951 	wmi_cfg->ema_max_profile_period = cpu_to_le32(tg_cfg->ema_max_profile_period);
3952 	wmi_cfg->flags2 |= cpu_to_le32(WMI_RSRC_CFG_FLAGS2_CALC_NEXT_DTIM_COUNT_SET);
3953 }
3954 
ath12k_init_cmd_send(struct ath12k_wmi_pdev * wmi,struct ath12k_wmi_init_cmd_arg * arg)3955 static int ath12k_init_cmd_send(struct ath12k_wmi_pdev *wmi,
3956 				struct ath12k_wmi_init_cmd_arg *arg)
3957 {
3958 	struct ath12k_base *ab = wmi->wmi_ab->ab;
3959 	struct sk_buff *skb;
3960 	struct wmi_init_cmd *cmd;
3961 	struct ath12k_wmi_resource_config_params *cfg;
3962 	struct ath12k_wmi_pdev_set_hw_mode_cmd *hw_mode;
3963 	struct ath12k_wmi_pdev_band_to_mac_params *band_to_mac;
3964 	struct ath12k_wmi_host_mem_chunk_params *host_mem_chunks;
3965 	struct wmi_tlv *tlv;
3966 	size_t ret, len;
3967 	void *ptr;
3968 	u32 hw_mode_len = 0;
3969 	u16 idx;
3970 
3971 	if (arg->hw_mode_id != WMI_HOST_HW_MODE_MAX)
3972 		hw_mode_len = sizeof(*hw_mode) + TLV_HDR_SIZE +
3973 			      (arg->num_band_to_mac * sizeof(*band_to_mac));
3974 
3975 	len = sizeof(*cmd) + TLV_HDR_SIZE + sizeof(*cfg) + hw_mode_len +
3976 	      (arg->num_mem_chunks ? (sizeof(*host_mem_chunks) * WMI_MAX_MEM_REQS) : 0);
3977 
3978 	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
3979 	if (!skb)
3980 		return -ENOMEM;
3981 
3982 	cmd = (struct wmi_init_cmd *)skb->data;
3983 
3984 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_INIT_CMD,
3985 						 sizeof(*cmd));
3986 
3987 	ptr = skb->data + sizeof(*cmd);
3988 	cfg = ptr;
3989 
3990 	ath12k_wmi_copy_resource_config(ab, cfg, &arg->res_cfg);
3991 
3992 	cfg->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_RESOURCE_CONFIG,
3993 						 sizeof(*cfg));
3994 
3995 	ptr += sizeof(*cfg);
3996 	host_mem_chunks = ptr + TLV_HDR_SIZE;
3997 	len = sizeof(struct ath12k_wmi_host_mem_chunk_params);
3998 
3999 	for (idx = 0; idx < arg->num_mem_chunks; ++idx) {
4000 		host_mem_chunks[idx].tlv_header =
4001 			ath12k_wmi_tlv_hdr(WMI_TAG_WLAN_HOST_MEMORY_CHUNK,
4002 					   len);
4003 
4004 		host_mem_chunks[idx].ptr = cpu_to_le32(arg->mem_chunks[idx].paddr);
4005 		host_mem_chunks[idx].size = cpu_to_le32(arg->mem_chunks[idx].len);
4006 		host_mem_chunks[idx].req_id = cpu_to_le32(arg->mem_chunks[idx].req_id);
4007 
4008 		ath12k_dbg(ab, ATH12K_DBG_WMI,
4009 			   "WMI host mem chunk req_id %d paddr 0x%llx len %d\n",
4010 			   arg->mem_chunks[idx].req_id,
4011 			   (u64)arg->mem_chunks[idx].paddr,
4012 			   arg->mem_chunks[idx].len);
4013 	}
4014 	cmd->num_host_mem_chunks = cpu_to_le32(arg->num_mem_chunks);
4015 	len = sizeof(struct ath12k_wmi_host_mem_chunk_params) * arg->num_mem_chunks;
4016 
4017 	/* num_mem_chunks is zero */
4018 	tlv = ptr;
4019 	tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len);
4020 	ptr += TLV_HDR_SIZE + len;
4021 
4022 	if (arg->hw_mode_id != WMI_HOST_HW_MODE_MAX) {
4023 		hw_mode = (struct ath12k_wmi_pdev_set_hw_mode_cmd *)ptr;
4024 		hw_mode->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SET_HW_MODE_CMD,
4025 							     sizeof(*hw_mode));
4026 
4027 		hw_mode->hw_mode_index = cpu_to_le32(arg->hw_mode_id);
4028 		hw_mode->num_band_to_mac = cpu_to_le32(arg->num_band_to_mac);
4029 
4030 		ptr += sizeof(*hw_mode);
4031 
4032 		len = arg->num_band_to_mac * sizeof(*band_to_mac);
4033 		tlv = ptr;
4034 		tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len);
4035 
4036 		ptr += TLV_HDR_SIZE;
4037 		len = sizeof(*band_to_mac);
4038 
4039 		for (idx = 0; idx < arg->num_band_to_mac; idx++) {
4040 			band_to_mac = (void *)ptr;
4041 
4042 			band_to_mac->tlv_header =
4043 				ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_BAND_TO_MAC,
4044 						       len);
4045 			band_to_mac->pdev_id = cpu_to_le32(arg->band_to_mac[idx].pdev_id);
4046 			band_to_mac->start_freq =
4047 				cpu_to_le32(arg->band_to_mac[idx].start_freq);
4048 			band_to_mac->end_freq =
4049 				cpu_to_le32(arg->band_to_mac[idx].end_freq);
4050 			ptr += sizeof(*band_to_mac);
4051 		}
4052 	}
4053 
4054 	ret = ath12k_wmi_cmd_send(wmi, skb, WMI_INIT_CMDID);
4055 	if (ret) {
4056 		ath12k_warn(ab, "failed to send WMI_INIT_CMDID\n");
4057 		dev_kfree_skb(skb);
4058 	}
4059 
4060 	return ret;
4061 }
4062 
ath12k_wmi_pdev_lro_cfg(struct ath12k * ar,int pdev_id)4063 int ath12k_wmi_pdev_lro_cfg(struct ath12k *ar,
4064 			    int pdev_id)
4065 {
4066 	struct ath12k_wmi_pdev_lro_config_cmd *cmd;
4067 	struct sk_buff *skb;
4068 	int ret;
4069 
4070 	skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, sizeof(*cmd));
4071 	if (!skb)
4072 		return -ENOMEM;
4073 
4074 	cmd = (struct ath12k_wmi_pdev_lro_config_cmd *)skb->data;
4075 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_LRO_INFO_CMD,
4076 						 sizeof(*cmd));
4077 
4078 	get_random_bytes(cmd->th_4, sizeof(cmd->th_4));
4079 	get_random_bytes(cmd->th_6, sizeof(cmd->th_6));
4080 
4081 	cmd->pdev_id = cpu_to_le32(pdev_id);
4082 
4083 	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
4084 		   "WMI lro cfg cmd pdev_id 0x%x\n", pdev_id);
4085 
4086 	ret = ath12k_wmi_cmd_send(ar->wmi, skb, WMI_LRO_CONFIG_CMDID);
4087 	if (ret) {
4088 		ath12k_warn(ar->ab,
4089 			    "failed to send lro cfg req wmi cmd\n");
4090 		goto err;
4091 	}
4092 
4093 	return 0;
4094 err:
4095 	dev_kfree_skb(skb);
4096 	return ret;
4097 }
4098 
ath12k_wmi_wait_for_service_ready(struct ath12k_base * ab)4099 int ath12k_wmi_wait_for_service_ready(struct ath12k_base *ab)
4100 {
4101 	unsigned long time_left;
4102 
4103 	time_left = wait_for_completion_timeout(&ab->wmi_ab.service_ready,
4104 						WMI_SERVICE_READY_TIMEOUT_HZ);
4105 	if (!time_left)
4106 		return -ETIMEDOUT;
4107 
4108 	return 0;
4109 }
4110 
ath12k_wmi_wait_for_unified_ready(struct ath12k_base * ab)4111 int ath12k_wmi_wait_for_unified_ready(struct ath12k_base *ab)
4112 {
4113 	unsigned long time_left;
4114 
4115 	time_left = wait_for_completion_timeout(&ab->wmi_ab.unified_ready,
4116 						WMI_SERVICE_READY_TIMEOUT_HZ);
4117 	if (!time_left)
4118 		return -ETIMEDOUT;
4119 
4120 	return 0;
4121 }
4122 
ath12k_wmi_set_hw_mode(struct ath12k_base * ab,enum wmi_host_hw_mode_config_type mode)4123 int ath12k_wmi_set_hw_mode(struct ath12k_base *ab,
4124 			   enum wmi_host_hw_mode_config_type mode)
4125 {
4126 	struct ath12k_wmi_pdev_set_hw_mode_cmd *cmd;
4127 	struct sk_buff *skb;
4128 	struct ath12k_wmi_base *wmi_ab = &ab->wmi_ab;
4129 	int len;
4130 	int ret;
4131 
4132 	len = sizeof(*cmd);
4133 
4134 	skb = ath12k_wmi_alloc_skb(wmi_ab, len);
4135 	if (!skb)
4136 		return -ENOMEM;
4137 
4138 	cmd = (struct ath12k_wmi_pdev_set_hw_mode_cmd *)skb->data;
4139 
4140 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SET_HW_MODE_CMD,
4141 						 sizeof(*cmd));
4142 
4143 	cmd->pdev_id = WMI_PDEV_ID_SOC;
4144 	cmd->hw_mode_index = cpu_to_le32(mode);
4145 
4146 	ret = ath12k_wmi_cmd_send(&wmi_ab->wmi[0], skb, WMI_PDEV_SET_HW_MODE_CMDID);
4147 	if (ret) {
4148 		ath12k_warn(ab, "failed to send WMI_PDEV_SET_HW_MODE_CMDID\n");
4149 		dev_kfree_skb(skb);
4150 	}
4151 
4152 	return ret;
4153 }
4154 
ath12k_wmi_cmd_init(struct ath12k_base * ab)4155 int ath12k_wmi_cmd_init(struct ath12k_base *ab)
4156 {
4157 	struct ath12k_wmi_base *wmi_ab = &ab->wmi_ab;
4158 	struct ath12k_wmi_init_cmd_arg arg = {};
4159 
4160 	if (test_bit(WMI_TLV_SERVICE_REG_CC_EXT_EVENT_SUPPORT,
4161 		     ab->wmi_ab.svc_map))
4162 		arg.res_cfg.is_reg_cc_ext_event_supported = true;
4163 
4164 	ab->hw_params->wmi_init(ab, &arg.res_cfg);
4165 	ab->wow.wmi_conf_rx_decap_mode = arg.res_cfg.rx_decap_mode;
4166 
4167 	arg.num_mem_chunks = wmi_ab->num_mem_chunks;
4168 	arg.hw_mode_id = wmi_ab->preferred_hw_mode;
4169 	arg.mem_chunks = wmi_ab->mem_chunks;
4170 
4171 	if (ab->hw_params->single_pdev_only)
4172 		arg.hw_mode_id = WMI_HOST_HW_MODE_MAX;
4173 
4174 	arg.num_band_to_mac = ab->num_radios;
4175 	ath12k_fill_band_to_mac_param(ab, arg.band_to_mac);
4176 
4177 	ab->dp.peer_metadata_ver = arg.res_cfg.peer_metadata_ver;
4178 
4179 	return ath12k_init_cmd_send(&wmi_ab->wmi[0], &arg);
4180 }
4181 
ath12k_wmi_vdev_spectral_conf(struct ath12k * ar,struct ath12k_wmi_vdev_spectral_conf_arg * arg)4182 int ath12k_wmi_vdev_spectral_conf(struct ath12k *ar,
4183 				  struct ath12k_wmi_vdev_spectral_conf_arg *arg)
4184 {
4185 	struct ath12k_wmi_vdev_spectral_conf_cmd *cmd;
4186 	struct sk_buff *skb;
4187 	int ret;
4188 
4189 	skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, sizeof(*cmd));
4190 	if (!skb)
4191 		return -ENOMEM;
4192 
4193 	cmd = (struct ath12k_wmi_vdev_spectral_conf_cmd *)skb->data;
4194 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_SPECTRAL_CONFIGURE_CMD,
4195 						 sizeof(*cmd));
4196 	cmd->vdev_id = cpu_to_le32(arg->vdev_id);
4197 	cmd->scan_count = cpu_to_le32(arg->scan_count);
4198 	cmd->scan_period = cpu_to_le32(arg->scan_period);
4199 	cmd->scan_priority = cpu_to_le32(arg->scan_priority);
4200 	cmd->scan_fft_size = cpu_to_le32(arg->scan_fft_size);
4201 	cmd->scan_gc_ena = cpu_to_le32(arg->scan_gc_ena);
4202 	cmd->scan_restart_ena = cpu_to_le32(arg->scan_restart_ena);
4203 	cmd->scan_noise_floor_ref = cpu_to_le32(arg->scan_noise_floor_ref);
4204 	cmd->scan_init_delay = cpu_to_le32(arg->scan_init_delay);
4205 	cmd->scan_nb_tone_thr = cpu_to_le32(arg->scan_nb_tone_thr);
4206 	cmd->scan_str_bin_thr = cpu_to_le32(arg->scan_str_bin_thr);
4207 	cmd->scan_wb_rpt_mode = cpu_to_le32(arg->scan_wb_rpt_mode);
4208 	cmd->scan_rssi_rpt_mode = cpu_to_le32(arg->scan_rssi_rpt_mode);
4209 	cmd->scan_rssi_thr = cpu_to_le32(arg->scan_rssi_thr);
4210 	cmd->scan_pwr_format = cpu_to_le32(arg->scan_pwr_format);
4211 	cmd->scan_rpt_mode = cpu_to_le32(arg->scan_rpt_mode);
4212 	cmd->scan_bin_scale = cpu_to_le32(arg->scan_bin_scale);
4213 	cmd->scan_dbm_adj = cpu_to_le32(arg->scan_dbm_adj);
4214 	cmd->scan_chn_mask = cpu_to_le32(arg->scan_chn_mask);
4215 
4216 	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
4217 		   "WMI spectral scan config cmd vdev_id 0x%x\n",
4218 		   arg->vdev_id);
4219 
4220 	ret = ath12k_wmi_cmd_send(ar->wmi, skb,
4221 				  WMI_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID);
4222 	if (ret) {
4223 		ath12k_warn(ar->ab,
4224 			    "failed to send spectral scan config wmi cmd\n");
4225 		goto err;
4226 	}
4227 
4228 	return 0;
4229 err:
4230 	dev_kfree_skb(skb);
4231 	return ret;
4232 }
4233 
ath12k_wmi_vdev_spectral_enable(struct ath12k * ar,u32 vdev_id,u32 trigger,u32 enable)4234 int ath12k_wmi_vdev_spectral_enable(struct ath12k *ar, u32 vdev_id,
4235 				    u32 trigger, u32 enable)
4236 {
4237 	struct ath12k_wmi_vdev_spectral_enable_cmd *cmd;
4238 	struct sk_buff *skb;
4239 	int ret;
4240 
4241 	skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, sizeof(*cmd));
4242 	if (!skb)
4243 		return -ENOMEM;
4244 
4245 	cmd = (struct ath12k_wmi_vdev_spectral_enable_cmd *)skb->data;
4246 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_SPECTRAL_ENABLE_CMD,
4247 						 sizeof(*cmd));
4248 
4249 	cmd->vdev_id = cpu_to_le32(vdev_id);
4250 	cmd->trigger_cmd = cpu_to_le32(trigger);
4251 	cmd->enable_cmd = cpu_to_le32(enable);
4252 
4253 	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
4254 		   "WMI spectral enable cmd vdev id 0x%x\n",
4255 		   vdev_id);
4256 
4257 	ret = ath12k_wmi_cmd_send(ar->wmi, skb,
4258 				  WMI_VDEV_SPECTRAL_SCAN_ENABLE_CMDID);
4259 	if (ret) {
4260 		ath12k_warn(ar->ab,
4261 			    "failed to send spectral enable wmi cmd\n");
4262 		goto err;
4263 	}
4264 
4265 	return 0;
4266 err:
4267 	dev_kfree_skb(skb);
4268 	return ret;
4269 }
4270 
ath12k_wmi_pdev_dma_ring_cfg(struct ath12k * ar,struct ath12k_wmi_pdev_dma_ring_cfg_arg * arg)4271 int ath12k_wmi_pdev_dma_ring_cfg(struct ath12k *ar,
4272 				 struct ath12k_wmi_pdev_dma_ring_cfg_arg *arg)
4273 {
4274 	struct ath12k_wmi_pdev_dma_ring_cfg_req_cmd *cmd;
4275 	struct sk_buff *skb;
4276 	int ret;
4277 
4278 	skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, sizeof(*cmd));
4279 	if (!skb)
4280 		return -ENOMEM;
4281 
4282 	cmd = (struct ath12k_wmi_pdev_dma_ring_cfg_req_cmd *)skb->data;
4283 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_DMA_RING_CFG_REQ,
4284 						 sizeof(*cmd));
4285 
4286 	cmd->pdev_id = cpu_to_le32(arg->pdev_id);
4287 	cmd->module_id = cpu_to_le32(arg->module_id);
4288 	cmd->base_paddr_lo = cpu_to_le32(arg->base_paddr_lo);
4289 	cmd->base_paddr_hi = cpu_to_le32(arg->base_paddr_hi);
4290 	cmd->head_idx_paddr_lo = cpu_to_le32(arg->head_idx_paddr_lo);
4291 	cmd->head_idx_paddr_hi = cpu_to_le32(arg->head_idx_paddr_hi);
4292 	cmd->tail_idx_paddr_lo = cpu_to_le32(arg->tail_idx_paddr_lo);
4293 	cmd->tail_idx_paddr_hi = cpu_to_le32(arg->tail_idx_paddr_hi);
4294 	cmd->num_elems = cpu_to_le32(arg->num_elems);
4295 	cmd->buf_size = cpu_to_le32(arg->buf_size);
4296 	cmd->num_resp_per_event = cpu_to_le32(arg->num_resp_per_event);
4297 	cmd->event_timeout_ms = cpu_to_le32(arg->event_timeout_ms);
4298 
4299 	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
4300 		   "WMI DMA ring cfg req cmd pdev_id 0x%x\n",
4301 		   arg->pdev_id);
4302 
4303 	ret = ath12k_wmi_cmd_send(ar->wmi, skb,
4304 				  WMI_PDEV_DMA_RING_CFG_REQ_CMDID);
4305 	if (ret) {
4306 		ath12k_warn(ar->ab,
4307 			    "failed to send dma ring cfg req wmi cmd\n");
4308 		goto err;
4309 	}
4310 
4311 	return 0;
4312 err:
4313 	dev_kfree_skb(skb);
4314 	return ret;
4315 }
4316 
ath12k_wmi_dma_buf_entry_parse(struct ath12k_base * soc,u16 tag,u16 len,const void * ptr,void * data)4317 static int ath12k_wmi_dma_buf_entry_parse(struct ath12k_base *soc,
4318 					  u16 tag, u16 len,
4319 					  const void *ptr, void *data)
4320 {
4321 	struct ath12k_wmi_dma_buf_release_arg *arg = data;
4322 
4323 	if (tag != WMI_TAG_DMA_BUF_RELEASE_ENTRY)
4324 		return -EPROTO;
4325 
4326 	if (arg->num_buf_entry >= le32_to_cpu(arg->fixed.num_buf_release_entry))
4327 		return -ENOBUFS;
4328 
4329 	arg->num_buf_entry++;
4330 	return 0;
4331 }
4332 
ath12k_wmi_dma_buf_meta_parse(struct ath12k_base * soc,u16 tag,u16 len,const void * ptr,void * data)4333 static int ath12k_wmi_dma_buf_meta_parse(struct ath12k_base *soc,
4334 					 u16 tag, u16 len,
4335 					 const void *ptr, void *data)
4336 {
4337 	struct ath12k_wmi_dma_buf_release_arg *arg = data;
4338 
4339 	if (tag != WMI_TAG_DMA_BUF_RELEASE_SPECTRAL_META_DATA)
4340 		return -EPROTO;
4341 
4342 	if (arg->num_meta >= le32_to_cpu(arg->fixed.num_meta_data_entry))
4343 		return -ENOBUFS;
4344 
4345 	arg->num_meta++;
4346 
4347 	return 0;
4348 }
4349 
ath12k_wmi_dma_buf_parse(struct ath12k_base * ab,u16 tag,u16 len,const void * ptr,void * data)4350 static int ath12k_wmi_dma_buf_parse(struct ath12k_base *ab,
4351 				    u16 tag, u16 len,
4352 				    const void *ptr, void *data)
4353 {
4354 	struct ath12k_wmi_dma_buf_release_arg *arg = data;
4355 	const struct ath12k_wmi_dma_buf_release_fixed_params *fixed;
4356 	u32 pdev_id;
4357 	int ret;
4358 
4359 	switch (tag) {
4360 	case WMI_TAG_DMA_BUF_RELEASE:
4361 		fixed = ptr;
4362 		arg->fixed = *fixed;
4363 		pdev_id = DP_HW2SW_MACID(le32_to_cpu(fixed->pdev_id));
4364 		arg->fixed.pdev_id = cpu_to_le32(pdev_id);
4365 		break;
4366 	case WMI_TAG_ARRAY_STRUCT:
4367 		if (!arg->buf_entry_done) {
4368 			arg->num_buf_entry = 0;
4369 			arg->buf_entry = ptr;
4370 
4371 			ret = ath12k_wmi_tlv_iter(ab, ptr, len,
4372 						  ath12k_wmi_dma_buf_entry_parse,
4373 						  arg);
4374 			if (ret) {
4375 				ath12k_warn(ab, "failed to parse dma buf entry tlv %d\n",
4376 					    ret);
4377 				return ret;
4378 			}
4379 
4380 			arg->buf_entry_done = true;
4381 		} else if (!arg->meta_data_done) {
4382 			arg->num_meta = 0;
4383 			arg->meta_data = ptr;
4384 
4385 			ret = ath12k_wmi_tlv_iter(ab, ptr, len,
4386 						  ath12k_wmi_dma_buf_meta_parse,
4387 						  arg);
4388 			if (ret) {
4389 				ath12k_warn(ab, "failed to parse dma buf meta tlv %d\n",
4390 					    ret);
4391 				return ret;
4392 			}
4393 
4394 			arg->meta_data_done = true;
4395 		}
4396 		break;
4397 	default:
4398 		break;
4399 	}
4400 	return 0;
4401 }
4402 
ath12k_wmi_pdev_dma_ring_buf_release_event(struct ath12k_base * ab,struct sk_buff * skb)4403 static void ath12k_wmi_pdev_dma_ring_buf_release_event(struct ath12k_base *ab,
4404 						       struct sk_buff *skb)
4405 {
4406 	struct ath12k_wmi_dma_buf_release_arg arg = {};
4407 	struct ath12k_dbring_buf_release_event param;
4408 	int ret;
4409 
4410 	ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len,
4411 				  ath12k_wmi_dma_buf_parse,
4412 				  &arg);
4413 	if (ret) {
4414 		ath12k_warn(ab, "failed to parse dma buf release tlv %d\n", ret);
4415 		return;
4416 	}
4417 
4418 	param.fixed = arg.fixed;
4419 	param.buf_entry = arg.buf_entry;
4420 	param.num_buf_entry = arg.num_buf_entry;
4421 	param.meta_data = arg.meta_data;
4422 	param.num_meta = arg.num_meta;
4423 
4424 	ret = ath12k_dbring_buffer_release_event(ab, &param);
4425 	if (ret) {
4426 		ath12k_warn(ab, "failed to handle dma buf release event %d\n", ret);
4427 		return;
4428 	}
4429 }
4430 
ath12k_wmi_hw_mode_caps_parse(struct ath12k_base * soc,u16 tag,u16 len,const void * ptr,void * data)4431 static int ath12k_wmi_hw_mode_caps_parse(struct ath12k_base *soc,
4432 					 u16 tag, u16 len,
4433 					 const void *ptr, void *data)
4434 {
4435 	struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data;
4436 	struct ath12k_wmi_hw_mode_cap_params *hw_mode_cap;
4437 	u32 phy_map = 0;
4438 
4439 	if (tag != WMI_TAG_HW_MODE_CAPABILITIES)
4440 		return -EPROTO;
4441 
4442 	if (svc_rdy_ext->n_hw_mode_caps >= svc_rdy_ext->arg.num_hw_modes)
4443 		return -ENOBUFS;
4444 
4445 	hw_mode_cap = container_of(ptr, struct ath12k_wmi_hw_mode_cap_params,
4446 				   hw_mode_id);
4447 	svc_rdy_ext->n_hw_mode_caps++;
4448 
4449 	phy_map = le32_to_cpu(hw_mode_cap->phy_id_map);
4450 	svc_rdy_ext->tot_phy_id += fls(phy_map);
4451 
4452 	return 0;
4453 }
4454 
ath12k_wmi_hw_mode_caps(struct ath12k_base * soc,u16 len,const void * ptr,void * data)4455 static int ath12k_wmi_hw_mode_caps(struct ath12k_base *soc,
4456 				   u16 len, const void *ptr, void *data)
4457 {
4458 	struct ath12k_svc_ext_info *svc_ext_info = &soc->wmi_ab.svc_ext_info;
4459 	struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data;
4460 	const struct ath12k_wmi_hw_mode_cap_params *hw_mode_caps;
4461 	enum wmi_host_hw_mode_config_type mode, pref;
4462 	u32 i;
4463 	int ret;
4464 
4465 	svc_rdy_ext->n_hw_mode_caps = 0;
4466 	svc_rdy_ext->hw_mode_caps = ptr;
4467 
4468 	ret = ath12k_wmi_tlv_iter(soc, ptr, len,
4469 				  ath12k_wmi_hw_mode_caps_parse,
4470 				  svc_rdy_ext);
4471 	if (ret) {
4472 		ath12k_warn(soc, "failed to parse tlv %d\n", ret);
4473 		return ret;
4474 	}
4475 
4476 	for (i = 0 ; i < svc_rdy_ext->n_hw_mode_caps; i++) {
4477 		hw_mode_caps = &svc_rdy_ext->hw_mode_caps[i];
4478 		mode = le32_to_cpu(hw_mode_caps->hw_mode_id);
4479 
4480 		if (mode >= WMI_HOST_HW_MODE_MAX)
4481 			continue;
4482 
4483 		pref = soc->wmi_ab.preferred_hw_mode;
4484 
4485 		if (ath12k_hw_mode_pri_map[mode] < ath12k_hw_mode_pri_map[pref]) {
4486 			svc_rdy_ext->pref_hw_mode_caps = *hw_mode_caps;
4487 			soc->wmi_ab.preferred_hw_mode = mode;
4488 		}
4489 	}
4490 
4491 	svc_ext_info->num_hw_modes = svc_rdy_ext->n_hw_mode_caps;
4492 
4493 	ath12k_dbg(soc, ATH12K_DBG_WMI, "num hw modes %u preferred_hw_mode %d\n",
4494 		   svc_ext_info->num_hw_modes, soc->wmi_ab.preferred_hw_mode);
4495 
4496 	if (soc->wmi_ab.preferred_hw_mode == WMI_HOST_HW_MODE_MAX)
4497 		return -EINVAL;
4498 
4499 	return 0;
4500 }
4501 
ath12k_wmi_mac_phy_caps_parse(struct ath12k_base * soc,u16 tag,u16 len,const void * ptr,void * data)4502 static int ath12k_wmi_mac_phy_caps_parse(struct ath12k_base *soc,
4503 					 u16 tag, u16 len,
4504 					 const void *ptr, void *data)
4505 {
4506 	struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data;
4507 
4508 	if (tag != WMI_TAG_MAC_PHY_CAPABILITIES)
4509 		return -EPROTO;
4510 
4511 	if (svc_rdy_ext->n_mac_phy_caps >= svc_rdy_ext->tot_phy_id)
4512 		return -ENOBUFS;
4513 
4514 	len = min_t(u16, len, sizeof(struct ath12k_wmi_mac_phy_caps_params));
4515 	if (!svc_rdy_ext->n_mac_phy_caps) {
4516 		svc_rdy_ext->mac_phy_caps = kzalloc((svc_rdy_ext->tot_phy_id) * len,
4517 						    GFP_ATOMIC);
4518 		if (!svc_rdy_ext->mac_phy_caps)
4519 			return -ENOMEM;
4520 	}
4521 
4522 	memcpy(svc_rdy_ext->mac_phy_caps + svc_rdy_ext->n_mac_phy_caps, ptr, len);
4523 	svc_rdy_ext->n_mac_phy_caps++;
4524 	return 0;
4525 }
4526 
ath12k_wmi_ext_hal_reg_caps_parse(struct ath12k_base * soc,u16 tag,u16 len,const void * ptr,void * data)4527 static int ath12k_wmi_ext_hal_reg_caps_parse(struct ath12k_base *soc,
4528 					     u16 tag, u16 len,
4529 					     const void *ptr, void *data)
4530 {
4531 	struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data;
4532 
4533 	if (tag != WMI_TAG_HAL_REG_CAPABILITIES_EXT)
4534 		return -EPROTO;
4535 
4536 	if (svc_rdy_ext->n_ext_hal_reg_caps >= svc_rdy_ext->arg.num_phy)
4537 		return -ENOBUFS;
4538 
4539 	svc_rdy_ext->n_ext_hal_reg_caps++;
4540 	return 0;
4541 }
4542 
ath12k_wmi_ext_hal_reg_caps(struct ath12k_base * soc,u16 len,const void * ptr,void * data)4543 static int ath12k_wmi_ext_hal_reg_caps(struct ath12k_base *soc,
4544 				       u16 len, const void *ptr, void *data)
4545 {
4546 	struct ath12k_wmi_pdev *wmi_handle = &soc->wmi_ab.wmi[0];
4547 	struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data;
4548 	struct ath12k_wmi_hal_reg_capabilities_ext_arg reg_cap;
4549 	int ret;
4550 	u32 i;
4551 
4552 	svc_rdy_ext->n_ext_hal_reg_caps = 0;
4553 	svc_rdy_ext->ext_hal_reg_caps = ptr;
4554 	ret = ath12k_wmi_tlv_iter(soc, ptr, len,
4555 				  ath12k_wmi_ext_hal_reg_caps_parse,
4556 				  svc_rdy_ext);
4557 	if (ret) {
4558 		ath12k_warn(soc, "failed to parse tlv %d\n", ret);
4559 		return ret;
4560 	}
4561 
4562 	for (i = 0; i < svc_rdy_ext->arg.num_phy; i++) {
4563 		ret = ath12k_pull_reg_cap_svc_rdy_ext(wmi_handle,
4564 						      svc_rdy_ext->soc_hal_reg_caps,
4565 						      svc_rdy_ext->ext_hal_reg_caps, i,
4566 						      &reg_cap);
4567 		if (ret) {
4568 			ath12k_warn(soc, "failed to extract reg cap %d\n", i);
4569 			return ret;
4570 		}
4571 
4572 		if (reg_cap.phy_id >= MAX_RADIOS) {
4573 			ath12k_warn(soc, "unexpected phy id %u\n", reg_cap.phy_id);
4574 			return -EINVAL;
4575 		}
4576 
4577 		soc->hal_reg_cap[reg_cap.phy_id] = reg_cap;
4578 	}
4579 	return 0;
4580 }
4581 
ath12k_wmi_ext_soc_hal_reg_caps_parse(struct ath12k_base * soc,u16 len,const void * ptr,void * data)4582 static int ath12k_wmi_ext_soc_hal_reg_caps_parse(struct ath12k_base *soc,
4583 						 u16 len, const void *ptr,
4584 						 void *data)
4585 {
4586 	struct ath12k_wmi_pdev *wmi_handle = &soc->wmi_ab.wmi[0];
4587 	struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data;
4588 	u8 hw_mode_id = le32_to_cpu(svc_rdy_ext->pref_hw_mode_caps.hw_mode_id);
4589 	u32 phy_id_map;
4590 	int pdev_index = 0;
4591 	int ret;
4592 
4593 	svc_rdy_ext->soc_hal_reg_caps = ptr;
4594 	svc_rdy_ext->arg.num_phy = le32_to_cpu(svc_rdy_ext->soc_hal_reg_caps->num_phy);
4595 
4596 	soc->num_radios = 0;
4597 	phy_id_map = le32_to_cpu(svc_rdy_ext->pref_hw_mode_caps.phy_id_map);
4598 	soc->fw_pdev_count = 0;
4599 
4600 	while (phy_id_map && soc->num_radios < MAX_RADIOS) {
4601 		ret = ath12k_pull_mac_phy_cap_svc_ready_ext(wmi_handle,
4602 							    svc_rdy_ext,
4603 							    hw_mode_id, soc->num_radios,
4604 							    &soc->pdevs[pdev_index]);
4605 		if (ret) {
4606 			ath12k_warn(soc, "failed to extract mac caps, idx :%d\n",
4607 				    soc->num_radios);
4608 			return ret;
4609 		}
4610 
4611 		soc->num_radios++;
4612 
4613 		/* For single_pdev_only targets,
4614 		 * save mac_phy capability in the same pdev
4615 		 */
4616 		if (soc->hw_params->single_pdev_only)
4617 			pdev_index = 0;
4618 		else
4619 			pdev_index = soc->num_radios;
4620 
4621 		/* TODO: mac_phy_cap prints */
4622 		phy_id_map >>= 1;
4623 	}
4624 
4625 	if (soc->hw_params->single_pdev_only) {
4626 		soc->num_radios = 1;
4627 		soc->pdevs[0].pdev_id = 0;
4628 	}
4629 
4630 	return 0;
4631 }
4632 
ath12k_wmi_dma_ring_caps_parse(struct ath12k_base * soc,u16 tag,u16 len,const void * ptr,void * data)4633 static int ath12k_wmi_dma_ring_caps_parse(struct ath12k_base *soc,
4634 					  u16 tag, u16 len,
4635 					  const void *ptr, void *data)
4636 {
4637 	struct ath12k_wmi_dma_ring_caps_parse *parse = data;
4638 
4639 	if (tag != WMI_TAG_DMA_RING_CAPABILITIES)
4640 		return -EPROTO;
4641 
4642 	parse->n_dma_ring_caps++;
4643 	return 0;
4644 }
4645 
ath12k_wmi_alloc_dbring_caps(struct ath12k_base * ab,u32 num_cap)4646 static int ath12k_wmi_alloc_dbring_caps(struct ath12k_base *ab,
4647 					u32 num_cap)
4648 {
4649 	size_t sz;
4650 	void *ptr;
4651 
4652 	sz = num_cap * sizeof(struct ath12k_dbring_cap);
4653 	ptr = kzalloc(sz, GFP_ATOMIC);
4654 	if (!ptr)
4655 		return -ENOMEM;
4656 
4657 	ab->db_caps = ptr;
4658 	ab->num_db_cap = num_cap;
4659 
4660 	return 0;
4661 }
4662 
ath12k_wmi_free_dbring_caps(struct ath12k_base * ab)4663 static void ath12k_wmi_free_dbring_caps(struct ath12k_base *ab)
4664 {
4665 	kfree(ab->db_caps);
4666 	ab->db_caps = NULL;
4667 	ab->num_db_cap = 0;
4668 }
4669 
ath12k_wmi_dma_ring_caps(struct ath12k_base * ab,u16 len,const void * ptr,void * data)4670 static int ath12k_wmi_dma_ring_caps(struct ath12k_base *ab,
4671 				    u16 len, const void *ptr, void *data)
4672 {
4673 	struct ath12k_wmi_dma_ring_caps_parse *dma_caps_parse = data;
4674 	struct ath12k_wmi_dma_ring_caps_params *dma_caps;
4675 	struct ath12k_dbring_cap *dir_buff_caps;
4676 	int ret;
4677 	u32 i;
4678 
4679 	dma_caps_parse->n_dma_ring_caps = 0;
4680 	dma_caps = (struct ath12k_wmi_dma_ring_caps_params *)ptr;
4681 	ret = ath12k_wmi_tlv_iter(ab, ptr, len,
4682 				  ath12k_wmi_dma_ring_caps_parse,
4683 				  dma_caps_parse);
4684 	if (ret) {
4685 		ath12k_warn(ab, "failed to parse dma ring caps tlv %d\n", ret);
4686 		return ret;
4687 	}
4688 
4689 	if (!dma_caps_parse->n_dma_ring_caps)
4690 		return 0;
4691 
4692 	if (ab->num_db_cap) {
4693 		ath12k_warn(ab, "Already processed, so ignoring dma ring caps\n");
4694 		return 0;
4695 	}
4696 
4697 	ret = ath12k_wmi_alloc_dbring_caps(ab, dma_caps_parse->n_dma_ring_caps);
4698 	if (ret)
4699 		return ret;
4700 
4701 	dir_buff_caps = ab->db_caps;
4702 	for (i = 0; i < dma_caps_parse->n_dma_ring_caps; i++) {
4703 		if (le32_to_cpu(dma_caps[i].module_id) >= WMI_DIRECT_BUF_MAX) {
4704 			ath12k_warn(ab, "Invalid module id %d\n",
4705 				    le32_to_cpu(dma_caps[i].module_id));
4706 			ret = -EINVAL;
4707 			goto free_dir_buff;
4708 		}
4709 
4710 		dir_buff_caps[i].id = le32_to_cpu(dma_caps[i].module_id);
4711 		dir_buff_caps[i].pdev_id =
4712 			DP_HW2SW_MACID(le32_to_cpu(dma_caps[i].pdev_id));
4713 		dir_buff_caps[i].min_elem = le32_to_cpu(dma_caps[i].min_elem);
4714 		dir_buff_caps[i].min_buf_sz = le32_to_cpu(dma_caps[i].min_buf_sz);
4715 		dir_buff_caps[i].min_buf_align = le32_to_cpu(dma_caps[i].min_buf_align);
4716 	}
4717 
4718 	return 0;
4719 
4720 free_dir_buff:
4721 	ath12k_wmi_free_dbring_caps(ab);
4722 	return ret;
4723 }
4724 
4725 static void
ath12k_wmi_save_mac_phy_info(struct ath12k_base * ab,const struct ath12k_wmi_mac_phy_caps_params * mac_phy_cap,struct ath12k_svc_ext_mac_phy_info * mac_phy_info)4726 ath12k_wmi_save_mac_phy_info(struct ath12k_base *ab,
4727 			     const struct ath12k_wmi_mac_phy_caps_params *mac_phy_cap,
4728 			     struct ath12k_svc_ext_mac_phy_info *mac_phy_info)
4729 {
4730 	mac_phy_info->phy_id = __le32_to_cpu(mac_phy_cap->phy_id);
4731 	mac_phy_info->supported_bands = __le32_to_cpu(mac_phy_cap->supported_bands);
4732 	mac_phy_info->hw_freq_range.low_2ghz_freq =
4733 					__le32_to_cpu(mac_phy_cap->low_2ghz_chan_freq);
4734 	mac_phy_info->hw_freq_range.high_2ghz_freq =
4735 					__le32_to_cpu(mac_phy_cap->high_2ghz_chan_freq);
4736 	mac_phy_info->hw_freq_range.low_5ghz_freq =
4737 					__le32_to_cpu(mac_phy_cap->low_5ghz_chan_freq);
4738 	mac_phy_info->hw_freq_range.high_5ghz_freq =
4739 					__le32_to_cpu(mac_phy_cap->high_5ghz_chan_freq);
4740 }
4741 
4742 static void
ath12k_wmi_save_all_mac_phy_info(struct ath12k_base * ab,struct ath12k_wmi_svc_rdy_ext_parse * svc_rdy_ext)4743 ath12k_wmi_save_all_mac_phy_info(struct ath12k_base *ab,
4744 				 struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext)
4745 {
4746 	struct ath12k_svc_ext_info *svc_ext_info = &ab->wmi_ab.svc_ext_info;
4747 	const struct ath12k_wmi_mac_phy_caps_params *mac_phy_cap;
4748 	const struct ath12k_wmi_hw_mode_cap_params *hw_mode_cap;
4749 	struct ath12k_svc_ext_mac_phy_info *mac_phy_info;
4750 	u32 hw_mode_id, phy_bit_map;
4751 	u8 hw_idx;
4752 
4753 	mac_phy_info = &svc_ext_info->mac_phy_info[0];
4754 	mac_phy_cap = svc_rdy_ext->mac_phy_caps;
4755 
4756 	for (hw_idx = 0; hw_idx < svc_ext_info->num_hw_modes; hw_idx++) {
4757 		hw_mode_cap = &svc_rdy_ext->hw_mode_caps[hw_idx];
4758 		hw_mode_id = __le32_to_cpu(hw_mode_cap->hw_mode_id);
4759 		phy_bit_map = __le32_to_cpu(hw_mode_cap->phy_id_map);
4760 
4761 		while (phy_bit_map) {
4762 			ath12k_wmi_save_mac_phy_info(ab, mac_phy_cap, mac_phy_info);
4763 			mac_phy_info->hw_mode_config_type =
4764 					le32_get_bits(hw_mode_cap->hw_mode_config_type,
4765 						      WMI_HW_MODE_CAP_CFG_TYPE);
4766 			ath12k_dbg(ab, ATH12K_DBG_WMI,
4767 				   "hw_idx %u hw_mode_id %u hw_mode_config_type %u supported_bands %u phy_id %u 2 GHz [%u - %u] 5 GHz [%u - %u]\n",
4768 				   hw_idx, hw_mode_id,
4769 				   mac_phy_info->hw_mode_config_type,
4770 				   mac_phy_info->supported_bands, mac_phy_info->phy_id,
4771 				   mac_phy_info->hw_freq_range.low_2ghz_freq,
4772 				   mac_phy_info->hw_freq_range.high_2ghz_freq,
4773 				   mac_phy_info->hw_freq_range.low_5ghz_freq,
4774 				   mac_phy_info->hw_freq_range.high_5ghz_freq);
4775 
4776 			mac_phy_cap++;
4777 			mac_phy_info++;
4778 
4779 			phy_bit_map >>= 1;
4780 		}
4781 	}
4782 }
4783 
ath12k_wmi_svc_rdy_ext_parse(struct ath12k_base * ab,u16 tag,u16 len,const void * ptr,void * data)4784 static int ath12k_wmi_svc_rdy_ext_parse(struct ath12k_base *ab,
4785 					u16 tag, u16 len,
4786 					const void *ptr, void *data)
4787 {
4788 	struct ath12k_wmi_pdev *wmi_handle = &ab->wmi_ab.wmi[0];
4789 	struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data;
4790 	int ret;
4791 
4792 	switch (tag) {
4793 	case WMI_TAG_SERVICE_READY_EXT_EVENT:
4794 		ret = ath12k_pull_svc_ready_ext(wmi_handle, ptr,
4795 						&svc_rdy_ext->arg);
4796 		if (ret) {
4797 			ath12k_warn(ab, "unable to extract ext params\n");
4798 			return ret;
4799 		}
4800 		break;
4801 
4802 	case WMI_TAG_SOC_MAC_PHY_HW_MODE_CAPS:
4803 		svc_rdy_ext->hw_caps = ptr;
4804 		svc_rdy_ext->arg.num_hw_modes =
4805 			le32_to_cpu(svc_rdy_ext->hw_caps->num_hw_modes);
4806 		break;
4807 
4808 	case WMI_TAG_SOC_HAL_REG_CAPABILITIES:
4809 		ret = ath12k_wmi_ext_soc_hal_reg_caps_parse(ab, len, ptr,
4810 							    svc_rdy_ext);
4811 		if (ret)
4812 			return ret;
4813 		break;
4814 
4815 	case WMI_TAG_ARRAY_STRUCT:
4816 		if (!svc_rdy_ext->hw_mode_done) {
4817 			ret = ath12k_wmi_hw_mode_caps(ab, len, ptr, svc_rdy_ext);
4818 			if (ret)
4819 				return ret;
4820 
4821 			svc_rdy_ext->hw_mode_done = true;
4822 		} else if (!svc_rdy_ext->mac_phy_done) {
4823 			svc_rdy_ext->n_mac_phy_caps = 0;
4824 			ret = ath12k_wmi_tlv_iter(ab, ptr, len,
4825 						  ath12k_wmi_mac_phy_caps_parse,
4826 						  svc_rdy_ext);
4827 			if (ret) {
4828 				ath12k_warn(ab, "failed to parse tlv %d\n", ret);
4829 				return ret;
4830 			}
4831 
4832 			ath12k_wmi_save_all_mac_phy_info(ab, svc_rdy_ext);
4833 
4834 			svc_rdy_ext->mac_phy_done = true;
4835 		} else if (!svc_rdy_ext->ext_hal_reg_done) {
4836 			ret = ath12k_wmi_ext_hal_reg_caps(ab, len, ptr, svc_rdy_ext);
4837 			if (ret)
4838 				return ret;
4839 
4840 			svc_rdy_ext->ext_hal_reg_done = true;
4841 		} else if (!svc_rdy_ext->mac_phy_chainmask_combo_done) {
4842 			svc_rdy_ext->mac_phy_chainmask_combo_done = true;
4843 		} else if (!svc_rdy_ext->mac_phy_chainmask_cap_done) {
4844 			svc_rdy_ext->mac_phy_chainmask_cap_done = true;
4845 		} else if (!svc_rdy_ext->oem_dma_ring_cap_done) {
4846 			svc_rdy_ext->oem_dma_ring_cap_done = true;
4847 		} else if (!svc_rdy_ext->dma_ring_cap_done) {
4848 			ret = ath12k_wmi_dma_ring_caps(ab, len, ptr,
4849 						       &svc_rdy_ext->dma_caps_parse);
4850 			if (ret)
4851 				return ret;
4852 
4853 			svc_rdy_ext->dma_ring_cap_done = true;
4854 		}
4855 		break;
4856 
4857 	default:
4858 		break;
4859 	}
4860 	return 0;
4861 }
4862 
ath12k_service_ready_ext_event(struct ath12k_base * ab,struct sk_buff * skb)4863 static int ath12k_service_ready_ext_event(struct ath12k_base *ab,
4864 					  struct sk_buff *skb)
4865 {
4866 	struct ath12k_wmi_svc_rdy_ext_parse svc_rdy_ext = { };
4867 	int ret;
4868 
4869 	ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len,
4870 				  ath12k_wmi_svc_rdy_ext_parse,
4871 				  &svc_rdy_ext);
4872 	if (ret) {
4873 		ath12k_warn(ab, "failed to parse tlv %d\n", ret);
4874 		goto err;
4875 	}
4876 
4877 	if (!test_bit(WMI_TLV_SERVICE_EXT2_MSG, ab->wmi_ab.svc_map))
4878 		complete(&ab->wmi_ab.service_ready);
4879 
4880 	kfree(svc_rdy_ext.mac_phy_caps);
4881 	return 0;
4882 
4883 err:
4884 	kfree(svc_rdy_ext.mac_phy_caps);
4885 	ath12k_wmi_free_dbring_caps(ab);
4886 	return ret;
4887 }
4888 
ath12k_pull_svc_ready_ext2(struct ath12k_wmi_pdev * wmi_handle,const void * ptr,struct ath12k_wmi_svc_rdy_ext2_arg * arg)4889 static int ath12k_pull_svc_ready_ext2(struct ath12k_wmi_pdev *wmi_handle,
4890 				      const void *ptr,
4891 				      struct ath12k_wmi_svc_rdy_ext2_arg *arg)
4892 {
4893 	const struct wmi_service_ready_ext2_event *ev = ptr;
4894 
4895 	if (!ev)
4896 		return -EINVAL;
4897 
4898 	arg->reg_db_version = le32_to_cpu(ev->reg_db_version);
4899 	arg->hw_min_max_tx_power_2ghz = le32_to_cpu(ev->hw_min_max_tx_power_2ghz);
4900 	arg->hw_min_max_tx_power_5ghz = le32_to_cpu(ev->hw_min_max_tx_power_5ghz);
4901 	arg->chwidth_num_peer_caps = le32_to_cpu(ev->chwidth_num_peer_caps);
4902 	arg->preamble_puncture_bw = le32_to_cpu(ev->preamble_puncture_bw);
4903 	arg->max_user_per_ppdu_ofdma = le32_to_cpu(ev->max_user_per_ppdu_ofdma);
4904 	arg->max_user_per_ppdu_mumimo = le32_to_cpu(ev->max_user_per_ppdu_mumimo);
4905 	arg->target_cap_flags = le32_to_cpu(ev->target_cap_flags);
4906 	return 0;
4907 }
4908 
ath12k_wmi_eht_caps_parse(struct ath12k_pdev * pdev,u32 band,const __le32 cap_mac_info[],const __le32 cap_phy_info[],const __le32 supp_mcs[],const struct ath12k_wmi_ppe_threshold_params * ppet,__le32 cap_info_internal)4909 static void ath12k_wmi_eht_caps_parse(struct ath12k_pdev *pdev, u32 band,
4910 				      const __le32 cap_mac_info[],
4911 				      const __le32 cap_phy_info[],
4912 				      const __le32 supp_mcs[],
4913 				      const struct ath12k_wmi_ppe_threshold_params *ppet,
4914 				       __le32 cap_info_internal)
4915 {
4916 	struct ath12k_band_cap *cap_band = &pdev->cap.band[band];
4917 	u32 support_320mhz;
4918 	u8 i;
4919 
4920 	if (band == NL80211_BAND_6GHZ)
4921 		support_320mhz = cap_band->eht_cap_phy_info[0] &
4922 					IEEE80211_EHT_PHY_CAP0_320MHZ_IN_6GHZ;
4923 
4924 	for (i = 0; i < WMI_MAX_EHTCAP_MAC_SIZE; i++)
4925 		cap_band->eht_cap_mac_info[i] = le32_to_cpu(cap_mac_info[i]);
4926 
4927 	for (i = 0; i < WMI_MAX_EHTCAP_PHY_SIZE; i++)
4928 		cap_band->eht_cap_phy_info[i] = le32_to_cpu(cap_phy_info[i]);
4929 
4930 	if (band == NL80211_BAND_6GHZ)
4931 		cap_band->eht_cap_phy_info[0] |= support_320mhz;
4932 
4933 	cap_band->eht_mcs_20_only = le32_to_cpu(supp_mcs[0]);
4934 	cap_band->eht_mcs_80 = le32_to_cpu(supp_mcs[1]);
4935 	if (band != NL80211_BAND_2GHZ) {
4936 		cap_band->eht_mcs_160 = le32_to_cpu(supp_mcs[2]);
4937 		cap_band->eht_mcs_320 = le32_to_cpu(supp_mcs[3]);
4938 	}
4939 
4940 	cap_band->eht_ppet.numss_m1 = le32_to_cpu(ppet->numss_m1);
4941 	cap_band->eht_ppet.ru_bit_mask = le32_to_cpu(ppet->ru_info);
4942 	for (i = 0; i < WMI_MAX_NUM_SS; i++)
4943 		cap_band->eht_ppet.ppet16_ppet8_ru3_ru0[i] =
4944 			le32_to_cpu(ppet->ppet16_ppet8_ru3_ru0[i]);
4945 
4946 	cap_band->eht_cap_info_internal = le32_to_cpu(cap_info_internal);
4947 }
4948 
4949 static int
ath12k_wmi_tlv_mac_phy_caps_ext_parse(struct ath12k_base * ab,const struct ath12k_wmi_caps_ext_params * caps,struct ath12k_pdev * pdev)4950 ath12k_wmi_tlv_mac_phy_caps_ext_parse(struct ath12k_base *ab,
4951 				      const struct ath12k_wmi_caps_ext_params *caps,
4952 				      struct ath12k_pdev *pdev)
4953 {
4954 	struct ath12k_band_cap *cap_band;
4955 	u32 bands, support_320mhz;
4956 	int i;
4957 
4958 	if (ab->hw_params->single_pdev_only) {
4959 		if (caps->hw_mode_id == WMI_HOST_HW_MODE_SINGLE) {
4960 			support_320mhz = le32_to_cpu(caps->eht_cap_phy_info_5ghz[0]) &
4961 				IEEE80211_EHT_PHY_CAP0_320MHZ_IN_6GHZ;
4962 			cap_band = &pdev->cap.band[NL80211_BAND_6GHZ];
4963 			cap_band->eht_cap_phy_info[0] |= support_320mhz;
4964 			return 0;
4965 		}
4966 
4967 		for (i = 0; i < ab->fw_pdev_count; i++) {
4968 			struct ath12k_fw_pdev *fw_pdev = &ab->fw_pdev[i];
4969 
4970 			if (fw_pdev->pdev_id == ath12k_wmi_caps_ext_get_pdev_id(caps) &&
4971 			    fw_pdev->phy_id == le32_to_cpu(caps->phy_id)) {
4972 				bands = fw_pdev->supported_bands;
4973 				break;
4974 			}
4975 		}
4976 
4977 		if (i == ab->fw_pdev_count)
4978 			return -EINVAL;
4979 	} else {
4980 		bands = pdev->cap.supported_bands;
4981 	}
4982 
4983 	if (bands & WMI_HOST_WLAN_2GHZ_CAP) {
4984 		ath12k_wmi_eht_caps_parse(pdev, NL80211_BAND_2GHZ,
4985 					  caps->eht_cap_mac_info_2ghz,
4986 					  caps->eht_cap_phy_info_2ghz,
4987 					  caps->eht_supp_mcs_ext_2ghz,
4988 					  &caps->eht_ppet_2ghz,
4989 					  caps->eht_cap_info_internal);
4990 	}
4991 
4992 	if (bands & WMI_HOST_WLAN_5GHZ_CAP) {
4993 		ath12k_wmi_eht_caps_parse(pdev, NL80211_BAND_5GHZ,
4994 					  caps->eht_cap_mac_info_5ghz,
4995 					  caps->eht_cap_phy_info_5ghz,
4996 					  caps->eht_supp_mcs_ext_5ghz,
4997 					  &caps->eht_ppet_5ghz,
4998 					  caps->eht_cap_info_internal);
4999 
5000 		ath12k_wmi_eht_caps_parse(pdev, NL80211_BAND_6GHZ,
5001 					  caps->eht_cap_mac_info_5ghz,
5002 					  caps->eht_cap_phy_info_5ghz,
5003 					  caps->eht_supp_mcs_ext_5ghz,
5004 					  &caps->eht_ppet_5ghz,
5005 					  caps->eht_cap_info_internal);
5006 	}
5007 
5008 	pdev->cap.eml_cap = le32_to_cpu(caps->eml_capability);
5009 	pdev->cap.mld_cap = le32_to_cpu(caps->mld_capability);
5010 
5011 	return 0;
5012 }
5013 
ath12k_wmi_tlv_mac_phy_caps_ext(struct ath12k_base * ab,u16 tag,u16 len,const void * ptr,void * data)5014 static int ath12k_wmi_tlv_mac_phy_caps_ext(struct ath12k_base *ab, u16 tag,
5015 					   u16 len, const void *ptr,
5016 					   void *data)
5017 {
5018 	const struct ath12k_wmi_caps_ext_params *caps = ptr;
5019 	int i = 0, ret;
5020 
5021 	if (tag != WMI_TAG_MAC_PHY_CAPABILITIES_EXT)
5022 		return -EPROTO;
5023 
5024 	if (ab->hw_params->single_pdev_only) {
5025 		if (ab->wmi_ab.preferred_hw_mode != le32_to_cpu(caps->hw_mode_id) &&
5026 		    caps->hw_mode_id != WMI_HOST_HW_MODE_SINGLE)
5027 			return 0;
5028 	} else {
5029 		for (i = 0; i < ab->num_radios; i++) {
5030 			if (ab->pdevs[i].pdev_id ==
5031 			    ath12k_wmi_caps_ext_get_pdev_id(caps))
5032 				break;
5033 		}
5034 
5035 		if (i == ab->num_radios)
5036 			return -EINVAL;
5037 	}
5038 
5039 	ret = ath12k_wmi_tlv_mac_phy_caps_ext_parse(ab, caps, &ab->pdevs[i]);
5040 	if (ret) {
5041 		ath12k_warn(ab,
5042 			    "failed to parse extended MAC PHY capabilities for pdev %d: %d\n",
5043 			    ret, ab->pdevs[i].pdev_id);
5044 		return ret;
5045 	}
5046 
5047 	return 0;
5048 }
5049 
5050 static void
ath12k_wmi_update_freq_info(struct ath12k_base * ab,struct ath12k_svc_ext_mac_phy_info * mac_cap,enum ath12k_hw_mode mode,u32 phy_id)5051 ath12k_wmi_update_freq_info(struct ath12k_base *ab,
5052 			    struct ath12k_svc_ext_mac_phy_info *mac_cap,
5053 			    enum ath12k_hw_mode mode,
5054 			    u32 phy_id)
5055 {
5056 	struct ath12k_hw_mode_info *hw_mode_info = &ab->wmi_ab.hw_mode_info;
5057 	struct ath12k_hw_mode_freq_range_arg *mac_range;
5058 
5059 	mac_range = &hw_mode_info->freq_range_caps[mode][phy_id];
5060 
5061 	if (mac_cap->supported_bands & WMI_HOST_WLAN_2GHZ_CAP) {
5062 		mac_range->low_2ghz_freq = max_t(u32,
5063 						 mac_cap->hw_freq_range.low_2ghz_freq,
5064 						 ATH12K_MIN_2GHZ_FREQ);
5065 		mac_range->high_2ghz_freq = mac_cap->hw_freq_range.high_2ghz_freq ?
5066 					    min_t(u32,
5067 						  mac_cap->hw_freq_range.high_2ghz_freq,
5068 						  ATH12K_MAX_2GHZ_FREQ) :
5069 					    ATH12K_MAX_2GHZ_FREQ;
5070 	}
5071 
5072 	if (mac_cap->supported_bands & WMI_HOST_WLAN_5GHZ_CAP) {
5073 		mac_range->low_5ghz_freq = max_t(u32,
5074 						 mac_cap->hw_freq_range.low_5ghz_freq,
5075 						 ATH12K_MIN_5GHZ_FREQ);
5076 		mac_range->high_5ghz_freq = mac_cap->hw_freq_range.high_5ghz_freq ?
5077 					    min_t(u32,
5078 						  mac_cap->hw_freq_range.high_5ghz_freq,
5079 						  ATH12K_MAX_6GHZ_FREQ) :
5080 					    ATH12K_MAX_6GHZ_FREQ;
5081 	}
5082 }
5083 
5084 static bool
ath12k_wmi_all_phy_range_updated(struct ath12k_base * ab,enum ath12k_hw_mode hwmode)5085 ath12k_wmi_all_phy_range_updated(struct ath12k_base *ab,
5086 				 enum ath12k_hw_mode hwmode)
5087 {
5088 	struct ath12k_hw_mode_info *hw_mode_info = &ab->wmi_ab.hw_mode_info;
5089 	struct ath12k_hw_mode_freq_range_arg *mac_range;
5090 	u8 phy_id;
5091 
5092 	for (phy_id = 0; phy_id < MAX_RADIOS; phy_id++) {
5093 		mac_range = &hw_mode_info->freq_range_caps[hwmode][phy_id];
5094 		/* modify SBS/DBS range only when both phy for DBS are filled */
5095 		if (!mac_range->low_2ghz_freq && !mac_range->low_5ghz_freq)
5096 			return false;
5097 	}
5098 
5099 	return true;
5100 }
5101 
ath12k_wmi_update_dbs_freq_info(struct ath12k_base * ab)5102 static void ath12k_wmi_update_dbs_freq_info(struct ath12k_base *ab)
5103 {
5104 	struct ath12k_hw_mode_info *hw_mode_info = &ab->wmi_ab.hw_mode_info;
5105 	struct ath12k_hw_mode_freq_range_arg *mac_range;
5106 	u8 phy_id;
5107 
5108 	mac_range = hw_mode_info->freq_range_caps[ATH12K_HW_MODE_DBS];
5109 	/* Reset 5 GHz range for shared mac for DBS */
5110 	for (phy_id = 0; phy_id < MAX_RADIOS; phy_id++) {
5111 		if (mac_range[phy_id].low_2ghz_freq &&
5112 		    mac_range[phy_id].low_5ghz_freq) {
5113 			mac_range[phy_id].low_5ghz_freq = 0;
5114 			mac_range[phy_id].high_5ghz_freq = 0;
5115 		}
5116 	}
5117 }
5118 
5119 static u32
ath12k_wmi_get_highest_5ghz_freq_from_range(struct ath12k_hw_mode_freq_range_arg * range)5120 ath12k_wmi_get_highest_5ghz_freq_from_range(struct ath12k_hw_mode_freq_range_arg *range)
5121 {
5122 	u32 highest_freq = 0;
5123 	u8 phy_id;
5124 
5125 	for (phy_id = 0; phy_id < MAX_RADIOS; phy_id++) {
5126 		if (range[phy_id].high_5ghz_freq > highest_freq)
5127 			highest_freq = range[phy_id].high_5ghz_freq;
5128 	}
5129 
5130 	return highest_freq ? highest_freq : ATH12K_MAX_6GHZ_FREQ;
5131 }
5132 
5133 static u32
ath12k_wmi_get_lowest_5ghz_freq_from_range(struct ath12k_hw_mode_freq_range_arg * range)5134 ath12k_wmi_get_lowest_5ghz_freq_from_range(struct ath12k_hw_mode_freq_range_arg *range)
5135 {
5136 	u32 lowest_freq = 0;
5137 	u8 phy_id;
5138 
5139 	for (phy_id = 0; phy_id < MAX_RADIOS; phy_id++) {
5140 		if ((!lowest_freq && range[phy_id].low_5ghz_freq) ||
5141 		    range[phy_id].low_5ghz_freq < lowest_freq)
5142 			lowest_freq = range[phy_id].low_5ghz_freq;
5143 	}
5144 
5145 	return lowest_freq ? lowest_freq : ATH12K_MIN_5GHZ_FREQ;
5146 }
5147 
5148 static void
ath12k_wmi_fill_upper_share_sbs_freq(struct ath12k_base * ab,u16 sbs_range_sep,struct ath12k_hw_mode_freq_range_arg * ref_freq)5149 ath12k_wmi_fill_upper_share_sbs_freq(struct ath12k_base *ab,
5150 				     u16 sbs_range_sep,
5151 				     struct ath12k_hw_mode_freq_range_arg *ref_freq)
5152 {
5153 	struct ath12k_hw_mode_info *hw_mode_info = &ab->wmi_ab.hw_mode_info;
5154 	struct ath12k_hw_mode_freq_range_arg *upper_sbs_freq_range;
5155 	u8 phy_id;
5156 
5157 	upper_sbs_freq_range =
5158 			hw_mode_info->freq_range_caps[ATH12K_HW_MODE_SBS_UPPER_SHARE];
5159 
5160 	for (phy_id = 0; phy_id < MAX_RADIOS; phy_id++) {
5161 		upper_sbs_freq_range[phy_id].low_2ghz_freq =
5162 						ref_freq[phy_id].low_2ghz_freq;
5163 		upper_sbs_freq_range[phy_id].high_2ghz_freq =
5164 						ref_freq[phy_id].high_2ghz_freq;
5165 
5166 		/* update for shared mac */
5167 		if (upper_sbs_freq_range[phy_id].low_2ghz_freq) {
5168 			upper_sbs_freq_range[phy_id].low_5ghz_freq = sbs_range_sep + 10;
5169 			upper_sbs_freq_range[phy_id].high_5ghz_freq =
5170 				ath12k_wmi_get_highest_5ghz_freq_from_range(ref_freq);
5171 		} else {
5172 			upper_sbs_freq_range[phy_id].low_5ghz_freq =
5173 				ath12k_wmi_get_lowest_5ghz_freq_from_range(ref_freq);
5174 			upper_sbs_freq_range[phy_id].high_5ghz_freq = sbs_range_sep;
5175 		}
5176 	}
5177 }
5178 
5179 static void
ath12k_wmi_fill_lower_share_sbs_freq(struct ath12k_base * ab,u16 sbs_range_sep,struct ath12k_hw_mode_freq_range_arg * ref_freq)5180 ath12k_wmi_fill_lower_share_sbs_freq(struct ath12k_base *ab,
5181 				     u16 sbs_range_sep,
5182 				     struct ath12k_hw_mode_freq_range_arg *ref_freq)
5183 {
5184 	struct ath12k_hw_mode_info *hw_mode_info = &ab->wmi_ab.hw_mode_info;
5185 	struct ath12k_hw_mode_freq_range_arg *lower_sbs_freq_range;
5186 	u8 phy_id;
5187 
5188 	lower_sbs_freq_range =
5189 			hw_mode_info->freq_range_caps[ATH12K_HW_MODE_SBS_LOWER_SHARE];
5190 
5191 	for (phy_id = 0; phy_id < MAX_RADIOS; phy_id++) {
5192 		lower_sbs_freq_range[phy_id].low_2ghz_freq =
5193 						ref_freq[phy_id].low_2ghz_freq;
5194 		lower_sbs_freq_range[phy_id].high_2ghz_freq =
5195 						ref_freq[phy_id].high_2ghz_freq;
5196 
5197 		/* update for shared mac */
5198 		if (lower_sbs_freq_range[phy_id].low_2ghz_freq) {
5199 			lower_sbs_freq_range[phy_id].low_5ghz_freq =
5200 				ath12k_wmi_get_lowest_5ghz_freq_from_range(ref_freq);
5201 			lower_sbs_freq_range[phy_id].high_5ghz_freq = sbs_range_sep;
5202 		} else {
5203 			lower_sbs_freq_range[phy_id].low_5ghz_freq = sbs_range_sep + 10;
5204 			lower_sbs_freq_range[phy_id].high_5ghz_freq =
5205 				ath12k_wmi_get_highest_5ghz_freq_from_range(ref_freq);
5206 		}
5207 	}
5208 }
5209 
ath12k_wmi_hw_mode_to_str(enum ath12k_hw_mode hw_mode)5210 static const char *ath12k_wmi_hw_mode_to_str(enum ath12k_hw_mode hw_mode)
5211 {
5212 	static const char * const mode_str[] = {
5213 		[ATH12K_HW_MODE_SMM] = "SMM",
5214 		[ATH12K_HW_MODE_DBS] = "DBS",
5215 		[ATH12K_HW_MODE_SBS] = "SBS",
5216 		[ATH12K_HW_MODE_SBS_UPPER_SHARE] = "SBS_UPPER_SHARE",
5217 		[ATH12K_HW_MODE_SBS_LOWER_SHARE] = "SBS_LOWER_SHARE",
5218 	};
5219 
5220 	if (hw_mode >= ARRAY_SIZE(mode_str))
5221 		return "Unknown";
5222 
5223 	return mode_str[hw_mode];
5224 }
5225 
5226 static void
ath12k_wmi_dump_freq_range_per_mac(struct ath12k_base * ab,struct ath12k_hw_mode_freq_range_arg * freq_range,enum ath12k_hw_mode hw_mode)5227 ath12k_wmi_dump_freq_range_per_mac(struct ath12k_base *ab,
5228 				   struct ath12k_hw_mode_freq_range_arg *freq_range,
5229 				   enum ath12k_hw_mode hw_mode)
5230 {
5231 	u8 i;
5232 
5233 	for (i = 0; i < MAX_RADIOS; i++)
5234 		if (freq_range[i].low_2ghz_freq || freq_range[i].low_5ghz_freq)
5235 			ath12k_dbg(ab, ATH12K_DBG_WMI,
5236 				   "frequency range: %s(%d) mac %d 2 GHz [%d - %d] 5 GHz [%d - %d]",
5237 				   ath12k_wmi_hw_mode_to_str(hw_mode),
5238 				   hw_mode, i,
5239 				   freq_range[i].low_2ghz_freq,
5240 				   freq_range[i].high_2ghz_freq,
5241 				   freq_range[i].low_5ghz_freq,
5242 				   freq_range[i].high_5ghz_freq);
5243 }
5244 
ath12k_wmi_dump_freq_range(struct ath12k_base * ab)5245 static void ath12k_wmi_dump_freq_range(struct ath12k_base *ab)
5246 {
5247 	struct ath12k_hw_mode_freq_range_arg *freq_range;
5248 	u8 i;
5249 
5250 	for (i = ATH12K_HW_MODE_SMM; i < ATH12K_HW_MODE_MAX; i++) {
5251 		freq_range = ab->wmi_ab.hw_mode_info.freq_range_caps[i];
5252 		ath12k_wmi_dump_freq_range_per_mac(ab, freq_range, i);
5253 	}
5254 }
5255 
ath12k_wmi_modify_sbs_freq(struct ath12k_base * ab,u8 phy_id)5256 static int ath12k_wmi_modify_sbs_freq(struct ath12k_base *ab, u8 phy_id)
5257 {
5258 	struct ath12k_hw_mode_info *hw_mode_info = &ab->wmi_ab.hw_mode_info;
5259 	struct ath12k_hw_mode_freq_range_arg *sbs_mac_range, *shared_mac_range;
5260 	struct ath12k_hw_mode_freq_range_arg *non_shared_range;
5261 	u8 shared_phy_id;
5262 
5263 	sbs_mac_range = &hw_mode_info->freq_range_caps[ATH12K_HW_MODE_SBS][phy_id];
5264 
5265 	/* if SBS mac range has both 2.4 and 5 GHz ranges, i.e. shared phy_id
5266 	 * keep the range as it is in SBS
5267 	 */
5268 	if (sbs_mac_range->low_2ghz_freq && sbs_mac_range->low_5ghz_freq)
5269 		return 0;
5270 
5271 	if (sbs_mac_range->low_2ghz_freq && !sbs_mac_range->low_5ghz_freq) {
5272 		ath12k_err(ab, "Invalid DBS/SBS mode with only 2.4Ghz");
5273 		ath12k_wmi_dump_freq_range_per_mac(ab, sbs_mac_range, ATH12K_HW_MODE_SBS);
5274 		return -EINVAL;
5275 	}
5276 
5277 	non_shared_range = sbs_mac_range;
5278 	/* if SBS mac range has only 5 GHz then it's the non-shared phy, so
5279 	 * modify the range as per the shared mac.
5280 	 */
5281 	shared_phy_id = phy_id ? 0 : 1;
5282 	shared_mac_range =
5283 		&hw_mode_info->freq_range_caps[ATH12K_HW_MODE_SBS][shared_phy_id];
5284 
5285 	if (shared_mac_range->low_5ghz_freq > non_shared_range->low_5ghz_freq) {
5286 		ath12k_dbg(ab, ATH12K_DBG_WMI, "high 5 GHz shared");
5287 		/* If the shared mac lower 5 GHz frequency is greater than
5288 		 * non-shared mac lower 5 GHz frequency then the shared mac has
5289 		 * high 5 GHz shared with 2.4 GHz. So non-shared mac's 5 GHz high
5290 		 * freq should be less than the shared mac's low 5 GHz freq.
5291 		 */
5292 		if (non_shared_range->high_5ghz_freq >=
5293 		    shared_mac_range->low_5ghz_freq)
5294 			non_shared_range->high_5ghz_freq =
5295 				max_t(u32, shared_mac_range->low_5ghz_freq - 10,
5296 				      non_shared_range->low_5ghz_freq);
5297 	} else if (shared_mac_range->high_5ghz_freq <
5298 		   non_shared_range->high_5ghz_freq) {
5299 		ath12k_dbg(ab, ATH12K_DBG_WMI, "low 5 GHz shared");
5300 		/* If the shared mac high 5 GHz frequency is less than
5301 		 * non-shared mac high 5 GHz frequency then the shared mac has
5302 		 * low 5 GHz shared with 2.4 GHz. So non-shared mac's 5 GHz low
5303 		 * freq should be greater than the shared mac's high 5 GHz freq.
5304 		 */
5305 		if (shared_mac_range->high_5ghz_freq >=
5306 		    non_shared_range->low_5ghz_freq)
5307 			non_shared_range->low_5ghz_freq =
5308 				min_t(u32, shared_mac_range->high_5ghz_freq + 10,
5309 				      non_shared_range->high_5ghz_freq);
5310 	} else {
5311 		ath12k_warn(ab, "invalid SBS range with all 5 GHz shared");
5312 		return -EINVAL;
5313 	}
5314 
5315 	return 0;
5316 }
5317 
ath12k_wmi_update_sbs_freq_info(struct ath12k_base * ab)5318 static void ath12k_wmi_update_sbs_freq_info(struct ath12k_base *ab)
5319 {
5320 	struct ath12k_hw_mode_info *hw_mode_info = &ab->wmi_ab.hw_mode_info;
5321 	struct ath12k_hw_mode_freq_range_arg *mac_range;
5322 	u16 sbs_range_sep;
5323 	u8 phy_id;
5324 	int ret;
5325 
5326 	mac_range = hw_mode_info->freq_range_caps[ATH12K_HW_MODE_SBS];
5327 
5328 	/* If sbs_lower_band_end_freq has a value, then the frequency range
5329 	 * will be split using that value.
5330 	 */
5331 	sbs_range_sep = ab->wmi_ab.sbs_lower_band_end_freq;
5332 	if (sbs_range_sep) {
5333 		ath12k_wmi_fill_upper_share_sbs_freq(ab, sbs_range_sep,
5334 						     mac_range);
5335 		ath12k_wmi_fill_lower_share_sbs_freq(ab, sbs_range_sep,
5336 						     mac_range);
5337 		/* Hardware specifies the range boundary with sbs_range_sep,
5338 		 * (i.e. the boundary between 5 GHz high and 5 GHz low),
5339 		 * reset the original one to make sure it will not get used.
5340 		 */
5341 		memset(mac_range, 0, sizeof(*mac_range) * MAX_RADIOS);
5342 		return;
5343 	}
5344 
5345 	/* If sbs_lower_band_end_freq is not set that means firmware will send one
5346 	 * shared mac range and one non-shared mac range. so update that freq.
5347 	 */
5348 	for (phy_id = 0; phy_id < MAX_RADIOS; phy_id++) {
5349 		ret = ath12k_wmi_modify_sbs_freq(ab, phy_id);
5350 		if (ret) {
5351 			memset(mac_range, 0, sizeof(*mac_range) * MAX_RADIOS);
5352 			break;
5353 		}
5354 	}
5355 }
5356 
5357 static void
ath12k_wmi_update_mac_freq_info(struct ath12k_base * ab,enum wmi_host_hw_mode_config_type hw_config_type,u32 phy_id,struct ath12k_svc_ext_mac_phy_info * mac_cap)5358 ath12k_wmi_update_mac_freq_info(struct ath12k_base *ab,
5359 				enum wmi_host_hw_mode_config_type hw_config_type,
5360 				u32 phy_id,
5361 				struct ath12k_svc_ext_mac_phy_info *mac_cap)
5362 {
5363 	if (phy_id >= MAX_RADIOS) {
5364 		ath12k_err(ab, "mac more than two not supported: %d", phy_id);
5365 		return;
5366 	}
5367 
5368 	ath12k_dbg(ab, ATH12K_DBG_WMI,
5369 		   "hw_mode_cfg %d mac %d band 0x%x SBS cutoff freq %d 2 GHz [%d - %d] 5 GHz [%d - %d]",
5370 		   hw_config_type, phy_id, mac_cap->supported_bands,
5371 		   ab->wmi_ab.sbs_lower_band_end_freq,
5372 		   mac_cap->hw_freq_range.low_2ghz_freq,
5373 		   mac_cap->hw_freq_range.high_2ghz_freq,
5374 		   mac_cap->hw_freq_range.low_5ghz_freq,
5375 		   mac_cap->hw_freq_range.high_5ghz_freq);
5376 
5377 	switch (hw_config_type) {
5378 	case WMI_HOST_HW_MODE_SINGLE:
5379 		if (phy_id) {
5380 			ath12k_dbg(ab, ATH12K_DBG_WMI, "mac phy 1 is not supported");
5381 			break;
5382 		}
5383 		ath12k_wmi_update_freq_info(ab, mac_cap, ATH12K_HW_MODE_SMM, phy_id);
5384 		break;
5385 
5386 	case WMI_HOST_HW_MODE_DBS:
5387 		if (!ath12k_wmi_all_phy_range_updated(ab, ATH12K_HW_MODE_DBS))
5388 			ath12k_wmi_update_freq_info(ab, mac_cap,
5389 						    ATH12K_HW_MODE_DBS, phy_id);
5390 		break;
5391 	case WMI_HOST_HW_MODE_DBS_SBS:
5392 	case WMI_HOST_HW_MODE_DBS_OR_SBS:
5393 		ath12k_wmi_update_freq_info(ab, mac_cap, ATH12K_HW_MODE_DBS, phy_id);
5394 		if (ab->wmi_ab.sbs_lower_band_end_freq ||
5395 		    mac_cap->hw_freq_range.low_5ghz_freq ||
5396 		    mac_cap->hw_freq_range.low_2ghz_freq)
5397 			ath12k_wmi_update_freq_info(ab, mac_cap, ATH12K_HW_MODE_SBS,
5398 						    phy_id);
5399 
5400 		if (ath12k_wmi_all_phy_range_updated(ab, ATH12K_HW_MODE_DBS))
5401 			ath12k_wmi_update_dbs_freq_info(ab);
5402 		if (ath12k_wmi_all_phy_range_updated(ab, ATH12K_HW_MODE_SBS))
5403 			ath12k_wmi_update_sbs_freq_info(ab);
5404 		break;
5405 	case WMI_HOST_HW_MODE_SBS:
5406 	case WMI_HOST_HW_MODE_SBS_PASSIVE:
5407 		ath12k_wmi_update_freq_info(ab, mac_cap, ATH12K_HW_MODE_SBS, phy_id);
5408 		if (ath12k_wmi_all_phy_range_updated(ab, ATH12K_HW_MODE_SBS))
5409 			ath12k_wmi_update_sbs_freq_info(ab);
5410 
5411 		break;
5412 	default:
5413 		break;
5414 	}
5415 }
5416 
ath12k_wmi_sbs_range_present(struct ath12k_base * ab)5417 static bool ath12k_wmi_sbs_range_present(struct ath12k_base *ab)
5418 {
5419 	if (ath12k_wmi_all_phy_range_updated(ab, ATH12K_HW_MODE_SBS) ||
5420 	    (ab->wmi_ab.sbs_lower_band_end_freq &&
5421 	     ath12k_wmi_all_phy_range_updated(ab, ATH12K_HW_MODE_SBS_LOWER_SHARE) &&
5422 	     ath12k_wmi_all_phy_range_updated(ab, ATH12K_HW_MODE_SBS_UPPER_SHARE)))
5423 		return true;
5424 
5425 	return false;
5426 }
5427 
ath12k_wmi_update_hw_mode_list(struct ath12k_base * ab)5428 static int ath12k_wmi_update_hw_mode_list(struct ath12k_base *ab)
5429 {
5430 	struct ath12k_svc_ext_info *svc_ext_info = &ab->wmi_ab.svc_ext_info;
5431 	struct ath12k_hw_mode_info *info = &ab->wmi_ab.hw_mode_info;
5432 	enum wmi_host_hw_mode_config_type hw_config_type;
5433 	struct ath12k_svc_ext_mac_phy_info *tmp;
5434 	bool dbs_mode = false, sbs_mode = false;
5435 	u32 i, j = 0;
5436 
5437 	if (!svc_ext_info->num_hw_modes) {
5438 		ath12k_err(ab, "invalid number of hw modes");
5439 		return -EINVAL;
5440 	}
5441 
5442 	ath12k_dbg(ab, ATH12K_DBG_WMI, "updated HW mode list: num modes %d",
5443 		   svc_ext_info->num_hw_modes);
5444 
5445 	memset(info->freq_range_caps, 0, sizeof(info->freq_range_caps));
5446 
5447 	for (i = 0; i < svc_ext_info->num_hw_modes; i++) {
5448 		if (j >= ATH12K_MAX_MAC_PHY_CAP)
5449 			return -EINVAL;
5450 
5451 		/* Update for MAC0 */
5452 		tmp = &svc_ext_info->mac_phy_info[j++];
5453 		hw_config_type = tmp->hw_mode_config_type;
5454 		ath12k_wmi_update_mac_freq_info(ab, hw_config_type, tmp->phy_id, tmp);
5455 
5456 		/* SBS and DBS have dual MAC. Up to 2 MACs are considered. */
5457 		if (hw_config_type == WMI_HOST_HW_MODE_DBS ||
5458 		    hw_config_type == WMI_HOST_HW_MODE_SBS_PASSIVE ||
5459 		    hw_config_type == WMI_HOST_HW_MODE_SBS ||
5460 		    hw_config_type == WMI_HOST_HW_MODE_DBS_OR_SBS) {
5461 			if (j >= ATH12K_MAX_MAC_PHY_CAP)
5462 				return -EINVAL;
5463 			/* Update for MAC1 */
5464 			tmp = &svc_ext_info->mac_phy_info[j++];
5465 			ath12k_wmi_update_mac_freq_info(ab, hw_config_type,
5466 							tmp->phy_id, tmp);
5467 
5468 			if (hw_config_type == WMI_HOST_HW_MODE_DBS ||
5469 			    hw_config_type == WMI_HOST_HW_MODE_DBS_OR_SBS)
5470 				dbs_mode = true;
5471 
5472 			if (ath12k_wmi_sbs_range_present(ab) &&
5473 			    (hw_config_type == WMI_HOST_HW_MODE_SBS_PASSIVE ||
5474 			     hw_config_type == WMI_HOST_HW_MODE_SBS ||
5475 			     hw_config_type == WMI_HOST_HW_MODE_DBS_OR_SBS))
5476 				sbs_mode = true;
5477 		}
5478 	}
5479 
5480 	info->support_dbs = dbs_mode;
5481 	info->support_sbs = sbs_mode;
5482 
5483 	ath12k_wmi_dump_freq_range(ab);
5484 
5485 	return 0;
5486 }
5487 
ath12k_wmi_svc_rdy_ext2_parse(struct ath12k_base * ab,u16 tag,u16 len,const void * ptr,void * data)5488 static int ath12k_wmi_svc_rdy_ext2_parse(struct ath12k_base *ab,
5489 					 u16 tag, u16 len,
5490 					 const void *ptr, void *data)
5491 {
5492 	const struct ath12k_wmi_dbs_or_sbs_cap_params *dbs_or_sbs_caps;
5493 	struct ath12k_wmi_pdev *wmi_handle = &ab->wmi_ab.wmi[0];
5494 	struct ath12k_wmi_svc_rdy_ext2_parse *parse = data;
5495 	int ret;
5496 
5497 	switch (tag) {
5498 	case WMI_TAG_SERVICE_READY_EXT2_EVENT:
5499 		ret = ath12k_pull_svc_ready_ext2(wmi_handle, ptr,
5500 						 &parse->arg);
5501 		if (ret) {
5502 			ath12k_warn(ab,
5503 				    "failed to extract wmi service ready ext2 parameters: %d\n",
5504 				    ret);
5505 			return ret;
5506 		}
5507 		break;
5508 
5509 	case WMI_TAG_ARRAY_STRUCT:
5510 		if (!parse->dma_ring_cap_done) {
5511 			ret = ath12k_wmi_dma_ring_caps(ab, len, ptr,
5512 						       &parse->dma_caps_parse);
5513 			if (ret)
5514 				return ret;
5515 
5516 			parse->dma_ring_cap_done = true;
5517 		} else if (!parse->spectral_bin_scaling_done) {
5518 			/* TODO: This is a place-holder as WMI tag for
5519 			 * spectral scaling is before
5520 			 * WMI_TAG_MAC_PHY_CAPABILITIES_EXT
5521 			 */
5522 			parse->spectral_bin_scaling_done = true;
5523 		} else if (!parse->mac_phy_caps_ext_done) {
5524 			ret = ath12k_wmi_tlv_iter(ab, ptr, len,
5525 						  ath12k_wmi_tlv_mac_phy_caps_ext,
5526 						  parse);
5527 			if (ret) {
5528 				ath12k_warn(ab, "failed to parse extended MAC PHY capabilities WMI TLV: %d\n",
5529 					    ret);
5530 				return ret;
5531 			}
5532 
5533 			parse->mac_phy_caps_ext_done = true;
5534 		} else if (!parse->hal_reg_caps_ext2_done) {
5535 			parse->hal_reg_caps_ext2_done = true;
5536 		} else if (!parse->scan_radio_caps_ext2_done) {
5537 			parse->scan_radio_caps_ext2_done = true;
5538 		} else if (!parse->twt_caps_done) {
5539 			parse->twt_caps_done = true;
5540 		} else if (!parse->htt_msdu_idx_to_qtype_map_done) {
5541 			parse->htt_msdu_idx_to_qtype_map_done = true;
5542 		} else if (!parse->dbs_or_sbs_cap_ext_done) {
5543 			dbs_or_sbs_caps = ptr;
5544 			ab->wmi_ab.sbs_lower_band_end_freq =
5545 				__le32_to_cpu(dbs_or_sbs_caps->sbs_lower_band_end_freq);
5546 
5547 			ath12k_dbg(ab, ATH12K_DBG_WMI, "sbs_lower_band_end_freq %u\n",
5548 				   ab->wmi_ab.sbs_lower_band_end_freq);
5549 
5550 			ret = ath12k_wmi_update_hw_mode_list(ab);
5551 			if (ret) {
5552 				ath12k_warn(ab, "failed to update hw mode list: %d\n",
5553 					    ret);
5554 				return ret;
5555 			}
5556 
5557 			parse->dbs_or_sbs_cap_ext_done = true;
5558 		}
5559 
5560 		break;
5561 	default:
5562 		break;
5563 	}
5564 
5565 	return 0;
5566 }
5567 
ath12k_service_ready_ext2_event(struct ath12k_base * ab,struct sk_buff * skb)5568 static int ath12k_service_ready_ext2_event(struct ath12k_base *ab,
5569 					   struct sk_buff *skb)
5570 {
5571 	struct ath12k_wmi_svc_rdy_ext2_parse svc_rdy_ext2 = { };
5572 	int ret;
5573 
5574 	ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len,
5575 				  ath12k_wmi_svc_rdy_ext2_parse,
5576 				  &svc_rdy_ext2);
5577 	if (ret) {
5578 		ath12k_warn(ab, "failed to parse ext2 event tlv %d\n", ret);
5579 		goto err;
5580 	}
5581 
5582 	complete(&ab->wmi_ab.service_ready);
5583 
5584 	return 0;
5585 
5586 err:
5587 	ath12k_wmi_free_dbring_caps(ab);
5588 	return ret;
5589 }
5590 
ath12k_pull_vdev_start_resp_tlv(struct ath12k_base * ab,struct sk_buff * skb,struct wmi_vdev_start_resp_event * vdev_rsp)5591 static int ath12k_pull_vdev_start_resp_tlv(struct ath12k_base *ab, struct sk_buff *skb,
5592 					   struct wmi_vdev_start_resp_event *vdev_rsp)
5593 {
5594 	const void **tb;
5595 	const struct wmi_vdev_start_resp_event *ev;
5596 	int ret;
5597 
5598 	tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
5599 	if (IS_ERR(tb)) {
5600 		ret = PTR_ERR(tb);
5601 		ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
5602 		return ret;
5603 	}
5604 
5605 	ev = tb[WMI_TAG_VDEV_START_RESPONSE_EVENT];
5606 	if (!ev) {
5607 		ath12k_warn(ab, "failed to fetch vdev start resp ev");
5608 		kfree(tb);
5609 		return -EPROTO;
5610 	}
5611 
5612 	*vdev_rsp = *ev;
5613 
5614 	kfree(tb);
5615 	return 0;
5616 }
5617 
5618 static struct ath12k_reg_rule
create_ext_reg_rules_from_wmi(u32 num_reg_rules,struct ath12k_wmi_reg_rule_ext_params * wmi_reg_rule)5619 *create_ext_reg_rules_from_wmi(u32 num_reg_rules,
5620 			       struct ath12k_wmi_reg_rule_ext_params *wmi_reg_rule)
5621 {
5622 	struct ath12k_reg_rule *reg_rule_ptr;
5623 	u32 count;
5624 
5625 	reg_rule_ptr = kzalloc((num_reg_rules * sizeof(*reg_rule_ptr)),
5626 			       GFP_ATOMIC);
5627 
5628 	if (!reg_rule_ptr)
5629 		return NULL;
5630 
5631 	for (count = 0; count < num_reg_rules; count++) {
5632 		reg_rule_ptr[count].start_freq =
5633 			le32_get_bits(wmi_reg_rule[count].freq_info,
5634 				      REG_RULE_START_FREQ);
5635 		reg_rule_ptr[count].end_freq =
5636 			le32_get_bits(wmi_reg_rule[count].freq_info,
5637 				      REG_RULE_END_FREQ);
5638 		reg_rule_ptr[count].max_bw =
5639 			le32_get_bits(wmi_reg_rule[count].bw_pwr_info,
5640 				      REG_RULE_MAX_BW);
5641 		reg_rule_ptr[count].reg_power =
5642 			le32_get_bits(wmi_reg_rule[count].bw_pwr_info,
5643 				      REG_RULE_REG_PWR);
5644 		reg_rule_ptr[count].ant_gain =
5645 			le32_get_bits(wmi_reg_rule[count].bw_pwr_info,
5646 				      REG_RULE_ANT_GAIN);
5647 		reg_rule_ptr[count].flags =
5648 			le32_get_bits(wmi_reg_rule[count].flag_info,
5649 				      REG_RULE_FLAGS);
5650 		reg_rule_ptr[count].psd_flag =
5651 			le32_get_bits(wmi_reg_rule[count].psd_power_info,
5652 				      REG_RULE_PSD_INFO);
5653 		reg_rule_ptr[count].psd_eirp =
5654 			le32_get_bits(wmi_reg_rule[count].psd_power_info,
5655 				      REG_RULE_PSD_EIRP);
5656 	}
5657 
5658 	return reg_rule_ptr;
5659 }
5660 
ath12k_wmi_ignore_num_extra_rules(struct ath12k_wmi_reg_rule_ext_params * rule,u32 num_reg_rules)5661 static u8 ath12k_wmi_ignore_num_extra_rules(struct ath12k_wmi_reg_rule_ext_params *rule,
5662 					    u32 num_reg_rules)
5663 {
5664 	u8 num_invalid_5ghz_rules = 0;
5665 	u32 count, start_freq;
5666 
5667 	for (count = 0; count < num_reg_rules; count++) {
5668 		start_freq = le32_get_bits(rule[count].freq_info, REG_RULE_START_FREQ);
5669 
5670 		if (start_freq >= ATH12K_MIN_6GHZ_FREQ)
5671 			num_invalid_5ghz_rules++;
5672 	}
5673 
5674 	return num_invalid_5ghz_rules;
5675 }
5676 
ath12k_pull_reg_chan_list_ext_update_ev(struct ath12k_base * ab,struct sk_buff * skb,struct ath12k_reg_info * reg_info)5677 static int ath12k_pull_reg_chan_list_ext_update_ev(struct ath12k_base *ab,
5678 						   struct sk_buff *skb,
5679 						   struct ath12k_reg_info *reg_info)
5680 {
5681 	const void **tb;
5682 	const struct wmi_reg_chan_list_cc_ext_event *ev;
5683 	struct ath12k_wmi_reg_rule_ext_params *ext_wmi_reg_rule;
5684 	u32 num_2g_reg_rules, num_5g_reg_rules;
5685 	u32 num_6g_reg_rules_ap[WMI_REG_CURRENT_MAX_AP_TYPE];
5686 	u32 num_6g_reg_rules_cl[WMI_REG_CURRENT_MAX_AP_TYPE][WMI_REG_MAX_CLIENT_TYPE];
5687 	u8 num_invalid_5ghz_ext_rules;
5688 	u32 total_reg_rules = 0;
5689 	int ret, i, j;
5690 
5691 	ath12k_dbg(ab, ATH12K_DBG_WMI, "processing regulatory ext channel list\n");
5692 
5693 	tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
5694 	if (IS_ERR(tb)) {
5695 		ret = PTR_ERR(tb);
5696 		ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
5697 		return ret;
5698 	}
5699 
5700 	ev = tb[WMI_TAG_REG_CHAN_LIST_CC_EXT_EVENT];
5701 	if (!ev) {
5702 		ath12k_warn(ab, "failed to fetch reg chan list ext update ev\n");
5703 		kfree(tb);
5704 		return -EPROTO;
5705 	}
5706 
5707 	reg_info->num_2g_reg_rules = le32_to_cpu(ev->num_2g_reg_rules);
5708 	reg_info->num_5g_reg_rules = le32_to_cpu(ev->num_5g_reg_rules);
5709 	reg_info->num_6g_reg_rules_ap[WMI_REG_INDOOR_AP] =
5710 		le32_to_cpu(ev->num_6g_reg_rules_ap_lpi);
5711 	reg_info->num_6g_reg_rules_ap[WMI_REG_STD_POWER_AP] =
5712 		le32_to_cpu(ev->num_6g_reg_rules_ap_sp);
5713 	reg_info->num_6g_reg_rules_ap[WMI_REG_VLP_AP] =
5714 		le32_to_cpu(ev->num_6g_reg_rules_ap_vlp);
5715 
5716 	for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++) {
5717 		reg_info->num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][i] =
5718 			le32_to_cpu(ev->num_6g_reg_rules_cl_lpi[i]);
5719 		reg_info->num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][i] =
5720 			le32_to_cpu(ev->num_6g_reg_rules_cl_sp[i]);
5721 		reg_info->num_6g_reg_rules_cl[WMI_REG_VLP_AP][i] =
5722 			le32_to_cpu(ev->num_6g_reg_rules_cl_vlp[i]);
5723 	}
5724 
5725 	num_2g_reg_rules = reg_info->num_2g_reg_rules;
5726 	total_reg_rules += num_2g_reg_rules;
5727 	num_5g_reg_rules = reg_info->num_5g_reg_rules;
5728 	total_reg_rules += num_5g_reg_rules;
5729 
5730 	if (num_2g_reg_rules > MAX_REG_RULES || num_5g_reg_rules > MAX_REG_RULES) {
5731 		ath12k_warn(ab, "Num reg rules for 2G/5G exceeds max limit (num_2g_reg_rules: %d num_5g_reg_rules: %d max_rules: %d)\n",
5732 			    num_2g_reg_rules, num_5g_reg_rules, MAX_REG_RULES);
5733 		kfree(tb);
5734 		return -EINVAL;
5735 	}
5736 
5737 	for (i = 0; i < WMI_REG_CURRENT_MAX_AP_TYPE; i++) {
5738 		num_6g_reg_rules_ap[i] = reg_info->num_6g_reg_rules_ap[i];
5739 
5740 		if (num_6g_reg_rules_ap[i] > MAX_6GHZ_REG_RULES) {
5741 			ath12k_warn(ab, "Num 6G reg rules for AP mode(%d) exceeds max limit (num_6g_reg_rules_ap: %d, max_rules: %d)\n",
5742 				    i, num_6g_reg_rules_ap[i], MAX_6GHZ_REG_RULES);
5743 			kfree(tb);
5744 			return -EINVAL;
5745 		}
5746 
5747 		total_reg_rules += num_6g_reg_rules_ap[i];
5748 	}
5749 
5750 	for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++) {
5751 		num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][i] =
5752 				reg_info->num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][i];
5753 		total_reg_rules += num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][i];
5754 
5755 		num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][i] =
5756 				reg_info->num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][i];
5757 		total_reg_rules += num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][i];
5758 
5759 		num_6g_reg_rules_cl[WMI_REG_VLP_AP][i] =
5760 				reg_info->num_6g_reg_rules_cl[WMI_REG_VLP_AP][i];
5761 		total_reg_rules += num_6g_reg_rules_cl[WMI_REG_VLP_AP][i];
5762 
5763 		if (num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][i] > MAX_6GHZ_REG_RULES ||
5764 		    num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][i] > MAX_6GHZ_REG_RULES ||
5765 		    num_6g_reg_rules_cl[WMI_REG_VLP_AP][i] >  MAX_6GHZ_REG_RULES) {
5766 			ath12k_warn(ab, "Num 6g client reg rules exceeds max limit, for client(type: %d)\n",
5767 				    i);
5768 			kfree(tb);
5769 			return -EINVAL;
5770 		}
5771 	}
5772 
5773 	if (!total_reg_rules) {
5774 		ath12k_warn(ab, "No reg rules available\n");
5775 		kfree(tb);
5776 		return -EINVAL;
5777 	}
5778 
5779 	memcpy(reg_info->alpha2, &ev->alpha2, REG_ALPHA2_LEN);
5780 
5781 	reg_info->dfs_region = le32_to_cpu(ev->dfs_region);
5782 	reg_info->phybitmap = le32_to_cpu(ev->phybitmap);
5783 	reg_info->num_phy = le32_to_cpu(ev->num_phy);
5784 	reg_info->phy_id = le32_to_cpu(ev->phy_id);
5785 	reg_info->ctry_code = le32_to_cpu(ev->country_id);
5786 	reg_info->reg_dmn_pair = le32_to_cpu(ev->domain_code);
5787 
5788 	switch (le32_to_cpu(ev->status_code)) {
5789 	case WMI_REG_SET_CC_STATUS_PASS:
5790 		reg_info->status_code = REG_SET_CC_STATUS_PASS;
5791 		break;
5792 	case WMI_REG_CURRENT_ALPHA2_NOT_FOUND:
5793 		reg_info->status_code = REG_CURRENT_ALPHA2_NOT_FOUND;
5794 		break;
5795 	case WMI_REG_INIT_ALPHA2_NOT_FOUND:
5796 		reg_info->status_code = REG_INIT_ALPHA2_NOT_FOUND;
5797 		break;
5798 	case WMI_REG_SET_CC_CHANGE_NOT_ALLOWED:
5799 		reg_info->status_code = REG_SET_CC_CHANGE_NOT_ALLOWED;
5800 		break;
5801 	case WMI_REG_SET_CC_STATUS_NO_MEMORY:
5802 		reg_info->status_code = REG_SET_CC_STATUS_NO_MEMORY;
5803 		break;
5804 	case WMI_REG_SET_CC_STATUS_FAIL:
5805 		reg_info->status_code = REG_SET_CC_STATUS_FAIL;
5806 		break;
5807 	}
5808 
5809 	reg_info->is_ext_reg_event = true;
5810 
5811 	reg_info->min_bw_2g = le32_to_cpu(ev->min_bw_2g);
5812 	reg_info->max_bw_2g = le32_to_cpu(ev->max_bw_2g);
5813 	reg_info->min_bw_5g = le32_to_cpu(ev->min_bw_5g);
5814 	reg_info->max_bw_5g = le32_to_cpu(ev->max_bw_5g);
5815 	reg_info->min_bw_6g_ap[WMI_REG_INDOOR_AP] = le32_to_cpu(ev->min_bw_6g_ap_lpi);
5816 	reg_info->max_bw_6g_ap[WMI_REG_INDOOR_AP] = le32_to_cpu(ev->max_bw_6g_ap_lpi);
5817 	reg_info->min_bw_6g_ap[WMI_REG_STD_POWER_AP] = le32_to_cpu(ev->min_bw_6g_ap_sp);
5818 	reg_info->max_bw_6g_ap[WMI_REG_STD_POWER_AP] = le32_to_cpu(ev->max_bw_6g_ap_sp);
5819 	reg_info->min_bw_6g_ap[WMI_REG_VLP_AP] = le32_to_cpu(ev->min_bw_6g_ap_vlp);
5820 	reg_info->max_bw_6g_ap[WMI_REG_VLP_AP] = le32_to_cpu(ev->max_bw_6g_ap_vlp);
5821 
5822 	for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++) {
5823 		reg_info->min_bw_6g_client[WMI_REG_INDOOR_AP][i] =
5824 			le32_to_cpu(ev->min_bw_6g_client_lpi[i]);
5825 		reg_info->max_bw_6g_client[WMI_REG_INDOOR_AP][i] =
5826 			le32_to_cpu(ev->max_bw_6g_client_lpi[i]);
5827 		reg_info->min_bw_6g_client[WMI_REG_STD_POWER_AP][i] =
5828 			le32_to_cpu(ev->min_bw_6g_client_sp[i]);
5829 		reg_info->max_bw_6g_client[WMI_REG_STD_POWER_AP][i] =
5830 			le32_to_cpu(ev->max_bw_6g_client_sp[i]);
5831 		reg_info->min_bw_6g_client[WMI_REG_VLP_AP][i] =
5832 			le32_to_cpu(ev->min_bw_6g_client_vlp[i]);
5833 		reg_info->max_bw_6g_client[WMI_REG_VLP_AP][i] =
5834 			le32_to_cpu(ev->max_bw_6g_client_vlp[i]);
5835 	}
5836 
5837 	ath12k_dbg(ab, ATH12K_DBG_WMI,
5838 		   "%s:cc_ext %s dfs %d BW: min_2g %d max_2g %d min_5g %d max_5g %d phy_bitmap 0x%x",
5839 		   __func__, reg_info->alpha2, reg_info->dfs_region,
5840 		   reg_info->min_bw_2g, reg_info->max_bw_2g,
5841 		   reg_info->min_bw_5g, reg_info->max_bw_5g,
5842 		   reg_info->phybitmap);
5843 
5844 	ath12k_dbg(ab, ATH12K_DBG_WMI,
5845 		   "num_2g_reg_rules %d num_5g_reg_rules %d",
5846 		   num_2g_reg_rules, num_5g_reg_rules);
5847 
5848 	ath12k_dbg(ab, ATH12K_DBG_WMI,
5849 		   "num_6g_reg_rules_ap_lpi: %d num_6g_reg_rules_ap_sp: %d num_6g_reg_rules_ap_vlp: %d",
5850 		   num_6g_reg_rules_ap[WMI_REG_INDOOR_AP],
5851 		   num_6g_reg_rules_ap[WMI_REG_STD_POWER_AP],
5852 		   num_6g_reg_rules_ap[WMI_REG_VLP_AP]);
5853 
5854 	ath12k_dbg(ab, ATH12K_DBG_WMI,
5855 		   "6g Regular client: num_6g_reg_rules_lpi: %d num_6g_reg_rules_sp: %d num_6g_reg_rules_vlp: %d",
5856 		   num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][WMI_REG_DEFAULT_CLIENT],
5857 		   num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][WMI_REG_DEFAULT_CLIENT],
5858 		   num_6g_reg_rules_cl[WMI_REG_VLP_AP][WMI_REG_DEFAULT_CLIENT]);
5859 
5860 	ath12k_dbg(ab, ATH12K_DBG_WMI,
5861 		   "6g Subordinate client: num_6g_reg_rules_lpi: %d num_6g_reg_rules_sp: %d num_6g_reg_rules_vlp: %d",
5862 		   num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][WMI_REG_SUBORDINATE_CLIENT],
5863 		   num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][WMI_REG_SUBORDINATE_CLIENT],
5864 		   num_6g_reg_rules_cl[WMI_REG_VLP_AP][WMI_REG_SUBORDINATE_CLIENT]);
5865 
5866 	ext_wmi_reg_rule =
5867 		(struct ath12k_wmi_reg_rule_ext_params *)((u8 *)ev
5868 			+ sizeof(*ev)
5869 			+ sizeof(struct wmi_tlv));
5870 
5871 	if (num_2g_reg_rules) {
5872 		reg_info->reg_rules_2g_ptr =
5873 			create_ext_reg_rules_from_wmi(num_2g_reg_rules,
5874 						      ext_wmi_reg_rule);
5875 
5876 		if (!reg_info->reg_rules_2g_ptr) {
5877 			kfree(tb);
5878 			ath12k_warn(ab, "Unable to Allocate memory for 2g rules\n");
5879 			return -ENOMEM;
5880 		}
5881 	}
5882 
5883 	ext_wmi_reg_rule += num_2g_reg_rules;
5884 
5885 	/* Firmware might include 6 GHz reg rule in 5 GHz rule list
5886 	 * for few countries along with separate 6 GHz rule.
5887 	 * Having same 6 GHz reg rule in 5 GHz and 6 GHz rules list
5888 	 * causes intersect check to be true, and same rules will be
5889 	 * shown multiple times in iw cmd.
5890 	 * Hence, avoid parsing 6 GHz rule from 5 GHz reg rule list
5891 	 */
5892 	num_invalid_5ghz_ext_rules = ath12k_wmi_ignore_num_extra_rules(ext_wmi_reg_rule,
5893 								       num_5g_reg_rules);
5894 
5895 	if (num_invalid_5ghz_ext_rules) {
5896 		ath12k_dbg(ab, ATH12K_DBG_WMI,
5897 			   "CC: %s 5 GHz reg rules number %d from fw, %d number of invalid 5 GHz rules",
5898 			   reg_info->alpha2, reg_info->num_5g_reg_rules,
5899 			   num_invalid_5ghz_ext_rules);
5900 
5901 		num_5g_reg_rules = num_5g_reg_rules - num_invalid_5ghz_ext_rules;
5902 		reg_info->num_5g_reg_rules = num_5g_reg_rules;
5903 	}
5904 
5905 	if (num_5g_reg_rules) {
5906 		reg_info->reg_rules_5g_ptr =
5907 			create_ext_reg_rules_from_wmi(num_5g_reg_rules,
5908 						      ext_wmi_reg_rule);
5909 
5910 		if (!reg_info->reg_rules_5g_ptr) {
5911 			kfree(tb);
5912 			ath12k_warn(ab, "Unable to Allocate memory for 5g rules\n");
5913 			return -ENOMEM;
5914 		}
5915 	}
5916 
5917 	/* We have adjusted the number of 5 GHz reg rules above. But still those
5918 	 * many rules needs to be adjusted in ext_wmi_reg_rule.
5919 	 *
5920 	 * NOTE: num_invalid_5ghz_ext_rules will be 0 for rest other cases.
5921 	 */
5922 	ext_wmi_reg_rule += (num_5g_reg_rules + num_invalid_5ghz_ext_rules);
5923 
5924 	for (i = 0; i < WMI_REG_CURRENT_MAX_AP_TYPE; i++) {
5925 		reg_info->reg_rules_6g_ap_ptr[i] =
5926 			create_ext_reg_rules_from_wmi(num_6g_reg_rules_ap[i],
5927 						      ext_wmi_reg_rule);
5928 
5929 		if (!reg_info->reg_rules_6g_ap_ptr[i]) {
5930 			kfree(tb);
5931 			ath12k_warn(ab, "Unable to Allocate memory for 6g ap rules\n");
5932 			return -ENOMEM;
5933 		}
5934 
5935 		ext_wmi_reg_rule += num_6g_reg_rules_ap[i];
5936 	}
5937 
5938 	for (j = 0; j < WMI_REG_CURRENT_MAX_AP_TYPE; j++) {
5939 		for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++) {
5940 			reg_info->reg_rules_6g_client_ptr[j][i] =
5941 				create_ext_reg_rules_from_wmi(num_6g_reg_rules_cl[j][i],
5942 							      ext_wmi_reg_rule);
5943 
5944 			if (!reg_info->reg_rules_6g_client_ptr[j][i]) {
5945 				kfree(tb);
5946 				ath12k_warn(ab, "Unable to Allocate memory for 6g client rules\n");
5947 				return -ENOMEM;
5948 			}
5949 
5950 			ext_wmi_reg_rule += num_6g_reg_rules_cl[j][i];
5951 		}
5952 	}
5953 
5954 	reg_info->client_type = le32_to_cpu(ev->client_type);
5955 	reg_info->rnr_tpe_usable = ev->rnr_tpe_usable;
5956 	reg_info->unspecified_ap_usable = ev->unspecified_ap_usable;
5957 	reg_info->domain_code_6g_ap[WMI_REG_INDOOR_AP] =
5958 		le32_to_cpu(ev->domain_code_6g_ap_lpi);
5959 	reg_info->domain_code_6g_ap[WMI_REG_STD_POWER_AP] =
5960 		le32_to_cpu(ev->domain_code_6g_ap_sp);
5961 	reg_info->domain_code_6g_ap[WMI_REG_VLP_AP] =
5962 		le32_to_cpu(ev->domain_code_6g_ap_vlp);
5963 
5964 	for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++) {
5965 		reg_info->domain_code_6g_client[WMI_REG_INDOOR_AP][i] =
5966 			le32_to_cpu(ev->domain_code_6g_client_lpi[i]);
5967 		reg_info->domain_code_6g_client[WMI_REG_STD_POWER_AP][i] =
5968 			le32_to_cpu(ev->domain_code_6g_client_sp[i]);
5969 		reg_info->domain_code_6g_client[WMI_REG_VLP_AP][i] =
5970 			le32_to_cpu(ev->domain_code_6g_client_vlp[i]);
5971 	}
5972 
5973 	reg_info->domain_code_6g_super_id = le32_to_cpu(ev->domain_code_6g_super_id);
5974 
5975 	ath12k_dbg(ab, ATH12K_DBG_WMI, "6g client_type: %d domain_code_6g_super_id: %d",
5976 		   reg_info->client_type, reg_info->domain_code_6g_super_id);
5977 
5978 	ath12k_dbg(ab, ATH12K_DBG_WMI, "processed regulatory ext channel list\n");
5979 
5980 	kfree(tb);
5981 	return 0;
5982 }
5983 
ath12k_pull_peer_del_resp_ev(struct ath12k_base * ab,struct sk_buff * skb,struct wmi_peer_delete_resp_event * peer_del_resp)5984 static int ath12k_pull_peer_del_resp_ev(struct ath12k_base *ab, struct sk_buff *skb,
5985 					struct wmi_peer_delete_resp_event *peer_del_resp)
5986 {
5987 	const void **tb;
5988 	const struct wmi_peer_delete_resp_event *ev;
5989 	int ret;
5990 
5991 	tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
5992 	if (IS_ERR(tb)) {
5993 		ret = PTR_ERR(tb);
5994 		ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
5995 		return ret;
5996 	}
5997 
5998 	ev = tb[WMI_TAG_PEER_DELETE_RESP_EVENT];
5999 	if (!ev) {
6000 		ath12k_warn(ab, "failed to fetch peer delete resp ev");
6001 		kfree(tb);
6002 		return -EPROTO;
6003 	}
6004 
6005 	memset(peer_del_resp, 0, sizeof(*peer_del_resp));
6006 
6007 	peer_del_resp->vdev_id = ev->vdev_id;
6008 	ether_addr_copy(peer_del_resp->peer_macaddr.addr,
6009 			ev->peer_macaddr.addr);
6010 
6011 	kfree(tb);
6012 	return 0;
6013 }
6014 
ath12k_pull_vdev_del_resp_ev(struct ath12k_base * ab,struct sk_buff * skb,u32 * vdev_id)6015 static int ath12k_pull_vdev_del_resp_ev(struct ath12k_base *ab,
6016 					struct sk_buff *skb,
6017 					u32 *vdev_id)
6018 {
6019 	const void **tb;
6020 	const struct wmi_vdev_delete_resp_event *ev;
6021 	int ret;
6022 
6023 	tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
6024 	if (IS_ERR(tb)) {
6025 		ret = PTR_ERR(tb);
6026 		ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
6027 		return ret;
6028 	}
6029 
6030 	ev = tb[WMI_TAG_VDEV_DELETE_RESP_EVENT];
6031 	if (!ev) {
6032 		ath12k_warn(ab, "failed to fetch vdev delete resp ev");
6033 		kfree(tb);
6034 		return -EPROTO;
6035 	}
6036 
6037 	*vdev_id = le32_to_cpu(ev->vdev_id);
6038 
6039 	kfree(tb);
6040 	return 0;
6041 }
6042 
ath12k_pull_bcn_tx_status_ev(struct ath12k_base * ab,struct sk_buff * skb,u32 * vdev_id,u32 * tx_status)6043 static int ath12k_pull_bcn_tx_status_ev(struct ath12k_base *ab,
6044 					struct sk_buff *skb,
6045 					u32 *vdev_id, u32 *tx_status)
6046 {
6047 	const void **tb;
6048 	const struct wmi_bcn_tx_status_event *ev;
6049 	int ret;
6050 
6051 	tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
6052 	if (IS_ERR(tb)) {
6053 		ret = PTR_ERR(tb);
6054 		ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
6055 		return ret;
6056 	}
6057 
6058 	ev = tb[WMI_TAG_OFFLOAD_BCN_TX_STATUS_EVENT];
6059 	if (!ev) {
6060 		ath12k_warn(ab, "failed to fetch bcn tx status ev");
6061 		kfree(tb);
6062 		return -EPROTO;
6063 	}
6064 
6065 	*vdev_id = le32_to_cpu(ev->vdev_id);
6066 	*tx_status = le32_to_cpu(ev->tx_status);
6067 
6068 	kfree(tb);
6069 	return 0;
6070 }
6071 
ath12k_pull_vdev_stopped_param_tlv(struct ath12k_base * ab,struct sk_buff * skb,u32 * vdev_id)6072 static int ath12k_pull_vdev_stopped_param_tlv(struct ath12k_base *ab, struct sk_buff *skb,
6073 					      u32 *vdev_id)
6074 {
6075 	const void **tb;
6076 	const struct wmi_vdev_stopped_event *ev;
6077 	int ret;
6078 
6079 	tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
6080 	if (IS_ERR(tb)) {
6081 		ret = PTR_ERR(tb);
6082 		ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
6083 		return ret;
6084 	}
6085 
6086 	ev = tb[WMI_TAG_VDEV_STOPPED_EVENT];
6087 	if (!ev) {
6088 		ath12k_warn(ab, "failed to fetch vdev stop ev");
6089 		kfree(tb);
6090 		return -EPROTO;
6091 	}
6092 
6093 	*vdev_id = le32_to_cpu(ev->vdev_id);
6094 
6095 	kfree(tb);
6096 	return 0;
6097 }
6098 
ath12k_wmi_tlv_mgmt_rx_parse(struct ath12k_base * ab,u16 tag,u16 len,const void * ptr,void * data)6099 static int ath12k_wmi_tlv_mgmt_rx_parse(struct ath12k_base *ab,
6100 					u16 tag, u16 len,
6101 					const void *ptr, void *data)
6102 {
6103 	struct wmi_tlv_mgmt_rx_parse *parse = data;
6104 
6105 	switch (tag) {
6106 	case WMI_TAG_MGMT_RX_HDR:
6107 		parse->fixed = ptr;
6108 		break;
6109 	case WMI_TAG_ARRAY_BYTE:
6110 		if (!parse->frame_buf_done) {
6111 			parse->frame_buf = ptr;
6112 			parse->frame_buf_done = true;
6113 		}
6114 		break;
6115 	}
6116 	return 0;
6117 }
6118 
ath12k_pull_mgmt_rx_params_tlv(struct ath12k_base * ab,struct sk_buff * skb,struct ath12k_wmi_mgmt_rx_arg * hdr)6119 static int ath12k_pull_mgmt_rx_params_tlv(struct ath12k_base *ab,
6120 					  struct sk_buff *skb,
6121 					  struct ath12k_wmi_mgmt_rx_arg *hdr)
6122 {
6123 	struct wmi_tlv_mgmt_rx_parse parse = { };
6124 	const struct ath12k_wmi_mgmt_rx_params *ev;
6125 	const u8 *frame;
6126 	int i, ret;
6127 
6128 	ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len,
6129 				  ath12k_wmi_tlv_mgmt_rx_parse,
6130 				  &parse);
6131 	if (ret) {
6132 		ath12k_warn(ab, "failed to parse mgmt rx tlv %d\n", ret);
6133 		return ret;
6134 	}
6135 
6136 	ev = parse.fixed;
6137 	frame = parse.frame_buf;
6138 
6139 	if (!ev || !frame) {
6140 		ath12k_warn(ab, "failed to fetch mgmt rx hdr");
6141 		return -EPROTO;
6142 	}
6143 
6144 	hdr->pdev_id = le32_to_cpu(ev->pdev_id);
6145 	hdr->chan_freq = le32_to_cpu(ev->chan_freq);
6146 	hdr->channel = le32_to_cpu(ev->channel);
6147 	hdr->snr = le32_to_cpu(ev->snr);
6148 	hdr->rate = le32_to_cpu(ev->rate);
6149 	hdr->phy_mode = le32_to_cpu(ev->phy_mode);
6150 	hdr->buf_len = le32_to_cpu(ev->buf_len);
6151 	hdr->status = le32_to_cpu(ev->status);
6152 	hdr->flags = le32_to_cpu(ev->flags);
6153 	hdr->rssi = a_sle32_to_cpu(ev->rssi);
6154 	hdr->tsf_delta = le32_to_cpu(ev->tsf_delta);
6155 
6156 	for (i = 0; i < ATH_MAX_ANTENNA; i++)
6157 		hdr->rssi_ctl[i] = le32_to_cpu(ev->rssi_ctl[i]);
6158 
6159 	if (skb->len < (frame - skb->data) + hdr->buf_len) {
6160 		ath12k_warn(ab, "invalid length in mgmt rx hdr ev");
6161 		return -EPROTO;
6162 	}
6163 
6164 	/* shift the sk_buff to point to `frame` */
6165 	skb_trim(skb, 0);
6166 	skb_put(skb, frame - skb->data);
6167 	skb_pull(skb, frame - skb->data);
6168 	skb_put(skb, hdr->buf_len);
6169 
6170 	return 0;
6171 }
6172 
wmi_process_mgmt_tx_comp(struct ath12k * ar,u32 desc_id,u32 status,u32 ack_rssi)6173 static int wmi_process_mgmt_tx_comp(struct ath12k *ar, u32 desc_id,
6174 				    u32 status, u32 ack_rssi)
6175 {
6176 	struct sk_buff *msdu;
6177 	struct ieee80211_tx_info *info;
6178 	struct ath12k_skb_cb *skb_cb;
6179 	int num_mgmt;
6180 
6181 	spin_lock_bh(&ar->txmgmt_idr_lock);
6182 	msdu = idr_find(&ar->txmgmt_idr, desc_id);
6183 
6184 	if (!msdu) {
6185 		ath12k_warn(ar->ab, "received mgmt tx compl for invalid msdu_id: %d\n",
6186 			    desc_id);
6187 		spin_unlock_bh(&ar->txmgmt_idr_lock);
6188 		return -ENOENT;
6189 	}
6190 
6191 	idr_remove(&ar->txmgmt_idr, desc_id);
6192 	spin_unlock_bh(&ar->txmgmt_idr_lock);
6193 
6194 	skb_cb = ATH12K_SKB_CB(msdu);
6195 	dma_unmap_single(ar->ab->dev, skb_cb->paddr, msdu->len, DMA_TO_DEVICE);
6196 
6197 	info = IEEE80211_SKB_CB(msdu);
6198 	memset(&info->status, 0, sizeof(info->status));
6199 
6200 	/* skip tx rate update from ieee80211_status*/
6201 	info->status.rates[0].idx = -1;
6202 
6203 	if ((!(info->flags & IEEE80211_TX_CTL_NO_ACK)) && !status) {
6204 		info->flags |= IEEE80211_TX_STAT_ACK;
6205 		info->status.ack_signal = ack_rssi;
6206 		info->status.flags |= IEEE80211_TX_STATUS_ACK_SIGNAL_VALID;
6207 	}
6208 
6209 	if ((info->flags & IEEE80211_TX_CTL_NO_ACK) && !status)
6210 		info->flags |= IEEE80211_TX_STAT_NOACK_TRANSMITTED;
6211 
6212 	ieee80211_tx_status_irqsafe(ath12k_ar_to_hw(ar), msdu);
6213 
6214 	num_mgmt = atomic_dec_if_positive(&ar->num_pending_mgmt_tx);
6215 
6216 	/* WARN when we received this event without doing any mgmt tx */
6217 	if (num_mgmt < 0)
6218 		WARN_ON_ONCE(1);
6219 
6220 	if (!num_mgmt)
6221 		wake_up(&ar->txmgmt_empty_waitq);
6222 
6223 	return 0;
6224 }
6225 
ath12k_pull_mgmt_tx_compl_param_tlv(struct ath12k_base * ab,struct sk_buff * skb,struct wmi_mgmt_tx_compl_event * param)6226 static int ath12k_pull_mgmt_tx_compl_param_tlv(struct ath12k_base *ab,
6227 					       struct sk_buff *skb,
6228 					       struct wmi_mgmt_tx_compl_event *param)
6229 {
6230 	const void **tb;
6231 	const struct wmi_mgmt_tx_compl_event *ev;
6232 	int ret;
6233 
6234 	tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
6235 	if (IS_ERR(tb)) {
6236 		ret = PTR_ERR(tb);
6237 		ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
6238 		return ret;
6239 	}
6240 
6241 	ev = tb[WMI_TAG_MGMT_TX_COMPL_EVENT];
6242 	if (!ev) {
6243 		ath12k_warn(ab, "failed to fetch mgmt tx compl ev");
6244 		kfree(tb);
6245 		return -EPROTO;
6246 	}
6247 
6248 	param->pdev_id = ev->pdev_id;
6249 	param->desc_id = ev->desc_id;
6250 	param->status = ev->status;
6251 	param->ppdu_id = ev->ppdu_id;
6252 	param->ack_rssi = ev->ack_rssi;
6253 
6254 	kfree(tb);
6255 	return 0;
6256 }
6257 
ath12k_wmi_event_scan_started(struct ath12k * ar)6258 static void ath12k_wmi_event_scan_started(struct ath12k *ar)
6259 {
6260 	lockdep_assert_held(&ar->data_lock);
6261 
6262 	switch (ar->scan.state) {
6263 	case ATH12K_SCAN_IDLE:
6264 	case ATH12K_SCAN_RUNNING:
6265 	case ATH12K_SCAN_ABORTING:
6266 		ath12k_warn(ar->ab, "received scan started event in an invalid scan state: %s (%d)\n",
6267 			    ath12k_scan_state_str(ar->scan.state),
6268 			    ar->scan.state);
6269 		break;
6270 	case ATH12K_SCAN_STARTING:
6271 		ar->scan.state = ATH12K_SCAN_RUNNING;
6272 
6273 		if (ar->scan.is_roc)
6274 			ieee80211_ready_on_channel(ath12k_ar_to_hw(ar));
6275 
6276 		complete(&ar->scan.started);
6277 		break;
6278 	}
6279 }
6280 
ath12k_wmi_event_scan_start_failed(struct ath12k * ar)6281 static void ath12k_wmi_event_scan_start_failed(struct ath12k *ar)
6282 {
6283 	lockdep_assert_held(&ar->data_lock);
6284 
6285 	switch (ar->scan.state) {
6286 	case ATH12K_SCAN_IDLE:
6287 	case ATH12K_SCAN_RUNNING:
6288 	case ATH12K_SCAN_ABORTING:
6289 		ath12k_warn(ar->ab, "received scan start failed event in an invalid scan state: %s (%d)\n",
6290 			    ath12k_scan_state_str(ar->scan.state),
6291 			    ar->scan.state);
6292 		break;
6293 	case ATH12K_SCAN_STARTING:
6294 		complete(&ar->scan.started);
6295 		__ath12k_mac_scan_finish(ar);
6296 		break;
6297 	}
6298 }
6299 
ath12k_wmi_event_scan_completed(struct ath12k * ar)6300 static void ath12k_wmi_event_scan_completed(struct ath12k *ar)
6301 {
6302 	lockdep_assert_held(&ar->data_lock);
6303 
6304 	switch (ar->scan.state) {
6305 	case ATH12K_SCAN_IDLE:
6306 	case ATH12K_SCAN_STARTING:
6307 		/* One suspected reason scan can be completed while starting is
6308 		 * if firmware fails to deliver all scan events to the host,
6309 		 * e.g. when transport pipe is full. This has been observed
6310 		 * with spectral scan phyerr events starving wmi transport
6311 		 * pipe. In such case the "scan completed" event should be (and
6312 		 * is) ignored by the host as it may be just firmware's scan
6313 		 * state machine recovering.
6314 		 */
6315 		ath12k_warn(ar->ab, "received scan completed event in an invalid scan state: %s (%d)\n",
6316 			    ath12k_scan_state_str(ar->scan.state),
6317 			    ar->scan.state);
6318 		break;
6319 	case ATH12K_SCAN_RUNNING:
6320 	case ATH12K_SCAN_ABORTING:
6321 		__ath12k_mac_scan_finish(ar);
6322 		break;
6323 	}
6324 }
6325 
ath12k_wmi_event_scan_bss_chan(struct ath12k * ar)6326 static void ath12k_wmi_event_scan_bss_chan(struct ath12k *ar)
6327 {
6328 	lockdep_assert_held(&ar->data_lock);
6329 
6330 	switch (ar->scan.state) {
6331 	case ATH12K_SCAN_IDLE:
6332 	case ATH12K_SCAN_STARTING:
6333 		ath12k_warn(ar->ab, "received scan bss chan event in an invalid scan state: %s (%d)\n",
6334 			    ath12k_scan_state_str(ar->scan.state),
6335 			    ar->scan.state);
6336 		break;
6337 	case ATH12K_SCAN_RUNNING:
6338 	case ATH12K_SCAN_ABORTING:
6339 		ar->scan_channel = NULL;
6340 		break;
6341 	}
6342 }
6343 
ath12k_wmi_event_scan_foreign_chan(struct ath12k * ar,u32 freq)6344 static void ath12k_wmi_event_scan_foreign_chan(struct ath12k *ar, u32 freq)
6345 {
6346 	struct ieee80211_hw *hw = ath12k_ar_to_hw(ar);
6347 
6348 	lockdep_assert_held(&ar->data_lock);
6349 
6350 	switch (ar->scan.state) {
6351 	case ATH12K_SCAN_IDLE:
6352 	case ATH12K_SCAN_STARTING:
6353 		ath12k_warn(ar->ab, "received scan foreign chan event in an invalid scan state: %s (%d)\n",
6354 			    ath12k_scan_state_str(ar->scan.state),
6355 			    ar->scan.state);
6356 		break;
6357 	case ATH12K_SCAN_RUNNING:
6358 	case ATH12K_SCAN_ABORTING:
6359 		ar->scan_channel = ieee80211_get_channel(hw->wiphy, freq);
6360 
6361 		if (ar->scan.is_roc && ar->scan.roc_freq == freq)
6362 			complete(&ar->scan.on_channel);
6363 
6364 		break;
6365 	}
6366 }
6367 
6368 static const char *
ath12k_wmi_event_scan_type_str(enum wmi_scan_event_type type,enum wmi_scan_completion_reason reason)6369 ath12k_wmi_event_scan_type_str(enum wmi_scan_event_type type,
6370 			       enum wmi_scan_completion_reason reason)
6371 {
6372 	switch (type) {
6373 	case WMI_SCAN_EVENT_STARTED:
6374 		return "started";
6375 	case WMI_SCAN_EVENT_COMPLETED:
6376 		switch (reason) {
6377 		case WMI_SCAN_REASON_COMPLETED:
6378 			return "completed";
6379 		case WMI_SCAN_REASON_CANCELLED:
6380 			return "completed [cancelled]";
6381 		case WMI_SCAN_REASON_PREEMPTED:
6382 			return "completed [preempted]";
6383 		case WMI_SCAN_REASON_TIMEDOUT:
6384 			return "completed [timedout]";
6385 		case WMI_SCAN_REASON_INTERNAL_FAILURE:
6386 			return "completed [internal err]";
6387 		case WMI_SCAN_REASON_MAX:
6388 			break;
6389 		}
6390 		return "completed [unknown]";
6391 	case WMI_SCAN_EVENT_BSS_CHANNEL:
6392 		return "bss channel";
6393 	case WMI_SCAN_EVENT_FOREIGN_CHAN:
6394 		return "foreign channel";
6395 	case WMI_SCAN_EVENT_DEQUEUED:
6396 		return "dequeued";
6397 	case WMI_SCAN_EVENT_PREEMPTED:
6398 		return "preempted";
6399 	case WMI_SCAN_EVENT_START_FAILED:
6400 		return "start failed";
6401 	case WMI_SCAN_EVENT_RESTARTED:
6402 		return "restarted";
6403 	case WMI_SCAN_EVENT_FOREIGN_CHAN_EXIT:
6404 		return "foreign channel exit";
6405 	default:
6406 		return "unknown";
6407 	}
6408 }
6409 
ath12k_pull_scan_ev(struct ath12k_base * ab,struct sk_buff * skb,struct wmi_scan_event * scan_evt_param)6410 static int ath12k_pull_scan_ev(struct ath12k_base *ab, struct sk_buff *skb,
6411 			       struct wmi_scan_event *scan_evt_param)
6412 {
6413 	const void **tb;
6414 	const struct wmi_scan_event *ev;
6415 	int ret;
6416 
6417 	tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
6418 	if (IS_ERR(tb)) {
6419 		ret = PTR_ERR(tb);
6420 		ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
6421 		return ret;
6422 	}
6423 
6424 	ev = tb[WMI_TAG_SCAN_EVENT];
6425 	if (!ev) {
6426 		ath12k_warn(ab, "failed to fetch scan ev");
6427 		kfree(tb);
6428 		return -EPROTO;
6429 	}
6430 
6431 	scan_evt_param->event_type = ev->event_type;
6432 	scan_evt_param->reason = ev->reason;
6433 	scan_evt_param->channel_freq = ev->channel_freq;
6434 	scan_evt_param->scan_req_id = ev->scan_req_id;
6435 	scan_evt_param->scan_id = ev->scan_id;
6436 	scan_evt_param->vdev_id = ev->vdev_id;
6437 	scan_evt_param->tsf_timestamp = ev->tsf_timestamp;
6438 
6439 	kfree(tb);
6440 	return 0;
6441 }
6442 
ath12k_pull_peer_sta_kickout_ev(struct ath12k_base * ab,struct sk_buff * skb,struct wmi_peer_sta_kickout_arg * arg)6443 static int ath12k_pull_peer_sta_kickout_ev(struct ath12k_base *ab, struct sk_buff *skb,
6444 					   struct wmi_peer_sta_kickout_arg *arg)
6445 {
6446 	const void **tb;
6447 	const struct wmi_peer_sta_kickout_event *ev;
6448 	int ret;
6449 
6450 	tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
6451 	if (IS_ERR(tb)) {
6452 		ret = PTR_ERR(tb);
6453 		ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
6454 		return ret;
6455 	}
6456 
6457 	ev = tb[WMI_TAG_PEER_STA_KICKOUT_EVENT];
6458 	if (!ev) {
6459 		ath12k_warn(ab, "failed to fetch peer sta kickout ev");
6460 		kfree(tb);
6461 		return -EPROTO;
6462 	}
6463 
6464 	arg->mac_addr = ev->peer_macaddr.addr;
6465 
6466 	kfree(tb);
6467 	return 0;
6468 }
6469 
ath12k_pull_roam_ev(struct ath12k_base * ab,struct sk_buff * skb,struct wmi_roam_event * roam_ev)6470 static int ath12k_pull_roam_ev(struct ath12k_base *ab, struct sk_buff *skb,
6471 			       struct wmi_roam_event *roam_ev)
6472 {
6473 	const void **tb;
6474 	const struct wmi_roam_event *ev;
6475 	int ret;
6476 
6477 	tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
6478 	if (IS_ERR(tb)) {
6479 		ret = PTR_ERR(tb);
6480 		ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
6481 		return ret;
6482 	}
6483 
6484 	ev = tb[WMI_TAG_ROAM_EVENT];
6485 	if (!ev) {
6486 		ath12k_warn(ab, "failed to fetch roam ev");
6487 		kfree(tb);
6488 		return -EPROTO;
6489 	}
6490 
6491 	roam_ev->vdev_id = ev->vdev_id;
6492 	roam_ev->reason = ev->reason;
6493 	roam_ev->rssi = ev->rssi;
6494 
6495 	kfree(tb);
6496 	return 0;
6497 }
6498 
freq_to_idx(struct ath12k * ar,int freq)6499 static int freq_to_idx(struct ath12k *ar, int freq)
6500 {
6501 	struct ieee80211_supported_band *sband;
6502 	struct ieee80211_hw *hw = ath12k_ar_to_hw(ar);
6503 	int band, ch, idx = 0;
6504 
6505 	for (band = NL80211_BAND_2GHZ; band < NUM_NL80211_BANDS; band++) {
6506 		if (!ar->mac.sbands[band].channels)
6507 			continue;
6508 
6509 		sband = hw->wiphy->bands[band];
6510 		if (!sband)
6511 			continue;
6512 
6513 		for (ch = 0; ch < sband->n_channels; ch++, idx++) {
6514 			if (sband->channels[ch].center_freq <
6515 			    KHZ_TO_MHZ(ar->freq_range.start_freq) ||
6516 			    sband->channels[ch].center_freq >
6517 			    KHZ_TO_MHZ(ar->freq_range.end_freq))
6518 				continue;
6519 
6520 			if (sband->channels[ch].center_freq == freq)
6521 				goto exit;
6522 		}
6523 	}
6524 
6525 exit:
6526 	return idx;
6527 }
6528 
ath12k_pull_chan_info_ev(struct ath12k_base * ab,struct sk_buff * skb,struct wmi_chan_info_event * ch_info_ev)6529 static int ath12k_pull_chan_info_ev(struct ath12k_base *ab, struct sk_buff *skb,
6530 				    struct wmi_chan_info_event *ch_info_ev)
6531 {
6532 	const void **tb;
6533 	const struct wmi_chan_info_event *ev;
6534 	int ret;
6535 
6536 	tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
6537 	if (IS_ERR(tb)) {
6538 		ret = PTR_ERR(tb);
6539 		ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
6540 		return ret;
6541 	}
6542 
6543 	ev = tb[WMI_TAG_CHAN_INFO_EVENT];
6544 	if (!ev) {
6545 		ath12k_warn(ab, "failed to fetch chan info ev");
6546 		kfree(tb);
6547 		return -EPROTO;
6548 	}
6549 
6550 	ch_info_ev->err_code = ev->err_code;
6551 	ch_info_ev->freq = ev->freq;
6552 	ch_info_ev->cmd_flags = ev->cmd_flags;
6553 	ch_info_ev->noise_floor = ev->noise_floor;
6554 	ch_info_ev->rx_clear_count = ev->rx_clear_count;
6555 	ch_info_ev->cycle_count = ev->cycle_count;
6556 	ch_info_ev->chan_tx_pwr_range = ev->chan_tx_pwr_range;
6557 	ch_info_ev->chan_tx_pwr_tp = ev->chan_tx_pwr_tp;
6558 	ch_info_ev->rx_frame_count = ev->rx_frame_count;
6559 	ch_info_ev->tx_frame_cnt = ev->tx_frame_cnt;
6560 	ch_info_ev->mac_clk_mhz = ev->mac_clk_mhz;
6561 	ch_info_ev->vdev_id = ev->vdev_id;
6562 
6563 	kfree(tb);
6564 	return 0;
6565 }
6566 
6567 static int
ath12k_pull_pdev_bss_chan_info_ev(struct ath12k_base * ab,struct sk_buff * skb,struct wmi_pdev_bss_chan_info_event * bss_ch_info_ev)6568 ath12k_pull_pdev_bss_chan_info_ev(struct ath12k_base *ab, struct sk_buff *skb,
6569 				  struct wmi_pdev_bss_chan_info_event *bss_ch_info_ev)
6570 {
6571 	const void **tb;
6572 	const struct wmi_pdev_bss_chan_info_event *ev;
6573 	int ret;
6574 
6575 	tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
6576 	if (IS_ERR(tb)) {
6577 		ret = PTR_ERR(tb);
6578 		ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
6579 		return ret;
6580 	}
6581 
6582 	ev = tb[WMI_TAG_PDEV_BSS_CHAN_INFO_EVENT];
6583 	if (!ev) {
6584 		ath12k_warn(ab, "failed to fetch pdev bss chan info ev");
6585 		kfree(tb);
6586 		return -EPROTO;
6587 	}
6588 
6589 	bss_ch_info_ev->pdev_id = ev->pdev_id;
6590 	bss_ch_info_ev->freq = ev->freq;
6591 	bss_ch_info_ev->noise_floor = ev->noise_floor;
6592 	bss_ch_info_ev->rx_clear_count_low = ev->rx_clear_count_low;
6593 	bss_ch_info_ev->rx_clear_count_high = ev->rx_clear_count_high;
6594 	bss_ch_info_ev->cycle_count_low = ev->cycle_count_low;
6595 	bss_ch_info_ev->cycle_count_high = ev->cycle_count_high;
6596 	bss_ch_info_ev->tx_cycle_count_low = ev->tx_cycle_count_low;
6597 	bss_ch_info_ev->tx_cycle_count_high = ev->tx_cycle_count_high;
6598 	bss_ch_info_ev->rx_cycle_count_low = ev->rx_cycle_count_low;
6599 	bss_ch_info_ev->rx_cycle_count_high = ev->rx_cycle_count_high;
6600 	bss_ch_info_ev->rx_bss_cycle_count_low = ev->rx_bss_cycle_count_low;
6601 	bss_ch_info_ev->rx_bss_cycle_count_high = ev->rx_bss_cycle_count_high;
6602 
6603 	kfree(tb);
6604 	return 0;
6605 }
6606 
6607 static int
ath12k_pull_vdev_install_key_compl_ev(struct ath12k_base * ab,struct sk_buff * skb,struct wmi_vdev_install_key_complete_arg * arg)6608 ath12k_pull_vdev_install_key_compl_ev(struct ath12k_base *ab, struct sk_buff *skb,
6609 				      struct wmi_vdev_install_key_complete_arg *arg)
6610 {
6611 	const void **tb;
6612 	const struct wmi_vdev_install_key_compl_event *ev;
6613 	int ret;
6614 
6615 	tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
6616 	if (IS_ERR(tb)) {
6617 		ret = PTR_ERR(tb);
6618 		ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
6619 		return ret;
6620 	}
6621 
6622 	ev = tb[WMI_TAG_VDEV_INSTALL_KEY_COMPLETE_EVENT];
6623 	if (!ev) {
6624 		ath12k_warn(ab, "failed to fetch vdev install key compl ev");
6625 		kfree(tb);
6626 		return -EPROTO;
6627 	}
6628 
6629 	arg->vdev_id = le32_to_cpu(ev->vdev_id);
6630 	arg->macaddr = ev->peer_macaddr.addr;
6631 	arg->key_idx = le32_to_cpu(ev->key_idx);
6632 	arg->key_flags = le32_to_cpu(ev->key_flags);
6633 	arg->status = le32_to_cpu(ev->status);
6634 
6635 	kfree(tb);
6636 	return 0;
6637 }
6638 
ath12k_pull_peer_assoc_conf_ev(struct ath12k_base * ab,struct sk_buff * skb,struct wmi_peer_assoc_conf_arg * peer_assoc_conf)6639 static int ath12k_pull_peer_assoc_conf_ev(struct ath12k_base *ab, struct sk_buff *skb,
6640 					  struct wmi_peer_assoc_conf_arg *peer_assoc_conf)
6641 {
6642 	const void **tb;
6643 	const struct wmi_peer_assoc_conf_event *ev;
6644 	int ret;
6645 
6646 	tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
6647 	if (IS_ERR(tb)) {
6648 		ret = PTR_ERR(tb);
6649 		ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
6650 		return ret;
6651 	}
6652 
6653 	ev = tb[WMI_TAG_PEER_ASSOC_CONF_EVENT];
6654 	if (!ev) {
6655 		ath12k_warn(ab, "failed to fetch peer assoc conf ev");
6656 		kfree(tb);
6657 		return -EPROTO;
6658 	}
6659 
6660 	peer_assoc_conf->vdev_id = le32_to_cpu(ev->vdev_id);
6661 	peer_assoc_conf->macaddr = ev->peer_macaddr.addr;
6662 
6663 	kfree(tb);
6664 	return 0;
6665 }
6666 
6667 static int
ath12k_pull_pdev_temp_ev(struct ath12k_base * ab,struct sk_buff * skb,const struct wmi_pdev_temperature_event * ev)6668 ath12k_pull_pdev_temp_ev(struct ath12k_base *ab, struct sk_buff *skb,
6669 			 const struct wmi_pdev_temperature_event *ev)
6670 {
6671 	const void **tb;
6672 	int ret;
6673 
6674 	tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
6675 	if (IS_ERR(tb)) {
6676 		ret = PTR_ERR(tb);
6677 		ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
6678 		return ret;
6679 	}
6680 
6681 	ev = tb[WMI_TAG_PDEV_TEMPERATURE_EVENT];
6682 	if (!ev) {
6683 		ath12k_warn(ab, "failed to fetch pdev temp ev");
6684 		kfree(tb);
6685 		return -EPROTO;
6686 	}
6687 
6688 	kfree(tb);
6689 	return 0;
6690 }
6691 
ath12k_wmi_op_ep_tx_credits(struct ath12k_base * ab)6692 static void ath12k_wmi_op_ep_tx_credits(struct ath12k_base *ab)
6693 {
6694 	/* try to send pending beacons first. they take priority */
6695 	wake_up(&ab->wmi_ab.tx_credits_wq);
6696 }
6697 
ath12k_reg_11d_new_cc_event(struct ath12k_base * ab,struct sk_buff * skb)6698 static int ath12k_reg_11d_new_cc_event(struct ath12k_base *ab, struct sk_buff *skb)
6699 {
6700 	const struct wmi_11d_new_cc_event *ev;
6701 	struct ath12k *ar;
6702 	struct ath12k_pdev *pdev;
6703 	const void **tb;
6704 	int ret, i;
6705 
6706 	tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
6707 	if (IS_ERR(tb)) {
6708 		ret = PTR_ERR(tb);
6709 		ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
6710 		return ret;
6711 	}
6712 
6713 	ev = tb[WMI_TAG_11D_NEW_COUNTRY_EVENT];
6714 	if (!ev) {
6715 		kfree(tb);
6716 		ath12k_warn(ab, "failed to fetch 11d new cc ev");
6717 		return -EPROTO;
6718 	}
6719 
6720 	spin_lock_bh(&ab->base_lock);
6721 	memcpy(&ab->new_alpha2, &ev->new_alpha2, REG_ALPHA2_LEN);
6722 	spin_unlock_bh(&ab->base_lock);
6723 
6724 	ath12k_dbg(ab, ATH12K_DBG_WMI, "wmi 11d new cc %c%c\n",
6725 		   ab->new_alpha2[0],
6726 		   ab->new_alpha2[1]);
6727 
6728 	kfree(tb);
6729 
6730 	for (i = 0; i < ab->num_radios; i++) {
6731 		pdev = &ab->pdevs[i];
6732 		ar = pdev->ar;
6733 		ar->state_11d = ATH12K_11D_IDLE;
6734 		ar->ah->regd_updated = false;
6735 		complete(&ar->completed_11d_scan);
6736 	}
6737 
6738 	queue_work(ab->workqueue, &ab->update_11d_work);
6739 
6740 	return 0;
6741 }
6742 
ath12k_wmi_htc_tx_complete(struct ath12k_base * ab,struct sk_buff * skb)6743 static void ath12k_wmi_htc_tx_complete(struct ath12k_base *ab,
6744 				       struct sk_buff *skb)
6745 {
6746 	dev_kfree_skb(skb);
6747 }
6748 
ath12k_reg_chan_list_event(struct ath12k_base * ab,struct sk_buff * skb)6749 static int ath12k_reg_chan_list_event(struct ath12k_base *ab, struct sk_buff *skb)
6750 {
6751 	struct ath12k_reg_info *reg_info;
6752 	struct ath12k *ar = NULL;
6753 	u8 pdev_idx = 255;
6754 	int ret;
6755 
6756 	reg_info = kzalloc(sizeof(*reg_info), GFP_ATOMIC);
6757 	if (!reg_info) {
6758 		ret = -ENOMEM;
6759 		goto fallback;
6760 	}
6761 
6762 	ret = ath12k_pull_reg_chan_list_ext_update_ev(ab, skb, reg_info);
6763 	if (ret) {
6764 		ath12k_warn(ab, "failed to extract regulatory info from received event\n");
6765 		goto mem_free;
6766 	}
6767 
6768 	ret = ath12k_reg_validate_reg_info(ab, reg_info);
6769 	if (ret == ATH12K_REG_STATUS_FALLBACK) {
6770 		ath12k_warn(ab, "failed to validate reg info %d\n", ret);
6771 		/* firmware has successfully switches to new regd but host can not
6772 		 * continue, so free reginfo and fallback to old regd
6773 		 */
6774 		goto mem_free;
6775 	} else if (ret == ATH12K_REG_STATUS_DROP) {
6776 		/* reg info is valid but we will not store it and
6777 		 * not going to create new regd for it
6778 		 */
6779 		ret = ATH12K_REG_STATUS_VALID;
6780 		goto mem_free;
6781 	}
6782 
6783 	/* free old reg_info if it exist */
6784 	pdev_idx = reg_info->phy_id;
6785 	if (ab->reg_info[pdev_idx]) {
6786 		ath12k_reg_reset_reg_info(ab->reg_info[pdev_idx]);
6787 		kfree(ab->reg_info[pdev_idx]);
6788 	}
6789 	/* reg_info is valid, we store it for later use
6790 	 * even below regd build failed
6791 	 */
6792 	ab->reg_info[pdev_idx] = reg_info;
6793 
6794 	ret = ath12k_reg_handle_chan_list(ab, reg_info, WMI_VDEV_TYPE_UNSPEC,
6795 					  IEEE80211_REG_UNSET_AP);
6796 	if (ret) {
6797 		ath12k_warn(ab, "failed to handle chan list %d\n", ret);
6798 		goto fallback;
6799 	}
6800 
6801 	goto out;
6802 
6803 mem_free:
6804 	ath12k_reg_reset_reg_info(reg_info);
6805 	kfree(reg_info);
6806 
6807 	if (ret == ATH12K_REG_STATUS_VALID)
6808 		goto out;
6809 
6810 fallback:
6811 	/* Fallback to older reg (by sending previous country setting
6812 	 * again if fw has succeeded and we failed to process here.
6813 	 * The Regdomain should be uniform across driver and fw. Since the
6814 	 * FW has processed the command and sent a success status, we expect
6815 	 * this function to succeed as well. If it doesn't, CTRY needs to be
6816 	 * reverted at the fw and the old SCAN_CHAN_LIST cmd needs to be sent.
6817 	 */
6818 	/* TODO: This is rare, but still should also be handled */
6819 	WARN_ON(1);
6820 
6821 out:
6822 	/* In some error cases, even a valid pdev_idx might not be available */
6823 	if (pdev_idx != 255)
6824 		ar = ab->pdevs[pdev_idx].ar;
6825 
6826 	/* During the boot-time update, 'ar' might not be allocated,
6827 	 * so the completion cannot be marked at that point.
6828 	 * This boot-time update is handled in ath12k_mac_hw_register()
6829 	 * before registering the hardware.
6830 	 */
6831 	if (ar)
6832 		complete_all(&ar->regd_update_completed);
6833 
6834 	return ret;
6835 }
6836 
ath12k_wmi_rdy_parse(struct ath12k_base * ab,u16 tag,u16 len,const void * ptr,void * data)6837 static int ath12k_wmi_rdy_parse(struct ath12k_base *ab, u16 tag, u16 len,
6838 				const void *ptr, void *data)
6839 {
6840 	struct ath12k_wmi_rdy_parse *rdy_parse = data;
6841 	struct wmi_ready_event fixed_param;
6842 	struct ath12k_wmi_mac_addr_params *addr_list;
6843 	struct ath12k_pdev *pdev;
6844 	u32 num_mac_addr;
6845 	int i;
6846 
6847 	switch (tag) {
6848 	case WMI_TAG_READY_EVENT:
6849 		memset(&fixed_param, 0, sizeof(fixed_param));
6850 		memcpy(&fixed_param, (struct wmi_ready_event *)ptr,
6851 		       min_t(u16, sizeof(fixed_param), len));
6852 		ab->wlan_init_status = le32_to_cpu(fixed_param.ready_event_min.status);
6853 		rdy_parse->num_extra_mac_addr =
6854 			le32_to_cpu(fixed_param.ready_event_min.num_extra_mac_addr);
6855 
6856 		ether_addr_copy(ab->mac_addr,
6857 				fixed_param.ready_event_min.mac_addr.addr);
6858 		ab->pktlog_defs_checksum = le32_to_cpu(fixed_param.pktlog_defs_checksum);
6859 		ab->wmi_ready = true;
6860 		break;
6861 	case WMI_TAG_ARRAY_FIXED_STRUCT:
6862 		addr_list = (struct ath12k_wmi_mac_addr_params *)ptr;
6863 		num_mac_addr = rdy_parse->num_extra_mac_addr;
6864 
6865 		if (!(ab->num_radios > 1 && num_mac_addr >= ab->num_radios))
6866 			break;
6867 
6868 		for (i = 0; i < ab->num_radios; i++) {
6869 			pdev = &ab->pdevs[i];
6870 			ether_addr_copy(pdev->mac_addr, addr_list[i].addr);
6871 		}
6872 		ab->pdevs_macaddr_valid = true;
6873 		break;
6874 	default:
6875 		break;
6876 	}
6877 
6878 	return 0;
6879 }
6880 
ath12k_ready_event(struct ath12k_base * ab,struct sk_buff * skb)6881 static int ath12k_ready_event(struct ath12k_base *ab, struct sk_buff *skb)
6882 {
6883 	struct ath12k_wmi_rdy_parse rdy_parse = { };
6884 	int ret;
6885 
6886 	ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len,
6887 				  ath12k_wmi_rdy_parse, &rdy_parse);
6888 	if (ret) {
6889 		ath12k_warn(ab, "failed to parse tlv %d\n", ret);
6890 		return ret;
6891 	}
6892 
6893 	complete(&ab->wmi_ab.unified_ready);
6894 	return 0;
6895 }
6896 
ath12k_peer_delete_resp_event(struct ath12k_base * ab,struct sk_buff * skb)6897 static void ath12k_peer_delete_resp_event(struct ath12k_base *ab, struct sk_buff *skb)
6898 {
6899 	struct wmi_peer_delete_resp_event peer_del_resp;
6900 	struct ath12k *ar;
6901 
6902 	if (ath12k_pull_peer_del_resp_ev(ab, skb, &peer_del_resp) != 0) {
6903 		ath12k_warn(ab, "failed to extract peer delete resp");
6904 		return;
6905 	}
6906 
6907 	rcu_read_lock();
6908 	ar = ath12k_mac_get_ar_by_vdev_id(ab, le32_to_cpu(peer_del_resp.vdev_id));
6909 	if (!ar) {
6910 		ath12k_warn(ab, "invalid vdev id in peer delete resp ev %d",
6911 			    peer_del_resp.vdev_id);
6912 		rcu_read_unlock();
6913 		return;
6914 	}
6915 
6916 	complete(&ar->peer_delete_done);
6917 	rcu_read_unlock();
6918 	ath12k_dbg(ab, ATH12K_DBG_WMI, "peer delete resp for vdev id %d addr %pM\n",
6919 		   peer_del_resp.vdev_id, peer_del_resp.peer_macaddr.addr);
6920 }
6921 
ath12k_vdev_delete_resp_event(struct ath12k_base * ab,struct sk_buff * skb)6922 static void ath12k_vdev_delete_resp_event(struct ath12k_base *ab,
6923 					  struct sk_buff *skb)
6924 {
6925 	struct ath12k *ar;
6926 	u32 vdev_id = 0;
6927 
6928 	if (ath12k_pull_vdev_del_resp_ev(ab, skb, &vdev_id) != 0) {
6929 		ath12k_warn(ab, "failed to extract vdev delete resp");
6930 		return;
6931 	}
6932 
6933 	rcu_read_lock();
6934 	ar = ath12k_mac_get_ar_by_vdev_id(ab, vdev_id);
6935 	if (!ar) {
6936 		ath12k_warn(ab, "invalid vdev id in vdev delete resp ev %d",
6937 			    vdev_id);
6938 		rcu_read_unlock();
6939 		return;
6940 	}
6941 
6942 	complete(&ar->vdev_delete_done);
6943 
6944 	rcu_read_unlock();
6945 
6946 	ath12k_dbg(ab, ATH12K_DBG_WMI, "vdev delete resp for vdev id %d\n",
6947 		   vdev_id);
6948 }
6949 
ath12k_wmi_vdev_resp_print(u32 vdev_resp_status)6950 static const char *ath12k_wmi_vdev_resp_print(u32 vdev_resp_status)
6951 {
6952 	switch (vdev_resp_status) {
6953 	case WMI_VDEV_START_RESPONSE_INVALID_VDEVID:
6954 		return "invalid vdev id";
6955 	case WMI_VDEV_START_RESPONSE_NOT_SUPPORTED:
6956 		return "not supported";
6957 	case WMI_VDEV_START_RESPONSE_DFS_VIOLATION:
6958 		return "dfs violation";
6959 	case WMI_VDEV_START_RESPONSE_INVALID_REGDOMAIN:
6960 		return "invalid regdomain";
6961 	default:
6962 		return "unknown";
6963 	}
6964 }
6965 
ath12k_vdev_start_resp_event(struct ath12k_base * ab,struct sk_buff * skb)6966 static void ath12k_vdev_start_resp_event(struct ath12k_base *ab, struct sk_buff *skb)
6967 {
6968 	struct wmi_vdev_start_resp_event vdev_start_resp;
6969 	struct ath12k *ar;
6970 	u32 status;
6971 
6972 	if (ath12k_pull_vdev_start_resp_tlv(ab, skb, &vdev_start_resp) != 0) {
6973 		ath12k_warn(ab, "failed to extract vdev start resp");
6974 		return;
6975 	}
6976 
6977 	rcu_read_lock();
6978 	ar = ath12k_mac_get_ar_by_vdev_id(ab, le32_to_cpu(vdev_start_resp.vdev_id));
6979 	if (!ar) {
6980 		ath12k_warn(ab, "invalid vdev id in vdev start resp ev %d",
6981 			    vdev_start_resp.vdev_id);
6982 		rcu_read_unlock();
6983 		return;
6984 	}
6985 
6986 	ar->last_wmi_vdev_start_status = 0;
6987 
6988 	status = le32_to_cpu(vdev_start_resp.status);
6989 	if (WARN_ON_ONCE(status)) {
6990 		ath12k_warn(ab, "vdev start resp error status %d (%s)\n",
6991 			    status, ath12k_wmi_vdev_resp_print(status));
6992 		ar->last_wmi_vdev_start_status = status;
6993 	}
6994 
6995 	ar->max_allowed_tx_power = (s8)le32_to_cpu(vdev_start_resp.max_allowed_tx_power);
6996 
6997 	complete(&ar->vdev_setup_done);
6998 
6999 	rcu_read_unlock();
7000 
7001 	ath12k_dbg(ab, ATH12K_DBG_WMI, "vdev start resp for vdev id %d",
7002 		   vdev_start_resp.vdev_id);
7003 }
7004 
ath12k_bcn_tx_status_event(struct ath12k_base * ab,struct sk_buff * skb)7005 static void ath12k_bcn_tx_status_event(struct ath12k_base *ab, struct sk_buff *skb)
7006 {
7007 	u32 vdev_id, tx_status;
7008 
7009 	if (ath12k_pull_bcn_tx_status_ev(ab, skb, &vdev_id, &tx_status) != 0) {
7010 		ath12k_warn(ab, "failed to extract bcn tx status");
7011 		return;
7012 	}
7013 }
7014 
ath12k_vdev_stopped_event(struct ath12k_base * ab,struct sk_buff * skb)7015 static void ath12k_vdev_stopped_event(struct ath12k_base *ab, struct sk_buff *skb)
7016 {
7017 	struct ath12k *ar;
7018 	u32 vdev_id = 0;
7019 
7020 	if (ath12k_pull_vdev_stopped_param_tlv(ab, skb, &vdev_id) != 0) {
7021 		ath12k_warn(ab, "failed to extract vdev stopped event");
7022 		return;
7023 	}
7024 
7025 	rcu_read_lock();
7026 	ar = ath12k_mac_get_ar_by_vdev_id(ab, vdev_id);
7027 	if (!ar) {
7028 		ath12k_warn(ab, "invalid vdev id in vdev stopped ev %d",
7029 			    vdev_id);
7030 		rcu_read_unlock();
7031 		return;
7032 	}
7033 
7034 	complete(&ar->vdev_setup_done);
7035 
7036 	rcu_read_unlock();
7037 
7038 	ath12k_dbg(ab, ATH12K_DBG_WMI, "vdev stopped for vdev id %d", vdev_id);
7039 }
7040 
ath12k_mgmt_rx_event(struct ath12k_base * ab,struct sk_buff * skb)7041 static void ath12k_mgmt_rx_event(struct ath12k_base *ab, struct sk_buff *skb)
7042 {
7043 	struct ath12k_wmi_mgmt_rx_arg rx_ev = {};
7044 	struct ath12k *ar;
7045 	struct ieee80211_rx_status *status = IEEE80211_SKB_RXCB(skb);
7046 	struct ieee80211_hdr *hdr;
7047 	u16 fc;
7048 	struct ieee80211_supported_band *sband;
7049 	s32 noise_floor;
7050 
7051 	if (ath12k_pull_mgmt_rx_params_tlv(ab, skb, &rx_ev) != 0) {
7052 		ath12k_warn(ab, "failed to extract mgmt rx event");
7053 		dev_kfree_skb(skb);
7054 		return;
7055 	}
7056 
7057 	memset(status, 0, sizeof(*status));
7058 
7059 	ath12k_dbg(ab, ATH12K_DBG_MGMT, "mgmt rx event status %08x\n",
7060 		   rx_ev.status);
7061 
7062 	rcu_read_lock();
7063 	ar = ath12k_mac_get_ar_by_pdev_id(ab, rx_ev.pdev_id);
7064 
7065 	if (!ar) {
7066 		ath12k_warn(ab, "invalid pdev_id %d in mgmt_rx_event\n",
7067 			    rx_ev.pdev_id);
7068 		dev_kfree_skb(skb);
7069 		goto exit;
7070 	}
7071 
7072 	if ((test_bit(ATH12K_FLAG_CAC_RUNNING, &ar->dev_flags)) ||
7073 	    (rx_ev.status & (WMI_RX_STATUS_ERR_DECRYPT |
7074 			     WMI_RX_STATUS_ERR_KEY_CACHE_MISS |
7075 			     WMI_RX_STATUS_ERR_CRC))) {
7076 		dev_kfree_skb(skb);
7077 		goto exit;
7078 	}
7079 
7080 	if (rx_ev.status & WMI_RX_STATUS_ERR_MIC)
7081 		status->flag |= RX_FLAG_MMIC_ERROR;
7082 
7083 	if (rx_ev.chan_freq >= ATH12K_MIN_6GHZ_FREQ &&
7084 	    rx_ev.chan_freq <= ATH12K_MAX_6GHZ_FREQ) {
7085 		status->band = NL80211_BAND_6GHZ;
7086 		status->freq = rx_ev.chan_freq;
7087 	} else if (rx_ev.channel >= 1 && rx_ev.channel <= 14) {
7088 		status->band = NL80211_BAND_2GHZ;
7089 	} else if (rx_ev.channel >= 36 && rx_ev.channel <= ATH12K_MAX_5GHZ_CHAN) {
7090 		status->band = NL80211_BAND_5GHZ;
7091 	} else {
7092 		/* Shouldn't happen unless list of advertised channels to
7093 		 * mac80211 has been changed.
7094 		 */
7095 		WARN_ON_ONCE(1);
7096 		dev_kfree_skb(skb);
7097 		goto exit;
7098 	}
7099 
7100 	if (rx_ev.phy_mode == MODE_11B &&
7101 	    (status->band == NL80211_BAND_5GHZ || status->band == NL80211_BAND_6GHZ))
7102 		ath12k_dbg(ab, ATH12K_DBG_WMI,
7103 			   "wmi mgmt rx 11b (CCK) on 5/6GHz, band = %d\n", status->band);
7104 
7105 	sband = &ar->mac.sbands[status->band];
7106 
7107 	if (status->band != NL80211_BAND_6GHZ)
7108 		status->freq = ieee80211_channel_to_frequency(rx_ev.channel,
7109 							      status->band);
7110 
7111 	spin_lock_bh(&ar->data_lock);
7112 	noise_floor = ath12k_pdev_get_noise_floor(ar);
7113 	spin_unlock_bh(&ar->data_lock);
7114 
7115 	status->signal = rx_ev.snr + noise_floor;
7116 	status->rate_idx = ath12k_mac_bitrate_to_idx(sband, rx_ev.rate / 100);
7117 
7118 	hdr = (struct ieee80211_hdr *)skb->data;
7119 	fc = le16_to_cpu(hdr->frame_control);
7120 
7121 	/* Firmware is guaranteed to report all essential management frames via
7122 	 * WMI while it can deliver some extra via HTT. Since there can be
7123 	 * duplicates split the reporting wrt monitor/sniffing.
7124 	 */
7125 	status->flag |= RX_FLAG_SKIP_MONITOR;
7126 
7127 	/* In case of PMF, FW delivers decrypted frames with Protected Bit set
7128 	 * including group privacy action frames.
7129 	 */
7130 	if (ieee80211_has_protected(hdr->frame_control)) {
7131 		status->flag |= RX_FLAG_DECRYPTED;
7132 
7133 		if (!ieee80211_is_robust_mgmt_frame(skb)) {
7134 			status->flag |= RX_FLAG_IV_STRIPPED |
7135 					RX_FLAG_MMIC_STRIPPED;
7136 			hdr->frame_control = __cpu_to_le16(fc &
7137 					     ~IEEE80211_FCTL_PROTECTED);
7138 		}
7139 	}
7140 
7141 	if (ieee80211_is_beacon(hdr->frame_control))
7142 		ath12k_mac_handle_beacon(ar, skb);
7143 
7144 	ath12k_dbg(ab, ATH12K_DBG_MGMT,
7145 		   "event mgmt rx skb %p len %d ftype %02x stype %02x\n",
7146 		   skb, skb->len,
7147 		   fc & IEEE80211_FCTL_FTYPE, fc & IEEE80211_FCTL_STYPE);
7148 
7149 	ath12k_dbg(ab, ATH12K_DBG_MGMT,
7150 		   "event mgmt rx freq %d band %d snr %d, rate_idx %d\n",
7151 		   status->freq, status->band, status->signal,
7152 		   status->rate_idx);
7153 
7154 	ieee80211_rx_ni(ath12k_ar_to_hw(ar), skb);
7155 
7156 exit:
7157 	rcu_read_unlock();
7158 }
7159 
ath12k_mgmt_tx_compl_event(struct ath12k_base * ab,struct sk_buff * skb)7160 static void ath12k_mgmt_tx_compl_event(struct ath12k_base *ab, struct sk_buff *skb)
7161 {
7162 	struct wmi_mgmt_tx_compl_event tx_compl_param = {};
7163 	struct ath12k *ar;
7164 
7165 	if (ath12k_pull_mgmt_tx_compl_param_tlv(ab, skb, &tx_compl_param) != 0) {
7166 		ath12k_warn(ab, "failed to extract mgmt tx compl event");
7167 		return;
7168 	}
7169 
7170 	rcu_read_lock();
7171 	ar = ath12k_mac_get_ar_by_pdev_id(ab, le32_to_cpu(tx_compl_param.pdev_id));
7172 	if (!ar) {
7173 		ath12k_warn(ab, "invalid pdev id %d in mgmt_tx_compl_event\n",
7174 			    tx_compl_param.pdev_id);
7175 		goto exit;
7176 	}
7177 
7178 	wmi_process_mgmt_tx_comp(ar, le32_to_cpu(tx_compl_param.desc_id),
7179 				 le32_to_cpu(tx_compl_param.status),
7180 				 le32_to_cpu(tx_compl_param.ack_rssi));
7181 
7182 	ath12k_dbg(ab, ATH12K_DBG_MGMT,
7183 		   "mgmt tx compl ev pdev_id %d, desc_id %d, status %d",
7184 		   tx_compl_param.pdev_id, tx_compl_param.desc_id,
7185 		   tx_compl_param.status);
7186 
7187 exit:
7188 	rcu_read_unlock();
7189 }
7190 
ath12k_get_ar_on_scan_state(struct ath12k_base * ab,u32 vdev_id,enum ath12k_scan_state state)7191 static struct ath12k *ath12k_get_ar_on_scan_state(struct ath12k_base *ab,
7192 						  u32 vdev_id,
7193 						  enum ath12k_scan_state state)
7194 {
7195 	int i;
7196 	struct ath12k_pdev *pdev;
7197 	struct ath12k *ar;
7198 
7199 	for (i = 0; i < ab->num_radios; i++) {
7200 		pdev = rcu_dereference(ab->pdevs_active[i]);
7201 		if (pdev && pdev->ar) {
7202 			ar = pdev->ar;
7203 
7204 			spin_lock_bh(&ar->data_lock);
7205 			if (ar->scan.state == state &&
7206 			    ar->scan.arvif &&
7207 			    ar->scan.arvif->vdev_id == vdev_id) {
7208 				spin_unlock_bh(&ar->data_lock);
7209 				return ar;
7210 			}
7211 			spin_unlock_bh(&ar->data_lock);
7212 		}
7213 	}
7214 	return NULL;
7215 }
7216 
ath12k_scan_event(struct ath12k_base * ab,struct sk_buff * skb)7217 static void ath12k_scan_event(struct ath12k_base *ab, struct sk_buff *skb)
7218 {
7219 	struct ath12k *ar;
7220 	struct wmi_scan_event scan_ev = {};
7221 
7222 	if (ath12k_pull_scan_ev(ab, skb, &scan_ev) != 0) {
7223 		ath12k_warn(ab, "failed to extract scan event");
7224 		return;
7225 	}
7226 
7227 	rcu_read_lock();
7228 
7229 	/* In case the scan was cancelled, ex. during interface teardown,
7230 	 * the interface will not be found in active interfaces.
7231 	 * Rather, in such scenarios, iterate over the active pdev's to
7232 	 * search 'ar' if the corresponding 'ar' scan is ABORTING and the
7233 	 * aborting scan's vdev id matches this event info.
7234 	 */
7235 	if (le32_to_cpu(scan_ev.event_type) == WMI_SCAN_EVENT_COMPLETED &&
7236 	    le32_to_cpu(scan_ev.reason) == WMI_SCAN_REASON_CANCELLED) {
7237 		ar = ath12k_get_ar_on_scan_state(ab, le32_to_cpu(scan_ev.vdev_id),
7238 						 ATH12K_SCAN_ABORTING);
7239 		if (!ar)
7240 			ar = ath12k_get_ar_on_scan_state(ab, le32_to_cpu(scan_ev.vdev_id),
7241 							 ATH12K_SCAN_RUNNING);
7242 	} else {
7243 		ar = ath12k_mac_get_ar_by_vdev_id(ab, le32_to_cpu(scan_ev.vdev_id));
7244 	}
7245 
7246 	if (!ar) {
7247 		ath12k_warn(ab, "Received scan event for unknown vdev");
7248 		rcu_read_unlock();
7249 		return;
7250 	}
7251 
7252 	spin_lock_bh(&ar->data_lock);
7253 
7254 	ath12k_dbg(ab, ATH12K_DBG_WMI,
7255 		   "scan event %s type %d reason %d freq %d req_id %d scan_id %d vdev_id %d state %s (%d)\n",
7256 		   ath12k_wmi_event_scan_type_str(le32_to_cpu(scan_ev.event_type),
7257 						  le32_to_cpu(scan_ev.reason)),
7258 		   le32_to_cpu(scan_ev.event_type),
7259 		   le32_to_cpu(scan_ev.reason),
7260 		   le32_to_cpu(scan_ev.channel_freq),
7261 		   le32_to_cpu(scan_ev.scan_req_id),
7262 		   le32_to_cpu(scan_ev.scan_id),
7263 		   le32_to_cpu(scan_ev.vdev_id),
7264 		   ath12k_scan_state_str(ar->scan.state), ar->scan.state);
7265 
7266 	switch (le32_to_cpu(scan_ev.event_type)) {
7267 	case WMI_SCAN_EVENT_STARTED:
7268 		ath12k_wmi_event_scan_started(ar);
7269 		break;
7270 	case WMI_SCAN_EVENT_COMPLETED:
7271 		ath12k_wmi_event_scan_completed(ar);
7272 		break;
7273 	case WMI_SCAN_EVENT_BSS_CHANNEL:
7274 		ath12k_wmi_event_scan_bss_chan(ar);
7275 		break;
7276 	case WMI_SCAN_EVENT_FOREIGN_CHAN:
7277 		ath12k_wmi_event_scan_foreign_chan(ar, le32_to_cpu(scan_ev.channel_freq));
7278 		break;
7279 	case WMI_SCAN_EVENT_START_FAILED:
7280 		ath12k_warn(ab, "received scan start failure event\n");
7281 		ath12k_wmi_event_scan_start_failed(ar);
7282 		break;
7283 	case WMI_SCAN_EVENT_DEQUEUED:
7284 		__ath12k_mac_scan_finish(ar);
7285 		break;
7286 	case WMI_SCAN_EVENT_PREEMPTED:
7287 	case WMI_SCAN_EVENT_RESTARTED:
7288 	case WMI_SCAN_EVENT_FOREIGN_CHAN_EXIT:
7289 	default:
7290 		break;
7291 	}
7292 
7293 	spin_unlock_bh(&ar->data_lock);
7294 
7295 	rcu_read_unlock();
7296 }
7297 
ath12k_peer_sta_kickout_event(struct ath12k_base * ab,struct sk_buff * skb)7298 static void ath12k_peer_sta_kickout_event(struct ath12k_base *ab, struct sk_buff *skb)
7299 {
7300 	struct wmi_peer_sta_kickout_arg arg = {};
7301 	struct ieee80211_sta *sta;
7302 	struct ath12k_peer *peer;
7303 	struct ath12k *ar;
7304 
7305 	if (ath12k_pull_peer_sta_kickout_ev(ab, skb, &arg) != 0) {
7306 		ath12k_warn(ab, "failed to extract peer sta kickout event");
7307 		return;
7308 	}
7309 
7310 	rcu_read_lock();
7311 
7312 	spin_lock_bh(&ab->base_lock);
7313 
7314 	peer = ath12k_peer_find_by_addr(ab, arg.mac_addr);
7315 
7316 	if (!peer) {
7317 		ath12k_warn(ab, "peer not found %pM\n",
7318 			    arg.mac_addr);
7319 		goto exit;
7320 	}
7321 
7322 	ar = ath12k_mac_get_ar_by_vdev_id(ab, peer->vdev_id);
7323 	if (!ar) {
7324 		ath12k_warn(ab, "invalid vdev id in peer sta kickout ev %d",
7325 			    peer->vdev_id);
7326 		goto exit;
7327 	}
7328 
7329 	sta = ieee80211_find_sta_by_ifaddr(ath12k_ar_to_hw(ar),
7330 					   arg.mac_addr, NULL);
7331 	if (!sta) {
7332 		ath12k_warn(ab, "Spurious quick kickout for STA %pM\n",
7333 			    arg.mac_addr);
7334 		goto exit;
7335 	}
7336 
7337 	ath12k_dbg(ab, ATH12K_DBG_WMI, "peer sta kickout event %pM",
7338 		   arg.mac_addr);
7339 
7340 	ieee80211_report_low_ack(sta, 10);
7341 
7342 exit:
7343 	spin_unlock_bh(&ab->base_lock);
7344 	rcu_read_unlock();
7345 }
7346 
ath12k_roam_event(struct ath12k_base * ab,struct sk_buff * skb)7347 static void ath12k_roam_event(struct ath12k_base *ab, struct sk_buff *skb)
7348 {
7349 	struct wmi_roam_event roam_ev = {};
7350 	struct ath12k *ar;
7351 	u32 vdev_id;
7352 	u8 roam_reason;
7353 
7354 	if (ath12k_pull_roam_ev(ab, skb, &roam_ev) != 0) {
7355 		ath12k_warn(ab, "failed to extract roam event");
7356 		return;
7357 	}
7358 
7359 	vdev_id = le32_to_cpu(roam_ev.vdev_id);
7360 	roam_reason = u32_get_bits(le32_to_cpu(roam_ev.reason),
7361 				   WMI_ROAM_REASON_MASK);
7362 
7363 	ath12k_dbg(ab, ATH12K_DBG_WMI,
7364 		   "wmi roam event vdev %u reason %d rssi %d\n",
7365 		   vdev_id, roam_reason, roam_ev.rssi);
7366 
7367 	rcu_read_lock();
7368 	ar = ath12k_mac_get_ar_by_vdev_id(ab, vdev_id);
7369 	if (!ar) {
7370 		ath12k_warn(ab, "invalid vdev id in roam ev %d", vdev_id);
7371 		rcu_read_unlock();
7372 		return;
7373 	}
7374 
7375 	if (roam_reason >= WMI_ROAM_REASON_MAX)
7376 		ath12k_warn(ab, "ignoring unknown roam event reason %d on vdev %i\n",
7377 			    roam_reason, vdev_id);
7378 
7379 	switch (roam_reason) {
7380 	case WMI_ROAM_REASON_BEACON_MISS:
7381 		ath12k_mac_handle_beacon_miss(ar, vdev_id);
7382 		break;
7383 	case WMI_ROAM_REASON_BETTER_AP:
7384 	case WMI_ROAM_REASON_LOW_RSSI:
7385 	case WMI_ROAM_REASON_SUITABLE_AP_FOUND:
7386 	case WMI_ROAM_REASON_HO_FAILED:
7387 		ath12k_warn(ab, "ignoring not implemented roam event reason %d on vdev %i\n",
7388 			    roam_reason, vdev_id);
7389 		break;
7390 	}
7391 
7392 	rcu_read_unlock();
7393 }
7394 
ath12k_chan_info_event(struct ath12k_base * ab,struct sk_buff * skb)7395 static void ath12k_chan_info_event(struct ath12k_base *ab, struct sk_buff *skb)
7396 {
7397 	struct wmi_chan_info_event ch_info_ev = {};
7398 	struct ath12k *ar;
7399 	struct survey_info *survey;
7400 	int idx;
7401 	/* HW channel counters frequency value in hertz */
7402 	u32 cc_freq_hz = ab->cc_freq_hz;
7403 
7404 	if (ath12k_pull_chan_info_ev(ab, skb, &ch_info_ev) != 0) {
7405 		ath12k_warn(ab, "failed to extract chan info event");
7406 		return;
7407 	}
7408 
7409 	ath12k_dbg(ab, ATH12K_DBG_WMI,
7410 		   "chan info vdev_id %d err_code %d freq %d cmd_flags %d noise_floor %d rx_clear_count %d cycle_count %d mac_clk_mhz %d\n",
7411 		   ch_info_ev.vdev_id, ch_info_ev.err_code, ch_info_ev.freq,
7412 		   ch_info_ev.cmd_flags, ch_info_ev.noise_floor,
7413 		   ch_info_ev.rx_clear_count, ch_info_ev.cycle_count,
7414 		   ch_info_ev.mac_clk_mhz);
7415 
7416 	if (le32_to_cpu(ch_info_ev.cmd_flags) == WMI_CHAN_INFO_END_RESP) {
7417 		ath12k_dbg(ab, ATH12K_DBG_WMI, "chan info report completed\n");
7418 		return;
7419 	}
7420 
7421 	rcu_read_lock();
7422 	ar = ath12k_mac_get_ar_by_vdev_id(ab, le32_to_cpu(ch_info_ev.vdev_id));
7423 	if (!ar) {
7424 		ath12k_warn(ab, "invalid vdev id in chan info ev %d",
7425 			    ch_info_ev.vdev_id);
7426 		rcu_read_unlock();
7427 		return;
7428 	}
7429 	spin_lock_bh(&ar->data_lock);
7430 
7431 	switch (ar->scan.state) {
7432 	case ATH12K_SCAN_IDLE:
7433 	case ATH12K_SCAN_STARTING:
7434 		ath12k_warn(ab, "received chan info event without a scan request, ignoring\n");
7435 		goto exit;
7436 	case ATH12K_SCAN_RUNNING:
7437 	case ATH12K_SCAN_ABORTING:
7438 		break;
7439 	}
7440 
7441 	idx = freq_to_idx(ar, le32_to_cpu(ch_info_ev.freq));
7442 	if (idx >= ARRAY_SIZE(ar->survey)) {
7443 		ath12k_warn(ab, "chan info: invalid frequency %d (idx %d out of bounds)\n",
7444 			    ch_info_ev.freq, idx);
7445 		goto exit;
7446 	}
7447 
7448 	/* If FW provides MAC clock frequency in Mhz, overriding the initialized
7449 	 * HW channel counters frequency value
7450 	 */
7451 	if (ch_info_ev.mac_clk_mhz)
7452 		cc_freq_hz = (le32_to_cpu(ch_info_ev.mac_clk_mhz) * 1000);
7453 
7454 	if (ch_info_ev.cmd_flags == WMI_CHAN_INFO_START_RESP) {
7455 		survey = &ar->survey[idx];
7456 		memset(survey, 0, sizeof(*survey));
7457 		survey->noise = le32_to_cpu(ch_info_ev.noise_floor);
7458 		survey->filled = SURVEY_INFO_NOISE_DBM | SURVEY_INFO_TIME |
7459 				 SURVEY_INFO_TIME_BUSY;
7460 		survey->time = div_u64(le32_to_cpu(ch_info_ev.cycle_count), cc_freq_hz);
7461 		survey->time_busy = div_u64(le32_to_cpu(ch_info_ev.rx_clear_count),
7462 					    cc_freq_hz);
7463 	}
7464 exit:
7465 	spin_unlock_bh(&ar->data_lock);
7466 	rcu_read_unlock();
7467 }
7468 
7469 static void
ath12k_pdev_bss_chan_info_event(struct ath12k_base * ab,struct sk_buff * skb)7470 ath12k_pdev_bss_chan_info_event(struct ath12k_base *ab, struct sk_buff *skb)
7471 {
7472 	struct wmi_pdev_bss_chan_info_event bss_ch_info_ev = {};
7473 	struct survey_info *survey;
7474 	struct ath12k *ar;
7475 	u32 cc_freq_hz = ab->cc_freq_hz;
7476 	u64 busy, total, tx, rx, rx_bss;
7477 	int idx;
7478 
7479 	if (ath12k_pull_pdev_bss_chan_info_ev(ab, skb, &bss_ch_info_ev) != 0) {
7480 		ath12k_warn(ab, "failed to extract pdev bss chan info event");
7481 		return;
7482 	}
7483 
7484 	busy = (u64)(le32_to_cpu(bss_ch_info_ev.rx_clear_count_high)) << 32 |
7485 		le32_to_cpu(bss_ch_info_ev.rx_clear_count_low);
7486 
7487 	total = (u64)(le32_to_cpu(bss_ch_info_ev.cycle_count_high)) << 32 |
7488 		le32_to_cpu(bss_ch_info_ev.cycle_count_low);
7489 
7490 	tx = (u64)(le32_to_cpu(bss_ch_info_ev.tx_cycle_count_high)) << 32 |
7491 		le32_to_cpu(bss_ch_info_ev.tx_cycle_count_low);
7492 
7493 	rx = (u64)(le32_to_cpu(bss_ch_info_ev.rx_cycle_count_high)) << 32 |
7494 		le32_to_cpu(bss_ch_info_ev.rx_cycle_count_low);
7495 
7496 	rx_bss = (u64)(le32_to_cpu(bss_ch_info_ev.rx_bss_cycle_count_high)) << 32 |
7497 		le32_to_cpu(bss_ch_info_ev.rx_bss_cycle_count_low);
7498 
7499 	ath12k_dbg(ab, ATH12K_DBG_WMI,
7500 		   "pdev bss chan info:\n pdev_id: %d freq: %d noise: %d cycle: busy %llu total %llu tx %llu rx %llu rx_bss %llu\n",
7501 		   bss_ch_info_ev.pdev_id, bss_ch_info_ev.freq,
7502 		   bss_ch_info_ev.noise_floor, busy, total,
7503 		   tx, rx, rx_bss);
7504 
7505 	rcu_read_lock();
7506 	ar = ath12k_mac_get_ar_by_pdev_id(ab, le32_to_cpu(bss_ch_info_ev.pdev_id));
7507 
7508 	if (!ar) {
7509 		ath12k_warn(ab, "invalid pdev id %d in bss_chan_info event\n",
7510 			    bss_ch_info_ev.pdev_id);
7511 		rcu_read_unlock();
7512 		return;
7513 	}
7514 
7515 	spin_lock_bh(&ar->data_lock);
7516 	idx = freq_to_idx(ar, le32_to_cpu(bss_ch_info_ev.freq));
7517 	if (idx >= ARRAY_SIZE(ar->survey)) {
7518 		ath12k_warn(ab, "bss chan info: invalid frequency %d (idx %d out of bounds)\n",
7519 			    bss_ch_info_ev.freq, idx);
7520 		goto exit;
7521 	}
7522 
7523 	survey = &ar->survey[idx];
7524 
7525 	survey->noise     = le32_to_cpu(bss_ch_info_ev.noise_floor);
7526 	survey->time      = div_u64(total, cc_freq_hz);
7527 	survey->time_busy = div_u64(busy, cc_freq_hz);
7528 	survey->time_rx   = div_u64(rx_bss, cc_freq_hz);
7529 	survey->time_tx   = div_u64(tx, cc_freq_hz);
7530 	survey->filled   |= (SURVEY_INFO_NOISE_DBM |
7531 			     SURVEY_INFO_TIME |
7532 			     SURVEY_INFO_TIME_BUSY |
7533 			     SURVEY_INFO_TIME_RX |
7534 			     SURVEY_INFO_TIME_TX);
7535 exit:
7536 	spin_unlock_bh(&ar->data_lock);
7537 	complete(&ar->bss_survey_done);
7538 
7539 	rcu_read_unlock();
7540 }
7541 
ath12k_vdev_install_key_compl_event(struct ath12k_base * ab,struct sk_buff * skb)7542 static void ath12k_vdev_install_key_compl_event(struct ath12k_base *ab,
7543 						struct sk_buff *skb)
7544 {
7545 	struct wmi_vdev_install_key_complete_arg install_key_compl = {};
7546 	struct ath12k *ar;
7547 
7548 	if (ath12k_pull_vdev_install_key_compl_ev(ab, skb, &install_key_compl) != 0) {
7549 		ath12k_warn(ab, "failed to extract install key compl event");
7550 		return;
7551 	}
7552 
7553 	ath12k_dbg(ab, ATH12K_DBG_WMI,
7554 		   "vdev install key ev idx %d flags %08x macaddr %pM status %d\n",
7555 		   install_key_compl.key_idx, install_key_compl.key_flags,
7556 		   install_key_compl.macaddr, install_key_compl.status);
7557 
7558 	rcu_read_lock();
7559 	ar = ath12k_mac_get_ar_by_vdev_id(ab, install_key_compl.vdev_id);
7560 	if (!ar) {
7561 		ath12k_warn(ab, "invalid vdev id in install key compl ev %d",
7562 			    install_key_compl.vdev_id);
7563 		rcu_read_unlock();
7564 		return;
7565 	}
7566 
7567 	ar->install_key_status = 0;
7568 
7569 	if (install_key_compl.status != WMI_VDEV_INSTALL_KEY_COMPL_STATUS_SUCCESS) {
7570 		ath12k_warn(ab, "install key failed for %pM status %d\n",
7571 			    install_key_compl.macaddr, install_key_compl.status);
7572 		ar->install_key_status = install_key_compl.status;
7573 	}
7574 
7575 	complete(&ar->install_key_done);
7576 	rcu_read_unlock();
7577 }
7578 
ath12k_wmi_tlv_services_parser(struct ath12k_base * ab,u16 tag,u16 len,const void * ptr,void * data)7579 static int ath12k_wmi_tlv_services_parser(struct ath12k_base *ab,
7580 					  u16 tag, u16 len,
7581 					  const void *ptr,
7582 					  void *data)
7583 {
7584 	const struct wmi_service_available_event *ev;
7585 	u16 wmi_ext2_service_words;
7586 	__le32 *wmi_ext2_service_bitmap;
7587 	int i, j;
7588 	u16 expected_len;
7589 
7590 	expected_len = WMI_SERVICE_SEGMENT_BM_SIZE32 * sizeof(u32);
7591 	if (len < expected_len) {
7592 		ath12k_warn(ab, "invalid length %d for the WMI services available tag 0x%x\n",
7593 			    len, tag);
7594 		return -EINVAL;
7595 	}
7596 
7597 	switch (tag) {
7598 	case WMI_TAG_SERVICE_AVAILABLE_EVENT:
7599 		ev = (struct wmi_service_available_event *)ptr;
7600 		for (i = 0, j = WMI_MAX_SERVICE;
7601 		     i < WMI_SERVICE_SEGMENT_BM_SIZE32 && j < WMI_MAX_EXT_SERVICE;
7602 		     i++) {
7603 			do {
7604 				if (le32_to_cpu(ev->wmi_service_segment_bitmap[i]) &
7605 				    BIT(j % WMI_AVAIL_SERVICE_BITS_IN_SIZE32))
7606 					set_bit(j, ab->wmi_ab.svc_map);
7607 			} while (++j % WMI_AVAIL_SERVICE_BITS_IN_SIZE32);
7608 		}
7609 
7610 		ath12k_dbg(ab, ATH12K_DBG_WMI,
7611 			   "wmi_ext_service_bitmap 0x%x 0x%x 0x%x 0x%x",
7612 			   ev->wmi_service_segment_bitmap[0],
7613 			   ev->wmi_service_segment_bitmap[1],
7614 			   ev->wmi_service_segment_bitmap[2],
7615 			   ev->wmi_service_segment_bitmap[3]);
7616 		break;
7617 	case WMI_TAG_ARRAY_UINT32:
7618 		wmi_ext2_service_bitmap = (__le32 *)ptr;
7619 		wmi_ext2_service_words = len / sizeof(u32);
7620 		for (i = 0, j = WMI_MAX_EXT_SERVICE;
7621 		     i < wmi_ext2_service_words && j < WMI_MAX_EXT2_SERVICE;
7622 		     i++) {
7623 			do {
7624 				if (__le32_to_cpu(wmi_ext2_service_bitmap[i]) &
7625 				    BIT(j % WMI_AVAIL_SERVICE_BITS_IN_SIZE32))
7626 					set_bit(j, ab->wmi_ab.svc_map);
7627 			} while (++j % WMI_AVAIL_SERVICE_BITS_IN_SIZE32);
7628 			ath12k_dbg(ab, ATH12K_DBG_WMI,
7629 				   "wmi_ext2_service bitmap 0x%08x\n",
7630 				   __le32_to_cpu(wmi_ext2_service_bitmap[i]));
7631 		}
7632 
7633 		break;
7634 	}
7635 	return 0;
7636 }
7637 
ath12k_service_available_event(struct ath12k_base * ab,struct sk_buff * skb)7638 static int ath12k_service_available_event(struct ath12k_base *ab, struct sk_buff *skb)
7639 {
7640 	int ret;
7641 
7642 	ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len,
7643 				  ath12k_wmi_tlv_services_parser,
7644 				  NULL);
7645 	return ret;
7646 }
7647 
ath12k_peer_assoc_conf_event(struct ath12k_base * ab,struct sk_buff * skb)7648 static void ath12k_peer_assoc_conf_event(struct ath12k_base *ab, struct sk_buff *skb)
7649 {
7650 	struct wmi_peer_assoc_conf_arg peer_assoc_conf = {};
7651 	struct ath12k *ar;
7652 
7653 	if (ath12k_pull_peer_assoc_conf_ev(ab, skb, &peer_assoc_conf) != 0) {
7654 		ath12k_warn(ab, "failed to extract peer assoc conf event");
7655 		return;
7656 	}
7657 
7658 	ath12k_dbg(ab, ATH12K_DBG_WMI,
7659 		   "peer assoc conf ev vdev id %d macaddr %pM\n",
7660 		   peer_assoc_conf.vdev_id, peer_assoc_conf.macaddr);
7661 
7662 	rcu_read_lock();
7663 	ar = ath12k_mac_get_ar_by_vdev_id(ab, peer_assoc_conf.vdev_id);
7664 
7665 	if (!ar) {
7666 		ath12k_warn(ab, "invalid vdev id in peer assoc conf ev %d",
7667 			    peer_assoc_conf.vdev_id);
7668 		rcu_read_unlock();
7669 		return;
7670 	}
7671 
7672 	complete(&ar->peer_assoc_done);
7673 	rcu_read_unlock();
7674 }
7675 
7676 static void
ath12k_wmi_fw_vdev_stats_dump(struct ath12k * ar,struct ath12k_fw_stats * fw_stats,char * buf,u32 * length)7677 ath12k_wmi_fw_vdev_stats_dump(struct ath12k *ar,
7678 			      struct ath12k_fw_stats *fw_stats,
7679 			      char *buf, u32 *length)
7680 {
7681 	const struct ath12k_fw_stats_vdev *vdev;
7682 	u32 buf_len = ATH12K_FW_STATS_BUF_SIZE;
7683 	struct ath12k_link_vif *arvif;
7684 	u32 len = *length;
7685 	u8 *vif_macaddr;
7686 	int i;
7687 
7688 	len += scnprintf(buf + len, buf_len - len, "\n");
7689 	len += scnprintf(buf + len, buf_len - len, "%30s\n",
7690 			 "ath12k VDEV stats");
7691 	len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
7692 			 "=================");
7693 
7694 	list_for_each_entry(vdev, &fw_stats->vdevs, list) {
7695 		arvif = ath12k_mac_get_arvif(ar, vdev->vdev_id);
7696 		if (!arvif)
7697 			continue;
7698 		vif_macaddr = arvif->ahvif->vif->addr;
7699 
7700 		len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
7701 				 "VDEV ID", vdev->vdev_id);
7702 		len += scnprintf(buf + len, buf_len - len, "%30s %pM\n",
7703 				 "VDEV MAC address", vif_macaddr);
7704 		len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
7705 				 "beacon snr", vdev->beacon_snr);
7706 		len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
7707 				 "data snr", vdev->data_snr);
7708 		len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
7709 				 "num rx frames", vdev->num_rx_frames);
7710 		len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
7711 				 "num rts fail", vdev->num_rts_fail);
7712 		len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
7713 				 "num rts success", vdev->num_rts_success);
7714 		len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
7715 				 "num rx err", vdev->num_rx_err);
7716 		len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
7717 				 "num rx discard", vdev->num_rx_discard);
7718 		len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
7719 				 "num tx not acked", vdev->num_tx_not_acked);
7720 
7721 		for (i = 0 ; i < WLAN_MAX_AC; i++)
7722 			len += scnprintf(buf + len, buf_len - len,
7723 					"%25s [%02d] %u\n",
7724 					"num tx frames", i,
7725 					vdev->num_tx_frames[i]);
7726 
7727 		for (i = 0 ; i < WLAN_MAX_AC; i++)
7728 			len += scnprintf(buf + len, buf_len - len,
7729 					"%25s [%02d] %u\n",
7730 					"num tx frames retries", i,
7731 					vdev->num_tx_frames_retries[i]);
7732 
7733 		for (i = 0 ; i < WLAN_MAX_AC; i++)
7734 			len += scnprintf(buf + len, buf_len - len,
7735 					"%25s [%02d] %u\n",
7736 					"num tx frames failures", i,
7737 					vdev->num_tx_frames_failures[i]);
7738 
7739 		for (i = 0 ; i < MAX_TX_RATE_VALUES; i++)
7740 			len += scnprintf(buf + len, buf_len - len,
7741 					"%25s [%02d] 0x%08x\n",
7742 					"tx rate history", i,
7743 					vdev->tx_rate_history[i]);
7744 		for (i = 0 ; i < MAX_TX_RATE_VALUES; i++)
7745 			len += scnprintf(buf + len, buf_len - len,
7746 					"%25s [%02d] %u\n",
7747 					"beacon rssi history", i,
7748 					vdev->beacon_rssi_history[i]);
7749 
7750 		len += scnprintf(buf + len, buf_len - len, "\n");
7751 		*length = len;
7752 	}
7753 }
7754 
7755 static void
ath12k_wmi_fw_bcn_stats_dump(struct ath12k * ar,struct ath12k_fw_stats * fw_stats,char * buf,u32 * length)7756 ath12k_wmi_fw_bcn_stats_dump(struct ath12k *ar,
7757 			     struct ath12k_fw_stats *fw_stats,
7758 			     char *buf, u32 *length)
7759 {
7760 	const struct ath12k_fw_stats_bcn *bcn;
7761 	u32 buf_len = ATH12K_FW_STATS_BUF_SIZE;
7762 	struct ath12k_link_vif *arvif;
7763 	u32 len = *length;
7764 	size_t num_bcn;
7765 
7766 	num_bcn = list_count_nodes(&fw_stats->bcn);
7767 
7768 	len += scnprintf(buf + len, buf_len - len, "\n");
7769 	len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n",
7770 			 "ath12k Beacon stats", num_bcn);
7771 	len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
7772 			 "===================");
7773 
7774 	list_for_each_entry(bcn, &fw_stats->bcn, list) {
7775 		arvif = ath12k_mac_get_arvif(ar, bcn->vdev_id);
7776 		if (!arvif)
7777 			continue;
7778 		len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
7779 				 "VDEV ID", bcn->vdev_id);
7780 		len += scnprintf(buf + len, buf_len - len, "%30s %pM\n",
7781 				 "VDEV MAC address", arvif->ahvif->vif->addr);
7782 		len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
7783 				 "================");
7784 		len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
7785 				 "Num of beacon tx success", bcn->tx_bcn_succ_cnt);
7786 		len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
7787 				 "Num of beacon tx failures", bcn->tx_bcn_outage_cnt);
7788 
7789 		len += scnprintf(buf + len, buf_len - len, "\n");
7790 		*length = len;
7791 	}
7792 }
7793 
7794 static void
ath12k_wmi_fw_pdev_base_stats_dump(const struct ath12k_fw_stats_pdev * pdev,char * buf,u32 * length,u64 fw_soc_drop_cnt)7795 ath12k_wmi_fw_pdev_base_stats_dump(const struct ath12k_fw_stats_pdev *pdev,
7796 				   char *buf, u32 *length, u64 fw_soc_drop_cnt)
7797 {
7798 	u32 len = *length;
7799 	u32 buf_len = ATH12K_FW_STATS_BUF_SIZE;
7800 
7801 	len = scnprintf(buf + len, buf_len - len, "\n");
7802 	len += scnprintf(buf + len, buf_len - len, "%30s\n",
7803 			"ath12k PDEV stats");
7804 	len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
7805 			"=================");
7806 
7807 	len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7808 			"Channel noise floor", pdev->ch_noise_floor);
7809 	len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
7810 			"Channel TX power", pdev->chan_tx_power);
7811 	len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
7812 			"TX frame count", pdev->tx_frame_count);
7813 	len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
7814 			"RX frame count", pdev->rx_frame_count);
7815 	len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
7816 			"RX clear count", pdev->rx_clear_count);
7817 	len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
7818 			"Cycle count", pdev->cycle_count);
7819 	len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
7820 			"PHY error count", pdev->phy_err_count);
7821 	len += scnprintf(buf + len, buf_len - len, "%30s %10llu\n",
7822 			"soc drop count", fw_soc_drop_cnt);
7823 
7824 	*length = len;
7825 }
7826 
7827 static void
ath12k_wmi_fw_pdev_tx_stats_dump(const struct ath12k_fw_stats_pdev * pdev,char * buf,u32 * length)7828 ath12k_wmi_fw_pdev_tx_stats_dump(const struct ath12k_fw_stats_pdev *pdev,
7829 				 char *buf, u32 *length)
7830 {
7831 	u32 len = *length;
7832 	u32 buf_len = ATH12K_FW_STATS_BUF_SIZE;
7833 
7834 	len += scnprintf(buf + len, buf_len - len, "\n%30s\n",
7835 			 "ath12k PDEV TX stats");
7836 	len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
7837 			 "====================");
7838 
7839 	len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7840 			 "HTT cookies queued", pdev->comp_queued);
7841 	len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7842 			 "HTT cookies disp.", pdev->comp_delivered);
7843 	len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7844 			 "MSDU queued", pdev->msdu_enqued);
7845 	len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7846 			 "MPDU queued", pdev->mpdu_enqued);
7847 	len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7848 			 "MSDUs dropped", pdev->wmm_drop);
7849 	len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7850 			 "Local enqued", pdev->local_enqued);
7851 	len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7852 			 "Local freed", pdev->local_freed);
7853 	len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7854 			 "HW queued", pdev->hw_queued);
7855 	len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7856 			 "PPDUs reaped", pdev->hw_reaped);
7857 	len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7858 			 "Num underruns", pdev->underrun);
7859 	len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7860 			 "PPDUs cleaned", pdev->tx_abort);
7861 	len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7862 			 "MPDUs requeued", pdev->mpdus_requed);
7863 	len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
7864 			 "Excessive retries", pdev->tx_ko);
7865 	len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
7866 			 "HW rate", pdev->data_rc);
7867 	len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
7868 			 "Sched self triggers", pdev->self_triggers);
7869 	len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
7870 			 "Dropped due to SW retries",
7871 			 pdev->sw_retry_failure);
7872 	len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
7873 			 "Illegal rate phy errors",
7874 			 pdev->illgl_rate_phy_err);
7875 	len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
7876 			 "PDEV continuous xretry", pdev->pdev_cont_xretry);
7877 	len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
7878 			 "TX timeout", pdev->pdev_tx_timeout);
7879 	len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
7880 			 "PDEV resets", pdev->pdev_resets);
7881 	len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
7882 			 "Stateless TIDs alloc failures",
7883 			 pdev->stateless_tid_alloc_failure);
7884 	len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
7885 			 "PHY underrun", pdev->phy_underrun);
7886 	len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
7887 			 "MPDU is more than txop limit", pdev->txop_ovf);
7888 	*length = len;
7889 }
7890 
7891 static void
ath12k_wmi_fw_pdev_rx_stats_dump(const struct ath12k_fw_stats_pdev * pdev,char * buf,u32 * length)7892 ath12k_wmi_fw_pdev_rx_stats_dump(const struct ath12k_fw_stats_pdev *pdev,
7893 				 char *buf, u32 *length)
7894 {
7895 	u32 len = *length;
7896 	u32 buf_len = ATH12K_FW_STATS_BUF_SIZE;
7897 
7898 	len += scnprintf(buf + len, buf_len - len, "\n%30s\n",
7899 			 "ath12k PDEV RX stats");
7900 	len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
7901 			 "====================");
7902 
7903 	len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7904 			 "Mid PPDU route change",
7905 			 pdev->mid_ppdu_route_change);
7906 	len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7907 			 "Tot. number of statuses", pdev->status_rcvd);
7908 	len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7909 			 "Extra frags on rings 0", pdev->r0_frags);
7910 	len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7911 			 "Extra frags on rings 1", pdev->r1_frags);
7912 	len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7913 			 "Extra frags on rings 2", pdev->r2_frags);
7914 	len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7915 			 "Extra frags on rings 3", pdev->r3_frags);
7916 	len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7917 			 "MSDUs delivered to HTT", pdev->htt_msdus);
7918 	len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7919 			 "MPDUs delivered to HTT", pdev->htt_mpdus);
7920 	len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7921 			 "MSDUs delivered to stack", pdev->loc_msdus);
7922 	len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7923 			 "MPDUs delivered to stack", pdev->loc_mpdus);
7924 	len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7925 			 "Oversized AMSUs", pdev->oversize_amsdu);
7926 	len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7927 			 "PHY errors", pdev->phy_errs);
7928 	len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7929 			 "PHY errors drops", pdev->phy_err_drop);
7930 	len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7931 			 "MPDU errors (FCS, MIC, ENC)", pdev->mpdu_errs);
7932 	*length = len;
7933 }
7934 
7935 static void
ath12k_wmi_fw_pdev_stats_dump(struct ath12k * ar,struct ath12k_fw_stats * fw_stats,char * buf,u32 * length)7936 ath12k_wmi_fw_pdev_stats_dump(struct ath12k *ar,
7937 			      struct ath12k_fw_stats *fw_stats,
7938 			      char *buf, u32 *length)
7939 {
7940 	const struct ath12k_fw_stats_pdev *pdev;
7941 	u32 len = *length;
7942 
7943 	pdev = list_first_entry_or_null(&fw_stats->pdevs,
7944 					struct ath12k_fw_stats_pdev, list);
7945 	if (!pdev) {
7946 		ath12k_warn(ar->ab, "failed to get pdev stats\n");
7947 		return;
7948 	}
7949 
7950 	ath12k_wmi_fw_pdev_base_stats_dump(pdev, buf, &len,
7951 					   ar->ab->fw_soc_drop_count);
7952 	ath12k_wmi_fw_pdev_tx_stats_dump(pdev, buf, &len);
7953 	ath12k_wmi_fw_pdev_rx_stats_dump(pdev, buf, &len);
7954 
7955 	*length = len;
7956 }
7957 
ath12k_wmi_fw_stats_dump(struct ath12k * ar,struct ath12k_fw_stats * fw_stats,u32 stats_id,char * buf)7958 void ath12k_wmi_fw_stats_dump(struct ath12k *ar,
7959 			      struct ath12k_fw_stats *fw_stats,
7960 			      u32 stats_id, char *buf)
7961 {
7962 	u32 len = 0;
7963 	u32 buf_len = ATH12K_FW_STATS_BUF_SIZE;
7964 
7965 	spin_lock_bh(&ar->data_lock);
7966 
7967 	switch (stats_id) {
7968 	case WMI_REQUEST_VDEV_STAT:
7969 		ath12k_wmi_fw_vdev_stats_dump(ar, fw_stats, buf, &len);
7970 		break;
7971 	case WMI_REQUEST_BCN_STAT:
7972 		ath12k_wmi_fw_bcn_stats_dump(ar, fw_stats, buf, &len);
7973 		break;
7974 	case WMI_REQUEST_PDEV_STAT:
7975 		ath12k_wmi_fw_pdev_stats_dump(ar, fw_stats, buf, &len);
7976 		break;
7977 	default:
7978 		break;
7979 	}
7980 
7981 	spin_unlock_bh(&ar->data_lock);
7982 
7983 	if (len >= buf_len)
7984 		buf[len - 1] = 0;
7985 	else
7986 		buf[len] = 0;
7987 
7988 	ath12k_fw_stats_reset(ar);
7989 }
7990 
7991 static void
ath12k_wmi_pull_vdev_stats(const struct wmi_vdev_stats_params * src,struct ath12k_fw_stats_vdev * dst)7992 ath12k_wmi_pull_vdev_stats(const struct wmi_vdev_stats_params *src,
7993 			   struct ath12k_fw_stats_vdev *dst)
7994 {
7995 	int i;
7996 
7997 	dst->vdev_id = le32_to_cpu(src->vdev_id);
7998 	dst->beacon_snr = le32_to_cpu(src->beacon_snr);
7999 	dst->data_snr = le32_to_cpu(src->data_snr);
8000 	dst->num_rx_frames = le32_to_cpu(src->num_rx_frames);
8001 	dst->num_rts_fail = le32_to_cpu(src->num_rts_fail);
8002 	dst->num_rts_success = le32_to_cpu(src->num_rts_success);
8003 	dst->num_rx_err = le32_to_cpu(src->num_rx_err);
8004 	dst->num_rx_discard = le32_to_cpu(src->num_rx_discard);
8005 	dst->num_tx_not_acked = le32_to_cpu(src->num_tx_not_acked);
8006 
8007 	for (i = 0; i < WLAN_MAX_AC; i++)
8008 		dst->num_tx_frames[i] =
8009 			le32_to_cpu(src->num_tx_frames[i]);
8010 
8011 	for (i = 0; i < WLAN_MAX_AC; i++)
8012 		dst->num_tx_frames_retries[i] =
8013 			le32_to_cpu(src->num_tx_frames_retries[i]);
8014 
8015 	for (i = 0; i < WLAN_MAX_AC; i++)
8016 		dst->num_tx_frames_failures[i] =
8017 			le32_to_cpu(src->num_tx_frames_failures[i]);
8018 
8019 	for (i = 0; i < MAX_TX_RATE_VALUES; i++)
8020 		dst->tx_rate_history[i] =
8021 			le32_to_cpu(src->tx_rate_history[i]);
8022 
8023 	for (i = 0; i < MAX_TX_RATE_VALUES; i++)
8024 		dst->beacon_rssi_history[i] =
8025 			le32_to_cpu(src->beacon_rssi_history[i]);
8026 }
8027 
8028 static void
ath12k_wmi_pull_bcn_stats(const struct ath12k_wmi_bcn_stats_params * src,struct ath12k_fw_stats_bcn * dst)8029 ath12k_wmi_pull_bcn_stats(const struct ath12k_wmi_bcn_stats_params *src,
8030 			  struct ath12k_fw_stats_bcn *dst)
8031 {
8032 	dst->vdev_id = le32_to_cpu(src->vdev_id);
8033 	dst->tx_bcn_succ_cnt = le32_to_cpu(src->tx_bcn_succ_cnt);
8034 	dst->tx_bcn_outage_cnt = le32_to_cpu(src->tx_bcn_outage_cnt);
8035 }
8036 
8037 static void
ath12k_wmi_pull_pdev_stats_base(const struct ath12k_wmi_pdev_base_stats_params * src,struct ath12k_fw_stats_pdev * dst)8038 ath12k_wmi_pull_pdev_stats_base(const struct ath12k_wmi_pdev_base_stats_params *src,
8039 				struct ath12k_fw_stats_pdev *dst)
8040 {
8041 	dst->ch_noise_floor = a_sle32_to_cpu(src->chan_nf);
8042 	dst->tx_frame_count = __le32_to_cpu(src->tx_frame_count);
8043 	dst->rx_frame_count = __le32_to_cpu(src->rx_frame_count);
8044 	dst->rx_clear_count = __le32_to_cpu(src->rx_clear_count);
8045 	dst->cycle_count = __le32_to_cpu(src->cycle_count);
8046 	dst->phy_err_count = __le32_to_cpu(src->phy_err_count);
8047 	dst->chan_tx_power = __le32_to_cpu(src->chan_tx_pwr);
8048 }
8049 
8050 static void
ath12k_wmi_pull_pdev_stats_tx(const struct ath12k_wmi_pdev_tx_stats_params * src,struct ath12k_fw_stats_pdev * dst)8051 ath12k_wmi_pull_pdev_stats_tx(const struct ath12k_wmi_pdev_tx_stats_params *src,
8052 			      struct ath12k_fw_stats_pdev *dst)
8053 {
8054 	dst->comp_queued = a_sle32_to_cpu(src->comp_queued);
8055 	dst->comp_delivered = a_sle32_to_cpu(src->comp_delivered);
8056 	dst->msdu_enqued = a_sle32_to_cpu(src->msdu_enqued);
8057 	dst->mpdu_enqued = a_sle32_to_cpu(src->mpdu_enqued);
8058 	dst->wmm_drop = a_sle32_to_cpu(src->wmm_drop);
8059 	dst->local_enqued = a_sle32_to_cpu(src->local_enqued);
8060 	dst->local_freed = a_sle32_to_cpu(src->local_freed);
8061 	dst->hw_queued = a_sle32_to_cpu(src->hw_queued);
8062 	dst->hw_reaped = a_sle32_to_cpu(src->hw_reaped);
8063 	dst->underrun = a_sle32_to_cpu(src->underrun);
8064 	dst->tx_abort = a_sle32_to_cpu(src->tx_abort);
8065 	dst->mpdus_requed = a_sle32_to_cpu(src->mpdus_requed);
8066 	dst->tx_ko = __le32_to_cpu(src->tx_ko);
8067 	dst->data_rc = __le32_to_cpu(src->data_rc);
8068 	dst->self_triggers = __le32_to_cpu(src->self_triggers);
8069 	dst->sw_retry_failure = __le32_to_cpu(src->sw_retry_failure);
8070 	dst->illgl_rate_phy_err = __le32_to_cpu(src->illgl_rate_phy_err);
8071 	dst->pdev_cont_xretry = __le32_to_cpu(src->pdev_cont_xretry);
8072 	dst->pdev_tx_timeout = __le32_to_cpu(src->pdev_tx_timeout);
8073 	dst->pdev_resets = __le32_to_cpu(src->pdev_resets);
8074 	dst->stateless_tid_alloc_failure =
8075 		__le32_to_cpu(src->stateless_tid_alloc_failure);
8076 	dst->phy_underrun = __le32_to_cpu(src->phy_underrun);
8077 	dst->txop_ovf = __le32_to_cpu(src->txop_ovf);
8078 }
8079 
8080 static void
ath12k_wmi_pull_pdev_stats_rx(const struct ath12k_wmi_pdev_rx_stats_params * src,struct ath12k_fw_stats_pdev * dst)8081 ath12k_wmi_pull_pdev_stats_rx(const struct ath12k_wmi_pdev_rx_stats_params *src,
8082 			      struct ath12k_fw_stats_pdev *dst)
8083 {
8084 	dst->mid_ppdu_route_change =
8085 		a_sle32_to_cpu(src->mid_ppdu_route_change);
8086 	dst->status_rcvd = a_sle32_to_cpu(src->status_rcvd);
8087 	dst->r0_frags = a_sle32_to_cpu(src->r0_frags);
8088 	dst->r1_frags = a_sle32_to_cpu(src->r1_frags);
8089 	dst->r2_frags = a_sle32_to_cpu(src->r2_frags);
8090 	dst->r3_frags = a_sle32_to_cpu(src->r3_frags);
8091 	dst->htt_msdus = a_sle32_to_cpu(src->htt_msdus);
8092 	dst->htt_mpdus = a_sle32_to_cpu(src->htt_mpdus);
8093 	dst->loc_msdus = a_sle32_to_cpu(src->loc_msdus);
8094 	dst->loc_mpdus = a_sle32_to_cpu(src->loc_mpdus);
8095 	dst->oversize_amsdu = a_sle32_to_cpu(src->oversize_amsdu);
8096 	dst->phy_errs = a_sle32_to_cpu(src->phy_errs);
8097 	dst->phy_err_drop = a_sle32_to_cpu(src->phy_err_drop);
8098 	dst->mpdu_errs = a_sle32_to_cpu(src->mpdu_errs);
8099 }
8100 
ath12k_wmi_tlv_fw_stats_data_parse(struct ath12k_base * ab,struct wmi_tlv_fw_stats_parse * parse,const void * ptr,u16 len)8101 static int ath12k_wmi_tlv_fw_stats_data_parse(struct ath12k_base *ab,
8102 					      struct wmi_tlv_fw_stats_parse *parse,
8103 					      const void *ptr,
8104 					      u16 len)
8105 {
8106 	const struct wmi_stats_event *ev = parse->ev;
8107 	struct ath12k_fw_stats *stats = parse->stats;
8108 	struct ath12k *ar;
8109 	struct ath12k_link_vif *arvif;
8110 	struct ieee80211_sta *sta;
8111 	struct ath12k_sta *ahsta;
8112 	struct ath12k_link_sta *arsta;
8113 	int i, ret = 0;
8114 	const void *data = ptr;
8115 
8116 	if (!ev) {
8117 		ath12k_warn(ab, "failed to fetch update stats ev");
8118 		return -EPROTO;
8119 	}
8120 
8121 	if (!stats)
8122 		return -EINVAL;
8123 
8124 	rcu_read_lock();
8125 
8126 	stats->pdev_id = le32_to_cpu(ev->pdev_id);
8127 	ar = ath12k_mac_get_ar_by_pdev_id(ab, stats->pdev_id);
8128 	if (!ar) {
8129 		ath12k_warn(ab, "invalid pdev id %d in update stats event\n",
8130 			    le32_to_cpu(ev->pdev_id));
8131 		ret = -EPROTO;
8132 		goto exit;
8133 	}
8134 
8135 	for (i = 0; i < le32_to_cpu(ev->num_vdev_stats); i++) {
8136 		const struct wmi_vdev_stats_params *src;
8137 		struct ath12k_fw_stats_vdev *dst;
8138 
8139 		src = data;
8140 		if (len < sizeof(*src)) {
8141 			ret = -EPROTO;
8142 			goto exit;
8143 		}
8144 
8145 		arvif = ath12k_mac_get_arvif(ar, le32_to_cpu(src->vdev_id));
8146 		if (arvif) {
8147 			sta = ieee80211_find_sta_by_ifaddr(ath12k_ar_to_hw(ar),
8148 							   arvif->bssid,
8149 							   NULL);
8150 			if (sta) {
8151 				ahsta = ath12k_sta_to_ahsta(sta);
8152 				arsta = &ahsta->deflink;
8153 				arsta->rssi_beacon = le32_to_cpu(src->beacon_snr);
8154 				ath12k_dbg(ab, ATH12K_DBG_WMI,
8155 					   "wmi stats vdev id %d snr %d\n",
8156 					   src->vdev_id, src->beacon_snr);
8157 			} else {
8158 				ath12k_dbg(ab, ATH12K_DBG_WMI,
8159 					   "not found station bssid %pM for vdev stat\n",
8160 					   arvif->bssid);
8161 			}
8162 		}
8163 
8164 		data += sizeof(*src);
8165 		len -= sizeof(*src);
8166 		dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
8167 		if (!dst)
8168 			continue;
8169 		ath12k_wmi_pull_vdev_stats(src, dst);
8170 		stats->stats_id = WMI_REQUEST_VDEV_STAT;
8171 		list_add_tail(&dst->list, &stats->vdevs);
8172 	}
8173 	for (i = 0; i < le32_to_cpu(ev->num_bcn_stats); i++) {
8174 		const struct ath12k_wmi_bcn_stats_params *src;
8175 		struct ath12k_fw_stats_bcn *dst;
8176 
8177 		src = data;
8178 		if (len < sizeof(*src)) {
8179 			ret = -EPROTO;
8180 			goto exit;
8181 		}
8182 
8183 		data += sizeof(*src);
8184 		len -= sizeof(*src);
8185 		dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
8186 		if (!dst)
8187 			continue;
8188 		ath12k_wmi_pull_bcn_stats(src, dst);
8189 		stats->stats_id = WMI_REQUEST_BCN_STAT;
8190 		list_add_tail(&dst->list, &stats->bcn);
8191 	}
8192 	for (i = 0; i < le32_to_cpu(ev->num_pdev_stats); i++) {
8193 		const struct ath12k_wmi_pdev_stats_params *src;
8194 		struct ath12k_fw_stats_pdev *dst;
8195 
8196 		src = data;
8197 		if (len < sizeof(*src)) {
8198 			ret = -EPROTO;
8199 			goto exit;
8200 		}
8201 
8202 		stats->stats_id = WMI_REQUEST_PDEV_STAT;
8203 
8204 		data += sizeof(*src);
8205 		len -= sizeof(*src);
8206 
8207 		dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
8208 		if (!dst)
8209 			continue;
8210 
8211 		ath12k_wmi_pull_pdev_stats_base(&src->base, dst);
8212 		ath12k_wmi_pull_pdev_stats_tx(&src->tx, dst);
8213 		ath12k_wmi_pull_pdev_stats_rx(&src->rx, dst);
8214 		list_add_tail(&dst->list, &stats->pdevs);
8215 	}
8216 
8217 exit:
8218 	rcu_read_unlock();
8219 	return ret;
8220 }
8221 
ath12k_wmi_tlv_fw_stats_parse(struct ath12k_base * ab,u16 tag,u16 len,const void * ptr,void * data)8222 static int ath12k_wmi_tlv_fw_stats_parse(struct ath12k_base *ab,
8223 					 u16 tag, u16 len,
8224 					 const void *ptr, void *data)
8225 {
8226 	struct wmi_tlv_fw_stats_parse *parse = data;
8227 	int ret = 0;
8228 
8229 	switch (tag) {
8230 	case WMI_TAG_STATS_EVENT:
8231 		parse->ev = ptr;
8232 		break;
8233 	case WMI_TAG_ARRAY_BYTE:
8234 		ret = ath12k_wmi_tlv_fw_stats_data_parse(ab, parse, ptr, len);
8235 		break;
8236 	default:
8237 		break;
8238 	}
8239 	return ret;
8240 }
8241 
ath12k_wmi_pull_fw_stats(struct ath12k_base * ab,struct sk_buff * skb,struct ath12k_fw_stats * stats)8242 static int ath12k_wmi_pull_fw_stats(struct ath12k_base *ab, struct sk_buff *skb,
8243 				    struct ath12k_fw_stats *stats)
8244 {
8245 	struct wmi_tlv_fw_stats_parse parse = {};
8246 
8247 	stats->stats_id = 0;
8248 	parse.stats = stats;
8249 
8250 	return ath12k_wmi_tlv_iter(ab, skb->data, skb->len,
8251 				   ath12k_wmi_tlv_fw_stats_parse,
8252 				   &parse);
8253 }
8254 
ath12k_wmi_fw_stats_process(struct ath12k * ar,struct ath12k_fw_stats * stats)8255 static void ath12k_wmi_fw_stats_process(struct ath12k *ar,
8256 					struct ath12k_fw_stats *stats)
8257 {
8258 	struct ath12k_base *ab = ar->ab;
8259 	struct ath12k_pdev *pdev;
8260 	bool is_end = true;
8261 	size_t total_vdevs_started = 0;
8262 	int i;
8263 
8264 	if (stats->stats_id == WMI_REQUEST_VDEV_STAT) {
8265 		if (list_empty(&stats->vdevs)) {
8266 			ath12k_warn(ab, "empty vdev stats");
8267 			return;
8268 		}
8269 		/* FW sends all the active VDEV stats irrespective of PDEV,
8270 		 * hence limit until the count of all VDEVs started
8271 		 */
8272 		rcu_read_lock();
8273 		for (i = 0; i < ab->num_radios; i++) {
8274 			pdev = rcu_dereference(ab->pdevs_active[i]);
8275 			if (pdev && pdev->ar)
8276 				total_vdevs_started += pdev->ar->num_started_vdevs;
8277 		}
8278 		rcu_read_unlock();
8279 
8280 		if (total_vdevs_started)
8281 			is_end = ((++ar->fw_stats.num_vdev_recvd) ==
8282 				  total_vdevs_started);
8283 
8284 		list_splice_tail_init(&stats->vdevs,
8285 				      &ar->fw_stats.vdevs);
8286 
8287 		if (is_end)
8288 			complete(&ar->fw_stats_done);
8289 
8290 		return;
8291 	}
8292 
8293 	if (stats->stats_id == WMI_REQUEST_BCN_STAT) {
8294 		if (list_empty(&stats->bcn)) {
8295 			ath12k_warn(ab, "empty beacon stats");
8296 			return;
8297 		}
8298 		/* Mark end until we reached the count of all started VDEVs
8299 		 * within the PDEV
8300 		 */
8301 		if (ar->num_started_vdevs)
8302 			is_end = ((++ar->fw_stats.num_bcn_recvd) ==
8303 				  ar->num_started_vdevs);
8304 
8305 		list_splice_tail_init(&stats->bcn,
8306 				      &ar->fw_stats.bcn);
8307 
8308 		if (is_end)
8309 			complete(&ar->fw_stats_done);
8310 	}
8311 }
8312 
ath12k_update_stats_event(struct ath12k_base * ab,struct sk_buff * skb)8313 static void ath12k_update_stats_event(struct ath12k_base *ab, struct sk_buff *skb)
8314 {
8315 	struct ath12k_fw_stats stats = {};
8316 	struct ath12k *ar;
8317 	int ret;
8318 
8319 	INIT_LIST_HEAD(&stats.pdevs);
8320 	INIT_LIST_HEAD(&stats.vdevs);
8321 	INIT_LIST_HEAD(&stats.bcn);
8322 
8323 	ret = ath12k_wmi_pull_fw_stats(ab, skb, &stats);
8324 	if (ret) {
8325 		ath12k_warn(ab, "failed to pull fw stats: %d\n", ret);
8326 		goto free;
8327 	}
8328 
8329 	ath12k_dbg(ab, ATH12K_DBG_WMI, "event update stats");
8330 
8331 	rcu_read_lock();
8332 	ar = ath12k_mac_get_ar_by_pdev_id(ab, stats.pdev_id);
8333 	if (!ar) {
8334 		rcu_read_unlock();
8335 		ath12k_warn(ab, "failed to get ar for pdev_id %d: %d\n",
8336 			    stats.pdev_id, ret);
8337 		goto free;
8338 	}
8339 
8340 	spin_lock_bh(&ar->data_lock);
8341 
8342 	/* Handle WMI_REQUEST_PDEV_STAT status update */
8343 	if (stats.stats_id == WMI_REQUEST_PDEV_STAT) {
8344 		list_splice_tail_init(&stats.pdevs, &ar->fw_stats.pdevs);
8345 		complete(&ar->fw_stats_done);
8346 		goto complete;
8347 	}
8348 
8349 	/* Handle WMI_REQUEST_VDEV_STAT and WMI_REQUEST_BCN_STAT updates. */
8350 	ath12k_wmi_fw_stats_process(ar, &stats);
8351 
8352 complete:
8353 	complete(&ar->fw_stats_complete);
8354 	spin_unlock_bh(&ar->data_lock);
8355 	rcu_read_unlock();
8356 
8357 	/* Since the stats's pdev, vdev and beacon list are spliced and reinitialised
8358 	 * at this point, no need to free the individual list.
8359 	 */
8360 	return;
8361 
8362 free:
8363 	ath12k_fw_stats_free(&stats);
8364 }
8365 
8366 /* PDEV_CTL_FAILSAFE_CHECK_EVENT is received from FW when the frequency scanned
8367  * is not part of BDF CTL(Conformance test limits) table entries.
8368  */
ath12k_pdev_ctl_failsafe_check_event(struct ath12k_base * ab,struct sk_buff * skb)8369 static void ath12k_pdev_ctl_failsafe_check_event(struct ath12k_base *ab,
8370 						 struct sk_buff *skb)
8371 {
8372 	const void **tb;
8373 	const struct wmi_pdev_ctl_failsafe_chk_event *ev;
8374 	int ret;
8375 
8376 	tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
8377 	if (IS_ERR(tb)) {
8378 		ret = PTR_ERR(tb);
8379 		ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
8380 		return;
8381 	}
8382 
8383 	ev = tb[WMI_TAG_PDEV_CTL_FAILSAFE_CHECK_EVENT];
8384 	if (!ev) {
8385 		ath12k_warn(ab, "failed to fetch pdev ctl failsafe check ev");
8386 		kfree(tb);
8387 		return;
8388 	}
8389 
8390 	ath12k_dbg(ab, ATH12K_DBG_WMI,
8391 		   "pdev ctl failsafe check ev status %d\n",
8392 		   ev->ctl_failsafe_status);
8393 
8394 	/* If ctl_failsafe_status is set to 1 FW will max out the Transmit power
8395 	 * to 10 dBm else the CTL power entry in the BDF would be picked up.
8396 	 */
8397 	if (ev->ctl_failsafe_status != 0)
8398 		ath12k_warn(ab, "pdev ctl failsafe failure status %d",
8399 			    ev->ctl_failsafe_status);
8400 
8401 	kfree(tb);
8402 }
8403 
8404 static void
ath12k_wmi_process_csa_switch_count_event(struct ath12k_base * ab,const struct ath12k_wmi_pdev_csa_event * ev,const u32 * vdev_ids)8405 ath12k_wmi_process_csa_switch_count_event(struct ath12k_base *ab,
8406 					  const struct ath12k_wmi_pdev_csa_event *ev,
8407 					  const u32 *vdev_ids)
8408 {
8409 	u32 current_switch_count = le32_to_cpu(ev->current_switch_count);
8410 	u32 num_vdevs = le32_to_cpu(ev->num_vdevs);
8411 	struct ieee80211_bss_conf *conf;
8412 	struct ath12k_link_vif *arvif;
8413 	struct ath12k_vif *ahvif;
8414 	int i;
8415 
8416 	rcu_read_lock();
8417 	for (i = 0; i < num_vdevs; i++) {
8418 		arvif = ath12k_mac_get_arvif_by_vdev_id(ab, vdev_ids[i]);
8419 
8420 		if (!arvif) {
8421 			ath12k_warn(ab, "Recvd csa status for unknown vdev %d",
8422 				    vdev_ids[i]);
8423 			continue;
8424 		}
8425 		ahvif = arvif->ahvif;
8426 
8427 		if (arvif->link_id >= IEEE80211_MLD_MAX_NUM_LINKS) {
8428 			ath12k_warn(ab, "Invalid CSA switch count even link id: %d\n",
8429 				    arvif->link_id);
8430 			continue;
8431 		}
8432 
8433 		conf = rcu_dereference(ahvif->vif->link_conf[arvif->link_id]);
8434 		if (!conf) {
8435 			ath12k_warn(ab, "unable to access bss link conf in process csa for vif %pM link %u\n",
8436 				    ahvif->vif->addr, arvif->link_id);
8437 			continue;
8438 		}
8439 
8440 		if (!arvif->is_up || !conf->csa_active)
8441 			continue;
8442 
8443 		/* Finish CSA when counter reaches zero */
8444 		if (!current_switch_count) {
8445 			ieee80211_csa_finish(ahvif->vif, arvif->link_id);
8446 			arvif->current_cntdown_counter = 0;
8447 		} else if (current_switch_count > 1) {
8448 			/* If the count in event is not what we expect, don't update the
8449 			 * mac80211 count. Since during beacon Tx failure, count in the
8450 			 * firmware will not decrement and this event will come with the
8451 			 * previous count value again
8452 			 */
8453 			if (current_switch_count != arvif->current_cntdown_counter)
8454 				continue;
8455 
8456 			arvif->current_cntdown_counter =
8457 				ieee80211_beacon_update_cntdwn(ahvif->vif,
8458 							       arvif->link_id);
8459 		}
8460 	}
8461 	rcu_read_unlock();
8462 }
8463 
8464 static void
ath12k_wmi_pdev_csa_switch_count_status_event(struct ath12k_base * ab,struct sk_buff * skb)8465 ath12k_wmi_pdev_csa_switch_count_status_event(struct ath12k_base *ab,
8466 					      struct sk_buff *skb)
8467 {
8468 	const void **tb;
8469 	const struct ath12k_wmi_pdev_csa_event *ev;
8470 	const u32 *vdev_ids;
8471 	int ret;
8472 
8473 	tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
8474 	if (IS_ERR(tb)) {
8475 		ret = PTR_ERR(tb);
8476 		ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
8477 		return;
8478 	}
8479 
8480 	ev = tb[WMI_TAG_PDEV_CSA_SWITCH_COUNT_STATUS_EVENT];
8481 	vdev_ids = tb[WMI_TAG_ARRAY_UINT32];
8482 
8483 	if (!ev || !vdev_ids) {
8484 		ath12k_warn(ab, "failed to fetch pdev csa switch count ev");
8485 		kfree(tb);
8486 		return;
8487 	}
8488 
8489 	ath12k_dbg(ab, ATH12K_DBG_WMI,
8490 		   "pdev csa switch count %d for pdev %d, num_vdevs %d",
8491 		   ev->current_switch_count, ev->pdev_id,
8492 		   ev->num_vdevs);
8493 
8494 	ath12k_wmi_process_csa_switch_count_event(ab, ev, vdev_ids);
8495 
8496 	kfree(tb);
8497 }
8498 
8499 static void
ath12k_wmi_pdev_dfs_radar_detected_event(struct ath12k_base * ab,struct sk_buff * skb)8500 ath12k_wmi_pdev_dfs_radar_detected_event(struct ath12k_base *ab, struct sk_buff *skb)
8501 {
8502 	const void **tb;
8503 	struct ath12k_mac_get_any_chanctx_conf_arg arg;
8504 	const struct ath12k_wmi_pdev_radar_event *ev;
8505 	struct ath12k *ar;
8506 	int ret;
8507 
8508 	tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
8509 	if (IS_ERR(tb)) {
8510 		ret = PTR_ERR(tb);
8511 		ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
8512 		return;
8513 	}
8514 
8515 	ev = tb[WMI_TAG_PDEV_DFS_RADAR_DETECTION_EVENT];
8516 
8517 	if (!ev) {
8518 		ath12k_warn(ab, "failed to fetch pdev dfs radar detected ev");
8519 		kfree(tb);
8520 		return;
8521 	}
8522 
8523 	ath12k_dbg(ab, ATH12K_DBG_WMI,
8524 		   "pdev dfs radar detected on pdev %d, detection mode %d, chan freq %d, chan_width %d, detector id %d, seg id %d, timestamp %d, chirp %d, freq offset %d, sidx %d",
8525 		   ev->pdev_id, ev->detection_mode, ev->chan_freq, ev->chan_width,
8526 		   ev->detector_id, ev->segment_id, ev->timestamp, ev->is_chirp,
8527 		   ev->freq_offset, ev->sidx);
8528 
8529 	rcu_read_lock();
8530 
8531 	ar = ath12k_mac_get_ar_by_pdev_id(ab, le32_to_cpu(ev->pdev_id));
8532 
8533 	if (!ar) {
8534 		ath12k_warn(ab, "radar detected in invalid pdev %d\n",
8535 			    ev->pdev_id);
8536 		goto exit;
8537 	}
8538 
8539 	arg.ar = ar;
8540 	arg.chanctx_conf = NULL;
8541 	ieee80211_iter_chan_contexts_atomic(ath12k_ar_to_hw(ar),
8542 					    ath12k_mac_get_any_chanctx_conf_iter, &arg);
8543 	if (!arg.chanctx_conf) {
8544 		ath12k_warn(ab, "failed to find valid chanctx_conf in radar detected event\n");
8545 		goto exit;
8546 	}
8547 
8548 	ath12k_dbg(ar->ab, ATH12K_DBG_REG, "DFS Radar Detected in pdev %d\n",
8549 		   ev->pdev_id);
8550 
8551 	if (ar->dfs_block_radar_events)
8552 		ath12k_info(ab, "DFS Radar detected, but ignored as requested\n");
8553 	else
8554 		ieee80211_radar_detected(ath12k_ar_to_hw(ar), arg.chanctx_conf);
8555 
8556 exit:
8557 	rcu_read_unlock();
8558 
8559 	kfree(tb);
8560 }
8561 
ath12k_tm_wmi_event_segmented(struct ath12k_base * ab,u32 cmd_id,struct sk_buff * skb)8562 static void ath12k_tm_wmi_event_segmented(struct ath12k_base *ab, u32 cmd_id,
8563 					  struct sk_buff *skb)
8564 {
8565 	const struct ath12k_wmi_ftm_event *ev;
8566 	const void **tb;
8567 	int ret;
8568 	u16 length;
8569 
8570 	tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
8571 
8572 	if (IS_ERR(tb)) {
8573 		ret = PTR_ERR(tb);
8574 		ath12k_warn(ab, "failed to parse ftm event tlv: %d\n", ret);
8575 		return;
8576 	}
8577 
8578 	ev = tb[WMI_TAG_ARRAY_BYTE];
8579 	if (!ev) {
8580 		ath12k_warn(ab, "failed to fetch ftm msg\n");
8581 		kfree(tb);
8582 		return;
8583 	}
8584 
8585 	length = skb->len - TLV_HDR_SIZE;
8586 	ath12k_tm_process_event(ab, cmd_id, ev, length);
8587 	kfree(tb);
8588 	tb = NULL;
8589 }
8590 
8591 static void
ath12k_wmi_pdev_temperature_event(struct ath12k_base * ab,struct sk_buff * skb)8592 ath12k_wmi_pdev_temperature_event(struct ath12k_base *ab,
8593 				  struct sk_buff *skb)
8594 {
8595 	struct ath12k *ar;
8596 	struct wmi_pdev_temperature_event ev = {};
8597 
8598 	if (ath12k_pull_pdev_temp_ev(ab, skb, &ev) != 0) {
8599 		ath12k_warn(ab, "failed to extract pdev temperature event");
8600 		return;
8601 	}
8602 
8603 	ath12k_dbg(ab, ATH12K_DBG_WMI,
8604 		   "pdev temperature ev temp %d pdev_id %d\n", ev.temp, ev.pdev_id);
8605 
8606 	rcu_read_lock();
8607 
8608 	ar = ath12k_mac_get_ar_by_pdev_id(ab, le32_to_cpu(ev.pdev_id));
8609 	if (!ar) {
8610 		ath12k_warn(ab, "invalid pdev id in pdev temperature ev %d", ev.pdev_id);
8611 		goto exit;
8612 	}
8613 
8614 exit:
8615 	rcu_read_unlock();
8616 }
8617 
ath12k_fils_discovery_event(struct ath12k_base * ab,struct sk_buff * skb)8618 static void ath12k_fils_discovery_event(struct ath12k_base *ab,
8619 					struct sk_buff *skb)
8620 {
8621 	const void **tb;
8622 	const struct wmi_fils_discovery_event *ev;
8623 	int ret;
8624 
8625 	tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
8626 	if (IS_ERR(tb)) {
8627 		ret = PTR_ERR(tb);
8628 		ath12k_warn(ab,
8629 			    "failed to parse FILS discovery event tlv %d\n",
8630 			    ret);
8631 		return;
8632 	}
8633 
8634 	ev = tb[WMI_TAG_HOST_SWFDA_EVENT];
8635 	if (!ev) {
8636 		ath12k_warn(ab, "failed to fetch FILS discovery event\n");
8637 		kfree(tb);
8638 		return;
8639 	}
8640 
8641 	ath12k_warn(ab,
8642 		    "FILS discovery frame expected from host for vdev_id: %u, transmission scheduled at %u, next TBTT: %u\n",
8643 		    ev->vdev_id, ev->fils_tt, ev->tbtt);
8644 
8645 	kfree(tb);
8646 }
8647 
ath12k_probe_resp_tx_status_event(struct ath12k_base * ab,struct sk_buff * skb)8648 static void ath12k_probe_resp_tx_status_event(struct ath12k_base *ab,
8649 					      struct sk_buff *skb)
8650 {
8651 	const void **tb;
8652 	const struct wmi_probe_resp_tx_status_event *ev;
8653 	int ret;
8654 
8655 	tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
8656 	if (IS_ERR(tb)) {
8657 		ret = PTR_ERR(tb);
8658 		ath12k_warn(ab,
8659 			    "failed to parse probe response transmission status event tlv: %d\n",
8660 			    ret);
8661 		return;
8662 	}
8663 
8664 	ev = tb[WMI_TAG_OFFLOAD_PRB_RSP_TX_STATUS_EVENT];
8665 	if (!ev) {
8666 		ath12k_warn(ab,
8667 			    "failed to fetch probe response transmission status event");
8668 		kfree(tb);
8669 		return;
8670 	}
8671 
8672 	if (ev->tx_status)
8673 		ath12k_warn(ab,
8674 			    "Probe response transmission failed for vdev_id %u, status %u\n",
8675 			    ev->vdev_id, ev->tx_status);
8676 
8677 	kfree(tb);
8678 }
8679 
ath12k_wmi_p2p_noa_event(struct ath12k_base * ab,struct sk_buff * skb)8680 static int ath12k_wmi_p2p_noa_event(struct ath12k_base *ab,
8681 				    struct sk_buff *skb)
8682 {
8683 	const void **tb;
8684 	const struct wmi_p2p_noa_event *ev;
8685 	const struct ath12k_wmi_p2p_noa_info *noa;
8686 	struct ath12k *ar;
8687 	int ret, vdev_id;
8688 
8689 	tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
8690 	if (IS_ERR(tb)) {
8691 		ret = PTR_ERR(tb);
8692 		ath12k_warn(ab, "failed to parse P2P NoA TLV: %d\n", ret);
8693 		return ret;
8694 	}
8695 
8696 	ev = tb[WMI_TAG_P2P_NOA_EVENT];
8697 	noa = tb[WMI_TAG_P2P_NOA_INFO];
8698 
8699 	if (!ev || !noa) {
8700 		ret = -EPROTO;
8701 		goto out;
8702 	}
8703 
8704 	vdev_id = __le32_to_cpu(ev->vdev_id);
8705 
8706 	ath12k_dbg(ab, ATH12K_DBG_WMI,
8707 		   "wmi tlv p2p noa vdev_id %i descriptors %u\n",
8708 		   vdev_id, le32_get_bits(noa->noa_attr, WMI_P2P_NOA_INFO_DESC_NUM));
8709 
8710 	rcu_read_lock();
8711 	ar = ath12k_mac_get_ar_by_vdev_id(ab, vdev_id);
8712 	if (!ar) {
8713 		ath12k_warn(ab, "invalid vdev id %d in P2P NoA event\n",
8714 			    vdev_id);
8715 		ret = -EINVAL;
8716 		goto unlock;
8717 	}
8718 
8719 	ath12k_p2p_noa_update_by_vdev_id(ar, vdev_id, noa);
8720 
8721 	ret = 0;
8722 
8723 unlock:
8724 	rcu_read_unlock();
8725 out:
8726 	kfree(tb);
8727 	return ret;
8728 }
8729 
ath12k_rfkill_state_change_event(struct ath12k_base * ab,struct sk_buff * skb)8730 static void ath12k_rfkill_state_change_event(struct ath12k_base *ab,
8731 					     struct sk_buff *skb)
8732 {
8733 	const struct wmi_rfkill_state_change_event *ev;
8734 	const void **tb;
8735 	int ret;
8736 
8737 	tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
8738 	if (IS_ERR(tb)) {
8739 		ret = PTR_ERR(tb);
8740 		ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
8741 		return;
8742 	}
8743 
8744 	ev = tb[WMI_TAG_RFKILL_EVENT];
8745 	if (!ev) {
8746 		kfree(tb);
8747 		return;
8748 	}
8749 
8750 	ath12k_dbg(ab, ATH12K_DBG_MAC,
8751 		   "wmi tlv rfkill state change gpio %d type %d radio_state %d\n",
8752 		   le32_to_cpu(ev->gpio_pin_num),
8753 		   le32_to_cpu(ev->int_type),
8754 		   le32_to_cpu(ev->radio_state));
8755 
8756 	spin_lock_bh(&ab->base_lock);
8757 	ab->rfkill_radio_on = (ev->radio_state == cpu_to_le32(WMI_RFKILL_RADIO_STATE_ON));
8758 	spin_unlock_bh(&ab->base_lock);
8759 
8760 	queue_work(ab->workqueue, &ab->rfkill_work);
8761 	kfree(tb);
8762 }
8763 
8764 static void
ath12k_wmi_diag_event(struct ath12k_base * ab,struct sk_buff * skb)8765 ath12k_wmi_diag_event(struct ath12k_base *ab, struct sk_buff *skb)
8766 {
8767 	trace_ath12k_wmi_diag(ab, skb->data, skb->len);
8768 }
8769 
ath12k_wmi_twt_enable_event(struct ath12k_base * ab,struct sk_buff * skb)8770 static void ath12k_wmi_twt_enable_event(struct ath12k_base *ab,
8771 					struct sk_buff *skb)
8772 {
8773 	const void **tb;
8774 	const struct wmi_twt_enable_event *ev;
8775 	int ret;
8776 
8777 	tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
8778 	if (IS_ERR(tb)) {
8779 		ret = PTR_ERR(tb);
8780 		ath12k_warn(ab, "failed to parse wmi twt enable status event tlv: %d\n",
8781 			    ret);
8782 		return;
8783 	}
8784 
8785 	ev = tb[WMI_TAG_TWT_ENABLE_COMPLETE_EVENT];
8786 	if (!ev) {
8787 		ath12k_warn(ab, "failed to fetch twt enable wmi event\n");
8788 		goto exit;
8789 	}
8790 
8791 	ath12k_dbg(ab, ATH12K_DBG_MAC, "wmi twt enable event pdev id %u status %u\n",
8792 		   le32_to_cpu(ev->pdev_id),
8793 		   le32_to_cpu(ev->status));
8794 
8795 exit:
8796 	kfree(tb);
8797 }
8798 
ath12k_wmi_twt_disable_event(struct ath12k_base * ab,struct sk_buff * skb)8799 static void ath12k_wmi_twt_disable_event(struct ath12k_base *ab,
8800 					 struct sk_buff *skb)
8801 {
8802 	const void **tb;
8803 	const struct wmi_twt_disable_event *ev;
8804 	int ret;
8805 
8806 	tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
8807 	if (IS_ERR(tb)) {
8808 		ret = PTR_ERR(tb);
8809 		ath12k_warn(ab, "failed to parse wmi twt disable status event tlv: %d\n",
8810 			    ret);
8811 		return;
8812 	}
8813 
8814 	ev = tb[WMI_TAG_TWT_DISABLE_COMPLETE_EVENT];
8815 	if (!ev) {
8816 		ath12k_warn(ab, "failed to fetch twt disable wmi event\n");
8817 		goto exit;
8818 	}
8819 
8820 	ath12k_dbg(ab, ATH12K_DBG_MAC, "wmi twt disable event pdev id %d status %u\n",
8821 		   le32_to_cpu(ev->pdev_id),
8822 		   le32_to_cpu(ev->status));
8823 
8824 exit:
8825 	kfree(tb);
8826 }
8827 
ath12k_wmi_wow_wakeup_host_parse(struct ath12k_base * ab,u16 tag,u16 len,const void * ptr,void * data)8828 static int ath12k_wmi_wow_wakeup_host_parse(struct ath12k_base *ab,
8829 					    u16 tag, u16 len,
8830 					    const void *ptr, void *data)
8831 {
8832 	const struct wmi_wow_ev_pg_fault_param *pf_param;
8833 	const struct wmi_wow_ev_param *param;
8834 	struct wmi_wow_ev_arg *arg = data;
8835 	int pf_len;
8836 
8837 	switch (tag) {
8838 	case WMI_TAG_WOW_EVENT_INFO:
8839 		param = ptr;
8840 		arg->wake_reason = le32_to_cpu(param->wake_reason);
8841 		ath12k_dbg(ab, ATH12K_DBG_WMI, "wow wakeup host reason %d %s\n",
8842 			   arg->wake_reason, wow_reason(arg->wake_reason));
8843 		break;
8844 
8845 	case WMI_TAG_ARRAY_BYTE:
8846 		if (arg && arg->wake_reason == WOW_REASON_PAGE_FAULT) {
8847 			pf_param = ptr;
8848 			pf_len = le32_to_cpu(pf_param->len);
8849 			if (pf_len > len - sizeof(pf_len) ||
8850 			    pf_len < 0) {
8851 				ath12k_warn(ab, "invalid wo reason page fault buffer len %d\n",
8852 					    pf_len);
8853 				return -EINVAL;
8854 			}
8855 			ath12k_dbg(ab, ATH12K_DBG_WMI, "wow_reason_page_fault len %d\n",
8856 				   pf_len);
8857 			ath12k_dbg_dump(ab, ATH12K_DBG_WMI,
8858 					"wow_reason_page_fault packet present",
8859 					"wow_pg_fault ",
8860 					pf_param->data,
8861 					pf_len);
8862 		}
8863 		break;
8864 	default:
8865 		break;
8866 	}
8867 
8868 	return 0;
8869 }
8870 
ath12k_wmi_event_wow_wakeup_host(struct ath12k_base * ab,struct sk_buff * skb)8871 static void ath12k_wmi_event_wow_wakeup_host(struct ath12k_base *ab, struct sk_buff *skb)
8872 {
8873 	struct wmi_wow_ev_arg arg = { };
8874 	int ret;
8875 
8876 	ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len,
8877 				  ath12k_wmi_wow_wakeup_host_parse,
8878 				  &arg);
8879 	if (ret) {
8880 		ath12k_warn(ab, "failed to parse wmi wow wakeup host event tlv: %d\n",
8881 			    ret);
8882 		return;
8883 	}
8884 
8885 	complete(&ab->wow.wakeup_completed);
8886 }
8887 
ath12k_wmi_gtk_offload_status_event(struct ath12k_base * ab,struct sk_buff * skb)8888 static void ath12k_wmi_gtk_offload_status_event(struct ath12k_base *ab,
8889 						struct sk_buff *skb)
8890 {
8891 	const struct wmi_gtk_offload_status_event *ev;
8892 	struct ath12k_link_vif *arvif;
8893 	__be64 replay_ctr_be;
8894 	u64 replay_ctr;
8895 	const void **tb;
8896 	int ret;
8897 
8898 	tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
8899 	if (IS_ERR(tb)) {
8900 		ret = PTR_ERR(tb);
8901 		ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
8902 		return;
8903 	}
8904 
8905 	ev = tb[WMI_TAG_GTK_OFFLOAD_STATUS_EVENT];
8906 	if (!ev) {
8907 		ath12k_warn(ab, "failed to fetch gtk offload status ev");
8908 		kfree(tb);
8909 		return;
8910 	}
8911 
8912 	rcu_read_lock();
8913 	arvif = ath12k_mac_get_arvif_by_vdev_id(ab, le32_to_cpu(ev->vdev_id));
8914 	if (!arvif) {
8915 		rcu_read_unlock();
8916 		ath12k_warn(ab, "failed to get arvif for vdev_id:%d\n",
8917 			    le32_to_cpu(ev->vdev_id));
8918 		kfree(tb);
8919 		return;
8920 	}
8921 
8922 	replay_ctr = le64_to_cpu(ev->replay_ctr);
8923 	arvif->rekey_data.replay_ctr = replay_ctr;
8924 	ath12k_dbg(ab, ATH12K_DBG_WMI, "wmi gtk offload event refresh_cnt %d replay_ctr %llu\n",
8925 		   le32_to_cpu(ev->refresh_cnt), replay_ctr);
8926 
8927 	/* supplicant expects big-endian replay counter */
8928 	replay_ctr_be = cpu_to_be64(replay_ctr);
8929 
8930 	ieee80211_gtk_rekey_notify(arvif->ahvif->vif, arvif->bssid,
8931 				   (void *)&replay_ctr_be, GFP_ATOMIC);
8932 
8933 	rcu_read_unlock();
8934 
8935 	kfree(tb);
8936 }
8937 
ath12k_wmi_event_mlo_setup_complete(struct ath12k_base * ab,struct sk_buff * skb)8938 static void ath12k_wmi_event_mlo_setup_complete(struct ath12k_base *ab,
8939 						struct sk_buff *skb)
8940 {
8941 	const struct wmi_mlo_setup_complete_event *ev;
8942 	struct ath12k *ar = NULL;
8943 	struct ath12k_pdev *pdev;
8944 	const void **tb;
8945 	int ret, i;
8946 
8947 	tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
8948 	if (IS_ERR(tb)) {
8949 		ret = PTR_ERR(tb);
8950 		ath12k_warn(ab, "failed to parse mlo setup complete event tlv: %d\n",
8951 			    ret);
8952 		return;
8953 	}
8954 
8955 	ev = tb[WMI_TAG_MLO_SETUP_COMPLETE_EVENT];
8956 	if (!ev) {
8957 		ath12k_warn(ab, "failed to fetch mlo setup complete event\n");
8958 		kfree(tb);
8959 		return;
8960 	}
8961 
8962 	if (le32_to_cpu(ev->pdev_id) > ab->num_radios)
8963 		goto skip_lookup;
8964 
8965 	for (i = 0; i < ab->num_radios; i++) {
8966 		pdev = &ab->pdevs[i];
8967 		if (pdev && pdev->pdev_id == le32_to_cpu(ev->pdev_id)) {
8968 			ar = pdev->ar;
8969 			break;
8970 		}
8971 	}
8972 
8973 skip_lookup:
8974 	if (!ar) {
8975 		ath12k_warn(ab, "invalid pdev_id %d status %u in setup complete event\n",
8976 			    ev->pdev_id, ev->status);
8977 		goto out;
8978 	}
8979 
8980 	ar->mlo_setup_status = le32_to_cpu(ev->status);
8981 	complete(&ar->mlo_setup_done);
8982 
8983 out:
8984 	kfree(tb);
8985 }
8986 
ath12k_wmi_event_teardown_complete(struct ath12k_base * ab,struct sk_buff * skb)8987 static void ath12k_wmi_event_teardown_complete(struct ath12k_base *ab,
8988 					       struct sk_buff *skb)
8989 {
8990 	const struct wmi_mlo_teardown_complete_event *ev;
8991 	const void **tb;
8992 	int ret;
8993 
8994 	tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
8995 	if (IS_ERR(tb)) {
8996 		ret = PTR_ERR(tb);
8997 		ath12k_warn(ab, "failed to parse teardown complete event tlv: %d\n", ret);
8998 		return;
8999 	}
9000 
9001 	ev = tb[WMI_TAG_MLO_TEARDOWN_COMPLETE];
9002 	if (!ev) {
9003 		ath12k_warn(ab, "failed to fetch teardown complete event\n");
9004 		kfree(tb);
9005 		return;
9006 	}
9007 
9008 	kfree(tb);
9009 }
9010 
9011 #ifdef CONFIG_ATH12K_DEBUGFS
ath12k_wmi_tpc_stats_copy_buffer(struct ath12k_base * ab,const void * ptr,u16 tag,u16 len,struct wmi_tpc_stats_arg * tpc_stats)9012 static int ath12k_wmi_tpc_stats_copy_buffer(struct ath12k_base *ab,
9013 					    const void *ptr, u16 tag, u16 len,
9014 					    struct wmi_tpc_stats_arg *tpc_stats)
9015 {
9016 	u32 len1, len2, len3, len4;
9017 	s16 *dst_ptr;
9018 	s8 *dst_ptr_ctl;
9019 
9020 	len1 = le32_to_cpu(tpc_stats->max_reg_allowed_power.tpc_reg_pwr.reg_array_len);
9021 	len2 = le32_to_cpu(tpc_stats->rates_array1.tpc_rates_array.rate_array_len);
9022 	len3 = le32_to_cpu(tpc_stats->rates_array2.tpc_rates_array.rate_array_len);
9023 	len4 = le32_to_cpu(tpc_stats->ctl_array.tpc_ctl_pwr.ctl_array_len);
9024 
9025 	switch (tpc_stats->event_count) {
9026 	case ATH12K_TPC_STATS_CONFIG_REG_PWR_EVENT:
9027 		if (len1 > len)
9028 			return -ENOBUFS;
9029 
9030 		if (tpc_stats->tlvs_rcvd & WMI_TPC_REG_PWR_ALLOWED) {
9031 			dst_ptr = tpc_stats->max_reg_allowed_power.reg_pwr_array;
9032 			memcpy(dst_ptr, ptr, len1);
9033 		}
9034 		break;
9035 	case ATH12K_TPC_STATS_RATES_EVENT1:
9036 		if (len2 > len)
9037 			return -ENOBUFS;
9038 
9039 		if (tpc_stats->tlvs_rcvd & WMI_TPC_RATES_ARRAY1) {
9040 			dst_ptr = tpc_stats->rates_array1.rate_array;
9041 			memcpy(dst_ptr, ptr, len2);
9042 		}
9043 		break;
9044 	case ATH12K_TPC_STATS_RATES_EVENT2:
9045 		if (len3 > len)
9046 			return -ENOBUFS;
9047 
9048 		if (tpc_stats->tlvs_rcvd & WMI_TPC_RATES_ARRAY2) {
9049 			dst_ptr = tpc_stats->rates_array2.rate_array;
9050 			memcpy(dst_ptr, ptr, len3);
9051 		}
9052 		break;
9053 	case ATH12K_TPC_STATS_CTL_TABLE_EVENT:
9054 		if (len4 > len)
9055 			return -ENOBUFS;
9056 
9057 		if (tpc_stats->tlvs_rcvd & WMI_TPC_CTL_PWR_ARRAY) {
9058 			dst_ptr_ctl = tpc_stats->ctl_array.ctl_pwr_table;
9059 			memcpy(dst_ptr_ctl, ptr, len4);
9060 		}
9061 		break;
9062 	}
9063 	return 0;
9064 }
9065 
ath12k_tpc_get_reg_pwr(struct ath12k_base * ab,struct wmi_tpc_stats_arg * tpc_stats,struct wmi_max_reg_power_fixed_params * ev)9066 static int ath12k_tpc_get_reg_pwr(struct ath12k_base *ab,
9067 				  struct wmi_tpc_stats_arg *tpc_stats,
9068 				  struct wmi_max_reg_power_fixed_params *ev)
9069 {
9070 	struct wmi_max_reg_power_allowed_arg *reg_pwr;
9071 	u32 total_size;
9072 
9073 	ath12k_dbg(ab, ATH12K_DBG_WMI,
9074 		   "Received reg power array type %d length %d for tpc stats\n",
9075 		   ev->reg_power_type, ev->reg_array_len);
9076 
9077 	switch (le32_to_cpu(ev->reg_power_type)) {
9078 	case TPC_STATS_REG_PWR_ALLOWED_TYPE:
9079 		reg_pwr = &tpc_stats->max_reg_allowed_power;
9080 		break;
9081 	default:
9082 		return -EINVAL;
9083 	}
9084 
9085 	/* Each entry is 2 byte hence multiplying the indices with 2 */
9086 	total_size = le32_to_cpu(ev->d1) * le32_to_cpu(ev->d2) *
9087 		     le32_to_cpu(ev->d3) * le32_to_cpu(ev->d4) * 2;
9088 	if (le32_to_cpu(ev->reg_array_len) != total_size) {
9089 		ath12k_warn(ab,
9090 			    "Total size and reg_array_len doesn't match for tpc stats\n");
9091 		return -EINVAL;
9092 	}
9093 
9094 	memcpy(&reg_pwr->tpc_reg_pwr, ev, sizeof(struct wmi_max_reg_power_fixed_params));
9095 
9096 	reg_pwr->reg_pwr_array = kzalloc(le32_to_cpu(reg_pwr->tpc_reg_pwr.reg_array_len),
9097 					 GFP_ATOMIC);
9098 	if (!reg_pwr->reg_pwr_array)
9099 		return -ENOMEM;
9100 
9101 	tpc_stats->tlvs_rcvd |= WMI_TPC_REG_PWR_ALLOWED;
9102 
9103 	return 0;
9104 }
9105 
ath12k_tpc_get_rate_array(struct ath12k_base * ab,struct wmi_tpc_stats_arg * tpc_stats,struct wmi_tpc_rates_array_fixed_params * ev)9106 static int ath12k_tpc_get_rate_array(struct ath12k_base *ab,
9107 				     struct wmi_tpc_stats_arg *tpc_stats,
9108 				     struct wmi_tpc_rates_array_fixed_params *ev)
9109 {
9110 	struct wmi_tpc_rates_array_arg *rates_array;
9111 	u32 flag = 0, rate_array_len;
9112 
9113 	ath12k_dbg(ab, ATH12K_DBG_WMI,
9114 		   "Received rates array type %d length %d for tpc stats\n",
9115 		   ev->rate_array_type, ev->rate_array_len);
9116 
9117 	switch (le32_to_cpu(ev->rate_array_type)) {
9118 	case ATH12K_TPC_STATS_RATES_ARRAY1:
9119 		rates_array = &tpc_stats->rates_array1;
9120 		flag = WMI_TPC_RATES_ARRAY1;
9121 		break;
9122 	case ATH12K_TPC_STATS_RATES_ARRAY2:
9123 		rates_array = &tpc_stats->rates_array2;
9124 		flag = WMI_TPC_RATES_ARRAY2;
9125 		break;
9126 	default:
9127 		ath12k_warn(ab,
9128 			    "Received invalid type of rates array for tpc stats\n");
9129 		return -EINVAL;
9130 	}
9131 	memcpy(&rates_array->tpc_rates_array, ev,
9132 	       sizeof(struct wmi_tpc_rates_array_fixed_params));
9133 	rate_array_len = le32_to_cpu(rates_array->tpc_rates_array.rate_array_len);
9134 	rates_array->rate_array = kzalloc(rate_array_len, GFP_ATOMIC);
9135 	if (!rates_array->rate_array)
9136 		return -ENOMEM;
9137 
9138 	tpc_stats->tlvs_rcvd |= flag;
9139 	return 0;
9140 }
9141 
ath12k_tpc_get_ctl_pwr_tbl(struct ath12k_base * ab,struct wmi_tpc_stats_arg * tpc_stats,struct wmi_tpc_ctl_pwr_fixed_params * ev)9142 static int ath12k_tpc_get_ctl_pwr_tbl(struct ath12k_base *ab,
9143 				      struct wmi_tpc_stats_arg *tpc_stats,
9144 				      struct wmi_tpc_ctl_pwr_fixed_params *ev)
9145 {
9146 	struct wmi_tpc_ctl_pwr_table_arg *ctl_array;
9147 	u32 total_size, ctl_array_len, flag = 0;
9148 
9149 	ath12k_dbg(ab, ATH12K_DBG_WMI,
9150 		   "Received ctl array type %d length %d for tpc stats\n",
9151 		   ev->ctl_array_type, ev->ctl_array_len);
9152 
9153 	switch (le32_to_cpu(ev->ctl_array_type)) {
9154 	case ATH12K_TPC_STATS_CTL_ARRAY:
9155 		ctl_array = &tpc_stats->ctl_array;
9156 		flag = WMI_TPC_CTL_PWR_ARRAY;
9157 		break;
9158 	default:
9159 		ath12k_warn(ab,
9160 			    "Received invalid type of ctl pwr table for tpc stats\n");
9161 		return -EINVAL;
9162 	}
9163 
9164 	total_size = le32_to_cpu(ev->d1) * le32_to_cpu(ev->d2) *
9165 		     le32_to_cpu(ev->d3) * le32_to_cpu(ev->d4);
9166 	if (le32_to_cpu(ev->ctl_array_len) != total_size) {
9167 		ath12k_warn(ab,
9168 			    "Total size and ctl_array_len doesn't match for tpc stats\n");
9169 		return -EINVAL;
9170 	}
9171 
9172 	memcpy(&ctl_array->tpc_ctl_pwr, ev, sizeof(struct wmi_tpc_ctl_pwr_fixed_params));
9173 	ctl_array_len = le32_to_cpu(ctl_array->tpc_ctl_pwr.ctl_array_len);
9174 	ctl_array->ctl_pwr_table = kzalloc(ctl_array_len, GFP_ATOMIC);
9175 	if (!ctl_array->ctl_pwr_table)
9176 		return -ENOMEM;
9177 
9178 	tpc_stats->tlvs_rcvd |= flag;
9179 	return 0;
9180 }
9181 
ath12k_wmi_tpc_stats_subtlv_parser(struct ath12k_base * ab,u16 tag,u16 len,const void * ptr,void * data)9182 static int ath12k_wmi_tpc_stats_subtlv_parser(struct ath12k_base *ab,
9183 					      u16 tag, u16 len,
9184 					      const void *ptr, void *data)
9185 {
9186 	struct wmi_tpc_rates_array_fixed_params *tpc_rates_array;
9187 	struct wmi_max_reg_power_fixed_params *tpc_reg_pwr;
9188 	struct wmi_tpc_ctl_pwr_fixed_params *tpc_ctl_pwr;
9189 	struct wmi_tpc_stats_arg *tpc_stats = data;
9190 	struct wmi_tpc_config_params *tpc_config;
9191 	int ret = 0;
9192 
9193 	if (!tpc_stats) {
9194 		ath12k_warn(ab, "tpc stats memory unavailable\n");
9195 		return -EINVAL;
9196 	}
9197 
9198 	switch (tag) {
9199 	case WMI_TAG_TPC_STATS_CONFIG_EVENT:
9200 		tpc_config = (struct wmi_tpc_config_params *)ptr;
9201 		memcpy(&tpc_stats->tpc_config, tpc_config,
9202 		       sizeof(struct wmi_tpc_config_params));
9203 		break;
9204 	case WMI_TAG_TPC_STATS_REG_PWR_ALLOWED:
9205 		tpc_reg_pwr = (struct wmi_max_reg_power_fixed_params *)ptr;
9206 		ret = ath12k_tpc_get_reg_pwr(ab, tpc_stats, tpc_reg_pwr);
9207 		break;
9208 	case WMI_TAG_TPC_STATS_RATES_ARRAY:
9209 		tpc_rates_array = (struct wmi_tpc_rates_array_fixed_params *)ptr;
9210 		ret = ath12k_tpc_get_rate_array(ab, tpc_stats, tpc_rates_array);
9211 		break;
9212 	case WMI_TAG_TPC_STATS_CTL_PWR_TABLE_EVENT:
9213 		tpc_ctl_pwr = (struct wmi_tpc_ctl_pwr_fixed_params *)ptr;
9214 		ret = ath12k_tpc_get_ctl_pwr_tbl(ab, tpc_stats, tpc_ctl_pwr);
9215 		break;
9216 	default:
9217 		ath12k_warn(ab,
9218 			    "Received invalid tag for tpc stats in subtlvs\n");
9219 		return -EINVAL;
9220 	}
9221 	return ret;
9222 }
9223 
ath12k_wmi_tpc_stats_event_parser(struct ath12k_base * ab,u16 tag,u16 len,const void * ptr,void * data)9224 static int ath12k_wmi_tpc_stats_event_parser(struct ath12k_base *ab,
9225 					     u16 tag, u16 len,
9226 					     const void *ptr, void *data)
9227 {
9228 	struct wmi_tpc_stats_arg *tpc_stats = (struct wmi_tpc_stats_arg *)data;
9229 	int ret;
9230 
9231 	switch (tag) {
9232 	case WMI_TAG_HALPHY_CTRL_PATH_EVENT_FIXED_PARAM:
9233 		ret = 0;
9234 		/* Fixed param is already processed*/
9235 		break;
9236 	case WMI_TAG_ARRAY_STRUCT:
9237 		/* len 0 is expected for array of struct when there
9238 		 * is no content of that type to pack inside that tlv
9239 		 */
9240 		if (len == 0)
9241 			return 0;
9242 		ret = ath12k_wmi_tlv_iter(ab, ptr, len,
9243 					  ath12k_wmi_tpc_stats_subtlv_parser,
9244 					  tpc_stats);
9245 		break;
9246 	case WMI_TAG_ARRAY_INT16:
9247 		if (len == 0)
9248 			return 0;
9249 		ret = ath12k_wmi_tpc_stats_copy_buffer(ab, ptr,
9250 						       WMI_TAG_ARRAY_INT16,
9251 						       len, tpc_stats);
9252 		break;
9253 	case WMI_TAG_ARRAY_BYTE:
9254 		if (len == 0)
9255 			return 0;
9256 		ret = ath12k_wmi_tpc_stats_copy_buffer(ab, ptr,
9257 						       WMI_TAG_ARRAY_BYTE,
9258 						       len, tpc_stats);
9259 		break;
9260 	default:
9261 		ath12k_warn(ab, "Received invalid tag for tpc stats\n");
9262 		ret = -EINVAL;
9263 		break;
9264 	}
9265 	return ret;
9266 }
9267 
ath12k_wmi_free_tpc_stats_mem(struct ath12k * ar)9268 void ath12k_wmi_free_tpc_stats_mem(struct ath12k *ar)
9269 {
9270 	struct wmi_tpc_stats_arg *tpc_stats = ar->debug.tpc_stats;
9271 
9272 	lockdep_assert_held(&ar->data_lock);
9273 	ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "tpc stats mem free\n");
9274 	if (tpc_stats) {
9275 		kfree(tpc_stats->max_reg_allowed_power.reg_pwr_array);
9276 		kfree(tpc_stats->rates_array1.rate_array);
9277 		kfree(tpc_stats->rates_array2.rate_array);
9278 		kfree(tpc_stats->ctl_array.ctl_pwr_table);
9279 		kfree(tpc_stats);
9280 		ar->debug.tpc_stats = NULL;
9281 	}
9282 }
9283 
ath12k_wmi_process_tpc_stats(struct ath12k_base * ab,struct sk_buff * skb)9284 static void ath12k_wmi_process_tpc_stats(struct ath12k_base *ab,
9285 					 struct sk_buff *skb)
9286 {
9287 	struct ath12k_wmi_pdev_tpc_stats_event_fixed_params *fixed_param;
9288 	struct wmi_tpc_stats_arg *tpc_stats;
9289 	const struct wmi_tlv *tlv;
9290 	void *ptr = skb->data;
9291 	struct ath12k *ar;
9292 	u16 tlv_tag;
9293 	u32 event_count;
9294 	int ret;
9295 
9296 	if (!skb->data) {
9297 		ath12k_warn(ab, "No data present in tpc stats event\n");
9298 		return;
9299 	}
9300 
9301 	if (skb->len < (sizeof(*fixed_param) + TLV_HDR_SIZE)) {
9302 		ath12k_warn(ab, "TPC stats event size invalid\n");
9303 		return;
9304 	}
9305 
9306 	tlv = (struct wmi_tlv *)ptr;
9307 	tlv_tag = le32_get_bits(tlv->header, WMI_TLV_TAG);
9308 	ptr += sizeof(*tlv);
9309 
9310 	if (tlv_tag != WMI_TAG_HALPHY_CTRL_PATH_EVENT_FIXED_PARAM) {
9311 		ath12k_warn(ab, "TPC stats without fixed param tlv at start\n");
9312 		return;
9313 	}
9314 
9315 	fixed_param = (struct ath12k_wmi_pdev_tpc_stats_event_fixed_params *)ptr;
9316 	rcu_read_lock();
9317 	ar = ath12k_mac_get_ar_by_pdev_id(ab, le32_to_cpu(fixed_param->pdev_id) + 1);
9318 	if (!ar) {
9319 		ath12k_warn(ab, "Failed to get ar for tpc stats\n");
9320 		rcu_read_unlock();
9321 		return;
9322 	}
9323 	spin_lock_bh(&ar->data_lock);
9324 	if (!ar->debug.tpc_request) {
9325 		/* Event is received either without request or the
9326 		 * timeout, if memory is already allocated free it
9327 		 */
9328 		if (ar->debug.tpc_stats) {
9329 			ath12k_warn(ab, "Freeing memory for tpc_stats\n");
9330 			ath12k_wmi_free_tpc_stats_mem(ar);
9331 		}
9332 		goto unlock;
9333 	}
9334 
9335 	event_count = le32_to_cpu(fixed_param->event_count);
9336 	if (event_count == 0) {
9337 		if (ar->debug.tpc_stats) {
9338 			ath12k_warn(ab,
9339 				    "Invalid tpc memory present\n");
9340 			goto unlock;
9341 		}
9342 		ar->debug.tpc_stats =
9343 			kzalloc(sizeof(struct wmi_tpc_stats_arg),
9344 				GFP_ATOMIC);
9345 		if (!ar->debug.tpc_stats) {
9346 			ath12k_warn(ab,
9347 				    "Failed to allocate memory for tpc stats\n");
9348 			goto unlock;
9349 		}
9350 	}
9351 
9352 	tpc_stats = ar->debug.tpc_stats;
9353 	if (!tpc_stats) {
9354 		ath12k_warn(ab, "tpc stats memory unavailable\n");
9355 		goto unlock;
9356 	}
9357 
9358 	if (!(event_count == 0)) {
9359 		if (event_count != tpc_stats->event_count + 1) {
9360 			ath12k_warn(ab,
9361 				    "Invalid tpc event received\n");
9362 			goto unlock;
9363 		}
9364 	}
9365 	tpc_stats->pdev_id = le32_to_cpu(fixed_param->pdev_id);
9366 	tpc_stats->end_of_event = le32_to_cpu(fixed_param->end_of_event);
9367 	tpc_stats->event_count = le32_to_cpu(fixed_param->event_count);
9368 	ath12k_dbg(ab, ATH12K_DBG_WMI,
9369 		   "tpc stats event_count %d\n",
9370 		   tpc_stats->event_count);
9371 	ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len,
9372 				  ath12k_wmi_tpc_stats_event_parser,
9373 				  tpc_stats);
9374 	if (ret) {
9375 		ath12k_wmi_free_tpc_stats_mem(ar);
9376 		ath12k_warn(ab, "failed to parse tpc_stats tlv: %d\n", ret);
9377 		goto unlock;
9378 	}
9379 
9380 	if (tpc_stats->end_of_event)
9381 		complete(&ar->debug.tpc_complete);
9382 
9383 unlock:
9384 	spin_unlock_bh(&ar->data_lock);
9385 	rcu_read_unlock();
9386 }
9387 #else
ath12k_wmi_process_tpc_stats(struct ath12k_base * ab,struct sk_buff * skb)9388 static void ath12k_wmi_process_tpc_stats(struct ath12k_base *ab,
9389 					 struct sk_buff *skb)
9390 {
9391 }
9392 #endif
9393 
9394 static int
ath12k_wmi_rssi_dbm_conv_info_evt_subtlv_parser(struct ath12k_base * ab,u16 tag,u16 len,const void * ptr,void * data)9395 ath12k_wmi_rssi_dbm_conv_info_evt_subtlv_parser(struct ath12k_base *ab,
9396 						u16 tag, u16 len,
9397 						const void *ptr, void *data)
9398 {
9399 	const struct ath12k_wmi_rssi_dbm_conv_temp_info_params *temp_info;
9400 	const struct ath12k_wmi_rssi_dbm_conv_info_params *param_info;
9401 	struct ath12k_wmi_rssi_dbm_conv_info_arg *rssi_info = data;
9402 	struct ath12k_wmi_rssi_dbm_conv_param_arg param_arg;
9403 	s32 nf_hw_dbm[ATH12K_MAX_NUM_NF_HW_DBM];
9404 	u8 num_20mhz_segments;
9405 	s8 min_nf, *nf_ptr;
9406 	int i, j;
9407 
9408 	switch (tag) {
9409 	case WMI_TAG_RSSI_DBM_CONVERSION_PARAMS_INFO:
9410 		if (len < sizeof(*param_info)) {
9411 			ath12k_warn(ab,
9412 				    "RSSI dbm conv subtlv 0x%x invalid len %d rcvd",
9413 				    tag, len);
9414 			return -EINVAL;
9415 		}
9416 
9417 		param_info = ptr;
9418 
9419 		param_arg.curr_bw = le32_to_cpu(param_info->curr_bw);
9420 		param_arg.curr_rx_chainmask = le32_to_cpu(param_info->curr_rx_chainmask);
9421 
9422 		/* The received array is actually a 2D byte-array for per chain,
9423 		 * per 20MHz subband. Convert to 2D byte-array
9424 		 */
9425 		nf_ptr = &param_arg.nf_hw_dbm[0][0];
9426 
9427 		for (i = 0; i < ATH12K_MAX_NUM_NF_HW_DBM; i++) {
9428 			nf_hw_dbm[i] = a_sle32_to_cpu(param_info->nf_hw_dbm[i]);
9429 
9430 			for (j = 0; j < 4; j++) {
9431 				*nf_ptr = (nf_hw_dbm[i] >> (j * 8)) & 0xFF;
9432 				nf_ptr++;
9433 			}
9434 		}
9435 
9436 		switch (param_arg.curr_bw) {
9437 		case WMI_CHAN_WIDTH_20:
9438 			num_20mhz_segments = 1;
9439 			break;
9440 		case WMI_CHAN_WIDTH_40:
9441 			num_20mhz_segments = 2;
9442 			break;
9443 		case WMI_CHAN_WIDTH_80:
9444 			num_20mhz_segments = 4;
9445 			break;
9446 		case WMI_CHAN_WIDTH_160:
9447 			num_20mhz_segments = 8;
9448 			break;
9449 		case WMI_CHAN_WIDTH_320:
9450 			num_20mhz_segments = 16;
9451 			break;
9452 		default:
9453 			ath12k_warn(ab, "Invalid current bandwidth %d in RSSI dbm event",
9454 				    param_arg.curr_bw);
9455 			/* In error case, still consider the primary 20 MHz segment since
9456 			 * that would be much better than instead of dropping the whole
9457 			 * event
9458 			 */
9459 			num_20mhz_segments = 1;
9460 		}
9461 
9462 		min_nf = ATH12K_DEFAULT_NOISE_FLOOR;
9463 
9464 		for (i = 0; i < ATH12K_MAX_NUM_ANTENNA; i++) {
9465 			if (!(param_arg.curr_rx_chainmask & BIT(i)))
9466 				continue;
9467 
9468 			for (j = 0; j < num_20mhz_segments; j++) {
9469 				if (param_arg.nf_hw_dbm[i][j] < min_nf)
9470 					min_nf = param_arg.nf_hw_dbm[i][j];
9471 			}
9472 		}
9473 
9474 		rssi_info->min_nf_dbm = min_nf;
9475 		rssi_info->nf_dbm_present = true;
9476 		break;
9477 	case WMI_TAG_RSSI_DBM_CONVERSION_TEMP_OFFSET_INFO:
9478 		if (len < sizeof(*temp_info)) {
9479 			ath12k_warn(ab,
9480 				    "RSSI dbm conv subtlv 0x%x invalid len %d rcvd",
9481 				    tag, len);
9482 			return -EINVAL;
9483 		}
9484 
9485 		temp_info = ptr;
9486 		rssi_info->temp_offset = a_sle32_to_cpu(temp_info->offset);
9487 		rssi_info->temp_offset_present = true;
9488 		break;
9489 	default:
9490 		ath12k_dbg(ab, ATH12K_DBG_WMI,
9491 			   "Unknown subtlv 0x%x in RSSI dbm conversion event\n", tag);
9492 	}
9493 
9494 	return 0;
9495 }
9496 
9497 static int
ath12k_wmi_rssi_dbm_conv_info_event_parser(struct ath12k_base * ab,u16 tag,u16 len,const void * ptr,void * data)9498 ath12k_wmi_rssi_dbm_conv_info_event_parser(struct ath12k_base *ab,
9499 					   u16 tag, u16 len,
9500 					   const void *ptr, void *data)
9501 {
9502 	int ret = 0;
9503 
9504 	switch (tag) {
9505 	case WMI_TAG_RSSI_DBM_CONVERSION_PARAMS_INFO_FIXED_PARAM:
9506 		/* Fixed param is already processed*/
9507 		break;
9508 	case WMI_TAG_ARRAY_STRUCT:
9509 		/* len 0 is expected for array of struct when there
9510 		 * is no content of that type inside that tlv
9511 		 */
9512 		if (len == 0)
9513 			return 0;
9514 
9515 		ret = ath12k_wmi_tlv_iter(ab, ptr, len,
9516 					  ath12k_wmi_rssi_dbm_conv_info_evt_subtlv_parser,
9517 					  data);
9518 		break;
9519 	default:
9520 		ath12k_dbg(ab, ATH12K_DBG_WMI,
9521 			   "Received invalid tag 0x%x for RSSI dbm conv info event\n",
9522 			   tag);
9523 		break;
9524 	}
9525 
9526 	return ret;
9527 }
9528 
9529 static int
ath12k_wmi_rssi_dbm_conv_info_process_fixed_param(struct ath12k_base * ab,u8 * ptr,size_t len,int * pdev_id)9530 ath12k_wmi_rssi_dbm_conv_info_process_fixed_param(struct ath12k_base *ab, u8 *ptr,
9531 						  size_t len, int *pdev_id)
9532 {
9533 	struct ath12k_wmi_rssi_dbm_conv_info_fixed_params *fixed_param;
9534 	const struct wmi_tlv *tlv;
9535 	u16 tlv_tag;
9536 
9537 	if (len < (sizeof(*fixed_param) + TLV_HDR_SIZE)) {
9538 		ath12k_warn(ab, "invalid RSSI dbm conv event size %zu\n", len);
9539 		return -EINVAL;
9540 	}
9541 
9542 	tlv = (struct wmi_tlv *)ptr;
9543 	tlv_tag = le32_get_bits(tlv->header, WMI_TLV_TAG);
9544 	ptr += sizeof(*tlv);
9545 
9546 	if (tlv_tag != WMI_TAG_RSSI_DBM_CONVERSION_PARAMS_INFO_FIXED_PARAM) {
9547 		ath12k_warn(ab, "RSSI dbm conv event received without fixed param tlv\n");
9548 		return -EINVAL;
9549 	}
9550 
9551 	fixed_param = (struct ath12k_wmi_rssi_dbm_conv_info_fixed_params *)ptr;
9552 	*pdev_id = le32_to_cpu(fixed_param->pdev_id);
9553 
9554 	return 0;
9555 }
9556 
9557 static void
ath12k_wmi_update_rssi_offsets(struct ath12k * ar,struct ath12k_wmi_rssi_dbm_conv_info_arg * rssi_info)9558 ath12k_wmi_update_rssi_offsets(struct ath12k *ar,
9559 			       struct ath12k_wmi_rssi_dbm_conv_info_arg *rssi_info)
9560 {
9561 	struct ath12k_pdev_rssi_offsets *info = &ar->rssi_info;
9562 
9563 	lockdep_assert_held(&ar->data_lock);
9564 
9565 	if (rssi_info->temp_offset_present)
9566 		info->temp_offset = rssi_info->temp_offset;
9567 
9568 	if (rssi_info->nf_dbm_present)
9569 		info->min_nf_dbm = rssi_info->min_nf_dbm;
9570 
9571 	info->noise_floor = info->min_nf_dbm + info->temp_offset;
9572 }
9573 
9574 static void
ath12k_wmi_rssi_dbm_conversion_params_info_event(struct ath12k_base * ab,struct sk_buff * skb)9575 ath12k_wmi_rssi_dbm_conversion_params_info_event(struct ath12k_base *ab,
9576 						 struct sk_buff *skb)
9577 {
9578 	struct ath12k_wmi_rssi_dbm_conv_info_arg rssi_info;
9579 	struct ath12k *ar;
9580 	s32 noise_floor;
9581 	u32 pdev_id;
9582 	int ret;
9583 
9584 	ret = ath12k_wmi_rssi_dbm_conv_info_process_fixed_param(ab, skb->data, skb->len,
9585 								&pdev_id);
9586 	if (ret) {
9587 		ath12k_warn(ab, "failed to parse fixed param in RSSI dbm conv event: %d\n",
9588 			    ret);
9589 		return;
9590 	}
9591 
9592 	rcu_read_lock();
9593 	ar = ath12k_mac_get_ar_by_pdev_id(ab, pdev_id);
9594 	/* If pdev is not active, ignore the event */
9595 	if (!ar)
9596 		goto out_unlock;
9597 
9598 	ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len,
9599 				  ath12k_wmi_rssi_dbm_conv_info_event_parser,
9600 				  &rssi_info);
9601 	if (ret) {
9602 		ath12k_warn(ab, "unable to parse RSSI dbm conversion event\n");
9603 		goto out_unlock;
9604 	}
9605 
9606 	spin_lock_bh(&ar->data_lock);
9607 	ath12k_wmi_update_rssi_offsets(ar, &rssi_info);
9608 	noise_floor = ath12k_pdev_get_noise_floor(ar);
9609 	spin_unlock_bh(&ar->data_lock);
9610 
9611 	ath12k_dbg(ab, ATH12K_DBG_WMI,
9612 		   "RSSI noise floor updated, new value is %d dbm\n", noise_floor);
9613 out_unlock:
9614 	rcu_read_unlock();
9615 }
9616 
ath12k_wmi_op_rx(struct ath12k_base * ab,struct sk_buff * skb)9617 static void ath12k_wmi_op_rx(struct ath12k_base *ab, struct sk_buff *skb)
9618 {
9619 	struct wmi_cmd_hdr *cmd_hdr;
9620 	enum wmi_tlv_event_id id;
9621 
9622 	cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
9623 	id = le32_get_bits(cmd_hdr->cmd_id, WMI_CMD_HDR_CMD_ID);
9624 
9625 	if (!skb_pull(skb, sizeof(struct wmi_cmd_hdr)))
9626 		goto out;
9627 
9628 	switch (id) {
9629 		/* Process all the WMI events here */
9630 	case WMI_SERVICE_READY_EVENTID:
9631 		ath12k_service_ready_event(ab, skb);
9632 		break;
9633 	case WMI_SERVICE_READY_EXT_EVENTID:
9634 		ath12k_service_ready_ext_event(ab, skb);
9635 		break;
9636 	case WMI_SERVICE_READY_EXT2_EVENTID:
9637 		ath12k_service_ready_ext2_event(ab, skb);
9638 		break;
9639 	case WMI_REG_CHAN_LIST_CC_EXT_EVENTID:
9640 		ath12k_reg_chan_list_event(ab, skb);
9641 		break;
9642 	case WMI_READY_EVENTID:
9643 		ath12k_ready_event(ab, skb);
9644 		break;
9645 	case WMI_PEER_DELETE_RESP_EVENTID:
9646 		ath12k_peer_delete_resp_event(ab, skb);
9647 		break;
9648 	case WMI_VDEV_START_RESP_EVENTID:
9649 		ath12k_vdev_start_resp_event(ab, skb);
9650 		break;
9651 	case WMI_OFFLOAD_BCN_TX_STATUS_EVENTID:
9652 		ath12k_bcn_tx_status_event(ab, skb);
9653 		break;
9654 	case WMI_VDEV_STOPPED_EVENTID:
9655 		ath12k_vdev_stopped_event(ab, skb);
9656 		break;
9657 	case WMI_MGMT_RX_EVENTID:
9658 		ath12k_mgmt_rx_event(ab, skb);
9659 		/* mgmt_rx_event() owns the skb now! */
9660 		return;
9661 	case WMI_MGMT_TX_COMPLETION_EVENTID:
9662 		ath12k_mgmt_tx_compl_event(ab, skb);
9663 		break;
9664 	case WMI_SCAN_EVENTID:
9665 		ath12k_scan_event(ab, skb);
9666 		break;
9667 	case WMI_PEER_STA_KICKOUT_EVENTID:
9668 		ath12k_peer_sta_kickout_event(ab, skb);
9669 		break;
9670 	case WMI_ROAM_EVENTID:
9671 		ath12k_roam_event(ab, skb);
9672 		break;
9673 	case WMI_CHAN_INFO_EVENTID:
9674 		ath12k_chan_info_event(ab, skb);
9675 		break;
9676 	case WMI_PDEV_BSS_CHAN_INFO_EVENTID:
9677 		ath12k_pdev_bss_chan_info_event(ab, skb);
9678 		break;
9679 	case WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID:
9680 		ath12k_vdev_install_key_compl_event(ab, skb);
9681 		break;
9682 	case WMI_SERVICE_AVAILABLE_EVENTID:
9683 		ath12k_service_available_event(ab, skb);
9684 		break;
9685 	case WMI_PEER_ASSOC_CONF_EVENTID:
9686 		ath12k_peer_assoc_conf_event(ab, skb);
9687 		break;
9688 	case WMI_UPDATE_STATS_EVENTID:
9689 		ath12k_update_stats_event(ab, skb);
9690 		break;
9691 	case WMI_PDEV_CTL_FAILSAFE_CHECK_EVENTID:
9692 		ath12k_pdev_ctl_failsafe_check_event(ab, skb);
9693 		break;
9694 	case WMI_PDEV_CSA_SWITCH_COUNT_STATUS_EVENTID:
9695 		ath12k_wmi_pdev_csa_switch_count_status_event(ab, skb);
9696 		break;
9697 	case WMI_PDEV_TEMPERATURE_EVENTID:
9698 		ath12k_wmi_pdev_temperature_event(ab, skb);
9699 		break;
9700 	case WMI_PDEV_DMA_RING_BUF_RELEASE_EVENTID:
9701 		ath12k_wmi_pdev_dma_ring_buf_release_event(ab, skb);
9702 		break;
9703 	case WMI_HOST_FILS_DISCOVERY_EVENTID:
9704 		ath12k_fils_discovery_event(ab, skb);
9705 		break;
9706 	case WMI_OFFLOAD_PROB_RESP_TX_STATUS_EVENTID:
9707 		ath12k_probe_resp_tx_status_event(ab, skb);
9708 		break;
9709 	case WMI_RFKILL_STATE_CHANGE_EVENTID:
9710 		ath12k_rfkill_state_change_event(ab, skb);
9711 		break;
9712 	case WMI_TWT_ENABLE_EVENTID:
9713 		ath12k_wmi_twt_enable_event(ab, skb);
9714 		break;
9715 	case WMI_TWT_DISABLE_EVENTID:
9716 		ath12k_wmi_twt_disable_event(ab, skb);
9717 		break;
9718 	case WMI_P2P_NOA_EVENTID:
9719 		ath12k_wmi_p2p_noa_event(ab, skb);
9720 		break;
9721 	case WMI_PDEV_DFS_RADAR_DETECTION_EVENTID:
9722 		ath12k_wmi_pdev_dfs_radar_detected_event(ab, skb);
9723 		break;
9724 	case WMI_VDEV_DELETE_RESP_EVENTID:
9725 		ath12k_vdev_delete_resp_event(ab, skb);
9726 		break;
9727 	case WMI_DIAG_EVENTID:
9728 		ath12k_wmi_diag_event(ab, skb);
9729 		break;
9730 	case WMI_WOW_WAKEUP_HOST_EVENTID:
9731 		ath12k_wmi_event_wow_wakeup_host(ab, skb);
9732 		break;
9733 	case WMI_GTK_OFFLOAD_STATUS_EVENTID:
9734 		ath12k_wmi_gtk_offload_status_event(ab, skb);
9735 		break;
9736 	case WMI_MLO_SETUP_COMPLETE_EVENTID:
9737 		ath12k_wmi_event_mlo_setup_complete(ab, skb);
9738 		break;
9739 	case WMI_MLO_TEARDOWN_COMPLETE_EVENTID:
9740 		ath12k_wmi_event_teardown_complete(ab, skb);
9741 		break;
9742 	case WMI_HALPHY_STATS_CTRL_PATH_EVENTID:
9743 		ath12k_wmi_process_tpc_stats(ab, skb);
9744 		break;
9745 	case WMI_11D_NEW_COUNTRY_EVENTID:
9746 		ath12k_reg_11d_new_cc_event(ab, skb);
9747 		break;
9748 	case WMI_PDEV_RSSI_DBM_CONVERSION_PARAMS_INFO_EVENTID:
9749 		ath12k_wmi_rssi_dbm_conversion_params_info_event(ab, skb);
9750 		break;
9751 	/* add Unsupported events (rare) here */
9752 	case WMI_TBTTOFFSET_EXT_UPDATE_EVENTID:
9753 	case WMI_PEER_OPER_MODE_CHANGE_EVENTID:
9754 	case WMI_PDEV_DMA_RING_CFG_RSP_EVENTID:
9755 		ath12k_dbg(ab, ATH12K_DBG_WMI,
9756 			   "ignoring unsupported event 0x%x\n", id);
9757 		break;
9758 	/* add Unsupported events (frequent) here */
9759 	case WMI_PDEV_GET_HALPHY_CAL_STATUS_EVENTID:
9760 	case WMI_MGMT_RX_FW_CONSUMED_EVENTID:
9761 	case WMI_OBSS_COLOR_COLLISION_DETECTION_EVENTID:
9762 		/* debug might flood hence silently ignore (no-op) */
9763 		break;
9764 	case WMI_PDEV_UTF_EVENTID:
9765 		if (test_bit(ATH12K_FLAG_FTM_SEGMENTED, &ab->dev_flags))
9766 			ath12k_tm_wmi_event_segmented(ab, id, skb);
9767 		else
9768 			ath12k_tm_wmi_event_unsegmented(ab, id, skb);
9769 		break;
9770 	default:
9771 		ath12k_dbg(ab, ATH12K_DBG_WMI, "Unknown eventid: 0x%x\n", id);
9772 		break;
9773 	}
9774 
9775 out:
9776 	dev_kfree_skb(skb);
9777 }
9778 
ath12k_connect_pdev_htc_service(struct ath12k_base * ab,u32 pdev_idx)9779 static int ath12k_connect_pdev_htc_service(struct ath12k_base *ab,
9780 					   u32 pdev_idx)
9781 {
9782 	int status;
9783 	static const u32 svc_id[] = {
9784 		ATH12K_HTC_SVC_ID_WMI_CONTROL,
9785 		ATH12K_HTC_SVC_ID_WMI_CONTROL_MAC1,
9786 		ATH12K_HTC_SVC_ID_WMI_CONTROL_MAC2
9787 	};
9788 	struct ath12k_htc_svc_conn_req conn_req = {};
9789 	struct ath12k_htc_svc_conn_resp conn_resp = {};
9790 
9791 	/* these fields are the same for all service endpoints */
9792 	conn_req.ep_ops.ep_tx_complete = ath12k_wmi_htc_tx_complete;
9793 	conn_req.ep_ops.ep_rx_complete = ath12k_wmi_op_rx;
9794 	conn_req.ep_ops.ep_tx_credits = ath12k_wmi_op_ep_tx_credits;
9795 
9796 	/* connect to control service */
9797 	conn_req.service_id = svc_id[pdev_idx];
9798 
9799 	status = ath12k_htc_connect_service(&ab->htc, &conn_req, &conn_resp);
9800 	if (status) {
9801 		ath12k_warn(ab, "failed to connect to WMI CONTROL service status: %d\n",
9802 			    status);
9803 		return status;
9804 	}
9805 
9806 	ab->wmi_ab.wmi_endpoint_id[pdev_idx] = conn_resp.eid;
9807 	ab->wmi_ab.wmi[pdev_idx].eid = conn_resp.eid;
9808 	ab->wmi_ab.max_msg_len[pdev_idx] = conn_resp.max_msg_len;
9809 
9810 	return 0;
9811 }
9812 
9813 static int
ath12k_wmi_send_unit_test_cmd(struct ath12k * ar,struct wmi_unit_test_cmd ut_cmd,u32 * test_args)9814 ath12k_wmi_send_unit_test_cmd(struct ath12k *ar,
9815 			      struct wmi_unit_test_cmd ut_cmd,
9816 			      u32 *test_args)
9817 {
9818 	struct ath12k_wmi_pdev *wmi = ar->wmi;
9819 	struct wmi_unit_test_cmd *cmd;
9820 	struct sk_buff *skb;
9821 	struct wmi_tlv *tlv;
9822 	void *ptr;
9823 	u32 *ut_cmd_args;
9824 	int buf_len, arg_len;
9825 	int ret;
9826 	int i;
9827 
9828 	arg_len = sizeof(u32) * le32_to_cpu(ut_cmd.num_args);
9829 	buf_len = sizeof(ut_cmd) + arg_len + TLV_HDR_SIZE;
9830 
9831 	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, buf_len);
9832 	if (!skb)
9833 		return -ENOMEM;
9834 
9835 	cmd = (struct wmi_unit_test_cmd *)skb->data;
9836 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_UNIT_TEST_CMD,
9837 						 sizeof(ut_cmd));
9838 
9839 	cmd->vdev_id = ut_cmd.vdev_id;
9840 	cmd->module_id = ut_cmd.module_id;
9841 	cmd->num_args = ut_cmd.num_args;
9842 	cmd->diag_token = ut_cmd.diag_token;
9843 
9844 	ptr = skb->data + sizeof(ut_cmd);
9845 
9846 	tlv = ptr;
9847 	tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, arg_len);
9848 
9849 	ptr += TLV_HDR_SIZE;
9850 
9851 	ut_cmd_args = ptr;
9852 	for (i = 0; i < le32_to_cpu(ut_cmd.num_args); i++)
9853 		ut_cmd_args[i] = test_args[i];
9854 
9855 	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
9856 		   "WMI unit test : module %d vdev %d n_args %d token %d\n",
9857 		   cmd->module_id, cmd->vdev_id, cmd->num_args,
9858 		   cmd->diag_token);
9859 
9860 	ret = ath12k_wmi_cmd_send(wmi, skb, WMI_UNIT_TEST_CMDID);
9861 
9862 	if (ret) {
9863 		ath12k_warn(ar->ab, "failed to send WMI_UNIT_TEST CMD :%d\n",
9864 			    ret);
9865 		dev_kfree_skb(skb);
9866 	}
9867 
9868 	return ret;
9869 }
9870 
ath12k_wmi_simulate_radar(struct ath12k * ar)9871 int ath12k_wmi_simulate_radar(struct ath12k *ar)
9872 {
9873 	struct ath12k_link_vif *arvif;
9874 	u32 dfs_args[DFS_MAX_TEST_ARGS];
9875 	struct wmi_unit_test_cmd wmi_ut;
9876 	bool arvif_found = false;
9877 
9878 	list_for_each_entry(arvif, &ar->arvifs, list) {
9879 		if (arvif->is_started && arvif->ahvif->vdev_type == WMI_VDEV_TYPE_AP) {
9880 			arvif_found = true;
9881 			break;
9882 		}
9883 	}
9884 
9885 	if (!arvif_found)
9886 		return -EINVAL;
9887 
9888 	dfs_args[DFS_TEST_CMDID] = 0;
9889 	dfs_args[DFS_TEST_PDEV_ID] = ar->pdev->pdev_id;
9890 	/* Currently we could pass segment_id(b0 - b1), chirp(b2)
9891 	 * freq offset (b3 - b10) to unit test. For simulation
9892 	 * purpose this can be set to 0 which is valid.
9893 	 */
9894 	dfs_args[DFS_TEST_RADAR_PARAM] = 0;
9895 
9896 	wmi_ut.vdev_id = cpu_to_le32(arvif->vdev_id);
9897 	wmi_ut.module_id = cpu_to_le32(DFS_UNIT_TEST_MODULE);
9898 	wmi_ut.num_args = cpu_to_le32(DFS_MAX_TEST_ARGS);
9899 	wmi_ut.diag_token = cpu_to_le32(DFS_UNIT_TEST_TOKEN);
9900 
9901 	ath12k_dbg(ar->ab, ATH12K_DBG_REG, "Triggering Radar Simulation\n");
9902 
9903 	return ath12k_wmi_send_unit_test_cmd(ar, wmi_ut, dfs_args);
9904 }
9905 
ath12k_wmi_send_tpc_stats_request(struct ath12k * ar,enum wmi_halphy_ctrl_path_stats_id tpc_stats_type)9906 int ath12k_wmi_send_tpc_stats_request(struct ath12k *ar,
9907 				      enum wmi_halphy_ctrl_path_stats_id tpc_stats_type)
9908 {
9909 	struct wmi_request_halphy_ctrl_path_stats_cmd_fixed_params *cmd;
9910 	struct ath12k_wmi_pdev *wmi = ar->wmi;
9911 	struct sk_buff *skb;
9912 	struct wmi_tlv *tlv;
9913 	__le32 *pdev_id;
9914 	u32 buf_len;
9915 	void *ptr;
9916 	int ret;
9917 
9918 	buf_len = sizeof(*cmd) + TLV_HDR_SIZE + sizeof(u32) + TLV_HDR_SIZE + TLV_HDR_SIZE;
9919 
9920 	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, buf_len);
9921 	if (!skb)
9922 		return -ENOMEM;
9923 	cmd = (struct wmi_request_halphy_ctrl_path_stats_cmd_fixed_params *)skb->data;
9924 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_HALPHY_CTRL_PATH_CMD_FIXED_PARAM,
9925 						 sizeof(*cmd));
9926 
9927 	cmd->stats_id_mask = cpu_to_le32(WMI_REQ_CTRL_PATH_PDEV_TX_STAT);
9928 	cmd->action = cpu_to_le32(WMI_REQUEST_CTRL_PATH_STAT_GET);
9929 	cmd->subid = cpu_to_le32(tpc_stats_type);
9930 
9931 	ptr = skb->data + sizeof(*cmd);
9932 
9933 	/* The below TLV arrays optionally follow this fixed param TLV structure
9934 	 * 1. ARRAY_UINT32 pdev_ids[]
9935 	 *      If this array is present and non-zero length, stats should only
9936 	 *      be provided from the pdevs identified in the array.
9937 	 * 2. ARRAY_UNIT32 vdev_ids[]
9938 	 *      If this array is present and non-zero length, stats should only
9939 	 *      be provided from the vdevs identified in the array.
9940 	 * 3. ath12k_wmi_mac_addr_params peer_macaddr[];
9941 	 *      If this array is present and non-zero length, stats should only
9942 	 *      be provided from the peers with the MAC addresses specified
9943 	 *      in the array
9944 	 */
9945 	tlv = ptr;
9946 	tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, sizeof(u32));
9947 	ptr += TLV_HDR_SIZE;
9948 
9949 	pdev_id = ptr;
9950 	*pdev_id = cpu_to_le32(ath12k_mac_get_target_pdev_id(ar));
9951 	ptr += sizeof(*pdev_id);
9952 
9953 	tlv = ptr;
9954 	tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, 0);
9955 	ptr += TLV_HDR_SIZE;
9956 
9957 	tlv = ptr;
9958 	tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_FIXED_STRUCT, 0);
9959 	ptr += TLV_HDR_SIZE;
9960 
9961 	ret = ath12k_wmi_cmd_send(wmi, skb, WMI_REQUEST_HALPHY_CTRL_PATH_STATS_CMDID);
9962 	if (ret) {
9963 		ath12k_warn(ar->ab,
9964 			    "failed to submit WMI_REQUEST_STATS_CTRL_PATH_CMDID\n");
9965 		dev_kfree_skb(skb);
9966 		return ret;
9967 	}
9968 	ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "WMI get TPC STATS sent on pdev %d\n",
9969 		   ar->pdev->pdev_id);
9970 
9971 	return ret;
9972 }
9973 
ath12k_wmi_connect(struct ath12k_base * ab)9974 int ath12k_wmi_connect(struct ath12k_base *ab)
9975 {
9976 	u32 i;
9977 	u8 wmi_ep_count;
9978 
9979 	wmi_ep_count = ab->htc.wmi_ep_count;
9980 	if (wmi_ep_count > ab->hw_params->max_radios)
9981 		return -1;
9982 
9983 	for (i = 0; i < wmi_ep_count; i++)
9984 		ath12k_connect_pdev_htc_service(ab, i);
9985 
9986 	return 0;
9987 }
9988 
ath12k_wmi_pdev_detach(struct ath12k_base * ab,u8 pdev_id)9989 static void ath12k_wmi_pdev_detach(struct ath12k_base *ab, u8 pdev_id)
9990 {
9991 	if (WARN_ON(pdev_id >= MAX_RADIOS))
9992 		return;
9993 
9994 	/* TODO: Deinit any pdev specific wmi resource */
9995 }
9996 
ath12k_wmi_pdev_attach(struct ath12k_base * ab,u8 pdev_id)9997 int ath12k_wmi_pdev_attach(struct ath12k_base *ab,
9998 			   u8 pdev_id)
9999 {
10000 	struct ath12k_wmi_pdev *wmi_handle;
10001 
10002 	if (pdev_id >= ab->hw_params->max_radios)
10003 		return -EINVAL;
10004 
10005 	wmi_handle = &ab->wmi_ab.wmi[pdev_id];
10006 
10007 	wmi_handle->wmi_ab = &ab->wmi_ab;
10008 
10009 	ab->wmi_ab.ab = ab;
10010 	/* TODO: Init remaining resource specific to pdev */
10011 
10012 	return 0;
10013 }
10014 
ath12k_wmi_attach(struct ath12k_base * ab)10015 int ath12k_wmi_attach(struct ath12k_base *ab)
10016 {
10017 	int ret;
10018 
10019 	ret = ath12k_wmi_pdev_attach(ab, 0);
10020 	if (ret)
10021 		return ret;
10022 
10023 	ab->wmi_ab.ab = ab;
10024 	ab->wmi_ab.preferred_hw_mode = WMI_HOST_HW_MODE_MAX;
10025 
10026 	/* It's overwritten when service_ext_ready is handled */
10027 	if (ab->hw_params->single_pdev_only)
10028 		ab->wmi_ab.preferred_hw_mode = WMI_HOST_HW_MODE_SINGLE;
10029 
10030 	/* TODO: Init remaining wmi soc resources required */
10031 	init_completion(&ab->wmi_ab.service_ready);
10032 	init_completion(&ab->wmi_ab.unified_ready);
10033 
10034 	return 0;
10035 }
10036 
ath12k_wmi_detach(struct ath12k_base * ab)10037 void ath12k_wmi_detach(struct ath12k_base *ab)
10038 {
10039 	int i;
10040 
10041 	/* TODO: Deinit wmi resource specific to SOC as required */
10042 
10043 	for (i = 0; i < ab->htc.wmi_ep_count; i++)
10044 		ath12k_wmi_pdev_detach(ab, i);
10045 
10046 	ath12k_wmi_free_dbring_caps(ab);
10047 }
10048 
ath12k_wmi_hw_data_filter_cmd(struct ath12k * ar,struct wmi_hw_data_filter_arg * arg)10049 int ath12k_wmi_hw_data_filter_cmd(struct ath12k *ar, struct wmi_hw_data_filter_arg *arg)
10050 {
10051 	struct wmi_hw_data_filter_cmd *cmd;
10052 	struct sk_buff *skb;
10053 	int len;
10054 
10055 	len = sizeof(*cmd);
10056 	skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len);
10057 
10058 	if (!skb)
10059 		return -ENOMEM;
10060 
10061 	cmd = (struct wmi_hw_data_filter_cmd *)skb->data;
10062 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_HW_DATA_FILTER_CMD,
10063 						 sizeof(*cmd));
10064 	cmd->vdev_id = cpu_to_le32(arg->vdev_id);
10065 	cmd->enable = cpu_to_le32(arg->enable ? 1 : 0);
10066 
10067 	/* Set all modes in case of disable */
10068 	if (arg->enable)
10069 		cmd->hw_filter_bitmap = cpu_to_le32(arg->hw_filter_bitmap);
10070 	else
10071 		cmd->hw_filter_bitmap = cpu_to_le32((u32)~0U);
10072 
10073 	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
10074 		   "wmi hw data filter enable %d filter_bitmap 0x%x\n",
10075 		   arg->enable, arg->hw_filter_bitmap);
10076 
10077 	return ath12k_wmi_cmd_send(ar->wmi, skb, WMI_HW_DATA_FILTER_CMDID);
10078 }
10079 
ath12k_wmi_wow_host_wakeup_ind(struct ath12k * ar)10080 int ath12k_wmi_wow_host_wakeup_ind(struct ath12k *ar)
10081 {
10082 	struct wmi_wow_host_wakeup_cmd *cmd;
10083 	struct sk_buff *skb;
10084 	size_t len;
10085 
10086 	len = sizeof(*cmd);
10087 	skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len);
10088 	if (!skb)
10089 		return -ENOMEM;
10090 
10091 	cmd = (struct wmi_wow_host_wakeup_cmd *)skb->data;
10092 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_WOW_HOSTWAKEUP_FROM_SLEEP_CMD,
10093 						 sizeof(*cmd));
10094 
10095 	ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "wmi tlv wow host wakeup ind\n");
10096 
10097 	return ath12k_wmi_cmd_send(ar->wmi, skb, WMI_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID);
10098 }
10099 
ath12k_wmi_wow_enable(struct ath12k * ar)10100 int ath12k_wmi_wow_enable(struct ath12k *ar)
10101 {
10102 	struct wmi_wow_enable_cmd *cmd;
10103 	struct sk_buff *skb;
10104 	int len;
10105 
10106 	len = sizeof(*cmd);
10107 	skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len);
10108 	if (!skb)
10109 		return -ENOMEM;
10110 
10111 	cmd = (struct wmi_wow_enable_cmd *)skb->data;
10112 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_WOW_ENABLE_CMD,
10113 						 sizeof(*cmd));
10114 
10115 	cmd->enable = cpu_to_le32(1);
10116 	cmd->pause_iface_config = cpu_to_le32(WOW_IFACE_PAUSE_ENABLED);
10117 	ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "wmi tlv wow enable\n");
10118 
10119 	return ath12k_wmi_cmd_send(ar->wmi, skb, WMI_WOW_ENABLE_CMDID);
10120 }
10121 
ath12k_wmi_wow_add_wakeup_event(struct ath12k * ar,u32 vdev_id,enum wmi_wow_wakeup_event event,u32 enable)10122 int ath12k_wmi_wow_add_wakeup_event(struct ath12k *ar, u32 vdev_id,
10123 				    enum wmi_wow_wakeup_event event,
10124 				    u32 enable)
10125 {
10126 	struct wmi_wow_add_del_event_cmd *cmd;
10127 	struct sk_buff *skb;
10128 	size_t len;
10129 
10130 	len = sizeof(*cmd);
10131 	skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len);
10132 	if (!skb)
10133 		return -ENOMEM;
10134 
10135 	cmd = (struct wmi_wow_add_del_event_cmd *)skb->data;
10136 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_WOW_ADD_DEL_EVT_CMD,
10137 						 sizeof(*cmd));
10138 	cmd->vdev_id = cpu_to_le32(vdev_id);
10139 	cmd->is_add = cpu_to_le32(enable);
10140 	cmd->event_bitmap = cpu_to_le32((1 << event));
10141 
10142 	ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "wmi tlv wow add wakeup event %s enable %d vdev_id %d\n",
10143 		   wow_wakeup_event(event), enable, vdev_id);
10144 
10145 	return ath12k_wmi_cmd_send(ar->wmi, skb, WMI_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID);
10146 }
10147 
ath12k_wmi_wow_add_pattern(struct ath12k * ar,u32 vdev_id,u32 pattern_id,const u8 * pattern,const u8 * mask,int pattern_len,int pattern_offset)10148 int ath12k_wmi_wow_add_pattern(struct ath12k *ar, u32 vdev_id, u32 pattern_id,
10149 			       const u8 *pattern, const u8 *mask,
10150 			       int pattern_len, int pattern_offset)
10151 {
10152 	struct wmi_wow_add_pattern_cmd *cmd;
10153 	struct wmi_wow_bitmap_pattern_params *bitmap;
10154 	struct wmi_tlv *tlv;
10155 	struct sk_buff *skb;
10156 	void *ptr;
10157 	size_t len;
10158 
10159 	len = sizeof(*cmd) +
10160 	      sizeof(*tlv) +			/* array struct */
10161 	      sizeof(*bitmap) +			/* bitmap */
10162 	      sizeof(*tlv) +			/* empty ipv4 sync */
10163 	      sizeof(*tlv) +			/* empty ipv6 sync */
10164 	      sizeof(*tlv) +			/* empty magic */
10165 	      sizeof(*tlv) +			/* empty info timeout */
10166 	      sizeof(*tlv) + sizeof(u32);	/* ratelimit interval */
10167 
10168 	skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len);
10169 	if (!skb)
10170 		return -ENOMEM;
10171 
10172 	/* cmd */
10173 	ptr = skb->data;
10174 	cmd = ptr;
10175 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_WOW_ADD_PATTERN_CMD,
10176 						 sizeof(*cmd));
10177 	cmd->vdev_id = cpu_to_le32(vdev_id);
10178 	cmd->pattern_id = cpu_to_le32(pattern_id);
10179 	cmd->pattern_type = cpu_to_le32(WOW_BITMAP_PATTERN);
10180 
10181 	ptr += sizeof(*cmd);
10182 
10183 	/* bitmap */
10184 	tlv = ptr;
10185 	tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, sizeof(*bitmap));
10186 
10187 	ptr += sizeof(*tlv);
10188 
10189 	bitmap = ptr;
10190 	bitmap->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_WOW_BITMAP_PATTERN_T,
10191 						    sizeof(*bitmap));
10192 	memcpy(bitmap->patternbuf, pattern, pattern_len);
10193 	memcpy(bitmap->bitmaskbuf, mask, pattern_len);
10194 	bitmap->pattern_offset = cpu_to_le32(pattern_offset);
10195 	bitmap->pattern_len = cpu_to_le32(pattern_len);
10196 	bitmap->bitmask_len = cpu_to_le32(pattern_len);
10197 	bitmap->pattern_id = cpu_to_le32(pattern_id);
10198 
10199 	ptr += sizeof(*bitmap);
10200 
10201 	/* ipv4 sync */
10202 	tlv = ptr;
10203 	tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, 0);
10204 
10205 	ptr += sizeof(*tlv);
10206 
10207 	/* ipv6 sync */
10208 	tlv = ptr;
10209 	tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, 0);
10210 
10211 	ptr += sizeof(*tlv);
10212 
10213 	/* magic */
10214 	tlv = ptr;
10215 	tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, 0);
10216 
10217 	ptr += sizeof(*tlv);
10218 
10219 	/* pattern info timeout */
10220 	tlv = ptr;
10221 	tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, 0);
10222 
10223 	ptr += sizeof(*tlv);
10224 
10225 	/* ratelimit interval */
10226 	tlv = ptr;
10227 	tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, sizeof(u32));
10228 
10229 	ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "wmi tlv wow add pattern vdev_id %d pattern_id %d pattern_offset %d pattern_len %d\n",
10230 		   vdev_id, pattern_id, pattern_offset, pattern_len);
10231 
10232 	ath12k_dbg_dump(ar->ab, ATH12K_DBG_WMI, NULL, "wow pattern: ",
10233 			bitmap->patternbuf, pattern_len);
10234 	ath12k_dbg_dump(ar->ab, ATH12K_DBG_WMI, NULL, "wow bitmask: ",
10235 			bitmap->bitmaskbuf, pattern_len);
10236 
10237 	return ath12k_wmi_cmd_send(ar->wmi, skb, WMI_WOW_ADD_WAKE_PATTERN_CMDID);
10238 }
10239 
ath12k_wmi_wow_del_pattern(struct ath12k * ar,u32 vdev_id,u32 pattern_id)10240 int ath12k_wmi_wow_del_pattern(struct ath12k *ar, u32 vdev_id, u32 pattern_id)
10241 {
10242 	struct wmi_wow_del_pattern_cmd *cmd;
10243 	struct sk_buff *skb;
10244 	size_t len;
10245 
10246 	len = sizeof(*cmd);
10247 	skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len);
10248 	if (!skb)
10249 		return -ENOMEM;
10250 
10251 	cmd = (struct wmi_wow_del_pattern_cmd *)skb->data;
10252 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_WOW_DEL_PATTERN_CMD,
10253 						 sizeof(*cmd));
10254 	cmd->vdev_id = cpu_to_le32(vdev_id);
10255 	cmd->pattern_id = cpu_to_le32(pattern_id);
10256 	cmd->pattern_type = cpu_to_le32(WOW_BITMAP_PATTERN);
10257 
10258 	ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "wmi tlv wow del pattern vdev_id %d pattern_id %d\n",
10259 		   vdev_id, pattern_id);
10260 
10261 	return ath12k_wmi_cmd_send(ar->wmi, skb, WMI_WOW_DEL_WAKE_PATTERN_CMDID);
10262 }
10263 
10264 static struct sk_buff *
ath12k_wmi_op_gen_config_pno_start(struct ath12k * ar,u32 vdev_id,struct wmi_pno_scan_req_arg * pno)10265 ath12k_wmi_op_gen_config_pno_start(struct ath12k *ar, u32 vdev_id,
10266 				   struct wmi_pno_scan_req_arg *pno)
10267 {
10268 	struct nlo_configured_params *nlo_list;
10269 	size_t len, nlo_list_len, channel_list_len;
10270 	struct wmi_wow_nlo_config_cmd *cmd;
10271 	__le32 *channel_list;
10272 	struct wmi_tlv *tlv;
10273 	struct sk_buff *skb;
10274 	void *ptr;
10275 	u32 i;
10276 
10277 	len = sizeof(*cmd) +
10278 	      sizeof(*tlv) +
10279 	      /* TLV place holder for array of structures
10280 	       * nlo_configured_params(nlo_list)
10281 	       */
10282 	      sizeof(*tlv);
10283 	      /* TLV place holder for array of uint32 channel_list */
10284 
10285 	channel_list_len = sizeof(u32) * pno->a_networks[0].channel_count;
10286 	len += channel_list_len;
10287 
10288 	nlo_list_len = sizeof(*nlo_list) * pno->uc_networks_count;
10289 	len += nlo_list_len;
10290 
10291 	skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len);
10292 	if (!skb)
10293 		return ERR_PTR(-ENOMEM);
10294 
10295 	ptr = skb->data;
10296 	cmd = ptr;
10297 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_NLO_CONFIG_CMD, sizeof(*cmd));
10298 
10299 	cmd->vdev_id = cpu_to_le32(pno->vdev_id);
10300 	cmd->flags = cpu_to_le32(WMI_NLO_CONFIG_START | WMI_NLO_CONFIG_SSID_HIDE_EN);
10301 
10302 	/* current FW does not support min-max range for dwell time */
10303 	cmd->active_dwell_time = cpu_to_le32(pno->active_max_time);
10304 	cmd->passive_dwell_time = cpu_to_le32(pno->passive_max_time);
10305 
10306 	if (pno->do_passive_scan)
10307 		cmd->flags |= cpu_to_le32(WMI_NLO_CONFIG_SCAN_PASSIVE);
10308 
10309 	cmd->fast_scan_period = cpu_to_le32(pno->fast_scan_period);
10310 	cmd->slow_scan_period = cpu_to_le32(pno->slow_scan_period);
10311 	cmd->fast_scan_max_cycles = cpu_to_le32(pno->fast_scan_max_cycles);
10312 	cmd->delay_start_time = cpu_to_le32(pno->delay_start_time);
10313 
10314 	if (pno->enable_pno_scan_randomization) {
10315 		cmd->flags |= cpu_to_le32(WMI_NLO_CONFIG_SPOOFED_MAC_IN_PROBE_REQ |
10316 					  WMI_NLO_CONFIG_RANDOM_SEQ_NO_IN_PROBE_REQ);
10317 		ether_addr_copy(cmd->mac_addr.addr, pno->mac_addr);
10318 		ether_addr_copy(cmd->mac_mask.addr, pno->mac_addr_mask);
10319 	}
10320 
10321 	ptr += sizeof(*cmd);
10322 
10323 	/* nlo_configured_params(nlo_list) */
10324 	cmd->no_of_ssids = cpu_to_le32(pno->uc_networks_count);
10325 	tlv = ptr;
10326 	tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, nlo_list_len);
10327 
10328 	ptr += sizeof(*tlv);
10329 	nlo_list = ptr;
10330 	for (i = 0; i < pno->uc_networks_count; i++) {
10331 		tlv = (struct wmi_tlv *)(&nlo_list[i].tlv_header);
10332 		tlv->header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ARRAY_BYTE,
10333 						     sizeof(*nlo_list));
10334 
10335 		nlo_list[i].ssid.valid = cpu_to_le32(1);
10336 		nlo_list[i].ssid.ssid.ssid_len =
10337 			cpu_to_le32(pno->a_networks[i].ssid.ssid_len);
10338 		memcpy(nlo_list[i].ssid.ssid.ssid,
10339 		       pno->a_networks[i].ssid.ssid,
10340 		       le32_to_cpu(nlo_list[i].ssid.ssid.ssid_len));
10341 
10342 		if (pno->a_networks[i].rssi_threshold &&
10343 		    pno->a_networks[i].rssi_threshold > -300) {
10344 			nlo_list[i].rssi_cond.valid = cpu_to_le32(1);
10345 			nlo_list[i].rssi_cond.rssi =
10346 					cpu_to_le32(pno->a_networks[i].rssi_threshold);
10347 		}
10348 
10349 		nlo_list[i].bcast_nw_type.valid = cpu_to_le32(1);
10350 		nlo_list[i].bcast_nw_type.bcast_nw_type =
10351 					cpu_to_le32(pno->a_networks[i].bcast_nw_type);
10352 	}
10353 
10354 	ptr += nlo_list_len;
10355 	cmd->num_of_channels = cpu_to_le32(pno->a_networks[0].channel_count);
10356 	tlv = ptr;
10357 	tlv->header =  ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, channel_list_len);
10358 	ptr += sizeof(*tlv);
10359 	channel_list = ptr;
10360 
10361 	for (i = 0; i < pno->a_networks[0].channel_count; i++)
10362 		channel_list[i] = cpu_to_le32(pno->a_networks[0].channels[i]);
10363 
10364 	ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "wmi tlv start pno config vdev_id %d\n",
10365 		   vdev_id);
10366 
10367 	return skb;
10368 }
10369 
ath12k_wmi_op_gen_config_pno_stop(struct ath12k * ar,u32 vdev_id)10370 static struct sk_buff *ath12k_wmi_op_gen_config_pno_stop(struct ath12k *ar,
10371 							 u32 vdev_id)
10372 {
10373 	struct wmi_wow_nlo_config_cmd *cmd;
10374 	struct sk_buff *skb;
10375 	size_t len;
10376 
10377 	len = sizeof(*cmd);
10378 	skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len);
10379 	if (!skb)
10380 		return ERR_PTR(-ENOMEM);
10381 
10382 	cmd = (struct wmi_wow_nlo_config_cmd *)skb->data;
10383 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_NLO_CONFIG_CMD, len);
10384 
10385 	cmd->vdev_id = cpu_to_le32(vdev_id);
10386 	cmd->flags = cpu_to_le32(WMI_NLO_CONFIG_STOP);
10387 
10388 	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
10389 		   "wmi tlv stop pno config vdev_id %d\n", vdev_id);
10390 	return skb;
10391 }
10392 
ath12k_wmi_wow_config_pno(struct ath12k * ar,u32 vdev_id,struct wmi_pno_scan_req_arg * pno_scan)10393 int ath12k_wmi_wow_config_pno(struct ath12k *ar, u32 vdev_id,
10394 			      struct wmi_pno_scan_req_arg  *pno_scan)
10395 {
10396 	struct sk_buff *skb;
10397 
10398 	if (pno_scan->enable)
10399 		skb = ath12k_wmi_op_gen_config_pno_start(ar, vdev_id, pno_scan);
10400 	else
10401 		skb = ath12k_wmi_op_gen_config_pno_stop(ar, vdev_id);
10402 
10403 	if (IS_ERR_OR_NULL(skb))
10404 		return -ENOMEM;
10405 
10406 	return ath12k_wmi_cmd_send(ar->wmi, skb, WMI_NETWORK_LIST_OFFLOAD_CONFIG_CMDID);
10407 }
10408 
ath12k_wmi_fill_ns_offload(struct ath12k * ar,struct wmi_arp_ns_offload_arg * offload,void ** ptr,bool enable,bool ext)10409 static void ath12k_wmi_fill_ns_offload(struct ath12k *ar,
10410 				       struct wmi_arp_ns_offload_arg *offload,
10411 				       void **ptr,
10412 				       bool enable,
10413 				       bool ext)
10414 {
10415 	struct wmi_ns_offload_params *ns;
10416 	struct wmi_tlv *tlv;
10417 	void *buf_ptr = *ptr;
10418 	u32 ns_cnt, ns_ext_tuples;
10419 	int i, max_offloads;
10420 
10421 	ns_cnt = offload->ipv6_count;
10422 
10423 	tlv  = buf_ptr;
10424 
10425 	if (ext) {
10426 		ns_ext_tuples = offload->ipv6_count - WMI_MAX_NS_OFFLOADS;
10427 		tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT,
10428 						 ns_ext_tuples * sizeof(*ns));
10429 		i = WMI_MAX_NS_OFFLOADS;
10430 		max_offloads = offload->ipv6_count;
10431 	} else {
10432 		tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT,
10433 						 WMI_MAX_NS_OFFLOADS * sizeof(*ns));
10434 		i = 0;
10435 		max_offloads = WMI_MAX_NS_OFFLOADS;
10436 	}
10437 
10438 	buf_ptr += sizeof(*tlv);
10439 
10440 	for (; i < max_offloads; i++) {
10441 		ns = buf_ptr;
10442 		ns->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_NS_OFFLOAD_TUPLE,
10443 							sizeof(*ns));
10444 
10445 		if (enable) {
10446 			if (i < ns_cnt)
10447 				ns->flags |= cpu_to_le32(WMI_NSOL_FLAGS_VALID);
10448 
10449 			memcpy(ns->target_ipaddr[0], offload->ipv6_addr[i], 16);
10450 			memcpy(ns->solicitation_ipaddr, offload->self_ipv6_addr[i], 16);
10451 
10452 			if (offload->ipv6_type[i])
10453 				ns->flags |= cpu_to_le32(WMI_NSOL_FLAGS_IS_IPV6_ANYCAST);
10454 
10455 			memcpy(ns->target_mac.addr, offload->mac_addr, ETH_ALEN);
10456 
10457 			if (!is_zero_ether_addr(ns->target_mac.addr))
10458 				ns->flags |= cpu_to_le32(WMI_NSOL_FLAGS_MAC_VALID);
10459 
10460 			ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
10461 				   "wmi index %d ns_solicited %pI6 target %pI6",
10462 				   i, ns->solicitation_ipaddr,
10463 				   ns->target_ipaddr[0]);
10464 		}
10465 
10466 		buf_ptr += sizeof(*ns);
10467 	}
10468 
10469 	*ptr = buf_ptr;
10470 }
10471 
ath12k_wmi_fill_arp_offload(struct ath12k * ar,struct wmi_arp_ns_offload_arg * offload,void ** ptr,bool enable)10472 static void ath12k_wmi_fill_arp_offload(struct ath12k *ar,
10473 					struct wmi_arp_ns_offload_arg *offload,
10474 					void **ptr,
10475 					bool enable)
10476 {
10477 	struct wmi_arp_offload_params *arp;
10478 	struct wmi_tlv *tlv;
10479 	void *buf_ptr = *ptr;
10480 	int i;
10481 
10482 	/* fill arp tuple */
10483 	tlv = buf_ptr;
10484 	tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT,
10485 					 WMI_MAX_ARP_OFFLOADS * sizeof(*arp));
10486 	buf_ptr += sizeof(*tlv);
10487 
10488 	for (i = 0; i < WMI_MAX_ARP_OFFLOADS; i++) {
10489 		arp = buf_ptr;
10490 		arp->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ARP_OFFLOAD_TUPLE,
10491 							 sizeof(*arp));
10492 
10493 		if (enable && i < offload->ipv4_count) {
10494 			/* Copy the target ip addr and flags */
10495 			arp->flags = cpu_to_le32(WMI_ARPOL_FLAGS_VALID);
10496 			memcpy(arp->target_ipaddr, offload->ipv4_addr[i], 4);
10497 
10498 			ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "wmi arp offload address %pI4",
10499 				   arp->target_ipaddr);
10500 		}
10501 
10502 		buf_ptr += sizeof(*arp);
10503 	}
10504 
10505 	*ptr = buf_ptr;
10506 }
10507 
ath12k_wmi_arp_ns_offload(struct ath12k * ar,struct ath12k_link_vif * arvif,struct wmi_arp_ns_offload_arg * offload,bool enable)10508 int ath12k_wmi_arp_ns_offload(struct ath12k *ar,
10509 			      struct ath12k_link_vif *arvif,
10510 			      struct wmi_arp_ns_offload_arg *offload,
10511 			      bool enable)
10512 {
10513 	struct wmi_set_arp_ns_offload_cmd *cmd;
10514 	struct wmi_tlv *tlv;
10515 	struct sk_buff *skb;
10516 	void *buf_ptr;
10517 	size_t len;
10518 	u8 ns_cnt, ns_ext_tuples = 0;
10519 
10520 	ns_cnt = offload->ipv6_count;
10521 
10522 	len = sizeof(*cmd) +
10523 	      sizeof(*tlv) +
10524 	      WMI_MAX_NS_OFFLOADS * sizeof(struct wmi_ns_offload_params) +
10525 	      sizeof(*tlv) +
10526 	      WMI_MAX_ARP_OFFLOADS * sizeof(struct wmi_arp_offload_params);
10527 
10528 	if (ns_cnt > WMI_MAX_NS_OFFLOADS) {
10529 		ns_ext_tuples = ns_cnt - WMI_MAX_NS_OFFLOADS;
10530 		len += sizeof(*tlv) +
10531 		       ns_ext_tuples * sizeof(struct wmi_ns_offload_params);
10532 	}
10533 
10534 	skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len);
10535 	if (!skb)
10536 		return -ENOMEM;
10537 
10538 	buf_ptr = skb->data;
10539 	cmd = buf_ptr;
10540 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_SET_ARP_NS_OFFLOAD_CMD,
10541 						 sizeof(*cmd));
10542 	cmd->flags = cpu_to_le32(0);
10543 	cmd->vdev_id = cpu_to_le32(arvif->vdev_id);
10544 	cmd->num_ns_ext_tuples = cpu_to_le32(ns_ext_tuples);
10545 
10546 	buf_ptr += sizeof(*cmd);
10547 
10548 	ath12k_wmi_fill_ns_offload(ar, offload, &buf_ptr, enable, 0);
10549 	ath12k_wmi_fill_arp_offload(ar, offload, &buf_ptr, enable);
10550 
10551 	if (ns_ext_tuples)
10552 		ath12k_wmi_fill_ns_offload(ar, offload, &buf_ptr, enable, 1);
10553 
10554 	return ath12k_wmi_cmd_send(ar->wmi, skb, WMI_SET_ARP_NS_OFFLOAD_CMDID);
10555 }
10556 
ath12k_wmi_gtk_rekey_offload(struct ath12k * ar,struct ath12k_link_vif * arvif,bool enable)10557 int ath12k_wmi_gtk_rekey_offload(struct ath12k *ar,
10558 				 struct ath12k_link_vif *arvif, bool enable)
10559 {
10560 	struct ath12k_rekey_data *rekey_data = &arvif->rekey_data;
10561 	struct wmi_gtk_rekey_offload_cmd *cmd;
10562 	struct sk_buff *skb;
10563 	__le64 replay_ctr;
10564 	int len;
10565 
10566 	len = sizeof(*cmd);
10567 	skb =  ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len);
10568 	if (!skb)
10569 		return -ENOMEM;
10570 
10571 	cmd = (struct wmi_gtk_rekey_offload_cmd *)skb->data;
10572 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_GTK_OFFLOAD_CMD, sizeof(*cmd));
10573 	cmd->vdev_id = cpu_to_le32(arvif->vdev_id);
10574 
10575 	if (enable) {
10576 		cmd->flags = cpu_to_le32(GTK_OFFLOAD_ENABLE_OPCODE);
10577 
10578 		/* the length in rekey_data and cmd is equal */
10579 		memcpy(cmd->kck, rekey_data->kck, sizeof(cmd->kck));
10580 		memcpy(cmd->kek, rekey_data->kek, sizeof(cmd->kek));
10581 
10582 		replay_ctr = cpu_to_le64(rekey_data->replay_ctr);
10583 		memcpy(cmd->replay_ctr, &replay_ctr,
10584 		       sizeof(replay_ctr));
10585 	} else {
10586 		cmd->flags = cpu_to_le32(GTK_OFFLOAD_DISABLE_OPCODE);
10587 	}
10588 
10589 	ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "offload gtk rekey vdev: %d %d\n",
10590 		   arvif->vdev_id, enable);
10591 	return ath12k_wmi_cmd_send(ar->wmi, skb, WMI_GTK_OFFLOAD_CMDID);
10592 }
10593 
ath12k_wmi_gtk_rekey_getinfo(struct ath12k * ar,struct ath12k_link_vif * arvif)10594 int ath12k_wmi_gtk_rekey_getinfo(struct ath12k *ar,
10595 				 struct ath12k_link_vif *arvif)
10596 {
10597 	struct wmi_gtk_rekey_offload_cmd *cmd;
10598 	struct sk_buff *skb;
10599 	int len;
10600 
10601 	len = sizeof(*cmd);
10602 	skb =  ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len);
10603 	if (!skb)
10604 		return -ENOMEM;
10605 
10606 	cmd = (struct wmi_gtk_rekey_offload_cmd *)skb->data;
10607 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_GTK_OFFLOAD_CMD, sizeof(*cmd));
10608 	cmd->vdev_id = cpu_to_le32(arvif->vdev_id);
10609 	cmd->flags = cpu_to_le32(GTK_OFFLOAD_REQUEST_STATUS_OPCODE);
10610 
10611 	ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "get gtk rekey vdev_id: %d\n",
10612 		   arvif->vdev_id);
10613 	return ath12k_wmi_cmd_send(ar->wmi, skb, WMI_GTK_OFFLOAD_CMDID);
10614 }
10615 
ath12k_wmi_sta_keepalive(struct ath12k * ar,const struct wmi_sta_keepalive_arg * arg)10616 int ath12k_wmi_sta_keepalive(struct ath12k *ar,
10617 			     const struct wmi_sta_keepalive_arg *arg)
10618 {
10619 	struct wmi_sta_keepalive_arp_resp_params *arp;
10620 	struct ath12k_wmi_pdev *wmi = ar->wmi;
10621 	struct wmi_sta_keepalive_cmd *cmd;
10622 	struct sk_buff *skb;
10623 	size_t len;
10624 
10625 	len = sizeof(*cmd) + sizeof(*arp);
10626 	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
10627 	if (!skb)
10628 		return -ENOMEM;
10629 
10630 	cmd = (struct wmi_sta_keepalive_cmd *)skb->data;
10631 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_STA_KEEPALIVE_CMD, sizeof(*cmd));
10632 	cmd->vdev_id = cpu_to_le32(arg->vdev_id);
10633 	cmd->enabled = cpu_to_le32(arg->enabled);
10634 	cmd->interval = cpu_to_le32(arg->interval);
10635 	cmd->method = cpu_to_le32(arg->method);
10636 
10637 	arp = (struct wmi_sta_keepalive_arp_resp_params *)(cmd + 1);
10638 	arp->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_STA_KEEPALVE_ARP_RESPONSE,
10639 						 sizeof(*arp));
10640 	if (arg->method == WMI_STA_KEEPALIVE_METHOD_UNSOLICITED_ARP_RESPONSE ||
10641 	    arg->method == WMI_STA_KEEPALIVE_METHOD_GRATUITOUS_ARP_REQUEST) {
10642 		arp->src_ip4_addr = cpu_to_le32(arg->src_ip4_addr);
10643 		arp->dest_ip4_addr = cpu_to_le32(arg->dest_ip4_addr);
10644 		ether_addr_copy(arp->dest_mac_addr.addr, arg->dest_mac_addr);
10645 	}
10646 
10647 	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
10648 		   "wmi sta keepalive vdev %d enabled %d method %d interval %d\n",
10649 		   arg->vdev_id, arg->enabled, arg->method, arg->interval);
10650 
10651 	return ath12k_wmi_cmd_send(wmi, skb, WMI_STA_KEEPALIVE_CMDID);
10652 }
10653 
ath12k_wmi_mlo_setup(struct ath12k * ar,struct wmi_mlo_setup_arg * mlo_params)10654 int ath12k_wmi_mlo_setup(struct ath12k *ar, struct wmi_mlo_setup_arg *mlo_params)
10655 {
10656 	struct wmi_mlo_setup_cmd *cmd;
10657 	struct ath12k_wmi_pdev *wmi = ar->wmi;
10658 	u32 *partner_links, num_links;
10659 	int i, ret, buf_len, arg_len;
10660 	struct sk_buff *skb;
10661 	struct wmi_tlv *tlv;
10662 	void *ptr;
10663 
10664 	num_links = mlo_params->num_partner_links;
10665 	arg_len = num_links * sizeof(u32);
10666 	buf_len = sizeof(*cmd) + TLV_HDR_SIZE + arg_len;
10667 
10668 	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, buf_len);
10669 	if (!skb)
10670 		return -ENOMEM;
10671 
10672 	cmd = (struct wmi_mlo_setup_cmd *)skb->data;
10673 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_MLO_SETUP_CMD,
10674 						 sizeof(*cmd));
10675 	cmd->mld_group_id = mlo_params->group_id;
10676 	cmd->pdev_id = cpu_to_le32(ar->pdev->pdev_id);
10677 	ptr = skb->data + sizeof(*cmd);
10678 
10679 	tlv = ptr;
10680 	tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, arg_len);
10681 	ptr += TLV_HDR_SIZE;
10682 
10683 	partner_links = ptr;
10684 	for (i = 0; i < num_links; i++)
10685 		partner_links[i] = mlo_params->partner_link_id[i];
10686 
10687 	ret = ath12k_wmi_cmd_send(wmi, skb, WMI_MLO_SETUP_CMDID);
10688 	if (ret) {
10689 		ath12k_warn(ar->ab, "failed to submit WMI_MLO_SETUP_CMDID command: %d\n",
10690 			    ret);
10691 		dev_kfree_skb(skb);
10692 		return ret;
10693 	}
10694 
10695 	return 0;
10696 }
10697 
ath12k_wmi_mlo_ready(struct ath12k * ar)10698 int ath12k_wmi_mlo_ready(struct ath12k *ar)
10699 {
10700 	struct wmi_mlo_ready_cmd *cmd;
10701 	struct ath12k_wmi_pdev *wmi = ar->wmi;
10702 	struct sk_buff *skb;
10703 	int ret, len;
10704 
10705 	len = sizeof(*cmd);
10706 	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
10707 	if (!skb)
10708 		return -ENOMEM;
10709 
10710 	cmd = (struct wmi_mlo_ready_cmd *)skb->data;
10711 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_MLO_READY_CMD,
10712 						 sizeof(*cmd));
10713 	cmd->pdev_id = cpu_to_le32(ar->pdev->pdev_id);
10714 
10715 	ret = ath12k_wmi_cmd_send(wmi, skb, WMI_MLO_READY_CMDID);
10716 	if (ret) {
10717 		ath12k_warn(ar->ab, "failed to submit WMI_MLO_READY_CMDID command: %d\n",
10718 			    ret);
10719 		dev_kfree_skb(skb);
10720 		return ret;
10721 	}
10722 
10723 	return 0;
10724 }
10725 
ath12k_wmi_mlo_teardown(struct ath12k * ar)10726 int ath12k_wmi_mlo_teardown(struct ath12k *ar)
10727 {
10728 	struct wmi_mlo_teardown_cmd *cmd;
10729 	struct ath12k_wmi_pdev *wmi = ar->wmi;
10730 	struct sk_buff *skb;
10731 	int ret, len;
10732 
10733 	len = sizeof(*cmd);
10734 	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
10735 	if (!skb)
10736 		return -ENOMEM;
10737 
10738 	cmd = (struct wmi_mlo_teardown_cmd *)skb->data;
10739 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_MLO_TEARDOWN_CMD,
10740 						 sizeof(*cmd));
10741 	cmd->pdev_id = cpu_to_le32(ar->pdev->pdev_id);
10742 	cmd->reason_code = WMI_MLO_TEARDOWN_SSR_REASON;
10743 
10744 	ret = ath12k_wmi_cmd_send(wmi, skb, WMI_MLO_TEARDOWN_CMDID);
10745 	if (ret) {
10746 		ath12k_warn(ar->ab, "failed to submit WMI MLO teardown command: %d\n",
10747 			    ret);
10748 		dev_kfree_skb(skb);
10749 		return ret;
10750 	}
10751 
10752 	return 0;
10753 }
10754 
ath12k_wmi_supports_6ghz_cc_ext(struct ath12k * ar)10755 bool ath12k_wmi_supports_6ghz_cc_ext(struct ath12k *ar)
10756 {
10757 	return test_bit(WMI_TLV_SERVICE_REG_CC_EXT_EVENT_SUPPORT,
10758 			ar->ab->wmi_ab.svc_map) && ar->supports_6ghz;
10759 }
10760 
ath12k_wmi_send_vdev_set_tpc_power(struct ath12k * ar,u32 vdev_id,struct ath12k_reg_tpc_power_info * param)10761 int ath12k_wmi_send_vdev_set_tpc_power(struct ath12k *ar,
10762 				       u32 vdev_id,
10763 				       struct ath12k_reg_tpc_power_info *param)
10764 {
10765 	struct wmi_vdev_set_tpc_power_cmd *cmd;
10766 	struct ath12k_wmi_pdev *wmi = ar->wmi;
10767 	struct wmi_vdev_ch_power_params *ch;
10768 	int i, ret, len, array_len;
10769 	struct sk_buff *skb;
10770 	struct wmi_tlv *tlv;
10771 	u8 *ptr;
10772 
10773 	array_len = sizeof(*ch) * param->num_pwr_levels;
10774 	len = sizeof(*cmd) + TLV_HDR_SIZE + array_len;
10775 
10776 	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
10777 	if (!skb)
10778 		return -ENOMEM;
10779 
10780 	ptr = skb->data;
10781 
10782 	cmd = (struct wmi_vdev_set_tpc_power_cmd *)ptr;
10783 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_SET_TPC_POWER_CMD,
10784 						 sizeof(*cmd));
10785 	cmd->vdev_id = cpu_to_le32(vdev_id);
10786 	cmd->psd_power = cpu_to_le32(param->is_psd_power);
10787 	cmd->eirp_power = cpu_to_le32(param->eirp_power);
10788 	cmd->power_type_6ghz = cpu_to_le32(param->ap_power_type);
10789 
10790 	ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
10791 		   "tpc vdev id %d is psd power %d eirp power %d 6 ghz power type %d\n",
10792 		   vdev_id, param->is_psd_power, param->eirp_power, param->ap_power_type);
10793 
10794 	ptr += sizeof(*cmd);
10795 	tlv = (struct wmi_tlv *)ptr;
10796 	tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, array_len);
10797 
10798 	ptr += TLV_HDR_SIZE;
10799 	ch = (struct wmi_vdev_ch_power_params *)ptr;
10800 
10801 	for (i = 0; i < param->num_pwr_levels; i++, ch++) {
10802 		ch->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_CH_POWER_INFO,
10803 							sizeof(*ch));
10804 		ch->chan_cfreq = cpu_to_le32(param->chan_power_info[i].chan_cfreq);
10805 		ch->tx_power = cpu_to_le32(param->chan_power_info[i].tx_power);
10806 
10807 		ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "tpc chan freq %d TX power %d\n",
10808 			   ch->chan_cfreq, ch->tx_power);
10809 	}
10810 
10811 	ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_SET_TPC_POWER_CMDID);
10812 	if (ret) {
10813 		ath12k_warn(ar->ab, "failed to send WMI_VDEV_SET_TPC_POWER_CMDID\n");
10814 		dev_kfree_skb(skb);
10815 		return ret;
10816 	}
10817 
10818 	return 0;
10819 }
10820 
10821 static int
ath12k_wmi_fill_disallowed_bmap(struct ath12k_base * ab,struct wmi_disallowed_mlo_mode_bitmap_params * dislw_bmap,struct wmi_mlo_link_set_active_arg * arg)10822 ath12k_wmi_fill_disallowed_bmap(struct ath12k_base *ab,
10823 				struct wmi_disallowed_mlo_mode_bitmap_params *dislw_bmap,
10824 				struct wmi_mlo_link_set_active_arg *arg)
10825 {
10826 	struct wmi_ml_disallow_mode_bmap_arg *dislw_bmap_arg;
10827 	u8 i;
10828 
10829 	if (arg->num_disallow_mode_comb >
10830 	    ARRAY_SIZE(arg->disallow_bmap)) {
10831 		ath12k_warn(ab, "invalid num_disallow_mode_comb: %d",
10832 			    arg->num_disallow_mode_comb);
10833 		return -EINVAL;
10834 	}
10835 
10836 	dislw_bmap_arg = &arg->disallow_bmap[0];
10837 	for (i = 0; i < arg->num_disallow_mode_comb; i++) {
10838 		dislw_bmap->tlv_header =
10839 				ath12k_wmi_tlv_cmd_hdr(0, sizeof(*dislw_bmap));
10840 		dislw_bmap->disallowed_mode_bitmap =
10841 				cpu_to_le32(dislw_bmap_arg->disallowed_mode);
10842 		dislw_bmap->ieee_link_id_comb =
10843 			le32_encode_bits(dislw_bmap_arg->ieee_link_id[0],
10844 					 WMI_DISALW_MLO_MODE_BMAP_IEEE_LINK_ID_COMB_1) |
10845 			le32_encode_bits(dislw_bmap_arg->ieee_link_id[1],
10846 					 WMI_DISALW_MLO_MODE_BMAP_IEEE_LINK_ID_COMB_2) |
10847 			le32_encode_bits(dislw_bmap_arg->ieee_link_id[2],
10848 					 WMI_DISALW_MLO_MODE_BMAP_IEEE_LINK_ID_COMB_3) |
10849 			le32_encode_bits(dislw_bmap_arg->ieee_link_id[3],
10850 					 WMI_DISALW_MLO_MODE_BMAP_IEEE_LINK_ID_COMB_4);
10851 
10852 		ath12k_dbg(ab, ATH12K_DBG_WMI,
10853 			   "entry %d disallowed_mode %d ieee_link_id_comb 0x%x",
10854 			   i, dislw_bmap_arg->disallowed_mode,
10855 			   dislw_bmap_arg->ieee_link_id_comb);
10856 		dislw_bmap++;
10857 		dislw_bmap_arg++;
10858 	}
10859 
10860 	return 0;
10861 }
10862 
ath12k_wmi_send_mlo_link_set_active_cmd(struct ath12k_base * ab,struct wmi_mlo_link_set_active_arg * arg)10863 int ath12k_wmi_send_mlo_link_set_active_cmd(struct ath12k_base *ab,
10864 					    struct wmi_mlo_link_set_active_arg *arg)
10865 {
10866 	struct wmi_disallowed_mlo_mode_bitmap_params *disallowed_mode_bmap;
10867 	struct wmi_mlo_set_active_link_number_params *link_num_param;
10868 	u32 num_link_num_param = 0, num_vdev_bitmap = 0;
10869 	struct ath12k_wmi_base *wmi_ab = &ab->wmi_ab;
10870 	struct wmi_mlo_link_set_active_cmd *cmd;
10871 	u32 num_inactive_vdev_bitmap = 0;
10872 	u32 num_disallow_mode_comb = 0;
10873 	struct wmi_tlv *tlv;
10874 	struct sk_buff *skb;
10875 	__le32 *vdev_bitmap;
10876 	void *buf_ptr;
10877 	int i, ret;
10878 	u32 len;
10879 
10880 	if (!arg->num_vdev_bitmap && !arg->num_link_entry) {
10881 		ath12k_warn(ab, "Invalid num_vdev_bitmap and num_link_entry");
10882 		return -EINVAL;
10883 	}
10884 
10885 	switch (arg->force_mode) {
10886 	case WMI_MLO_LINK_FORCE_MODE_ACTIVE_LINK_NUM:
10887 	case WMI_MLO_LINK_FORCE_MODE_INACTIVE_LINK_NUM:
10888 		num_link_num_param = arg->num_link_entry;
10889 		fallthrough;
10890 	case WMI_MLO_LINK_FORCE_MODE_ACTIVE:
10891 	case WMI_MLO_LINK_FORCE_MODE_INACTIVE:
10892 	case WMI_MLO_LINK_FORCE_MODE_NO_FORCE:
10893 		num_vdev_bitmap = arg->num_vdev_bitmap;
10894 		break;
10895 	case WMI_MLO_LINK_FORCE_MODE_ACTIVE_INACTIVE:
10896 		num_vdev_bitmap = arg->num_vdev_bitmap;
10897 		num_inactive_vdev_bitmap = arg->num_inactive_vdev_bitmap;
10898 		break;
10899 	default:
10900 		ath12k_warn(ab, "Invalid force mode: %u", arg->force_mode);
10901 		return -EINVAL;
10902 	}
10903 
10904 	num_disallow_mode_comb = arg->num_disallow_mode_comb;
10905 	len = sizeof(*cmd) +
10906 	      TLV_HDR_SIZE + sizeof(*link_num_param) * num_link_num_param +
10907 	      TLV_HDR_SIZE + sizeof(*vdev_bitmap) * num_vdev_bitmap +
10908 	      TLV_HDR_SIZE + TLV_HDR_SIZE + TLV_HDR_SIZE +
10909 	      TLV_HDR_SIZE + sizeof(*disallowed_mode_bmap) * num_disallow_mode_comb;
10910 	if (arg->force_mode == WMI_MLO_LINK_FORCE_MODE_ACTIVE_INACTIVE)
10911 		len += sizeof(*vdev_bitmap) * num_inactive_vdev_bitmap;
10912 
10913 	skb = ath12k_wmi_alloc_skb(wmi_ab, len);
10914 	if (!skb)
10915 		return -ENOMEM;
10916 
10917 	cmd = (struct wmi_mlo_link_set_active_cmd *)skb->data;
10918 	cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_MLO_LINK_SET_ACTIVE_CMD,
10919 						 sizeof(*cmd));
10920 	cmd->force_mode = cpu_to_le32(arg->force_mode);
10921 	cmd->reason = cpu_to_le32(arg->reason);
10922 	ath12k_dbg(ab, ATH12K_DBG_WMI,
10923 		   "mode %d reason %d num_link_num_param %d num_vdev_bitmap %d inactive %d num_disallow_mode_comb %d",
10924 		   arg->force_mode, arg->reason, num_link_num_param,
10925 		   num_vdev_bitmap, num_inactive_vdev_bitmap,
10926 		   num_disallow_mode_comb);
10927 
10928 	buf_ptr = skb->data + sizeof(*cmd);
10929 	tlv = buf_ptr;
10930 	tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT,
10931 					 sizeof(*link_num_param) * num_link_num_param);
10932 	buf_ptr += TLV_HDR_SIZE;
10933 
10934 	if (num_link_num_param) {
10935 		cmd->ctrl_flags =
10936 			le32_encode_bits(arg->ctrl_flags.dync_force_link_num ? 1 : 0,
10937 					 CRTL_F_DYNC_FORCE_LINK_NUM);
10938 
10939 		link_num_param = buf_ptr;
10940 		for (i = 0; i < num_link_num_param; i++) {
10941 			link_num_param->tlv_header =
10942 				ath12k_wmi_tlv_cmd_hdr(0, sizeof(*link_num_param));
10943 			link_num_param->num_of_link =
10944 				cpu_to_le32(arg->link_num[i].num_of_link);
10945 			link_num_param->vdev_type =
10946 				cpu_to_le32(arg->link_num[i].vdev_type);
10947 			link_num_param->vdev_subtype =
10948 				cpu_to_le32(arg->link_num[i].vdev_subtype);
10949 			link_num_param->home_freq =
10950 				cpu_to_le32(arg->link_num[i].home_freq);
10951 			ath12k_dbg(ab, ATH12K_DBG_WMI,
10952 				   "entry %d num_of_link %d vdev type %d subtype %d freq %d control_flags %d",
10953 				   i, arg->link_num[i].num_of_link,
10954 				   arg->link_num[i].vdev_type,
10955 				   arg->link_num[i].vdev_subtype,
10956 				   arg->link_num[i].home_freq,
10957 				   __le32_to_cpu(cmd->ctrl_flags));
10958 			link_num_param++;
10959 		}
10960 
10961 		buf_ptr += sizeof(*link_num_param) * num_link_num_param;
10962 	}
10963 
10964 	tlv = buf_ptr;
10965 	tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32,
10966 					 sizeof(*vdev_bitmap) * num_vdev_bitmap);
10967 	buf_ptr += TLV_HDR_SIZE;
10968 
10969 	if (num_vdev_bitmap) {
10970 		vdev_bitmap = buf_ptr;
10971 		for (i = 0; i < num_vdev_bitmap; i++) {
10972 			vdev_bitmap[i] = cpu_to_le32(arg->vdev_bitmap[i]);
10973 			ath12k_dbg(ab, ATH12K_DBG_WMI, "entry %d vdev_id_bitmap 0x%x",
10974 				   i, arg->vdev_bitmap[i]);
10975 		}
10976 
10977 		buf_ptr += sizeof(*vdev_bitmap) * num_vdev_bitmap;
10978 	}
10979 
10980 	if (arg->force_mode == WMI_MLO_LINK_FORCE_MODE_ACTIVE_INACTIVE) {
10981 		tlv = buf_ptr;
10982 		tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32,
10983 						 sizeof(*vdev_bitmap) *
10984 						 num_inactive_vdev_bitmap);
10985 		buf_ptr += TLV_HDR_SIZE;
10986 
10987 		if (num_inactive_vdev_bitmap) {
10988 			vdev_bitmap = buf_ptr;
10989 			for (i = 0; i < num_inactive_vdev_bitmap; i++) {
10990 				vdev_bitmap[i] =
10991 					cpu_to_le32(arg->inactive_vdev_bitmap[i]);
10992 				ath12k_dbg(ab, ATH12K_DBG_WMI,
10993 					   "entry %d inactive_vdev_id_bitmap 0x%x",
10994 					    i, arg->inactive_vdev_bitmap[i]);
10995 			}
10996 
10997 			buf_ptr += sizeof(*vdev_bitmap) * num_inactive_vdev_bitmap;
10998 		}
10999 	} else {
11000 		/* add empty vdev bitmap2 tlv */
11001 		tlv = buf_ptr;
11002 		tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, 0);
11003 		buf_ptr += TLV_HDR_SIZE;
11004 	}
11005 
11006 	/* add empty ieee_link_id_bitmap tlv */
11007 	tlv = buf_ptr;
11008 	tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, 0);
11009 	buf_ptr += TLV_HDR_SIZE;
11010 
11011 	/* add empty ieee_link_id_bitmap2 tlv */
11012 	tlv = buf_ptr;
11013 	tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, 0);
11014 	buf_ptr += TLV_HDR_SIZE;
11015 
11016 	tlv = buf_ptr;
11017 	tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT,
11018 					 sizeof(*disallowed_mode_bmap) *
11019 					 arg->num_disallow_mode_comb);
11020 	buf_ptr += TLV_HDR_SIZE;
11021 
11022 	ret = ath12k_wmi_fill_disallowed_bmap(ab, buf_ptr, arg);
11023 	if (ret)
11024 		goto free_skb;
11025 
11026 	ret = ath12k_wmi_cmd_send(&wmi_ab->wmi[0], skb, WMI_MLO_LINK_SET_ACTIVE_CMDID);
11027 	if (ret) {
11028 		ath12k_warn(ab,
11029 			    "failed to send WMI_MLO_LINK_SET_ACTIVE_CMDID: %d\n", ret);
11030 		goto free_skb;
11031 	}
11032 
11033 	ath12k_dbg(ab, ATH12K_DBG_WMI, "WMI mlo link set active cmd");
11034 
11035 	return ret;
11036 
11037 free_skb:
11038 	dev_kfree_skb(skb);
11039 	return ret;
11040 }
11041