1 // SPDX-License-Identifier: BSD-3-Clause-Clear
2 /*
3 * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
4 * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
5 */
6
7 #if defined(__FreeBSD__)
8 #define LINUXKPI_PARAM_PREFIX ath11k_core_
9 #endif
10
11 #include <linux/module.h>
12 #include <linux/slab.h>
13 #include <linux/remoteproc.h>
14 #include <linux/firmware.h>
15 #if defined(CONFIG_OF)
16 #include <linux/of.h>
17 #endif
18 #if defined(__FreeBSD__)
19 #include <linux/delay.h>
20 #endif
21
22 #include "core.h"
23 #include "dp_tx.h"
24 #include "dp_rx.h"
25 #include "debug.h"
26 #include "hif.h"
27 #include "wow.h"
28
29 unsigned int ath11k_debug_mask;
30 EXPORT_SYMBOL(ath11k_debug_mask);
31 module_param_named(debug_mask, ath11k_debug_mask, uint, 0644);
32 MODULE_PARM_DESC(debug_mask, "Debugging mask");
33
34 static unsigned int ath11k_crypto_mode;
35 module_param_named(crypto_mode, ath11k_crypto_mode, uint, 0644);
36 MODULE_PARM_DESC(crypto_mode, "crypto mode: 0-hardware, 1-software");
37
38 /* frame mode values are mapped as per enum ath11k_hw_txrx_mode */
39 unsigned int ath11k_frame_mode = ATH11K_HW_TXRX_NATIVE_WIFI;
40 module_param_named(frame_mode, ath11k_frame_mode, uint, 0644);
41 MODULE_PARM_DESC(frame_mode,
42 "Datapath frame mode (0: raw, 1: native wifi (default), 2: ethernet)");
43
44 bool ath11k_ftm_mode;
45 module_param_named(ftm_mode, ath11k_ftm_mode, bool, 0444);
46 MODULE_PARM_DESC(ftm_mode, "Boots up in factory test mode");
47
48 static const struct ath11k_hw_params ath11k_hw_params[] = {
49 {
50 .hw_rev = ATH11K_HW_IPQ8074,
51 .name = "ipq8074 hw2.0",
52 .fw = {
53 .dir = "IPQ8074/hw2.0",
54 .board_size = 256 * 1024,
55 .cal_offset = 128 * 1024,
56 },
57 .max_radios = 3,
58 .bdf_addr = 0x4B0C0000,
59 .hw_ops = &ipq8074_ops,
60 .ring_mask = &ath11k_hw_ring_mask_ipq8074,
61 .internal_sleep_clock = false,
62 .regs = &ipq8074_regs,
63 .qmi_service_ins_id = ATH11K_QMI_WLFW_SERVICE_INS_ID_V01_IPQ8074,
64 .host_ce_config = ath11k_host_ce_config_ipq8074,
65 .ce_count = 12,
66 .target_ce_config = ath11k_target_ce_config_wlan_ipq8074,
67 .target_ce_count = 11,
68 .svc_to_ce_map = ath11k_target_service_to_ce_map_wlan_ipq8074,
69 .svc_to_ce_map_len = 21,
70 .ce_ie_addr = &ath11k_ce_ie_addr_ipq8074,
71 .single_pdev_only = false,
72 .rxdma1_enable = true,
73 .num_rxmda_per_pdev = 1,
74 .rx_mac_buf_ring = false,
75 .vdev_start_delay = false,
76 .htt_peer_map_v2 = true,
77
78 .spectral = {
79 .fft_sz = 2,
80 /* HW bug, expected BIN size is 2 bytes but HW report as 4 bytes.
81 * so added pad size as 2 bytes to compensate the BIN size
82 */
83 .fft_pad_sz = 2,
84 .summary_pad_sz = 0,
85 .fft_hdr_len = 16,
86 .max_fft_bins = 512,
87 .fragment_160mhz = true,
88 },
89
90 .interface_modes = BIT(NL80211_IFTYPE_STATION) |
91 BIT(NL80211_IFTYPE_AP) |
92 BIT(NL80211_IFTYPE_MESH_POINT),
93 .supports_monitor = true,
94 .full_monitor_mode = false,
95 .supports_shadow_regs = false,
96 .idle_ps = false,
97 .supports_sta_ps = false,
98 .coldboot_cal_mm = true,
99 .coldboot_cal_ftm = true,
100 .cbcal_restart_fw = true,
101 .fw_mem_mode = 0,
102 .num_vdevs = 16 + 1,
103 .num_peers = 512,
104 .supports_suspend = false,
105 .hal_desc_sz = sizeof(struct hal_rx_desc_ipq8074),
106 .supports_regdb = false,
107 .fix_l1ss = true,
108 .credit_flow = false,
109 .max_tx_ring = DP_TCL_NUM_RING_MAX,
110 .hal_params = &ath11k_hw_hal_params_ipq8074,
111 .supports_dynamic_smps_6ghz = false,
112 .alloc_cacheable_memory = true,
113 .supports_rssi_stats = false,
114 .fw_wmi_diag_event = false,
115 .current_cc_support = false,
116 .dbr_debug_support = true,
117 .global_reset = false,
118 .bios_sar_capa = NULL,
119 .m3_fw_support = false,
120 .fixed_bdf_addr = true,
121 .fixed_mem_region = true,
122 .static_window_map = false,
123 .hybrid_bus_type = false,
124 .fixed_fw_mem = false,
125 .support_off_channel_tx = false,
126 .supports_multi_bssid = false,
127
128 .sram_dump = {},
129
130 .tcl_ring_retry = true,
131 .tx_ring_size = DP_TCL_DATA_RING_SIZE,
132 .smp2p_wow_exit = false,
133 },
134 {
135 .hw_rev = ATH11K_HW_IPQ6018_HW10,
136 .name = "ipq6018 hw1.0",
137 .fw = {
138 .dir = "IPQ6018/hw1.0",
139 .board_size = 256 * 1024,
140 .cal_offset = 128 * 1024,
141 },
142 .max_radios = 2,
143 .bdf_addr = 0x4ABC0000,
144 .hw_ops = &ipq6018_ops,
145 .ring_mask = &ath11k_hw_ring_mask_ipq8074,
146 .internal_sleep_clock = false,
147 .regs = &ipq8074_regs,
148 .qmi_service_ins_id = ATH11K_QMI_WLFW_SERVICE_INS_ID_V01_IPQ8074,
149 .host_ce_config = ath11k_host_ce_config_ipq8074,
150 .ce_count = 12,
151 .target_ce_config = ath11k_target_ce_config_wlan_ipq8074,
152 .target_ce_count = 11,
153 .svc_to_ce_map = ath11k_target_service_to_ce_map_wlan_ipq6018,
154 .svc_to_ce_map_len = 19,
155 .ce_ie_addr = &ath11k_ce_ie_addr_ipq8074,
156 .single_pdev_only = false,
157 .rxdma1_enable = true,
158 .num_rxmda_per_pdev = 1,
159 .rx_mac_buf_ring = false,
160 .vdev_start_delay = false,
161 .htt_peer_map_v2 = true,
162
163 .spectral = {
164 .fft_sz = 4,
165 .fft_pad_sz = 0,
166 .summary_pad_sz = 0,
167 .fft_hdr_len = 16,
168 .max_fft_bins = 512,
169 .fragment_160mhz = true,
170 },
171
172 .interface_modes = BIT(NL80211_IFTYPE_STATION) |
173 BIT(NL80211_IFTYPE_AP) |
174 BIT(NL80211_IFTYPE_MESH_POINT),
175 .supports_monitor = true,
176 .full_monitor_mode = false,
177 .supports_shadow_regs = false,
178 .idle_ps = false,
179 .supports_sta_ps = false,
180 .coldboot_cal_mm = true,
181 .coldboot_cal_ftm = true,
182 .cbcal_restart_fw = true,
183 .fw_mem_mode = 0,
184 .num_vdevs = 16 + 1,
185 .num_peers = 512,
186 .supports_suspend = false,
187 .hal_desc_sz = sizeof(struct hal_rx_desc_ipq8074),
188 .supports_regdb = false,
189 .fix_l1ss = true,
190 .credit_flow = false,
191 .max_tx_ring = DP_TCL_NUM_RING_MAX,
192 .hal_params = &ath11k_hw_hal_params_ipq8074,
193 .supports_dynamic_smps_6ghz = false,
194 .alloc_cacheable_memory = true,
195 .supports_rssi_stats = false,
196 .fw_wmi_diag_event = false,
197 .current_cc_support = false,
198 .dbr_debug_support = true,
199 .global_reset = false,
200 .bios_sar_capa = NULL,
201 .m3_fw_support = false,
202 .fixed_bdf_addr = true,
203 .fixed_mem_region = true,
204 .static_window_map = false,
205 .hybrid_bus_type = false,
206 .fixed_fw_mem = false,
207 .support_off_channel_tx = false,
208 .supports_multi_bssid = false,
209
210 .sram_dump = {},
211
212 .tcl_ring_retry = true,
213 .tx_ring_size = DP_TCL_DATA_RING_SIZE,
214 .smp2p_wow_exit = false,
215 .support_fw_mac_sequence = false,
216 },
217 {
218 .name = "qca6390 hw2.0",
219 .hw_rev = ATH11K_HW_QCA6390_HW20,
220 .fw = {
221 .dir = "QCA6390/hw2.0",
222 .board_size = 256 * 1024,
223 .cal_offset = 128 * 1024,
224 },
225 .max_radios = 3,
226 .bdf_addr = 0x4B0C0000,
227 .hw_ops = &qca6390_ops,
228 .ring_mask = &ath11k_hw_ring_mask_qca6390,
229 .internal_sleep_clock = true,
230 .regs = &qca6390_regs,
231 .qmi_service_ins_id = ATH11K_QMI_WLFW_SERVICE_INS_ID_V01_QCA6390,
232 .host_ce_config = ath11k_host_ce_config_qca6390,
233 .ce_count = 9,
234 .target_ce_config = ath11k_target_ce_config_wlan_qca6390,
235 .target_ce_count = 9,
236 .svc_to_ce_map = ath11k_target_service_to_ce_map_wlan_qca6390,
237 .svc_to_ce_map_len = 14,
238 .ce_ie_addr = &ath11k_ce_ie_addr_ipq8074,
239 .single_pdev_only = true,
240 .rxdma1_enable = false,
241 .num_rxmda_per_pdev = 2,
242 .rx_mac_buf_ring = true,
243 .vdev_start_delay = true,
244 .htt_peer_map_v2 = false,
245
246 .spectral = {
247 .fft_sz = 0,
248 .fft_pad_sz = 0,
249 .summary_pad_sz = 0,
250 .fft_hdr_len = 0,
251 .max_fft_bins = 0,
252 .fragment_160mhz = false,
253 },
254
255 .interface_modes = BIT(NL80211_IFTYPE_STATION) |
256 BIT(NL80211_IFTYPE_AP),
257 .supports_monitor = false,
258 .full_monitor_mode = false,
259 .supports_shadow_regs = true,
260 .idle_ps = true,
261 .supports_sta_ps = true,
262 .coldboot_cal_mm = false,
263 .coldboot_cal_ftm = false,
264 .cbcal_restart_fw = false,
265 .fw_mem_mode = 0,
266 .num_vdevs = 16 + 1,
267 .num_peers = 512,
268 .supports_suspend = true,
269 .hal_desc_sz = sizeof(struct hal_rx_desc_ipq8074),
270 .supports_regdb = false,
271 .fix_l1ss = true,
272 .credit_flow = true,
273 .max_tx_ring = DP_TCL_NUM_RING_MAX_QCA6390,
274 .hal_params = &ath11k_hw_hal_params_qca6390,
275 .supports_dynamic_smps_6ghz = false,
276 .alloc_cacheable_memory = false,
277 .supports_rssi_stats = true,
278 .fw_wmi_diag_event = true,
279 .current_cc_support = true,
280 .dbr_debug_support = false,
281 .global_reset = true,
282 .bios_sar_capa = NULL,
283 .m3_fw_support = true,
284 .fixed_bdf_addr = false,
285 .fixed_mem_region = false,
286 .static_window_map = false,
287 .hybrid_bus_type = false,
288 .fixed_fw_mem = false,
289 .support_off_channel_tx = true,
290 .supports_multi_bssid = true,
291
292 .sram_dump = {
293 .start = 0x01400000,
294 .end = 0x0171ffff,
295 },
296
297 .tcl_ring_retry = true,
298 .tx_ring_size = DP_TCL_DATA_RING_SIZE,
299 .smp2p_wow_exit = false,
300 .support_fw_mac_sequence = true,
301 },
302 {
303 .name = "qcn9074 hw1.0",
304 .hw_rev = ATH11K_HW_QCN9074_HW10,
305 .fw = {
306 .dir = "QCN9074/hw1.0",
307 .board_size = 256 * 1024,
308 .cal_offset = 128 * 1024,
309 },
310 .max_radios = 1,
311 .single_pdev_only = false,
312 .qmi_service_ins_id = ATH11K_QMI_WLFW_SERVICE_INS_ID_V01_QCN9074,
313 .hw_ops = &qcn9074_ops,
314 .ring_mask = &ath11k_hw_ring_mask_qcn9074,
315 .internal_sleep_clock = false,
316 .regs = &qcn9074_regs,
317 .host_ce_config = ath11k_host_ce_config_qcn9074,
318 .ce_count = 6,
319 .target_ce_config = ath11k_target_ce_config_wlan_qcn9074,
320 .target_ce_count = 9,
321 .svc_to_ce_map = ath11k_target_service_to_ce_map_wlan_qcn9074,
322 .svc_to_ce_map_len = 18,
323 .ce_ie_addr = &ath11k_ce_ie_addr_ipq8074,
324 .rxdma1_enable = true,
325 .num_rxmda_per_pdev = 1,
326 .rx_mac_buf_ring = false,
327 .vdev_start_delay = false,
328 .htt_peer_map_v2 = true,
329
330 .spectral = {
331 .fft_sz = 2,
332 .fft_pad_sz = 0,
333 .summary_pad_sz = 16,
334 .fft_hdr_len = 24,
335 .max_fft_bins = 1024,
336 .fragment_160mhz = false,
337 },
338
339 .interface_modes = BIT(NL80211_IFTYPE_STATION) |
340 BIT(NL80211_IFTYPE_AP) |
341 BIT(NL80211_IFTYPE_MESH_POINT),
342 .supports_monitor = true,
343 .full_monitor_mode = true,
344 .supports_shadow_regs = false,
345 .idle_ps = false,
346 .supports_sta_ps = false,
347 .coldboot_cal_mm = false,
348 .coldboot_cal_ftm = true,
349 .cbcal_restart_fw = true,
350 .fw_mem_mode = 2,
351 .num_vdevs = 8,
352 .num_peers = 128,
353 .supports_suspend = false,
354 .hal_desc_sz = sizeof(struct hal_rx_desc_qcn9074),
355 .supports_regdb = false,
356 .fix_l1ss = true,
357 .credit_flow = false,
358 .max_tx_ring = DP_TCL_NUM_RING_MAX,
359 .hal_params = &ath11k_hw_hal_params_ipq8074,
360 .supports_dynamic_smps_6ghz = true,
361 .alloc_cacheable_memory = true,
362 .supports_rssi_stats = false,
363 .fw_wmi_diag_event = false,
364 .current_cc_support = false,
365 .dbr_debug_support = true,
366 .global_reset = false,
367 .bios_sar_capa = NULL,
368 .m3_fw_support = true,
369 .fixed_bdf_addr = false,
370 .fixed_mem_region = false,
371 .static_window_map = true,
372 .hybrid_bus_type = false,
373 .fixed_fw_mem = false,
374 .support_off_channel_tx = false,
375 .supports_multi_bssid = false,
376
377 .sram_dump = {},
378
379 .tcl_ring_retry = true,
380 .tx_ring_size = DP_TCL_DATA_RING_SIZE,
381 .smp2p_wow_exit = false,
382 .support_fw_mac_sequence = false,
383 },
384 {
385 .name = "wcn6855 hw2.0",
386 .hw_rev = ATH11K_HW_WCN6855_HW20,
387 .fw = {
388 .dir = "WCN6855/hw2.0",
389 .board_size = 256 * 1024,
390 .cal_offset = 128 * 1024,
391 },
392 .max_radios = 3,
393 .bdf_addr = 0x4B0C0000,
394 .hw_ops = &wcn6855_ops,
395 .ring_mask = &ath11k_hw_ring_mask_qca6390,
396 .internal_sleep_clock = true,
397 .regs = &wcn6855_regs,
398 .qmi_service_ins_id = ATH11K_QMI_WLFW_SERVICE_INS_ID_V01_QCA6390,
399 .host_ce_config = ath11k_host_ce_config_qca6390,
400 .ce_count = 9,
401 .target_ce_config = ath11k_target_ce_config_wlan_qca6390,
402 .target_ce_count = 9,
403 .svc_to_ce_map = ath11k_target_service_to_ce_map_wlan_qca6390,
404 .svc_to_ce_map_len = 14,
405 .ce_ie_addr = &ath11k_ce_ie_addr_ipq8074,
406 .single_pdev_only = true,
407 .rxdma1_enable = false,
408 .num_rxmda_per_pdev = 2,
409 .rx_mac_buf_ring = true,
410 .vdev_start_delay = true,
411 .htt_peer_map_v2 = false,
412
413 .spectral = {
414 .fft_sz = 0,
415 .fft_pad_sz = 0,
416 .summary_pad_sz = 0,
417 .fft_hdr_len = 0,
418 .max_fft_bins = 0,
419 .fragment_160mhz = false,
420 },
421
422 .interface_modes = BIT(NL80211_IFTYPE_STATION) |
423 BIT(NL80211_IFTYPE_AP),
424 .supports_monitor = false,
425 .full_monitor_mode = false,
426 .supports_shadow_regs = true,
427 .idle_ps = true,
428 .supports_sta_ps = true,
429 .coldboot_cal_mm = false,
430 .coldboot_cal_ftm = false,
431 .cbcal_restart_fw = false,
432 .fw_mem_mode = 0,
433 .num_vdevs = 16 + 1,
434 .num_peers = 512,
435 .supports_suspend = true,
436 .hal_desc_sz = sizeof(struct hal_rx_desc_wcn6855),
437 .supports_regdb = true,
438 .fix_l1ss = false,
439 .credit_flow = true,
440 .max_tx_ring = DP_TCL_NUM_RING_MAX_QCA6390,
441 .hal_params = &ath11k_hw_hal_params_qca6390,
442 .supports_dynamic_smps_6ghz = false,
443 .alloc_cacheable_memory = false,
444 .supports_rssi_stats = true,
445 .fw_wmi_diag_event = true,
446 .current_cc_support = true,
447 .dbr_debug_support = false,
448 .global_reset = true,
449 .bios_sar_capa = &ath11k_hw_sar_capa_wcn6855,
450 .m3_fw_support = true,
451 .fixed_bdf_addr = false,
452 .fixed_mem_region = false,
453 .static_window_map = false,
454 .hybrid_bus_type = false,
455 .fixed_fw_mem = false,
456 .support_off_channel_tx = true,
457 .supports_multi_bssid = true,
458
459 .sram_dump = {
460 .start = 0x01400000,
461 .end = 0x0177ffff,
462 },
463
464 .tcl_ring_retry = true,
465 .tx_ring_size = DP_TCL_DATA_RING_SIZE,
466 .smp2p_wow_exit = false,
467 .support_fw_mac_sequence = true,
468 },
469 {
470 .name = "wcn6855 hw2.1",
471 .hw_rev = ATH11K_HW_WCN6855_HW21,
472 .fw = {
473 .dir = "WCN6855/hw2.1",
474 .board_size = 256 * 1024,
475 .cal_offset = 128 * 1024,
476 },
477 .max_radios = 3,
478 .bdf_addr = 0x4B0C0000,
479 .hw_ops = &wcn6855_ops,
480 .ring_mask = &ath11k_hw_ring_mask_qca6390,
481 .internal_sleep_clock = true,
482 .regs = &wcn6855_regs,
483 .qmi_service_ins_id = ATH11K_QMI_WLFW_SERVICE_INS_ID_V01_QCA6390,
484 .host_ce_config = ath11k_host_ce_config_qca6390,
485 .ce_count = 9,
486 .target_ce_config = ath11k_target_ce_config_wlan_qca6390,
487 .target_ce_count = 9,
488 .svc_to_ce_map = ath11k_target_service_to_ce_map_wlan_qca6390,
489 .svc_to_ce_map_len = 14,
490 .single_pdev_only = true,
491 .rxdma1_enable = false,
492 .num_rxmda_per_pdev = 2,
493 .rx_mac_buf_ring = true,
494 .vdev_start_delay = true,
495 .htt_peer_map_v2 = false,
496
497 .spectral = {
498 .fft_sz = 0,
499 .fft_pad_sz = 0,
500 .summary_pad_sz = 0,
501 .fft_hdr_len = 0,
502 .max_fft_bins = 0,
503 .fragment_160mhz = false,
504 },
505
506 .interface_modes = BIT(NL80211_IFTYPE_STATION) |
507 BIT(NL80211_IFTYPE_AP),
508 .supports_monitor = false,
509 .supports_shadow_regs = true,
510 .idle_ps = true,
511 .supports_sta_ps = true,
512 .coldboot_cal_mm = false,
513 .coldboot_cal_ftm = false,
514 .cbcal_restart_fw = false,
515 .fw_mem_mode = 0,
516 .num_vdevs = 16 + 1,
517 .num_peers = 512,
518 .supports_suspend = true,
519 .hal_desc_sz = sizeof(struct hal_rx_desc_wcn6855),
520 .supports_regdb = true,
521 .fix_l1ss = false,
522 .credit_flow = true,
523 .max_tx_ring = DP_TCL_NUM_RING_MAX_QCA6390,
524 .hal_params = &ath11k_hw_hal_params_qca6390,
525 .supports_dynamic_smps_6ghz = false,
526 .alloc_cacheable_memory = false,
527 .supports_rssi_stats = true,
528 .fw_wmi_diag_event = true,
529 .current_cc_support = true,
530 .dbr_debug_support = false,
531 .global_reset = true,
532 .bios_sar_capa = &ath11k_hw_sar_capa_wcn6855,
533 .m3_fw_support = true,
534 .fixed_bdf_addr = false,
535 .fixed_mem_region = false,
536 .static_window_map = false,
537 .hybrid_bus_type = false,
538 .fixed_fw_mem = false,
539 .support_off_channel_tx = true,
540 .supports_multi_bssid = true,
541
542 .sram_dump = {
543 .start = 0x01400000,
544 .end = 0x0177ffff,
545 },
546
547 .tcl_ring_retry = true,
548 .tx_ring_size = DP_TCL_DATA_RING_SIZE,
549 .smp2p_wow_exit = false,
550 .support_fw_mac_sequence = true,
551 },
552 {
553 .name = "wcn6750 hw1.0",
554 .hw_rev = ATH11K_HW_WCN6750_HW10,
555 .fw = {
556 .dir = "WCN6750/hw1.0",
557 .board_size = 256 * 1024,
558 .cal_offset = 128 * 1024,
559 },
560 .max_radios = 1,
561 .bdf_addr = 0x4B0C0000,
562 .hw_ops = &wcn6750_ops,
563 .ring_mask = &ath11k_hw_ring_mask_wcn6750,
564 .internal_sleep_clock = false,
565 .regs = &wcn6750_regs,
566 .qmi_service_ins_id = ATH11K_QMI_WLFW_SERVICE_INS_ID_V01_WCN6750,
567 .host_ce_config = ath11k_host_ce_config_qca6390,
568 .ce_count = 9,
569 .target_ce_config = ath11k_target_ce_config_wlan_qca6390,
570 .target_ce_count = 9,
571 .svc_to_ce_map = ath11k_target_service_to_ce_map_wlan_qca6390,
572 .svc_to_ce_map_len = 14,
573 .ce_ie_addr = &ath11k_ce_ie_addr_ipq8074,
574 .single_pdev_only = true,
575 .rxdma1_enable = false,
576 .num_rxmda_per_pdev = 1,
577 .rx_mac_buf_ring = true,
578 .vdev_start_delay = true,
579 .htt_peer_map_v2 = false,
580
581 .spectral = {
582 .fft_sz = 0,
583 .fft_pad_sz = 0,
584 .summary_pad_sz = 0,
585 .fft_hdr_len = 0,
586 .max_fft_bins = 0,
587 .fragment_160mhz = false,
588 },
589
590 .interface_modes = BIT(NL80211_IFTYPE_STATION) |
591 BIT(NL80211_IFTYPE_AP),
592 .supports_monitor = false,
593 .supports_shadow_regs = true,
594 .idle_ps = true,
595 .supports_sta_ps = true,
596 .coldboot_cal_mm = true,
597 .coldboot_cal_ftm = true,
598 .cbcal_restart_fw = false,
599 .fw_mem_mode = 0,
600 .num_vdevs = 16 + 1,
601 .num_peers = 512,
602 .supports_suspend = false,
603 .hal_desc_sz = sizeof(struct hal_rx_desc_qcn9074),
604 .supports_regdb = true,
605 .fix_l1ss = false,
606 .credit_flow = true,
607 .max_tx_ring = DP_TCL_NUM_RING_MAX,
608 .hal_params = &ath11k_hw_hal_params_wcn6750,
609 .supports_dynamic_smps_6ghz = false,
610 .alloc_cacheable_memory = false,
611 .supports_rssi_stats = true,
612 .fw_wmi_diag_event = false,
613 .current_cc_support = true,
614 .dbr_debug_support = false,
615 .global_reset = false,
616 .bios_sar_capa = &ath11k_hw_sar_capa_wcn6855,
617 .m3_fw_support = false,
618 .fixed_bdf_addr = false,
619 .fixed_mem_region = false,
620 .static_window_map = true,
621 .hybrid_bus_type = true,
622 .fixed_fw_mem = true,
623 .support_off_channel_tx = true,
624 .supports_multi_bssid = true,
625
626 .sram_dump = {},
627
628 .tcl_ring_retry = false,
629 .tx_ring_size = DP_TCL_DATA_RING_SIZE_WCN6750,
630 .smp2p_wow_exit = true,
631 .support_fw_mac_sequence = true,
632 },
633 {
634 .hw_rev = ATH11K_HW_IPQ5018_HW10,
635 .name = "ipq5018 hw1.0",
636 .fw = {
637 .dir = "IPQ5018/hw1.0",
638 .board_size = 256 * 1024,
639 .cal_offset = 128 * 1024,
640 },
641 .max_radios = MAX_RADIOS_5018,
642 .bdf_addr = 0x4BA00000,
643 /* hal_desc_sz and hw ops are similar to qcn9074 */
644 .hal_desc_sz = sizeof(struct hal_rx_desc_qcn9074),
645 .qmi_service_ins_id = ATH11K_QMI_WLFW_SERVICE_INS_ID_V01_IPQ8074,
646 .ring_mask = &ath11k_hw_ring_mask_ipq8074,
647 .credit_flow = false,
648 .max_tx_ring = 1,
649 .spectral = {
650 .fft_sz = 2,
651 .fft_pad_sz = 0,
652 .summary_pad_sz = 16,
653 .fft_hdr_len = 24,
654 .max_fft_bins = 1024,
655 },
656 .internal_sleep_clock = false,
657 .regs = &ipq5018_regs,
658 .hw_ops = &ipq5018_ops,
659 .host_ce_config = ath11k_host_ce_config_qcn9074,
660 .ce_count = CE_CNT_5018,
661 .target_ce_config = ath11k_target_ce_config_wlan_ipq5018,
662 .target_ce_count = TARGET_CE_CNT_5018,
663 .svc_to_ce_map = ath11k_target_service_to_ce_map_wlan_ipq5018,
664 .svc_to_ce_map_len = SVC_CE_MAP_LEN_5018,
665 .ce_ie_addr = &ath11k_ce_ie_addr_ipq5018,
666 .ce_remap = &ath11k_ce_remap_ipq5018,
667 .rxdma1_enable = true,
668 .num_rxmda_per_pdev = RXDMA_PER_PDEV_5018,
669 .rx_mac_buf_ring = false,
670 .vdev_start_delay = false,
671 .htt_peer_map_v2 = true,
672 .interface_modes = BIT(NL80211_IFTYPE_STATION) |
673 BIT(NL80211_IFTYPE_AP) |
674 BIT(NL80211_IFTYPE_MESH_POINT),
675 .supports_monitor = false,
676 .supports_sta_ps = false,
677 .supports_shadow_regs = false,
678 .fw_mem_mode = 0,
679 .num_vdevs = 16 + 1,
680 .num_peers = 512,
681 .supports_regdb = false,
682 .idle_ps = false,
683 .supports_suspend = false,
684 .hal_params = &ath11k_hw_hal_params_ipq8074,
685 .single_pdev_only = false,
686 .coldboot_cal_mm = true,
687 .coldboot_cal_ftm = true,
688 .cbcal_restart_fw = true,
689 .fix_l1ss = true,
690 .supports_dynamic_smps_6ghz = false,
691 .alloc_cacheable_memory = true,
692 .supports_rssi_stats = false,
693 .fw_wmi_diag_event = false,
694 .current_cc_support = false,
695 .dbr_debug_support = true,
696 .global_reset = false,
697 .bios_sar_capa = NULL,
698 .m3_fw_support = false,
699 .fixed_bdf_addr = true,
700 .fixed_mem_region = true,
701 .static_window_map = false,
702 .hybrid_bus_type = false,
703 .fixed_fw_mem = false,
704 .support_off_channel_tx = false,
705 .supports_multi_bssid = false,
706
707 .sram_dump = {},
708
709 .tcl_ring_retry = true,
710 .tx_ring_size = DP_TCL_DATA_RING_SIZE,
711 .smp2p_wow_exit = false,
712 .support_fw_mac_sequence = false,
713 },
714 };
715
ath11k_core_get_single_pdev(struct ath11k_base * ab)716 static inline struct ath11k_pdev *ath11k_core_get_single_pdev(struct ath11k_base *ab)
717 {
718 WARN_ON(!ab->hw_params.single_pdev_only);
719
720 return &ab->pdevs[0];
721 }
722
ath11k_fw_stats_pdevs_free(struct list_head * head)723 void ath11k_fw_stats_pdevs_free(struct list_head *head)
724 {
725 struct ath11k_fw_stats_pdev *i, *tmp;
726
727 list_for_each_entry_safe(i, tmp, head, list) {
728 list_del(&i->list);
729 kfree(i);
730 }
731 }
732
ath11k_fw_stats_vdevs_free(struct list_head * head)733 void ath11k_fw_stats_vdevs_free(struct list_head *head)
734 {
735 struct ath11k_fw_stats_vdev *i, *tmp;
736
737 list_for_each_entry_safe(i, tmp, head, list) {
738 list_del(&i->list);
739 kfree(i);
740 }
741 }
742
ath11k_fw_stats_bcn_free(struct list_head * head)743 void ath11k_fw_stats_bcn_free(struct list_head *head)
744 {
745 struct ath11k_fw_stats_bcn *i, *tmp;
746
747 list_for_each_entry_safe(i, tmp, head, list) {
748 list_del(&i->list);
749 kfree(i);
750 }
751 }
752
ath11k_fw_stats_init(struct ath11k * ar)753 void ath11k_fw_stats_init(struct ath11k *ar)
754 {
755 INIT_LIST_HEAD(&ar->fw_stats.pdevs);
756 INIT_LIST_HEAD(&ar->fw_stats.vdevs);
757 INIT_LIST_HEAD(&ar->fw_stats.bcn);
758
759 init_completion(&ar->fw_stats_complete);
760 }
761
ath11k_fw_stats_free(struct ath11k_fw_stats * stats)762 void ath11k_fw_stats_free(struct ath11k_fw_stats *stats)
763 {
764 ath11k_fw_stats_pdevs_free(&stats->pdevs);
765 ath11k_fw_stats_vdevs_free(&stats->vdevs);
766 ath11k_fw_stats_bcn_free(&stats->bcn);
767 }
768
ath11k_core_coldboot_cal_support(struct ath11k_base * ab)769 bool ath11k_core_coldboot_cal_support(struct ath11k_base *ab)
770 {
771 if (!ath11k_cold_boot_cal)
772 return false;
773
774 if (ath11k_ftm_mode)
775 return ab->hw_params.coldboot_cal_ftm;
776
777 else
778 return ab->hw_params.coldboot_cal_mm;
779 }
780
ath11k_core_suspend(struct ath11k_base * ab)781 int ath11k_core_suspend(struct ath11k_base *ab)
782 {
783 int ret;
784 struct ath11k_pdev *pdev;
785 struct ath11k *ar;
786
787 if (!ab->hw_params.supports_suspend)
788 return -EOPNOTSUPP;
789
790 /* so far single_pdev_only chips have supports_suspend as true
791 * and only the first pdev is valid.
792 */
793 pdev = ath11k_core_get_single_pdev(ab);
794 ar = pdev->ar;
795 if (!ar || ar->state != ATH11K_STATE_OFF)
796 return 0;
797
798 ret = ath11k_dp_rx_pktlog_stop(ab, true);
799 if (ret) {
800 ath11k_warn(ab, "failed to stop dp rx (and timer) pktlog during suspend: %d\n",
801 ret);
802 return ret;
803 }
804
805 ret = ath11k_mac_wait_tx_complete(ar);
806 if (ret) {
807 ath11k_warn(ab, "failed to wait tx complete: %d\n", ret);
808 return ret;
809 }
810
811 ret = ath11k_wow_enable(ab);
812 if (ret) {
813 ath11k_warn(ab, "failed to enable wow during suspend: %d\n", ret);
814 return ret;
815 }
816
817 ret = ath11k_dp_rx_pktlog_stop(ab, false);
818 if (ret) {
819 ath11k_warn(ab, "failed to stop dp rx pktlog during suspend: %d\n",
820 ret);
821 return ret;
822 }
823
824 ath11k_ce_stop_shadow_timers(ab);
825 ath11k_dp_stop_shadow_timers(ab);
826
827 ath11k_hif_irq_disable(ab);
828 ath11k_hif_ce_irq_disable(ab);
829
830 ret = ath11k_hif_suspend(ab);
831 if (ret) {
832 ath11k_warn(ab, "failed to suspend hif: %d\n", ret);
833 return ret;
834 }
835
836 return 0;
837 }
838 EXPORT_SYMBOL(ath11k_core_suspend);
839
ath11k_core_resume(struct ath11k_base * ab)840 int ath11k_core_resume(struct ath11k_base *ab)
841 {
842 int ret;
843 struct ath11k_pdev *pdev;
844 struct ath11k *ar;
845
846 if (!ab->hw_params.supports_suspend)
847 return -EOPNOTSUPP;
848
849 /* so far signle_pdev_only chips have supports_suspend as true
850 * and only the first pdev is valid.
851 */
852 pdev = ath11k_core_get_single_pdev(ab);
853 ar = pdev->ar;
854 if (!ar || ar->state != ATH11K_STATE_OFF)
855 return 0;
856
857 ret = ath11k_hif_resume(ab);
858 if (ret) {
859 ath11k_warn(ab, "failed to resume hif during resume: %d\n", ret);
860 return ret;
861 }
862
863 ath11k_hif_ce_irq_enable(ab);
864 ath11k_hif_irq_enable(ab);
865
866 ret = ath11k_dp_rx_pktlog_start(ab);
867 if (ret) {
868 ath11k_warn(ab, "failed to start rx pktlog during resume: %d\n",
869 ret);
870 return ret;
871 }
872
873 ret = ath11k_wow_wakeup(ab);
874 if (ret) {
875 ath11k_warn(ab, "failed to wakeup wow during resume: %d\n", ret);
876 return ret;
877 }
878
879 return 0;
880 }
881 EXPORT_SYMBOL(ath11k_core_resume);
882
ath11k_core_check_cc_code_bdfext(const struct dmi_header * hdr,void * data)883 static void ath11k_core_check_cc_code_bdfext(const struct dmi_header *hdr, void *data)
884 {
885 struct ath11k_base *ab = data;
886 const char *magic = ATH11K_SMBIOS_BDF_EXT_MAGIC;
887 #if defined(__linux__)
888 struct ath11k_smbios_bdf *smbios = (struct ath11k_smbios_bdf *)hdr;
889 #elif defined(__FreeBSD__)
890 const struct ath11k_smbios_bdf *smbios = (const struct ath11k_smbios_bdf *)hdr;
891 #endif
892 ssize_t copied;
893 size_t len;
894 int i;
895
896 if (ab->qmi.target.bdf_ext[0] != '\0')
897 return;
898
899 if (hdr->type != ATH11K_SMBIOS_BDF_EXT_TYPE)
900 return;
901
902 if (hdr->length != ATH11K_SMBIOS_BDF_EXT_LENGTH) {
903 ath11k_dbg(ab, ATH11K_DBG_BOOT,
904 "wrong smbios bdf ext type length (%d).\n",
905 hdr->length);
906 return;
907 }
908
909 spin_lock_bh(&ab->base_lock);
910
911 switch (smbios->country_code_flag) {
912 case ATH11K_SMBIOS_CC_ISO:
913 ab->new_alpha2[0] = (smbios->cc_code >> 8) & 0xff;
914 ab->new_alpha2[1] = smbios->cc_code & 0xff;
915 ath11k_dbg(ab, ATH11K_DBG_BOOT, "smbios cc_code %c%c\n",
916 ab->new_alpha2[0], ab->new_alpha2[1]);
917 break;
918 case ATH11K_SMBIOS_CC_WW:
919 ab->new_alpha2[0] = '0';
920 ab->new_alpha2[1] = '0';
921 ath11k_dbg(ab, ATH11K_DBG_BOOT, "smbios worldwide regdomain\n");
922 break;
923 default:
924 ath11k_dbg(ab, ATH11K_DBG_BOOT, "ignore smbios country code setting %d\n",
925 smbios->country_code_flag);
926 break;
927 }
928
929 spin_unlock_bh(&ab->base_lock);
930
931 if (!smbios->bdf_enabled) {
932 ath11k_dbg(ab, ATH11K_DBG_BOOT, "bdf variant name not found.\n");
933 return;
934 }
935
936 /* Only one string exists (per spec) */
937 if (memcmp(smbios->bdf_ext, magic, strlen(magic)) != 0) {
938 ath11k_dbg(ab, ATH11K_DBG_BOOT,
939 "bdf variant magic does not match.\n");
940 return;
941 }
942
943 len = min_t(size_t,
944 strlen(smbios->bdf_ext), sizeof(ab->qmi.target.bdf_ext));
945 for (i = 0; i < len; i++) {
946 if (!isascii(smbios->bdf_ext[i]) || !isprint(smbios->bdf_ext[i])) {
947 ath11k_dbg(ab, ATH11K_DBG_BOOT,
948 "bdf variant name contains non ascii chars.\n");
949 return;
950 }
951 }
952
953 /* Copy extension name without magic prefix */
954 copied = strscpy(ab->qmi.target.bdf_ext, smbios->bdf_ext + strlen(magic),
955 sizeof(ab->qmi.target.bdf_ext));
956 if (copied < 0) {
957 ath11k_dbg(ab, ATH11K_DBG_BOOT,
958 "bdf variant string is longer than the buffer can accommodate\n");
959 return;
960 }
961
962 ath11k_dbg(ab, ATH11K_DBG_BOOT,
963 "found and validated bdf variant smbios_type 0x%x bdf %s\n",
964 ATH11K_SMBIOS_BDF_EXT_TYPE, ab->qmi.target.bdf_ext);
965 }
966
ath11k_core_check_smbios(struct ath11k_base * ab)967 int ath11k_core_check_smbios(struct ath11k_base *ab)
968 {
969 ab->qmi.target.bdf_ext[0] = '\0';
970 dmi_walk(ath11k_core_check_cc_code_bdfext, ab);
971
972 if (ab->qmi.target.bdf_ext[0] == '\0')
973 return -ENODATA;
974
975 return 0;
976 }
977
ath11k_core_check_dt(struct ath11k_base * ab)978 int ath11k_core_check_dt(struct ath11k_base *ab)
979 {
980 #if defined(__linux__)
981 size_t max_len = sizeof(ab->qmi.target.bdf_ext);
982 const char *variant = NULL;
983 struct device_node *node;
984
985 node = ab->dev->of_node;
986 if (!node)
987 return -ENOENT;
988
989 of_property_read_string(node, "qcom,ath11k-calibration-variant",
990 &variant);
991 if (!variant)
992 return -ENODATA;
993
994 if (strscpy(ab->qmi.target.bdf_ext, variant, max_len) < 0)
995 ath11k_dbg(ab, ATH11K_DBG_BOOT,
996 "bdf variant string is longer than the buffer can accommodate (variant: %s)\n",
997 variant);
998
999 return 0;
1000 #elif defined(__FreeBSD__)
1001 return -ENOENT;
1002 #endif
1003 }
1004
__ath11k_core_create_board_name(struct ath11k_base * ab,char * name,size_t name_len,bool with_variant,bool bus_type_mode)1005 static int __ath11k_core_create_board_name(struct ath11k_base *ab, char *name,
1006 size_t name_len, bool with_variant,
1007 bool bus_type_mode)
1008 {
1009 /* strlen(',variant=') + strlen(ab->qmi.target.bdf_ext) */
1010 char variant[9 + ATH11K_QMI_BDF_EXT_STR_LENGTH] = { 0 };
1011
1012 if (with_variant && ab->qmi.target.bdf_ext[0] != '\0')
1013 scnprintf(variant, sizeof(variant), ",variant=%s",
1014 ab->qmi.target.bdf_ext);
1015
1016 switch (ab->id.bdf_search) {
1017 case ATH11K_BDF_SEARCH_BUS_AND_BOARD:
1018 if (bus_type_mode)
1019 scnprintf(name, name_len,
1020 "bus=%s",
1021 ath11k_bus_str(ab->hif.bus));
1022 else
1023 scnprintf(name, name_len,
1024 "bus=%s,vendor=%04x,device=%04x,subsystem-vendor=%04x,subsystem-device=%04x,qmi-chip-id=%d,qmi-board-id=%d%s",
1025 ath11k_bus_str(ab->hif.bus),
1026 ab->id.vendor, ab->id.device,
1027 ab->id.subsystem_vendor,
1028 ab->id.subsystem_device,
1029 ab->qmi.target.chip_id,
1030 ab->qmi.target.board_id,
1031 variant);
1032 break;
1033 default:
1034 scnprintf(name, name_len,
1035 "bus=%s,qmi-chip-id=%d,qmi-board-id=%d%s",
1036 ath11k_bus_str(ab->hif.bus),
1037 ab->qmi.target.chip_id,
1038 ab->qmi.target.board_id, variant);
1039 break;
1040 }
1041
1042 ath11k_dbg(ab, ATH11K_DBG_BOOT, "using board name '%s'\n", name);
1043
1044 return 0;
1045 }
1046
ath11k_core_create_board_name(struct ath11k_base * ab,char * name,size_t name_len)1047 static int ath11k_core_create_board_name(struct ath11k_base *ab, char *name,
1048 size_t name_len)
1049 {
1050 return __ath11k_core_create_board_name(ab, name, name_len, true, false);
1051 }
1052
ath11k_core_create_fallback_board_name(struct ath11k_base * ab,char * name,size_t name_len)1053 static int ath11k_core_create_fallback_board_name(struct ath11k_base *ab, char *name,
1054 size_t name_len)
1055 {
1056 return __ath11k_core_create_board_name(ab, name, name_len, false, false);
1057 }
1058
ath11k_core_create_bus_type_board_name(struct ath11k_base * ab,char * name,size_t name_len)1059 static int ath11k_core_create_bus_type_board_name(struct ath11k_base *ab, char *name,
1060 size_t name_len)
1061 {
1062 return __ath11k_core_create_board_name(ab, name, name_len, false, true);
1063 }
1064
ath11k_core_firmware_request(struct ath11k_base * ab,const char * file)1065 const struct firmware *ath11k_core_firmware_request(struct ath11k_base *ab,
1066 const char *file)
1067 {
1068 const struct firmware *fw;
1069 char path[100];
1070 int ret;
1071
1072 if (file == NULL)
1073 return ERR_PTR(-ENOENT);
1074
1075 ath11k_core_create_firmware_path(ab, file, path, sizeof(path));
1076
1077 ret = firmware_request_nowarn(&fw, path, ab->dev);
1078 if (ret)
1079 return ERR_PTR(ret);
1080
1081 ath11k_dbg(ab, ATH11K_DBG_BOOT, "firmware request %s size %zu\n",
1082 path, fw->size);
1083
1084 return fw;
1085 }
1086
ath11k_core_free_bdf(struct ath11k_base * ab,struct ath11k_board_data * bd)1087 void ath11k_core_free_bdf(struct ath11k_base *ab, struct ath11k_board_data *bd)
1088 {
1089 if (!IS_ERR(bd->fw))
1090 release_firmware(bd->fw);
1091
1092 memset(bd, 0, sizeof(*bd));
1093 }
1094
ath11k_core_parse_bd_ie_board(struct ath11k_base * ab,struct ath11k_board_data * bd,const void * buf,size_t buf_len,const char * boardname,int ie_id,int name_id,int data_id)1095 static int ath11k_core_parse_bd_ie_board(struct ath11k_base *ab,
1096 struct ath11k_board_data *bd,
1097 #if defined(__linux__)
1098 const void *buf, size_t buf_len,
1099 #elif defined(__FreeBSD__)
1100 const u8 *buf, size_t buf_len,
1101 #endif
1102 const char *boardname,
1103 int ie_id,
1104 int name_id,
1105 int data_id)
1106 {
1107 const struct ath11k_fw_ie *hdr;
1108 bool name_match_found;
1109 int ret, board_ie_id;
1110 size_t board_ie_len;
1111 const void *board_ie_data;
1112
1113 name_match_found = false;
1114
1115 /* go through ATH11K_BD_IE_BOARD_/ATH11K_BD_IE_REGDB_ elements */
1116 while (buf_len > sizeof(struct ath11k_fw_ie)) {
1117 #if defined(__linux__)
1118 hdr = buf;
1119 #elif defined(__FreeBSD__)
1120 hdr = (const struct ath11k_fw_ie *)buf;
1121 #endif
1122 board_ie_id = le32_to_cpu(hdr->id);
1123 board_ie_len = le32_to_cpu(hdr->len);
1124 board_ie_data = hdr->data;
1125
1126 buf_len -= sizeof(*hdr);
1127 buf += sizeof(*hdr);
1128
1129 if (buf_len < ALIGN(board_ie_len, 4)) {
1130 ath11k_err(ab, "invalid %s length: %zu < %zu\n",
1131 ath11k_bd_ie_type_str(ie_id),
1132 buf_len, ALIGN(board_ie_len, 4));
1133 ret = -EINVAL;
1134 goto out;
1135 }
1136
1137 if (board_ie_id == name_id) {
1138 ath11k_dbg_dump(ab, ATH11K_DBG_BOOT, "board name", "",
1139 board_ie_data, board_ie_len);
1140
1141 if (board_ie_len != strlen(boardname))
1142 goto next;
1143
1144 ret = memcmp(board_ie_data, boardname, strlen(boardname));
1145 if (ret)
1146 goto next;
1147
1148 name_match_found = true;
1149 ath11k_dbg(ab, ATH11K_DBG_BOOT,
1150 "found match %s for name '%s'",
1151 ath11k_bd_ie_type_str(ie_id),
1152 boardname);
1153 } else if (board_ie_id == data_id) {
1154 if (!name_match_found)
1155 /* no match found */
1156 goto next;
1157
1158 ath11k_dbg(ab, ATH11K_DBG_BOOT,
1159 "found %s for '%s'",
1160 ath11k_bd_ie_type_str(ie_id),
1161 boardname);
1162
1163 bd->data = board_ie_data;
1164 bd->len = board_ie_len;
1165
1166 ret = 0;
1167 goto out;
1168 } else {
1169 ath11k_warn(ab, "unknown %s id found: %d\n",
1170 ath11k_bd_ie_type_str(ie_id),
1171 board_ie_id);
1172 }
1173 next:
1174 /* jump over the padding */
1175 board_ie_len = ALIGN(board_ie_len, 4);
1176
1177 buf_len -= board_ie_len;
1178 buf += board_ie_len;
1179 }
1180
1181 /* no match found */
1182 ret = -ENOENT;
1183
1184 out:
1185 return ret;
1186 }
1187
ath11k_core_fetch_board_data_api_n(struct ath11k_base * ab,struct ath11k_board_data * bd,const char * boardname,int ie_id_match,int name_id,int data_id)1188 static int ath11k_core_fetch_board_data_api_n(struct ath11k_base *ab,
1189 struct ath11k_board_data *bd,
1190 const char *boardname,
1191 int ie_id_match,
1192 int name_id,
1193 int data_id)
1194 {
1195 size_t len, magic_len;
1196 const u8 *data;
1197 char *filename, filepath[100];
1198 size_t ie_len;
1199 #if defined(__linux__)
1200 struct ath11k_fw_ie *hdr;
1201 #elif defined(__FreeBSD__)
1202 const struct ath11k_fw_ie *hdr;
1203 #endif
1204 int ret, ie_id;
1205
1206 filename = ATH11K_BOARD_API2_FILE;
1207
1208 if (!bd->fw)
1209 bd->fw = ath11k_core_firmware_request(ab, filename);
1210
1211 if (IS_ERR(bd->fw))
1212 return PTR_ERR(bd->fw);
1213
1214 data = bd->fw->data;
1215 len = bd->fw->size;
1216
1217 ath11k_core_create_firmware_path(ab, filename,
1218 filepath, sizeof(filepath));
1219
1220 /* magic has extra null byte padded */
1221 magic_len = strlen(ATH11K_BOARD_MAGIC) + 1;
1222 if (len < magic_len) {
1223 ath11k_err(ab, "failed to find magic value in %s, file too short: %zu\n",
1224 filepath, len);
1225 ret = -EINVAL;
1226 goto err;
1227 }
1228
1229 if (memcmp(data, ATH11K_BOARD_MAGIC, magic_len)) {
1230 ath11k_err(ab, "found invalid board magic\n");
1231 ret = -EINVAL;
1232 goto err;
1233 }
1234
1235 /* magic is padded to 4 bytes */
1236 magic_len = ALIGN(magic_len, 4);
1237 if (len < magic_len) {
1238 ath11k_err(ab, "failed: %s too small to contain board data, len: %zu\n",
1239 filepath, len);
1240 ret = -EINVAL;
1241 goto err;
1242 }
1243
1244 data += magic_len;
1245 len -= magic_len;
1246
1247 while (len > sizeof(struct ath11k_fw_ie)) {
1248 #if defined(__linux__)
1249 hdr = (struct ath11k_fw_ie *)data;
1250 #elif defined(__FreeBSD__)
1251 hdr = (const struct ath11k_fw_ie *)data;
1252 #endif
1253 ie_id = le32_to_cpu(hdr->id);
1254 ie_len = le32_to_cpu(hdr->len);
1255
1256 len -= sizeof(*hdr);
1257 data = hdr->data;
1258
1259 if (len < ALIGN(ie_len, 4)) {
1260 ath11k_err(ab, "invalid length for board ie_id %d ie_len %zu len %zu\n",
1261 ie_id, ie_len, len);
1262 ret = -EINVAL;
1263 goto err;
1264 }
1265
1266 if (ie_id == ie_id_match) {
1267 ret = ath11k_core_parse_bd_ie_board(ab, bd, data,
1268 ie_len,
1269 boardname,
1270 ie_id_match,
1271 name_id,
1272 data_id);
1273 if (ret == -ENOENT)
1274 /* no match found, continue */
1275 goto next;
1276 else if (ret)
1277 /* there was an error, bail out */
1278 goto err;
1279 /* either found or error, so stop searching */
1280 goto out;
1281 }
1282 next:
1283 /* jump over the padding */
1284 ie_len = ALIGN(ie_len, 4);
1285
1286 len -= ie_len;
1287 data += ie_len;
1288 }
1289
1290 out:
1291 if (!bd->data || !bd->len) {
1292 ath11k_dbg(ab, ATH11K_DBG_BOOT,
1293 "failed to fetch %s for %s from %s\n",
1294 ath11k_bd_ie_type_str(ie_id_match),
1295 boardname, filepath);
1296 ret = -ENODATA;
1297 goto err;
1298 }
1299
1300 return 0;
1301
1302 err:
1303 ath11k_core_free_bdf(ab, bd);
1304 return ret;
1305 }
1306
ath11k_core_fetch_board_data_api_1(struct ath11k_base * ab,struct ath11k_board_data * bd,const char * name)1307 int ath11k_core_fetch_board_data_api_1(struct ath11k_base *ab,
1308 struct ath11k_board_data *bd,
1309 const char *name)
1310 {
1311 bd->fw = ath11k_core_firmware_request(ab, name);
1312
1313 if (IS_ERR(bd->fw))
1314 return PTR_ERR(bd->fw);
1315
1316 bd->data = bd->fw->data;
1317 bd->len = bd->fw->size;
1318
1319 return 0;
1320 }
1321
1322 #define BOARD_NAME_SIZE 200
ath11k_core_fetch_bdf(struct ath11k_base * ab,struct ath11k_board_data * bd)1323 int ath11k_core_fetch_bdf(struct ath11k_base *ab, struct ath11k_board_data *bd)
1324 {
1325 char boardname[BOARD_NAME_SIZE], fallback_boardname[BOARD_NAME_SIZE];
1326 char *filename, filepath[100];
1327 int ret;
1328
1329 filename = ATH11K_BOARD_API2_FILE;
1330
1331 ret = ath11k_core_create_board_name(ab, boardname, sizeof(boardname));
1332 if (ret) {
1333 ath11k_err(ab, "failed to create board name: %d", ret);
1334 return ret;
1335 }
1336
1337 ab->bd_api = 2;
1338 ret = ath11k_core_fetch_board_data_api_n(ab, bd, boardname,
1339 ATH11K_BD_IE_BOARD,
1340 ATH11K_BD_IE_BOARD_NAME,
1341 ATH11K_BD_IE_BOARD_DATA);
1342 if (!ret)
1343 goto success;
1344
1345 ret = ath11k_core_create_fallback_board_name(ab, fallback_boardname,
1346 sizeof(fallback_boardname));
1347 if (ret) {
1348 ath11k_err(ab, "failed to create fallback board name: %d", ret);
1349 return ret;
1350 }
1351
1352 ret = ath11k_core_fetch_board_data_api_n(ab, bd, fallback_boardname,
1353 ATH11K_BD_IE_BOARD,
1354 ATH11K_BD_IE_BOARD_NAME,
1355 ATH11K_BD_IE_BOARD_DATA);
1356 if (!ret)
1357 goto success;
1358
1359 ab->bd_api = 1;
1360 ret = ath11k_core_fetch_board_data_api_1(ab, bd, ATH11K_DEFAULT_BOARD_FILE);
1361 if (ret) {
1362 ath11k_core_create_firmware_path(ab, filename,
1363 filepath, sizeof(filepath));
1364 ath11k_err(ab, "failed to fetch board data for %s from %s\n",
1365 boardname, filepath);
1366 if (memcmp(boardname, fallback_boardname, strlen(boardname)))
1367 ath11k_err(ab, "failed to fetch board data for %s from %s\n",
1368 fallback_boardname, filepath);
1369
1370 ath11k_err(ab, "failed to fetch board.bin from %s\n",
1371 ab->hw_params.fw.dir);
1372 return ret;
1373 }
1374
1375 success:
1376 ath11k_dbg(ab, ATH11K_DBG_BOOT, "using board api %d\n", ab->bd_api);
1377 return 0;
1378 }
1379
ath11k_core_fetch_regdb(struct ath11k_base * ab,struct ath11k_board_data * bd)1380 int ath11k_core_fetch_regdb(struct ath11k_base *ab, struct ath11k_board_data *bd)
1381 {
1382 char boardname[BOARD_NAME_SIZE], default_boardname[BOARD_NAME_SIZE];
1383 int ret;
1384
1385 ret = ath11k_core_create_board_name(ab, boardname, BOARD_NAME_SIZE);
1386 if (ret) {
1387 ath11k_dbg(ab, ATH11K_DBG_BOOT,
1388 "failed to create board name for regdb: %d", ret);
1389 goto exit;
1390 }
1391
1392 ret = ath11k_core_fetch_board_data_api_n(ab, bd, boardname,
1393 ATH11K_BD_IE_REGDB,
1394 ATH11K_BD_IE_REGDB_NAME,
1395 ATH11K_BD_IE_REGDB_DATA);
1396 if (!ret)
1397 goto exit;
1398
1399 ret = ath11k_core_create_bus_type_board_name(ab, default_boardname,
1400 BOARD_NAME_SIZE);
1401 if (ret) {
1402 ath11k_dbg(ab, ATH11K_DBG_BOOT,
1403 "failed to create default board name for regdb: %d", ret);
1404 goto exit;
1405 }
1406
1407 ret = ath11k_core_fetch_board_data_api_n(ab, bd, default_boardname,
1408 ATH11K_BD_IE_REGDB,
1409 ATH11K_BD_IE_REGDB_NAME,
1410 ATH11K_BD_IE_REGDB_DATA);
1411 if (!ret)
1412 goto exit;
1413
1414 ret = ath11k_core_fetch_board_data_api_1(ab, bd, ATH11K_REGDB_FILE_NAME);
1415 if (ret)
1416 ath11k_dbg(ab, ATH11K_DBG_BOOT, "failed to fetch %s from %s\n",
1417 ATH11K_REGDB_FILE_NAME, ab->hw_params.fw.dir);
1418
1419 exit:
1420 if (!ret)
1421 ath11k_dbg(ab, ATH11K_DBG_BOOT, "fetched regdb\n");
1422
1423 return ret;
1424 }
1425
ath11k_core_stop(struct ath11k_base * ab)1426 static void ath11k_core_stop(struct ath11k_base *ab)
1427 {
1428 if (!test_bit(ATH11K_FLAG_CRASH_FLUSH, &ab->dev_flags))
1429 ath11k_qmi_firmware_stop(ab);
1430
1431 ath11k_hif_stop(ab);
1432 ath11k_wmi_detach(ab);
1433 ath11k_dp_pdev_reo_cleanup(ab);
1434
1435 /* De-Init of components as needed */
1436 }
1437
ath11k_core_soc_create(struct ath11k_base * ab)1438 static int ath11k_core_soc_create(struct ath11k_base *ab)
1439 {
1440 int ret;
1441
1442 if (ath11k_ftm_mode) {
1443 ab->fw_mode = ATH11K_FIRMWARE_MODE_FTM;
1444 ath11k_info(ab, "Booting in factory test mode\n");
1445 }
1446
1447 ret = ath11k_qmi_init_service(ab);
1448 if (ret) {
1449 ath11k_err(ab, "failed to initialize qmi :%d\n", ret);
1450 return ret;
1451 }
1452
1453 ret = ath11k_debugfs_soc_create(ab);
1454 if (ret) {
1455 ath11k_err(ab, "failed to create ath11k debugfs\n");
1456 goto err_qmi_deinit;
1457 }
1458
1459 ret = ath11k_hif_power_up(ab);
1460 if (ret) {
1461 ath11k_err(ab, "failed to power up :%d\n", ret);
1462 goto err_debugfs_reg;
1463 }
1464
1465 return 0;
1466
1467 err_debugfs_reg:
1468 ath11k_debugfs_soc_destroy(ab);
1469 err_qmi_deinit:
1470 ath11k_qmi_deinit_service(ab);
1471 return ret;
1472 }
1473
ath11k_core_soc_destroy(struct ath11k_base * ab)1474 static void ath11k_core_soc_destroy(struct ath11k_base *ab)
1475 {
1476 ath11k_debugfs_soc_destroy(ab);
1477 ath11k_dp_free(ab);
1478 ath11k_reg_free(ab);
1479 ath11k_qmi_deinit_service(ab);
1480 }
1481
ath11k_core_pdev_create(struct ath11k_base * ab)1482 static int ath11k_core_pdev_create(struct ath11k_base *ab)
1483 {
1484 int ret;
1485
1486 ret = ath11k_debugfs_pdev_create(ab);
1487 if (ret) {
1488 ath11k_err(ab, "failed to create core pdev debugfs: %d\n", ret);
1489 return ret;
1490 }
1491
1492 ret = ath11k_dp_pdev_alloc(ab);
1493 if (ret) {
1494 ath11k_err(ab, "failed to attach DP pdev: %d\n", ret);
1495 goto err_pdev_debug;
1496 }
1497
1498 ret = ath11k_mac_register(ab);
1499 if (ret) {
1500 ath11k_err(ab, "failed register the radio with mac80211: %d\n", ret);
1501 goto err_dp_pdev_free;
1502 }
1503
1504 ret = ath11k_thermal_register(ab);
1505 if (ret) {
1506 ath11k_err(ab, "could not register thermal device: %d\n",
1507 ret);
1508 goto err_mac_unregister;
1509 }
1510
1511 ret = ath11k_spectral_init(ab);
1512 if (ret) {
1513 ath11k_err(ab, "failed to init spectral %d\n", ret);
1514 goto err_thermal_unregister;
1515 }
1516
1517 return 0;
1518
1519 err_thermal_unregister:
1520 ath11k_thermal_unregister(ab);
1521 err_mac_unregister:
1522 ath11k_mac_unregister(ab);
1523 err_dp_pdev_free:
1524 ath11k_dp_pdev_free(ab);
1525 err_pdev_debug:
1526 ath11k_debugfs_pdev_destroy(ab);
1527
1528 return ret;
1529 }
1530
ath11k_core_pdev_destroy(struct ath11k_base * ab)1531 static void ath11k_core_pdev_destroy(struct ath11k_base *ab)
1532 {
1533 ath11k_spectral_deinit(ab);
1534 ath11k_thermal_unregister(ab);
1535 ath11k_mac_unregister(ab);
1536 ath11k_hif_irq_disable(ab);
1537 ath11k_dp_pdev_free(ab);
1538 ath11k_debugfs_pdev_destroy(ab);
1539 }
1540
ath11k_core_start(struct ath11k_base * ab)1541 static int ath11k_core_start(struct ath11k_base *ab)
1542 {
1543 int ret;
1544
1545 ret = ath11k_wmi_attach(ab);
1546 if (ret) {
1547 ath11k_err(ab, "failed to attach wmi: %d\n", ret);
1548 return ret;
1549 }
1550
1551 ret = ath11k_htc_init(ab);
1552 if (ret) {
1553 ath11k_err(ab, "failed to init htc: %d\n", ret);
1554 goto err_wmi_detach;
1555 }
1556
1557 ret = ath11k_hif_start(ab);
1558 if (ret) {
1559 ath11k_err(ab, "failed to start HIF: %d\n", ret);
1560 goto err_wmi_detach;
1561 }
1562
1563 ret = ath11k_htc_wait_target(&ab->htc);
1564 if (ret) {
1565 ath11k_err(ab, "failed to connect to HTC: %d\n", ret);
1566 goto err_hif_stop;
1567 }
1568
1569 ret = ath11k_dp_htt_connect(&ab->dp);
1570 if (ret) {
1571 ath11k_err(ab, "failed to connect to HTT: %d\n", ret);
1572 goto err_hif_stop;
1573 }
1574
1575 ret = ath11k_wmi_connect(ab);
1576 if (ret) {
1577 ath11k_err(ab, "failed to connect wmi: %d\n", ret);
1578 goto err_hif_stop;
1579 }
1580
1581 ret = ath11k_htc_start(&ab->htc);
1582 if (ret) {
1583 ath11k_err(ab, "failed to start HTC: %d\n", ret);
1584 goto err_hif_stop;
1585 }
1586
1587 ret = ath11k_wmi_wait_for_service_ready(ab);
1588 if (ret) {
1589 ath11k_err(ab, "failed to receive wmi service ready event: %d\n",
1590 ret);
1591 goto err_hif_stop;
1592 }
1593
1594 ret = ath11k_mac_allocate(ab);
1595 if (ret) {
1596 ath11k_err(ab, "failed to create new hw device with mac80211 :%d\n",
1597 ret);
1598 goto err_hif_stop;
1599 }
1600
1601 ath11k_dp_pdev_pre_alloc(ab);
1602
1603 ret = ath11k_dp_pdev_reo_setup(ab);
1604 if (ret) {
1605 ath11k_err(ab, "failed to initialize reo destination rings: %d\n", ret);
1606 goto err_mac_destroy;
1607 }
1608
1609 ret = ath11k_wmi_cmd_init(ab);
1610 if (ret) {
1611 ath11k_err(ab, "failed to send wmi init cmd: %d\n", ret);
1612 goto err_reo_cleanup;
1613 }
1614
1615 ret = ath11k_wmi_wait_for_unified_ready(ab);
1616 if (ret) {
1617 ath11k_err(ab, "failed to receive wmi unified ready event: %d\n",
1618 ret);
1619 goto err_reo_cleanup;
1620 }
1621
1622 /* put hardware to DBS mode */
1623 if (ab->hw_params.single_pdev_only && ab->hw_params.num_rxmda_per_pdev > 1) {
1624 ret = ath11k_wmi_set_hw_mode(ab, WMI_HOST_HW_MODE_DBS);
1625 if (ret) {
1626 ath11k_err(ab, "failed to send dbs mode: %d\n", ret);
1627 goto err_hif_stop;
1628 }
1629 }
1630
1631 ret = ath11k_dp_tx_htt_h2t_ver_req_msg(ab);
1632 if (ret) {
1633 ath11k_err(ab, "failed to send htt version request message: %d\n",
1634 ret);
1635 goto err_reo_cleanup;
1636 }
1637
1638 return 0;
1639
1640 err_reo_cleanup:
1641 ath11k_dp_pdev_reo_cleanup(ab);
1642 err_mac_destroy:
1643 ath11k_mac_destroy(ab);
1644 err_hif_stop:
1645 ath11k_hif_stop(ab);
1646 err_wmi_detach:
1647 ath11k_wmi_detach(ab);
1648
1649 return ret;
1650 }
1651
ath11k_core_start_firmware(struct ath11k_base * ab,enum ath11k_firmware_mode mode)1652 static int ath11k_core_start_firmware(struct ath11k_base *ab,
1653 enum ath11k_firmware_mode mode)
1654 {
1655 int ret;
1656
1657 ath11k_ce_get_shadow_config(ab, &ab->qmi.ce_cfg.shadow_reg_v2,
1658 &ab->qmi.ce_cfg.shadow_reg_v2_len);
1659
1660 ret = ath11k_qmi_firmware_start(ab, mode);
1661 if (ret) {
1662 ath11k_err(ab, "failed to send firmware start: %d\n", ret);
1663 return ret;
1664 }
1665
1666 return ret;
1667 }
1668
ath11k_core_qmi_firmware_ready(struct ath11k_base * ab)1669 int ath11k_core_qmi_firmware_ready(struct ath11k_base *ab)
1670 {
1671 int ret;
1672
1673 ret = ath11k_core_start_firmware(ab, ab->fw_mode);
1674 if (ret) {
1675 ath11k_err(ab, "failed to start firmware: %d\n", ret);
1676 return ret;
1677 }
1678
1679 ret = ath11k_ce_init_pipes(ab);
1680 if (ret) {
1681 ath11k_err(ab, "failed to initialize CE: %d\n", ret);
1682 goto err_firmware_stop;
1683 }
1684
1685 ret = ath11k_dp_alloc(ab);
1686 if (ret) {
1687 ath11k_err(ab, "failed to init DP: %d\n", ret);
1688 goto err_firmware_stop;
1689 }
1690
1691 switch (ath11k_crypto_mode) {
1692 case ATH11K_CRYPT_MODE_SW:
1693 set_bit(ATH11K_FLAG_HW_CRYPTO_DISABLED, &ab->dev_flags);
1694 set_bit(ATH11K_FLAG_RAW_MODE, &ab->dev_flags);
1695 break;
1696 case ATH11K_CRYPT_MODE_HW:
1697 clear_bit(ATH11K_FLAG_HW_CRYPTO_DISABLED, &ab->dev_flags);
1698 clear_bit(ATH11K_FLAG_RAW_MODE, &ab->dev_flags);
1699 break;
1700 default:
1701 ath11k_info(ab, "invalid crypto_mode: %d\n", ath11k_crypto_mode);
1702 return -EINVAL;
1703 }
1704
1705 if (ath11k_frame_mode == ATH11K_HW_TXRX_RAW)
1706 set_bit(ATH11K_FLAG_RAW_MODE, &ab->dev_flags);
1707
1708 mutex_lock(&ab->core_lock);
1709 ret = ath11k_core_start(ab);
1710 if (ret) {
1711 ath11k_err(ab, "failed to start core: %d\n", ret);
1712 goto err_dp_free;
1713 }
1714
1715 ret = ath11k_core_pdev_create(ab);
1716 if (ret) {
1717 ath11k_err(ab, "failed to create pdev core: %d\n", ret);
1718 goto err_core_stop;
1719 }
1720 ath11k_hif_irq_enable(ab);
1721 mutex_unlock(&ab->core_lock);
1722
1723 return 0;
1724
1725 err_core_stop:
1726 ath11k_core_stop(ab);
1727 ath11k_mac_destroy(ab);
1728 err_dp_free:
1729 ath11k_dp_free(ab);
1730 mutex_unlock(&ab->core_lock);
1731 err_firmware_stop:
1732 ath11k_qmi_firmware_stop(ab);
1733
1734 return ret;
1735 }
1736
ath11k_core_reconfigure_on_crash(struct ath11k_base * ab)1737 static int ath11k_core_reconfigure_on_crash(struct ath11k_base *ab)
1738 {
1739 int ret;
1740
1741 mutex_lock(&ab->core_lock);
1742 ath11k_thermal_unregister(ab);
1743 ath11k_hif_irq_disable(ab);
1744 ath11k_dp_pdev_free(ab);
1745 ath11k_spectral_deinit(ab);
1746 ath11k_hif_stop(ab);
1747 ath11k_wmi_detach(ab);
1748 ath11k_dp_pdev_reo_cleanup(ab);
1749 mutex_unlock(&ab->core_lock);
1750
1751 ath11k_dp_free(ab);
1752 ath11k_hal_srng_deinit(ab);
1753
1754 ab->free_vdev_map = (1LL << (ab->num_radios * TARGET_NUM_VDEVS(ab))) - 1;
1755
1756 ret = ath11k_hal_srng_init(ab);
1757 if (ret)
1758 return ret;
1759
1760 clear_bit(ATH11K_FLAG_CRASH_FLUSH, &ab->dev_flags);
1761
1762 ret = ath11k_core_qmi_firmware_ready(ab);
1763 if (ret)
1764 goto err_hal_srng_deinit;
1765
1766 clear_bit(ATH11K_FLAG_RECOVERY, &ab->dev_flags);
1767
1768 return 0;
1769
1770 err_hal_srng_deinit:
1771 ath11k_hal_srng_deinit(ab);
1772 return ret;
1773 }
1774
ath11k_core_halt(struct ath11k * ar)1775 void ath11k_core_halt(struct ath11k *ar)
1776 {
1777 struct ath11k_base *ab = ar->ab;
1778
1779 lockdep_assert_held(&ar->conf_mutex);
1780
1781 ar->num_created_vdevs = 0;
1782 ar->allocated_vdev_map = 0;
1783
1784 ath11k_mac_scan_finish(ar);
1785 ath11k_mac_peer_cleanup_all(ar);
1786 cancel_delayed_work_sync(&ar->scan.timeout);
1787 cancel_work_sync(&ar->regd_update_work);
1788 cancel_work_sync(&ab->update_11d_work);
1789
1790 rcu_assign_pointer(ab->pdevs_active[ar->pdev_idx], NULL);
1791 synchronize_rcu();
1792 INIT_LIST_HEAD(&ar->arvifs);
1793 idr_init(&ar->txmgmt_idr);
1794 }
1795
ath11k_update_11d(struct work_struct * work)1796 static void ath11k_update_11d(struct work_struct *work)
1797 {
1798 struct ath11k_base *ab = container_of(work, struct ath11k_base, update_11d_work);
1799 struct ath11k *ar;
1800 struct ath11k_pdev *pdev;
1801 struct wmi_set_current_country_params set_current_param = {};
1802 int ret, i;
1803
1804 spin_lock_bh(&ab->base_lock);
1805 memcpy(&set_current_param.alpha2, &ab->new_alpha2, 2);
1806 spin_unlock_bh(&ab->base_lock);
1807
1808 ath11k_dbg(ab, ATH11K_DBG_WMI, "update 11d new cc %c%c\n",
1809 set_current_param.alpha2[0],
1810 set_current_param.alpha2[1]);
1811
1812 for (i = 0; i < ab->num_radios; i++) {
1813 pdev = &ab->pdevs[i];
1814 ar = pdev->ar;
1815
1816 memcpy(&ar->alpha2, &set_current_param.alpha2, 2);
1817 ret = ath11k_wmi_send_set_current_country_cmd(ar, &set_current_param);
1818 if (ret)
1819 ath11k_warn(ar->ab,
1820 "pdev id %d failed set current country code: %d\n",
1821 i, ret);
1822 }
1823 }
1824
ath11k_core_pre_reconfigure_recovery(struct ath11k_base * ab)1825 void ath11k_core_pre_reconfigure_recovery(struct ath11k_base *ab)
1826 {
1827 struct ath11k *ar;
1828 struct ath11k_pdev *pdev;
1829 int i;
1830
1831 spin_lock_bh(&ab->base_lock);
1832 ab->stats.fw_crash_counter++;
1833 spin_unlock_bh(&ab->base_lock);
1834
1835 for (i = 0; i < ab->num_radios; i++) {
1836 pdev = &ab->pdevs[i];
1837 ar = pdev->ar;
1838 if (!ar || ar->state == ATH11K_STATE_OFF ||
1839 ar->state == ATH11K_STATE_FTM)
1840 continue;
1841
1842 ieee80211_stop_queues(ar->hw);
1843 ath11k_mac_drain_tx(ar);
1844 ar->state_11d = ATH11K_11D_IDLE;
1845 complete(&ar->completed_11d_scan);
1846 complete(&ar->scan.started);
1847 complete_all(&ar->scan.completed);
1848 complete(&ar->scan.on_channel);
1849 complete(&ar->peer_assoc_done);
1850 complete(&ar->peer_delete_done);
1851 complete(&ar->install_key_done);
1852 complete(&ar->vdev_setup_done);
1853 complete(&ar->vdev_delete_done);
1854 complete(&ar->bss_survey_done);
1855 complete(&ar->thermal.wmi_sync);
1856
1857 wake_up(&ar->dp.tx_empty_waitq);
1858 idr_for_each(&ar->txmgmt_idr,
1859 ath11k_mac_tx_mgmt_pending_free, ar);
1860 idr_destroy(&ar->txmgmt_idr);
1861 wake_up(&ar->txmgmt_empty_waitq);
1862
1863 ar->monitor_vdev_id = -1;
1864 clear_bit(ATH11K_FLAG_MONITOR_STARTED, &ar->monitor_flags);
1865 clear_bit(ATH11K_FLAG_MONITOR_VDEV_CREATED, &ar->monitor_flags);
1866 }
1867
1868 wake_up(&ab->wmi_ab.tx_credits_wq);
1869 wake_up(&ab->peer_mapping_wq);
1870
1871 reinit_completion(&ab->driver_recovery);
1872 }
1873
ath11k_core_post_reconfigure_recovery(struct ath11k_base * ab)1874 static void ath11k_core_post_reconfigure_recovery(struct ath11k_base *ab)
1875 {
1876 struct ath11k *ar;
1877 struct ath11k_pdev *pdev;
1878 int i;
1879
1880 for (i = 0; i < ab->num_radios; i++) {
1881 pdev = &ab->pdevs[i];
1882 ar = pdev->ar;
1883 if (!ar || ar->state == ATH11K_STATE_OFF)
1884 continue;
1885
1886 mutex_lock(&ar->conf_mutex);
1887
1888 switch (ar->state) {
1889 case ATH11K_STATE_ON:
1890 ar->state = ATH11K_STATE_RESTARTING;
1891 ath11k_core_halt(ar);
1892 ieee80211_restart_hw(ar->hw);
1893 break;
1894 case ATH11K_STATE_OFF:
1895 ath11k_warn(ab,
1896 "cannot restart radio %d that hasn't been started\n",
1897 i);
1898 break;
1899 case ATH11K_STATE_RESTARTING:
1900 break;
1901 case ATH11K_STATE_RESTARTED:
1902 ar->state = ATH11K_STATE_WEDGED;
1903 fallthrough;
1904 case ATH11K_STATE_WEDGED:
1905 ath11k_warn(ab,
1906 "device is wedged, will not restart radio %d\n", i);
1907 break;
1908 case ATH11K_STATE_FTM:
1909 ath11k_dbg(ab, ATH11K_DBG_TESTMODE,
1910 "fw mode reset done radio %d\n", i);
1911 break;
1912 }
1913
1914 mutex_unlock(&ar->conf_mutex);
1915 }
1916 complete(&ab->driver_recovery);
1917 }
1918
ath11k_core_restart(struct work_struct * work)1919 static void ath11k_core_restart(struct work_struct *work)
1920 {
1921 struct ath11k_base *ab = container_of(work, struct ath11k_base, restart_work);
1922 int ret;
1923
1924 ret = ath11k_core_reconfigure_on_crash(ab);
1925 if (ret) {
1926 ath11k_err(ab, "failed to reconfigure driver on crash recovery\n");
1927 return;
1928 }
1929
1930 if (ab->is_reset)
1931 complete_all(&ab->reconfigure_complete);
1932
1933 if (!ab->is_reset)
1934 ath11k_core_post_reconfigure_recovery(ab);
1935 }
1936
ath11k_core_reset(struct work_struct * work)1937 static void ath11k_core_reset(struct work_struct *work)
1938 {
1939 struct ath11k_base *ab = container_of(work, struct ath11k_base, reset_work);
1940 int reset_count, fail_cont_count;
1941 long time_left;
1942
1943 if (!(test_bit(ATH11K_FLAG_REGISTERED, &ab->dev_flags))) {
1944 ath11k_warn(ab, "ignore reset dev flags 0x%lx\n", ab->dev_flags);
1945 return;
1946 }
1947
1948 /* Sometimes the recovery will fail and then the next all recovery fail,
1949 * this is to avoid infinite recovery since it can not recovery success.
1950 */
1951 fail_cont_count = atomic_read(&ab->fail_cont_count);
1952
1953 if (fail_cont_count >= ATH11K_RESET_MAX_FAIL_COUNT_FINAL)
1954 return;
1955
1956 if (fail_cont_count >= ATH11K_RESET_MAX_FAIL_COUNT_FIRST &&
1957 time_before(jiffies, ab->reset_fail_timeout))
1958 return;
1959
1960 reset_count = atomic_inc_return(&ab->reset_count);
1961
1962 if (reset_count > 1) {
1963 /* Sometimes it happened another reset worker before the previous one
1964 * completed, then the second reset worker will destroy the previous one,
1965 * thus below is to avoid that.
1966 */
1967 ath11k_warn(ab, "already resetting count %d\n", reset_count);
1968
1969 reinit_completion(&ab->reset_complete);
1970 time_left = wait_for_completion_timeout(&ab->reset_complete,
1971 ATH11K_RESET_TIMEOUT_HZ);
1972
1973 if (time_left) {
1974 ath11k_dbg(ab, ATH11K_DBG_BOOT, "to skip reset\n");
1975 atomic_dec(&ab->reset_count);
1976 return;
1977 }
1978
1979 ab->reset_fail_timeout = jiffies + ATH11K_RESET_FAIL_TIMEOUT_HZ;
1980 /* Record the continuous recovery fail count when recovery failed*/
1981 atomic_inc(&ab->fail_cont_count);
1982 }
1983
1984 ath11k_dbg(ab, ATH11K_DBG_BOOT, "reset starting\n");
1985
1986 ab->is_reset = true;
1987 atomic_set(&ab->recovery_count, 0);
1988 reinit_completion(&ab->recovery_start);
1989 atomic_set(&ab->recovery_start_count, 0);
1990
1991 ath11k_core_pre_reconfigure_recovery(ab);
1992
1993 reinit_completion(&ab->reconfigure_complete);
1994 ath11k_core_post_reconfigure_recovery(ab);
1995
1996 ath11k_dbg(ab, ATH11K_DBG_BOOT, "waiting recovery start...\n");
1997
1998 time_left = wait_for_completion_timeout(&ab->recovery_start,
1999 ATH11K_RECOVER_START_TIMEOUT_HZ);
2000
2001 ath11k_hif_power_down(ab);
2002 ath11k_hif_power_up(ab);
2003
2004 ath11k_dbg(ab, ATH11K_DBG_BOOT, "reset started\n");
2005 }
2006
ath11k_init_hw_params(struct ath11k_base * ab)2007 static int ath11k_init_hw_params(struct ath11k_base *ab)
2008 {
2009 const struct ath11k_hw_params *hw_params = NULL;
2010 int i;
2011
2012 for (i = 0; i < ARRAY_SIZE(ath11k_hw_params); i++) {
2013 hw_params = &ath11k_hw_params[i];
2014
2015 if (hw_params->hw_rev == ab->hw_rev)
2016 break;
2017 }
2018
2019 if (i == ARRAY_SIZE(ath11k_hw_params)) {
2020 ath11k_err(ab, "Unsupported hardware version: 0x%x\n", ab->hw_rev);
2021 return -EINVAL;
2022 }
2023
2024 ab->hw_params = *hw_params;
2025
2026 ath11k_info(ab, "%s\n", ab->hw_params.name);
2027
2028 return 0;
2029 }
2030
ath11k_core_pre_init(struct ath11k_base * ab)2031 int ath11k_core_pre_init(struct ath11k_base *ab)
2032 {
2033 int ret;
2034
2035 ret = ath11k_init_hw_params(ab);
2036 if (ret) {
2037 ath11k_err(ab, "failed to get hw params: %d\n", ret);
2038 return ret;
2039 }
2040
2041 return 0;
2042 }
2043 EXPORT_SYMBOL(ath11k_core_pre_init);
2044
ath11k_core_init(struct ath11k_base * ab)2045 int ath11k_core_init(struct ath11k_base *ab)
2046 {
2047 int ret;
2048
2049 ret = ath11k_core_soc_create(ab);
2050 if (ret) {
2051 ath11k_err(ab, "failed to create soc core: %d\n", ret);
2052 return ret;
2053 }
2054
2055 return 0;
2056 }
2057 EXPORT_SYMBOL(ath11k_core_init);
2058
ath11k_core_deinit(struct ath11k_base * ab)2059 void ath11k_core_deinit(struct ath11k_base *ab)
2060 {
2061 mutex_lock(&ab->core_lock);
2062
2063 ath11k_core_pdev_destroy(ab);
2064 ath11k_core_stop(ab);
2065
2066 mutex_unlock(&ab->core_lock);
2067
2068 ath11k_hif_power_down(ab);
2069 ath11k_mac_destroy(ab);
2070 ath11k_core_soc_destroy(ab);
2071 }
2072 EXPORT_SYMBOL(ath11k_core_deinit);
2073
ath11k_core_free(struct ath11k_base * ab)2074 void ath11k_core_free(struct ath11k_base *ab)
2075 {
2076 destroy_workqueue(ab->workqueue_aux);
2077 destroy_workqueue(ab->workqueue);
2078
2079 kfree(ab);
2080 }
2081 EXPORT_SYMBOL(ath11k_core_free);
2082
ath11k_core_alloc(struct device * dev,size_t priv_size,enum ath11k_bus bus)2083 struct ath11k_base *ath11k_core_alloc(struct device *dev, size_t priv_size,
2084 enum ath11k_bus bus)
2085 {
2086 struct ath11k_base *ab;
2087
2088 ab = kzalloc(sizeof(*ab) + priv_size, GFP_KERNEL);
2089 if (!ab)
2090 return NULL;
2091
2092 init_completion(&ab->driver_recovery);
2093
2094 ab->workqueue = create_singlethread_workqueue("ath11k_wq");
2095 if (!ab->workqueue)
2096 goto err_sc_free;
2097
2098 ab->workqueue_aux = create_singlethread_workqueue("ath11k_aux_wq");
2099 if (!ab->workqueue_aux)
2100 goto err_free_wq;
2101
2102 mutex_init(&ab->core_lock);
2103 mutex_init(&ab->tbl_mtx_lock);
2104 spin_lock_init(&ab->base_lock);
2105 mutex_init(&ab->vdev_id_11d_lock);
2106 init_completion(&ab->reset_complete);
2107 init_completion(&ab->reconfigure_complete);
2108 init_completion(&ab->recovery_start);
2109
2110 INIT_LIST_HEAD(&ab->peers);
2111 init_waitqueue_head(&ab->peer_mapping_wq);
2112 init_waitqueue_head(&ab->wmi_ab.tx_credits_wq);
2113 init_waitqueue_head(&ab->qmi.cold_boot_waitq);
2114 INIT_WORK(&ab->restart_work, ath11k_core_restart);
2115 INIT_WORK(&ab->update_11d_work, ath11k_update_11d);
2116 INIT_WORK(&ab->reset_work, ath11k_core_reset);
2117 timer_setup(&ab->rx_replenish_retry, ath11k_ce_rx_replenish_retry, 0);
2118 init_completion(&ab->htc_suspend);
2119 init_completion(&ab->wow.wakeup_completed);
2120
2121 ab->dev = dev;
2122 ab->hif.bus = bus;
2123
2124 return ab;
2125
2126 err_free_wq:
2127 destroy_workqueue(ab->workqueue);
2128 err_sc_free:
2129 kfree(ab);
2130 return NULL;
2131 }
2132 EXPORT_SYMBOL(ath11k_core_alloc);
2133
2134 MODULE_DESCRIPTION("Core module for Qualcomm Atheros 802.11ax wireless LAN cards.");
2135 MODULE_LICENSE("Dual BSD/GPL");
2136