1 // SPDX-License-Identifier: ISC
2 /*
3 * Copyright (c) 2005-2011 Atheros Communications Inc.
4 * Copyright (c) 2011-2017 Qualcomm Atheros, Inc.
5 * Copyright (c) 2018, The Linux Foundation. All rights reserved.
6 * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
7 * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
8 */
9
10 #include <linux/export.h>
11
12 #include "core.h"
13 #include "htc.h"
14 #include "htt.h"
15 #include "txrx.h"
16 #include "debug.h"
17 #include "trace.h"
18 #include "mac.h"
19
20 #include <linux/log2.h>
21 #include <linux/bitfield.h>
22
23 /* when under memory pressure rx ring refill may fail and needs a retry */
24 #define HTT_RX_RING_REFILL_RETRY_MS 50
25
26 #define HTT_RX_RING_REFILL_RESCHED_MS 5
27
28 /* shortcut to interpret a raw memory buffer as a rx descriptor */
29 #define HTT_RX_BUF_TO_RX_DESC(hw, buf) ath10k_htt_rx_desc_from_raw_buffer(hw, buf)
30
31 static int ath10k_htt_rx_get_csum_state(struct ath10k_hw_params *hw, struct sk_buff *skb);
32
33 static struct sk_buff *
ath10k_htt_rx_find_skb_paddr(struct ath10k * ar,u64 paddr)34 ath10k_htt_rx_find_skb_paddr(struct ath10k *ar, u64 paddr)
35 {
36 struct ath10k_skb_rxcb *rxcb;
37
38 hash_for_each_possible(ar->htt.rx_ring.skb_table, rxcb, hlist, paddr)
39 if (rxcb->paddr == paddr)
40 return ATH10K_RXCB_SKB(rxcb);
41
42 WARN_ON_ONCE(1);
43 return NULL;
44 }
45
ath10k_htt_rx_ring_free(struct ath10k_htt * htt)46 static void ath10k_htt_rx_ring_free(struct ath10k_htt *htt)
47 {
48 struct sk_buff *skb;
49 struct ath10k_skb_rxcb *rxcb;
50 struct hlist_node *n;
51 int i;
52
53 if (htt->rx_ring.in_ord_rx) {
54 hash_for_each_safe(htt->rx_ring.skb_table, i, n, rxcb, hlist) {
55 skb = ATH10K_RXCB_SKB(rxcb);
56 dma_unmap_single(htt->ar->dev, rxcb->paddr,
57 skb->len + skb_tailroom(skb),
58 DMA_FROM_DEVICE);
59 hash_del(&rxcb->hlist);
60 dev_kfree_skb_any(skb);
61 }
62 } else {
63 for (i = 0; i < htt->rx_ring.size; i++) {
64 skb = htt->rx_ring.netbufs_ring[i];
65 if (!skb)
66 continue;
67
68 rxcb = ATH10K_SKB_RXCB(skb);
69 dma_unmap_single(htt->ar->dev, rxcb->paddr,
70 skb->len + skb_tailroom(skb),
71 DMA_FROM_DEVICE);
72 dev_kfree_skb_any(skb);
73 }
74 }
75
76 htt->rx_ring.fill_cnt = 0;
77 hash_init(htt->rx_ring.skb_table);
78 memset(htt->rx_ring.netbufs_ring, 0,
79 htt->rx_ring.size * sizeof(htt->rx_ring.netbufs_ring[0]));
80 }
81
ath10k_htt_get_rx_ring_size_32(struct ath10k_htt * htt)82 static size_t ath10k_htt_get_rx_ring_size_32(struct ath10k_htt *htt)
83 {
84 return htt->rx_ring.size * sizeof(htt->rx_ring.paddrs_ring_32);
85 }
86
ath10k_htt_get_rx_ring_size_64(struct ath10k_htt * htt)87 static size_t ath10k_htt_get_rx_ring_size_64(struct ath10k_htt *htt)
88 {
89 return htt->rx_ring.size * sizeof(htt->rx_ring.paddrs_ring_64);
90 }
91
ath10k_htt_config_paddrs_ring_32(struct ath10k_htt * htt,void * vaddr)92 static void ath10k_htt_config_paddrs_ring_32(struct ath10k_htt *htt,
93 void *vaddr)
94 {
95 htt->rx_ring.paddrs_ring_32 = vaddr;
96 }
97
ath10k_htt_config_paddrs_ring_64(struct ath10k_htt * htt,void * vaddr)98 static void ath10k_htt_config_paddrs_ring_64(struct ath10k_htt *htt,
99 void *vaddr)
100 {
101 htt->rx_ring.paddrs_ring_64 = vaddr;
102 }
103
ath10k_htt_set_paddrs_ring_32(struct ath10k_htt * htt,dma_addr_t paddr,int idx)104 static void ath10k_htt_set_paddrs_ring_32(struct ath10k_htt *htt,
105 dma_addr_t paddr, int idx)
106 {
107 htt->rx_ring.paddrs_ring_32[idx] = __cpu_to_le32(paddr);
108 }
109
ath10k_htt_set_paddrs_ring_64(struct ath10k_htt * htt,dma_addr_t paddr,int idx)110 static void ath10k_htt_set_paddrs_ring_64(struct ath10k_htt *htt,
111 dma_addr_t paddr, int idx)
112 {
113 htt->rx_ring.paddrs_ring_64[idx] = __cpu_to_le64(paddr);
114 }
115
ath10k_htt_reset_paddrs_ring_32(struct ath10k_htt * htt,int idx)116 static void ath10k_htt_reset_paddrs_ring_32(struct ath10k_htt *htt, int idx)
117 {
118 htt->rx_ring.paddrs_ring_32[idx] = 0;
119 }
120
ath10k_htt_reset_paddrs_ring_64(struct ath10k_htt * htt,int idx)121 static void ath10k_htt_reset_paddrs_ring_64(struct ath10k_htt *htt, int idx)
122 {
123 htt->rx_ring.paddrs_ring_64[idx] = 0;
124 }
125
ath10k_htt_get_vaddr_ring_32(struct ath10k_htt * htt)126 static void *ath10k_htt_get_vaddr_ring_32(struct ath10k_htt *htt)
127 {
128 return (void *)htt->rx_ring.paddrs_ring_32;
129 }
130
ath10k_htt_get_vaddr_ring_64(struct ath10k_htt * htt)131 static void *ath10k_htt_get_vaddr_ring_64(struct ath10k_htt *htt)
132 {
133 return (void *)htt->rx_ring.paddrs_ring_64;
134 }
135
__ath10k_htt_rx_ring_fill_n(struct ath10k_htt * htt,int num)136 static int __ath10k_htt_rx_ring_fill_n(struct ath10k_htt *htt, int num)
137 {
138 struct ath10k_hw_params *hw = &htt->ar->hw_params;
139 struct htt_rx_desc *rx_desc;
140 struct ath10k_skb_rxcb *rxcb;
141 struct sk_buff *skb;
142 dma_addr_t paddr;
143 int ret = 0, idx;
144
145 /* The Full Rx Reorder firmware has no way of telling the host
146 * implicitly when it copied HTT Rx Ring buffers to MAC Rx Ring.
147 * To keep things simple make sure ring is always half empty. This
148 * guarantees there'll be no replenishment overruns possible.
149 */
150 BUILD_BUG_ON(HTT_RX_RING_FILL_LEVEL >= HTT_RX_RING_SIZE / 2);
151
152 idx = __le32_to_cpu(*htt->rx_ring.alloc_idx.vaddr);
153
154 if (idx < 0 || idx >= htt->rx_ring.size) {
155 ath10k_err(htt->ar, "rx ring index is not valid, firmware malfunctioning?\n");
156 idx &= htt->rx_ring.size_mask;
157 ret = -ENOMEM;
158 goto fail;
159 }
160
161 while (num > 0) {
162 skb = dev_alloc_skb(HTT_RX_BUF_SIZE + HTT_RX_DESC_ALIGN);
163 if (!skb) {
164 ret = -ENOMEM;
165 goto fail;
166 }
167
168 if (!IS_ALIGNED((unsigned long)skb->data, HTT_RX_DESC_ALIGN))
169 skb_pull(skb,
170 PTR_ALIGN(skb->data, HTT_RX_DESC_ALIGN) -
171 skb->data);
172
173 /* Clear rx_desc attention word before posting to Rx ring */
174 rx_desc = HTT_RX_BUF_TO_RX_DESC(hw, skb->data);
175 ath10k_htt_rx_desc_get_attention(hw, rx_desc)->flags = __cpu_to_le32(0);
176
177 paddr = dma_map_single(htt->ar->dev, skb->data,
178 skb->len + skb_tailroom(skb),
179 DMA_FROM_DEVICE);
180
181 if (unlikely(dma_mapping_error(htt->ar->dev, paddr))) {
182 dev_kfree_skb_any(skb);
183 ret = -ENOMEM;
184 goto fail;
185 }
186
187 rxcb = ATH10K_SKB_RXCB(skb);
188 rxcb->paddr = paddr;
189 htt->rx_ring.netbufs_ring[idx] = skb;
190 ath10k_htt_set_paddrs_ring(htt, paddr, idx);
191 htt->rx_ring.fill_cnt++;
192
193 if (htt->rx_ring.in_ord_rx) {
194 hash_add(htt->rx_ring.skb_table,
195 &ATH10K_SKB_RXCB(skb)->hlist,
196 paddr);
197 }
198
199 num--;
200 idx++;
201 idx &= htt->rx_ring.size_mask;
202 }
203
204 fail:
205 /*
206 * Make sure the rx buffer is updated before available buffer
207 * index to avoid any potential rx ring corruption.
208 */
209 mb();
210 *htt->rx_ring.alloc_idx.vaddr = __cpu_to_le32(idx);
211 return ret;
212 }
213
ath10k_htt_rx_ring_fill_n(struct ath10k_htt * htt,int num)214 static int ath10k_htt_rx_ring_fill_n(struct ath10k_htt *htt, int num)
215 {
216 lockdep_assert_held(&htt->rx_ring.lock);
217 return __ath10k_htt_rx_ring_fill_n(htt, num);
218 }
219
ath10k_htt_rx_msdu_buff_replenish(struct ath10k_htt * htt)220 static void ath10k_htt_rx_msdu_buff_replenish(struct ath10k_htt *htt)
221 {
222 int ret, num_deficit, num_to_fill;
223
224 /* Refilling the whole RX ring buffer proves to be a bad idea. The
225 * reason is RX may take up significant amount of CPU cycles and starve
226 * other tasks, e.g. TX on an ethernet device while acting as a bridge
227 * with ath10k wlan interface. This ended up with very poor performance
228 * once CPU the host system was overwhelmed with RX on ath10k.
229 *
230 * By limiting the number of refills the replenishing occurs
231 * progressively. This in turns makes use of the fact tasklets are
232 * processed in FIFO order. This means actual RX processing can starve
233 * out refilling. If there's not enough buffers on RX ring FW will not
234 * report RX until it is refilled with enough buffers. This
235 * automatically balances load wrt to CPU power.
236 *
237 * This probably comes at a cost of lower maximum throughput but
238 * improves the average and stability.
239 */
240 spin_lock_bh(&htt->rx_ring.lock);
241 num_deficit = htt->rx_ring.fill_level - htt->rx_ring.fill_cnt;
242 num_to_fill = min(ATH10K_HTT_MAX_NUM_REFILL, num_deficit);
243 num_deficit -= num_to_fill;
244 ret = ath10k_htt_rx_ring_fill_n(htt, num_to_fill);
245 if (ret == -ENOMEM) {
246 /*
247 * Failed to fill it to the desired level -
248 * we'll start a timer and try again next time.
249 * As long as enough buffers are left in the ring for
250 * another A-MPDU rx, no special recovery is needed.
251 */
252 mod_timer(&htt->rx_ring.refill_retry_timer, jiffies +
253 msecs_to_jiffies(HTT_RX_RING_REFILL_RETRY_MS));
254 } else if (num_deficit > 0) {
255 mod_timer(&htt->rx_ring.refill_retry_timer, jiffies +
256 msecs_to_jiffies(HTT_RX_RING_REFILL_RESCHED_MS));
257 }
258 spin_unlock_bh(&htt->rx_ring.lock);
259 }
260
ath10k_htt_rx_ring_refill_retry(struct timer_list * t)261 static void ath10k_htt_rx_ring_refill_retry(struct timer_list *t)
262 {
263 struct ath10k_htt *htt = timer_container_of(htt, t,
264 rx_ring.refill_retry_timer);
265
266 ath10k_htt_rx_msdu_buff_replenish(htt);
267 }
268
ath10k_htt_rx_ring_refill(struct ath10k * ar)269 int ath10k_htt_rx_ring_refill(struct ath10k *ar)
270 {
271 struct ath10k_htt *htt = &ar->htt;
272 int ret;
273
274 if (ar->bus_param.dev_type == ATH10K_DEV_TYPE_HL)
275 return 0;
276
277 spin_lock_bh(&htt->rx_ring.lock);
278 ret = ath10k_htt_rx_ring_fill_n(htt, (htt->rx_ring.fill_level -
279 htt->rx_ring.fill_cnt));
280
281 if (ret)
282 ath10k_htt_rx_ring_free(htt);
283
284 spin_unlock_bh(&htt->rx_ring.lock);
285
286 return ret;
287 }
288
ath10k_htt_rx_free(struct ath10k_htt * htt)289 void ath10k_htt_rx_free(struct ath10k_htt *htt)
290 {
291 if (htt->ar->bus_param.dev_type == ATH10K_DEV_TYPE_HL)
292 return;
293
294 timer_delete_sync(&htt->rx_ring.refill_retry_timer);
295
296 skb_queue_purge(&htt->rx_msdus_q);
297 skb_queue_purge(&htt->rx_in_ord_compl_q);
298 skb_queue_purge(&htt->tx_fetch_ind_q);
299
300 spin_lock_bh(&htt->rx_ring.lock);
301 ath10k_htt_rx_ring_free(htt);
302 spin_unlock_bh(&htt->rx_ring.lock);
303
304 dma_free_coherent(htt->ar->dev,
305 ath10k_htt_get_rx_ring_size(htt),
306 ath10k_htt_get_vaddr_ring(htt),
307 htt->rx_ring.base_paddr);
308
309 ath10k_htt_config_paddrs_ring(htt, NULL);
310
311 dma_free_coherent(htt->ar->dev,
312 sizeof(*htt->rx_ring.alloc_idx.vaddr),
313 htt->rx_ring.alloc_idx.vaddr,
314 htt->rx_ring.alloc_idx.paddr);
315 htt->rx_ring.alloc_idx.vaddr = NULL;
316
317 kfree(htt->rx_ring.netbufs_ring);
318 htt->rx_ring.netbufs_ring = NULL;
319 }
320
ath10k_htt_rx_netbuf_pop(struct ath10k_htt * htt)321 static inline struct sk_buff *ath10k_htt_rx_netbuf_pop(struct ath10k_htt *htt)
322 {
323 struct ath10k *ar = htt->ar;
324 int idx;
325 struct sk_buff *msdu;
326
327 lockdep_assert_held(&htt->rx_ring.lock);
328
329 if (htt->rx_ring.fill_cnt == 0) {
330 ath10k_warn(ar, "tried to pop sk_buff from an empty rx ring\n");
331 return NULL;
332 }
333
334 idx = htt->rx_ring.sw_rd_idx.msdu_payld;
335 msdu = htt->rx_ring.netbufs_ring[idx];
336 htt->rx_ring.netbufs_ring[idx] = NULL;
337 ath10k_htt_reset_paddrs_ring(htt, idx);
338
339 idx++;
340 idx &= htt->rx_ring.size_mask;
341 htt->rx_ring.sw_rd_idx.msdu_payld = idx;
342 htt->rx_ring.fill_cnt--;
343
344 dma_unmap_single(htt->ar->dev,
345 ATH10K_SKB_RXCB(msdu)->paddr,
346 msdu->len + skb_tailroom(msdu),
347 DMA_FROM_DEVICE);
348 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt rx netbuf pop: ",
349 msdu->data, msdu->len + skb_tailroom(msdu));
350
351 return msdu;
352 }
353
354 /* return: < 0 fatal error, 0 - non chained msdu, 1 chained msdu */
ath10k_htt_rx_amsdu_pop(struct ath10k_htt * htt,struct sk_buff_head * amsdu)355 static int ath10k_htt_rx_amsdu_pop(struct ath10k_htt *htt,
356 struct sk_buff_head *amsdu)
357 {
358 struct ath10k *ar = htt->ar;
359 struct ath10k_hw_params *hw = &ar->hw_params;
360 int msdu_len, msdu_chaining = 0;
361 struct sk_buff *msdu;
362 struct htt_rx_desc *rx_desc;
363 struct rx_attention *rx_desc_attention;
364 struct rx_frag_info_common *rx_desc_frag_info_common;
365 struct rx_msdu_start_common *rx_desc_msdu_start_common;
366 struct rx_msdu_end_common *rx_desc_msdu_end_common;
367
368 lockdep_assert_held(&htt->rx_ring.lock);
369
370 for (;;) {
371 int last_msdu, msdu_len_invalid, msdu_chained;
372
373 msdu = ath10k_htt_rx_netbuf_pop(htt);
374 if (!msdu) {
375 __skb_queue_purge(amsdu);
376 return -ENOENT;
377 }
378
379 __skb_queue_tail(amsdu, msdu);
380
381 rx_desc = HTT_RX_BUF_TO_RX_DESC(hw, msdu->data);
382 rx_desc_attention = ath10k_htt_rx_desc_get_attention(hw, rx_desc);
383 rx_desc_msdu_start_common = ath10k_htt_rx_desc_get_msdu_start(hw,
384 rx_desc);
385 rx_desc_msdu_end_common = ath10k_htt_rx_desc_get_msdu_end(hw, rx_desc);
386 rx_desc_frag_info_common = ath10k_htt_rx_desc_get_frag_info(hw, rx_desc);
387
388 /* FIXME: we must report msdu payload since this is what caller
389 * expects now
390 */
391 skb_put(msdu, hw->rx_desc_ops->rx_desc_msdu_payload_offset);
392 skb_pull(msdu, hw->rx_desc_ops->rx_desc_msdu_payload_offset);
393
394 /*
395 * Sanity check - confirm the HW is finished filling in the
396 * rx data.
397 * If the HW and SW are working correctly, then it's guaranteed
398 * that the HW's MAC DMA is done before this point in the SW.
399 * To prevent the case that we handle a stale Rx descriptor,
400 * just assert for now until we have a way to recover.
401 */
402 if (!(__le32_to_cpu(rx_desc_attention->flags)
403 & RX_ATTENTION_FLAGS_MSDU_DONE)) {
404 __skb_queue_purge(amsdu);
405 return -EIO;
406 }
407
408 msdu_len_invalid = !!(__le32_to_cpu(rx_desc_attention->flags)
409 & (RX_ATTENTION_FLAGS_MPDU_LENGTH_ERR |
410 RX_ATTENTION_FLAGS_MSDU_LENGTH_ERR));
411 msdu_len = MS(__le32_to_cpu(rx_desc_msdu_start_common->info0),
412 RX_MSDU_START_INFO0_MSDU_LENGTH);
413 msdu_chained = rx_desc_frag_info_common->ring2_more_count;
414
415 if (msdu_len_invalid)
416 msdu_len = 0;
417
418 skb_trim(msdu, 0);
419 skb_put(msdu, min(msdu_len, ath10k_htt_rx_msdu_size(hw)));
420 msdu_len -= msdu->len;
421
422 /* Note: Chained buffers do not contain rx descriptor */
423 while (msdu_chained--) {
424 msdu = ath10k_htt_rx_netbuf_pop(htt);
425 if (!msdu) {
426 __skb_queue_purge(amsdu);
427 return -ENOENT;
428 }
429
430 __skb_queue_tail(amsdu, msdu);
431 skb_trim(msdu, 0);
432 skb_put(msdu, min(msdu_len, HTT_RX_BUF_SIZE));
433 msdu_len -= msdu->len;
434 msdu_chaining = 1;
435 }
436
437 last_msdu = __le32_to_cpu(rx_desc_msdu_end_common->info0) &
438 RX_MSDU_END_INFO0_LAST_MSDU;
439
440 /* FIXME: why are we skipping the first part of the rx_desc? */
441 trace_ath10k_htt_rx_desc(ar, (void *)rx_desc + sizeof(u32),
442 hw->rx_desc_ops->rx_desc_size - sizeof(u32));
443
444 if (last_msdu)
445 break;
446 }
447
448 if (skb_queue_empty(amsdu))
449 msdu_chaining = -1;
450
451 /*
452 * Don't refill the ring yet.
453 *
454 * First, the elements popped here are still in use - it is not
455 * safe to overwrite them until the matching call to
456 * mpdu_desc_list_next. Second, for efficiency it is preferable to
457 * refill the rx ring with 1 PPDU's worth of rx buffers (something
458 * like 32 x 3 buffers), rather than one MPDU's worth of rx buffers
459 * (something like 3 buffers). Consequently, we'll rely on the txrx
460 * SW to tell us when it is done pulling all the PPDU's rx buffers
461 * out of the rx ring, and then refill it just once.
462 */
463
464 return msdu_chaining;
465 }
466
ath10k_htt_rx_pop_paddr(struct ath10k_htt * htt,u64 paddr)467 static struct sk_buff *ath10k_htt_rx_pop_paddr(struct ath10k_htt *htt,
468 u64 paddr)
469 {
470 struct ath10k *ar = htt->ar;
471 struct ath10k_skb_rxcb *rxcb;
472 struct sk_buff *msdu;
473
474 lockdep_assert_held(&htt->rx_ring.lock);
475
476 msdu = ath10k_htt_rx_find_skb_paddr(ar, paddr);
477 if (!msdu)
478 return NULL;
479
480 rxcb = ATH10K_SKB_RXCB(msdu);
481 hash_del(&rxcb->hlist);
482 htt->rx_ring.fill_cnt--;
483
484 dma_unmap_single(htt->ar->dev, rxcb->paddr,
485 msdu->len + skb_tailroom(msdu),
486 DMA_FROM_DEVICE);
487 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt rx netbuf pop: ",
488 msdu->data, msdu->len + skb_tailroom(msdu));
489
490 return msdu;
491 }
492
ath10k_htt_append_frag_list(struct sk_buff * skb_head,struct sk_buff * frag_list,unsigned int frag_len)493 static inline void ath10k_htt_append_frag_list(struct sk_buff *skb_head,
494 struct sk_buff *frag_list,
495 unsigned int frag_len)
496 {
497 skb_shinfo(skb_head)->frag_list = frag_list;
498 skb_head->data_len = frag_len;
499 skb_head->len += skb_head->data_len;
500 }
501
ath10k_htt_rx_handle_amsdu_mon_32(struct ath10k_htt * htt,struct sk_buff * msdu,struct htt_rx_in_ord_msdu_desc ** msdu_desc)502 static int ath10k_htt_rx_handle_amsdu_mon_32(struct ath10k_htt *htt,
503 struct sk_buff *msdu,
504 struct htt_rx_in_ord_msdu_desc **msdu_desc)
505 {
506 struct ath10k *ar = htt->ar;
507 struct ath10k_hw_params *hw = &ar->hw_params;
508 u32 paddr;
509 struct sk_buff *frag_buf;
510 struct sk_buff *prev_frag_buf;
511 u8 last_frag;
512 struct htt_rx_in_ord_msdu_desc *ind_desc = *msdu_desc;
513 struct htt_rx_desc *rxd;
514 int amsdu_len = __le16_to_cpu(ind_desc->msdu_len);
515
516 rxd = HTT_RX_BUF_TO_RX_DESC(hw, msdu->data);
517 trace_ath10k_htt_rx_desc(ar, rxd, hw->rx_desc_ops->rx_desc_size);
518
519 skb_put(msdu, hw->rx_desc_ops->rx_desc_size);
520 skb_pull(msdu, hw->rx_desc_ops->rx_desc_size);
521 skb_put(msdu, min(amsdu_len, ath10k_htt_rx_msdu_size(hw)));
522 amsdu_len -= msdu->len;
523
524 last_frag = ind_desc->reserved;
525 if (last_frag) {
526 if (amsdu_len) {
527 ath10k_warn(ar, "invalid amsdu len %u, left %d",
528 __le16_to_cpu(ind_desc->msdu_len),
529 amsdu_len);
530 }
531 return 0;
532 }
533
534 ind_desc++;
535 paddr = __le32_to_cpu(ind_desc->msdu_paddr);
536 frag_buf = ath10k_htt_rx_pop_paddr(htt, paddr);
537 if (!frag_buf) {
538 ath10k_warn(ar, "failed to pop frag-1 paddr: 0x%x", paddr);
539 return -ENOENT;
540 }
541
542 skb_put(frag_buf, min(amsdu_len, HTT_RX_BUF_SIZE));
543 ath10k_htt_append_frag_list(msdu, frag_buf, amsdu_len);
544
545 amsdu_len -= frag_buf->len;
546 prev_frag_buf = frag_buf;
547 last_frag = ind_desc->reserved;
548 while (!last_frag) {
549 ind_desc++;
550 paddr = __le32_to_cpu(ind_desc->msdu_paddr);
551 frag_buf = ath10k_htt_rx_pop_paddr(htt, paddr);
552 if (!frag_buf) {
553 ath10k_warn(ar, "failed to pop frag-n paddr: 0x%x",
554 paddr);
555 prev_frag_buf->next = NULL;
556 return -ENOENT;
557 }
558
559 skb_put(frag_buf, min(amsdu_len, HTT_RX_BUF_SIZE));
560 last_frag = ind_desc->reserved;
561 amsdu_len -= frag_buf->len;
562
563 prev_frag_buf->next = frag_buf;
564 prev_frag_buf = frag_buf;
565 }
566
567 if (amsdu_len) {
568 ath10k_warn(ar, "invalid amsdu len %u, left %d",
569 __le16_to_cpu(ind_desc->msdu_len), amsdu_len);
570 }
571
572 *msdu_desc = ind_desc;
573
574 prev_frag_buf->next = NULL;
575 return 0;
576 }
577
578 static int
ath10k_htt_rx_handle_amsdu_mon_64(struct ath10k_htt * htt,struct sk_buff * msdu,struct htt_rx_in_ord_msdu_desc_ext ** msdu_desc)579 ath10k_htt_rx_handle_amsdu_mon_64(struct ath10k_htt *htt,
580 struct sk_buff *msdu,
581 struct htt_rx_in_ord_msdu_desc_ext **msdu_desc)
582 {
583 struct ath10k *ar = htt->ar;
584 struct ath10k_hw_params *hw = &ar->hw_params;
585 u64 paddr;
586 struct sk_buff *frag_buf;
587 struct sk_buff *prev_frag_buf;
588 u8 last_frag;
589 struct htt_rx_in_ord_msdu_desc_ext *ind_desc = *msdu_desc;
590 struct htt_rx_desc *rxd;
591 int amsdu_len = __le16_to_cpu(ind_desc->msdu_len);
592
593 rxd = HTT_RX_BUF_TO_RX_DESC(hw, msdu->data);
594 trace_ath10k_htt_rx_desc(ar, rxd, hw->rx_desc_ops->rx_desc_size);
595
596 skb_put(msdu, hw->rx_desc_ops->rx_desc_size);
597 skb_pull(msdu, hw->rx_desc_ops->rx_desc_size);
598 skb_put(msdu, min(amsdu_len, ath10k_htt_rx_msdu_size(hw)));
599 amsdu_len -= msdu->len;
600
601 last_frag = ind_desc->reserved;
602 if (last_frag) {
603 if (amsdu_len) {
604 ath10k_warn(ar, "invalid amsdu len %u, left %d",
605 __le16_to_cpu(ind_desc->msdu_len),
606 amsdu_len);
607 }
608 return 0;
609 }
610
611 ind_desc++;
612 paddr = __le64_to_cpu(ind_desc->msdu_paddr);
613 frag_buf = ath10k_htt_rx_pop_paddr(htt, paddr);
614 if (!frag_buf) {
615 ath10k_warn(ar, "failed to pop frag-1 paddr: 0x%llx", paddr);
616 return -ENOENT;
617 }
618
619 skb_put(frag_buf, min(amsdu_len, HTT_RX_BUF_SIZE));
620 ath10k_htt_append_frag_list(msdu, frag_buf, amsdu_len);
621
622 amsdu_len -= frag_buf->len;
623 prev_frag_buf = frag_buf;
624 last_frag = ind_desc->reserved;
625 while (!last_frag) {
626 ind_desc++;
627 paddr = __le64_to_cpu(ind_desc->msdu_paddr);
628 frag_buf = ath10k_htt_rx_pop_paddr(htt, paddr);
629 if (!frag_buf) {
630 ath10k_warn(ar, "failed to pop frag-n paddr: 0x%llx",
631 paddr);
632 prev_frag_buf->next = NULL;
633 return -ENOENT;
634 }
635
636 skb_put(frag_buf, min(amsdu_len, HTT_RX_BUF_SIZE));
637 last_frag = ind_desc->reserved;
638 amsdu_len -= frag_buf->len;
639
640 prev_frag_buf->next = frag_buf;
641 prev_frag_buf = frag_buf;
642 }
643
644 if (amsdu_len) {
645 ath10k_warn(ar, "invalid amsdu len %u, left %d",
646 __le16_to_cpu(ind_desc->msdu_len), amsdu_len);
647 }
648
649 *msdu_desc = ind_desc;
650
651 prev_frag_buf->next = NULL;
652 return 0;
653 }
654
ath10k_htt_rx_pop_paddr32_list(struct ath10k_htt * htt,struct htt_rx_in_ord_ind * ev,struct sk_buff_head * list)655 static int ath10k_htt_rx_pop_paddr32_list(struct ath10k_htt *htt,
656 struct htt_rx_in_ord_ind *ev,
657 struct sk_buff_head *list)
658 {
659 struct ath10k *ar = htt->ar;
660 struct ath10k_hw_params *hw = &ar->hw_params;
661 struct htt_rx_in_ord_msdu_desc *msdu_desc = ev->msdu_descs32;
662 struct htt_rx_desc *rxd;
663 struct rx_attention *rxd_attention;
664 struct sk_buff *msdu;
665 int msdu_count, ret;
666 bool is_offload;
667 u32 paddr;
668
669 lockdep_assert_held(&htt->rx_ring.lock);
670
671 msdu_count = __le16_to_cpu(ev->msdu_count);
672 is_offload = !!(ev->info & HTT_RX_IN_ORD_IND_INFO_OFFLOAD_MASK);
673
674 while (msdu_count--) {
675 paddr = __le32_to_cpu(msdu_desc->msdu_paddr);
676
677 msdu = ath10k_htt_rx_pop_paddr(htt, paddr);
678 if (!msdu) {
679 __skb_queue_purge(list);
680 return -ENOENT;
681 }
682
683 if (!is_offload && ar->monitor_arvif) {
684 ret = ath10k_htt_rx_handle_amsdu_mon_32(htt, msdu,
685 &msdu_desc);
686 if (ret) {
687 __skb_queue_purge(list);
688 return ret;
689 }
690 __skb_queue_tail(list, msdu);
691 msdu_desc++;
692 continue;
693 }
694
695 __skb_queue_tail(list, msdu);
696
697 if (!is_offload) {
698 rxd = HTT_RX_BUF_TO_RX_DESC(hw, msdu->data);
699 rxd_attention = ath10k_htt_rx_desc_get_attention(hw, rxd);
700
701 trace_ath10k_htt_rx_desc(ar, rxd, hw->rx_desc_ops->rx_desc_size);
702
703 skb_put(msdu, hw->rx_desc_ops->rx_desc_size);
704 skb_pull(msdu, hw->rx_desc_ops->rx_desc_size);
705 skb_put(msdu, __le16_to_cpu(msdu_desc->msdu_len));
706
707 if (!(__le32_to_cpu(rxd_attention->flags) &
708 RX_ATTENTION_FLAGS_MSDU_DONE)) {
709 ath10k_warn(htt->ar, "tried to pop an incomplete frame, oops!\n");
710 return -EIO;
711 }
712 }
713
714 msdu_desc++;
715 }
716
717 return 0;
718 }
719
ath10k_htt_rx_pop_paddr64_list(struct ath10k_htt * htt,struct htt_rx_in_ord_ind * ev,struct sk_buff_head * list)720 static int ath10k_htt_rx_pop_paddr64_list(struct ath10k_htt *htt,
721 struct htt_rx_in_ord_ind *ev,
722 struct sk_buff_head *list)
723 {
724 struct ath10k *ar = htt->ar;
725 struct ath10k_hw_params *hw = &ar->hw_params;
726 struct htt_rx_in_ord_msdu_desc_ext *msdu_desc = ev->msdu_descs64;
727 struct htt_rx_desc *rxd;
728 struct rx_attention *rxd_attention;
729 struct sk_buff *msdu;
730 int msdu_count, ret;
731 bool is_offload;
732 u64 paddr;
733
734 lockdep_assert_held(&htt->rx_ring.lock);
735
736 msdu_count = __le16_to_cpu(ev->msdu_count);
737 is_offload = !!(ev->info & HTT_RX_IN_ORD_IND_INFO_OFFLOAD_MASK);
738
739 while (msdu_count--) {
740 paddr = __le64_to_cpu(msdu_desc->msdu_paddr);
741 msdu = ath10k_htt_rx_pop_paddr(htt, paddr);
742 if (!msdu) {
743 __skb_queue_purge(list);
744 return -ENOENT;
745 }
746
747 if (!is_offload && ar->monitor_arvif) {
748 ret = ath10k_htt_rx_handle_amsdu_mon_64(htt, msdu,
749 &msdu_desc);
750 if (ret) {
751 __skb_queue_purge(list);
752 return ret;
753 }
754 __skb_queue_tail(list, msdu);
755 msdu_desc++;
756 continue;
757 }
758
759 __skb_queue_tail(list, msdu);
760
761 if (!is_offload) {
762 rxd = HTT_RX_BUF_TO_RX_DESC(hw, msdu->data);
763 rxd_attention = ath10k_htt_rx_desc_get_attention(hw, rxd);
764
765 trace_ath10k_htt_rx_desc(ar, rxd, hw->rx_desc_ops->rx_desc_size);
766
767 skb_put(msdu, hw->rx_desc_ops->rx_desc_size);
768 skb_pull(msdu, hw->rx_desc_ops->rx_desc_size);
769 skb_put(msdu, __le16_to_cpu(msdu_desc->msdu_len));
770
771 if (!(__le32_to_cpu(rxd_attention->flags) &
772 RX_ATTENTION_FLAGS_MSDU_DONE)) {
773 ath10k_warn(htt->ar, "tried to pop an incomplete frame, oops!\n");
774 return -EIO;
775 }
776 }
777
778 msdu_desc++;
779 }
780
781 return 0;
782 }
783
ath10k_htt_rx_alloc(struct ath10k_htt * htt)784 int ath10k_htt_rx_alloc(struct ath10k_htt *htt)
785 {
786 struct ath10k *ar = htt->ar;
787 dma_addr_t paddr;
788 void *vaddr, *vaddr_ring;
789 size_t size;
790 struct timer_list *timer = &htt->rx_ring.refill_retry_timer;
791
792 if (ar->bus_param.dev_type == ATH10K_DEV_TYPE_HL)
793 return 0;
794
795 htt->rx_confused = false;
796
797 /* XXX: The fill level could be changed during runtime in response to
798 * the host processing latency. Is this really worth it?
799 */
800 htt->rx_ring.size = HTT_RX_RING_SIZE;
801 htt->rx_ring.size_mask = htt->rx_ring.size - 1;
802 htt->rx_ring.fill_level = ar->hw_params.rx_ring_fill_level;
803
804 if (!is_power_of_2(htt->rx_ring.size)) {
805 ath10k_warn(ar, "htt rx ring size is not power of 2\n");
806 return -EINVAL;
807 }
808
809 htt->rx_ring.netbufs_ring =
810 kcalloc(htt->rx_ring.size, sizeof(struct sk_buff *),
811 GFP_KERNEL);
812 if (!htt->rx_ring.netbufs_ring)
813 goto err_netbuf;
814
815 size = ath10k_htt_get_rx_ring_size(htt);
816
817 vaddr_ring = dma_alloc_coherent(htt->ar->dev, size, &paddr, GFP_KERNEL);
818 if (!vaddr_ring)
819 goto err_dma_ring;
820
821 ath10k_htt_config_paddrs_ring(htt, vaddr_ring);
822 htt->rx_ring.base_paddr = paddr;
823
824 vaddr = dma_alloc_coherent(htt->ar->dev,
825 sizeof(*htt->rx_ring.alloc_idx.vaddr),
826 &paddr, GFP_KERNEL);
827 if (!vaddr)
828 goto err_dma_idx;
829
830 htt->rx_ring.alloc_idx.vaddr = vaddr;
831 htt->rx_ring.alloc_idx.paddr = paddr;
832 htt->rx_ring.sw_rd_idx.msdu_payld = htt->rx_ring.size_mask;
833 *htt->rx_ring.alloc_idx.vaddr = 0;
834
835 /* Initialize the Rx refill retry timer */
836 timer_setup(timer, ath10k_htt_rx_ring_refill_retry, 0);
837
838 spin_lock_init(&htt->rx_ring.lock);
839
840 htt->rx_ring.fill_cnt = 0;
841 htt->rx_ring.sw_rd_idx.msdu_payld = 0;
842 hash_init(htt->rx_ring.skb_table);
843
844 skb_queue_head_init(&htt->rx_msdus_q);
845 skb_queue_head_init(&htt->rx_in_ord_compl_q);
846 skb_queue_head_init(&htt->tx_fetch_ind_q);
847 atomic_set(&htt->num_mpdus_ready, 0);
848
849 ath10k_dbg(ar, ATH10K_DBG_BOOT, "htt rx ring size %d fill_level %d\n",
850 htt->rx_ring.size, htt->rx_ring.fill_level);
851 return 0;
852
853 err_dma_idx:
854 dma_free_coherent(htt->ar->dev,
855 ath10k_htt_get_rx_ring_size(htt),
856 vaddr_ring,
857 htt->rx_ring.base_paddr);
858 ath10k_htt_config_paddrs_ring(htt, NULL);
859 err_dma_ring:
860 kfree(htt->rx_ring.netbufs_ring);
861 htt->rx_ring.netbufs_ring = NULL;
862 err_netbuf:
863 return -ENOMEM;
864 }
865
ath10k_htt_rx_crypto_param_len(struct ath10k * ar,enum htt_rx_mpdu_encrypt_type type)866 static int ath10k_htt_rx_crypto_param_len(struct ath10k *ar,
867 enum htt_rx_mpdu_encrypt_type type)
868 {
869 switch (type) {
870 case HTT_RX_MPDU_ENCRYPT_NONE:
871 return 0;
872 case HTT_RX_MPDU_ENCRYPT_WEP40:
873 case HTT_RX_MPDU_ENCRYPT_WEP104:
874 return IEEE80211_WEP_IV_LEN;
875 case HTT_RX_MPDU_ENCRYPT_TKIP_WITHOUT_MIC:
876 case HTT_RX_MPDU_ENCRYPT_TKIP_WPA:
877 return IEEE80211_TKIP_IV_LEN;
878 case HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2:
879 return IEEE80211_CCMP_HDR_LEN;
880 case HTT_RX_MPDU_ENCRYPT_AES_CCM256_WPA2:
881 return IEEE80211_CCMP_256_HDR_LEN;
882 case HTT_RX_MPDU_ENCRYPT_AES_GCMP_WPA2:
883 case HTT_RX_MPDU_ENCRYPT_AES_GCMP256_WPA2:
884 return IEEE80211_GCMP_HDR_LEN;
885 case HTT_RX_MPDU_ENCRYPT_WEP128:
886 case HTT_RX_MPDU_ENCRYPT_WAPI:
887 break;
888 }
889
890 ath10k_warn(ar, "unsupported encryption type %d\n", type);
891 return 0;
892 }
893
894 #define MICHAEL_MIC_LEN 8
895
ath10k_htt_rx_crypto_mic_len(struct ath10k * ar,enum htt_rx_mpdu_encrypt_type type)896 static int ath10k_htt_rx_crypto_mic_len(struct ath10k *ar,
897 enum htt_rx_mpdu_encrypt_type type)
898 {
899 switch (type) {
900 case HTT_RX_MPDU_ENCRYPT_NONE:
901 case HTT_RX_MPDU_ENCRYPT_WEP40:
902 case HTT_RX_MPDU_ENCRYPT_WEP104:
903 case HTT_RX_MPDU_ENCRYPT_TKIP_WITHOUT_MIC:
904 case HTT_RX_MPDU_ENCRYPT_TKIP_WPA:
905 return 0;
906 case HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2:
907 return IEEE80211_CCMP_MIC_LEN;
908 case HTT_RX_MPDU_ENCRYPT_AES_CCM256_WPA2:
909 return IEEE80211_CCMP_256_MIC_LEN;
910 case HTT_RX_MPDU_ENCRYPT_AES_GCMP_WPA2:
911 case HTT_RX_MPDU_ENCRYPT_AES_GCMP256_WPA2:
912 return IEEE80211_GCMP_MIC_LEN;
913 case HTT_RX_MPDU_ENCRYPT_WEP128:
914 case HTT_RX_MPDU_ENCRYPT_WAPI:
915 break;
916 }
917
918 ath10k_warn(ar, "unsupported encryption type %d\n", type);
919 return 0;
920 }
921
ath10k_htt_rx_crypto_icv_len(struct ath10k * ar,enum htt_rx_mpdu_encrypt_type type)922 static int ath10k_htt_rx_crypto_icv_len(struct ath10k *ar,
923 enum htt_rx_mpdu_encrypt_type type)
924 {
925 switch (type) {
926 case HTT_RX_MPDU_ENCRYPT_NONE:
927 case HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2:
928 case HTT_RX_MPDU_ENCRYPT_AES_CCM256_WPA2:
929 case HTT_RX_MPDU_ENCRYPT_AES_GCMP_WPA2:
930 case HTT_RX_MPDU_ENCRYPT_AES_GCMP256_WPA2:
931 return 0;
932 case HTT_RX_MPDU_ENCRYPT_WEP40:
933 case HTT_RX_MPDU_ENCRYPT_WEP104:
934 return IEEE80211_WEP_ICV_LEN;
935 case HTT_RX_MPDU_ENCRYPT_TKIP_WITHOUT_MIC:
936 case HTT_RX_MPDU_ENCRYPT_TKIP_WPA:
937 return IEEE80211_TKIP_ICV_LEN;
938 case HTT_RX_MPDU_ENCRYPT_WEP128:
939 case HTT_RX_MPDU_ENCRYPT_WAPI:
940 break;
941 }
942
943 ath10k_warn(ar, "unsupported encryption type %d\n", type);
944 return 0;
945 }
946
947 struct amsdu_subframe_hdr {
948 u8 dst[ETH_ALEN];
949 u8 src[ETH_ALEN];
950 __be16 len;
951 } __packed;
952
953 #define GROUP_ID_IS_SU_MIMO(x) ((x) == 0 || (x) == 63)
954
ath10k_bw_to_mac80211_bw(u8 bw)955 static inline u8 ath10k_bw_to_mac80211_bw(u8 bw)
956 {
957 u8 ret = 0;
958
959 switch (bw) {
960 case 0:
961 ret = RATE_INFO_BW_20;
962 break;
963 case 1:
964 ret = RATE_INFO_BW_40;
965 break;
966 case 2:
967 ret = RATE_INFO_BW_80;
968 break;
969 case 3:
970 ret = RATE_INFO_BW_160;
971 break;
972 }
973
974 return ret;
975 }
976
ath10k_htt_rx_h_rates(struct ath10k * ar,struct ieee80211_rx_status * status,struct htt_rx_desc * rxd)977 static void ath10k_htt_rx_h_rates(struct ath10k *ar,
978 struct ieee80211_rx_status *status,
979 struct htt_rx_desc *rxd)
980 {
981 struct ath10k_hw_params *hw = &ar->hw_params;
982 struct rx_attention *rxd_attention;
983 struct rx_mpdu_start *rxd_mpdu_start;
984 struct rx_mpdu_end *rxd_mpdu_end;
985 struct rx_msdu_start_common *rxd_msdu_start_common;
986 struct rx_msdu_end_common *rxd_msdu_end_common;
987 struct rx_ppdu_start *rxd_ppdu_start;
988 struct ieee80211_supported_band *sband;
989 u8 cck, rate, bw, sgi, mcs, nss;
990 u8 *rxd_msdu_payload;
991 u8 preamble = 0;
992 u8 group_id;
993 u32 info1, info2, info3;
994 u32 stbc, nsts_su;
995
996 rxd_attention = ath10k_htt_rx_desc_get_attention(hw, rxd);
997 rxd_mpdu_start = ath10k_htt_rx_desc_get_mpdu_start(hw, rxd);
998 rxd_mpdu_end = ath10k_htt_rx_desc_get_mpdu_end(hw, rxd);
999 rxd_msdu_start_common = ath10k_htt_rx_desc_get_msdu_start(hw, rxd);
1000 rxd_msdu_end_common = ath10k_htt_rx_desc_get_msdu_end(hw, rxd);
1001 rxd_ppdu_start = ath10k_htt_rx_desc_get_ppdu_start(hw, rxd);
1002 rxd_msdu_payload = ath10k_htt_rx_desc_get_msdu_payload(hw, rxd);
1003
1004 info1 = __le32_to_cpu(rxd_ppdu_start->info1);
1005 info2 = __le32_to_cpu(rxd_ppdu_start->info2);
1006 info3 = __le32_to_cpu(rxd_ppdu_start->info3);
1007
1008 preamble = MS(info1, RX_PPDU_START_INFO1_PREAMBLE_TYPE);
1009
1010 switch (preamble) {
1011 case HTT_RX_LEGACY:
1012 /* To get legacy rate index band is required. Since band can't
1013 * be undefined check if freq is non-zero.
1014 */
1015 if (!status->freq)
1016 return;
1017
1018 cck = info1 & RX_PPDU_START_INFO1_L_SIG_RATE_SELECT;
1019 rate = MS(info1, RX_PPDU_START_INFO1_L_SIG_RATE);
1020 rate &= ~RX_PPDU_START_RATE_FLAG;
1021
1022 sband = &ar->mac.sbands[status->band];
1023 status->rate_idx = ath10k_mac_hw_rate_to_idx(sband, rate, cck);
1024 break;
1025 case HTT_RX_HT:
1026 case HTT_RX_HT_WITH_TXBF:
1027 /* HT-SIG - Table 20-11 in info2 and info3 */
1028 mcs = info2 & 0x1F;
1029 nss = mcs >> 3;
1030 bw = (info2 >> 7) & 1;
1031 sgi = (info3 >> 7) & 1;
1032
1033 status->rate_idx = mcs;
1034 status->encoding = RX_ENC_HT;
1035 if (sgi)
1036 status->enc_flags |= RX_ENC_FLAG_SHORT_GI;
1037 if (bw)
1038 status->bw = RATE_INFO_BW_40;
1039 break;
1040 case HTT_RX_VHT:
1041 case HTT_RX_VHT_WITH_TXBF:
1042 /* VHT-SIG-A1 in info2, VHT-SIG-A2 in info3
1043 * TODO check this
1044 */
1045 bw = info2 & 3;
1046 sgi = info3 & 1;
1047 stbc = (info2 >> 3) & 1;
1048 group_id = (info2 >> 4) & 0x3F;
1049
1050 if (GROUP_ID_IS_SU_MIMO(group_id)) {
1051 mcs = (info3 >> 4) & 0x0F;
1052 nsts_su = ((info2 >> 10) & 0x07);
1053 if (stbc)
1054 nss = (nsts_su >> 2) + 1;
1055 else
1056 nss = (nsts_su + 1);
1057 } else {
1058 /* Hardware doesn't decode VHT-SIG-B into Rx descriptor
1059 * so it's impossible to decode MCS. Also since
1060 * firmware consumes Group Id Management frames host
1061 * has no knowledge regarding group/user position
1062 * mapping so it's impossible to pick the correct Nsts
1063 * from VHT-SIG-A1.
1064 *
1065 * Bandwidth and SGI are valid so report the rateinfo
1066 * on best-effort basis.
1067 */
1068 mcs = 0;
1069 nss = 1;
1070 }
1071
1072 if (mcs > 0x09) {
1073 ath10k_warn(ar, "invalid MCS received %u\n", mcs);
1074 ath10k_warn(ar, "rxd %08x mpdu start %08x %08x msdu start %08x %08x ppdu start %08x %08x %08x %08x %08x\n",
1075 __le32_to_cpu(rxd_attention->flags),
1076 __le32_to_cpu(rxd_mpdu_start->info0),
1077 __le32_to_cpu(rxd_mpdu_start->info1),
1078 __le32_to_cpu(rxd_msdu_start_common->info0),
1079 __le32_to_cpu(rxd_msdu_start_common->info1),
1080 rxd_ppdu_start->info0,
1081 __le32_to_cpu(rxd_ppdu_start->info1),
1082 __le32_to_cpu(rxd_ppdu_start->info2),
1083 __le32_to_cpu(rxd_ppdu_start->info3),
1084 __le32_to_cpu(rxd_ppdu_start->info4));
1085
1086 ath10k_warn(ar, "msdu end %08x mpdu end %08x\n",
1087 __le32_to_cpu(rxd_msdu_end_common->info0),
1088 __le32_to_cpu(rxd_mpdu_end->info0));
1089
1090 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL,
1091 "rx desc msdu payload: ",
1092 rxd_msdu_payload, 50);
1093 }
1094
1095 status->rate_idx = mcs;
1096 status->nss = nss;
1097
1098 if (sgi)
1099 status->enc_flags |= RX_ENC_FLAG_SHORT_GI;
1100
1101 status->bw = ath10k_bw_to_mac80211_bw(bw);
1102 status->encoding = RX_ENC_VHT;
1103 break;
1104 default:
1105 break;
1106 }
1107 }
1108
1109 static struct ieee80211_channel *
ath10k_htt_rx_h_peer_channel(struct ath10k * ar,struct htt_rx_desc * rxd)1110 ath10k_htt_rx_h_peer_channel(struct ath10k *ar, struct htt_rx_desc *rxd)
1111 {
1112 struct ath10k_hw_params *hw = &ar->hw_params;
1113 struct rx_attention *rxd_attention;
1114 struct rx_msdu_end_common *rxd_msdu_end_common;
1115 struct rx_mpdu_start *rxd_mpdu_start;
1116 struct ath10k_peer *peer;
1117 struct ath10k_vif *arvif;
1118 struct cfg80211_chan_def def;
1119 u16 peer_id;
1120
1121 lockdep_assert_held(&ar->data_lock);
1122
1123 if (!rxd)
1124 return NULL;
1125
1126 rxd_attention = ath10k_htt_rx_desc_get_attention(hw, rxd);
1127 rxd_msdu_end_common = ath10k_htt_rx_desc_get_msdu_end(hw, rxd);
1128 rxd_mpdu_start = ath10k_htt_rx_desc_get_mpdu_start(hw, rxd);
1129
1130 if (rxd_attention->flags &
1131 __cpu_to_le32(RX_ATTENTION_FLAGS_PEER_IDX_INVALID))
1132 return NULL;
1133
1134 if (!(rxd_msdu_end_common->info0 &
1135 __cpu_to_le32(RX_MSDU_END_INFO0_FIRST_MSDU)))
1136 return NULL;
1137
1138 peer_id = MS(__le32_to_cpu(rxd_mpdu_start->info0),
1139 RX_MPDU_START_INFO0_PEER_IDX);
1140
1141 peer = ath10k_peer_find_by_id(ar, peer_id);
1142 if (!peer)
1143 return NULL;
1144
1145 arvif = ath10k_get_arvif(ar, peer->vdev_id);
1146 if (WARN_ON_ONCE(!arvif))
1147 return NULL;
1148
1149 if (ath10k_mac_vif_chan(arvif->vif, &def))
1150 return NULL;
1151
1152 return def.chan;
1153 }
1154
1155 static struct ieee80211_channel *
ath10k_htt_rx_h_vdev_channel(struct ath10k * ar,u32 vdev_id)1156 ath10k_htt_rx_h_vdev_channel(struct ath10k *ar, u32 vdev_id)
1157 {
1158 struct ath10k_vif *arvif;
1159 struct cfg80211_chan_def def;
1160
1161 lockdep_assert_held(&ar->data_lock);
1162
1163 list_for_each_entry(arvif, &ar->arvifs, list) {
1164 if (arvif->vdev_id == vdev_id &&
1165 ath10k_mac_vif_chan(arvif->vif, &def) == 0)
1166 return def.chan;
1167 }
1168
1169 return NULL;
1170 }
1171
1172 static void
ath10k_htt_rx_h_any_chan_iter(struct ieee80211_hw * hw,struct ieee80211_chanctx_conf * conf,void * data)1173 ath10k_htt_rx_h_any_chan_iter(struct ieee80211_hw *hw,
1174 struct ieee80211_chanctx_conf *conf,
1175 void *data)
1176 {
1177 struct cfg80211_chan_def *def = data;
1178
1179 *def = conf->def;
1180 }
1181
1182 static struct ieee80211_channel *
ath10k_htt_rx_h_any_channel(struct ath10k * ar)1183 ath10k_htt_rx_h_any_channel(struct ath10k *ar)
1184 {
1185 struct cfg80211_chan_def def = {};
1186
1187 ieee80211_iter_chan_contexts_atomic(ar->hw,
1188 ath10k_htt_rx_h_any_chan_iter,
1189 &def);
1190
1191 return def.chan;
1192 }
1193
ath10k_htt_rx_h_channel(struct ath10k * ar,struct ieee80211_rx_status * status,struct htt_rx_desc * rxd,u32 vdev_id)1194 static bool ath10k_htt_rx_h_channel(struct ath10k *ar,
1195 struct ieee80211_rx_status *status,
1196 struct htt_rx_desc *rxd,
1197 u32 vdev_id)
1198 {
1199 struct ieee80211_channel *ch;
1200
1201 spin_lock_bh(&ar->data_lock);
1202 ch = ar->scan_channel;
1203 if (!ch)
1204 ch = ar->rx_channel;
1205 if (!ch)
1206 ch = ath10k_htt_rx_h_peer_channel(ar, rxd);
1207 if (!ch)
1208 ch = ath10k_htt_rx_h_vdev_channel(ar, vdev_id);
1209 if (!ch)
1210 ch = ath10k_htt_rx_h_any_channel(ar);
1211 if (!ch)
1212 ch = ar->tgt_oper_chan;
1213 spin_unlock_bh(&ar->data_lock);
1214
1215 if (!ch)
1216 return false;
1217
1218 status->band = ch->band;
1219 status->freq = ch->center_freq;
1220
1221 return true;
1222 }
1223
ath10k_htt_rx_h_signal(struct ath10k * ar,struct ieee80211_rx_status * status,struct htt_rx_desc * rxd)1224 static void ath10k_htt_rx_h_signal(struct ath10k *ar,
1225 struct ieee80211_rx_status *status,
1226 struct htt_rx_desc *rxd)
1227 {
1228 struct ath10k_hw_params *hw = &ar->hw_params;
1229 struct rx_ppdu_start *rxd_ppdu_start = ath10k_htt_rx_desc_get_ppdu_start(hw, rxd);
1230 int i;
1231
1232 for (i = 0; i < IEEE80211_MAX_CHAINS ; i++) {
1233 status->chains &= ~BIT(i);
1234
1235 if (rxd_ppdu_start->rssi_chains[i].pri20_mhz != 0x80) {
1236 status->chain_signal[i] = ATH10K_DEFAULT_NOISE_FLOOR +
1237 rxd_ppdu_start->rssi_chains[i].pri20_mhz;
1238
1239 status->chains |= BIT(i);
1240 }
1241 }
1242
1243 /* FIXME: Get real NF */
1244 status->signal = ATH10K_DEFAULT_NOISE_FLOOR +
1245 rxd_ppdu_start->rssi_comb;
1246 status->flag &= ~RX_FLAG_NO_SIGNAL_VAL;
1247 }
1248
ath10k_htt_rx_h_mactime(struct ath10k * ar,struct ieee80211_rx_status * status,struct htt_rx_desc * rxd)1249 static void ath10k_htt_rx_h_mactime(struct ath10k *ar,
1250 struct ieee80211_rx_status *status,
1251 struct htt_rx_desc *rxd)
1252 {
1253 struct ath10k_hw_params *hw = &ar->hw_params;
1254 struct rx_ppdu_end_common *rxd_ppdu_end_common;
1255
1256 rxd_ppdu_end_common = ath10k_htt_rx_desc_get_ppdu_end(hw, rxd);
1257
1258 /* FIXME: TSF is known only at the end of PPDU, in the last MPDU. This
1259 * means all prior MSDUs in a PPDU are reported to mac80211 without the
1260 * TSF. Is it worth holding frames until end of PPDU is known?
1261 *
1262 * FIXME: Can we get/compute 64bit TSF?
1263 */
1264 status->mactime = __le32_to_cpu(rxd_ppdu_end_common->tsf_timestamp);
1265 status->flag |= RX_FLAG_MACTIME_END;
1266 }
1267
ath10k_htt_rx_h_ppdu(struct ath10k * ar,struct sk_buff_head * amsdu,struct ieee80211_rx_status * status,u32 vdev_id)1268 static void ath10k_htt_rx_h_ppdu(struct ath10k *ar,
1269 struct sk_buff_head *amsdu,
1270 struct ieee80211_rx_status *status,
1271 u32 vdev_id)
1272 {
1273 struct sk_buff *first;
1274 struct ath10k_hw_params *hw = &ar->hw_params;
1275 struct htt_rx_desc *rxd;
1276 struct rx_attention *rxd_attention;
1277 bool is_first_ppdu;
1278 bool is_last_ppdu;
1279
1280 if (skb_queue_empty(amsdu))
1281 return;
1282
1283 first = skb_peek(amsdu);
1284 rxd = HTT_RX_BUF_TO_RX_DESC(hw,
1285 (void *)first->data - hw->rx_desc_ops->rx_desc_size);
1286
1287 rxd_attention = ath10k_htt_rx_desc_get_attention(hw, rxd);
1288
1289 is_first_ppdu = !!(rxd_attention->flags &
1290 __cpu_to_le32(RX_ATTENTION_FLAGS_FIRST_MPDU));
1291 is_last_ppdu = !!(rxd_attention->flags &
1292 __cpu_to_le32(RX_ATTENTION_FLAGS_LAST_MPDU));
1293
1294 if (is_first_ppdu) {
1295 /* New PPDU starts so clear out the old per-PPDU status. */
1296 status->freq = 0;
1297 status->rate_idx = 0;
1298 status->nss = 0;
1299 status->encoding = RX_ENC_LEGACY;
1300 status->bw = RATE_INFO_BW_20;
1301
1302 status->flag &= ~RX_FLAG_MACTIME;
1303 status->flag |= RX_FLAG_NO_SIGNAL_VAL;
1304
1305 status->flag &= ~(RX_FLAG_AMPDU_IS_LAST);
1306 status->flag |= RX_FLAG_AMPDU_DETAILS | RX_FLAG_AMPDU_LAST_KNOWN;
1307 status->ampdu_reference = ar->ampdu_reference;
1308
1309 ath10k_htt_rx_h_signal(ar, status, rxd);
1310 ath10k_htt_rx_h_channel(ar, status, rxd, vdev_id);
1311 ath10k_htt_rx_h_rates(ar, status, rxd);
1312 }
1313
1314 if (is_last_ppdu) {
1315 ath10k_htt_rx_h_mactime(ar, status, rxd);
1316
1317 /* set ampdu last segment flag */
1318 status->flag |= RX_FLAG_AMPDU_IS_LAST;
1319 ar->ampdu_reference++;
1320 }
1321 }
1322
1323 static const char * const tid_to_ac[] = {
1324 "BE",
1325 "BK",
1326 "BK",
1327 "BE",
1328 "VI",
1329 "VI",
1330 "VO",
1331 "VO",
1332 };
1333
ath10k_get_tid(struct ieee80211_hdr * hdr,char * out,size_t size)1334 static char *ath10k_get_tid(struct ieee80211_hdr *hdr, char *out, size_t size)
1335 {
1336 u8 *qc;
1337 int tid;
1338
1339 if (!ieee80211_is_data_qos(hdr->frame_control))
1340 return "";
1341
1342 qc = ieee80211_get_qos_ctl(hdr);
1343 tid = *qc & IEEE80211_QOS_CTL_TID_MASK;
1344 if (tid < 8)
1345 snprintf(out, size, "tid %d (%s)", tid, tid_to_ac[tid]);
1346 else
1347 snprintf(out, size, "tid %d", tid);
1348
1349 return out;
1350 }
1351
ath10k_htt_rx_h_queue_msdu(struct ath10k * ar,struct ieee80211_rx_status * rx_status,struct sk_buff * skb)1352 static void ath10k_htt_rx_h_queue_msdu(struct ath10k *ar,
1353 struct ieee80211_rx_status *rx_status,
1354 struct sk_buff *skb)
1355 {
1356 struct ieee80211_rx_status *status;
1357
1358 status = IEEE80211_SKB_RXCB(skb);
1359 *status = *rx_status;
1360
1361 skb_queue_tail(&ar->htt.rx_msdus_q, skb);
1362 }
1363
ath10k_process_rx(struct ath10k * ar,struct sk_buff * skb)1364 static void ath10k_process_rx(struct ath10k *ar, struct sk_buff *skb)
1365 {
1366 struct ieee80211_rx_status *status;
1367 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
1368 char tid[32];
1369
1370 status = IEEE80211_SKB_RXCB(skb);
1371
1372 if (!(ar->filter_flags & FIF_FCSFAIL) &&
1373 status->flag & RX_FLAG_FAILED_FCS_CRC) {
1374 ar->stats.rx_crc_err_drop++;
1375 dev_kfree_skb_any(skb);
1376 return;
1377 }
1378
1379 ath10k_dbg(ar, ATH10K_DBG_DATA,
1380 "rx skb %p len %u peer %pM %s %s sn %u %s%s%s%s%s%s %srate_idx %u vht_nss %u freq %u band %u flag 0x%x fcs-err %i mic-err %i amsdu-more %i\n",
1381 skb,
1382 skb->len,
1383 ieee80211_get_SA(hdr),
1384 ath10k_get_tid(hdr, tid, sizeof(tid)),
1385 is_multicast_ether_addr(ieee80211_get_DA(hdr)) ?
1386 "mcast" : "ucast",
1387 IEEE80211_SEQ_TO_SN(__le16_to_cpu(hdr->seq_ctrl)),
1388 (status->encoding == RX_ENC_LEGACY) ? "legacy" : "",
1389 (status->encoding == RX_ENC_HT) ? "ht" : "",
1390 (status->encoding == RX_ENC_VHT) ? "vht" : "",
1391 (status->bw == RATE_INFO_BW_40) ? "40" : "",
1392 (status->bw == RATE_INFO_BW_80) ? "80" : "",
1393 (status->bw == RATE_INFO_BW_160) ? "160" : "",
1394 status->enc_flags & RX_ENC_FLAG_SHORT_GI ? "sgi " : "",
1395 status->rate_idx,
1396 status->nss,
1397 status->freq,
1398 status->band, status->flag,
1399 !!(status->flag & RX_FLAG_FAILED_FCS_CRC),
1400 !!(status->flag & RX_FLAG_MMIC_ERROR),
1401 !!(status->flag & RX_FLAG_AMSDU_MORE));
1402 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "rx skb: ",
1403 skb->data, skb->len);
1404 trace_ath10k_rx_hdr(ar, skb->data, skb->len);
1405 trace_ath10k_rx_payload(ar, skb->data, skb->len);
1406
1407 ieee80211_rx_napi(ar->hw, NULL, skb, &ar->napi);
1408 }
1409
ath10k_htt_rx_nwifi_hdrlen(struct ath10k * ar,struct ieee80211_hdr * hdr)1410 static int ath10k_htt_rx_nwifi_hdrlen(struct ath10k *ar,
1411 struct ieee80211_hdr *hdr)
1412 {
1413 int len = ieee80211_hdrlen(hdr->frame_control);
1414
1415 if (!test_bit(ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING,
1416 ar->running_fw->fw_file.fw_features))
1417 len = round_up(len, 4);
1418
1419 return len;
1420 }
1421
ath10k_htt_rx_h_undecap_raw(struct ath10k * ar,struct sk_buff * msdu,struct ieee80211_rx_status * status,enum htt_rx_mpdu_encrypt_type enctype,bool is_decrypted,const u8 first_hdr[64])1422 static void ath10k_htt_rx_h_undecap_raw(struct ath10k *ar,
1423 struct sk_buff *msdu,
1424 struct ieee80211_rx_status *status,
1425 enum htt_rx_mpdu_encrypt_type enctype,
1426 bool is_decrypted,
1427 const u8 first_hdr[64])
1428 {
1429 struct ieee80211_hdr *hdr;
1430 struct ath10k_hw_params *hw = &ar->hw_params;
1431 struct htt_rx_desc *rxd;
1432 struct rx_msdu_end_common *rxd_msdu_end_common;
1433 size_t hdr_len;
1434 size_t crypto_len;
1435 bool is_first;
1436 bool is_last;
1437 bool msdu_limit_err;
1438 int bytes_aligned = ar->hw_params.decap_align_bytes;
1439 u8 *qos;
1440
1441 rxd = HTT_RX_BUF_TO_RX_DESC(hw,
1442 (void *)msdu->data - hw->rx_desc_ops->rx_desc_size);
1443
1444 rxd_msdu_end_common = ath10k_htt_rx_desc_get_msdu_end(hw, rxd);
1445 is_first = !!(rxd_msdu_end_common->info0 &
1446 __cpu_to_le32(RX_MSDU_END_INFO0_FIRST_MSDU));
1447 is_last = !!(rxd_msdu_end_common->info0 &
1448 __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU));
1449
1450 /* Delivered decapped frame:
1451 * [802.11 header]
1452 * [crypto param] <-- can be trimmed if !fcs_err &&
1453 * !decrypt_err && !peer_idx_invalid
1454 * [amsdu header] <-- only if A-MSDU
1455 * [rfc1042/llc]
1456 * [payload]
1457 * [FCS] <-- at end, needs to be trimmed
1458 */
1459
1460 /* Some hardwares(QCA99x0 variants) limit number of msdus in a-msdu when
1461 * deaggregate, so that unwanted MSDU-deaggregation is avoided for
1462 * error packets. If limit exceeds, hw sends all remaining MSDUs as
1463 * a single last MSDU with this msdu limit error set.
1464 */
1465 msdu_limit_err = ath10k_htt_rx_desc_msdu_limit_error(hw, rxd);
1466
1467 /* If MSDU limit error happens, then don't warn on, the partial raw MSDU
1468 * without first MSDU is expected in that case, and handled later here.
1469 */
1470 /* This probably shouldn't happen but warn just in case */
1471 if (WARN_ON_ONCE(!is_first && !msdu_limit_err))
1472 return;
1473
1474 /* This probably shouldn't happen but warn just in case */
1475 if (WARN_ON_ONCE(!(is_first && is_last) && !msdu_limit_err))
1476 return;
1477
1478 skb_trim(msdu, msdu->len - FCS_LEN);
1479
1480 /* Push original 80211 header */
1481 if (unlikely(msdu_limit_err)) {
1482 hdr = (struct ieee80211_hdr *)first_hdr;
1483 hdr_len = ieee80211_hdrlen(hdr->frame_control);
1484 crypto_len = ath10k_htt_rx_crypto_param_len(ar, enctype);
1485
1486 if (ieee80211_is_data_qos(hdr->frame_control)) {
1487 qos = ieee80211_get_qos_ctl(hdr);
1488 qos[0] |= IEEE80211_QOS_CTL_A_MSDU_PRESENT;
1489 }
1490
1491 if (crypto_len)
1492 memcpy(skb_push(msdu, crypto_len),
1493 (void *)hdr + round_up(hdr_len, bytes_aligned),
1494 crypto_len);
1495
1496 memcpy(skb_push(msdu, hdr_len), hdr, hdr_len);
1497 }
1498
1499 /* In most cases this will be true for sniffed frames. It makes sense
1500 * to deliver them as-is without stripping the crypto param. This is
1501 * necessary for software based decryption.
1502 *
1503 * If there's no error then the frame is decrypted. At least that is
1504 * the case for frames that come in via fragmented rx indication.
1505 */
1506 if (!is_decrypted)
1507 return;
1508
1509 /* The payload is decrypted so strip crypto params. Start from tail
1510 * since hdr is used to compute some stuff.
1511 */
1512
1513 hdr = (void *)msdu->data;
1514
1515 /* Tail */
1516 if (status->flag & RX_FLAG_IV_STRIPPED) {
1517 skb_trim(msdu, msdu->len -
1518 ath10k_htt_rx_crypto_mic_len(ar, enctype));
1519
1520 skb_trim(msdu, msdu->len -
1521 ath10k_htt_rx_crypto_icv_len(ar, enctype));
1522 } else {
1523 /* MIC */
1524 if (status->flag & RX_FLAG_MIC_STRIPPED)
1525 skb_trim(msdu, msdu->len -
1526 ath10k_htt_rx_crypto_mic_len(ar, enctype));
1527
1528 /* ICV */
1529 if (status->flag & RX_FLAG_ICV_STRIPPED)
1530 skb_trim(msdu, msdu->len -
1531 ath10k_htt_rx_crypto_icv_len(ar, enctype));
1532 }
1533
1534 /* MMIC */
1535 if ((status->flag & RX_FLAG_MMIC_STRIPPED) &&
1536 !ieee80211_has_morefrags(hdr->frame_control) &&
1537 enctype == HTT_RX_MPDU_ENCRYPT_TKIP_WPA)
1538 skb_trim(msdu, msdu->len - MICHAEL_MIC_LEN);
1539
1540 /* Head */
1541 if (status->flag & RX_FLAG_IV_STRIPPED) {
1542 hdr_len = ieee80211_hdrlen(hdr->frame_control);
1543 crypto_len = ath10k_htt_rx_crypto_param_len(ar, enctype);
1544
1545 memmove((void *)msdu->data + crypto_len,
1546 (void *)msdu->data, hdr_len);
1547 skb_pull(msdu, crypto_len);
1548 }
1549 }
1550
ath10k_htt_rx_h_undecap_nwifi(struct ath10k * ar,struct sk_buff * msdu,struct ieee80211_rx_status * status,const u8 first_hdr[64],enum htt_rx_mpdu_encrypt_type enctype)1551 static void ath10k_htt_rx_h_undecap_nwifi(struct ath10k *ar,
1552 struct sk_buff *msdu,
1553 struct ieee80211_rx_status *status,
1554 const u8 first_hdr[64],
1555 enum htt_rx_mpdu_encrypt_type enctype)
1556 {
1557 struct ath10k_hw_params *hw = &ar->hw_params;
1558 struct ieee80211_hdr *hdr;
1559 struct htt_rx_desc *rxd;
1560 size_t hdr_len;
1561 u8 da[ETH_ALEN];
1562 u8 sa[ETH_ALEN];
1563 int l3_pad_bytes;
1564 int bytes_aligned = ar->hw_params.decap_align_bytes;
1565
1566 /* Delivered decapped frame:
1567 * [nwifi 802.11 header] <-- replaced with 802.11 hdr
1568 * [rfc1042/llc]
1569 *
1570 * Note: The nwifi header doesn't have QoS Control and is
1571 * (always?) a 3addr frame.
1572 *
1573 * Note2: There's no A-MSDU subframe header. Even if it's part
1574 * of an A-MSDU.
1575 */
1576
1577 /* pull decapped header and copy SA & DA */
1578 rxd = HTT_RX_BUF_TO_RX_DESC(hw, (void *)msdu->data -
1579 hw->rx_desc_ops->rx_desc_size);
1580
1581 l3_pad_bytes = ath10k_htt_rx_desc_get_l3_pad_bytes(&ar->hw_params, rxd);
1582 skb_put(msdu, l3_pad_bytes);
1583
1584 hdr = (struct ieee80211_hdr *)(msdu->data + l3_pad_bytes);
1585
1586 hdr_len = ath10k_htt_rx_nwifi_hdrlen(ar, hdr);
1587 ether_addr_copy(da, ieee80211_get_DA(hdr));
1588 ether_addr_copy(sa, ieee80211_get_SA(hdr));
1589 skb_pull(msdu, hdr_len);
1590
1591 /* push original 802.11 header */
1592 hdr = (struct ieee80211_hdr *)first_hdr;
1593 hdr_len = ieee80211_hdrlen(hdr->frame_control);
1594
1595 if (!(status->flag & RX_FLAG_IV_STRIPPED)) {
1596 memcpy(skb_push(msdu,
1597 ath10k_htt_rx_crypto_param_len(ar, enctype)),
1598 (void *)hdr + round_up(hdr_len, bytes_aligned),
1599 ath10k_htt_rx_crypto_param_len(ar, enctype));
1600 }
1601
1602 memcpy(skb_push(msdu, hdr_len), hdr, hdr_len);
1603
1604 /* original 802.11 header has a different DA and in
1605 * case of 4addr it may also have different SA
1606 */
1607 hdr = (struct ieee80211_hdr *)msdu->data;
1608 ether_addr_copy(ieee80211_get_DA(hdr), da);
1609 ether_addr_copy(ieee80211_get_SA(hdr), sa);
1610 }
1611
ath10k_htt_rx_h_find_rfc1042(struct ath10k * ar,struct sk_buff * msdu,enum htt_rx_mpdu_encrypt_type enctype)1612 static void *ath10k_htt_rx_h_find_rfc1042(struct ath10k *ar,
1613 struct sk_buff *msdu,
1614 enum htt_rx_mpdu_encrypt_type enctype)
1615 {
1616 struct ieee80211_hdr *hdr;
1617 struct ath10k_hw_params *hw = &ar->hw_params;
1618 struct htt_rx_desc *rxd;
1619 struct rx_msdu_end_common *rxd_msdu_end_common;
1620 u8 *rxd_rx_hdr_status;
1621 size_t hdr_len, crypto_len;
1622 void *rfc1042;
1623 bool is_first, is_last, is_amsdu;
1624 int bytes_aligned = ar->hw_params.decap_align_bytes;
1625
1626 rxd = HTT_RX_BUF_TO_RX_DESC(hw,
1627 (void *)msdu->data - hw->rx_desc_ops->rx_desc_size);
1628
1629 rxd_msdu_end_common = ath10k_htt_rx_desc_get_msdu_end(hw, rxd);
1630 rxd_rx_hdr_status = ath10k_htt_rx_desc_get_rx_hdr_status(hw, rxd);
1631 hdr = (void *)rxd_rx_hdr_status;
1632
1633 is_first = !!(rxd_msdu_end_common->info0 &
1634 __cpu_to_le32(RX_MSDU_END_INFO0_FIRST_MSDU));
1635 is_last = !!(rxd_msdu_end_common->info0 &
1636 __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU));
1637 is_amsdu = !(is_first && is_last);
1638
1639 rfc1042 = hdr;
1640
1641 if (is_first) {
1642 hdr_len = ieee80211_hdrlen(hdr->frame_control);
1643 crypto_len = ath10k_htt_rx_crypto_param_len(ar, enctype);
1644
1645 rfc1042 += round_up(hdr_len, bytes_aligned) +
1646 round_up(crypto_len, bytes_aligned);
1647 }
1648
1649 if (is_amsdu)
1650 rfc1042 += sizeof(struct amsdu_subframe_hdr);
1651
1652 return rfc1042;
1653 }
1654
ath10k_htt_rx_h_undecap_eth(struct ath10k * ar,struct sk_buff * msdu,struct ieee80211_rx_status * status,const u8 first_hdr[64],enum htt_rx_mpdu_encrypt_type enctype)1655 static void ath10k_htt_rx_h_undecap_eth(struct ath10k *ar,
1656 struct sk_buff *msdu,
1657 struct ieee80211_rx_status *status,
1658 const u8 first_hdr[64],
1659 enum htt_rx_mpdu_encrypt_type enctype)
1660 {
1661 struct ath10k_hw_params *hw = &ar->hw_params;
1662 struct ieee80211_hdr *hdr;
1663 struct ethhdr *eth;
1664 size_t hdr_len;
1665 void *rfc1042;
1666 u8 da[ETH_ALEN];
1667 u8 sa[ETH_ALEN];
1668 int l3_pad_bytes;
1669 struct htt_rx_desc *rxd;
1670 int bytes_aligned = ar->hw_params.decap_align_bytes;
1671
1672 /* Delivered decapped frame:
1673 * [eth header] <-- replaced with 802.11 hdr & rfc1042/llc
1674 * [payload]
1675 */
1676
1677 rfc1042 = ath10k_htt_rx_h_find_rfc1042(ar, msdu, enctype);
1678 if (WARN_ON_ONCE(!rfc1042))
1679 return;
1680
1681 rxd = HTT_RX_BUF_TO_RX_DESC(hw,
1682 (void *)msdu->data - hw->rx_desc_ops->rx_desc_size);
1683
1684 l3_pad_bytes = ath10k_htt_rx_desc_get_l3_pad_bytes(&ar->hw_params, rxd);
1685 skb_put(msdu, l3_pad_bytes);
1686 skb_pull(msdu, l3_pad_bytes);
1687
1688 /* pull decapped header and copy SA & DA */
1689 eth = (struct ethhdr *)msdu->data;
1690 ether_addr_copy(da, eth->h_dest);
1691 ether_addr_copy(sa, eth->h_source);
1692 skb_pull(msdu, sizeof(struct ethhdr));
1693
1694 /* push rfc1042/llc/snap */
1695 memcpy(skb_push(msdu, sizeof(struct rfc1042_hdr)), rfc1042,
1696 sizeof(struct rfc1042_hdr));
1697
1698 /* push original 802.11 header */
1699 hdr = (struct ieee80211_hdr *)first_hdr;
1700 hdr_len = ieee80211_hdrlen(hdr->frame_control);
1701
1702 if (!(status->flag & RX_FLAG_IV_STRIPPED)) {
1703 memcpy(skb_push(msdu,
1704 ath10k_htt_rx_crypto_param_len(ar, enctype)),
1705 (void *)hdr + round_up(hdr_len, bytes_aligned),
1706 ath10k_htt_rx_crypto_param_len(ar, enctype));
1707 }
1708
1709 memcpy(skb_push(msdu, hdr_len), hdr, hdr_len);
1710
1711 /* original 802.11 header has a different DA and in
1712 * case of 4addr it may also have different SA
1713 */
1714 hdr = (struct ieee80211_hdr *)msdu->data;
1715 ether_addr_copy(ieee80211_get_DA(hdr), da);
1716 ether_addr_copy(ieee80211_get_SA(hdr), sa);
1717 }
1718
ath10k_htt_rx_h_undecap_snap(struct ath10k * ar,struct sk_buff * msdu,struct ieee80211_rx_status * status,const u8 first_hdr[64],enum htt_rx_mpdu_encrypt_type enctype)1719 static void ath10k_htt_rx_h_undecap_snap(struct ath10k *ar,
1720 struct sk_buff *msdu,
1721 struct ieee80211_rx_status *status,
1722 const u8 first_hdr[64],
1723 enum htt_rx_mpdu_encrypt_type enctype)
1724 {
1725 struct ath10k_hw_params *hw = &ar->hw_params;
1726 struct ieee80211_hdr *hdr;
1727 size_t hdr_len;
1728 int l3_pad_bytes;
1729 struct htt_rx_desc *rxd;
1730 int bytes_aligned = ar->hw_params.decap_align_bytes;
1731
1732 /* Delivered decapped frame:
1733 * [amsdu header] <-- replaced with 802.11 hdr
1734 * [rfc1042/llc]
1735 * [payload]
1736 */
1737
1738 rxd = HTT_RX_BUF_TO_RX_DESC(hw,
1739 (void *)msdu->data - hw->rx_desc_ops->rx_desc_size);
1740
1741 l3_pad_bytes = ath10k_htt_rx_desc_get_l3_pad_bytes(&ar->hw_params, rxd);
1742
1743 skb_put(msdu, l3_pad_bytes);
1744 skb_pull(msdu, sizeof(struct amsdu_subframe_hdr) + l3_pad_bytes);
1745
1746 hdr = (struct ieee80211_hdr *)first_hdr;
1747 hdr_len = ieee80211_hdrlen(hdr->frame_control);
1748
1749 if (!(status->flag & RX_FLAG_IV_STRIPPED)) {
1750 memcpy(skb_push(msdu,
1751 ath10k_htt_rx_crypto_param_len(ar, enctype)),
1752 (void *)hdr + round_up(hdr_len, bytes_aligned),
1753 ath10k_htt_rx_crypto_param_len(ar, enctype));
1754 }
1755
1756 memcpy(skb_push(msdu, hdr_len), hdr, hdr_len);
1757 }
1758
ath10k_htt_rx_h_undecap(struct ath10k * ar,struct sk_buff * msdu,struct ieee80211_rx_status * status,u8 first_hdr[64],enum htt_rx_mpdu_encrypt_type enctype,bool is_decrypted)1759 static void ath10k_htt_rx_h_undecap(struct ath10k *ar,
1760 struct sk_buff *msdu,
1761 struct ieee80211_rx_status *status,
1762 u8 first_hdr[64],
1763 enum htt_rx_mpdu_encrypt_type enctype,
1764 bool is_decrypted)
1765 {
1766 struct ath10k_hw_params *hw = &ar->hw_params;
1767 struct htt_rx_desc *rxd;
1768 struct rx_msdu_start_common *rxd_msdu_start_common;
1769 enum rx_msdu_decap_format decap;
1770
1771 /* First msdu's decapped header:
1772 * [802.11 header] <-- padded to 4 bytes long
1773 * [crypto param] <-- padded to 4 bytes long
1774 * [amsdu header] <-- only if A-MSDU
1775 * [rfc1042/llc]
1776 *
1777 * Other (2nd, 3rd, ..) msdu's decapped header:
1778 * [amsdu header] <-- only if A-MSDU
1779 * [rfc1042/llc]
1780 */
1781
1782 rxd = HTT_RX_BUF_TO_RX_DESC(hw,
1783 (void *)msdu->data - hw->rx_desc_ops->rx_desc_size);
1784
1785 rxd_msdu_start_common = ath10k_htt_rx_desc_get_msdu_start(hw, rxd);
1786 decap = MS(__le32_to_cpu(rxd_msdu_start_common->info1),
1787 RX_MSDU_START_INFO1_DECAP_FORMAT);
1788
1789 switch (decap) {
1790 case RX_MSDU_DECAP_RAW:
1791 ath10k_htt_rx_h_undecap_raw(ar, msdu, status, enctype,
1792 is_decrypted, first_hdr);
1793 break;
1794 case RX_MSDU_DECAP_NATIVE_WIFI:
1795 ath10k_htt_rx_h_undecap_nwifi(ar, msdu, status, first_hdr,
1796 enctype);
1797 break;
1798 case RX_MSDU_DECAP_ETHERNET2_DIX:
1799 ath10k_htt_rx_h_undecap_eth(ar, msdu, status, first_hdr, enctype);
1800 break;
1801 case RX_MSDU_DECAP_8023_SNAP_LLC:
1802 ath10k_htt_rx_h_undecap_snap(ar, msdu, status, first_hdr,
1803 enctype);
1804 break;
1805 }
1806 }
1807
ath10k_htt_rx_get_csum_state(struct ath10k_hw_params * hw,struct sk_buff * skb)1808 static int ath10k_htt_rx_get_csum_state(struct ath10k_hw_params *hw, struct sk_buff *skb)
1809 {
1810 struct htt_rx_desc *rxd;
1811 struct rx_attention *rxd_attention;
1812 struct rx_msdu_start_common *rxd_msdu_start_common;
1813 u32 flags, info;
1814 bool is_ip4, is_ip6;
1815 bool is_tcp, is_udp;
1816 bool ip_csum_ok, tcpudp_csum_ok;
1817
1818 rxd = HTT_RX_BUF_TO_RX_DESC(hw,
1819 (void *)skb->data - hw->rx_desc_ops->rx_desc_size);
1820
1821 rxd_attention = ath10k_htt_rx_desc_get_attention(hw, rxd);
1822 rxd_msdu_start_common = ath10k_htt_rx_desc_get_msdu_start(hw, rxd);
1823 flags = __le32_to_cpu(rxd_attention->flags);
1824 info = __le32_to_cpu(rxd_msdu_start_common->info1);
1825
1826 is_ip4 = !!(info & RX_MSDU_START_INFO1_IPV4_PROTO);
1827 is_ip6 = !!(info & RX_MSDU_START_INFO1_IPV6_PROTO);
1828 is_tcp = !!(info & RX_MSDU_START_INFO1_TCP_PROTO);
1829 is_udp = !!(info & RX_MSDU_START_INFO1_UDP_PROTO);
1830 ip_csum_ok = !(flags & RX_ATTENTION_FLAGS_IP_CHKSUM_FAIL);
1831 tcpudp_csum_ok = !(flags & RX_ATTENTION_FLAGS_TCP_UDP_CHKSUM_FAIL);
1832
1833 if (!is_ip4 && !is_ip6)
1834 return CHECKSUM_NONE;
1835 if (!is_tcp && !is_udp)
1836 return CHECKSUM_NONE;
1837 if (!ip_csum_ok)
1838 return CHECKSUM_NONE;
1839 if (!tcpudp_csum_ok)
1840 return CHECKSUM_NONE;
1841
1842 return CHECKSUM_UNNECESSARY;
1843 }
1844
ath10k_htt_rx_h_csum_offload(struct ath10k_hw_params * hw,struct sk_buff * msdu)1845 static void ath10k_htt_rx_h_csum_offload(struct ath10k_hw_params *hw,
1846 struct sk_buff *msdu)
1847 {
1848 msdu->ip_summed = ath10k_htt_rx_get_csum_state(hw, msdu);
1849 }
1850
ath10k_htt_rx_h_get_pn(struct ath10k * ar,struct sk_buff * skb,enum htt_rx_mpdu_encrypt_type enctype)1851 static u64 ath10k_htt_rx_h_get_pn(struct ath10k *ar, struct sk_buff *skb,
1852 enum htt_rx_mpdu_encrypt_type enctype)
1853 {
1854 struct ieee80211_hdr *hdr;
1855 u64 pn = 0;
1856 u8 *ehdr;
1857
1858 hdr = (struct ieee80211_hdr *)skb->data;
1859 ehdr = skb->data + ieee80211_hdrlen(hdr->frame_control);
1860
1861 if (enctype == HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2) {
1862 pn = ehdr[0];
1863 pn |= (u64)ehdr[1] << 8;
1864 pn |= (u64)ehdr[4] << 16;
1865 pn |= (u64)ehdr[5] << 24;
1866 pn |= (u64)ehdr[6] << 32;
1867 pn |= (u64)ehdr[7] << 40;
1868 }
1869 return pn;
1870 }
1871
ath10k_htt_rx_h_frag_multicast_check(struct ath10k * ar,struct sk_buff * skb)1872 static bool ath10k_htt_rx_h_frag_multicast_check(struct ath10k *ar,
1873 struct sk_buff *skb)
1874 {
1875 struct ieee80211_hdr *hdr;
1876
1877 hdr = (struct ieee80211_hdr *)skb->data;
1878 return !is_multicast_ether_addr(hdr->addr1);
1879 }
1880
ath10k_htt_rx_h_frag_pn_check(struct ath10k * ar,struct sk_buff * skb,u16 peer_id,enum htt_rx_mpdu_encrypt_type enctype)1881 static bool ath10k_htt_rx_h_frag_pn_check(struct ath10k *ar,
1882 struct sk_buff *skb,
1883 u16 peer_id,
1884 enum htt_rx_mpdu_encrypt_type enctype)
1885 {
1886 struct ath10k_peer *peer;
1887 union htt_rx_pn_t *last_pn, new_pn = {};
1888 struct ieee80211_hdr *hdr;
1889 u8 tid, frag_number;
1890 u32 seq;
1891
1892 peer = ath10k_peer_find_by_id(ar, peer_id);
1893 if (!peer) {
1894 ath10k_dbg(ar, ATH10K_DBG_HTT, "invalid peer for frag pn check\n");
1895 return false;
1896 }
1897
1898 hdr = (struct ieee80211_hdr *)skb->data;
1899 if (ieee80211_is_data_qos(hdr->frame_control))
1900 tid = ieee80211_get_tid(hdr);
1901 else
1902 tid = ATH10K_TXRX_NON_QOS_TID;
1903
1904 last_pn = &peer->frag_tids_last_pn[tid];
1905 new_pn.pn48 = ath10k_htt_rx_h_get_pn(ar, skb, enctype);
1906 frag_number = le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_FRAG;
1907 seq = IEEE80211_SEQ_TO_SN(__le16_to_cpu(hdr->seq_ctrl));
1908
1909 if (frag_number == 0) {
1910 last_pn->pn48 = new_pn.pn48;
1911 peer->frag_tids_seq[tid] = seq;
1912 } else {
1913 if (seq != peer->frag_tids_seq[tid])
1914 return false;
1915
1916 if (new_pn.pn48 != last_pn->pn48 + 1)
1917 return false;
1918
1919 last_pn->pn48 = new_pn.pn48;
1920 }
1921
1922 return true;
1923 }
1924
ath10k_htt_rx_h_mpdu(struct ath10k * ar,struct sk_buff_head * amsdu,struct ieee80211_rx_status * status,bool fill_crypt_header,u8 * rx_hdr,enum ath10k_pkt_rx_err * err,u16 peer_id,bool frag)1925 static void ath10k_htt_rx_h_mpdu(struct ath10k *ar,
1926 struct sk_buff_head *amsdu,
1927 struct ieee80211_rx_status *status,
1928 bool fill_crypt_header,
1929 u8 *rx_hdr,
1930 enum ath10k_pkt_rx_err *err,
1931 u16 peer_id,
1932 bool frag)
1933 {
1934 struct sk_buff *first;
1935 struct sk_buff *last;
1936 struct sk_buff *msdu, *temp;
1937 struct ath10k_hw_params *hw = &ar->hw_params;
1938 struct htt_rx_desc *rxd;
1939 struct rx_attention *rxd_attention;
1940 struct rx_mpdu_start *rxd_mpdu_start;
1941
1942 struct ieee80211_hdr *hdr;
1943 enum htt_rx_mpdu_encrypt_type enctype;
1944 u8 first_hdr[64];
1945 u8 *qos;
1946 bool has_fcs_err;
1947 bool has_crypto_err;
1948 bool has_tkip_err;
1949 bool has_peer_idx_invalid;
1950 bool is_decrypted;
1951 bool is_mgmt;
1952 u32 attention;
1953 bool frag_pn_check = true, multicast_check = true;
1954
1955 if (skb_queue_empty(amsdu))
1956 return;
1957
1958 first = skb_peek(amsdu);
1959 rxd = HTT_RX_BUF_TO_RX_DESC(hw,
1960 (void *)first->data - hw->rx_desc_ops->rx_desc_size);
1961
1962 rxd_attention = ath10k_htt_rx_desc_get_attention(hw, rxd);
1963 rxd_mpdu_start = ath10k_htt_rx_desc_get_mpdu_start(hw, rxd);
1964
1965 is_mgmt = !!(rxd_attention->flags &
1966 __cpu_to_le32(RX_ATTENTION_FLAGS_MGMT_TYPE));
1967
1968 enctype = MS(__le32_to_cpu(rxd_mpdu_start->info0),
1969 RX_MPDU_START_INFO0_ENCRYPT_TYPE);
1970
1971 /* First MSDU's Rx descriptor in an A-MSDU contains full 802.11
1972 * decapped header. It'll be used for undecapping of each MSDU.
1973 */
1974 hdr = (void *)ath10k_htt_rx_desc_get_rx_hdr_status(hw, rxd);
1975 memcpy(first_hdr, hdr, RX_HTT_HDR_STATUS_LEN);
1976
1977 if (rx_hdr)
1978 memcpy(rx_hdr, hdr, RX_HTT_HDR_STATUS_LEN);
1979
1980 /* Each A-MSDU subframe will use the original header as the base and be
1981 * reported as a separate MSDU so strip the A-MSDU bit from QoS Ctl.
1982 */
1983 hdr = (void *)first_hdr;
1984
1985 if (ieee80211_is_data_qos(hdr->frame_control)) {
1986 qos = ieee80211_get_qos_ctl(hdr);
1987 qos[0] &= ~IEEE80211_QOS_CTL_A_MSDU_PRESENT;
1988 }
1989
1990 /* Some attention flags are valid only in the last MSDU. */
1991 last = skb_peek_tail(amsdu);
1992 rxd = HTT_RX_BUF_TO_RX_DESC(hw,
1993 (void *)last->data - hw->rx_desc_ops->rx_desc_size);
1994
1995 rxd_attention = ath10k_htt_rx_desc_get_attention(hw, rxd);
1996 attention = __le32_to_cpu(rxd_attention->flags);
1997
1998 has_fcs_err = !!(attention & RX_ATTENTION_FLAGS_FCS_ERR);
1999 has_crypto_err = !!(attention & RX_ATTENTION_FLAGS_DECRYPT_ERR);
2000 has_tkip_err = !!(attention & RX_ATTENTION_FLAGS_TKIP_MIC_ERR);
2001 has_peer_idx_invalid = !!(attention & RX_ATTENTION_FLAGS_PEER_IDX_INVALID);
2002
2003 /* Note: If hardware captures an encrypted frame that it can't decrypt,
2004 * e.g. due to fcs error, missing peer or invalid key data it will
2005 * report the frame as raw.
2006 */
2007 is_decrypted = (enctype != HTT_RX_MPDU_ENCRYPT_NONE &&
2008 !has_fcs_err &&
2009 !has_crypto_err &&
2010 !has_peer_idx_invalid);
2011
2012 /* Clear per-MPDU flags while leaving per-PPDU flags intact. */
2013 status->flag &= ~(RX_FLAG_FAILED_FCS_CRC |
2014 RX_FLAG_MMIC_ERROR |
2015 RX_FLAG_DECRYPTED |
2016 RX_FLAG_IV_STRIPPED |
2017 RX_FLAG_ONLY_MONITOR |
2018 RX_FLAG_MMIC_STRIPPED);
2019
2020 if (has_fcs_err)
2021 status->flag |= RX_FLAG_FAILED_FCS_CRC;
2022
2023 if (has_tkip_err)
2024 status->flag |= RX_FLAG_MMIC_ERROR;
2025
2026 if (err) {
2027 if (has_fcs_err)
2028 *err = ATH10K_PKT_RX_ERR_FCS;
2029 else if (has_tkip_err)
2030 *err = ATH10K_PKT_RX_ERR_TKIP;
2031 else if (has_crypto_err)
2032 *err = ATH10K_PKT_RX_ERR_CRYPT;
2033 else if (has_peer_idx_invalid)
2034 *err = ATH10K_PKT_RX_ERR_PEER_IDX_INVAL;
2035 }
2036
2037 /* Firmware reports all necessary management frames via WMI already.
2038 * They are not reported to monitor interfaces at all so pass the ones
2039 * coming via HTT to monitor interfaces instead. This simplifies
2040 * matters a lot.
2041 */
2042 if (is_mgmt)
2043 status->flag |= RX_FLAG_ONLY_MONITOR;
2044
2045 if (is_decrypted) {
2046 status->flag |= RX_FLAG_DECRYPTED;
2047
2048 if (likely(!is_mgmt))
2049 status->flag |= RX_FLAG_MMIC_STRIPPED;
2050
2051 if (fill_crypt_header)
2052 status->flag |= RX_FLAG_MIC_STRIPPED |
2053 RX_FLAG_ICV_STRIPPED;
2054 else
2055 status->flag |= RX_FLAG_IV_STRIPPED;
2056 }
2057
2058 skb_queue_walk(amsdu, msdu) {
2059 if (frag && !fill_crypt_header && is_decrypted &&
2060 enctype == HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2)
2061 frag_pn_check = ath10k_htt_rx_h_frag_pn_check(ar,
2062 msdu,
2063 peer_id,
2064 enctype);
2065
2066 if (frag)
2067 multicast_check = ath10k_htt_rx_h_frag_multicast_check(ar,
2068 msdu);
2069
2070 if (!frag_pn_check || !multicast_check) {
2071 /* Discard the fragment with invalid PN or multicast DA
2072 */
2073 temp = msdu->prev;
2074 __skb_unlink(msdu, amsdu);
2075 dev_kfree_skb_any(msdu);
2076 msdu = temp;
2077 frag_pn_check = true;
2078 multicast_check = true;
2079 continue;
2080 }
2081
2082 ath10k_htt_rx_h_csum_offload(&ar->hw_params, msdu);
2083
2084 if (frag && !fill_crypt_header &&
2085 enctype == HTT_RX_MPDU_ENCRYPT_TKIP_WPA)
2086 status->flag &= ~RX_FLAG_MMIC_STRIPPED;
2087
2088 ath10k_htt_rx_h_undecap(ar, msdu, status, first_hdr, enctype,
2089 is_decrypted);
2090
2091 /* Undecapping involves copying the original 802.11 header back
2092 * to sk_buff. If frame is protected and hardware has decrypted
2093 * it then remove the protected bit.
2094 */
2095 if (!is_decrypted)
2096 continue;
2097 if (is_mgmt)
2098 continue;
2099
2100 if (fill_crypt_header)
2101 continue;
2102
2103 hdr = (void *)msdu->data;
2104 hdr->frame_control &= ~__cpu_to_le16(IEEE80211_FCTL_PROTECTED);
2105
2106 if (frag && !fill_crypt_header &&
2107 enctype == HTT_RX_MPDU_ENCRYPT_TKIP_WPA)
2108 status->flag &= ~RX_FLAG_IV_STRIPPED &
2109 ~RX_FLAG_MMIC_STRIPPED;
2110 }
2111 }
2112
ath10k_htt_rx_h_enqueue(struct ath10k * ar,struct sk_buff_head * amsdu,struct ieee80211_rx_status * status)2113 static void ath10k_htt_rx_h_enqueue(struct ath10k *ar,
2114 struct sk_buff_head *amsdu,
2115 struct ieee80211_rx_status *status)
2116 {
2117 struct sk_buff *msdu;
2118 struct sk_buff *first_subframe;
2119
2120 first_subframe = skb_peek(amsdu);
2121
2122 while ((msdu = __skb_dequeue(amsdu))) {
2123 /* Setup per-MSDU flags */
2124 if (skb_queue_empty(amsdu))
2125 status->flag &= ~RX_FLAG_AMSDU_MORE;
2126 else
2127 status->flag |= RX_FLAG_AMSDU_MORE;
2128
2129 if (msdu == first_subframe) {
2130 first_subframe = NULL;
2131 status->flag &= ~RX_FLAG_ALLOW_SAME_PN;
2132 } else {
2133 status->flag |= RX_FLAG_ALLOW_SAME_PN;
2134 }
2135
2136 ath10k_htt_rx_h_queue_msdu(ar, status, msdu);
2137 }
2138 }
2139
ath10k_unchain_msdu(struct sk_buff_head * amsdu,unsigned long * unchain_cnt)2140 static int ath10k_unchain_msdu(struct sk_buff_head *amsdu,
2141 unsigned long *unchain_cnt)
2142 {
2143 struct sk_buff *skb, *first;
2144 int space;
2145 int total_len = 0;
2146 int amsdu_len = skb_queue_len(amsdu);
2147
2148 /* TODO: Might could optimize this by using
2149 * skb_try_coalesce or similar method to
2150 * decrease copying, or maybe get mac80211 to
2151 * provide a way to just receive a list of
2152 * skb?
2153 */
2154
2155 first = __skb_dequeue(amsdu);
2156
2157 /* Allocate total length all at once. */
2158 skb_queue_walk(amsdu, skb)
2159 total_len += skb->len;
2160
2161 space = total_len - skb_tailroom(first);
2162 if ((space > 0) &&
2163 (pskb_expand_head(first, 0, space, GFP_ATOMIC) < 0)) {
2164 /* TODO: bump some rx-oom error stat */
2165 /* put it back together so we can free the
2166 * whole list at once.
2167 */
2168 __skb_queue_head(amsdu, first);
2169 return -1;
2170 }
2171
2172 /* Walk list again, copying contents into
2173 * msdu_head
2174 */
2175 while ((skb = __skb_dequeue(amsdu))) {
2176 skb_copy_from_linear_data(skb, skb_put(first, skb->len),
2177 skb->len);
2178 dev_kfree_skb_any(skb);
2179 }
2180
2181 __skb_queue_head(amsdu, first);
2182
2183 *unchain_cnt += amsdu_len - 1;
2184
2185 return 0;
2186 }
2187
ath10k_htt_rx_h_unchain(struct ath10k * ar,struct sk_buff_head * amsdu,unsigned long * drop_cnt,unsigned long * unchain_cnt)2188 static void ath10k_htt_rx_h_unchain(struct ath10k *ar,
2189 struct sk_buff_head *amsdu,
2190 unsigned long *drop_cnt,
2191 unsigned long *unchain_cnt)
2192 {
2193 struct sk_buff *first;
2194 struct ath10k_hw_params *hw = &ar->hw_params;
2195 struct htt_rx_desc *rxd;
2196 struct rx_msdu_start_common *rxd_msdu_start_common;
2197 struct rx_frag_info_common *rxd_frag_info;
2198 enum rx_msdu_decap_format decap;
2199
2200 first = skb_peek(amsdu);
2201 rxd = HTT_RX_BUF_TO_RX_DESC(hw,
2202 (void *)first->data - hw->rx_desc_ops->rx_desc_size);
2203
2204 rxd_msdu_start_common = ath10k_htt_rx_desc_get_msdu_start(hw, rxd);
2205 rxd_frag_info = ath10k_htt_rx_desc_get_frag_info(hw, rxd);
2206 decap = MS(__le32_to_cpu(rxd_msdu_start_common->info1),
2207 RX_MSDU_START_INFO1_DECAP_FORMAT);
2208
2209 /* FIXME: Current unchaining logic can only handle simple case of raw
2210 * msdu chaining. If decapping is other than raw the chaining may be
2211 * more complex and this isn't handled by the current code. Don't even
2212 * try re-constructing such frames - it'll be pretty much garbage.
2213 */
2214 if (decap != RX_MSDU_DECAP_RAW ||
2215 skb_queue_len(amsdu) != 1 + rxd_frag_info->ring2_more_count) {
2216 *drop_cnt += skb_queue_len(amsdu);
2217 __skb_queue_purge(amsdu);
2218 return;
2219 }
2220
2221 ath10k_unchain_msdu(amsdu, unchain_cnt);
2222 }
2223
ath10k_htt_rx_validate_amsdu(struct ath10k * ar,struct sk_buff_head * amsdu)2224 static bool ath10k_htt_rx_validate_amsdu(struct ath10k *ar,
2225 struct sk_buff_head *amsdu)
2226 {
2227 u8 *subframe_hdr;
2228 struct sk_buff *first;
2229 bool is_first, is_last;
2230 struct ath10k_hw_params *hw = &ar->hw_params;
2231 struct htt_rx_desc *rxd;
2232 struct rx_msdu_end_common *rxd_msdu_end_common;
2233 struct rx_mpdu_start *rxd_mpdu_start;
2234 struct ieee80211_hdr *hdr;
2235 size_t hdr_len, crypto_len;
2236 enum htt_rx_mpdu_encrypt_type enctype;
2237 int bytes_aligned = ar->hw_params.decap_align_bytes;
2238
2239 first = skb_peek(amsdu);
2240
2241 rxd = HTT_RX_BUF_TO_RX_DESC(hw,
2242 (void *)first->data - hw->rx_desc_ops->rx_desc_size);
2243
2244 rxd_msdu_end_common = ath10k_htt_rx_desc_get_msdu_end(hw, rxd);
2245 rxd_mpdu_start = ath10k_htt_rx_desc_get_mpdu_start(hw, rxd);
2246 hdr = (void *)ath10k_htt_rx_desc_get_rx_hdr_status(hw, rxd);
2247
2248 is_first = !!(rxd_msdu_end_common->info0 &
2249 __cpu_to_le32(RX_MSDU_END_INFO0_FIRST_MSDU));
2250 is_last = !!(rxd_msdu_end_common->info0 &
2251 __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU));
2252
2253 /* Return in case of non-aggregated msdu */
2254 if (is_first && is_last)
2255 return true;
2256
2257 /* First msdu flag is not set for the first msdu of the list */
2258 if (!is_first)
2259 return false;
2260
2261 enctype = MS(__le32_to_cpu(rxd_mpdu_start->info0),
2262 RX_MPDU_START_INFO0_ENCRYPT_TYPE);
2263
2264 hdr_len = ieee80211_hdrlen(hdr->frame_control);
2265 crypto_len = ath10k_htt_rx_crypto_param_len(ar, enctype);
2266
2267 subframe_hdr = (u8 *)hdr + round_up(hdr_len, bytes_aligned) +
2268 crypto_len;
2269
2270 /* Validate if the amsdu has a proper first subframe.
2271 * There are chances a single msdu can be received as amsdu when
2272 * the unauthenticated amsdu flag of a QoS header
2273 * gets flipped in non-SPP AMSDU's, in such cases the first
2274 * subframe has llc/snap header in place of a valid da.
2275 * return false if the da matches rfc1042 pattern
2276 */
2277 if (ether_addr_equal(subframe_hdr, rfc1042_header))
2278 return false;
2279
2280 return true;
2281 }
2282
ath10k_htt_rx_amsdu_allowed(struct ath10k * ar,struct sk_buff_head * amsdu,struct ieee80211_rx_status * rx_status)2283 static bool ath10k_htt_rx_amsdu_allowed(struct ath10k *ar,
2284 struct sk_buff_head *amsdu,
2285 struct ieee80211_rx_status *rx_status)
2286 {
2287 if (!rx_status->freq) {
2288 ath10k_dbg(ar, ATH10K_DBG_HTT, "no channel configured; ignoring frame(s)!\n");
2289 return false;
2290 }
2291
2292 if (test_bit(ATH10K_CAC_RUNNING, &ar->dev_flags)) {
2293 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx cac running\n");
2294 return false;
2295 }
2296
2297 if (!ath10k_htt_rx_validate_amsdu(ar, amsdu)) {
2298 ath10k_dbg(ar, ATH10K_DBG_HTT, "invalid amsdu received\n");
2299 return false;
2300 }
2301
2302 return true;
2303 }
2304
ath10k_htt_rx_h_filter(struct ath10k * ar,struct sk_buff_head * amsdu,struct ieee80211_rx_status * rx_status,unsigned long * drop_cnt)2305 static void ath10k_htt_rx_h_filter(struct ath10k *ar,
2306 struct sk_buff_head *amsdu,
2307 struct ieee80211_rx_status *rx_status,
2308 unsigned long *drop_cnt)
2309 {
2310 if (skb_queue_empty(amsdu))
2311 return;
2312
2313 if (ath10k_htt_rx_amsdu_allowed(ar, amsdu, rx_status))
2314 return;
2315
2316 if (drop_cnt)
2317 *drop_cnt += skb_queue_len(amsdu);
2318
2319 __skb_queue_purge(amsdu);
2320 }
2321
ath10k_htt_rx_handle_amsdu(struct ath10k_htt * htt)2322 static int ath10k_htt_rx_handle_amsdu(struct ath10k_htt *htt)
2323 {
2324 struct ath10k *ar = htt->ar;
2325 struct ieee80211_rx_status *rx_status = &htt->rx_status;
2326 struct sk_buff_head amsdu;
2327 int ret;
2328 unsigned long drop_cnt = 0;
2329 unsigned long unchain_cnt = 0;
2330 unsigned long drop_cnt_filter = 0;
2331 unsigned long msdus_to_queue, num_msdus;
2332 enum ath10k_pkt_rx_err err = ATH10K_PKT_RX_ERR_MAX;
2333 u8 first_hdr[RX_HTT_HDR_STATUS_LEN];
2334
2335 __skb_queue_head_init(&amsdu);
2336
2337 spin_lock_bh(&htt->rx_ring.lock);
2338 if (htt->rx_confused) {
2339 spin_unlock_bh(&htt->rx_ring.lock);
2340 return -EIO;
2341 }
2342 ret = ath10k_htt_rx_amsdu_pop(htt, &amsdu);
2343 spin_unlock_bh(&htt->rx_ring.lock);
2344
2345 if (ret < 0) {
2346 ath10k_warn(ar, "rx ring became corrupted: %d\n", ret);
2347 __skb_queue_purge(&amsdu);
2348 /* FIXME: It's probably a good idea to reboot the
2349 * device instead of leaving it inoperable.
2350 */
2351 htt->rx_confused = true;
2352 return ret;
2353 }
2354
2355 num_msdus = skb_queue_len(&amsdu);
2356
2357 ath10k_htt_rx_h_ppdu(ar, &amsdu, rx_status, 0xffff);
2358
2359 /* only for ret = 1 indicates chained msdus */
2360 if (ret > 0)
2361 ath10k_htt_rx_h_unchain(ar, &amsdu, &drop_cnt, &unchain_cnt);
2362
2363 ath10k_htt_rx_h_filter(ar, &amsdu, rx_status, &drop_cnt_filter);
2364 ath10k_htt_rx_h_mpdu(ar, &amsdu, rx_status, true, first_hdr, &err, 0,
2365 false);
2366 msdus_to_queue = skb_queue_len(&amsdu);
2367 ath10k_htt_rx_h_enqueue(ar, &amsdu, rx_status);
2368
2369 ath10k_sta_update_rx_tid_stats(ar, first_hdr, num_msdus, err,
2370 unchain_cnt, drop_cnt, drop_cnt_filter,
2371 msdus_to_queue);
2372
2373 return 0;
2374 }
2375
ath10k_htt_rx_mpdu_desc_pn_hl(struct htt_hl_rx_desc * rx_desc,union htt_rx_pn_t * pn,int pn_len_bits)2376 static void ath10k_htt_rx_mpdu_desc_pn_hl(struct htt_hl_rx_desc *rx_desc,
2377 union htt_rx_pn_t *pn,
2378 int pn_len_bits)
2379 {
2380 switch (pn_len_bits) {
2381 case 48:
2382 pn->pn48 = __le32_to_cpu(rx_desc->pn_31_0) +
2383 ((u64)(__le32_to_cpu(rx_desc->u0.pn_63_32) & 0xFFFF) << 32);
2384 break;
2385 case 24:
2386 pn->pn24 = __le32_to_cpu(rx_desc->pn_31_0);
2387 break;
2388 }
2389 }
2390
ath10k_htt_rx_pn_cmp48(union htt_rx_pn_t * new_pn,union htt_rx_pn_t * old_pn)2391 static bool ath10k_htt_rx_pn_cmp48(union htt_rx_pn_t *new_pn,
2392 union htt_rx_pn_t *old_pn)
2393 {
2394 return ((new_pn->pn48 & 0xffffffffffffULL) <=
2395 (old_pn->pn48 & 0xffffffffffffULL));
2396 }
2397
ath10k_htt_rx_pn_check_replay_hl(struct ath10k * ar,struct ath10k_peer * peer,struct htt_rx_indication_hl * rx)2398 static bool ath10k_htt_rx_pn_check_replay_hl(struct ath10k *ar,
2399 struct ath10k_peer *peer,
2400 struct htt_rx_indication_hl *rx)
2401 {
2402 bool last_pn_valid, pn_invalid = false;
2403 enum htt_txrx_sec_cast_type sec_index;
2404 enum htt_security_types sec_type;
2405 union htt_rx_pn_t new_pn = {};
2406 struct htt_hl_rx_desc *rx_desc;
2407 union htt_rx_pn_t *last_pn;
2408 u32 rx_desc_info, tid;
2409 int num_mpdu_ranges;
2410
2411 lockdep_assert_held(&ar->data_lock);
2412
2413 if (!peer)
2414 return false;
2415
2416 if (!(rx->fw_desc.flags & FW_RX_DESC_FLAGS_FIRST_MSDU))
2417 return false;
2418
2419 num_mpdu_ranges = MS(__le32_to_cpu(rx->hdr.info1),
2420 HTT_RX_INDICATION_INFO1_NUM_MPDU_RANGES);
2421
2422 rx_desc = (struct htt_hl_rx_desc *)&rx->mpdu_ranges[num_mpdu_ranges];
2423 rx_desc_info = __le32_to_cpu(rx_desc->info);
2424
2425 if (!MS(rx_desc_info, HTT_RX_DESC_HL_INFO_ENCRYPTED))
2426 return false;
2427
2428 tid = MS(rx->hdr.info0, HTT_RX_INDICATION_INFO0_EXT_TID);
2429 last_pn_valid = peer->tids_last_pn_valid[tid];
2430 last_pn = &peer->tids_last_pn[tid];
2431
2432 if (MS(rx_desc_info, HTT_RX_DESC_HL_INFO_MCAST_BCAST))
2433 sec_index = HTT_TXRX_SEC_MCAST;
2434 else
2435 sec_index = HTT_TXRX_SEC_UCAST;
2436
2437 sec_type = peer->rx_pn[sec_index].sec_type;
2438 ath10k_htt_rx_mpdu_desc_pn_hl(rx_desc, &new_pn, peer->rx_pn[sec_index].pn_len);
2439
2440 if (sec_type != HTT_SECURITY_AES_CCMP &&
2441 sec_type != HTT_SECURITY_TKIP &&
2442 sec_type != HTT_SECURITY_TKIP_NOMIC)
2443 return false;
2444
2445 if (last_pn_valid)
2446 pn_invalid = ath10k_htt_rx_pn_cmp48(&new_pn, last_pn);
2447 else
2448 peer->tids_last_pn_valid[tid] = true;
2449
2450 if (!pn_invalid)
2451 last_pn->pn48 = new_pn.pn48;
2452
2453 return pn_invalid;
2454 }
2455
ath10k_htt_rx_proc_rx_ind_hl(struct ath10k_htt * htt,struct htt_rx_indication_hl * rx,struct sk_buff * skb,enum htt_rx_pn_check_type check_pn_type,enum htt_rx_tkip_demic_type tkip_mic_type)2456 static bool ath10k_htt_rx_proc_rx_ind_hl(struct ath10k_htt *htt,
2457 struct htt_rx_indication_hl *rx,
2458 struct sk_buff *skb,
2459 enum htt_rx_pn_check_type check_pn_type,
2460 enum htt_rx_tkip_demic_type tkip_mic_type)
2461 {
2462 struct ath10k *ar = htt->ar;
2463 struct ath10k_peer *peer;
2464 struct htt_rx_indication_mpdu_range *mpdu_ranges;
2465 struct fw_rx_desc_hl *fw_desc;
2466 enum htt_txrx_sec_cast_type sec_index;
2467 enum htt_security_types sec_type;
2468 union htt_rx_pn_t new_pn = {};
2469 struct htt_hl_rx_desc *rx_desc;
2470 struct ieee80211_hdr *hdr;
2471 struct ieee80211_rx_status *rx_status;
2472 u16 peer_id;
2473 u8 rx_desc_len;
2474 int num_mpdu_ranges;
2475 size_t tot_hdr_len;
2476 struct ieee80211_channel *ch;
2477 bool pn_invalid, qos, first_msdu;
2478 u32 tid, rx_desc_info;
2479
2480 peer_id = __le16_to_cpu(rx->hdr.peer_id);
2481 tid = MS(rx->hdr.info0, HTT_RX_INDICATION_INFO0_EXT_TID);
2482
2483 spin_lock_bh(&ar->data_lock);
2484 peer = ath10k_peer_find_by_id(ar, peer_id);
2485 spin_unlock_bh(&ar->data_lock);
2486 if (!peer && peer_id != HTT_INVALID_PEERID)
2487 ath10k_warn(ar, "Got RX ind from invalid peer: %u\n", peer_id);
2488
2489 if (!peer)
2490 return true;
2491
2492 num_mpdu_ranges = MS(__le32_to_cpu(rx->hdr.info1),
2493 HTT_RX_INDICATION_INFO1_NUM_MPDU_RANGES);
2494 mpdu_ranges = htt_rx_ind_get_mpdu_ranges_hl(rx);
2495 fw_desc = &rx->fw_desc;
2496 rx_desc_len = fw_desc->len;
2497
2498 if (fw_desc->u.bits.discard) {
2499 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt discard mpdu\n");
2500 goto err;
2501 }
2502
2503 /* I have not yet seen any case where num_mpdu_ranges > 1.
2504 * qcacld does not seem handle that case either, so we introduce the
2505 * same limitation here as well.
2506 */
2507 if (num_mpdu_ranges > 1)
2508 ath10k_warn(ar,
2509 "Unsupported number of MPDU ranges: %d, ignoring all but the first\n",
2510 num_mpdu_ranges);
2511
2512 if (mpdu_ranges->mpdu_range_status !=
2513 HTT_RX_IND_MPDU_STATUS_OK &&
2514 mpdu_ranges->mpdu_range_status !=
2515 HTT_RX_IND_MPDU_STATUS_TKIP_MIC_ERR) {
2516 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt mpdu_range_status %d\n",
2517 mpdu_ranges->mpdu_range_status);
2518 goto err;
2519 }
2520
2521 rx_desc = (struct htt_hl_rx_desc *)&rx->mpdu_ranges[num_mpdu_ranges];
2522 rx_desc_info = __le32_to_cpu(rx_desc->info);
2523
2524 if (MS(rx_desc_info, HTT_RX_DESC_HL_INFO_MCAST_BCAST))
2525 sec_index = HTT_TXRX_SEC_MCAST;
2526 else
2527 sec_index = HTT_TXRX_SEC_UCAST;
2528
2529 sec_type = peer->rx_pn[sec_index].sec_type;
2530 first_msdu = rx->fw_desc.flags & FW_RX_DESC_FLAGS_FIRST_MSDU;
2531
2532 ath10k_htt_rx_mpdu_desc_pn_hl(rx_desc, &new_pn, peer->rx_pn[sec_index].pn_len);
2533
2534 if (check_pn_type == HTT_RX_PN_CHECK && tid >= IEEE80211_NUM_TIDS) {
2535 spin_lock_bh(&ar->data_lock);
2536 pn_invalid = ath10k_htt_rx_pn_check_replay_hl(ar, peer, rx);
2537 spin_unlock_bh(&ar->data_lock);
2538
2539 if (pn_invalid)
2540 goto err;
2541 }
2542
2543 /* Strip off all headers before the MAC header before delivery to
2544 * mac80211
2545 */
2546 tot_hdr_len = sizeof(struct htt_resp_hdr) + sizeof(rx->hdr) +
2547 sizeof(rx->ppdu) + sizeof(rx->prefix) +
2548 sizeof(rx->fw_desc) +
2549 sizeof(*mpdu_ranges) * num_mpdu_ranges + rx_desc_len;
2550
2551 skb_pull(skb, tot_hdr_len);
2552
2553 hdr = (struct ieee80211_hdr *)skb->data;
2554 qos = ieee80211_is_data_qos(hdr->frame_control);
2555
2556 rx_status = IEEE80211_SKB_RXCB(skb);
2557 memset(rx_status, 0, sizeof(*rx_status));
2558
2559 if (rx->ppdu.combined_rssi == 0) {
2560 /* SDIO firmware does not provide signal */
2561 rx_status->signal = 0;
2562 rx_status->flag |= RX_FLAG_NO_SIGNAL_VAL;
2563 } else {
2564 rx_status->signal = ATH10K_DEFAULT_NOISE_FLOOR +
2565 rx->ppdu.combined_rssi;
2566 rx_status->flag &= ~RX_FLAG_NO_SIGNAL_VAL;
2567 }
2568
2569 spin_lock_bh(&ar->data_lock);
2570 ch = ar->scan_channel;
2571 if (!ch)
2572 ch = ar->rx_channel;
2573 if (!ch)
2574 ch = ath10k_htt_rx_h_any_channel(ar);
2575 if (!ch)
2576 ch = ar->tgt_oper_chan;
2577 spin_unlock_bh(&ar->data_lock);
2578
2579 if (ch) {
2580 rx_status->band = ch->band;
2581 rx_status->freq = ch->center_freq;
2582 }
2583 if (rx->fw_desc.flags & FW_RX_DESC_FLAGS_LAST_MSDU)
2584 rx_status->flag &= ~RX_FLAG_AMSDU_MORE;
2585 else
2586 rx_status->flag |= RX_FLAG_AMSDU_MORE;
2587
2588 /* Not entirely sure about this, but all frames from the chipset has
2589 * the protected flag set even though they have already been decrypted.
2590 * Unmasking this flag is necessary in order for mac80211 not to drop
2591 * the frame.
2592 * TODO: Verify this is always the case or find out a way to check
2593 * if there has been hw decryption.
2594 */
2595 if (ieee80211_has_protected(hdr->frame_control)) {
2596 hdr->frame_control &= ~__cpu_to_le16(IEEE80211_FCTL_PROTECTED);
2597 rx_status->flag |= RX_FLAG_DECRYPTED |
2598 RX_FLAG_IV_STRIPPED |
2599 RX_FLAG_MMIC_STRIPPED;
2600
2601 if (tid < IEEE80211_NUM_TIDS &&
2602 first_msdu &&
2603 check_pn_type == HTT_RX_PN_CHECK &&
2604 (sec_type == HTT_SECURITY_AES_CCMP ||
2605 sec_type == HTT_SECURITY_TKIP ||
2606 sec_type == HTT_SECURITY_TKIP_NOMIC)) {
2607 u8 offset, *ivp, i;
2608 s8 keyidx = 0;
2609 __le64 pn48 = cpu_to_le64(new_pn.pn48);
2610
2611 hdr = (struct ieee80211_hdr *)skb->data;
2612 offset = ieee80211_hdrlen(hdr->frame_control);
2613 hdr->frame_control |= __cpu_to_le16(IEEE80211_FCTL_PROTECTED);
2614 rx_status->flag &= ~RX_FLAG_IV_STRIPPED;
2615
2616 memmove(skb->data - IEEE80211_CCMP_HDR_LEN,
2617 skb->data, offset);
2618 skb_push(skb, IEEE80211_CCMP_HDR_LEN);
2619 ivp = skb->data + offset;
2620 memset(skb->data + offset, 0, IEEE80211_CCMP_HDR_LEN);
2621 /* Ext IV */
2622 ivp[IEEE80211_WEP_IV_LEN - 1] |= ATH10K_IEEE80211_EXTIV;
2623
2624 for (i = 0; i < ARRAY_SIZE(peer->keys); i++) {
2625 if (peer->keys[i] &&
2626 peer->keys[i]->flags & IEEE80211_KEY_FLAG_PAIRWISE)
2627 keyidx = peer->keys[i]->keyidx;
2628 }
2629
2630 /* Key ID */
2631 ivp[IEEE80211_WEP_IV_LEN - 1] |= keyidx << 6;
2632
2633 if (sec_type == HTT_SECURITY_AES_CCMP) {
2634 rx_status->flag |= RX_FLAG_MIC_STRIPPED;
2635 /* pn 0, pn 1 */
2636 memcpy(skb->data + offset, &pn48, 2);
2637 /* pn 1, pn 3 , pn 34 , pn 5 */
2638 memcpy(skb->data + offset + 4, ((u8 *)&pn48) + 2, 4);
2639 } else {
2640 rx_status->flag |= RX_FLAG_ICV_STRIPPED;
2641 /* TSC 0 */
2642 memcpy(skb->data + offset + 2, &pn48, 1);
2643 /* TSC 1 */
2644 memcpy(skb->data + offset, ((u8 *)&pn48) + 1, 1);
2645 /* TSC 2 , TSC 3 , TSC 4 , TSC 5*/
2646 memcpy(skb->data + offset + 4, ((u8 *)&pn48) + 2, 4);
2647 }
2648 }
2649 }
2650
2651 if (tkip_mic_type == HTT_RX_TKIP_MIC)
2652 rx_status->flag &= ~RX_FLAG_IV_STRIPPED &
2653 ~RX_FLAG_MMIC_STRIPPED;
2654
2655 if (mpdu_ranges->mpdu_range_status == HTT_RX_IND_MPDU_STATUS_TKIP_MIC_ERR)
2656 rx_status->flag |= RX_FLAG_MMIC_ERROR;
2657
2658 if (!qos && tid < IEEE80211_NUM_TIDS) {
2659 u8 offset;
2660 __le16 qos_ctrl = 0;
2661
2662 hdr = (struct ieee80211_hdr *)skb->data;
2663 offset = ieee80211_hdrlen(hdr->frame_control);
2664
2665 hdr->frame_control |= cpu_to_le16(IEEE80211_STYPE_QOS_DATA);
2666 memmove(skb->data - IEEE80211_QOS_CTL_LEN, skb->data, offset);
2667 skb_push(skb, IEEE80211_QOS_CTL_LEN);
2668 qos_ctrl = cpu_to_le16(tid);
2669 memcpy(skb->data + offset, &qos_ctrl, IEEE80211_QOS_CTL_LEN);
2670 }
2671
2672 if (ar->napi.dev)
2673 ieee80211_rx_napi(ar->hw, NULL, skb, &ar->napi);
2674 else
2675 ieee80211_rx_ni(ar->hw, skb);
2676
2677 /* We have delivered the skb to the upper layers (mac80211) so we
2678 * must not free it.
2679 */
2680 return false;
2681 err:
2682 /* Tell the caller that it must free the skb since we have not
2683 * consumed it
2684 */
2685 return true;
2686 }
2687
ath10k_htt_rx_frag_tkip_decap_nomic(struct sk_buff * skb,u16 head_len,u16 hdr_len)2688 static int ath10k_htt_rx_frag_tkip_decap_nomic(struct sk_buff *skb,
2689 u16 head_len,
2690 u16 hdr_len)
2691 {
2692 u8 *ivp, *orig_hdr;
2693
2694 orig_hdr = skb->data;
2695 ivp = orig_hdr + hdr_len + head_len;
2696
2697 /* the ExtIV bit is always set to 1 for TKIP */
2698 if (!(ivp[IEEE80211_WEP_IV_LEN - 1] & ATH10K_IEEE80211_EXTIV))
2699 return -EINVAL;
2700
2701 memmove(orig_hdr + IEEE80211_TKIP_IV_LEN, orig_hdr, head_len + hdr_len);
2702 skb_pull(skb, IEEE80211_TKIP_IV_LEN);
2703 skb_trim(skb, skb->len - ATH10K_IEEE80211_TKIP_MICLEN);
2704 return 0;
2705 }
2706
ath10k_htt_rx_frag_tkip_decap_withmic(struct sk_buff * skb,u16 head_len,u16 hdr_len)2707 static int ath10k_htt_rx_frag_tkip_decap_withmic(struct sk_buff *skb,
2708 u16 head_len,
2709 u16 hdr_len)
2710 {
2711 u8 *ivp, *orig_hdr;
2712
2713 orig_hdr = skb->data;
2714 ivp = orig_hdr + hdr_len + head_len;
2715
2716 /* the ExtIV bit is always set to 1 for TKIP */
2717 if (!(ivp[IEEE80211_WEP_IV_LEN - 1] & ATH10K_IEEE80211_EXTIV))
2718 return -EINVAL;
2719
2720 memmove(orig_hdr + IEEE80211_TKIP_IV_LEN, orig_hdr, head_len + hdr_len);
2721 skb_pull(skb, IEEE80211_TKIP_IV_LEN);
2722 skb_trim(skb, skb->len - IEEE80211_TKIP_ICV_LEN);
2723 return 0;
2724 }
2725
ath10k_htt_rx_frag_ccmp_decap(struct sk_buff * skb,u16 head_len,u16 hdr_len)2726 static int ath10k_htt_rx_frag_ccmp_decap(struct sk_buff *skb,
2727 u16 head_len,
2728 u16 hdr_len)
2729 {
2730 u8 *ivp, *orig_hdr;
2731
2732 orig_hdr = skb->data;
2733 ivp = orig_hdr + hdr_len + head_len;
2734
2735 /* the ExtIV bit is always set to 1 for CCMP */
2736 if (!(ivp[IEEE80211_WEP_IV_LEN - 1] & ATH10K_IEEE80211_EXTIV))
2737 return -EINVAL;
2738
2739 skb_trim(skb, skb->len - IEEE80211_CCMP_MIC_LEN);
2740 memmove(orig_hdr + IEEE80211_CCMP_HDR_LEN, orig_hdr, head_len + hdr_len);
2741 skb_pull(skb, IEEE80211_CCMP_HDR_LEN);
2742 return 0;
2743 }
2744
ath10k_htt_rx_frag_wep_decap(struct sk_buff * skb,u16 head_len,u16 hdr_len)2745 static int ath10k_htt_rx_frag_wep_decap(struct sk_buff *skb,
2746 u16 head_len,
2747 u16 hdr_len)
2748 {
2749 u8 *orig_hdr;
2750
2751 orig_hdr = skb->data;
2752
2753 memmove(orig_hdr + IEEE80211_WEP_IV_LEN,
2754 orig_hdr, head_len + hdr_len);
2755 skb_pull(skb, IEEE80211_WEP_IV_LEN);
2756 skb_trim(skb, skb->len - IEEE80211_WEP_ICV_LEN);
2757 return 0;
2758 }
2759
ath10k_htt_rx_proc_rx_frag_ind_hl(struct ath10k_htt * htt,struct htt_rx_fragment_indication * rx,struct sk_buff * skb)2760 static bool ath10k_htt_rx_proc_rx_frag_ind_hl(struct ath10k_htt *htt,
2761 struct htt_rx_fragment_indication *rx,
2762 struct sk_buff *skb)
2763 {
2764 struct ath10k *ar = htt->ar;
2765 enum htt_rx_tkip_demic_type tkip_mic = HTT_RX_NON_TKIP_MIC;
2766 enum htt_txrx_sec_cast_type sec_index;
2767 struct htt_rx_indication_hl *rx_hl;
2768 enum htt_security_types sec_type;
2769 u32 tid, frag, seq, rx_desc_info;
2770 union htt_rx_pn_t new_pn = {};
2771 struct htt_hl_rx_desc *rx_desc;
2772 u16 peer_id, sc, hdr_space;
2773 union htt_rx_pn_t *last_pn;
2774 struct ieee80211_hdr *hdr;
2775 int ret, num_mpdu_ranges;
2776 struct ath10k_peer *peer;
2777 struct htt_resp *resp;
2778 size_t tot_hdr_len;
2779
2780 resp = (struct htt_resp *)(skb->data + HTT_RX_FRAG_IND_INFO0_HEADER_LEN);
2781 skb_pull(skb, HTT_RX_FRAG_IND_INFO0_HEADER_LEN);
2782 skb_trim(skb, skb->len - FCS_LEN);
2783
2784 peer_id = __le16_to_cpu(rx->peer_id);
2785 rx_hl = (struct htt_rx_indication_hl *)(&resp->rx_ind_hl);
2786
2787 spin_lock_bh(&ar->data_lock);
2788 peer = ath10k_peer_find_by_id(ar, peer_id);
2789 if (!peer) {
2790 ath10k_dbg(ar, ATH10K_DBG_HTT, "invalid peer: %u\n", peer_id);
2791 goto err;
2792 }
2793
2794 num_mpdu_ranges = MS(__le32_to_cpu(rx_hl->hdr.info1),
2795 HTT_RX_INDICATION_INFO1_NUM_MPDU_RANGES);
2796
2797 tot_hdr_len = sizeof(struct htt_resp_hdr) +
2798 sizeof(rx_hl->hdr) +
2799 sizeof(rx_hl->ppdu) +
2800 sizeof(rx_hl->prefix) +
2801 sizeof(rx_hl->fw_desc) +
2802 sizeof(struct htt_rx_indication_mpdu_range) * num_mpdu_ranges;
2803
2804 tid = MS(rx_hl->hdr.info0, HTT_RX_INDICATION_INFO0_EXT_TID);
2805 rx_desc = (struct htt_hl_rx_desc *)(skb->data + tot_hdr_len);
2806 rx_desc_info = __le32_to_cpu(rx_desc->info);
2807
2808 hdr = (struct ieee80211_hdr *)((u8 *)rx_desc + rx_hl->fw_desc.len);
2809
2810 if (is_multicast_ether_addr(hdr->addr1)) {
2811 /* Discard the fragment with multicast DA */
2812 goto err;
2813 }
2814
2815 if (!MS(rx_desc_info, HTT_RX_DESC_HL_INFO_ENCRYPTED)) {
2816 spin_unlock_bh(&ar->data_lock);
2817 return ath10k_htt_rx_proc_rx_ind_hl(htt, &resp->rx_ind_hl, skb,
2818 HTT_RX_NON_PN_CHECK,
2819 HTT_RX_NON_TKIP_MIC);
2820 }
2821
2822 if (ieee80211_has_retry(hdr->frame_control))
2823 goto err;
2824
2825 hdr_space = ieee80211_hdrlen(hdr->frame_control);
2826 sc = __le16_to_cpu(hdr->seq_ctrl);
2827 seq = IEEE80211_SEQ_TO_SN(sc);
2828 frag = sc & IEEE80211_SCTL_FRAG;
2829
2830 sec_index = MS(rx_desc_info, HTT_RX_DESC_HL_INFO_MCAST_BCAST) ?
2831 HTT_TXRX_SEC_MCAST : HTT_TXRX_SEC_UCAST;
2832 sec_type = peer->rx_pn[sec_index].sec_type;
2833 ath10k_htt_rx_mpdu_desc_pn_hl(rx_desc, &new_pn, peer->rx_pn[sec_index].pn_len);
2834
2835 switch (sec_type) {
2836 case HTT_SECURITY_TKIP:
2837 tkip_mic = HTT_RX_TKIP_MIC;
2838 ret = ath10k_htt_rx_frag_tkip_decap_withmic(skb,
2839 tot_hdr_len +
2840 rx_hl->fw_desc.len,
2841 hdr_space);
2842 if (ret)
2843 goto err;
2844 break;
2845 case HTT_SECURITY_TKIP_NOMIC:
2846 ret = ath10k_htt_rx_frag_tkip_decap_nomic(skb,
2847 tot_hdr_len +
2848 rx_hl->fw_desc.len,
2849 hdr_space);
2850 if (ret)
2851 goto err;
2852 break;
2853 case HTT_SECURITY_AES_CCMP:
2854 ret = ath10k_htt_rx_frag_ccmp_decap(skb,
2855 tot_hdr_len + rx_hl->fw_desc.len,
2856 hdr_space);
2857 if (ret)
2858 goto err;
2859 break;
2860 case HTT_SECURITY_WEP128:
2861 case HTT_SECURITY_WEP104:
2862 case HTT_SECURITY_WEP40:
2863 ret = ath10k_htt_rx_frag_wep_decap(skb,
2864 tot_hdr_len + rx_hl->fw_desc.len,
2865 hdr_space);
2866 if (ret)
2867 goto err;
2868 break;
2869 default:
2870 break;
2871 }
2872
2873 resp = (struct htt_resp *)(skb->data);
2874
2875 if (sec_type != HTT_SECURITY_AES_CCMP &&
2876 sec_type != HTT_SECURITY_TKIP &&
2877 sec_type != HTT_SECURITY_TKIP_NOMIC) {
2878 spin_unlock_bh(&ar->data_lock);
2879 return ath10k_htt_rx_proc_rx_ind_hl(htt, &resp->rx_ind_hl, skb,
2880 HTT_RX_NON_PN_CHECK,
2881 HTT_RX_NON_TKIP_MIC);
2882 }
2883
2884 last_pn = &peer->frag_tids_last_pn[tid];
2885
2886 if (frag == 0) {
2887 if (ath10k_htt_rx_pn_check_replay_hl(ar, peer, &resp->rx_ind_hl))
2888 goto err;
2889
2890 last_pn->pn48 = new_pn.pn48;
2891 peer->frag_tids_seq[tid] = seq;
2892 } else if (sec_type == HTT_SECURITY_AES_CCMP) {
2893 if (seq != peer->frag_tids_seq[tid])
2894 goto err;
2895
2896 if (new_pn.pn48 != last_pn->pn48 + 1)
2897 goto err;
2898
2899 last_pn->pn48 = new_pn.pn48;
2900 last_pn = &peer->tids_last_pn[tid];
2901 last_pn->pn48 = new_pn.pn48;
2902 }
2903
2904 spin_unlock_bh(&ar->data_lock);
2905
2906 return ath10k_htt_rx_proc_rx_ind_hl(htt, &resp->rx_ind_hl, skb,
2907 HTT_RX_NON_PN_CHECK, tkip_mic);
2908
2909 err:
2910 spin_unlock_bh(&ar->data_lock);
2911
2912 /* Tell the caller that it must free the skb since we have not
2913 * consumed it
2914 */
2915 return true;
2916 }
2917
ath10k_htt_rx_proc_rx_ind_ll(struct ath10k_htt * htt,struct htt_rx_indication * rx)2918 static void ath10k_htt_rx_proc_rx_ind_ll(struct ath10k_htt *htt,
2919 struct htt_rx_indication *rx)
2920 {
2921 struct ath10k *ar = htt->ar;
2922 struct htt_rx_indication_mpdu_range *mpdu_ranges;
2923 int num_mpdu_ranges;
2924 int i, mpdu_count = 0;
2925 u16 peer_id;
2926 u8 tid;
2927
2928 num_mpdu_ranges = MS(__le32_to_cpu(rx->hdr.info1),
2929 HTT_RX_INDICATION_INFO1_NUM_MPDU_RANGES);
2930 peer_id = __le16_to_cpu(rx->hdr.peer_id);
2931 tid = MS(rx->hdr.info0, HTT_RX_INDICATION_INFO0_EXT_TID);
2932
2933 mpdu_ranges = htt_rx_ind_get_mpdu_ranges(rx);
2934
2935 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt rx ind: ",
2936 rx, struct_size(rx, mpdu_ranges, num_mpdu_ranges));
2937
2938 for (i = 0; i < num_mpdu_ranges; i++)
2939 mpdu_count += mpdu_ranges[i].mpdu_count;
2940
2941 atomic_add(mpdu_count, &htt->num_mpdus_ready);
2942
2943 ath10k_sta_update_rx_tid_stats_ampdu(ar, peer_id, tid, mpdu_ranges,
2944 num_mpdu_ranges);
2945 }
2946
ath10k_htt_rx_tx_compl_ind(struct ath10k * ar,struct sk_buff * skb)2947 static void ath10k_htt_rx_tx_compl_ind(struct ath10k *ar,
2948 struct sk_buff *skb)
2949 {
2950 struct ath10k_htt *htt = &ar->htt;
2951 struct htt_resp *resp = (struct htt_resp *)skb->data;
2952 struct htt_tx_done tx_done = {};
2953 int status = MS(resp->data_tx_completion.flags, HTT_DATA_TX_STATUS);
2954 __le16 msdu_id, *msdus;
2955 bool rssi_enabled = false;
2956 u8 msdu_count = 0, num_airtime_records, tid;
2957 int i, htt_pad = 0;
2958 struct htt_data_tx_compl_ppdu_dur *ppdu_info;
2959 struct ath10k_peer *peer;
2960 u16 ppdu_info_offset = 0, peer_id;
2961 u32 tx_duration;
2962
2963 switch (status) {
2964 case HTT_DATA_TX_STATUS_NO_ACK:
2965 tx_done.status = HTT_TX_COMPL_STATE_NOACK;
2966 break;
2967 case HTT_DATA_TX_STATUS_OK:
2968 tx_done.status = HTT_TX_COMPL_STATE_ACK;
2969 break;
2970 case HTT_DATA_TX_STATUS_DISCARD:
2971 case HTT_DATA_TX_STATUS_POSTPONE:
2972 tx_done.status = HTT_TX_COMPL_STATE_DISCARD;
2973 break;
2974 default:
2975 ath10k_warn(ar, "unhandled tx completion status %d\n", status);
2976 tx_done.status = HTT_TX_COMPL_STATE_DISCARD;
2977 break;
2978 }
2979
2980 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt tx completion num_msdus %d\n",
2981 resp->data_tx_completion.num_msdus);
2982
2983 msdu_count = resp->data_tx_completion.num_msdus;
2984 msdus = resp->data_tx_completion.msdus;
2985 rssi_enabled = ath10k_is_rssi_enable(&ar->hw_params, resp);
2986
2987 if (rssi_enabled)
2988 htt_pad = ath10k_tx_data_rssi_get_pad_bytes(&ar->hw_params,
2989 resp);
2990
2991 for (i = 0; i < msdu_count; i++) {
2992 msdu_id = msdus[i];
2993 tx_done.msdu_id = __le16_to_cpu(msdu_id);
2994
2995 if (rssi_enabled) {
2996 /* Total no of MSDUs should be even,
2997 * if odd MSDUs are sent firmware fills
2998 * last msdu id with 0xffff
2999 */
3000 if (msdu_count & 0x01) {
3001 msdu_id = msdus[msdu_count + i + 1 + htt_pad];
3002 tx_done.ack_rssi = __le16_to_cpu(msdu_id);
3003 } else {
3004 msdu_id = msdus[msdu_count + i + htt_pad];
3005 tx_done.ack_rssi = __le16_to_cpu(msdu_id);
3006 }
3007 }
3008
3009 /* kfifo_put: In practice firmware shouldn't fire off per-CE
3010 * interrupt and main interrupt (MSI/-X range case) for the same
3011 * HTC service so it should be safe to use kfifo_put w/o lock.
3012 *
3013 * From kfifo_put() documentation:
3014 * Note that with only one concurrent reader and one concurrent
3015 * writer, you don't need extra locking to use these macro.
3016 */
3017 if (ar->bus_param.dev_type == ATH10K_DEV_TYPE_HL) {
3018 ath10k_txrx_tx_unref(htt, &tx_done);
3019 } else if (!kfifo_put(&htt->txdone_fifo, tx_done)) {
3020 ath10k_warn(ar, "txdone fifo overrun, msdu_id %d status %d\n",
3021 tx_done.msdu_id, tx_done.status);
3022 ath10k_txrx_tx_unref(htt, &tx_done);
3023 }
3024 }
3025
3026 if (!(resp->data_tx_completion.flags2 & HTT_TX_CMPL_FLAG_PPDU_DURATION_PRESENT))
3027 return;
3028
3029 ppdu_info_offset = (msdu_count & 0x01) ? msdu_count + 1 : msdu_count;
3030
3031 if (rssi_enabled)
3032 ppdu_info_offset += ppdu_info_offset;
3033
3034 if (resp->data_tx_completion.flags2 &
3035 (HTT_TX_CMPL_FLAG_PPID_PRESENT | HTT_TX_CMPL_FLAG_PA_PRESENT))
3036 ppdu_info_offset += 2;
3037
3038 ppdu_info = (struct htt_data_tx_compl_ppdu_dur *)&msdus[ppdu_info_offset];
3039 num_airtime_records = FIELD_GET(HTT_TX_COMPL_PPDU_DUR_INFO0_NUM_ENTRIES_MASK,
3040 __le32_to_cpu(ppdu_info->info0));
3041
3042 for (i = 0; i < num_airtime_records; i++) {
3043 struct htt_data_tx_ppdu_dur *ppdu_dur;
3044 u32 info0;
3045
3046 ppdu_dur = &ppdu_info->ppdu_dur[i];
3047 info0 = __le32_to_cpu(ppdu_dur->info0);
3048
3049 peer_id = FIELD_GET(HTT_TX_PPDU_DUR_INFO0_PEER_ID_MASK,
3050 info0);
3051 rcu_read_lock();
3052 spin_lock_bh(&ar->data_lock);
3053
3054 peer = ath10k_peer_find_by_id(ar, peer_id);
3055 if (!peer || !peer->sta) {
3056 spin_unlock_bh(&ar->data_lock);
3057 rcu_read_unlock();
3058 continue;
3059 }
3060
3061 tid = FIELD_GET(HTT_TX_PPDU_DUR_INFO0_TID_MASK, info0) &
3062 IEEE80211_QOS_CTL_TID_MASK;
3063 tx_duration = __le32_to_cpu(ppdu_dur->tx_duration);
3064
3065 ieee80211_sta_register_airtime(peer->sta, tid, tx_duration, 0);
3066
3067 spin_unlock_bh(&ar->data_lock);
3068 rcu_read_unlock();
3069 }
3070 }
3071
ath10k_htt_rx_addba(struct ath10k * ar,struct htt_resp * resp)3072 static void ath10k_htt_rx_addba(struct ath10k *ar, struct htt_resp *resp)
3073 {
3074 struct htt_rx_addba *ev = &resp->rx_addba;
3075 struct ath10k_peer *peer;
3076 struct ath10k_vif *arvif;
3077 u16 info0, tid, peer_id;
3078
3079 info0 = __le16_to_cpu(ev->info0);
3080 tid = MS(info0, HTT_RX_BA_INFO0_TID);
3081 peer_id = MS(info0, HTT_RX_BA_INFO0_PEER_ID);
3082
3083 ath10k_dbg(ar, ATH10K_DBG_HTT,
3084 "htt rx addba tid %u peer_id %u size %u\n",
3085 tid, peer_id, ev->window_size);
3086
3087 spin_lock_bh(&ar->data_lock);
3088 peer = ath10k_peer_find_by_id(ar, peer_id);
3089 if (!peer) {
3090 ath10k_warn(ar, "received addba event for invalid peer_id: %u\n",
3091 peer_id);
3092 spin_unlock_bh(&ar->data_lock);
3093 return;
3094 }
3095
3096 arvif = ath10k_get_arvif(ar, peer->vdev_id);
3097 if (!arvif) {
3098 ath10k_warn(ar, "received addba event for invalid vdev_id: %u\n",
3099 peer->vdev_id);
3100 spin_unlock_bh(&ar->data_lock);
3101 return;
3102 }
3103
3104 ath10k_dbg(ar, ATH10K_DBG_HTT,
3105 "htt rx start rx ba session sta %pM tid %u size %u\n",
3106 peer->addr, tid, ev->window_size);
3107
3108 ieee80211_start_rx_ba_session_offl(arvif->vif, peer->addr, tid);
3109 spin_unlock_bh(&ar->data_lock);
3110 }
3111
ath10k_htt_rx_delba(struct ath10k * ar,struct htt_resp * resp)3112 static void ath10k_htt_rx_delba(struct ath10k *ar, struct htt_resp *resp)
3113 {
3114 struct htt_rx_delba *ev = &resp->rx_delba;
3115 struct ath10k_peer *peer;
3116 struct ath10k_vif *arvif;
3117 u16 info0, tid, peer_id;
3118
3119 info0 = __le16_to_cpu(ev->info0);
3120 tid = MS(info0, HTT_RX_BA_INFO0_TID);
3121 peer_id = MS(info0, HTT_RX_BA_INFO0_PEER_ID);
3122
3123 ath10k_dbg(ar, ATH10K_DBG_HTT,
3124 "htt rx delba tid %u peer_id %u\n",
3125 tid, peer_id);
3126
3127 spin_lock_bh(&ar->data_lock);
3128 peer = ath10k_peer_find_by_id(ar, peer_id);
3129 if (!peer) {
3130 ath10k_warn(ar, "received addba event for invalid peer_id: %u\n",
3131 peer_id);
3132 spin_unlock_bh(&ar->data_lock);
3133 return;
3134 }
3135
3136 arvif = ath10k_get_arvif(ar, peer->vdev_id);
3137 if (!arvif) {
3138 ath10k_warn(ar, "received addba event for invalid vdev_id: %u\n",
3139 peer->vdev_id);
3140 spin_unlock_bh(&ar->data_lock);
3141 return;
3142 }
3143
3144 ath10k_dbg(ar, ATH10K_DBG_HTT,
3145 "htt rx stop rx ba session sta %pM tid %u\n",
3146 peer->addr, tid);
3147
3148 ieee80211_stop_rx_ba_session_offl(arvif->vif, peer->addr, tid);
3149 spin_unlock_bh(&ar->data_lock);
3150 }
3151
ath10k_htt_rx_extract_amsdu(struct ath10k_hw_params * hw,struct sk_buff_head * list,struct sk_buff_head * amsdu)3152 static int ath10k_htt_rx_extract_amsdu(struct ath10k_hw_params *hw,
3153 struct sk_buff_head *list,
3154 struct sk_buff_head *amsdu)
3155 {
3156 struct sk_buff *msdu;
3157 struct htt_rx_desc *rxd;
3158 struct rx_msdu_end_common *rxd_msdu_end_common;
3159
3160 if (skb_queue_empty(list))
3161 return -ENOBUFS;
3162
3163 if (WARN_ON(!skb_queue_empty(amsdu)))
3164 return -EINVAL;
3165
3166 while ((msdu = __skb_dequeue(list))) {
3167 __skb_queue_tail(amsdu, msdu);
3168
3169 rxd = HTT_RX_BUF_TO_RX_DESC(hw,
3170 (void *)msdu->data -
3171 hw->rx_desc_ops->rx_desc_size);
3172
3173 rxd_msdu_end_common = ath10k_htt_rx_desc_get_msdu_end(hw, rxd);
3174 if (rxd_msdu_end_common->info0 &
3175 __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU))
3176 break;
3177 }
3178
3179 msdu = skb_peek_tail(amsdu);
3180 rxd = HTT_RX_BUF_TO_RX_DESC(hw,
3181 (void *)msdu->data - hw->rx_desc_ops->rx_desc_size);
3182
3183 rxd_msdu_end_common = ath10k_htt_rx_desc_get_msdu_end(hw, rxd);
3184 if (!(rxd_msdu_end_common->info0 &
3185 __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU))) {
3186 skb_queue_splice_init(amsdu, list);
3187 return -EAGAIN;
3188 }
3189
3190 return 0;
3191 }
3192
ath10k_htt_rx_h_rx_offload_prot(struct ieee80211_rx_status * status,struct sk_buff * skb)3193 static void ath10k_htt_rx_h_rx_offload_prot(struct ieee80211_rx_status *status,
3194 struct sk_buff *skb)
3195 {
3196 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
3197
3198 if (!ieee80211_has_protected(hdr->frame_control))
3199 return;
3200
3201 /* Offloaded frames are already decrypted but firmware insists they are
3202 * protected in the 802.11 header. Strip the flag. Otherwise mac80211
3203 * will drop the frame.
3204 */
3205
3206 hdr->frame_control &= ~__cpu_to_le16(IEEE80211_FCTL_PROTECTED);
3207 status->flag |= RX_FLAG_DECRYPTED |
3208 RX_FLAG_IV_STRIPPED |
3209 RX_FLAG_MMIC_STRIPPED;
3210 }
3211
ath10k_htt_rx_h_rx_offload(struct ath10k * ar,struct sk_buff_head * list)3212 static void ath10k_htt_rx_h_rx_offload(struct ath10k *ar,
3213 struct sk_buff_head *list)
3214 {
3215 struct ath10k_htt *htt = &ar->htt;
3216 struct ieee80211_rx_status *status = &htt->rx_status;
3217 struct htt_rx_offload_msdu *rx;
3218 struct sk_buff *msdu;
3219 size_t offset;
3220
3221 while ((msdu = __skb_dequeue(list))) {
3222 /* Offloaded frames don't have Rx descriptor. Instead they have
3223 * a short meta information header.
3224 */
3225
3226 rx = (void *)msdu->data;
3227
3228 skb_put(msdu, sizeof(*rx));
3229 skb_pull(msdu, sizeof(*rx));
3230
3231 if (skb_tailroom(msdu) < __le16_to_cpu(rx->msdu_len)) {
3232 ath10k_warn(ar, "dropping frame: offloaded rx msdu is too long!\n");
3233 dev_kfree_skb_any(msdu);
3234 continue;
3235 }
3236
3237 skb_put(msdu, __le16_to_cpu(rx->msdu_len));
3238
3239 /* Offloaded rx header length isn't multiple of 2 nor 4 so the
3240 * actual payload is unaligned. Align the frame. Otherwise
3241 * mac80211 complains. This shouldn't reduce performance much
3242 * because these offloaded frames are rare.
3243 */
3244 offset = 4 - ((unsigned long)msdu->data & 3);
3245 skb_put(msdu, offset);
3246 memmove(msdu->data + offset, msdu->data, msdu->len);
3247 skb_pull(msdu, offset);
3248
3249 /* FIXME: The frame is NWifi. Re-construct QoS Control
3250 * if possible later.
3251 */
3252
3253 memset(status, 0, sizeof(*status));
3254 status->flag |= RX_FLAG_NO_SIGNAL_VAL;
3255
3256 ath10k_htt_rx_h_rx_offload_prot(status, msdu);
3257 ath10k_htt_rx_h_channel(ar, status, NULL, rx->vdev_id);
3258 ath10k_htt_rx_h_queue_msdu(ar, status, msdu);
3259 }
3260 }
3261
ath10k_htt_rx_in_ord_ind(struct ath10k * ar,struct sk_buff * skb)3262 static int ath10k_htt_rx_in_ord_ind(struct ath10k *ar, struct sk_buff *skb)
3263 {
3264 struct ath10k_htt *htt = &ar->htt;
3265 struct htt_resp *resp = (void *)skb->data;
3266 struct ieee80211_rx_status *status = &htt->rx_status;
3267 struct sk_buff_head list;
3268 struct sk_buff_head amsdu;
3269 u16 peer_id;
3270 u16 msdu_count;
3271 u8 vdev_id;
3272 u8 tid;
3273 bool offload;
3274 bool frag;
3275 int ret;
3276
3277 lockdep_assert_held(&htt->rx_ring.lock);
3278
3279 if (htt->rx_confused)
3280 return -EIO;
3281
3282 skb_pull(skb, sizeof(resp->hdr));
3283 skb_pull(skb, sizeof(resp->rx_in_ord_ind));
3284
3285 peer_id = __le16_to_cpu(resp->rx_in_ord_ind.peer_id);
3286 msdu_count = __le16_to_cpu(resp->rx_in_ord_ind.msdu_count);
3287 vdev_id = resp->rx_in_ord_ind.vdev_id;
3288 tid = SM(resp->rx_in_ord_ind.info, HTT_RX_IN_ORD_IND_INFO_TID);
3289 offload = !!(resp->rx_in_ord_ind.info &
3290 HTT_RX_IN_ORD_IND_INFO_OFFLOAD_MASK);
3291 frag = !!(resp->rx_in_ord_ind.info & HTT_RX_IN_ORD_IND_INFO_FRAG_MASK);
3292
3293 ath10k_dbg(ar, ATH10K_DBG_HTT,
3294 "htt rx in ord vdev %i peer %i tid %i offload %i frag %i msdu count %i\n",
3295 vdev_id, peer_id, tid, offload, frag, msdu_count);
3296
3297 if (skb->len < msdu_count * sizeof(*resp->rx_in_ord_ind.msdu_descs32)) {
3298 ath10k_warn(ar, "dropping invalid in order rx indication\n");
3299 return -EINVAL;
3300 }
3301
3302 /* The event can deliver more than 1 A-MSDU. Each A-MSDU is later
3303 * extracted and processed.
3304 */
3305 __skb_queue_head_init(&list);
3306 if (ar->hw_params.target_64bit)
3307 ret = ath10k_htt_rx_pop_paddr64_list(htt, &resp->rx_in_ord_ind,
3308 &list);
3309 else
3310 ret = ath10k_htt_rx_pop_paddr32_list(htt, &resp->rx_in_ord_ind,
3311 &list);
3312
3313 if (ret < 0) {
3314 ath10k_warn(ar, "failed to pop paddr list: %d\n", ret);
3315 htt->rx_confused = true;
3316 return -EIO;
3317 }
3318
3319 /* Offloaded frames are very different and need to be handled
3320 * separately.
3321 */
3322 if (offload)
3323 ath10k_htt_rx_h_rx_offload(ar, &list);
3324
3325 while (!skb_queue_empty(&list)) {
3326 __skb_queue_head_init(&amsdu);
3327 ret = ath10k_htt_rx_extract_amsdu(&ar->hw_params, &list, &amsdu);
3328 switch (ret) {
3329 case 0:
3330 /* Note: The in-order indication may report interleaved
3331 * frames from different PPDUs meaning reported rx rate
3332 * to mac80211 isn't accurate/reliable. It's still
3333 * better to report something than nothing though. This
3334 * should still give an idea about rx rate to the user.
3335 */
3336 ath10k_htt_rx_h_ppdu(ar, &amsdu, status, vdev_id);
3337 ath10k_htt_rx_h_filter(ar, &amsdu, status, NULL);
3338 ath10k_htt_rx_h_mpdu(ar, &amsdu, status, false, NULL,
3339 NULL, peer_id, frag);
3340 ath10k_htt_rx_h_enqueue(ar, &amsdu, status);
3341 break;
3342 case -EAGAIN:
3343 fallthrough;
3344 default:
3345 /* Should not happen. */
3346 ath10k_warn(ar, "failed to extract amsdu: %d\n", ret);
3347 htt->rx_confused = true;
3348 __skb_queue_purge(&list);
3349 return -EIO;
3350 }
3351 }
3352 return ret;
3353 }
3354
ath10k_htt_rx_tx_fetch_resp_id_confirm(struct ath10k * ar,const __le32 * resp_ids,int num_resp_ids)3355 static void ath10k_htt_rx_tx_fetch_resp_id_confirm(struct ath10k *ar,
3356 const __le32 *resp_ids,
3357 int num_resp_ids)
3358 {
3359 int i;
3360 u32 resp_id;
3361
3362 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx fetch confirm num_resp_ids %d\n",
3363 num_resp_ids);
3364
3365 for (i = 0; i < num_resp_ids; i++) {
3366 resp_id = le32_to_cpu(resp_ids[i]);
3367
3368 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx fetch confirm resp_id %u\n",
3369 resp_id);
3370
3371 /* TODO: free resp_id */
3372 }
3373 }
3374
ath10k_htt_rx_tx_fetch_ind(struct ath10k * ar,struct sk_buff * skb)3375 static void ath10k_htt_rx_tx_fetch_ind(struct ath10k *ar, struct sk_buff *skb)
3376 {
3377 struct ieee80211_hw *hw = ar->hw;
3378 struct ieee80211_txq *txq;
3379 struct htt_resp *resp = (struct htt_resp *)skb->data;
3380 struct htt_tx_fetch_record *record;
3381 size_t len;
3382 size_t max_num_bytes;
3383 size_t max_num_msdus;
3384 size_t num_bytes;
3385 size_t num_msdus;
3386 const __le32 *resp_ids;
3387 u16 num_records;
3388 u16 num_resp_ids;
3389 u16 peer_id;
3390 u8 tid;
3391 int ret;
3392 int i;
3393 bool may_tx;
3394
3395 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx fetch ind\n");
3396
3397 len = sizeof(resp->hdr) + sizeof(resp->tx_fetch_ind);
3398 if (unlikely(skb->len < len)) {
3399 ath10k_warn(ar, "received corrupted tx_fetch_ind event: buffer too short\n");
3400 return;
3401 }
3402
3403 num_records = le16_to_cpu(resp->tx_fetch_ind.num_records);
3404 num_resp_ids = le16_to_cpu(resp->tx_fetch_ind.num_resp_ids);
3405
3406 len += sizeof(resp->tx_fetch_ind.records[0]) * num_records;
3407 len += sizeof(resp->tx_fetch_ind.resp_ids[0]) * num_resp_ids;
3408
3409 if (unlikely(skb->len < len)) {
3410 ath10k_warn(ar, "received corrupted tx_fetch_ind event: too many records/resp_ids\n");
3411 return;
3412 }
3413
3414 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx fetch ind num records %u num resps %u seq %u\n",
3415 num_records, num_resp_ids,
3416 le16_to_cpu(resp->tx_fetch_ind.fetch_seq_num));
3417
3418 if (!ar->htt.tx_q_state.enabled) {
3419 ath10k_warn(ar, "received unexpected tx_fetch_ind event: not enabled\n");
3420 return;
3421 }
3422
3423 if (ar->htt.tx_q_state.mode == HTT_TX_MODE_SWITCH_PUSH) {
3424 ath10k_warn(ar, "received unexpected tx_fetch_ind event: in push mode\n");
3425 return;
3426 }
3427
3428 rcu_read_lock();
3429
3430 for (i = 0; i < num_records; i++) {
3431 record = &resp->tx_fetch_ind.records[i];
3432 peer_id = MS(le16_to_cpu(record->info),
3433 HTT_TX_FETCH_RECORD_INFO_PEER_ID);
3434 tid = MS(le16_to_cpu(record->info),
3435 HTT_TX_FETCH_RECORD_INFO_TID);
3436 max_num_msdus = le16_to_cpu(record->num_msdus);
3437 max_num_bytes = le32_to_cpu(record->num_bytes);
3438
3439 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx fetch record %i peer_id %u tid %u msdus %zu bytes %zu\n",
3440 i, peer_id, tid, max_num_msdus, max_num_bytes);
3441
3442 if (unlikely(peer_id >= ar->htt.tx_q_state.num_peers) ||
3443 unlikely(tid >= ar->htt.tx_q_state.num_tids)) {
3444 ath10k_warn(ar, "received out of range peer_id %u tid %u\n",
3445 peer_id, tid);
3446 continue;
3447 }
3448
3449 spin_lock_bh(&ar->data_lock);
3450 txq = ath10k_mac_txq_lookup(ar, peer_id, tid);
3451 spin_unlock_bh(&ar->data_lock);
3452
3453 /* It is okay to release the lock and use txq because RCU read
3454 * lock is held.
3455 */
3456
3457 if (unlikely(!txq)) {
3458 ath10k_warn(ar, "failed to lookup txq for peer_id %u tid %u\n",
3459 peer_id, tid);
3460 continue;
3461 }
3462
3463 num_msdus = 0;
3464 num_bytes = 0;
3465
3466 ieee80211_txq_schedule_start(hw, txq->ac);
3467 may_tx = ieee80211_txq_may_transmit(hw, txq);
3468 while (num_msdus < max_num_msdus &&
3469 num_bytes < max_num_bytes) {
3470 if (!may_tx)
3471 break;
3472
3473 ret = ath10k_mac_tx_push_txq(hw, txq);
3474 if (ret < 0)
3475 break;
3476
3477 num_msdus++;
3478 num_bytes += ret;
3479 }
3480 ieee80211_return_txq(hw, txq, false);
3481 ieee80211_txq_schedule_end(hw, txq->ac);
3482
3483 record->num_msdus = cpu_to_le16(num_msdus);
3484 record->num_bytes = cpu_to_le32(num_bytes);
3485
3486 ath10k_htt_tx_txq_recalc(hw, txq);
3487 }
3488
3489 rcu_read_unlock();
3490
3491 resp_ids = ath10k_htt_get_tx_fetch_ind_resp_ids(&resp->tx_fetch_ind);
3492 ath10k_htt_rx_tx_fetch_resp_id_confirm(ar, resp_ids, num_resp_ids);
3493
3494 ret = ath10k_htt_tx_fetch_resp(ar,
3495 resp->tx_fetch_ind.token,
3496 resp->tx_fetch_ind.fetch_seq_num,
3497 resp->tx_fetch_ind.records,
3498 num_records);
3499 if (unlikely(ret)) {
3500 ath10k_warn(ar, "failed to submit tx fetch resp for token 0x%08x: %d\n",
3501 le32_to_cpu(resp->tx_fetch_ind.token), ret);
3502 /* FIXME: request fw restart */
3503 }
3504
3505 ath10k_htt_tx_txq_sync(ar);
3506 }
3507
ath10k_htt_rx_tx_fetch_confirm(struct ath10k * ar,struct sk_buff * skb)3508 static void ath10k_htt_rx_tx_fetch_confirm(struct ath10k *ar,
3509 struct sk_buff *skb)
3510 {
3511 const struct htt_resp *resp = (void *)skb->data;
3512 size_t len;
3513 int num_resp_ids;
3514
3515 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx fetch confirm\n");
3516
3517 len = sizeof(resp->hdr) + sizeof(resp->tx_fetch_confirm);
3518 if (unlikely(skb->len < len)) {
3519 ath10k_warn(ar, "received corrupted tx_fetch_confirm event: buffer too short\n");
3520 return;
3521 }
3522
3523 num_resp_ids = le16_to_cpu(resp->tx_fetch_confirm.num_resp_ids);
3524 len += sizeof(resp->tx_fetch_confirm.resp_ids[0]) * num_resp_ids;
3525
3526 if (unlikely(skb->len < len)) {
3527 ath10k_warn(ar, "received corrupted tx_fetch_confirm event: resp_ids buffer overflow\n");
3528 return;
3529 }
3530
3531 ath10k_htt_rx_tx_fetch_resp_id_confirm(ar,
3532 resp->tx_fetch_confirm.resp_ids,
3533 num_resp_ids);
3534 }
3535
ath10k_htt_rx_tx_mode_switch_ind(struct ath10k * ar,struct sk_buff * skb)3536 static void ath10k_htt_rx_tx_mode_switch_ind(struct ath10k *ar,
3537 struct sk_buff *skb)
3538 {
3539 const struct htt_resp *resp = (void *)skb->data;
3540 const struct htt_tx_mode_switch_record *record;
3541 struct ieee80211_txq *txq;
3542 struct ath10k_txq *artxq;
3543 size_t len;
3544 size_t num_records;
3545 enum htt_tx_mode_switch_mode mode;
3546 bool enable;
3547 u16 info0;
3548 u16 info1;
3549 u16 threshold;
3550 u16 peer_id;
3551 u8 tid;
3552 int i;
3553
3554 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx mode switch ind\n");
3555
3556 len = sizeof(resp->hdr) + sizeof(resp->tx_mode_switch_ind);
3557 if (unlikely(skb->len < len)) {
3558 ath10k_warn(ar, "received corrupted tx_mode_switch_ind event: buffer too short\n");
3559 return;
3560 }
3561
3562 info0 = le16_to_cpu(resp->tx_mode_switch_ind.info0);
3563 info1 = le16_to_cpu(resp->tx_mode_switch_ind.info1);
3564
3565 enable = !!(info0 & HTT_TX_MODE_SWITCH_IND_INFO0_ENABLE);
3566 num_records = MS(info0, HTT_TX_MODE_SWITCH_IND_INFO1_THRESHOLD);
3567 mode = MS(info1, HTT_TX_MODE_SWITCH_IND_INFO1_MODE);
3568 threshold = MS(info1, HTT_TX_MODE_SWITCH_IND_INFO1_THRESHOLD);
3569
3570 ath10k_dbg(ar, ATH10K_DBG_HTT,
3571 "htt rx tx mode switch ind info0 0x%04x info1 0x%04x enable %d num records %zd mode %d threshold %u\n",
3572 info0, info1, enable, num_records, mode, threshold);
3573
3574 len += sizeof(resp->tx_mode_switch_ind.records[0]) * num_records;
3575
3576 if (unlikely(skb->len < len)) {
3577 ath10k_warn(ar, "received corrupted tx_mode_switch_mode_ind event: too many records\n");
3578 return;
3579 }
3580
3581 switch (mode) {
3582 case HTT_TX_MODE_SWITCH_PUSH:
3583 case HTT_TX_MODE_SWITCH_PUSH_PULL:
3584 break;
3585 default:
3586 ath10k_warn(ar, "received invalid tx_mode_switch_mode_ind mode %d, ignoring\n",
3587 mode);
3588 return;
3589 }
3590
3591 if (!enable)
3592 return;
3593
3594 ar->htt.tx_q_state.enabled = enable;
3595 ar->htt.tx_q_state.mode = mode;
3596 ar->htt.tx_q_state.num_push_allowed = threshold;
3597
3598 rcu_read_lock();
3599
3600 for (i = 0; i < num_records; i++) {
3601 record = &resp->tx_mode_switch_ind.records[i];
3602 info0 = le16_to_cpu(record->info0);
3603 peer_id = MS(info0, HTT_TX_MODE_SWITCH_RECORD_INFO0_PEER_ID);
3604 tid = MS(info0, HTT_TX_MODE_SWITCH_RECORD_INFO0_TID);
3605
3606 if (unlikely(peer_id >= ar->htt.tx_q_state.num_peers) ||
3607 unlikely(tid >= ar->htt.tx_q_state.num_tids)) {
3608 ath10k_warn(ar, "received out of range peer_id %u tid %u\n",
3609 peer_id, tid);
3610 continue;
3611 }
3612
3613 spin_lock_bh(&ar->data_lock);
3614 txq = ath10k_mac_txq_lookup(ar, peer_id, tid);
3615 spin_unlock_bh(&ar->data_lock);
3616
3617 /* It is okay to release the lock and use txq because RCU read
3618 * lock is held.
3619 */
3620
3621 if (unlikely(!txq)) {
3622 ath10k_warn(ar, "failed to lookup txq for peer_id %u tid %u\n",
3623 peer_id, tid);
3624 continue;
3625 }
3626
3627 spin_lock_bh(&ar->htt.tx_lock);
3628 artxq = (void *)txq->drv_priv;
3629 artxq->num_push_allowed = le16_to_cpu(record->num_max_msdus);
3630 spin_unlock_bh(&ar->htt.tx_lock);
3631 }
3632
3633 rcu_read_unlock();
3634
3635 ath10k_mac_tx_push_pending(ar);
3636 }
3637
ath10k_htt_htc_t2h_msg_handler(struct ath10k * ar,struct sk_buff * skb)3638 void ath10k_htt_htc_t2h_msg_handler(struct ath10k *ar, struct sk_buff *skb)
3639 {
3640 bool release;
3641
3642 release = ath10k_htt_t2h_msg_handler(ar, skb);
3643
3644 /* Free the indication buffer */
3645 if (release)
3646 dev_kfree_skb_any(skb);
3647 }
3648
ath10k_get_legacy_rate_idx(struct ath10k * ar,u8 rate)3649 static inline s8 ath10k_get_legacy_rate_idx(struct ath10k *ar, u8 rate)
3650 {
3651 static const u8 legacy_rates[] = {1, 2, 5, 11, 6, 9, 12,
3652 18, 24, 36, 48, 54};
3653 int i;
3654
3655 for (i = 0; i < ARRAY_SIZE(legacy_rates); i++) {
3656 if (rate == legacy_rates[i])
3657 return i;
3658 }
3659
3660 ath10k_warn(ar, "Invalid legacy rate %d peer stats", rate);
3661 return -EINVAL;
3662 }
3663
3664 static void
ath10k_accumulate_per_peer_tx_stats(struct ath10k * ar,struct ath10k_sta * arsta,struct ath10k_per_peer_tx_stats * pstats,s8 legacy_rate_idx)3665 ath10k_accumulate_per_peer_tx_stats(struct ath10k *ar,
3666 struct ath10k_sta *arsta,
3667 struct ath10k_per_peer_tx_stats *pstats,
3668 s8 legacy_rate_idx)
3669 {
3670 struct rate_info *txrate = &arsta->txrate;
3671 struct ath10k_htt_tx_stats *tx_stats;
3672 int idx, ht_idx, gi, mcs, bw, nss;
3673 unsigned long flags;
3674
3675 if (!arsta->tx_stats)
3676 return;
3677
3678 tx_stats = arsta->tx_stats;
3679 flags = txrate->flags;
3680 gi = test_bit(ATH10K_RATE_INFO_FLAGS_SGI_BIT, &flags);
3681 mcs = ATH10K_HW_MCS_RATE(pstats->ratecode);
3682 bw = txrate->bw;
3683 nss = txrate->nss;
3684 ht_idx = mcs + (nss - 1) * 8;
3685 idx = mcs * 8 + 8 * 10 * (nss - 1);
3686 idx += bw * 2 + gi;
3687
3688 #define STATS_OP_FMT(name) tx_stats->stats[ATH10K_STATS_TYPE_##name]
3689
3690 if (txrate->flags & RATE_INFO_FLAGS_VHT_MCS) {
3691 STATS_OP_FMT(SUCC).vht[0][mcs] += pstats->succ_bytes;
3692 STATS_OP_FMT(SUCC).vht[1][mcs] += pstats->succ_pkts;
3693 STATS_OP_FMT(FAIL).vht[0][mcs] += pstats->failed_bytes;
3694 STATS_OP_FMT(FAIL).vht[1][mcs] += pstats->failed_pkts;
3695 STATS_OP_FMT(RETRY).vht[0][mcs] += pstats->retry_bytes;
3696 STATS_OP_FMT(RETRY).vht[1][mcs] += pstats->retry_pkts;
3697 } else if (txrate->flags & RATE_INFO_FLAGS_MCS) {
3698 STATS_OP_FMT(SUCC).ht[0][ht_idx] += pstats->succ_bytes;
3699 STATS_OP_FMT(SUCC).ht[1][ht_idx] += pstats->succ_pkts;
3700 STATS_OP_FMT(FAIL).ht[0][ht_idx] += pstats->failed_bytes;
3701 STATS_OP_FMT(FAIL).ht[1][ht_idx] += pstats->failed_pkts;
3702 STATS_OP_FMT(RETRY).ht[0][ht_idx] += pstats->retry_bytes;
3703 STATS_OP_FMT(RETRY).ht[1][ht_idx] += pstats->retry_pkts;
3704 } else {
3705 mcs = legacy_rate_idx;
3706
3707 STATS_OP_FMT(SUCC).legacy[0][mcs] += pstats->succ_bytes;
3708 STATS_OP_FMT(SUCC).legacy[1][mcs] += pstats->succ_pkts;
3709 STATS_OP_FMT(FAIL).legacy[0][mcs] += pstats->failed_bytes;
3710 STATS_OP_FMT(FAIL).legacy[1][mcs] += pstats->failed_pkts;
3711 STATS_OP_FMT(RETRY).legacy[0][mcs] += pstats->retry_bytes;
3712 STATS_OP_FMT(RETRY).legacy[1][mcs] += pstats->retry_pkts;
3713 }
3714
3715 if (ATH10K_HW_AMPDU(pstats->flags)) {
3716 tx_stats->ba_fails += ATH10K_HW_BA_FAIL(pstats->flags);
3717
3718 if (txrate->flags & RATE_INFO_FLAGS_MCS) {
3719 STATS_OP_FMT(AMPDU).ht[0][ht_idx] +=
3720 pstats->succ_bytes + pstats->retry_bytes;
3721 STATS_OP_FMT(AMPDU).ht[1][ht_idx] +=
3722 pstats->succ_pkts + pstats->retry_pkts;
3723 } else {
3724 STATS_OP_FMT(AMPDU).vht[0][mcs] +=
3725 pstats->succ_bytes + pstats->retry_bytes;
3726 STATS_OP_FMT(AMPDU).vht[1][mcs] +=
3727 pstats->succ_pkts + pstats->retry_pkts;
3728 }
3729 STATS_OP_FMT(AMPDU).bw[0][bw] +=
3730 pstats->succ_bytes + pstats->retry_bytes;
3731 STATS_OP_FMT(AMPDU).nss[0][nss - 1] +=
3732 pstats->succ_bytes + pstats->retry_bytes;
3733 STATS_OP_FMT(AMPDU).gi[0][gi] +=
3734 pstats->succ_bytes + pstats->retry_bytes;
3735 STATS_OP_FMT(AMPDU).rate_table[0][idx] +=
3736 pstats->succ_bytes + pstats->retry_bytes;
3737 STATS_OP_FMT(AMPDU).bw[1][bw] +=
3738 pstats->succ_pkts + pstats->retry_pkts;
3739 STATS_OP_FMT(AMPDU).nss[1][nss - 1] +=
3740 pstats->succ_pkts + pstats->retry_pkts;
3741 STATS_OP_FMT(AMPDU).gi[1][gi] +=
3742 pstats->succ_pkts + pstats->retry_pkts;
3743 STATS_OP_FMT(AMPDU).rate_table[1][idx] +=
3744 pstats->succ_pkts + pstats->retry_pkts;
3745 } else {
3746 tx_stats->ack_fails +=
3747 ATH10K_HW_BA_FAIL(pstats->flags);
3748 }
3749
3750 STATS_OP_FMT(SUCC).bw[0][bw] += pstats->succ_bytes;
3751 STATS_OP_FMT(SUCC).nss[0][nss - 1] += pstats->succ_bytes;
3752 STATS_OP_FMT(SUCC).gi[0][gi] += pstats->succ_bytes;
3753
3754 STATS_OP_FMT(SUCC).bw[1][bw] += pstats->succ_pkts;
3755 STATS_OP_FMT(SUCC).nss[1][nss - 1] += pstats->succ_pkts;
3756 STATS_OP_FMT(SUCC).gi[1][gi] += pstats->succ_pkts;
3757
3758 STATS_OP_FMT(FAIL).bw[0][bw] += pstats->failed_bytes;
3759 STATS_OP_FMT(FAIL).nss[0][nss - 1] += pstats->failed_bytes;
3760 STATS_OP_FMT(FAIL).gi[0][gi] += pstats->failed_bytes;
3761
3762 STATS_OP_FMT(FAIL).bw[1][bw] += pstats->failed_pkts;
3763 STATS_OP_FMT(FAIL).nss[1][nss - 1] += pstats->failed_pkts;
3764 STATS_OP_FMT(FAIL).gi[1][gi] += pstats->failed_pkts;
3765
3766 STATS_OP_FMT(RETRY).bw[0][bw] += pstats->retry_bytes;
3767 STATS_OP_FMT(RETRY).nss[0][nss - 1] += pstats->retry_bytes;
3768 STATS_OP_FMT(RETRY).gi[0][gi] += pstats->retry_bytes;
3769
3770 STATS_OP_FMT(RETRY).bw[1][bw] += pstats->retry_pkts;
3771 STATS_OP_FMT(RETRY).nss[1][nss - 1] += pstats->retry_pkts;
3772 STATS_OP_FMT(RETRY).gi[1][gi] += pstats->retry_pkts;
3773
3774 if (txrate->flags >= RATE_INFO_FLAGS_MCS) {
3775 STATS_OP_FMT(SUCC).rate_table[0][idx] += pstats->succ_bytes;
3776 STATS_OP_FMT(SUCC).rate_table[1][idx] += pstats->succ_pkts;
3777 STATS_OP_FMT(FAIL).rate_table[0][idx] += pstats->failed_bytes;
3778 STATS_OP_FMT(FAIL).rate_table[1][idx] += pstats->failed_pkts;
3779 STATS_OP_FMT(RETRY).rate_table[0][idx] += pstats->retry_bytes;
3780 STATS_OP_FMT(RETRY).rate_table[1][idx] += pstats->retry_pkts;
3781 }
3782
3783 tx_stats->tx_duration += pstats->duration;
3784 }
3785
3786 static void
ath10k_update_per_peer_tx_stats(struct ath10k * ar,struct ieee80211_sta * sta,struct ath10k_per_peer_tx_stats * peer_stats)3787 ath10k_update_per_peer_tx_stats(struct ath10k *ar,
3788 struct ieee80211_sta *sta,
3789 struct ath10k_per_peer_tx_stats *peer_stats)
3790 {
3791 struct ath10k_sta *arsta = (struct ath10k_sta *)sta->drv_priv;
3792 struct ieee80211_chanctx_conf *conf = NULL;
3793 u8 rate = 0, sgi;
3794 s8 rate_idx = 0;
3795 bool skip_auto_rate;
3796 struct rate_info txrate;
3797
3798 lockdep_assert_held(&ar->data_lock);
3799
3800 txrate.flags = ATH10K_HW_PREAMBLE(peer_stats->ratecode);
3801 txrate.bw = ATH10K_HW_BW(peer_stats->flags);
3802 txrate.nss = ATH10K_HW_NSS(peer_stats->ratecode);
3803 txrate.mcs = ATH10K_HW_MCS_RATE(peer_stats->ratecode);
3804 sgi = ATH10K_HW_GI(peer_stats->flags);
3805 skip_auto_rate = ATH10K_FW_SKIPPED_RATE_CTRL(peer_stats->flags);
3806
3807 /* Firmware's rate control skips broadcast/management frames,
3808 * if host has configure fixed rates and in some other special cases.
3809 */
3810 if (skip_auto_rate)
3811 return;
3812
3813 if (txrate.flags == WMI_RATE_PREAMBLE_VHT && txrate.mcs > 9) {
3814 ath10k_warn(ar, "Invalid VHT mcs %d peer stats", txrate.mcs);
3815 return;
3816 }
3817
3818 if (txrate.flags == WMI_RATE_PREAMBLE_HT &&
3819 (txrate.mcs > 7 || txrate.nss < 1)) {
3820 ath10k_warn(ar, "Invalid HT mcs %d nss %d peer stats",
3821 txrate.mcs, txrate.nss);
3822 return;
3823 }
3824
3825 memset(&arsta->txrate, 0, sizeof(arsta->txrate));
3826 memset(&arsta->tx_info.status, 0, sizeof(arsta->tx_info.status));
3827 if (txrate.flags == WMI_RATE_PREAMBLE_CCK ||
3828 txrate.flags == WMI_RATE_PREAMBLE_OFDM) {
3829 rate = ATH10K_HW_LEGACY_RATE(peer_stats->ratecode);
3830 /* This is hacky, FW sends CCK rate 5.5Mbps as 6 */
3831 if (rate == 6 && txrate.flags == WMI_RATE_PREAMBLE_CCK)
3832 rate = 5;
3833 rate_idx = ath10k_get_legacy_rate_idx(ar, rate);
3834 if (rate_idx < 0)
3835 return;
3836 arsta->txrate.legacy = rate;
3837 } else if (txrate.flags == WMI_RATE_PREAMBLE_HT) {
3838 arsta->txrate.flags = RATE_INFO_FLAGS_MCS;
3839 arsta->txrate.mcs = txrate.mcs + 8 * (txrate.nss - 1);
3840 } else {
3841 arsta->txrate.flags = RATE_INFO_FLAGS_VHT_MCS;
3842 arsta->txrate.mcs = txrate.mcs;
3843 }
3844
3845 switch (txrate.flags) {
3846 case WMI_RATE_PREAMBLE_OFDM:
3847 if (arsta->arvif && arsta->arvif->vif)
3848 conf = rcu_dereference(arsta->arvif->vif->bss_conf.chanctx_conf);
3849 if (conf && conf->def.chan->band == NL80211_BAND_5GHZ)
3850 arsta->tx_info.status.rates[0].idx = rate_idx - 4;
3851 break;
3852 case WMI_RATE_PREAMBLE_CCK:
3853 arsta->tx_info.status.rates[0].idx = rate_idx;
3854 if (sgi)
3855 arsta->tx_info.status.rates[0].flags |=
3856 (IEEE80211_TX_RC_USE_SHORT_PREAMBLE |
3857 IEEE80211_TX_RC_SHORT_GI);
3858 break;
3859 case WMI_RATE_PREAMBLE_HT:
3860 arsta->tx_info.status.rates[0].idx =
3861 txrate.mcs + ((txrate.nss - 1) * 8);
3862 if (sgi)
3863 arsta->tx_info.status.rates[0].flags |=
3864 IEEE80211_TX_RC_SHORT_GI;
3865 arsta->tx_info.status.rates[0].flags |= IEEE80211_TX_RC_MCS;
3866 break;
3867 case WMI_RATE_PREAMBLE_VHT:
3868 ieee80211_rate_set_vht(&arsta->tx_info.status.rates[0],
3869 txrate.mcs, txrate.nss);
3870 if (sgi)
3871 arsta->tx_info.status.rates[0].flags |=
3872 IEEE80211_TX_RC_SHORT_GI;
3873 arsta->tx_info.status.rates[0].flags |= IEEE80211_TX_RC_VHT_MCS;
3874 break;
3875 }
3876
3877 arsta->txrate.nss = txrate.nss;
3878 arsta->txrate.bw = ath10k_bw_to_mac80211_bw(txrate.bw);
3879 arsta->last_tx_bitrate = cfg80211_calculate_bitrate(&arsta->txrate);
3880 if (sgi)
3881 arsta->txrate.flags |= RATE_INFO_FLAGS_SHORT_GI;
3882
3883 switch (arsta->txrate.bw) {
3884 case RATE_INFO_BW_40:
3885 arsta->tx_info.status.rates[0].flags |=
3886 IEEE80211_TX_RC_40_MHZ_WIDTH;
3887 break;
3888 case RATE_INFO_BW_80:
3889 arsta->tx_info.status.rates[0].flags |=
3890 IEEE80211_TX_RC_80_MHZ_WIDTH;
3891 break;
3892 case RATE_INFO_BW_160:
3893 arsta->tx_info.status.rates[0].flags |=
3894 IEEE80211_TX_RC_160_MHZ_WIDTH;
3895 break;
3896 }
3897
3898 if (peer_stats->succ_pkts) {
3899 arsta->tx_info.flags = IEEE80211_TX_STAT_ACK;
3900 arsta->tx_info.status.rates[0].count = 1;
3901 ieee80211_tx_rate_update(ar->hw, sta, &arsta->tx_info);
3902 }
3903
3904 if (ar->htt.disable_tx_comp) {
3905 arsta->tx_failed += peer_stats->failed_pkts;
3906 ath10k_dbg(ar, ATH10K_DBG_HTT, "tx failed %d\n",
3907 arsta->tx_failed);
3908 }
3909
3910 arsta->tx_retries += peer_stats->retry_pkts;
3911 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt tx retries %d", arsta->tx_retries);
3912
3913 if (ath10k_debug_is_extd_tx_stats_enabled(ar))
3914 ath10k_accumulate_per_peer_tx_stats(ar, arsta, peer_stats,
3915 rate_idx);
3916 }
3917
ath10k_htt_fetch_peer_stats(struct ath10k * ar,struct sk_buff * skb)3918 static void ath10k_htt_fetch_peer_stats(struct ath10k *ar,
3919 struct sk_buff *skb)
3920 {
3921 struct htt_resp *resp = (struct htt_resp *)skb->data;
3922 struct ath10k_per_peer_tx_stats *p_tx_stats = &ar->peer_tx_stats;
3923 struct htt_per_peer_tx_stats_ind *tx_stats;
3924 struct ieee80211_sta *sta;
3925 struct ath10k_peer *peer;
3926 int peer_id, i;
3927 u8 ppdu_len, num_ppdu;
3928
3929 num_ppdu = resp->peer_tx_stats.num_ppdu;
3930 ppdu_len = resp->peer_tx_stats.ppdu_len * sizeof(__le32);
3931
3932 if (skb->len < sizeof(struct htt_resp_hdr) + num_ppdu * ppdu_len) {
3933 ath10k_warn(ar, "Invalid peer stats buf length %d\n", skb->len);
3934 return;
3935 }
3936
3937 tx_stats = (struct htt_per_peer_tx_stats_ind *)
3938 (resp->peer_tx_stats.payload);
3939 peer_id = __le16_to_cpu(tx_stats->peer_id);
3940
3941 rcu_read_lock();
3942 spin_lock_bh(&ar->data_lock);
3943 peer = ath10k_peer_find_by_id(ar, peer_id);
3944 if (!peer || !peer->sta) {
3945 ath10k_warn(ar, "Invalid peer id %d peer stats buffer\n",
3946 peer_id);
3947 goto out;
3948 }
3949
3950 sta = peer->sta;
3951 for (i = 0; i < num_ppdu; i++) {
3952 tx_stats = (struct htt_per_peer_tx_stats_ind *)
3953 (resp->peer_tx_stats.payload + i * ppdu_len);
3954
3955 p_tx_stats->succ_bytes = __le32_to_cpu(tx_stats->succ_bytes);
3956 p_tx_stats->retry_bytes = __le32_to_cpu(tx_stats->retry_bytes);
3957 p_tx_stats->failed_bytes =
3958 __le32_to_cpu(tx_stats->failed_bytes);
3959 p_tx_stats->ratecode = tx_stats->ratecode;
3960 p_tx_stats->flags = tx_stats->flags;
3961 p_tx_stats->succ_pkts = __le16_to_cpu(tx_stats->succ_pkts);
3962 p_tx_stats->retry_pkts = __le16_to_cpu(tx_stats->retry_pkts);
3963 p_tx_stats->failed_pkts = __le16_to_cpu(tx_stats->failed_pkts);
3964 p_tx_stats->duration = __le16_to_cpu(tx_stats->tx_duration);
3965
3966 ath10k_update_per_peer_tx_stats(ar, sta, p_tx_stats);
3967 }
3968
3969 out:
3970 spin_unlock_bh(&ar->data_lock);
3971 rcu_read_unlock();
3972 }
3973
ath10k_fetch_10_2_tx_stats(struct ath10k * ar,u8 * data)3974 static void ath10k_fetch_10_2_tx_stats(struct ath10k *ar, u8 *data)
3975 {
3976 struct ath10k_pktlog_hdr *hdr = (struct ath10k_pktlog_hdr *)data;
3977 struct ath10k_per_peer_tx_stats *p_tx_stats = &ar->peer_tx_stats;
3978 struct ath10k_10_2_peer_tx_stats *tx_stats;
3979 struct ieee80211_sta *sta;
3980 struct ath10k_peer *peer;
3981 u16 log_type = __le16_to_cpu(hdr->log_type);
3982 u32 peer_id = 0, i;
3983
3984 if (log_type != ATH_PKTLOG_TYPE_TX_STAT)
3985 return;
3986
3987 tx_stats = (struct ath10k_10_2_peer_tx_stats *)((hdr->payload) +
3988 ATH10K_10_2_TX_STATS_OFFSET);
3989
3990 if (!tx_stats->tx_ppdu_cnt)
3991 return;
3992
3993 peer_id = tx_stats->peer_id;
3994
3995 rcu_read_lock();
3996 spin_lock_bh(&ar->data_lock);
3997 peer = ath10k_peer_find_by_id(ar, peer_id);
3998 if (!peer || !peer->sta) {
3999 ath10k_warn(ar, "Invalid peer id %d in peer stats buffer\n",
4000 peer_id);
4001 goto out;
4002 }
4003
4004 sta = peer->sta;
4005 for (i = 0; i < tx_stats->tx_ppdu_cnt; i++) {
4006 p_tx_stats->succ_bytes =
4007 __le16_to_cpu(tx_stats->success_bytes[i]);
4008 p_tx_stats->retry_bytes =
4009 __le16_to_cpu(tx_stats->retry_bytes[i]);
4010 p_tx_stats->failed_bytes =
4011 __le16_to_cpu(tx_stats->failed_bytes[i]);
4012 p_tx_stats->ratecode = tx_stats->ratecode[i];
4013 p_tx_stats->flags = tx_stats->flags[i];
4014 p_tx_stats->succ_pkts = tx_stats->success_pkts[i];
4015 p_tx_stats->retry_pkts = tx_stats->retry_pkts[i];
4016 p_tx_stats->failed_pkts = tx_stats->failed_pkts[i];
4017
4018 ath10k_update_per_peer_tx_stats(ar, sta, p_tx_stats);
4019 }
4020 spin_unlock_bh(&ar->data_lock);
4021 rcu_read_unlock();
4022
4023 return;
4024
4025 out:
4026 spin_unlock_bh(&ar->data_lock);
4027 rcu_read_unlock();
4028 }
4029
ath10k_htt_rx_pn_len(enum htt_security_types sec_type)4030 static int ath10k_htt_rx_pn_len(enum htt_security_types sec_type)
4031 {
4032 switch (sec_type) {
4033 case HTT_SECURITY_TKIP:
4034 case HTT_SECURITY_TKIP_NOMIC:
4035 case HTT_SECURITY_AES_CCMP:
4036 return 48;
4037 default:
4038 return 0;
4039 }
4040 }
4041
ath10k_htt_rx_sec_ind_handler(struct ath10k * ar,struct htt_security_indication * ev)4042 static void ath10k_htt_rx_sec_ind_handler(struct ath10k *ar,
4043 struct htt_security_indication *ev)
4044 {
4045 enum htt_txrx_sec_cast_type sec_index;
4046 enum htt_security_types sec_type;
4047 struct ath10k_peer *peer;
4048
4049 spin_lock_bh(&ar->data_lock);
4050
4051 peer = ath10k_peer_find_by_id(ar, __le16_to_cpu(ev->peer_id));
4052 if (!peer) {
4053 ath10k_warn(ar, "failed to find peer id %d for security indication",
4054 __le16_to_cpu(ev->peer_id));
4055 goto out;
4056 }
4057
4058 sec_type = MS(ev->flags, HTT_SECURITY_TYPE);
4059
4060 if (ev->flags & HTT_SECURITY_IS_UNICAST)
4061 sec_index = HTT_TXRX_SEC_UCAST;
4062 else
4063 sec_index = HTT_TXRX_SEC_MCAST;
4064
4065 peer->rx_pn[sec_index].sec_type = sec_type;
4066 peer->rx_pn[sec_index].pn_len = ath10k_htt_rx_pn_len(sec_type);
4067
4068 memset(peer->tids_last_pn_valid, 0, sizeof(peer->tids_last_pn_valid));
4069 memset(peer->tids_last_pn, 0, sizeof(peer->tids_last_pn));
4070
4071 out:
4072 spin_unlock_bh(&ar->data_lock);
4073 }
4074
ath10k_htt_t2h_msg_handler(struct ath10k * ar,struct sk_buff * skb)4075 bool ath10k_htt_t2h_msg_handler(struct ath10k *ar, struct sk_buff *skb)
4076 {
4077 struct ath10k_htt *htt = &ar->htt;
4078 struct htt_resp *resp = (struct htt_resp *)skb->data;
4079 enum htt_t2h_msg_type type;
4080
4081 /* confirm alignment */
4082 if (!IS_ALIGNED((unsigned long)skb->data, 4))
4083 ath10k_warn(ar, "unaligned htt message, expect trouble\n");
4084
4085 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx, msg_type: 0x%0X\n",
4086 resp->hdr.msg_type);
4087
4088 if (resp->hdr.msg_type >= ar->htt.t2h_msg_types_max) {
4089 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx, unsupported msg_type: 0x%0X\n max: 0x%0X",
4090 resp->hdr.msg_type, ar->htt.t2h_msg_types_max);
4091 return true;
4092 }
4093 type = ar->htt.t2h_msg_types[resp->hdr.msg_type];
4094
4095 switch (type) {
4096 case HTT_T2H_MSG_TYPE_VERSION_CONF: {
4097 htt->target_version_major = resp->ver_resp.major;
4098 htt->target_version_minor = resp->ver_resp.minor;
4099 complete(&htt->target_version_received);
4100 break;
4101 }
4102 case HTT_T2H_MSG_TYPE_RX_IND:
4103 if (ar->bus_param.dev_type != ATH10K_DEV_TYPE_HL) {
4104 ath10k_htt_rx_proc_rx_ind_ll(htt, &resp->rx_ind);
4105 } else {
4106 skb_queue_tail(&htt->rx_indication_head, skb);
4107 return false;
4108 }
4109 break;
4110 case HTT_T2H_MSG_TYPE_PEER_MAP: {
4111 struct htt_peer_map_event ev = {
4112 .vdev_id = resp->peer_map.vdev_id,
4113 .peer_id = __le16_to_cpu(resp->peer_map.peer_id),
4114 };
4115 memcpy(ev.addr, resp->peer_map.addr, sizeof(ev.addr));
4116 ath10k_peer_map_event(htt, &ev);
4117 break;
4118 }
4119 case HTT_T2H_MSG_TYPE_PEER_UNMAP: {
4120 struct htt_peer_unmap_event ev = {
4121 .peer_id = __le16_to_cpu(resp->peer_unmap.peer_id),
4122 };
4123 ath10k_peer_unmap_event(htt, &ev);
4124 break;
4125 }
4126 case HTT_T2H_MSG_TYPE_MGMT_TX_COMPLETION: {
4127 struct htt_tx_done tx_done = {};
4128 struct ath10k_htt *htt = &ar->htt;
4129 struct ath10k_htc *htc = &ar->htc;
4130 struct ath10k_htc_ep *ep = &ar->htc.endpoint[htt->eid];
4131 int status = __le32_to_cpu(resp->mgmt_tx_completion.status);
4132 int info = __le32_to_cpu(resp->mgmt_tx_completion.info);
4133
4134 tx_done.msdu_id = __le32_to_cpu(resp->mgmt_tx_completion.desc_id);
4135
4136 switch (status) {
4137 case HTT_MGMT_TX_STATUS_OK:
4138 tx_done.status = HTT_TX_COMPL_STATE_ACK;
4139 if (test_bit(WMI_SERVICE_HTT_MGMT_TX_COMP_VALID_FLAGS,
4140 ar->wmi.svc_map) &&
4141 (resp->mgmt_tx_completion.flags &
4142 HTT_MGMT_TX_CMPL_FLAG_ACK_RSSI)) {
4143 tx_done.ack_rssi =
4144 FIELD_GET(HTT_MGMT_TX_CMPL_INFO_ACK_RSSI_MASK,
4145 info);
4146 }
4147 break;
4148 case HTT_MGMT_TX_STATUS_RETRY:
4149 tx_done.status = HTT_TX_COMPL_STATE_NOACK;
4150 break;
4151 case HTT_MGMT_TX_STATUS_DROP:
4152 tx_done.status = HTT_TX_COMPL_STATE_DISCARD;
4153 break;
4154 }
4155
4156 if (htt->disable_tx_comp) {
4157 spin_lock_bh(&htc->tx_lock);
4158 ep->tx_credits++;
4159 spin_unlock_bh(&htc->tx_lock);
4160 }
4161
4162 status = ath10k_txrx_tx_unref(htt, &tx_done);
4163 if (!status) {
4164 spin_lock_bh(&htt->tx_lock);
4165 ath10k_htt_tx_mgmt_dec_pending(htt);
4166 spin_unlock_bh(&htt->tx_lock);
4167 }
4168 break;
4169 }
4170 case HTT_T2H_MSG_TYPE_TX_COMPL_IND:
4171 ath10k_htt_rx_tx_compl_ind(htt->ar, skb);
4172 break;
4173 case HTT_T2H_MSG_TYPE_SEC_IND: {
4174 struct ath10k *ar = htt->ar;
4175 struct htt_security_indication *ev = &resp->security_indication;
4176
4177 ath10k_htt_rx_sec_ind_handler(ar, ev);
4178 ath10k_dbg(ar, ATH10K_DBG_HTT,
4179 "sec ind peer_id %d unicast %d type %d\n",
4180 __le16_to_cpu(ev->peer_id),
4181 !!(ev->flags & HTT_SECURITY_IS_UNICAST),
4182 MS(ev->flags, HTT_SECURITY_TYPE));
4183 complete(&ar->install_key_done);
4184 break;
4185 }
4186 case HTT_T2H_MSG_TYPE_RX_FRAG_IND: {
4187 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt event: ",
4188 skb->data, skb->len);
4189 atomic_inc(&htt->num_mpdus_ready);
4190
4191 return ath10k_htt_rx_proc_rx_frag_ind(htt,
4192 &resp->rx_frag_ind,
4193 skb);
4194 }
4195 case HTT_T2H_MSG_TYPE_TEST:
4196 break;
4197 case HTT_T2H_MSG_TYPE_STATS_CONF:
4198 trace_ath10k_htt_stats(ar, skb->data, skb->len);
4199 break;
4200 case HTT_T2H_MSG_TYPE_TX_INSPECT_IND:
4201 /* Firmware can return tx frames if it's unable to fully
4202 * process them and suspects host may be able to fix it. ath10k
4203 * sends all tx frames as already inspected so this shouldn't
4204 * happen unless fw has a bug.
4205 */
4206 ath10k_warn(ar, "received an unexpected htt tx inspect event\n");
4207 break;
4208 case HTT_T2H_MSG_TYPE_RX_ADDBA:
4209 ath10k_htt_rx_addba(ar, resp);
4210 break;
4211 case HTT_T2H_MSG_TYPE_RX_DELBA:
4212 ath10k_htt_rx_delba(ar, resp);
4213 break;
4214 case HTT_T2H_MSG_TYPE_PKTLOG: {
4215 trace_ath10k_htt_pktlog(ar, resp->pktlog_msg.payload,
4216 skb->len -
4217 offsetof(struct htt_resp,
4218 pktlog_msg.payload));
4219
4220 if (ath10k_peer_stats_enabled(ar))
4221 ath10k_fetch_10_2_tx_stats(ar,
4222 resp->pktlog_msg.payload);
4223 break;
4224 }
4225 case HTT_T2H_MSG_TYPE_RX_FLUSH: {
4226 /* Ignore this event because mac80211 takes care of Rx
4227 * aggregation reordering.
4228 */
4229 break;
4230 }
4231 case HTT_T2H_MSG_TYPE_RX_IN_ORD_PADDR_IND: {
4232 skb_queue_tail(&htt->rx_in_ord_compl_q, skb);
4233 return false;
4234 }
4235 case HTT_T2H_MSG_TYPE_TX_CREDIT_UPDATE_IND: {
4236 struct ath10k_htt *htt = &ar->htt;
4237 struct ath10k_htc *htc = &ar->htc;
4238 struct ath10k_htc_ep *ep = &ar->htc.endpoint[htt->eid];
4239 u32 msg_word = __le32_to_cpu(*(__le32 *)resp);
4240 int htt_credit_delta;
4241
4242 htt_credit_delta = HTT_TX_CREDIT_DELTA_ABS_GET(msg_word);
4243 if (HTT_TX_CREDIT_SIGN_BIT_GET(msg_word))
4244 htt_credit_delta = -htt_credit_delta;
4245
4246 ath10k_dbg(ar, ATH10K_DBG_HTT,
4247 "htt credit update delta %d\n",
4248 htt_credit_delta);
4249
4250 if (htt->disable_tx_comp) {
4251 spin_lock_bh(&htc->tx_lock);
4252 ep->tx_credits += htt_credit_delta;
4253 spin_unlock_bh(&htc->tx_lock);
4254 ath10k_dbg(ar, ATH10K_DBG_HTT,
4255 "htt credit total %d\n",
4256 ep->tx_credits);
4257 ep->ep_ops.ep_tx_credits(htc->ar);
4258 }
4259 break;
4260 }
4261 case HTT_T2H_MSG_TYPE_CHAN_CHANGE: {
4262 u32 phymode = __le32_to_cpu(resp->chan_change.phymode);
4263 u32 freq = __le32_to_cpu(resp->chan_change.freq);
4264
4265 ar->tgt_oper_chan = ieee80211_get_channel(ar->hw->wiphy, freq);
4266 ath10k_dbg(ar, ATH10K_DBG_HTT,
4267 "htt chan change freq %u phymode %s\n",
4268 freq, ath10k_wmi_phymode_str(phymode));
4269 break;
4270 }
4271 case HTT_T2H_MSG_TYPE_AGGR_CONF:
4272 break;
4273 case HTT_T2H_MSG_TYPE_TX_FETCH_IND: {
4274 struct sk_buff *tx_fetch_ind = skb_copy(skb, GFP_ATOMIC);
4275
4276 if (!tx_fetch_ind) {
4277 ath10k_warn(ar, "failed to copy htt tx fetch ind\n");
4278 break;
4279 }
4280 skb_queue_tail(&htt->tx_fetch_ind_q, tx_fetch_ind);
4281 break;
4282 }
4283 case HTT_T2H_MSG_TYPE_TX_FETCH_CONFIRM:
4284 ath10k_htt_rx_tx_fetch_confirm(ar, skb);
4285 break;
4286 case HTT_T2H_MSG_TYPE_TX_MODE_SWITCH_IND:
4287 ath10k_htt_rx_tx_mode_switch_ind(ar, skb);
4288 break;
4289 case HTT_T2H_MSG_TYPE_PEER_STATS:
4290 ath10k_htt_fetch_peer_stats(ar, skb);
4291 break;
4292 case HTT_T2H_MSG_TYPE_EN_STATS:
4293 default:
4294 ath10k_warn(ar, "htt event (%d) not handled\n",
4295 resp->hdr.msg_type);
4296 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt event: ",
4297 skb->data, skb->len);
4298 break;
4299 }
4300 return true;
4301 }
4302 EXPORT_SYMBOL(ath10k_htt_t2h_msg_handler);
4303
ath10k_htt_rx_pktlog_completion_handler(struct ath10k * ar,struct sk_buff * skb)4304 void ath10k_htt_rx_pktlog_completion_handler(struct ath10k *ar,
4305 struct sk_buff *skb)
4306 {
4307 trace_ath10k_htt_pktlog(ar, skb->data, skb->len);
4308 dev_kfree_skb_any(skb);
4309 }
4310 EXPORT_SYMBOL(ath10k_htt_rx_pktlog_completion_handler);
4311
ath10k_htt_rx_deliver_msdu(struct ath10k * ar,int quota,int budget)4312 static int ath10k_htt_rx_deliver_msdu(struct ath10k *ar, int quota, int budget)
4313 {
4314 struct sk_buff *skb;
4315
4316 while (quota < budget) {
4317 if (skb_queue_empty(&ar->htt.rx_msdus_q))
4318 break;
4319
4320 skb = skb_dequeue(&ar->htt.rx_msdus_q);
4321 if (!skb)
4322 break;
4323 ath10k_process_rx(ar, skb);
4324 quota++;
4325 }
4326
4327 return quota;
4328 }
4329
ath10k_htt_rx_hl_indication(struct ath10k * ar,int budget)4330 int ath10k_htt_rx_hl_indication(struct ath10k *ar, int budget)
4331 {
4332 struct htt_resp *resp;
4333 struct ath10k_htt *htt = &ar->htt;
4334 struct sk_buff *skb;
4335 bool release;
4336 int quota;
4337
4338 for (quota = 0; quota < budget; quota++) {
4339 skb = skb_dequeue(&htt->rx_indication_head);
4340 if (!skb)
4341 break;
4342
4343 resp = (struct htt_resp *)skb->data;
4344
4345 release = ath10k_htt_rx_proc_rx_ind_hl(htt,
4346 &resp->rx_ind_hl,
4347 skb,
4348 HTT_RX_PN_CHECK,
4349 HTT_RX_NON_TKIP_MIC);
4350
4351 if (release)
4352 dev_kfree_skb_any(skb);
4353
4354 ath10k_dbg(ar, ATH10K_DBG_HTT, "rx indication poll pending count:%d\n",
4355 skb_queue_len(&htt->rx_indication_head));
4356 }
4357 return quota;
4358 }
4359 EXPORT_SYMBOL(ath10k_htt_rx_hl_indication);
4360
ath10k_htt_txrx_compl_task(struct ath10k * ar,int budget)4361 int ath10k_htt_txrx_compl_task(struct ath10k *ar, int budget)
4362 {
4363 struct ath10k_htt *htt = &ar->htt;
4364 struct htt_tx_done tx_done = {};
4365 struct sk_buff_head tx_ind_q;
4366 struct sk_buff *skb;
4367 unsigned long flags;
4368 int quota = 0, done, ret;
4369 bool resched_napi = false;
4370
4371 __skb_queue_head_init(&tx_ind_q);
4372
4373 /* Process pending frames before dequeuing more data
4374 * from hardware.
4375 */
4376 quota = ath10k_htt_rx_deliver_msdu(ar, quota, budget);
4377 if (quota == budget) {
4378 resched_napi = true;
4379 goto exit;
4380 }
4381
4382 while ((skb = skb_dequeue(&htt->rx_in_ord_compl_q))) {
4383 spin_lock_bh(&htt->rx_ring.lock);
4384 ret = ath10k_htt_rx_in_ord_ind(ar, skb);
4385 spin_unlock_bh(&htt->rx_ring.lock);
4386
4387 dev_kfree_skb_any(skb);
4388 if (ret == -EIO) {
4389 resched_napi = true;
4390 goto exit;
4391 }
4392 }
4393
4394 while (atomic_read(&htt->num_mpdus_ready)) {
4395 ret = ath10k_htt_rx_handle_amsdu(htt);
4396 if (ret == -EIO) {
4397 resched_napi = true;
4398 goto exit;
4399 }
4400 atomic_dec(&htt->num_mpdus_ready);
4401 }
4402
4403 /* Deliver received data after processing data from hardware */
4404 quota = ath10k_htt_rx_deliver_msdu(ar, quota, budget);
4405
4406 /* From NAPI documentation:
4407 * The napi poll() function may also process TX completions, in which
4408 * case if it processes the entire TX ring then it should count that
4409 * work as the rest of the budget.
4410 */
4411 if ((quota < budget) && !kfifo_is_empty(&htt->txdone_fifo))
4412 quota = budget;
4413
4414 /* kfifo_get: called only within txrx_tasklet so it's neatly serialized.
4415 * From kfifo_get() documentation:
4416 * Note that with only one concurrent reader and one concurrent writer,
4417 * you don't need extra locking to use these macro.
4418 */
4419 while (kfifo_get(&htt->txdone_fifo, &tx_done))
4420 ath10k_txrx_tx_unref(htt, &tx_done);
4421
4422 ath10k_mac_tx_push_pending(ar);
4423
4424 spin_lock_irqsave(&htt->tx_fetch_ind_q.lock, flags);
4425 skb_queue_splice_init(&htt->tx_fetch_ind_q, &tx_ind_q);
4426 spin_unlock_irqrestore(&htt->tx_fetch_ind_q.lock, flags);
4427
4428 while ((skb = __skb_dequeue(&tx_ind_q))) {
4429 ath10k_htt_rx_tx_fetch_ind(ar, skb);
4430 dev_kfree_skb_any(skb);
4431 }
4432
4433 exit:
4434 ath10k_htt_rx_msdu_buff_replenish(htt);
4435 /* In case of rx failure or more data to read, report budget
4436 * to reschedule NAPI poll
4437 */
4438 done = resched_napi ? budget : quota;
4439
4440 return done;
4441 }
4442 EXPORT_SYMBOL(ath10k_htt_txrx_compl_task);
4443
4444 static const struct ath10k_htt_rx_ops htt_rx_ops_32 = {
4445 .htt_get_rx_ring_size = ath10k_htt_get_rx_ring_size_32,
4446 .htt_config_paddrs_ring = ath10k_htt_config_paddrs_ring_32,
4447 .htt_set_paddrs_ring = ath10k_htt_set_paddrs_ring_32,
4448 .htt_get_vaddr_ring = ath10k_htt_get_vaddr_ring_32,
4449 .htt_reset_paddrs_ring = ath10k_htt_reset_paddrs_ring_32,
4450 };
4451
4452 static const struct ath10k_htt_rx_ops htt_rx_ops_64 = {
4453 .htt_get_rx_ring_size = ath10k_htt_get_rx_ring_size_64,
4454 .htt_config_paddrs_ring = ath10k_htt_config_paddrs_ring_64,
4455 .htt_set_paddrs_ring = ath10k_htt_set_paddrs_ring_64,
4456 .htt_get_vaddr_ring = ath10k_htt_get_vaddr_ring_64,
4457 .htt_reset_paddrs_ring = ath10k_htt_reset_paddrs_ring_64,
4458 };
4459
4460 static const struct ath10k_htt_rx_ops htt_rx_ops_hl = {
4461 .htt_rx_proc_rx_frag_ind = ath10k_htt_rx_proc_rx_frag_ind_hl,
4462 };
4463
ath10k_htt_set_rx_ops(struct ath10k_htt * htt)4464 void ath10k_htt_set_rx_ops(struct ath10k_htt *htt)
4465 {
4466 struct ath10k *ar = htt->ar;
4467
4468 if (ar->bus_param.dev_type == ATH10K_DEV_TYPE_HL)
4469 htt->rx_ops = &htt_rx_ops_hl;
4470 else if (ar->hw_params.target_64bit)
4471 htt->rx_ops = &htt_rx_ops_64;
4472 else
4473 htt->rx_ops = &htt_rx_ops_32;
4474 }
4475