1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * Marvell Armada CP110 pinctrl driver based on mvebu pinctrl core
4 *
5 * Copyright (C) 2017 Marvell
6 *
7 * Hanna Hawa <hannah@marvell.com>
8 */
9
10 #include <linux/err.h>
11 #include <linux/init.h>
12 #include <linux/io.h>
13 #include <linux/mfd/syscon.h>
14 #include <linux/of.h>
15 #include <linux/pinctrl/pinctrl.h>
16 #include <linux/platform_device.h>
17 #include <linux/property.h>
18
19 #include "pinctrl-mvebu.h"
20
21 /*
22 * Even if the pin controller is the same the MMP available depend on the SoC
23 * integration.
24 * - In Armada7K (single CP) almost all the MPPs are available (except the
25 * MMP 39 to 43)
26 * - In Armada8K (dual CP) the MPPs are split into 2 parts, MPPs 0-31 from
27 * CPS, and MPPs 32-62 from CPM, the below flags (V_ARMADA_8K_CPM,
28 * V_ARMADA_8K_CPS) set which MPP is available to the CPx.
29 * The x_PLUS enum mean that the MPP available for CPx and for Armada70x0
30 */
31 enum {
32 V_ARMADA_7K = BIT(0),
33 V_ARMADA_8K_CPM = BIT(1),
34 V_ARMADA_8K_CPS = BIT(2),
35 V_CP115_STANDALONE = BIT(3),
36 V_ARMADA_7K_8K_CPM = (V_ARMADA_7K | V_ARMADA_8K_CPM),
37 V_ARMADA_7K_8K_CPS = (V_ARMADA_7K | V_ARMADA_8K_CPS),
38 };
39
40 static struct mvebu_mpp_mode armada_cp110_mpp_modes[] = {
41 MPP_MODE(0,
42 MPP_FUNCTION(0, "gpio", NULL),
43 MPP_FUNCTION(1, "dev", "ale1"),
44 MPP_FUNCTION(2, "au", "i2smclk"),
45 MPP_FUNCTION(3, "ge0", "rxd3"),
46 MPP_FUNCTION(4, "tdm", "pclk"),
47 MPP_FUNCTION(6, "ptp", "pulse"),
48 MPP_FUNCTION(7, "mss_i2c", "sda"),
49 MPP_FUNCTION(8, "uart0", "rxd"),
50 MPP_FUNCTION(9, "sata0", "present_act"),
51 MPP_FUNCTION(10, "ge", "mdio")),
52 MPP_MODE(1,
53 MPP_FUNCTION(0, "gpio", NULL),
54 MPP_FUNCTION(1, "dev", "ale0"),
55 MPP_FUNCTION(2, "au", "i2sdo_spdifo"),
56 MPP_FUNCTION(3, "ge0", "rxd2"),
57 MPP_FUNCTION(4, "tdm", "drx"),
58 MPP_FUNCTION(6, "ptp", "clk"),
59 MPP_FUNCTION(7, "mss_i2c", "sck"),
60 MPP_FUNCTION(8, "uart0", "txd"),
61 MPP_FUNCTION(9, "sata1", "present_act"),
62 MPP_FUNCTION(10, "ge", "mdc")),
63 MPP_MODE(2,
64 MPP_FUNCTION(0, "gpio", NULL),
65 MPP_FUNCTION(1, "dev", "ad15"),
66 MPP_FUNCTION(2, "au", "i2sextclk"),
67 MPP_FUNCTION(3, "ge0", "rxd1"),
68 MPP_FUNCTION(4, "tdm", "dtx"),
69 MPP_FUNCTION(5, "mss_uart", "rxd"),
70 MPP_FUNCTION(6, "ptp", "pclk_out"),
71 MPP_FUNCTION(7, "i2c1", "sck"),
72 MPP_FUNCTION(8, "uart1", "rxd"),
73 MPP_FUNCTION(9, "sata0", "present_act"),
74 MPP_FUNCTION(10, "xg", "mdc")),
75 MPP_MODE(3,
76 MPP_FUNCTION(0, "gpio", NULL),
77 MPP_FUNCTION(1, "dev", "ad14"),
78 MPP_FUNCTION(2, "au", "i2slrclk"),
79 MPP_FUNCTION(3, "ge0", "rxd0"),
80 MPP_FUNCTION(4, "tdm", "fsync"),
81 MPP_FUNCTION(5, "mss_uart", "txd"),
82 MPP_FUNCTION(6, "pcie", "rstoutn"),
83 MPP_FUNCTION(7, "i2c1", "sda"),
84 MPP_FUNCTION(8, "uart1", "txd"),
85 MPP_FUNCTION(9, "sata1", "present_act"),
86 MPP_FUNCTION(10, "xg", "mdio")),
87 MPP_MODE(4,
88 MPP_FUNCTION(0, "gpio", NULL),
89 MPP_FUNCTION(1, "dev", "ad13"),
90 MPP_FUNCTION(2, "au", "i2sbclk"),
91 MPP_FUNCTION(3, "ge0", "rxctl"),
92 MPP_FUNCTION(4, "tdm", "rstn"),
93 MPP_FUNCTION(5, "mss_uart", "rxd"),
94 MPP_FUNCTION(6, "uart1", "cts"),
95 MPP_FUNCTION(7, "pcie0", "clkreq"),
96 MPP_FUNCTION(8, "uart3", "rxd"),
97 MPP_FUNCTION(10, "ge", "mdc")),
98 MPP_MODE(5,
99 MPP_FUNCTION(0, "gpio", NULL),
100 MPP_FUNCTION(1, "dev", "ad12"),
101 MPP_FUNCTION(2, "au", "i2sdi"),
102 MPP_FUNCTION(3, "ge0", "rxclk"),
103 MPP_FUNCTION(4, "tdm", "intn"),
104 MPP_FUNCTION(5, "mss_uart", "txd"),
105 MPP_FUNCTION(6, "uart1", "rts"),
106 MPP_FUNCTION(7, "pcie1", "clkreq"),
107 MPP_FUNCTION(8, "uart3", "txd"),
108 MPP_FUNCTION(10, "ge", "mdio")),
109 MPP_MODE(6,
110 MPP_FUNCTION(0, "gpio", NULL),
111 MPP_FUNCTION(1, "dev", "ad11"),
112 MPP_FUNCTION(3, "ge0", "txd3"),
113 MPP_FUNCTION(4, "spi0", "csn2"),
114 MPP_FUNCTION(5, "au", "i2sextclk"),
115 MPP_FUNCTION(6, "sata1", "present_act"),
116 MPP_FUNCTION(7, "pcie2", "clkreq"),
117 MPP_FUNCTION(8, "uart0", "rxd"),
118 MPP_FUNCTION(9, "ptp", "pulse")),
119 MPP_MODE(7,
120 MPP_FUNCTION(0, "gpio", NULL),
121 MPP_FUNCTION(1, "dev", "ad10"),
122 MPP_FUNCTION(3, "ge0", "txd2"),
123 MPP_FUNCTION(4, "spi0", "csn1"),
124 MPP_FUNCTION(5, "spi1", "csn1"),
125 MPP_FUNCTION(6, "sata0", "present_act"),
126 MPP_FUNCTION(7, "led", "data"),
127 MPP_FUNCTION(8, "uart0", "txd"),
128 MPP_FUNCTION(9, "ptp", "clk")),
129 MPP_MODE(8,
130 MPP_FUNCTION(0, "gpio", NULL),
131 MPP_FUNCTION(1, "dev", "ad9"),
132 MPP_FUNCTION(3, "ge0", "txd1"),
133 MPP_FUNCTION(4, "spi0", "csn0"),
134 MPP_FUNCTION(5, "spi1", "csn0"),
135 MPP_FUNCTION(6, "uart0", "cts"),
136 MPP_FUNCTION(7, "led", "stb"),
137 MPP_FUNCTION(8, "uart2", "rxd"),
138 MPP_FUNCTION(9, "ptp", "pclk_out"),
139 MPP_FUNCTION(10, "synce1", "clk")),
140 MPP_MODE(9,
141 MPP_FUNCTION(0, "gpio", NULL),
142 MPP_FUNCTION(1, "dev", "ad8"),
143 MPP_FUNCTION(3, "ge0", "txd0"),
144 MPP_FUNCTION(4, "spi0", "mosi"),
145 MPP_FUNCTION(5, "spi1", "mosi"),
146 MPP_FUNCTION(7, "pcie", "rstoutn"),
147 MPP_FUNCTION(10, "synce2", "clk")),
148 MPP_MODE(10,
149 MPP_FUNCTION(0, "gpio", NULL),
150 MPP_FUNCTION(1, "dev", "readyn"),
151 MPP_FUNCTION(3, "ge0", "txctl"),
152 MPP_FUNCTION(4, "spi0", "miso"),
153 MPP_FUNCTION(5, "spi1", "miso"),
154 MPP_FUNCTION(6, "uart0", "cts"),
155 MPP_FUNCTION(7, "sata1", "present_act")),
156 MPP_MODE(11,
157 MPP_FUNCTION(0, "gpio", NULL),
158 MPP_FUNCTION(1, "dev", "wen1"),
159 MPP_FUNCTION(3, "ge0", "txclkout"),
160 MPP_FUNCTION(4, "spi0", "clk"),
161 MPP_FUNCTION(5, "spi1", "clk"),
162 MPP_FUNCTION(6, "uart0", "rts"),
163 MPP_FUNCTION(7, "led", "clk"),
164 MPP_FUNCTION(8, "uart2", "txd"),
165 MPP_FUNCTION(9, "sata0", "present_act")),
166 MPP_MODE(12,
167 MPP_FUNCTION(0, "gpio", NULL),
168 MPP_FUNCTION(1, "dev", "clk_out"),
169 MPP_FUNCTION(2, "nf", "rbn1"),
170 MPP_FUNCTION(3, "spi1", "csn1"),
171 MPP_FUNCTION(4, "ge0", "rxclk")),
172 MPP_MODE(13,
173 MPP_FUNCTION(0, "gpio", NULL),
174 MPP_FUNCTION(1, "dev", "burstn"),
175 MPP_FUNCTION(2, "nf", "rbn0"),
176 MPP_FUNCTION(3, "spi1", "miso"),
177 MPP_FUNCTION(4, "ge0", "rxctl"),
178 MPP_FUNCTION(8, "mss_spi", "miso")),
179 MPP_MODE(14,
180 MPP_FUNCTION(0, "gpio", NULL),
181 MPP_FUNCTION(1, "dev", "bootcsn"),
182 MPP_FUNCTION(2, "dev", "csn0"),
183 MPP_FUNCTION(3, "spi1", "csn0"),
184 MPP_FUNCTION(4, "spi0", "csn3"),
185 MPP_FUNCTION(5, "au", "i2sextclk"),
186 MPP_FUNCTION(6, "spi0", "miso"),
187 MPP_FUNCTION(7, "sata0", "present_act"),
188 MPP_FUNCTION(8, "mss_spi", "csn")),
189 MPP_MODE(15,
190 MPP_FUNCTION(0, "gpio", NULL),
191 MPP_FUNCTION(1, "dev", "ad7"),
192 MPP_FUNCTION(3, "spi1", "mosi"),
193 MPP_FUNCTION(6, "spi0", "mosi"),
194 MPP_FUNCTION(8, "mss_spi", "mosi"),
195 MPP_FUNCTION(11, "ptp", "pulse_cp2cp")),
196 MPP_MODE(16,
197 MPP_FUNCTION(0, "gpio", NULL),
198 MPP_FUNCTION(1, "dev", "ad6"),
199 MPP_FUNCTION(3, "spi1", "clk"),
200 MPP_FUNCTION(8, "mss_spi", "clk")),
201 MPP_MODE(17,
202 MPP_FUNCTION(0, "gpio", NULL),
203 MPP_FUNCTION(1, "dev", "ad5"),
204 MPP_FUNCTION(4, "ge0", "txd3")),
205 MPP_MODE(18,
206 MPP_FUNCTION(0, "gpio", NULL),
207 MPP_FUNCTION(1, "dev", "ad4"),
208 MPP_FUNCTION(4, "ge0", "txd2"),
209 MPP_FUNCTION(11, "ptp", "clk_cp2cp")),
210 MPP_MODE(19,
211 MPP_FUNCTION(0, "gpio", NULL),
212 MPP_FUNCTION(1, "dev", "ad3"),
213 MPP_FUNCTION(4, "ge0", "txd1"),
214 MPP_FUNCTION(11, "wakeup", "out_cp2cp")),
215 MPP_MODE(20,
216 MPP_FUNCTION(0, "gpio", NULL),
217 MPP_FUNCTION(1, "dev", "ad2"),
218 MPP_FUNCTION(4, "ge0", "txd0")),
219 MPP_MODE(21,
220 MPP_FUNCTION(0, "gpio", NULL),
221 MPP_FUNCTION(1, "dev", "ad1"),
222 MPP_FUNCTION(4, "ge0", "txctl"),
223 MPP_FUNCTION(11, "sei", "in_cp2cp")),
224 MPP_MODE(22,
225 MPP_FUNCTION(0, "gpio", NULL),
226 MPP_FUNCTION(1, "dev", "ad0"),
227 MPP_FUNCTION(4, "ge0", "txclkout"),
228 MPP_FUNCTION(11, "wakeup", "in_cp2cp")),
229 MPP_MODE(23,
230 MPP_FUNCTION(0, "gpio", NULL),
231 MPP_FUNCTION(1, "dev", "a1"),
232 MPP_FUNCTION(5, "au", "i2smclk"),
233 MPP_FUNCTION(11, "link", "rd_in_cp2cp")),
234 MPP_MODE(24,
235 MPP_FUNCTION(0, "gpio", NULL),
236 MPP_FUNCTION(1, "dev", "a0"),
237 MPP_FUNCTION(5, "au", "i2slrclk")),
238 MPP_MODE(25,
239 MPP_FUNCTION(0, "gpio", NULL),
240 MPP_FUNCTION(1, "dev", "oen"),
241 MPP_FUNCTION(5, "au", "i2sdo_spdifo")),
242 MPP_MODE(26,
243 MPP_FUNCTION(0, "gpio", NULL),
244 MPP_FUNCTION(1, "dev", "wen0"),
245 MPP_FUNCTION(5, "au", "i2sbclk")),
246 MPP_MODE(27,
247 MPP_FUNCTION(0, "gpio", NULL),
248 MPP_FUNCTION(1, "dev", "csn0"),
249 MPP_FUNCTION(2, "spi1", "miso"),
250 MPP_FUNCTION(3, "mss_gpio4", NULL),
251 MPP_FUNCTION(4, "ge0", "rxd3"),
252 MPP_FUNCTION(5, "spi0", "csn4"),
253 MPP_FUNCTION(8, "ge", "mdio"),
254 MPP_FUNCTION(9, "sata0", "present_act"),
255 MPP_FUNCTION(10, "uart0", "rts"),
256 MPP_FUNCTION(11, "rei", "in_cp2cp")),
257 MPP_MODE(28,
258 MPP_FUNCTION(0, "gpio", NULL),
259 MPP_FUNCTION(1, "dev", "csn1"),
260 MPP_FUNCTION(2, "spi1", "csn0"),
261 MPP_FUNCTION(3, "mss_gpio5", NULL),
262 MPP_FUNCTION(4, "ge0", "rxd2"),
263 MPP_FUNCTION(5, "spi0", "csn5"),
264 MPP_FUNCTION(6, "pcie2", "clkreq"),
265 MPP_FUNCTION(7, "ptp", "pulse"),
266 MPP_FUNCTION(8, "ge", "mdc"),
267 MPP_FUNCTION(9, "sata1", "present_act"),
268 MPP_FUNCTION(10, "uart0", "cts"),
269 MPP_FUNCTION(11, "led", "data")),
270 MPP_MODE(29,
271 MPP_FUNCTION(0, "gpio", NULL),
272 MPP_FUNCTION(1, "dev", "csn2"),
273 MPP_FUNCTION(2, "spi1", "mosi"),
274 MPP_FUNCTION(3, "mss_gpio6", NULL),
275 MPP_FUNCTION(4, "ge0", "rxd1"),
276 MPP_FUNCTION(5, "spi0", "csn6"),
277 MPP_FUNCTION(6, "pcie1", "clkreq"),
278 MPP_FUNCTION(7, "ptp", "clk"),
279 MPP_FUNCTION(8, "mss_i2c", "sda"),
280 MPP_FUNCTION(9, "sata0", "present_act"),
281 MPP_FUNCTION(10, "uart0", "rxd"),
282 MPP_FUNCTION(11, "led", "stb")),
283 MPP_MODE(30,
284 MPP_FUNCTION(0, "gpio", NULL),
285 MPP_FUNCTION(1, "dev", "csn3"),
286 MPP_FUNCTION(2, "spi1", "clk"),
287 MPP_FUNCTION(3, "mss_gpio7", NULL),
288 MPP_FUNCTION(4, "ge0", "rxd0"),
289 MPP_FUNCTION(5, "spi0", "csn7"),
290 MPP_FUNCTION(6, "pcie0", "clkreq"),
291 MPP_FUNCTION(7, "ptp", "pclk_out"),
292 MPP_FUNCTION(8, "mss_i2c", "sck"),
293 MPP_FUNCTION(9, "sata1", "present_act"),
294 MPP_FUNCTION(10, "uart0", "txd"),
295 MPP_FUNCTION(11, "led", "clk")),
296 MPP_MODE(31,
297 MPP_FUNCTION(0, "gpio", NULL),
298 MPP_FUNCTION(1, "dev", "a2"),
299 MPP_FUNCTION(3, "mss_gpio4", NULL),
300 MPP_FUNCTION(6, "pcie", "rstoutn"),
301 MPP_FUNCTION(8, "ge", "mdc")),
302 MPP_MODE(32,
303 MPP_FUNCTION(0, "gpio", NULL),
304 MPP_FUNCTION(1, "mii", "col"),
305 MPP_FUNCTION(2, "mii", "txerr"),
306 MPP_FUNCTION(3, "mss_spi", "miso"),
307 MPP_FUNCTION(4, "tdm", "drx"),
308 MPP_FUNCTION(5, "au", "i2sextclk"),
309 MPP_FUNCTION(6, "au", "i2sdi"),
310 MPP_FUNCTION(7, "ge", "mdio"),
311 MPP_FUNCTION(8, "sdio", "v18_en"),
312 MPP_FUNCTION(9, "pcie1", "clkreq"),
313 MPP_FUNCTION(10, "mss_gpio0", NULL)),
314 MPP_MODE(33,
315 MPP_FUNCTION(0, "gpio", NULL),
316 MPP_FUNCTION(1, "mii", "txclk"),
317 MPP_FUNCTION(2, "sdio", "pwr10"),
318 MPP_FUNCTION(3, "mss_spi", "csn"),
319 MPP_FUNCTION(4, "tdm", "fsync"),
320 MPP_FUNCTION(5, "au", "i2smclk"),
321 MPP_FUNCTION(6, "sdio", "bus_pwr"),
322 MPP_FUNCTION(8, "xg", "mdio"),
323 MPP_FUNCTION(9, "pcie2", "clkreq"),
324 MPP_FUNCTION(10, "mss_gpio1", NULL)),
325 MPP_MODE(34,
326 MPP_FUNCTION(0, "gpio", NULL),
327 MPP_FUNCTION(1, "mii", "rxerr"),
328 MPP_FUNCTION(2, "sdio", "pwr11"),
329 MPP_FUNCTION(3, "mss_spi", "mosi"),
330 MPP_FUNCTION(4, "tdm", "dtx"),
331 MPP_FUNCTION(5, "au", "i2slrclk"),
332 MPP_FUNCTION(6, "sdio", "wr_protect"),
333 MPP_FUNCTION(7, "ge", "mdc"),
334 MPP_FUNCTION(9, "pcie0", "clkreq"),
335 MPP_FUNCTION(10, "mss_gpio2", NULL)),
336 MPP_MODE(35,
337 MPP_FUNCTION(0, "gpio", NULL),
338 MPP_FUNCTION(1, "sata1", "present_act"),
339 MPP_FUNCTION(2, "i2c1", "sda"),
340 MPP_FUNCTION(3, "mss_spi", "clk"),
341 MPP_FUNCTION(4, "tdm", "pclk"),
342 MPP_FUNCTION(5, "au", "i2sdo_spdifo"),
343 MPP_FUNCTION(6, "sdio", "card_detect"),
344 MPP_FUNCTION(7, "xg", "mdio"),
345 MPP_FUNCTION(8, "ge", "mdio"),
346 MPP_FUNCTION(9, "pcie", "rstoutn"),
347 MPP_FUNCTION(10, "mss_gpio3", NULL)),
348 MPP_MODE(36,
349 MPP_FUNCTION(0, "gpio", NULL),
350 MPP_FUNCTION(1, "synce2", "clk"),
351 MPP_FUNCTION(2, "i2c1", "sck"),
352 MPP_FUNCTION(3, "ptp", "clk"),
353 MPP_FUNCTION(4, "synce1", "clk"),
354 MPP_FUNCTION(5, "au", "i2sbclk"),
355 MPP_FUNCTION(6, "sata0", "present_act"),
356 MPP_FUNCTION(7, "xg", "mdc"),
357 MPP_FUNCTION(8, "ge", "mdc"),
358 MPP_FUNCTION(9, "pcie2", "clkreq"),
359 MPP_FUNCTION(10, "mss_gpio5", NULL)),
360 MPP_MODE(37,
361 MPP_FUNCTION(0, "gpio", NULL),
362 MPP_FUNCTION(1, "uart2", "rxd"),
363 MPP_FUNCTION(2, "i2c0", "sck"),
364 MPP_FUNCTION(3, "ptp", "pclk_out"),
365 MPP_FUNCTION(4, "tdm", "intn"),
366 MPP_FUNCTION(5, "mss_i2c", "sck"),
367 MPP_FUNCTION(6, "sata1", "present_act"),
368 MPP_FUNCTION(7, "ge", "mdc"),
369 MPP_FUNCTION(8, "xg", "mdc"),
370 MPP_FUNCTION(9, "pcie1", "clkreq"),
371 MPP_FUNCTION(10, "mss_gpio6", NULL),
372 MPP_FUNCTION(11, "link", "rd_out_cp2cp")),
373 MPP_MODE(38,
374 MPP_FUNCTION(0, "gpio", NULL),
375 MPP_FUNCTION(1, "uart2", "txd"),
376 MPP_FUNCTION(2, "i2c0", "sda"),
377 MPP_FUNCTION(3, "ptp", "pulse"),
378 MPP_FUNCTION(4, "tdm", "rstn"),
379 MPP_FUNCTION(5, "mss_i2c", "sda"),
380 MPP_FUNCTION(6, "sata0", "present_act"),
381 MPP_FUNCTION(7, "ge", "mdio"),
382 MPP_FUNCTION(8, "xg", "mdio"),
383 MPP_FUNCTION(9, "au", "i2sextclk"),
384 MPP_FUNCTION(10, "mss_gpio7", NULL),
385 MPP_FUNCTION(11, "ptp", "pulse_cp2cp")),
386 MPP_MODE(39,
387 MPP_FUNCTION(0, "gpio", NULL),
388 MPP_FUNCTION(1, "sdio", "wr_protect"),
389 MPP_FUNCTION(4, "au", "i2sbclk"),
390 MPP_FUNCTION(5, "ptp", "clk"),
391 MPP_FUNCTION(6, "spi0", "csn1"),
392 MPP_FUNCTION(9, "sata1", "present_act"),
393 MPP_FUNCTION(10, "mss_gpio0", NULL)),
394 MPP_MODE(40,
395 MPP_FUNCTION(0, "gpio", NULL),
396 MPP_FUNCTION(1, "sdio", "pwr11"),
397 MPP_FUNCTION(2, "synce1", "clk"),
398 MPP_FUNCTION(3, "mss_i2c", "sda"),
399 MPP_FUNCTION(4, "au", "i2sdo_spdifo"),
400 MPP_FUNCTION(5, "ptp", "pclk_out"),
401 MPP_FUNCTION(6, "spi0", "clk"),
402 MPP_FUNCTION(7, "uart1", "txd"),
403 MPP_FUNCTION(8, "ge", "mdio"),
404 MPP_FUNCTION(9, "sata0", "present_act"),
405 MPP_FUNCTION(10, "mss_gpio1", NULL)),
406 MPP_MODE(41,
407 MPP_FUNCTION(0, "gpio", NULL),
408 MPP_FUNCTION(1, "sdio", "pwr10"),
409 MPP_FUNCTION(2, "sdio", "bus_pwr"),
410 MPP_FUNCTION(3, "mss_i2c", "sck"),
411 MPP_FUNCTION(4, "au", "i2slrclk"),
412 MPP_FUNCTION(5, "ptp", "pulse"),
413 MPP_FUNCTION(6, "spi0", "mosi"),
414 MPP_FUNCTION(7, "uart1", "rxd"),
415 MPP_FUNCTION(8, "ge", "mdc"),
416 MPP_FUNCTION(9, "sata1", "present_act"),
417 MPP_FUNCTION(10, "mss_gpio2", NULL),
418 MPP_FUNCTION(11, "rei", "out_cp2cp")),
419 MPP_MODE(42,
420 MPP_FUNCTION(0, "gpio", NULL),
421 MPP_FUNCTION(1, "sdio", "v18_en"),
422 MPP_FUNCTION(2, "sdio", "wr_protect"),
423 MPP_FUNCTION(3, "synce2", "clk"),
424 MPP_FUNCTION(4, "au", "i2smclk"),
425 MPP_FUNCTION(5, "mss_uart", "txd"),
426 MPP_FUNCTION(6, "spi0", "miso"),
427 MPP_FUNCTION(7, "uart1", "cts"),
428 MPP_FUNCTION(8, "xg", "mdc"),
429 MPP_FUNCTION(9, "sata0", "present_act"),
430 MPP_FUNCTION(10, "mss_gpio4", NULL)),
431 MPP_MODE(43,
432 MPP_FUNCTION(0, "gpio", NULL),
433 MPP_FUNCTION(1, "sdio", "card_detect"),
434 MPP_FUNCTION(3, "synce1", "clk"),
435 MPP_FUNCTION(4, "au", "i2sextclk"),
436 MPP_FUNCTION(5, "mss_uart", "rxd"),
437 MPP_FUNCTION(6, "spi0", "csn0"),
438 MPP_FUNCTION(7, "uart1", "rts"),
439 MPP_FUNCTION(8, "xg", "mdio"),
440 MPP_FUNCTION(9, "sata1", "present_act"),
441 MPP_FUNCTION(10, "mss_gpio5", NULL),
442 MPP_FUNCTION(11, "wakeup", "out_cp2cp")),
443 MPP_MODE(44,
444 MPP_FUNCTION(0, "gpio", NULL),
445 MPP_FUNCTION(1, "ge1", "txd2"),
446 MPP_FUNCTION(7, "uart0", "rts"),
447 MPP_FUNCTION(11, "ptp", "clk_cp2cp")),
448 MPP_MODE(45,
449 MPP_FUNCTION(0, "gpio", NULL),
450 MPP_FUNCTION(1, "ge1", "txd3"),
451 MPP_FUNCTION(7, "uart0", "txd"),
452 MPP_FUNCTION(9, "pcie", "rstoutn")),
453 MPP_MODE(46,
454 MPP_FUNCTION(0, "gpio", NULL),
455 MPP_FUNCTION(1, "ge1", "txd1"),
456 MPP_FUNCTION(7, "uart1", "rts")),
457 MPP_MODE(47,
458 MPP_FUNCTION(0, "gpio", NULL),
459 MPP_FUNCTION(1, "ge1", "txd0"),
460 MPP_FUNCTION(5, "spi1", "clk"),
461 MPP_FUNCTION(7, "uart1", "txd"),
462 MPP_FUNCTION(8, "ge", "mdc")),
463 MPP_MODE(48,
464 MPP_FUNCTION(0, "gpio", NULL),
465 MPP_FUNCTION(1, "ge1", "txctl_txen"),
466 MPP_FUNCTION(5, "spi1", "mosi"),
467 MPP_FUNCTION(8, "xg", "mdc"),
468 MPP_FUNCTION(11, "wakeup", "in_cp2cp")),
469 MPP_MODE(49,
470 MPP_FUNCTION(0, "gpio", NULL),
471 MPP_FUNCTION(1, "ge1", "txclkout"),
472 MPP_FUNCTION(2, "mii", "crs"),
473 MPP_FUNCTION(5, "spi1", "miso"),
474 MPP_FUNCTION(7, "uart1", "rxd"),
475 MPP_FUNCTION(8, "ge", "mdio"),
476 MPP_FUNCTION(9, "pcie0", "clkreq"),
477 MPP_FUNCTION(10, "sdio", "v18_en"),
478 MPP_FUNCTION(11, "sei", "out_cp2cp")),
479 MPP_MODE(50,
480 MPP_FUNCTION(0, "gpio", NULL),
481 MPP_FUNCTION(1, "ge1", "rxclk"),
482 MPP_FUNCTION(2, "mss_i2c", "sda"),
483 MPP_FUNCTION(5, "spi1", "csn0"),
484 MPP_FUNCTION(6, "uart2", "txd"),
485 MPP_FUNCTION(7, "uart0", "rxd"),
486 MPP_FUNCTION(8, "xg", "mdio"),
487 MPP_FUNCTION(10, "sdio", "pwr11")),
488 MPP_MODE(51,
489 MPP_FUNCTION(0, "gpio", NULL),
490 MPP_FUNCTION(1, "ge1", "rxd0"),
491 MPP_FUNCTION(2, "mss_i2c", "sck"),
492 MPP_FUNCTION(5, "spi1", "csn1"),
493 MPP_FUNCTION(6, "uart2", "rxd"),
494 MPP_FUNCTION(7, "uart0", "cts"),
495 MPP_FUNCTION(10, "sdio", "pwr10")),
496 MPP_MODE(52,
497 MPP_FUNCTION(0, "gpio", NULL),
498 MPP_FUNCTION(1, "ge1", "rxd1"),
499 MPP_FUNCTION(2, "synce1", "clk"),
500 MPP_FUNCTION(4, "synce2", "clk"),
501 MPP_FUNCTION(5, "spi1", "csn2"),
502 MPP_FUNCTION(7, "uart1", "cts"),
503 MPP_FUNCTION(8, "led", "clk"),
504 MPP_FUNCTION(9, "pcie", "rstoutn"),
505 MPP_FUNCTION(10, "pcie0", "clkreq")),
506 MPP_MODE(53,
507 MPP_FUNCTION(0, "gpio", NULL),
508 MPP_FUNCTION(1, "ge1", "rxd2"),
509 MPP_FUNCTION(3, "ptp", "clk"),
510 MPP_FUNCTION(5, "spi1", "csn3"),
511 MPP_FUNCTION(7, "uart1", "rxd"),
512 MPP_FUNCTION(8, "led", "stb"),
513 MPP_FUNCTION(11, "sdio", "led")),
514 MPP_MODE(54,
515 MPP_FUNCTION(0, "gpio", NULL),
516 MPP_FUNCTION(1, "ge1", "rxd3"),
517 MPP_FUNCTION(2, "synce2", "clk"),
518 MPP_FUNCTION(3, "ptp", "pclk_out"),
519 MPP_FUNCTION(4, "synce1", "clk"),
520 MPP_FUNCTION(8, "led", "data"),
521 MPP_FUNCTION(10, "sdio", "hw_rst"),
522 MPP_FUNCTION(11, "sdio_wp", "wr_protect")),
523 MPP_MODE(55,
524 MPP_FUNCTION(0, "gpio", NULL),
525 MPP_FUNCTION(1, "ge1", "rxctl_rxdv"),
526 MPP_FUNCTION(3, "ptp", "pulse"),
527 MPP_FUNCTION(10, "sdio", "led"),
528 MPP_FUNCTION(11, "sdio_cd", "card_detect")),
529 MPP_MODE(56,
530 MPP_FUNCTION(0, "gpio", NULL),
531 MPP_FUNCTION(4, "tdm", "drx"),
532 MPP_FUNCTION(5, "au", "i2sdo_spdifo"),
533 MPP_FUNCTION(6, "spi0", "clk"),
534 MPP_FUNCTION(7, "uart1", "rxd"),
535 MPP_FUNCTION(9, "sata1", "present_act"),
536 MPP_FUNCTION(14, "sdio", "clk")),
537 MPP_MODE(57,
538 MPP_FUNCTION(0, "gpio", NULL),
539 MPP_FUNCTION(2, "mss_i2c", "sda"),
540 MPP_FUNCTION(3, "ptp", "pclk_out"),
541 MPP_FUNCTION(4, "tdm", "intn"),
542 MPP_FUNCTION(5, "au", "i2sbclk"),
543 MPP_FUNCTION(6, "spi0", "mosi"),
544 MPP_FUNCTION(7, "uart1", "txd"),
545 MPP_FUNCTION(9, "sata0", "present_act"),
546 MPP_FUNCTION(14, "sdio", "cmd")),
547 MPP_MODE(58,
548 MPP_FUNCTION(0, "gpio", NULL),
549 MPP_FUNCTION(2, "mss_i2c", "sck"),
550 MPP_FUNCTION(3, "ptp", "clk"),
551 MPP_FUNCTION(4, "tdm", "rstn"),
552 MPP_FUNCTION(5, "au", "i2sdi"),
553 MPP_FUNCTION(6, "spi0", "miso"),
554 MPP_FUNCTION(7, "uart1", "cts"),
555 MPP_FUNCTION(8, "led", "clk"),
556 MPP_FUNCTION(14, "sdio", "d0")),
557 MPP_MODE(59,
558 MPP_FUNCTION(0, "gpio", NULL),
559 MPP_FUNCTION(1, "mss_gpio7", NULL),
560 MPP_FUNCTION(2, "synce2", "clk"),
561 MPP_FUNCTION(4, "tdm", "fsync"),
562 MPP_FUNCTION(5, "au", "i2slrclk"),
563 MPP_FUNCTION(6, "spi0", "csn0"),
564 MPP_FUNCTION(7, "uart0", "cts"),
565 MPP_FUNCTION(8, "led", "stb"),
566 MPP_FUNCTION(9, "uart1", "txd"),
567 MPP_FUNCTION(14, "sdio", "d1")),
568 MPP_MODE(60,
569 MPP_FUNCTION(0, "gpio", NULL),
570 MPP_FUNCTION(1, "mss_gpio6", NULL),
571 MPP_FUNCTION(3, "ptp", "pulse"),
572 MPP_FUNCTION(4, "tdm", "dtx"),
573 MPP_FUNCTION(5, "au", "i2smclk"),
574 MPP_FUNCTION(6, "spi0", "csn1"),
575 MPP_FUNCTION(7, "uart0", "rts"),
576 MPP_FUNCTION(8, "led", "data"),
577 MPP_FUNCTION(9, "uart1", "rxd"),
578 MPP_FUNCTION(14, "sdio", "d2")),
579 MPP_MODE(61,
580 MPP_FUNCTION(0, "gpio", NULL),
581 MPP_FUNCTION(1, "mss_gpio5", NULL),
582 MPP_FUNCTION(3, "ptp", "clk"),
583 MPP_FUNCTION(4, "tdm", "pclk"),
584 MPP_FUNCTION(5, "au", "i2sextclk"),
585 MPP_FUNCTION(6, "spi0", "csn2"),
586 MPP_FUNCTION(7, "uart0", "txd"),
587 MPP_FUNCTION(8, "uart2", "txd"),
588 MPP_FUNCTION(9, "sata1", "present_act"),
589 MPP_FUNCTION(10, "ge", "mdio"),
590 MPP_FUNCTION(14, "sdio", "d3")),
591 MPP_MODE(62,
592 MPP_FUNCTION(0, "gpio", NULL),
593 MPP_FUNCTION(1, "mss_gpio4", NULL),
594 MPP_FUNCTION(2, "synce1", "clk"),
595 MPP_FUNCTION(3, "ptp", "pclk_out"),
596 MPP_FUNCTION(5, "sata1", "present_act"),
597 MPP_FUNCTION(6, "spi0", "csn3"),
598 MPP_FUNCTION(7, "uart0", "rxd"),
599 MPP_FUNCTION(8, "uart2", "rxd"),
600 MPP_FUNCTION(9, "sata0", "present_act"),
601 MPP_FUNCTION(10, "ge", "mdc"),
602 MPP_FUNCTION(14, "sdio", "ds")),
603 };
604
605 static const struct of_device_id armada_cp110_pinctrl_of_match[] = {
606 {
607 .compatible = "marvell,armada-7k-pinctrl",
608 .data = (void *) V_ARMADA_7K,
609 },
610 {
611 .compatible = "marvell,armada-8k-cpm-pinctrl",
612 .data = (void *) V_ARMADA_8K_CPM,
613 },
614 {
615 .compatible = "marvell,armada-8k-cps-pinctrl",
616 .data = (void *) V_ARMADA_8K_CPS,
617 },
618 {
619 .compatible = "marvell,cp115-standalone-pinctrl",
620 .data = (void *) V_CP115_STANDALONE,
621 },
622 { },
623 };
624
625 static const struct mvebu_mpp_ctrl armada_cp110_mpp_controls[] = {
626 MPP_FUNC_CTRL(0, 62, NULL, mvebu_regmap_mpp_ctrl),
627 };
628
mvebu_pinctrl_assign_variant(struct mvebu_mpp_mode * m,u8 variant)629 static void mvebu_pinctrl_assign_variant(struct mvebu_mpp_mode *m,
630 u8 variant)
631 {
632 struct mvebu_mpp_ctrl_setting *s;
633
634 for (s = m->settings ; s->name ; s++)
635 s->variant = variant;
636 }
637
armada_cp110_pinctrl_probe(struct platform_device * pdev)638 static int armada_cp110_pinctrl_probe(struct platform_device *pdev)
639 {
640 struct mvebu_pinctrl_soc_info *soc;
641 int i;
642
643 if (!pdev->dev.parent)
644 return -ENODEV;
645
646 soc = devm_kzalloc(&pdev->dev,
647 sizeof(struct mvebu_pinctrl_soc_info), GFP_KERNEL);
648 if (!soc)
649 return -ENOMEM;
650
651 soc->variant = (unsigned long)device_get_match_data(&pdev->dev) & 0xff;
652 soc->controls = armada_cp110_mpp_controls;
653 soc->ncontrols = ARRAY_SIZE(armada_cp110_mpp_controls);
654 soc->modes = armada_cp110_mpp_modes;
655 soc->nmodes = ARRAY_SIZE(armada_cp110_mpp_modes);
656 for (i = 0; i < ARRAY_SIZE(armada_cp110_mpp_modes); i++) {
657 struct mvebu_mpp_mode *m = &armada_cp110_mpp_modes[i];
658
659 switch (i) {
660 case 0 ... 31:
661 mvebu_pinctrl_assign_variant(m, (V_ARMADA_7K_8K_CPS |
662 V_CP115_STANDALONE));
663 break;
664 case 32 ... 38:
665 mvebu_pinctrl_assign_variant(m, (V_ARMADA_7K_8K_CPM |
666 V_CP115_STANDALONE));
667 break;
668 case 39 ... 43:
669 mvebu_pinctrl_assign_variant(m, (V_ARMADA_8K_CPM |
670 V_CP115_STANDALONE));
671 break;
672 case 44 ... 62:
673 mvebu_pinctrl_assign_variant(m, (V_ARMADA_7K_8K_CPM |
674 V_CP115_STANDALONE));
675 break;
676 }
677 }
678 pdev->dev.platform_data = soc;
679
680 return mvebu_pinctrl_simple_regmap_probe(pdev, pdev->dev.parent, 0);
681 }
682
683 static struct platform_driver armada_cp110_pinctrl_driver = {
684 .driver = {
685 .name = "armada-cp110-pinctrl",
686 .of_match_table = of_match_ptr(armada_cp110_pinctrl_of_match),
687 },
688 .probe = armada_cp110_pinctrl_probe,
689 };
690
691 builtin_platform_driver(armada_cp110_pinctrl_driver);
692