1 // SPDX-License-Identifier: GPL-2.0-only 2 /* Atlantic Network Driver 3 * 4 * Copyright (C) 2014-2019 aQuantia Corporation 5 * Copyright (C) 2019-2020 Marvell International Ltd. 6 */ 7 8 /* File aq_nic.c: Definition of common code for NIC. */ 9 10 #include "aq_nic.h" 11 #include "aq_ring.h" 12 #include "aq_vec.h" 13 #include "aq_hw.h" 14 #include "aq_pci_func.h" 15 #include "aq_macsec.h" 16 #include "aq_main.h" 17 #include "aq_phy.h" 18 #include "aq_ptp.h" 19 #include "aq_filters.h" 20 21 #include <linux/moduleparam.h> 22 #include <linux/netdevice.h> 23 #include <linux/etherdevice.h> 24 #include <linux/timer.h> 25 #include <linux/cpu.h> 26 #include <linux/ip.h> 27 #include <linux/tcp.h> 28 #include <net/ip.h> 29 #include <net/pkt_cls.h> 30 31 static unsigned int aq_itr = AQ_CFG_INTERRUPT_MODERATION_AUTO; 32 module_param_named(aq_itr, aq_itr, uint, 0644); 33 MODULE_PARM_DESC(aq_itr, "Interrupt throttling mode"); 34 35 static unsigned int aq_itr_tx; 36 module_param_named(aq_itr_tx, aq_itr_tx, uint, 0644); 37 MODULE_PARM_DESC(aq_itr_tx, "TX interrupt throttle rate"); 38 39 static unsigned int aq_itr_rx; 40 module_param_named(aq_itr_rx, aq_itr_rx, uint, 0644); 41 MODULE_PARM_DESC(aq_itr_rx, "RX interrupt throttle rate"); 42 43 static void aq_nic_update_ndev_stats(struct aq_nic_s *self); 44 45 static void aq_nic_rss_init(struct aq_nic_s *self, unsigned int num_rss_queues) 46 { 47 static u8 rss_key[AQ_CFG_RSS_HASHKEY_SIZE] = { 48 0x1e, 0xad, 0x71, 0x87, 0x65, 0xfc, 0x26, 0x7d, 49 0x0d, 0x45, 0x67, 0x74, 0xcd, 0x06, 0x1a, 0x18, 50 0xb6, 0xc1, 0xf0, 0xc7, 0xbb, 0x18, 0xbe, 0xf8, 51 0x19, 0x13, 0x4b, 0xa9, 0xd0, 0x3e, 0xfe, 0x70, 52 0x25, 0x03, 0xab, 0x50, 0x6a, 0x8b, 0x82, 0x0c 53 }; 54 struct aq_nic_cfg_s *cfg = &self->aq_nic_cfg; 55 struct aq_rss_parameters *rss_params; 56 int i = 0; 57 58 rss_params = &cfg->aq_rss; 59 60 rss_params->hash_secret_key_size = sizeof(rss_key); 61 memcpy(rss_params->hash_secret_key, rss_key, sizeof(rss_key)); 62 rss_params->indirection_table_size = AQ_CFG_RSS_INDIRECTION_TABLE_MAX; 63 64 for (i = rss_params->indirection_table_size; i--;) 65 rss_params->indirection_table[i] = i & (num_rss_queues - 1); 66 } 67 68 /* Recalculate the number of vectors */ 69 static void aq_nic_cfg_update_num_vecs(struct aq_nic_s *self) 70 { 71 struct aq_nic_cfg_s *cfg = &self->aq_nic_cfg; 72 73 cfg->vecs = min(cfg->aq_hw_caps->vecs, AQ_CFG_VECS_DEF); 74 cfg->vecs = min(cfg->vecs, num_online_cpus()); 75 if (self->irqvecs > AQ_HW_SERVICE_IRQS) 76 cfg->vecs = min(cfg->vecs, self->irqvecs - AQ_HW_SERVICE_IRQS); 77 /* cfg->vecs should be power of 2 for RSS */ 78 cfg->vecs = rounddown_pow_of_two(cfg->vecs); 79 80 if (ATL_HW_IS_CHIP_FEATURE(self->aq_hw, ANTIGUA)) { 81 if (cfg->tcs > 2) 82 cfg->vecs = min(cfg->vecs, 4U); 83 } 84 85 if (cfg->vecs <= 4) 86 cfg->tc_mode = AQ_TC_MODE_8TCS; 87 else 88 cfg->tc_mode = AQ_TC_MODE_4TCS; 89 90 /*rss rings */ 91 cfg->num_rss_queues = min(cfg->vecs, AQ_CFG_NUM_RSS_QUEUES_DEF); 92 aq_nic_rss_init(self, cfg->num_rss_queues); 93 } 94 95 /* Checks hw_caps and 'corrects' aq_nic_cfg in runtime */ 96 void aq_nic_cfg_start(struct aq_nic_s *self) 97 { 98 struct aq_nic_cfg_s *cfg = &self->aq_nic_cfg; 99 int i; 100 101 cfg->tcs = AQ_CFG_TCS_DEF; 102 103 cfg->is_polling = AQ_CFG_IS_POLLING_DEF; 104 105 cfg->itr = aq_itr; 106 cfg->tx_itr = aq_itr_tx; 107 cfg->rx_itr = aq_itr_rx; 108 109 cfg->rxpageorder = AQ_CFG_RX_PAGEORDER; 110 cfg->is_rss = AQ_CFG_IS_RSS_DEF; 111 cfg->aq_rss.base_cpu_number = AQ_CFG_RSS_BASE_CPU_NUM_DEF; 112 cfg->fc.req = AQ_CFG_FC_MODE; 113 cfg->wol = AQ_CFG_WOL_MODES; 114 115 cfg->mtu = AQ_CFG_MTU_DEF; 116 cfg->link_speed_msk = AQ_CFG_SPEED_MSK; 117 cfg->is_autoneg = AQ_CFG_IS_AUTONEG_DEF; 118 119 cfg->is_lro = AQ_CFG_IS_LRO_DEF; 120 cfg->is_ptp = true; 121 122 /*descriptors */ 123 cfg->rxds = min(cfg->aq_hw_caps->rxds_max, AQ_CFG_RXDS_DEF); 124 cfg->txds = min(cfg->aq_hw_caps->txds_max, AQ_CFG_TXDS_DEF); 125 126 aq_nic_cfg_update_num_vecs(self); 127 128 cfg->irq_type = aq_pci_func_get_irq_type(self); 129 130 if ((cfg->irq_type == AQ_HW_IRQ_INTX) || 131 (cfg->aq_hw_caps->vecs == 1U) || 132 (cfg->vecs == 1U)) { 133 cfg->is_rss = 0U; 134 cfg->vecs = 1U; 135 } 136 137 /* Check if we have enough vectors allocated for 138 * link status IRQ. If no - we'll know link state from 139 * slower service task. 140 */ 141 if (AQ_HW_SERVICE_IRQS > 0 && cfg->vecs + 1 <= self->irqvecs) 142 cfg->link_irq_vec = cfg->vecs; 143 else 144 cfg->link_irq_vec = 0; 145 146 cfg->link_speed_msk &= cfg->aq_hw_caps->link_speed_msk; 147 cfg->features = cfg->aq_hw_caps->hw_features; 148 cfg->is_vlan_rx_strip = !!(cfg->features & NETIF_F_HW_VLAN_CTAG_RX); 149 cfg->is_vlan_tx_insert = !!(cfg->features & NETIF_F_HW_VLAN_CTAG_TX); 150 cfg->is_vlan_force_promisc = true; 151 152 for (i = 0; i < sizeof(cfg->prio_tc_map); i++) 153 cfg->prio_tc_map[i] = cfg->tcs * i / 8; 154 } 155 156 static int aq_nic_update_link_status(struct aq_nic_s *self) 157 { 158 int err = self->aq_fw_ops->update_link_status(self->aq_hw); 159 u32 fc = 0; 160 161 if (err) 162 return err; 163 164 if (self->aq_fw_ops->get_flow_control) 165 self->aq_fw_ops->get_flow_control(self->aq_hw, &fc); 166 self->aq_nic_cfg.fc.cur = fc; 167 168 if (self->link_status.mbps != self->aq_hw->aq_link_status.mbps) { 169 netdev_info(self->ndev, "%s: link change old %d new %d\n", 170 AQ_CFG_DRV_NAME, self->link_status.mbps, 171 self->aq_hw->aq_link_status.mbps); 172 aq_nic_update_interrupt_moderation_settings(self); 173 174 if (self->aq_ptp) { 175 aq_ptp_clock_init(self); 176 aq_ptp_tm_offset_set(self, 177 self->aq_hw->aq_link_status.mbps); 178 aq_ptp_link_change(self); 179 } 180 181 /* Driver has to update flow control settings on RX block 182 * on any link event. 183 * We should query FW whether it negotiated FC. 184 */ 185 if (self->aq_hw_ops->hw_set_fc) 186 self->aq_hw_ops->hw_set_fc(self->aq_hw, fc, 0); 187 } 188 189 self->link_status = self->aq_hw->aq_link_status; 190 if (!netif_carrier_ok(self->ndev) && self->link_status.mbps) { 191 aq_utils_obj_set(&self->flags, 192 AQ_NIC_FLAG_STARTED); 193 aq_utils_obj_clear(&self->flags, 194 AQ_NIC_LINK_DOWN); 195 netif_carrier_on(self->ndev); 196 #if IS_ENABLED(CONFIG_MACSEC) 197 aq_macsec_enable(self); 198 #endif 199 if (self->aq_hw_ops->hw_tc_rate_limit_set) 200 self->aq_hw_ops->hw_tc_rate_limit_set(self->aq_hw); 201 202 netif_tx_wake_all_queues(self->ndev); 203 } 204 if (netif_carrier_ok(self->ndev) && !self->link_status.mbps) { 205 netif_carrier_off(self->ndev); 206 netif_tx_disable(self->ndev); 207 aq_utils_obj_set(&self->flags, AQ_NIC_LINK_DOWN); 208 } 209 210 return 0; 211 } 212 213 static irqreturn_t aq_linkstate_threaded_isr(int irq, void *private) 214 { 215 struct aq_nic_s *self = private; 216 217 if (!self) 218 return IRQ_NONE; 219 220 aq_nic_update_link_status(self); 221 222 self->aq_hw_ops->hw_irq_enable(self->aq_hw, 223 BIT(self->aq_nic_cfg.link_irq_vec)); 224 225 return IRQ_HANDLED; 226 } 227 228 static void aq_nic_service_task(struct work_struct *work) 229 { 230 struct aq_nic_s *self = container_of(work, struct aq_nic_s, 231 service_task); 232 int err; 233 234 aq_ptp_service_task(self); 235 236 if (aq_utils_obj_test(&self->flags, AQ_NIC_FLAGS_IS_NOT_READY)) 237 return; 238 239 err = aq_nic_update_link_status(self); 240 if (err) 241 return; 242 243 #if IS_ENABLED(CONFIG_MACSEC) 244 aq_macsec_work(self); 245 #endif 246 247 mutex_lock(&self->fwreq_mutex); 248 if (self->aq_fw_ops->update_stats) 249 self->aq_fw_ops->update_stats(self->aq_hw); 250 mutex_unlock(&self->fwreq_mutex); 251 252 aq_nic_update_ndev_stats(self); 253 } 254 255 static void aq_nic_service_timer_cb(struct timer_list *t) 256 { 257 struct aq_nic_s *self = timer_container_of(self, t, service_timer); 258 259 mod_timer(&self->service_timer, 260 jiffies + AQ_CFG_SERVICE_TIMER_INTERVAL); 261 262 aq_ndev_schedule_work(&self->service_task); 263 } 264 265 static void aq_nic_polling_timer_cb(struct timer_list *t) 266 { 267 struct aq_nic_s *self = timer_container_of(self, t, polling_timer); 268 unsigned int i = 0U; 269 270 for (i = 0U; self->aq_vecs > i; ++i) 271 aq_vec_isr(i, (void *)self->aq_vec[i]); 272 273 mod_timer(&self->polling_timer, jiffies + 274 AQ_CFG_POLLING_TIMER_INTERVAL); 275 } 276 277 static int aq_nic_hw_prepare(struct aq_nic_s *self) 278 { 279 int err = 0; 280 281 err = self->aq_hw_ops->hw_soft_reset(self->aq_hw); 282 if (err) 283 goto exit; 284 285 err = self->aq_hw_ops->hw_prepare(self->aq_hw, &self->aq_fw_ops); 286 287 exit: 288 return err; 289 } 290 291 static bool aq_nic_is_valid_ether_addr(const u8 *addr) 292 { 293 /* Some engineering samples of Aquantia NICs are provisioned with a 294 * partially populated MAC, which is still invalid. 295 */ 296 return !(addr[0] == 0 && addr[1] == 0 && addr[2] == 0); 297 } 298 299 int aq_nic_ndev_register(struct aq_nic_s *self) 300 { 301 u8 addr[ETH_ALEN]; 302 int err = 0; 303 304 if (!self->ndev) { 305 err = -EINVAL; 306 goto err_exit; 307 } 308 309 err = aq_nic_hw_prepare(self); 310 if (err) 311 goto err_exit; 312 313 #if IS_ENABLED(CONFIG_MACSEC) 314 aq_macsec_init(self); 315 #endif 316 317 if (platform_get_ethdev_address(&self->pdev->dev, self->ndev) != 0) { 318 // If DT has none or an invalid one, ask device for MAC address 319 mutex_lock(&self->fwreq_mutex); 320 err = self->aq_fw_ops->get_mac_permanent(self->aq_hw, addr); 321 mutex_unlock(&self->fwreq_mutex); 322 323 if (err) 324 goto err_exit; 325 326 if (is_valid_ether_addr(addr) && 327 aq_nic_is_valid_ether_addr(addr)) { 328 eth_hw_addr_set(self->ndev, addr); 329 } else { 330 netdev_warn(self->ndev, "MAC is invalid, will use random."); 331 eth_hw_addr_random(self->ndev); 332 } 333 } 334 335 #if defined(AQ_CFG_MAC_ADDR_PERMANENT) 336 { 337 static u8 mac_addr_permanent[] = AQ_CFG_MAC_ADDR_PERMANENT; 338 339 eth_hw_addr_set(self->ndev, mac_addr_permanent); 340 } 341 #endif 342 343 for (self->aq_vecs = 0; self->aq_vecs < aq_nic_get_cfg(self)->vecs; 344 self->aq_vecs++) { 345 self->aq_vec[self->aq_vecs] = 346 aq_vec_alloc(self, self->aq_vecs, aq_nic_get_cfg(self)); 347 if (!self->aq_vec[self->aq_vecs]) { 348 err = -ENOMEM; 349 goto err_exit; 350 } 351 } 352 353 netif_carrier_off(self->ndev); 354 355 netif_tx_disable(self->ndev); 356 357 err = register_netdev(self->ndev); 358 if (err) 359 goto err_exit; 360 361 err_exit: 362 #if IS_ENABLED(CONFIG_MACSEC) 363 if (err) 364 aq_macsec_free(self); 365 #endif 366 return err; 367 } 368 369 void aq_nic_ndev_init(struct aq_nic_s *self) 370 { 371 const struct aq_hw_caps_s *aq_hw_caps = self->aq_nic_cfg.aq_hw_caps; 372 struct aq_nic_cfg_s *aq_nic_cfg = &self->aq_nic_cfg; 373 374 self->ndev->hw_features |= aq_hw_caps->hw_features; 375 self->ndev->features = aq_hw_caps->hw_features; 376 self->ndev->vlan_features |= NETIF_F_HW_CSUM | NETIF_F_RXCSUM | 377 NETIF_F_RXHASH | NETIF_F_SG | 378 NETIF_F_LRO | NETIF_F_TSO | NETIF_F_TSO6; 379 self->ndev->gso_partial_features = NETIF_F_GSO_UDP_L4; 380 self->ndev->priv_flags = aq_hw_caps->hw_priv_flags; 381 self->ndev->priv_flags |= IFF_LIVE_ADDR_CHANGE; 382 383 self->msg_enable = NETIF_MSG_DRV | NETIF_MSG_LINK; 384 self->ndev->mtu = aq_nic_cfg->mtu - ETH_HLEN; 385 self->ndev->max_mtu = aq_hw_caps->mtu - ETH_FCS_LEN - ETH_HLEN; 386 387 self->ndev->xdp_features = NETDEV_XDP_ACT_BASIC | 388 NETDEV_XDP_ACT_REDIRECT | 389 NETDEV_XDP_ACT_NDO_XMIT | 390 NETDEV_XDP_ACT_RX_SG | 391 NETDEV_XDP_ACT_NDO_XMIT_SG; 392 } 393 394 void aq_nic_set_tx_ring(struct aq_nic_s *self, unsigned int idx, 395 struct aq_ring_s *ring) 396 { 397 self->aq_ring_tx[idx] = ring; 398 } 399 400 struct net_device *aq_nic_get_ndev(struct aq_nic_s *self) 401 { 402 return self->ndev; 403 } 404 405 int aq_nic_init(struct aq_nic_s *self) 406 { 407 struct aq_vec_s *aq_vec = NULL; 408 unsigned int i = 0U; 409 int err = 0; 410 411 self->power_state = AQ_HW_POWER_STATE_D0; 412 mutex_lock(&self->fwreq_mutex); 413 err = self->aq_hw_ops->hw_reset(self->aq_hw); 414 mutex_unlock(&self->fwreq_mutex); 415 if (err < 0) 416 goto err_exit; 417 /* Restore default settings */ 418 aq_nic_set_downshift(self, self->aq_nic_cfg.downshift_counter); 419 aq_nic_set_media_detect(self, self->aq_nic_cfg.is_media_detect ? 420 AQ_HW_MEDIA_DETECT_CNT : 0); 421 422 err = self->aq_hw_ops->hw_init(self->aq_hw, 423 aq_nic_get_ndev(self)->dev_addr); 424 if (err < 0) 425 goto err_exit; 426 427 if (ATL_HW_IS_CHIP_FEATURE(self->aq_hw, ATLANTIC) && 428 self->aq_nic_cfg.aq_hw_caps->media_type == AQ_HW_MEDIA_TYPE_TP) { 429 self->aq_hw->phy_id = HW_ATL_PHY_ID_MAX; 430 err = aq_phy_init(self->aq_hw); 431 432 /* Disable the PTP on NICs where it's known to cause datapath 433 * problems. 434 * Ideally this should have been done by PHY provisioning, but 435 * many units have been shipped with enabled PTP block already. 436 */ 437 if (self->aq_nic_cfg.aq_hw_caps->quirks & AQ_NIC_QUIRK_BAD_PTP) 438 if (self->aq_hw->phy_id != HW_ATL_PHY_ID_MAX) 439 aq_phy_disable_ptp(self->aq_hw); 440 } 441 442 for (i = 0U; i < self->aq_vecs; i++) { 443 aq_vec = self->aq_vec[i]; 444 err = aq_vec_ring_alloc(aq_vec, self, i, 445 aq_nic_get_cfg(self)); 446 if (err) 447 goto err_exit; 448 449 aq_vec_init(aq_vec, self->aq_hw_ops, self->aq_hw); 450 } 451 452 if (aq_nic_get_cfg(self)->is_ptp) { 453 err = aq_ptp_init(self, self->irqvecs - 1); 454 if (err < 0) 455 goto err_exit; 456 457 err = aq_ptp_ring_alloc(self); 458 if (err < 0) 459 goto err_exit; 460 461 err = aq_ptp_ring_init(self); 462 if (err < 0) 463 goto err_exit; 464 } 465 466 netif_carrier_off(self->ndev); 467 468 err_exit: 469 return err; 470 } 471 472 int aq_nic_start(struct aq_nic_s *self) 473 { 474 struct aq_vec_s *aq_vec = NULL; 475 struct aq_nic_cfg_s *cfg; 476 unsigned int i = 0U; 477 int err = 0; 478 479 cfg = aq_nic_get_cfg(self); 480 481 err = self->aq_hw_ops->hw_multicast_list_set(self->aq_hw, 482 self->mc_list.ar, 483 self->mc_list.count); 484 if (err < 0) 485 goto err_exit; 486 487 err = self->aq_hw_ops->hw_packet_filter_set(self->aq_hw, 488 self->packet_filter); 489 if (err < 0) 490 goto err_exit; 491 492 for (i = 0U; self->aq_vecs > i; ++i) { 493 aq_vec = self->aq_vec[i]; 494 err = aq_vec_start(aq_vec); 495 if (err < 0) 496 goto err_exit; 497 } 498 499 err = aq_ptp_ring_start(self); 500 if (err < 0) 501 goto err_exit; 502 503 aq_nic_set_loopback(self); 504 505 err = self->aq_hw_ops->hw_start(self->aq_hw); 506 if (err < 0) 507 goto err_exit; 508 509 err = aq_nic_update_interrupt_moderation_settings(self); 510 if (err) 511 goto err_exit; 512 513 INIT_WORK(&self->service_task, aq_nic_service_task); 514 515 timer_setup(&self->service_timer, aq_nic_service_timer_cb, 0); 516 aq_nic_service_timer_cb(&self->service_timer); 517 518 if (cfg->is_polling) { 519 timer_setup(&self->polling_timer, aq_nic_polling_timer_cb, 0); 520 mod_timer(&self->polling_timer, jiffies + 521 AQ_CFG_POLLING_TIMER_INTERVAL); 522 } else { 523 for (i = 0U; self->aq_vecs > i; ++i) { 524 aq_vec = self->aq_vec[i]; 525 err = aq_pci_func_alloc_irq(self, i, self->ndev->name, 526 aq_vec_isr, aq_vec, 527 aq_vec_get_affinity_mask(aq_vec)); 528 if (err < 0) 529 goto err_exit; 530 } 531 532 err = aq_ptp_irq_alloc(self); 533 if (err < 0) 534 goto err_exit; 535 536 if (cfg->link_irq_vec) { 537 int irqvec = pci_irq_vector(self->pdev, 538 cfg->link_irq_vec); 539 err = request_threaded_irq(irqvec, NULL, 540 aq_linkstate_threaded_isr, 541 IRQF_SHARED | IRQF_ONESHOT, 542 self->ndev->name, self); 543 if (err < 0) 544 goto err_exit; 545 self->msix_entry_mask |= (1 << cfg->link_irq_vec); 546 } 547 548 err = self->aq_hw_ops->hw_irq_enable(self->aq_hw, 549 AQ_CFG_IRQ_MASK); 550 if (err < 0) 551 goto err_exit; 552 } 553 554 err = netif_set_real_num_tx_queues(self->ndev, 555 self->aq_vecs * cfg->tcs); 556 if (err < 0) 557 goto err_exit; 558 559 err = netif_set_real_num_rx_queues(self->ndev, 560 self->aq_vecs * cfg->tcs); 561 if (err < 0) 562 goto err_exit; 563 564 for (i = 0; i < cfg->tcs; i++) { 565 u16 offset = self->aq_vecs * i; 566 567 netdev_set_tc_queue(self->ndev, i, self->aq_vecs, offset); 568 } 569 netif_tx_start_all_queues(self->ndev); 570 571 err_exit: 572 return err; 573 } 574 575 static unsigned int aq_nic_map_xdp(struct aq_nic_s *self, 576 struct xdp_frame *xdpf, 577 struct aq_ring_s *ring) 578 { 579 struct device *dev = aq_nic_get_dev(self); 580 struct aq_ring_buff_s *first = NULL; 581 unsigned int dx = ring->sw_tail; 582 struct aq_ring_buff_s *dx_buff; 583 struct skb_shared_info *sinfo; 584 unsigned int frag_count = 0U; 585 unsigned int nr_frags = 0U; 586 unsigned int ret = 0U; 587 u16 total_len; 588 589 dx_buff = &ring->buff_ring[dx]; 590 dx_buff->flags = 0U; 591 592 sinfo = xdp_get_shared_info_from_frame(xdpf); 593 total_len = xdpf->len; 594 dx_buff->len = total_len; 595 if (xdp_frame_has_frags(xdpf)) { 596 nr_frags = sinfo->nr_frags; 597 total_len += sinfo->xdp_frags_size; 598 } 599 dx_buff->pa = dma_map_single(dev, xdpf->data, dx_buff->len, 600 DMA_TO_DEVICE); 601 602 if (unlikely(dma_mapping_error(dev, dx_buff->pa))) 603 goto exit; 604 605 first = dx_buff; 606 dx_buff->len_pkt = total_len; 607 dx_buff->is_sop = 1U; 608 dx_buff->is_mapped = 1U; 609 ++ret; 610 611 for (; nr_frags--; ++frag_count) { 612 skb_frag_t *frag = &sinfo->frags[frag_count]; 613 unsigned int frag_len = skb_frag_size(frag); 614 unsigned int buff_offset = 0U; 615 unsigned int buff_size = 0U; 616 dma_addr_t frag_pa; 617 618 while (frag_len) { 619 if (frag_len > AQ_CFG_TX_FRAME_MAX) 620 buff_size = AQ_CFG_TX_FRAME_MAX; 621 else 622 buff_size = frag_len; 623 624 frag_pa = skb_frag_dma_map(dev, frag, buff_offset, 625 buff_size, DMA_TO_DEVICE); 626 627 if (unlikely(dma_mapping_error(dev, frag_pa))) 628 goto mapping_error; 629 630 dx = aq_ring_next_dx(ring, dx); 631 dx_buff = &ring->buff_ring[dx]; 632 633 dx_buff->flags = 0U; 634 dx_buff->len = buff_size; 635 dx_buff->pa = frag_pa; 636 dx_buff->is_mapped = 1U; 637 dx_buff->eop_index = 0xffffU; 638 639 frag_len -= buff_size; 640 buff_offset += buff_size; 641 642 ++ret; 643 } 644 } 645 646 first->eop_index = dx; 647 dx_buff->is_eop = 1U; 648 dx_buff->skb = NULL; 649 dx_buff->xdpf = xdpf; 650 goto exit; 651 652 mapping_error: 653 for (dx = ring->sw_tail; 654 ret > 0; 655 --ret, dx = aq_ring_next_dx(ring, dx)) { 656 dx_buff = &ring->buff_ring[dx]; 657 658 if (!dx_buff->pa) 659 continue; 660 if (unlikely(dx_buff->is_sop)) 661 dma_unmap_single(dev, dx_buff->pa, dx_buff->len, 662 DMA_TO_DEVICE); 663 else 664 dma_unmap_page(dev, dx_buff->pa, dx_buff->len, 665 DMA_TO_DEVICE); 666 } 667 668 exit: 669 return ret; 670 } 671 672 unsigned int aq_nic_map_skb(struct aq_nic_s *self, struct sk_buff *skb, 673 struct aq_ring_s *ring) 674 { 675 unsigned int nr_frags = skb_shinfo(skb)->nr_frags; 676 struct aq_nic_cfg_s *cfg = aq_nic_get_cfg(self); 677 struct device *dev = aq_nic_get_dev(self); 678 struct aq_ring_buff_s *first = NULL; 679 u8 ipver = ip_hdr(skb)->version; 680 struct aq_ring_buff_s *dx_buff; 681 bool need_context_tag = false; 682 unsigned int frag_count = 0U; 683 unsigned int ret = 0U; 684 unsigned int dx; 685 u8 l4proto = 0; 686 687 if (ipver == 4) 688 l4proto = ip_hdr(skb)->protocol; 689 else if (ipver == 6) 690 l4proto = ipv6_hdr(skb)->nexthdr; 691 692 dx = ring->sw_tail; 693 dx_buff = &ring->buff_ring[dx]; 694 dx_buff->flags = 0U; 695 696 if (unlikely(skb_is_gso(skb))) { 697 dx_buff->mss = skb_shinfo(skb)->gso_size; 698 if (l4proto == IPPROTO_TCP) { 699 dx_buff->is_gso_tcp = 1U; 700 dx_buff->len_l4 = tcp_hdrlen(skb); 701 } else if (l4proto == IPPROTO_UDP) { 702 dx_buff->is_gso_udp = 1U; 703 dx_buff->len_l4 = sizeof(struct udphdr); 704 } else { 705 WARN_ONCE(true, "Bad GSO mode"); 706 goto exit; 707 } 708 dx_buff->len_pkt = skb->len; 709 dx_buff->len_l2 = ETH_HLEN; 710 dx_buff->len_l3 = skb_network_header_len(skb); 711 dx_buff->eop_index = 0xffffU; 712 dx_buff->is_ipv6 = (ipver == 6); 713 need_context_tag = true; 714 } 715 716 if (cfg->is_vlan_tx_insert && skb_vlan_tag_present(skb)) { 717 dx_buff->vlan_tx_tag = skb_vlan_tag_get(skb); 718 dx_buff->len_pkt = skb->len; 719 dx_buff->is_vlan = 1U; 720 need_context_tag = true; 721 } 722 723 if (need_context_tag) { 724 dx = aq_ring_next_dx(ring, dx); 725 dx_buff = &ring->buff_ring[dx]; 726 dx_buff->flags = 0U; 727 ++ret; 728 } 729 730 dx_buff->len = skb_headlen(skb); 731 dx_buff->pa = dma_map_single(dev, 732 skb->data, 733 dx_buff->len, 734 DMA_TO_DEVICE); 735 736 if (unlikely(dma_mapping_error(dev, dx_buff->pa))) { 737 ret = 0; 738 goto exit; 739 } 740 741 first = dx_buff; 742 dx_buff->len_pkt = skb->len; 743 dx_buff->is_sop = 1U; 744 dx_buff->is_mapped = 1U; 745 ++ret; 746 747 if (skb->ip_summed == CHECKSUM_PARTIAL) { 748 dx_buff->is_ip_cso = (htons(ETH_P_IP) == skb->protocol); 749 dx_buff->is_tcp_cso = (l4proto == IPPROTO_TCP); 750 dx_buff->is_udp_cso = (l4proto == IPPROTO_UDP); 751 } 752 753 for (; nr_frags--; ++frag_count) { 754 unsigned int frag_len = 0U; 755 unsigned int buff_offset = 0U; 756 unsigned int buff_size = 0U; 757 dma_addr_t frag_pa; 758 skb_frag_t *frag = &skb_shinfo(skb)->frags[frag_count]; 759 760 frag_len = skb_frag_size(frag); 761 762 while (frag_len) { 763 if (frag_len > AQ_CFG_TX_FRAME_MAX) 764 buff_size = AQ_CFG_TX_FRAME_MAX; 765 else 766 buff_size = frag_len; 767 768 frag_pa = skb_frag_dma_map(dev, 769 frag, 770 buff_offset, 771 buff_size, 772 DMA_TO_DEVICE); 773 774 if (unlikely(dma_mapping_error(dev, 775 frag_pa))) 776 goto mapping_error; 777 778 dx = aq_ring_next_dx(ring, dx); 779 dx_buff = &ring->buff_ring[dx]; 780 781 dx_buff->flags = 0U; 782 dx_buff->len = buff_size; 783 dx_buff->pa = frag_pa; 784 dx_buff->is_mapped = 1U; 785 dx_buff->eop_index = 0xffffU; 786 787 frag_len -= buff_size; 788 buff_offset += buff_size; 789 790 ++ret; 791 } 792 } 793 794 first->eop_index = dx; 795 dx_buff->is_eop = 1U; 796 dx_buff->skb = skb; 797 dx_buff->xdpf = NULL; 798 goto exit; 799 800 mapping_error: 801 for (dx = ring->sw_tail; 802 ret > 0; 803 --ret, dx = aq_ring_next_dx(ring, dx)) { 804 dx_buff = &ring->buff_ring[dx]; 805 806 if (!(dx_buff->is_gso_tcp || dx_buff->is_gso_udp) && 807 !dx_buff->is_vlan && dx_buff->pa) { 808 if (unlikely(dx_buff->is_sop)) { 809 dma_unmap_single(dev, 810 dx_buff->pa, 811 dx_buff->len, 812 DMA_TO_DEVICE); 813 } else { 814 dma_unmap_page(dev, 815 dx_buff->pa, 816 dx_buff->len, 817 DMA_TO_DEVICE); 818 } 819 } 820 } 821 822 exit: 823 return ret; 824 } 825 826 int aq_nic_xmit_xdpf(struct aq_nic_s *aq_nic, struct aq_ring_s *tx_ring, 827 struct xdp_frame *xdpf) 828 { 829 u16 queue_index = AQ_NIC_RING2QMAP(aq_nic, tx_ring->idx); 830 struct net_device *ndev = aq_nic_get_ndev(aq_nic); 831 struct skb_shared_info *sinfo; 832 int cpu = smp_processor_id(); 833 int err = NETDEV_TX_BUSY; 834 struct netdev_queue *nq; 835 unsigned int frags = 1; 836 837 if (xdp_frame_has_frags(xdpf)) { 838 sinfo = xdp_get_shared_info_from_frame(xdpf); 839 frags += sinfo->nr_frags; 840 } 841 842 if (frags > AQ_CFG_SKB_FRAGS_MAX) 843 return err; 844 845 nq = netdev_get_tx_queue(ndev, tx_ring->idx); 846 __netif_tx_lock(nq, cpu); 847 848 aq_ring_update_queue_state(tx_ring); 849 850 /* Above status update may stop the queue. Check this. */ 851 if (__netif_subqueue_stopped(aq_nic_get_ndev(aq_nic), queue_index)) 852 goto out; 853 854 frags = aq_nic_map_xdp(aq_nic, xdpf, tx_ring); 855 if (likely(frags)) 856 err = aq_nic->aq_hw_ops->hw_ring_tx_xmit(aq_nic->aq_hw, tx_ring, 857 frags); 858 out: 859 __netif_tx_unlock(nq); 860 861 return err; 862 } 863 864 int aq_nic_xmit(struct aq_nic_s *self, struct sk_buff *skb) 865 { 866 struct aq_nic_cfg_s *cfg = aq_nic_get_cfg(self); 867 unsigned int vec = skb->queue_mapping % cfg->vecs; 868 unsigned int tc = skb->queue_mapping / cfg->vecs; 869 struct aq_ring_s *ring = NULL; 870 unsigned int frags = 0U; 871 int err = NETDEV_TX_OK; 872 873 frags = skb_shinfo(skb)->nr_frags + 1; 874 875 ring = self->aq_ring_tx[AQ_NIC_CFG_TCVEC2RING(cfg, tc, vec)]; 876 877 if (frags > AQ_CFG_SKB_FRAGS_MAX) { 878 dev_kfree_skb_any(skb); 879 goto err_exit; 880 } 881 882 aq_ring_update_queue_state(ring); 883 884 if (cfg->priv_flags & BIT(AQ_HW_LOOPBACK_DMA_NET)) { 885 err = NETDEV_TX_BUSY; 886 goto err_exit; 887 } 888 889 /* Above status update may stop the queue. Check this. */ 890 if (__netif_subqueue_stopped(self->ndev, 891 AQ_NIC_RING2QMAP(self, ring->idx))) { 892 err = NETDEV_TX_BUSY; 893 goto err_exit; 894 } 895 896 frags = aq_nic_map_skb(self, skb, ring); 897 898 skb_tx_timestamp(skb); 899 900 if (likely(frags)) { 901 err = self->aq_hw_ops->hw_ring_tx_xmit(self->aq_hw, 902 ring, frags); 903 } else { 904 err = NETDEV_TX_BUSY; 905 } 906 907 err_exit: 908 return err; 909 } 910 911 int aq_nic_update_interrupt_moderation_settings(struct aq_nic_s *self) 912 { 913 return self->aq_hw_ops->hw_interrupt_moderation_set(self->aq_hw); 914 } 915 916 int aq_nic_set_packet_filter(struct aq_nic_s *self, unsigned int flags) 917 { 918 int err = 0; 919 920 err = self->aq_hw_ops->hw_packet_filter_set(self->aq_hw, flags); 921 if (err < 0) 922 goto err_exit; 923 924 self->packet_filter = flags; 925 926 err_exit: 927 return err; 928 } 929 930 int aq_nic_set_multicast_list(struct aq_nic_s *self, struct net_device *ndev) 931 { 932 const struct aq_hw_ops *hw_ops = self->aq_hw_ops; 933 struct aq_nic_cfg_s *cfg = &self->aq_nic_cfg; 934 unsigned int packet_filter = ndev->flags; 935 struct netdev_hw_addr *ha = NULL; 936 unsigned int i = 0U; 937 int err = 0; 938 939 self->mc_list.count = 0; 940 if (netdev_uc_count(ndev) > AQ_HW_MULTICAST_ADDRESS_MAX) { 941 packet_filter |= IFF_PROMISC; 942 } else { 943 netdev_for_each_uc_addr(ha, ndev) { 944 ether_addr_copy(self->mc_list.ar[i++], ha->addr); 945 } 946 } 947 948 cfg->is_mc_list_enabled = !!(packet_filter & IFF_MULTICAST); 949 if (cfg->is_mc_list_enabled) { 950 if (i + netdev_mc_count(ndev) > AQ_HW_MULTICAST_ADDRESS_MAX) { 951 packet_filter |= IFF_ALLMULTI; 952 } else { 953 netdev_for_each_mc_addr(ha, ndev) { 954 ether_addr_copy(self->mc_list.ar[i++], 955 ha->addr); 956 } 957 } 958 } 959 960 if (i > 0 && i <= AQ_HW_MULTICAST_ADDRESS_MAX) { 961 self->mc_list.count = i; 962 err = hw_ops->hw_multicast_list_set(self->aq_hw, 963 self->mc_list.ar, 964 self->mc_list.count); 965 if (err < 0) 966 return err; 967 } 968 969 return aq_nic_set_packet_filter(self, packet_filter); 970 } 971 972 int aq_nic_set_mtu(struct aq_nic_s *self, int new_mtu) 973 { 974 self->aq_nic_cfg.mtu = new_mtu; 975 976 return 0; 977 } 978 979 int aq_nic_set_mac(struct aq_nic_s *self, struct net_device *ndev) 980 { 981 return self->aq_hw_ops->hw_set_mac_address(self->aq_hw, ndev->dev_addr); 982 } 983 984 unsigned int aq_nic_get_link_speed(struct aq_nic_s *self) 985 { 986 return self->link_status.mbps; 987 } 988 989 int aq_nic_get_regs(struct aq_nic_s *self, struct ethtool_regs *regs, void *p) 990 { 991 u32 *regs_buff = p; 992 int err = 0; 993 994 if (unlikely(!self->aq_hw_ops->hw_get_regs)) 995 return -EOPNOTSUPP; 996 997 regs->version = 1; 998 999 err = self->aq_hw_ops->hw_get_regs(self->aq_hw, 1000 self->aq_nic_cfg.aq_hw_caps, 1001 regs_buff); 1002 if (err < 0) 1003 goto err_exit; 1004 1005 err_exit: 1006 return err; 1007 } 1008 1009 int aq_nic_get_regs_count(struct aq_nic_s *self) 1010 { 1011 if (unlikely(!self->aq_hw_ops->hw_get_regs)) 1012 return 0; 1013 1014 return self->aq_nic_cfg.aq_hw_caps->mac_regs_count; 1015 } 1016 1017 u64 *aq_nic_get_stats(struct aq_nic_s *self, u64 *data) 1018 { 1019 struct aq_stats_s *stats; 1020 unsigned int count = 0U; 1021 unsigned int i = 0U; 1022 unsigned int tc; 1023 1024 if (self->aq_fw_ops->update_stats) { 1025 mutex_lock(&self->fwreq_mutex); 1026 self->aq_fw_ops->update_stats(self->aq_hw); 1027 mutex_unlock(&self->fwreq_mutex); 1028 } 1029 stats = self->aq_hw_ops->hw_get_hw_stats(self->aq_hw); 1030 1031 if (!stats) 1032 goto err_exit; 1033 1034 data[i] = stats->uprc + stats->mprc + stats->bprc; 1035 data[++i] = stats->uprc; 1036 data[++i] = stats->mprc; 1037 data[++i] = stats->bprc; 1038 data[++i] = stats->erpt; 1039 data[++i] = stats->uptc + stats->mptc + stats->bptc; 1040 data[++i] = stats->uptc; 1041 data[++i] = stats->mptc; 1042 data[++i] = stats->bptc; 1043 data[++i] = stats->ubrc; 1044 data[++i] = stats->ubtc; 1045 data[++i] = stats->mbrc; 1046 data[++i] = stats->mbtc; 1047 data[++i] = stats->bbrc; 1048 data[++i] = stats->bbtc; 1049 if (stats->brc) 1050 data[++i] = stats->brc; 1051 else 1052 data[++i] = stats->ubrc + stats->mbrc + stats->bbrc; 1053 if (stats->btc) 1054 data[++i] = stats->btc; 1055 else 1056 data[++i] = stats->ubtc + stats->mbtc + stats->bbtc; 1057 data[++i] = stats->dma_pkt_rc; 1058 data[++i] = stats->dma_pkt_tc; 1059 data[++i] = stats->dma_oct_rc; 1060 data[++i] = stats->dma_oct_tc; 1061 data[++i] = stats->dpc; 1062 1063 i++; 1064 1065 data += i; 1066 1067 for (tc = 0U; tc < self->aq_nic_cfg.tcs; tc++) { 1068 for (i = 0U; self->aq_vecs > i; ++i) { 1069 if (!self->aq_vec[i]) 1070 break; 1071 data += count; 1072 count = aq_vec_get_sw_stats(self->aq_vec[i], tc, data); 1073 } 1074 } 1075 1076 data += count; 1077 1078 err_exit: 1079 return data; 1080 } 1081 1082 static void aq_nic_update_ndev_stats(struct aq_nic_s *self) 1083 { 1084 struct aq_stats_s *stats = self->aq_hw_ops->hw_get_hw_stats(self->aq_hw); 1085 struct net_device *ndev = self->ndev; 1086 1087 ndev->stats.rx_packets = stats->dma_pkt_rc; 1088 ndev->stats.rx_bytes = stats->dma_oct_rc; 1089 ndev->stats.rx_errors = stats->erpr; 1090 ndev->stats.rx_dropped = stats->dpc; 1091 ndev->stats.tx_packets = stats->dma_pkt_tc; 1092 ndev->stats.tx_bytes = stats->dma_oct_tc; 1093 ndev->stats.tx_errors = stats->erpt; 1094 ndev->stats.multicast = stats->mprc; 1095 } 1096 1097 void aq_nic_get_link_ksettings(struct aq_nic_s *self, 1098 struct ethtool_link_ksettings *cmd) 1099 { 1100 u32 lp_link_speed_msk; 1101 1102 if (self->aq_nic_cfg.aq_hw_caps->media_type == AQ_HW_MEDIA_TYPE_FIBRE) 1103 cmd->base.port = PORT_FIBRE; 1104 else 1105 cmd->base.port = PORT_TP; 1106 1107 cmd->base.duplex = DUPLEX_UNKNOWN; 1108 if (self->link_status.mbps) 1109 cmd->base.duplex = self->link_status.full_duplex ? 1110 DUPLEX_FULL : DUPLEX_HALF; 1111 cmd->base.autoneg = self->aq_nic_cfg.is_autoneg; 1112 1113 ethtool_link_ksettings_zero_link_mode(cmd, supported); 1114 1115 if (self->aq_nic_cfg.aq_hw_caps->link_speed_msk & AQ_NIC_RATE_10G) 1116 ethtool_link_ksettings_add_link_mode(cmd, supported, 1117 10000baseT_Full); 1118 1119 if (self->aq_nic_cfg.aq_hw_caps->link_speed_msk & AQ_NIC_RATE_5G) 1120 ethtool_link_ksettings_add_link_mode(cmd, supported, 1121 5000baseT_Full); 1122 1123 if (self->aq_nic_cfg.aq_hw_caps->link_speed_msk & AQ_NIC_RATE_2G5) 1124 ethtool_link_ksettings_add_link_mode(cmd, supported, 1125 2500baseT_Full); 1126 1127 if (self->aq_nic_cfg.aq_hw_caps->link_speed_msk & AQ_NIC_RATE_1G) 1128 ethtool_link_ksettings_add_link_mode(cmd, supported, 1129 1000baseT_Full); 1130 1131 if (self->aq_nic_cfg.aq_hw_caps->link_speed_msk & AQ_NIC_RATE_1G_HALF) 1132 ethtool_link_ksettings_add_link_mode(cmd, supported, 1133 1000baseT_Half); 1134 1135 if (self->aq_nic_cfg.aq_hw_caps->link_speed_msk & AQ_NIC_RATE_100M) 1136 ethtool_link_ksettings_add_link_mode(cmd, supported, 1137 100baseT_Full); 1138 1139 if (self->aq_nic_cfg.aq_hw_caps->link_speed_msk & AQ_NIC_RATE_100M_HALF) 1140 ethtool_link_ksettings_add_link_mode(cmd, supported, 1141 100baseT_Half); 1142 1143 if (self->aq_nic_cfg.aq_hw_caps->link_speed_msk & AQ_NIC_RATE_10M) 1144 ethtool_link_ksettings_add_link_mode(cmd, supported, 1145 10baseT_Full); 1146 1147 if (self->aq_nic_cfg.aq_hw_caps->link_speed_msk & AQ_NIC_RATE_10M_HALF) 1148 ethtool_link_ksettings_add_link_mode(cmd, supported, 1149 10baseT_Half); 1150 1151 if (self->aq_nic_cfg.aq_hw_caps->flow_control) { 1152 ethtool_link_ksettings_add_link_mode(cmd, supported, 1153 Pause); 1154 ethtool_link_ksettings_add_link_mode(cmd, supported, 1155 Asym_Pause); 1156 } 1157 1158 ethtool_link_ksettings_add_link_mode(cmd, supported, Autoneg); 1159 1160 if (self->aq_nic_cfg.aq_hw_caps->media_type == AQ_HW_MEDIA_TYPE_FIBRE) 1161 ethtool_link_ksettings_add_link_mode(cmd, supported, FIBRE); 1162 else 1163 ethtool_link_ksettings_add_link_mode(cmd, supported, TP); 1164 1165 ethtool_link_ksettings_zero_link_mode(cmd, advertising); 1166 1167 if (self->aq_nic_cfg.is_autoneg) 1168 ethtool_link_ksettings_add_link_mode(cmd, advertising, Autoneg); 1169 1170 if (self->aq_nic_cfg.link_speed_msk & AQ_NIC_RATE_10G) 1171 ethtool_link_ksettings_add_link_mode(cmd, advertising, 1172 10000baseT_Full); 1173 1174 if (self->aq_nic_cfg.link_speed_msk & AQ_NIC_RATE_5G) 1175 ethtool_link_ksettings_add_link_mode(cmd, advertising, 1176 5000baseT_Full); 1177 1178 if (self->aq_nic_cfg.link_speed_msk & AQ_NIC_RATE_2G5) 1179 ethtool_link_ksettings_add_link_mode(cmd, advertising, 1180 2500baseT_Full); 1181 1182 if (self->aq_nic_cfg.link_speed_msk & AQ_NIC_RATE_1G) 1183 ethtool_link_ksettings_add_link_mode(cmd, advertising, 1184 1000baseT_Full); 1185 1186 if (self->aq_nic_cfg.link_speed_msk & AQ_NIC_RATE_1G_HALF) 1187 ethtool_link_ksettings_add_link_mode(cmd, advertising, 1188 1000baseT_Half); 1189 1190 if (self->aq_nic_cfg.link_speed_msk & AQ_NIC_RATE_100M) 1191 ethtool_link_ksettings_add_link_mode(cmd, advertising, 1192 100baseT_Full); 1193 1194 if (self->aq_nic_cfg.link_speed_msk & AQ_NIC_RATE_100M_HALF) 1195 ethtool_link_ksettings_add_link_mode(cmd, advertising, 1196 100baseT_Half); 1197 1198 if (self->aq_nic_cfg.link_speed_msk & AQ_NIC_RATE_10M) 1199 ethtool_link_ksettings_add_link_mode(cmd, advertising, 1200 10baseT_Full); 1201 1202 if (self->aq_nic_cfg.link_speed_msk & AQ_NIC_RATE_10M_HALF) 1203 ethtool_link_ksettings_add_link_mode(cmd, advertising, 1204 10baseT_Half); 1205 1206 if (self->aq_nic_cfg.fc.cur & AQ_NIC_FC_RX) 1207 ethtool_link_ksettings_add_link_mode(cmd, advertising, 1208 Pause); 1209 1210 /* Asym is when either RX or TX, but not both */ 1211 if (!!(self->aq_nic_cfg.fc.cur & AQ_NIC_FC_TX) ^ 1212 !!(self->aq_nic_cfg.fc.cur & AQ_NIC_FC_RX)) 1213 ethtool_link_ksettings_add_link_mode(cmd, advertising, 1214 Asym_Pause); 1215 1216 if (self->aq_nic_cfg.aq_hw_caps->media_type == AQ_HW_MEDIA_TYPE_FIBRE) 1217 ethtool_link_ksettings_add_link_mode(cmd, advertising, FIBRE); 1218 else 1219 ethtool_link_ksettings_add_link_mode(cmd, advertising, TP); 1220 1221 ethtool_link_ksettings_zero_link_mode(cmd, lp_advertising); 1222 lp_link_speed_msk = self->aq_hw->aq_link_status.lp_link_speed_msk; 1223 1224 if (lp_link_speed_msk & AQ_NIC_RATE_10G) 1225 ethtool_link_ksettings_add_link_mode(cmd, lp_advertising, 1226 10000baseT_Full); 1227 1228 if (lp_link_speed_msk & AQ_NIC_RATE_5G) 1229 ethtool_link_ksettings_add_link_mode(cmd, lp_advertising, 1230 5000baseT_Full); 1231 1232 if (lp_link_speed_msk & AQ_NIC_RATE_2G5) 1233 ethtool_link_ksettings_add_link_mode(cmd, lp_advertising, 1234 2500baseT_Full); 1235 1236 if (lp_link_speed_msk & AQ_NIC_RATE_1G) 1237 ethtool_link_ksettings_add_link_mode(cmd, lp_advertising, 1238 1000baseT_Full); 1239 1240 if (lp_link_speed_msk & AQ_NIC_RATE_1G_HALF) 1241 ethtool_link_ksettings_add_link_mode(cmd, lp_advertising, 1242 1000baseT_Half); 1243 1244 if (lp_link_speed_msk & AQ_NIC_RATE_100M) 1245 ethtool_link_ksettings_add_link_mode(cmd, lp_advertising, 1246 100baseT_Full); 1247 1248 if (lp_link_speed_msk & AQ_NIC_RATE_100M_HALF) 1249 ethtool_link_ksettings_add_link_mode(cmd, lp_advertising, 1250 100baseT_Half); 1251 1252 if (lp_link_speed_msk & AQ_NIC_RATE_10M) 1253 ethtool_link_ksettings_add_link_mode(cmd, lp_advertising, 1254 10baseT_Full); 1255 1256 if (lp_link_speed_msk & AQ_NIC_RATE_10M_HALF) 1257 ethtool_link_ksettings_add_link_mode(cmd, lp_advertising, 1258 10baseT_Half); 1259 1260 if (self->aq_hw->aq_link_status.lp_flow_control & AQ_NIC_FC_RX) 1261 ethtool_link_ksettings_add_link_mode(cmd, lp_advertising, 1262 Pause); 1263 if (!!(self->aq_hw->aq_link_status.lp_flow_control & AQ_NIC_FC_TX) ^ 1264 !!(self->aq_hw->aq_link_status.lp_flow_control & AQ_NIC_FC_RX)) 1265 ethtool_link_ksettings_add_link_mode(cmd, lp_advertising, 1266 Asym_Pause); 1267 } 1268 1269 int aq_nic_set_link_ksettings(struct aq_nic_s *self, 1270 const struct ethtool_link_ksettings *cmd) 1271 { 1272 int fduplex = (cmd->base.duplex == DUPLEX_FULL); 1273 u32 speed = cmd->base.speed; 1274 u32 rate = 0U; 1275 int err = 0; 1276 1277 if (!fduplex && speed > SPEED_1000) { 1278 err = -EINVAL; 1279 goto err_exit; 1280 } 1281 1282 if (cmd->base.autoneg == AUTONEG_ENABLE) { 1283 rate = self->aq_nic_cfg.aq_hw_caps->link_speed_msk; 1284 self->aq_nic_cfg.is_autoneg = true; 1285 } else { 1286 switch (speed) { 1287 case SPEED_10: 1288 rate = fduplex ? AQ_NIC_RATE_10M : AQ_NIC_RATE_10M_HALF; 1289 break; 1290 1291 case SPEED_100: 1292 rate = fduplex ? AQ_NIC_RATE_100M 1293 : AQ_NIC_RATE_100M_HALF; 1294 break; 1295 1296 case SPEED_1000: 1297 rate = fduplex ? AQ_NIC_RATE_1G : AQ_NIC_RATE_1G_HALF; 1298 break; 1299 1300 case SPEED_2500: 1301 rate = AQ_NIC_RATE_2G5; 1302 break; 1303 1304 case SPEED_5000: 1305 rate = AQ_NIC_RATE_5G; 1306 break; 1307 1308 case SPEED_10000: 1309 rate = AQ_NIC_RATE_10G; 1310 break; 1311 1312 default: 1313 err = -1; 1314 goto err_exit; 1315 } 1316 if (!(self->aq_nic_cfg.aq_hw_caps->link_speed_msk & rate)) { 1317 err = -1; 1318 goto err_exit; 1319 } 1320 1321 self->aq_nic_cfg.is_autoneg = false; 1322 } 1323 1324 mutex_lock(&self->fwreq_mutex); 1325 err = self->aq_fw_ops->set_link_speed(self->aq_hw, rate); 1326 mutex_unlock(&self->fwreq_mutex); 1327 if (err < 0) 1328 goto err_exit; 1329 1330 self->aq_nic_cfg.link_speed_msk = rate; 1331 1332 err_exit: 1333 return err; 1334 } 1335 1336 struct aq_nic_cfg_s *aq_nic_get_cfg(struct aq_nic_s *self) 1337 { 1338 return &self->aq_nic_cfg; 1339 } 1340 1341 u32 aq_nic_get_fw_version(struct aq_nic_s *self) 1342 { 1343 return self->aq_hw_ops->hw_get_fw_version(self->aq_hw); 1344 } 1345 1346 int aq_nic_set_loopback(struct aq_nic_s *self) 1347 { 1348 struct aq_nic_cfg_s *cfg = &self->aq_nic_cfg; 1349 1350 if (!self->aq_hw_ops->hw_set_loopback || 1351 !self->aq_fw_ops->set_phyloopback) 1352 return -EOPNOTSUPP; 1353 1354 mutex_lock(&self->fwreq_mutex); 1355 self->aq_hw_ops->hw_set_loopback(self->aq_hw, 1356 AQ_HW_LOOPBACK_DMA_SYS, 1357 !!(cfg->priv_flags & 1358 BIT(AQ_HW_LOOPBACK_DMA_SYS))); 1359 1360 self->aq_hw_ops->hw_set_loopback(self->aq_hw, 1361 AQ_HW_LOOPBACK_PKT_SYS, 1362 !!(cfg->priv_flags & 1363 BIT(AQ_HW_LOOPBACK_PKT_SYS))); 1364 1365 self->aq_hw_ops->hw_set_loopback(self->aq_hw, 1366 AQ_HW_LOOPBACK_DMA_NET, 1367 !!(cfg->priv_flags & 1368 BIT(AQ_HW_LOOPBACK_DMA_NET))); 1369 1370 self->aq_fw_ops->set_phyloopback(self->aq_hw, 1371 AQ_HW_LOOPBACK_PHYINT_SYS, 1372 !!(cfg->priv_flags & 1373 BIT(AQ_HW_LOOPBACK_PHYINT_SYS))); 1374 1375 self->aq_fw_ops->set_phyloopback(self->aq_hw, 1376 AQ_HW_LOOPBACK_PHYEXT_SYS, 1377 !!(cfg->priv_flags & 1378 BIT(AQ_HW_LOOPBACK_PHYEXT_SYS))); 1379 mutex_unlock(&self->fwreq_mutex); 1380 1381 return 0; 1382 } 1383 1384 int aq_nic_stop(struct aq_nic_s *self) 1385 { 1386 unsigned int i = 0U; 1387 1388 netif_tx_disable(self->ndev); 1389 netif_carrier_off(self->ndev); 1390 1391 timer_delete_sync(&self->service_timer); 1392 cancel_work_sync(&self->service_task); 1393 1394 self->aq_hw_ops->hw_irq_disable(self->aq_hw, AQ_CFG_IRQ_MASK); 1395 1396 if (self->aq_nic_cfg.is_polling) 1397 timer_delete_sync(&self->polling_timer); 1398 else 1399 aq_pci_func_free_irqs(self); 1400 1401 aq_ptp_irq_free(self); 1402 1403 for (i = 0U; self->aq_vecs > i; ++i) 1404 aq_vec_stop(self->aq_vec[i]); 1405 1406 aq_ptp_ring_stop(self); 1407 1408 return self->aq_hw_ops->hw_stop(self->aq_hw); 1409 } 1410 1411 void aq_nic_set_power(struct aq_nic_s *self) 1412 { 1413 if (self->power_state != AQ_HW_POWER_STATE_D0 || 1414 self->aq_hw->aq_nic_cfg->wol) 1415 if (likely(self->aq_fw_ops->set_power)) { 1416 mutex_lock(&self->fwreq_mutex); 1417 self->aq_fw_ops->set_power(self->aq_hw, 1418 self->power_state, 1419 self->ndev->dev_addr); 1420 mutex_unlock(&self->fwreq_mutex); 1421 } 1422 } 1423 1424 void aq_nic_deinit(struct aq_nic_s *self, bool link_down) 1425 { 1426 struct aq_vec_s *aq_vec = NULL; 1427 unsigned int i = 0U; 1428 1429 if (!self) 1430 goto err_exit; 1431 1432 for (i = 0U; i < self->aq_vecs; i++) { 1433 aq_vec = self->aq_vec[i]; 1434 aq_vec_deinit(aq_vec); 1435 aq_vec_ring_free(aq_vec); 1436 } 1437 1438 aq_ptp_unregister(self); 1439 aq_ptp_ring_deinit(self); 1440 aq_ptp_ring_free(self); 1441 aq_ptp_free(self); 1442 1443 /* May be invoked during hot unplug. */ 1444 if (pci_device_is_present(self->pdev) && 1445 likely(self->aq_fw_ops->deinit) && link_down) { 1446 mutex_lock(&self->fwreq_mutex); 1447 self->aq_fw_ops->deinit(self->aq_hw); 1448 mutex_unlock(&self->fwreq_mutex); 1449 } 1450 1451 err_exit:; 1452 } 1453 1454 void aq_nic_free_vectors(struct aq_nic_s *self) 1455 { 1456 unsigned int i = 0U; 1457 1458 if (!self) 1459 goto err_exit; 1460 1461 for (i = ARRAY_SIZE(self->aq_vec); i--;) { 1462 if (self->aq_vec[i]) { 1463 aq_vec_free(self->aq_vec[i]); 1464 self->aq_vec[i] = NULL; 1465 } 1466 } 1467 1468 err_exit:; 1469 } 1470 1471 int aq_nic_realloc_vectors(struct aq_nic_s *self) 1472 { 1473 struct aq_nic_cfg_s *cfg = aq_nic_get_cfg(self); 1474 1475 aq_nic_free_vectors(self); 1476 1477 for (self->aq_vecs = 0; self->aq_vecs < cfg->vecs; self->aq_vecs++) { 1478 self->aq_vec[self->aq_vecs] = aq_vec_alloc(self, self->aq_vecs, 1479 cfg); 1480 if (unlikely(!self->aq_vec[self->aq_vecs])) 1481 return -ENOMEM; 1482 } 1483 1484 return 0; 1485 } 1486 1487 void aq_nic_shutdown(struct aq_nic_s *self) 1488 { 1489 int err = 0; 1490 1491 if (!self->ndev) 1492 return; 1493 1494 rtnl_lock(); 1495 1496 netif_device_detach(self->ndev); 1497 1498 if (netif_running(self->ndev)) { 1499 err = aq_nic_stop(self); 1500 if (err < 0) 1501 goto err_exit; 1502 } 1503 aq_nic_deinit(self, !self->aq_hw->aq_nic_cfg->wol); 1504 aq_nic_set_power(self); 1505 1506 err_exit: 1507 rtnl_unlock(); 1508 } 1509 1510 u8 aq_nic_reserve_filter(struct aq_nic_s *self, enum aq_rx_filter_type type) 1511 { 1512 u8 location = 0xFF; 1513 u32 fltr_cnt; 1514 u32 n_bit; 1515 1516 switch (type) { 1517 case aq_rx_filter_ethertype: 1518 location = AQ_RX_LAST_LOC_FETHERT - AQ_RX_FIRST_LOC_FETHERT - 1519 self->aq_hw_rx_fltrs.fet_reserved_count; 1520 self->aq_hw_rx_fltrs.fet_reserved_count++; 1521 break; 1522 case aq_rx_filter_l3l4: 1523 fltr_cnt = AQ_RX_LAST_LOC_FL3L4 - AQ_RX_FIRST_LOC_FL3L4; 1524 n_bit = fltr_cnt - self->aq_hw_rx_fltrs.fl3l4.reserved_count; 1525 1526 self->aq_hw_rx_fltrs.fl3l4.active_ipv4 |= BIT(n_bit); 1527 self->aq_hw_rx_fltrs.fl3l4.reserved_count++; 1528 location = n_bit; 1529 break; 1530 default: 1531 break; 1532 } 1533 1534 return location; 1535 } 1536 1537 void aq_nic_release_filter(struct aq_nic_s *self, enum aq_rx_filter_type type, 1538 u32 location) 1539 { 1540 switch (type) { 1541 case aq_rx_filter_ethertype: 1542 self->aq_hw_rx_fltrs.fet_reserved_count--; 1543 break; 1544 case aq_rx_filter_l3l4: 1545 self->aq_hw_rx_fltrs.fl3l4.reserved_count--; 1546 self->aq_hw_rx_fltrs.fl3l4.active_ipv4 &= ~BIT(location); 1547 break; 1548 default: 1549 break; 1550 } 1551 } 1552 1553 int aq_nic_set_downshift(struct aq_nic_s *self, int val) 1554 { 1555 int err = 0; 1556 struct aq_nic_cfg_s *cfg = &self->aq_nic_cfg; 1557 1558 if (!self->aq_fw_ops->set_downshift) 1559 return -EOPNOTSUPP; 1560 1561 if (val > 15) { 1562 netdev_err(self->ndev, "downshift counter should be <= 15\n"); 1563 return -EINVAL; 1564 } 1565 cfg->downshift_counter = val; 1566 1567 mutex_lock(&self->fwreq_mutex); 1568 err = self->aq_fw_ops->set_downshift(self->aq_hw, cfg->downshift_counter); 1569 mutex_unlock(&self->fwreq_mutex); 1570 1571 return err; 1572 } 1573 1574 int aq_nic_set_media_detect(struct aq_nic_s *self, int val) 1575 { 1576 struct aq_nic_cfg_s *cfg = &self->aq_nic_cfg; 1577 int err = 0; 1578 1579 if (!self->aq_fw_ops->set_media_detect) 1580 return -EOPNOTSUPP; 1581 1582 if (val > 0 && val != AQ_HW_MEDIA_DETECT_CNT) { 1583 netdev_err(self->ndev, "EDPD on this device could have only fixed value of %d\n", 1584 AQ_HW_MEDIA_DETECT_CNT); 1585 return -EINVAL; 1586 } 1587 1588 mutex_lock(&self->fwreq_mutex); 1589 err = self->aq_fw_ops->set_media_detect(self->aq_hw, !!val); 1590 mutex_unlock(&self->fwreq_mutex); 1591 1592 /* msecs plays no role - configuration is always fixed in PHY */ 1593 if (!err) 1594 cfg->is_media_detect = !!val; 1595 1596 return err; 1597 } 1598 1599 int aq_nic_setup_tc_mqprio(struct aq_nic_s *self, u32 tcs, u8 *prio_tc_map) 1600 { 1601 struct aq_nic_cfg_s *cfg = &self->aq_nic_cfg; 1602 const unsigned int prev_vecs = cfg->vecs; 1603 bool ndev_running; 1604 int err = 0; 1605 int i; 1606 1607 /* if already the same configuration or 1608 * disable request (tcs is 0) and we already is disabled 1609 */ 1610 if (tcs == cfg->tcs || (tcs == 0 && !cfg->is_qos)) 1611 return 0; 1612 1613 ndev_running = netif_running(self->ndev); 1614 if (ndev_running) 1615 dev_close(self->ndev); 1616 1617 cfg->tcs = tcs; 1618 if (cfg->tcs == 0) 1619 cfg->tcs = 1; 1620 if (prio_tc_map) 1621 memcpy(cfg->prio_tc_map, prio_tc_map, sizeof(cfg->prio_tc_map)); 1622 else 1623 for (i = 0; i < sizeof(cfg->prio_tc_map); i++) 1624 cfg->prio_tc_map[i] = cfg->tcs * i / 8; 1625 1626 cfg->is_qos = !!tcs; 1627 cfg->is_ptp = (cfg->tcs <= AQ_HW_PTP_TC); 1628 if (!cfg->is_ptp) 1629 netdev_warn(self->ndev, "%s\n", 1630 "PTP is auto disabled due to requested TC count."); 1631 1632 netdev_set_num_tc(self->ndev, cfg->tcs); 1633 1634 /* Changing the number of TCs might change the number of vectors */ 1635 aq_nic_cfg_update_num_vecs(self); 1636 if (prev_vecs != cfg->vecs) { 1637 err = aq_nic_realloc_vectors(self); 1638 if (err) 1639 goto err_exit; 1640 } 1641 1642 if (ndev_running) 1643 err = dev_open(self->ndev, NULL); 1644 1645 err_exit: 1646 return err; 1647 } 1648 1649 int aq_nic_setup_tc_max_rate(struct aq_nic_s *self, const unsigned int tc, 1650 const u32 max_rate) 1651 { 1652 struct aq_nic_cfg_s *cfg = &self->aq_nic_cfg; 1653 1654 if (tc >= AQ_CFG_TCS_MAX) 1655 return -EINVAL; 1656 1657 if (max_rate && max_rate < 10) { 1658 netdev_warn(self->ndev, 1659 "Setting %s to the minimum usable value of %dMbps.\n", 1660 "max rate", 10); 1661 cfg->tc_max_rate[tc] = 10; 1662 } else { 1663 cfg->tc_max_rate[tc] = max_rate; 1664 } 1665 1666 return 0; 1667 } 1668 1669 int aq_nic_setup_tc_min_rate(struct aq_nic_s *self, const unsigned int tc, 1670 const u32 min_rate) 1671 { 1672 struct aq_nic_cfg_s *cfg = &self->aq_nic_cfg; 1673 1674 if (tc >= AQ_CFG_TCS_MAX) 1675 return -EINVAL; 1676 1677 if (min_rate) 1678 set_bit(tc, &cfg->tc_min_rate_msk); 1679 else 1680 clear_bit(tc, &cfg->tc_min_rate_msk); 1681 1682 if (min_rate && min_rate < 20) { 1683 netdev_warn(self->ndev, 1684 "Setting %s to the minimum usable value of %dMbps.\n", 1685 "min rate", 20); 1686 cfg->tc_min_rate[tc] = 20; 1687 } else { 1688 cfg->tc_min_rate[tc] = min_rate; 1689 } 1690 1691 return 0; 1692 } 1693