xref: /linux/drivers/net/ethernet/aquantia/atlantic/aq_macsec.c (revision 91ec2035134982b98fab0609a9fd8480e8217dc1)
1 // SPDX-License-Identifier: GPL-2.0-only
2 /* Atlantic Network Driver
3  * Copyright (C) 2020 Marvell International Ltd.
4  */
5 
6 #include "aq_macsec.h"
7 #include "aq_nic.h"
8 #include <linux/rtnetlink.h>
9 
10 #include "macsec/macsec_api.h"
11 #define AQ_MACSEC_KEY_LEN_128_BIT 16
12 #define AQ_MACSEC_KEY_LEN_192_BIT 24
13 #define AQ_MACSEC_KEY_LEN_256_BIT 32
14 
15 enum aq_clear_type {
16 	/* update HW configuration */
17 	AQ_CLEAR_HW = BIT(0),
18 	/* update SW configuration (busy bits, pointers) */
19 	AQ_CLEAR_SW = BIT(1),
20 	/* update both HW and SW configuration */
21 	AQ_CLEAR_ALL = AQ_CLEAR_HW | AQ_CLEAR_SW,
22 };
23 
24 static int aq_clear_txsc(struct aq_nic_s *nic, const int txsc_idx,
25 			 enum aq_clear_type clear_type);
26 static int aq_clear_txsa(struct aq_nic_s *nic, struct aq_macsec_txsc *aq_txsc,
27 			 const int sa_num, enum aq_clear_type clear_type);
28 static int aq_clear_rxsc(struct aq_nic_s *nic, const int rxsc_idx,
29 			 enum aq_clear_type clear_type);
30 static int aq_clear_rxsa(struct aq_nic_s *nic, struct aq_macsec_rxsc *aq_rxsc,
31 			 const int sa_num, enum aq_clear_type clear_type);
32 static int aq_clear_secy(struct aq_nic_s *nic, const struct macsec_secy *secy,
33 			 enum aq_clear_type clear_type);
34 static int aq_apply_macsec_cfg(struct aq_nic_s *nic);
35 static int aq_apply_secy_cfg(struct aq_nic_s *nic,
36 			     const struct macsec_secy *secy);
37 
aq_ether_addr_to_mac(u32 mac[2],const unsigned char * emac)38 static void aq_ether_addr_to_mac(u32 mac[2], const unsigned char *emac)
39 {
40 	u32 tmp[2] = { 0 };
41 
42 	memcpy(((u8 *)tmp) + 2, emac, ETH_ALEN);
43 
44 	mac[0] = swab32(tmp[1]);
45 	mac[1] = swab32(tmp[0]);
46 }
47 
48 /* There's a 1:1 mapping between SecY and TX SC */
aq_get_txsc_idx_from_secy(struct aq_macsec_cfg * macsec_cfg,const struct macsec_secy * secy)49 static int aq_get_txsc_idx_from_secy(struct aq_macsec_cfg *macsec_cfg,
50 				     const struct macsec_secy *secy)
51 {
52 	int i;
53 
54 	if (unlikely(!secy))
55 		return -1;
56 
57 	for (i = 0; i < AQ_MACSEC_MAX_SC; i++) {
58 		if (macsec_cfg->aq_txsc[i].sw_secy == secy)
59 			return i;
60 	}
61 	return -1;
62 }
63 
aq_get_rxsc_idx_from_rxsc(struct aq_macsec_cfg * macsec_cfg,const struct macsec_rx_sc * rxsc)64 static int aq_get_rxsc_idx_from_rxsc(struct aq_macsec_cfg *macsec_cfg,
65 				     const struct macsec_rx_sc *rxsc)
66 {
67 	int i;
68 
69 	if (unlikely(!rxsc))
70 		return -1;
71 
72 	for (i = 0; i < AQ_MACSEC_MAX_SC; i++) {
73 		if (macsec_cfg->aq_rxsc[i].sw_rxsc == rxsc)
74 			return i;
75 	}
76 
77 	return -1;
78 }
79 
aq_get_txsc_idx_from_sc_idx(const enum aq_macsec_sc_sa sc_sa,const int sc_idx)80 static int aq_get_txsc_idx_from_sc_idx(const enum aq_macsec_sc_sa sc_sa,
81 				       const int sc_idx)
82 {
83 	switch (sc_sa) {
84 	case aq_macsec_sa_sc_4sa_8sc:
85 		return sc_idx >> 2;
86 	case aq_macsec_sa_sc_2sa_16sc:
87 		return sc_idx >> 1;
88 	case aq_macsec_sa_sc_1sa_32sc:
89 		return sc_idx;
90 	default:
91 		WARN_ONCE(true, "Invalid sc_sa");
92 	}
93 	return -1;
94 }
95 
96 /* Rotate keys u32[8] */
aq_rotate_keys(u32 (* key)[8],const int key_len)97 static void aq_rotate_keys(u32 (*key)[8], const int key_len)
98 {
99 	u32 tmp[8] = { 0 };
100 
101 	memcpy(&tmp, key, sizeof(tmp));
102 	memset(*key, 0, sizeof(*key));
103 
104 	if (key_len == AQ_MACSEC_KEY_LEN_128_BIT) {
105 		(*key)[0] = swab32(tmp[3]);
106 		(*key)[1] = swab32(tmp[2]);
107 		(*key)[2] = swab32(tmp[1]);
108 		(*key)[3] = swab32(tmp[0]);
109 	} else if (key_len == AQ_MACSEC_KEY_LEN_192_BIT) {
110 		(*key)[0] = swab32(tmp[5]);
111 		(*key)[1] = swab32(tmp[4]);
112 		(*key)[2] = swab32(tmp[3]);
113 		(*key)[3] = swab32(tmp[2]);
114 		(*key)[4] = swab32(tmp[1]);
115 		(*key)[5] = swab32(tmp[0]);
116 	} else if (key_len == AQ_MACSEC_KEY_LEN_256_BIT) {
117 		(*key)[0] = swab32(tmp[7]);
118 		(*key)[1] = swab32(tmp[6]);
119 		(*key)[2] = swab32(tmp[5]);
120 		(*key)[3] = swab32(tmp[4]);
121 		(*key)[4] = swab32(tmp[3]);
122 		(*key)[5] = swab32(tmp[2]);
123 		(*key)[6] = swab32(tmp[1]);
124 		(*key)[7] = swab32(tmp[0]);
125 	} else {
126 		pr_warn("Rotate_keys: invalid key_len\n");
127 	}
128 }
129 
130 #define STATS_2x32_TO_64(stat_field)                                           \
131 	(((u64)stat_field[1] << 32) | stat_field[0])
132 
aq_get_macsec_common_stats(struct aq_hw_s * hw,struct aq_macsec_common_stats * stats)133 static int aq_get_macsec_common_stats(struct aq_hw_s *hw,
134 				      struct aq_macsec_common_stats *stats)
135 {
136 	struct aq_mss_ingress_common_counters ingress_counters;
137 	struct aq_mss_egress_common_counters egress_counters;
138 	int ret;
139 
140 	/* MACSEC counters */
141 	ret = aq_mss_get_ingress_common_counters(hw, &ingress_counters);
142 	if (unlikely(ret))
143 		return ret;
144 
145 	stats->in.ctl_pkts = STATS_2x32_TO_64(ingress_counters.ctl_pkts);
146 	stats->in.tagged_miss_pkts =
147 		STATS_2x32_TO_64(ingress_counters.tagged_miss_pkts);
148 	stats->in.untagged_miss_pkts =
149 		STATS_2x32_TO_64(ingress_counters.untagged_miss_pkts);
150 	stats->in.notag_pkts = STATS_2x32_TO_64(ingress_counters.notag_pkts);
151 	stats->in.untagged_pkts =
152 		STATS_2x32_TO_64(ingress_counters.untagged_pkts);
153 	stats->in.bad_tag_pkts =
154 		STATS_2x32_TO_64(ingress_counters.bad_tag_pkts);
155 	stats->in.no_sci_pkts = STATS_2x32_TO_64(ingress_counters.no_sci_pkts);
156 	stats->in.unknown_sci_pkts =
157 		STATS_2x32_TO_64(ingress_counters.unknown_sci_pkts);
158 	stats->in.ctrl_prt_pass_pkts =
159 		STATS_2x32_TO_64(ingress_counters.ctrl_prt_pass_pkts);
160 	stats->in.unctrl_prt_pass_pkts =
161 		STATS_2x32_TO_64(ingress_counters.unctrl_prt_pass_pkts);
162 	stats->in.ctrl_prt_fail_pkts =
163 		STATS_2x32_TO_64(ingress_counters.ctrl_prt_fail_pkts);
164 	stats->in.unctrl_prt_fail_pkts =
165 		STATS_2x32_TO_64(ingress_counters.unctrl_prt_fail_pkts);
166 	stats->in.too_long_pkts =
167 		STATS_2x32_TO_64(ingress_counters.too_long_pkts);
168 	stats->in.igpoc_ctl_pkts =
169 		STATS_2x32_TO_64(ingress_counters.igpoc_ctl_pkts);
170 	stats->in.ecc_error_pkts =
171 		STATS_2x32_TO_64(ingress_counters.ecc_error_pkts);
172 	stats->in.unctrl_hit_drop_redir =
173 		STATS_2x32_TO_64(ingress_counters.unctrl_hit_drop_redir);
174 
175 	ret = aq_mss_get_egress_common_counters(hw, &egress_counters);
176 	if (unlikely(ret))
177 		return ret;
178 	stats->out.ctl_pkts = STATS_2x32_TO_64(egress_counters.ctl_pkt);
179 	stats->out.unknown_sa_pkts =
180 		STATS_2x32_TO_64(egress_counters.unknown_sa_pkts);
181 	stats->out.untagged_pkts =
182 		STATS_2x32_TO_64(egress_counters.untagged_pkts);
183 	stats->out.too_long = STATS_2x32_TO_64(egress_counters.too_long);
184 	stats->out.ecc_error_pkts =
185 		STATS_2x32_TO_64(egress_counters.ecc_error_pkts);
186 	stats->out.unctrl_hit_drop_redir =
187 		STATS_2x32_TO_64(egress_counters.unctrl_hit_drop_redir);
188 
189 	return 0;
190 }
191 
aq_get_rxsa_stats(struct aq_hw_s * hw,const int sa_idx,struct aq_macsec_rx_sa_stats * stats)192 static int aq_get_rxsa_stats(struct aq_hw_s *hw, const int sa_idx,
193 			     struct aq_macsec_rx_sa_stats *stats)
194 {
195 	struct aq_mss_ingress_sa_counters i_sa_counters;
196 	int ret;
197 
198 	ret = aq_mss_get_ingress_sa_counters(hw, &i_sa_counters, sa_idx);
199 	if (unlikely(ret))
200 		return ret;
201 
202 	stats->untagged_hit_pkts =
203 		STATS_2x32_TO_64(i_sa_counters.untagged_hit_pkts);
204 	stats->ctrl_hit_drop_redir_pkts =
205 		STATS_2x32_TO_64(i_sa_counters.ctrl_hit_drop_redir_pkts);
206 	stats->not_using_sa = STATS_2x32_TO_64(i_sa_counters.not_using_sa);
207 	stats->unused_sa = STATS_2x32_TO_64(i_sa_counters.unused_sa);
208 	stats->not_valid_pkts = STATS_2x32_TO_64(i_sa_counters.not_valid_pkts);
209 	stats->invalid_pkts = STATS_2x32_TO_64(i_sa_counters.invalid_pkts);
210 	stats->ok_pkts = STATS_2x32_TO_64(i_sa_counters.ok_pkts);
211 	stats->late_pkts = STATS_2x32_TO_64(i_sa_counters.late_pkts);
212 	stats->delayed_pkts = STATS_2x32_TO_64(i_sa_counters.delayed_pkts);
213 	stats->unchecked_pkts = STATS_2x32_TO_64(i_sa_counters.unchecked_pkts);
214 	stats->validated_octets =
215 		STATS_2x32_TO_64(i_sa_counters.validated_octets);
216 	stats->decrypted_octets =
217 		STATS_2x32_TO_64(i_sa_counters.decrypted_octets);
218 
219 	return 0;
220 }
221 
aq_get_txsa_stats(struct aq_hw_s * hw,const int sa_idx,struct aq_macsec_tx_sa_stats * stats)222 static int aq_get_txsa_stats(struct aq_hw_s *hw, const int sa_idx,
223 			     struct aq_macsec_tx_sa_stats *stats)
224 {
225 	struct aq_mss_egress_sa_counters e_sa_counters;
226 	int ret;
227 
228 	ret = aq_mss_get_egress_sa_counters(hw, &e_sa_counters, sa_idx);
229 	if (unlikely(ret))
230 		return ret;
231 
232 	stats->sa_hit_drop_redirect =
233 		STATS_2x32_TO_64(e_sa_counters.sa_hit_drop_redirect);
234 	stats->sa_protected2_pkts =
235 		STATS_2x32_TO_64(e_sa_counters.sa_protected2_pkts);
236 	stats->sa_protected_pkts =
237 		STATS_2x32_TO_64(e_sa_counters.sa_protected_pkts);
238 	stats->sa_encrypted_pkts =
239 		STATS_2x32_TO_64(e_sa_counters.sa_encrypted_pkts);
240 
241 	return 0;
242 }
243 
aq_get_txsa_next_pn(struct aq_hw_s * hw,const int sa_idx,u32 * pn)244 static int aq_get_txsa_next_pn(struct aq_hw_s *hw, const int sa_idx, u32 *pn)
245 {
246 	struct aq_mss_egress_sa_record sa_rec;
247 	int ret;
248 
249 	ret = aq_mss_get_egress_sa_record(hw, &sa_rec, sa_idx);
250 	if (likely(!ret))
251 		*pn = sa_rec.next_pn;
252 
253 	return ret;
254 }
255 
aq_get_rxsa_next_pn(struct aq_hw_s * hw,const int sa_idx,u32 * pn)256 static int aq_get_rxsa_next_pn(struct aq_hw_s *hw, const int sa_idx, u32 *pn)
257 {
258 	struct aq_mss_ingress_sa_record sa_rec;
259 	int ret;
260 
261 	ret = aq_mss_get_ingress_sa_record(hw, &sa_rec, sa_idx);
262 	if (likely(!ret))
263 		*pn = (!sa_rec.sat_nextpn) ? sa_rec.next_pn : 0;
264 
265 	return ret;
266 }
267 
aq_get_txsc_stats(struct aq_hw_s * hw,const int sc_idx,struct aq_macsec_tx_sc_stats * stats)268 static int aq_get_txsc_stats(struct aq_hw_s *hw, const int sc_idx,
269 			     struct aq_macsec_tx_sc_stats *stats)
270 {
271 	struct aq_mss_egress_sc_counters e_sc_counters;
272 	int ret;
273 
274 	ret = aq_mss_get_egress_sc_counters(hw, &e_sc_counters, sc_idx);
275 	if (unlikely(ret))
276 		return ret;
277 
278 	stats->sc_protected_pkts =
279 		STATS_2x32_TO_64(e_sc_counters.sc_protected_pkts);
280 	stats->sc_encrypted_pkts =
281 		STATS_2x32_TO_64(e_sc_counters.sc_encrypted_pkts);
282 	stats->sc_protected_octets =
283 		STATS_2x32_TO_64(e_sc_counters.sc_protected_octets);
284 	stats->sc_encrypted_octets =
285 		STATS_2x32_TO_64(e_sc_counters.sc_encrypted_octets);
286 
287 	return 0;
288 }
289 
aq_mdo_dev_open(struct macsec_context * ctx)290 static int aq_mdo_dev_open(struct macsec_context *ctx)
291 {
292 	struct aq_nic_s *nic = macsec_netdev_priv(ctx->netdev);
293 	int ret = 0;
294 
295 	if (netif_carrier_ok(nic->ndev))
296 		ret = aq_apply_secy_cfg(nic, ctx->secy);
297 
298 	return ret;
299 }
300 
aq_mdo_dev_stop(struct macsec_context * ctx)301 static int aq_mdo_dev_stop(struct macsec_context *ctx)
302 {
303 	struct aq_nic_s *nic = macsec_netdev_priv(ctx->netdev);
304 	int i;
305 
306 	for (i = 0; i < AQ_MACSEC_MAX_SC; i++) {
307 		if (nic->macsec_cfg->txsc_idx_busy & BIT(i))
308 			aq_clear_secy(nic, nic->macsec_cfg->aq_txsc[i].sw_secy,
309 				      AQ_CLEAR_HW);
310 	}
311 
312 	return 0;
313 }
314 
aq_set_txsc(struct aq_nic_s * nic,const int txsc_idx)315 static int aq_set_txsc(struct aq_nic_s *nic, const int txsc_idx)
316 {
317 	struct aq_macsec_txsc *aq_txsc = &nic->macsec_cfg->aq_txsc[txsc_idx];
318 	struct aq_mss_egress_class_record tx_class_rec = { 0 };
319 	const struct macsec_secy *secy = aq_txsc->sw_secy;
320 	struct aq_mss_egress_sc_record sc_rec = { 0 };
321 	unsigned int sc_idx = aq_txsc->hw_sc_idx;
322 	struct aq_hw_s *hw = nic->aq_hw;
323 	int ret = 0;
324 
325 	aq_ether_addr_to_mac(tx_class_rec.mac_sa, secy->netdev->dev_addr);
326 
327 	put_unaligned_be64((__force u64)secy->sci, tx_class_rec.sci);
328 	tx_class_rec.sci_mask = 0;
329 
330 	tx_class_rec.sa_mask = 0x3f;
331 
332 	tx_class_rec.action = 0; /* forward to SA/SC table */
333 	tx_class_rec.valid = 1;
334 
335 	tx_class_rec.sc_idx = sc_idx;
336 
337 	tx_class_rec.sc_sa = nic->macsec_cfg->sc_sa;
338 
339 	ret = aq_mss_set_egress_class_record(hw, &tx_class_rec, txsc_idx);
340 	if (ret)
341 		return ret;
342 
343 	sc_rec.protect = secy->protect_frames;
344 	if (secy->tx_sc.encrypt)
345 		sc_rec.tci |= BIT(1);
346 	if (secy->tx_sc.scb)
347 		sc_rec.tci |= BIT(2);
348 	if (secy->tx_sc.send_sci)
349 		sc_rec.tci |= BIT(3);
350 	if (secy->tx_sc.end_station)
351 		sc_rec.tci |= BIT(4);
352 	/* The C bit is clear if and only if the Secure Data is
353 	 * exactly the same as the User Data and the ICV is 16 octets long.
354 	 */
355 	if (!(secy->icv_len == 16 && !secy->tx_sc.encrypt))
356 		sc_rec.tci |= BIT(0);
357 
358 	sc_rec.an_roll = 0;
359 
360 	switch (secy->key_len) {
361 	case AQ_MACSEC_KEY_LEN_128_BIT:
362 		sc_rec.sak_len = 0;
363 		break;
364 	case AQ_MACSEC_KEY_LEN_192_BIT:
365 		sc_rec.sak_len = 1;
366 		break;
367 	case AQ_MACSEC_KEY_LEN_256_BIT:
368 		sc_rec.sak_len = 2;
369 		break;
370 	default:
371 		WARN_ONCE(true, "Invalid sc_sa");
372 		return -EINVAL;
373 	}
374 
375 	sc_rec.curr_an = secy->tx_sc.encoding_sa;
376 	sc_rec.valid = 1;
377 	sc_rec.fresh = 1;
378 
379 	return aq_mss_set_egress_sc_record(hw, &sc_rec, sc_idx);
380 }
381 
aq_sc_idx_max(const enum aq_macsec_sc_sa sc_sa)382 static u32 aq_sc_idx_max(const enum aq_macsec_sc_sa sc_sa)
383 {
384 	u32 result = 0;
385 
386 	switch (sc_sa) {
387 	case aq_macsec_sa_sc_4sa_8sc:
388 		result = 8;
389 		break;
390 	case aq_macsec_sa_sc_2sa_16sc:
391 		result = 16;
392 		break;
393 	case aq_macsec_sa_sc_1sa_32sc:
394 		result = 32;
395 		break;
396 	default:
397 		break;
398 	}
399 
400 	return result;
401 }
402 
aq_to_hw_sc_idx(const u32 sc_idx,const enum aq_macsec_sc_sa sc_sa)403 static u32 aq_to_hw_sc_idx(const u32 sc_idx, const enum aq_macsec_sc_sa sc_sa)
404 {
405 	switch (sc_sa) {
406 	case aq_macsec_sa_sc_4sa_8sc:
407 		return sc_idx << 2;
408 	case aq_macsec_sa_sc_2sa_16sc:
409 		return sc_idx << 1;
410 	case aq_macsec_sa_sc_1sa_32sc:
411 		return sc_idx;
412 	default:
413 		WARN_ONCE(true, "Invalid sc_sa");
414 	}
415 
416 	return sc_idx;
417 }
418 
sc_sa_from_num_an(const int num_an)419 static enum aq_macsec_sc_sa sc_sa_from_num_an(const int num_an)
420 {
421 	enum aq_macsec_sc_sa sc_sa = aq_macsec_sa_sc_not_used;
422 
423 	switch (num_an) {
424 	case 4:
425 		sc_sa = aq_macsec_sa_sc_4sa_8sc;
426 		break;
427 	case 2:
428 		sc_sa = aq_macsec_sa_sc_2sa_16sc;
429 		break;
430 	case 1:
431 		sc_sa = aq_macsec_sa_sc_1sa_32sc;
432 		break;
433 	default:
434 		break;
435 	}
436 
437 	return sc_sa;
438 }
439 
aq_mdo_add_secy(struct macsec_context * ctx)440 static int aq_mdo_add_secy(struct macsec_context *ctx)
441 {
442 	struct aq_nic_s *nic = macsec_netdev_priv(ctx->netdev);
443 	struct aq_macsec_cfg *cfg = nic->macsec_cfg;
444 	const struct macsec_secy *secy = ctx->secy;
445 	enum aq_macsec_sc_sa sc_sa;
446 	u32 txsc_idx;
447 	int ret = 0;
448 
449 	if (secy->xpn)
450 		return -EOPNOTSUPP;
451 
452 	sc_sa = sc_sa_from_num_an(MACSEC_NUM_AN);
453 	if (sc_sa == aq_macsec_sa_sc_not_used)
454 		return -EINVAL;
455 
456 	if (hweight32(cfg->txsc_idx_busy) >= aq_sc_idx_max(sc_sa))
457 		return -ENOSPC;
458 
459 	txsc_idx = ffz(cfg->txsc_idx_busy);
460 	if (txsc_idx == AQ_MACSEC_MAX_SC)
461 		return -ENOSPC;
462 
463 	cfg->sc_sa = sc_sa;
464 	cfg->aq_txsc[txsc_idx].hw_sc_idx = aq_to_hw_sc_idx(txsc_idx, sc_sa);
465 	cfg->aq_txsc[txsc_idx].sw_secy = secy;
466 
467 	if (netif_carrier_ok(nic->ndev) && netif_running(secy->netdev))
468 		ret = aq_set_txsc(nic, txsc_idx);
469 
470 	set_bit(txsc_idx, &cfg->txsc_idx_busy);
471 
472 	return ret;
473 }
474 
aq_mdo_upd_secy(struct macsec_context * ctx)475 static int aq_mdo_upd_secy(struct macsec_context *ctx)
476 {
477 	struct aq_nic_s *nic = macsec_netdev_priv(ctx->netdev);
478 	const struct macsec_secy *secy = ctx->secy;
479 	int txsc_idx;
480 	int ret = 0;
481 
482 	txsc_idx = aq_get_txsc_idx_from_secy(nic->macsec_cfg, secy);
483 	if (txsc_idx < 0)
484 		return -ENOENT;
485 
486 	if (netif_carrier_ok(nic->ndev) && netif_running(secy->netdev))
487 		ret = aq_set_txsc(nic, txsc_idx);
488 
489 	return ret;
490 }
491 
aq_clear_txsc(struct aq_nic_s * nic,const int txsc_idx,enum aq_clear_type clear_type)492 static int aq_clear_txsc(struct aq_nic_s *nic, const int txsc_idx,
493 			 enum aq_clear_type clear_type)
494 {
495 	struct aq_macsec_txsc *tx_sc = &nic->macsec_cfg->aq_txsc[txsc_idx];
496 	struct aq_mss_egress_class_record tx_class_rec = { 0 };
497 	struct aq_mss_egress_sc_record sc_rec = { 0 };
498 	struct aq_hw_s *hw = nic->aq_hw;
499 	int ret = 0;
500 	int sa_num;
501 
502 	for_each_set_bit (sa_num, &tx_sc->tx_sa_idx_busy, AQ_MACSEC_MAX_SA) {
503 		ret = aq_clear_txsa(nic, tx_sc, sa_num, clear_type);
504 		if (ret)
505 			return ret;
506 	}
507 
508 	if (clear_type & AQ_CLEAR_HW) {
509 		ret = aq_mss_set_egress_class_record(hw, &tx_class_rec,
510 						     txsc_idx);
511 		if (ret)
512 			return ret;
513 
514 		sc_rec.fresh = 1;
515 		ret = aq_mss_set_egress_sc_record(hw, &sc_rec,
516 						  tx_sc->hw_sc_idx);
517 		if (ret)
518 			return ret;
519 	}
520 
521 	if (clear_type & AQ_CLEAR_SW) {
522 		clear_bit(txsc_idx, &nic->macsec_cfg->txsc_idx_busy);
523 		nic->macsec_cfg->aq_txsc[txsc_idx].sw_secy = NULL;
524 	}
525 
526 	return ret;
527 }
528 
aq_mdo_del_secy(struct macsec_context * ctx)529 static int aq_mdo_del_secy(struct macsec_context *ctx)
530 {
531 	struct aq_nic_s *nic = macsec_netdev_priv(ctx->netdev);
532 	int ret = 0;
533 
534 	if (!nic->macsec_cfg)
535 		return 0;
536 
537 	ret = aq_clear_secy(nic, ctx->secy, AQ_CLEAR_ALL);
538 
539 	return ret;
540 }
541 
aq_update_txsa(struct aq_nic_s * nic,const unsigned int sc_idx,const struct macsec_secy * secy,const struct macsec_tx_sa * tx_sa,const unsigned char * key,const unsigned char an)542 static int aq_update_txsa(struct aq_nic_s *nic, const unsigned int sc_idx,
543 			  const struct macsec_secy *secy,
544 			  const struct macsec_tx_sa *tx_sa,
545 			  const unsigned char *key, const unsigned char an)
546 {
547 	const u32 next_pn = tx_sa->next_pn_halves.lower;
548 	struct aq_mss_egress_sakey_record key_rec;
549 	const unsigned int sa_idx = sc_idx | an;
550 	struct aq_mss_egress_sa_record sa_rec;
551 	struct aq_hw_s *hw = nic->aq_hw;
552 	int ret = 0;
553 
554 	memset(&sa_rec, 0, sizeof(sa_rec));
555 	sa_rec.valid = tx_sa->active;
556 	sa_rec.fresh = 1;
557 	sa_rec.next_pn = next_pn;
558 
559 	ret = aq_mss_set_egress_sa_record(hw, &sa_rec, sa_idx);
560 	if (ret)
561 		return ret;
562 
563 	if (!key)
564 		return ret;
565 
566 	memset(&key_rec, 0, sizeof(key_rec));
567 	memcpy(&key_rec.key, key, secy->key_len);
568 
569 	aq_rotate_keys(&key_rec.key, secy->key_len);
570 
571 	ret = aq_mss_set_egress_sakey_record(hw, &key_rec, sa_idx);
572 
573 	memzero_explicit(&key_rec, sizeof(key_rec));
574 	return ret;
575 }
576 
aq_mdo_add_txsa(struct macsec_context * ctx)577 static int aq_mdo_add_txsa(struct macsec_context *ctx)
578 {
579 	struct aq_nic_s *nic = macsec_netdev_priv(ctx->netdev);
580 	struct aq_macsec_cfg *cfg = nic->macsec_cfg;
581 	const struct macsec_secy *secy = ctx->secy;
582 	struct aq_macsec_txsc *aq_txsc;
583 	int txsc_idx;
584 	int ret = 0;
585 
586 	txsc_idx = aq_get_txsc_idx_from_secy(cfg, secy);
587 	if (txsc_idx < 0)
588 		return -EINVAL;
589 
590 	aq_txsc = &cfg->aq_txsc[txsc_idx];
591 	set_bit(ctx->sa.assoc_num, &aq_txsc->tx_sa_idx_busy);
592 
593 	memcpy(aq_txsc->tx_sa_key[ctx->sa.assoc_num], ctx->sa.key,
594 	       secy->key_len);
595 
596 	if (netif_carrier_ok(nic->ndev) && netif_running(secy->netdev))
597 		ret = aq_update_txsa(nic, aq_txsc->hw_sc_idx, secy,
598 				     ctx->sa.tx_sa, ctx->sa.key,
599 				     ctx->sa.assoc_num);
600 
601 	return ret;
602 }
603 
aq_mdo_upd_txsa(struct macsec_context * ctx)604 static int aq_mdo_upd_txsa(struct macsec_context *ctx)
605 {
606 	struct aq_nic_s *nic = macsec_netdev_priv(ctx->netdev);
607 	struct aq_macsec_cfg *cfg = nic->macsec_cfg;
608 	const struct macsec_secy *secy = ctx->secy;
609 	struct aq_macsec_txsc *aq_txsc;
610 	int txsc_idx;
611 	int ret = 0;
612 
613 	txsc_idx = aq_get_txsc_idx_from_secy(cfg, secy);
614 	if (txsc_idx < 0)
615 		return -EINVAL;
616 
617 	aq_txsc = &cfg->aq_txsc[txsc_idx];
618 	if (netif_carrier_ok(nic->ndev) && netif_running(secy->netdev))
619 		ret = aq_update_txsa(nic, aq_txsc->hw_sc_idx, secy,
620 				     ctx->sa.tx_sa, NULL, ctx->sa.assoc_num);
621 
622 	return ret;
623 }
624 
aq_clear_txsa(struct aq_nic_s * nic,struct aq_macsec_txsc * aq_txsc,const int sa_num,enum aq_clear_type clear_type)625 static int aq_clear_txsa(struct aq_nic_s *nic, struct aq_macsec_txsc *aq_txsc,
626 			 const int sa_num, enum aq_clear_type clear_type)
627 {
628 	const int sa_idx = aq_txsc->hw_sc_idx | sa_num;
629 	struct aq_hw_s *hw = nic->aq_hw;
630 	int ret = 0;
631 
632 	if (clear_type & AQ_CLEAR_SW)
633 		clear_bit(sa_num, &aq_txsc->tx_sa_idx_busy);
634 
635 	if ((clear_type & AQ_CLEAR_HW) && netif_carrier_ok(nic->ndev)) {
636 		struct aq_mss_egress_sakey_record key_rec;
637 		struct aq_mss_egress_sa_record sa_rec;
638 
639 		memset(&sa_rec, 0, sizeof(sa_rec));
640 		sa_rec.fresh = 1;
641 
642 		ret = aq_mss_set_egress_sa_record(hw, &sa_rec, sa_idx);
643 		if (ret)
644 			return ret;
645 
646 		memset(&key_rec, 0, sizeof(key_rec));
647 		return aq_mss_set_egress_sakey_record(hw, &key_rec, sa_idx);
648 	}
649 
650 	return 0;
651 }
652 
aq_mdo_del_txsa(struct macsec_context * ctx)653 static int aq_mdo_del_txsa(struct macsec_context *ctx)
654 {
655 	struct aq_nic_s *nic = macsec_netdev_priv(ctx->netdev);
656 	struct aq_macsec_cfg *cfg = nic->macsec_cfg;
657 	int txsc_idx;
658 	int ret = 0;
659 
660 	txsc_idx = aq_get_txsc_idx_from_secy(cfg, ctx->secy);
661 	if (txsc_idx < 0)
662 		return -EINVAL;
663 
664 	ret = aq_clear_txsa(nic, &cfg->aq_txsc[txsc_idx], ctx->sa.assoc_num,
665 			    AQ_CLEAR_ALL);
666 
667 	return ret;
668 }
669 
aq_rxsc_validate_frames(const enum macsec_validation_type validate)670 static int aq_rxsc_validate_frames(const enum macsec_validation_type validate)
671 {
672 	switch (validate) {
673 	case MACSEC_VALIDATE_DISABLED:
674 		return 2;
675 	case MACSEC_VALIDATE_CHECK:
676 		return 1;
677 	case MACSEC_VALIDATE_STRICT:
678 		return 0;
679 	default:
680 		WARN_ONCE(true, "Invalid validation type");
681 	}
682 
683 	return 0;
684 }
685 
aq_set_rxsc(struct aq_nic_s * nic,const u32 rxsc_idx)686 static int aq_set_rxsc(struct aq_nic_s *nic, const u32 rxsc_idx)
687 {
688 	const struct aq_macsec_rxsc *aq_rxsc =
689 		&nic->macsec_cfg->aq_rxsc[rxsc_idx];
690 	struct aq_mss_ingress_preclass_record pre_class_record;
691 	const struct macsec_rx_sc *rx_sc = aq_rxsc->sw_rxsc;
692 	const struct macsec_secy *secy = aq_rxsc->sw_secy;
693 	const u32 hw_sc_idx = aq_rxsc->hw_sc_idx;
694 	struct aq_mss_ingress_sc_record sc_record;
695 	struct aq_hw_s *hw = nic->aq_hw;
696 	int ret = 0;
697 
698 	memset(&pre_class_record, 0, sizeof(pre_class_record));
699 	put_unaligned_be64((__force u64)rx_sc->sci, pre_class_record.sci);
700 	pre_class_record.sci_mask = 0xff;
701 	/* match all MACSEC ethertype packets */
702 	pre_class_record.eth_type = ETH_P_MACSEC;
703 	pre_class_record.eth_type_mask = 0x3;
704 
705 	aq_ether_addr_to_mac(pre_class_record.mac_sa, (char *)&rx_sc->sci);
706 	pre_class_record.sa_mask = 0x3f;
707 
708 	pre_class_record.an_mask = nic->macsec_cfg->sc_sa;
709 	pre_class_record.sc_idx = hw_sc_idx;
710 	/* strip SecTAG & forward for decryption */
711 	pre_class_record.action = 0x0;
712 	pre_class_record.valid = 1;
713 
714 	ret = aq_mss_set_ingress_preclass_record(hw, &pre_class_record,
715 						 2 * rxsc_idx + 1);
716 	if (ret)
717 		return ret;
718 
719 	/* If SCI is absent, then match by SA alone */
720 	pre_class_record.sci_mask = 0;
721 	pre_class_record.sci_from_table = 1;
722 
723 	ret = aq_mss_set_ingress_preclass_record(hw, &pre_class_record,
724 						 2 * rxsc_idx);
725 	if (ret)
726 		return ret;
727 
728 	memset(&sc_record, 0, sizeof(sc_record));
729 	sc_record.validate_frames =
730 		aq_rxsc_validate_frames(secy->validate_frames);
731 	if (secy->replay_protect) {
732 		sc_record.replay_protect = 1;
733 		sc_record.anti_replay_window = secy->replay_window;
734 	}
735 	sc_record.valid = 1;
736 	sc_record.fresh = 1;
737 
738 	return aq_mss_set_ingress_sc_record(hw, &sc_record, hw_sc_idx);
739 }
740 
aq_mdo_add_rxsc(struct macsec_context * ctx)741 static int aq_mdo_add_rxsc(struct macsec_context *ctx)
742 {
743 	struct aq_nic_s *nic = macsec_netdev_priv(ctx->netdev);
744 	struct aq_macsec_cfg *cfg = nic->macsec_cfg;
745 	const u32 rxsc_idx_max = aq_sc_idx_max(cfg->sc_sa);
746 	u32 rxsc_idx;
747 	int ret = 0;
748 
749 	if (hweight32(cfg->rxsc_idx_busy) >= rxsc_idx_max)
750 		return -ENOSPC;
751 
752 	rxsc_idx = ffz(cfg->rxsc_idx_busy);
753 	if (rxsc_idx >= rxsc_idx_max)
754 		return -ENOSPC;
755 
756 	cfg->aq_rxsc[rxsc_idx].hw_sc_idx = aq_to_hw_sc_idx(rxsc_idx,
757 							   cfg->sc_sa);
758 	cfg->aq_rxsc[rxsc_idx].sw_secy = ctx->secy;
759 	cfg->aq_rxsc[rxsc_idx].sw_rxsc = ctx->rx_sc;
760 
761 	if (netif_carrier_ok(nic->ndev) && netif_running(ctx->secy->netdev))
762 		ret = aq_set_rxsc(nic, rxsc_idx);
763 
764 	if (ret < 0)
765 		return ret;
766 
767 	set_bit(rxsc_idx, &cfg->rxsc_idx_busy);
768 
769 	return 0;
770 }
771 
aq_mdo_upd_rxsc(struct macsec_context * ctx)772 static int aq_mdo_upd_rxsc(struct macsec_context *ctx)
773 {
774 	struct aq_nic_s *nic = macsec_netdev_priv(ctx->netdev);
775 	int rxsc_idx;
776 	int ret = 0;
777 
778 	rxsc_idx = aq_get_rxsc_idx_from_rxsc(nic->macsec_cfg, ctx->rx_sc);
779 	if (rxsc_idx < 0)
780 		return -ENOENT;
781 
782 	if (netif_carrier_ok(nic->ndev) && netif_running(ctx->secy->netdev))
783 		ret = aq_set_rxsc(nic, rxsc_idx);
784 
785 	return ret;
786 }
787 
aq_clear_rxsc(struct aq_nic_s * nic,const int rxsc_idx,enum aq_clear_type clear_type)788 static int aq_clear_rxsc(struct aq_nic_s *nic, const int rxsc_idx,
789 			 enum aq_clear_type clear_type)
790 {
791 	struct aq_macsec_rxsc *rx_sc = &nic->macsec_cfg->aq_rxsc[rxsc_idx];
792 	struct aq_hw_s *hw = nic->aq_hw;
793 	int ret = 0;
794 	int sa_num;
795 
796 	for_each_set_bit (sa_num, &rx_sc->rx_sa_idx_busy, AQ_MACSEC_MAX_SA) {
797 		ret = aq_clear_rxsa(nic, rx_sc, sa_num, clear_type);
798 		if (ret)
799 			return ret;
800 	}
801 
802 	if (clear_type & AQ_CLEAR_HW) {
803 		struct aq_mss_ingress_preclass_record pre_class_record;
804 		struct aq_mss_ingress_sc_record sc_record;
805 
806 		memset(&pre_class_record, 0, sizeof(pre_class_record));
807 		memset(&sc_record, 0, sizeof(sc_record));
808 
809 		ret = aq_mss_set_ingress_preclass_record(hw, &pre_class_record,
810 							 2 * rxsc_idx);
811 		if (ret)
812 			return ret;
813 
814 		ret = aq_mss_set_ingress_preclass_record(hw, &pre_class_record,
815 							 2 * rxsc_idx + 1);
816 		if (ret)
817 			return ret;
818 
819 		sc_record.fresh = 1;
820 		ret = aq_mss_set_ingress_sc_record(hw, &sc_record,
821 						   rx_sc->hw_sc_idx);
822 		if (ret)
823 			return ret;
824 	}
825 
826 	if (clear_type & AQ_CLEAR_SW) {
827 		clear_bit(rxsc_idx, &nic->macsec_cfg->rxsc_idx_busy);
828 		rx_sc->sw_secy = NULL;
829 		rx_sc->sw_rxsc = NULL;
830 	}
831 
832 	return ret;
833 }
834 
aq_mdo_del_rxsc(struct macsec_context * ctx)835 static int aq_mdo_del_rxsc(struct macsec_context *ctx)
836 {
837 	struct aq_nic_s *nic = macsec_netdev_priv(ctx->netdev);
838 	enum aq_clear_type clear_type = AQ_CLEAR_SW;
839 	int rxsc_idx;
840 	int ret = 0;
841 
842 	rxsc_idx = aq_get_rxsc_idx_from_rxsc(nic->macsec_cfg, ctx->rx_sc);
843 	if (rxsc_idx < 0)
844 		return -ENOENT;
845 
846 	if (netif_carrier_ok(nic->ndev))
847 		clear_type = AQ_CLEAR_ALL;
848 
849 	ret = aq_clear_rxsc(nic, rxsc_idx, clear_type);
850 
851 	return ret;
852 }
853 
aq_update_rxsa(struct aq_nic_s * nic,const unsigned int sc_idx,const struct macsec_secy * secy,const struct macsec_rx_sa * rx_sa,const unsigned char * key,const unsigned char an)854 static int aq_update_rxsa(struct aq_nic_s *nic, const unsigned int sc_idx,
855 			  const struct macsec_secy *secy,
856 			  const struct macsec_rx_sa *rx_sa,
857 			  const unsigned char *key, const unsigned char an)
858 {
859 	struct aq_mss_ingress_sakey_record sa_key_record;
860 	const u32 next_pn = rx_sa->next_pn_halves.lower;
861 	struct aq_mss_ingress_sa_record sa_record;
862 	struct aq_hw_s *hw = nic->aq_hw;
863 	const int sa_idx = sc_idx | an;
864 	int ret = 0;
865 
866 	memset(&sa_record, 0, sizeof(sa_record));
867 	sa_record.valid = rx_sa->active;
868 	sa_record.fresh = 1;
869 	sa_record.next_pn = next_pn;
870 
871 	ret = aq_mss_set_ingress_sa_record(hw, &sa_record, sa_idx);
872 	if (ret)
873 		return ret;
874 
875 	if (!key)
876 		return ret;
877 
878 	memset(&sa_key_record, 0, sizeof(sa_key_record));
879 	memcpy(&sa_key_record.key, key, secy->key_len);
880 
881 	switch (secy->key_len) {
882 	case AQ_MACSEC_KEY_LEN_128_BIT:
883 		sa_key_record.key_len = 0;
884 		break;
885 	case AQ_MACSEC_KEY_LEN_192_BIT:
886 		sa_key_record.key_len = 1;
887 		break;
888 	case AQ_MACSEC_KEY_LEN_256_BIT:
889 		sa_key_record.key_len = 2;
890 		break;
891 	default:
892 		return -1;
893 	}
894 
895 	aq_rotate_keys(&sa_key_record.key, secy->key_len);
896 
897 	ret = aq_mss_set_ingress_sakey_record(hw, &sa_key_record, sa_idx);
898 
899 	memzero_explicit(&sa_key_record, sizeof(sa_key_record));
900 	return ret;
901 }
902 
aq_mdo_add_rxsa(struct macsec_context * ctx)903 static int aq_mdo_add_rxsa(struct macsec_context *ctx)
904 {
905 	struct aq_nic_s *nic = macsec_netdev_priv(ctx->netdev);
906 	const struct macsec_rx_sc *rx_sc = ctx->sa.rx_sa->sc;
907 	const struct macsec_secy *secy = ctx->secy;
908 	struct aq_macsec_rxsc *aq_rxsc;
909 	int rxsc_idx;
910 	int ret = 0;
911 
912 	rxsc_idx = aq_get_rxsc_idx_from_rxsc(nic->macsec_cfg, rx_sc);
913 	if (rxsc_idx < 0)
914 		return -EINVAL;
915 
916 	aq_rxsc = &nic->macsec_cfg->aq_rxsc[rxsc_idx];
917 	set_bit(ctx->sa.assoc_num, &aq_rxsc->rx_sa_idx_busy);
918 
919 	memcpy(aq_rxsc->rx_sa_key[ctx->sa.assoc_num], ctx->sa.key,
920 	       secy->key_len);
921 
922 	if (netif_carrier_ok(nic->ndev) && netif_running(secy->netdev))
923 		ret = aq_update_rxsa(nic, aq_rxsc->hw_sc_idx, secy,
924 				     ctx->sa.rx_sa, ctx->sa.key,
925 				     ctx->sa.assoc_num);
926 
927 	return ret;
928 }
929 
aq_mdo_upd_rxsa(struct macsec_context * ctx)930 static int aq_mdo_upd_rxsa(struct macsec_context *ctx)
931 {
932 	struct aq_nic_s *nic = macsec_netdev_priv(ctx->netdev);
933 	const struct macsec_rx_sc *rx_sc = ctx->sa.rx_sa->sc;
934 	struct aq_macsec_cfg *cfg = nic->macsec_cfg;
935 	const struct macsec_secy *secy = ctx->secy;
936 	int rxsc_idx;
937 	int ret = 0;
938 
939 	rxsc_idx = aq_get_rxsc_idx_from_rxsc(cfg, rx_sc);
940 	if (rxsc_idx < 0)
941 		return -EINVAL;
942 
943 	if (netif_carrier_ok(nic->ndev) && netif_running(secy->netdev))
944 		ret = aq_update_rxsa(nic, cfg->aq_rxsc[rxsc_idx].hw_sc_idx,
945 				     secy, ctx->sa.rx_sa, NULL,
946 				     ctx->sa.assoc_num);
947 
948 	return ret;
949 }
950 
aq_clear_rxsa(struct aq_nic_s * nic,struct aq_macsec_rxsc * aq_rxsc,const int sa_num,enum aq_clear_type clear_type)951 static int aq_clear_rxsa(struct aq_nic_s *nic, struct aq_macsec_rxsc *aq_rxsc,
952 			 const int sa_num, enum aq_clear_type clear_type)
953 {
954 	int sa_idx = aq_rxsc->hw_sc_idx | sa_num;
955 	struct aq_hw_s *hw = nic->aq_hw;
956 	int ret = 0;
957 
958 	if (clear_type & AQ_CLEAR_SW)
959 		clear_bit(sa_num, &aq_rxsc->rx_sa_idx_busy);
960 
961 	if ((clear_type & AQ_CLEAR_HW) && netif_carrier_ok(nic->ndev)) {
962 		struct aq_mss_ingress_sakey_record sa_key_record;
963 		struct aq_mss_ingress_sa_record sa_record;
964 
965 		memset(&sa_key_record, 0, sizeof(sa_key_record));
966 		memset(&sa_record, 0, sizeof(sa_record));
967 		sa_record.fresh = 1;
968 		ret = aq_mss_set_ingress_sa_record(hw, &sa_record, sa_idx);
969 		if (ret)
970 			return ret;
971 
972 		return aq_mss_set_ingress_sakey_record(hw, &sa_key_record,
973 						       sa_idx);
974 	}
975 
976 	return ret;
977 }
978 
aq_mdo_del_rxsa(struct macsec_context * ctx)979 static int aq_mdo_del_rxsa(struct macsec_context *ctx)
980 {
981 	struct aq_nic_s *nic = macsec_netdev_priv(ctx->netdev);
982 	const struct macsec_rx_sc *rx_sc = ctx->sa.rx_sa->sc;
983 	struct aq_macsec_cfg *cfg = nic->macsec_cfg;
984 	int rxsc_idx;
985 	int ret = 0;
986 
987 	rxsc_idx = aq_get_rxsc_idx_from_rxsc(cfg, rx_sc);
988 	if (rxsc_idx < 0)
989 		return -EINVAL;
990 
991 	ret = aq_clear_rxsa(nic, &cfg->aq_rxsc[rxsc_idx], ctx->sa.assoc_num,
992 			    AQ_CLEAR_ALL);
993 
994 	return ret;
995 }
996 
aq_mdo_get_dev_stats(struct macsec_context * ctx)997 static int aq_mdo_get_dev_stats(struct macsec_context *ctx)
998 {
999 	struct aq_nic_s *nic = macsec_netdev_priv(ctx->netdev);
1000 	struct aq_macsec_common_stats *stats = &nic->macsec_cfg->stats;
1001 	struct aq_hw_s *hw = nic->aq_hw;
1002 
1003 	aq_get_macsec_common_stats(hw, stats);
1004 
1005 	ctx->stats.dev_stats->OutPktsUntagged = stats->out.untagged_pkts;
1006 	ctx->stats.dev_stats->InPktsUntagged = stats->in.untagged_pkts;
1007 	ctx->stats.dev_stats->OutPktsTooLong = stats->out.too_long;
1008 	ctx->stats.dev_stats->InPktsNoTag = stats->in.notag_pkts;
1009 	ctx->stats.dev_stats->InPktsBadTag = stats->in.bad_tag_pkts;
1010 	ctx->stats.dev_stats->InPktsUnknownSCI = stats->in.unknown_sci_pkts;
1011 	ctx->stats.dev_stats->InPktsNoSCI = stats->in.no_sci_pkts;
1012 	ctx->stats.dev_stats->InPktsOverrun = 0;
1013 
1014 	return 0;
1015 }
1016 
aq_mdo_get_tx_sc_stats(struct macsec_context * ctx)1017 static int aq_mdo_get_tx_sc_stats(struct macsec_context *ctx)
1018 {
1019 	struct aq_nic_s *nic = macsec_netdev_priv(ctx->netdev);
1020 	struct aq_macsec_tx_sc_stats *stats;
1021 	struct aq_hw_s *hw = nic->aq_hw;
1022 	struct aq_macsec_txsc *aq_txsc;
1023 	int txsc_idx;
1024 
1025 	txsc_idx = aq_get_txsc_idx_from_secy(nic->macsec_cfg, ctx->secy);
1026 	if (txsc_idx < 0)
1027 		return -ENOENT;
1028 
1029 	aq_txsc = &nic->macsec_cfg->aq_txsc[txsc_idx];
1030 	stats = &aq_txsc->stats;
1031 	aq_get_txsc_stats(hw, aq_txsc->hw_sc_idx, stats);
1032 
1033 	ctx->stats.tx_sc_stats->OutPktsProtected = stats->sc_protected_pkts;
1034 	ctx->stats.tx_sc_stats->OutPktsEncrypted = stats->sc_encrypted_pkts;
1035 	ctx->stats.tx_sc_stats->OutOctetsProtected = stats->sc_protected_octets;
1036 	ctx->stats.tx_sc_stats->OutOctetsEncrypted = stats->sc_encrypted_octets;
1037 
1038 	return 0;
1039 }
1040 
aq_mdo_get_tx_sa_stats(struct macsec_context * ctx)1041 static int aq_mdo_get_tx_sa_stats(struct macsec_context *ctx)
1042 {
1043 	struct aq_nic_s *nic = macsec_netdev_priv(ctx->netdev);
1044 	struct aq_macsec_cfg *cfg = nic->macsec_cfg;
1045 	struct aq_macsec_tx_sa_stats *stats;
1046 	struct aq_hw_s *hw = nic->aq_hw;
1047 	const struct macsec_secy *secy;
1048 	struct aq_macsec_txsc *aq_txsc;
1049 	struct macsec_tx_sa *tx_sa;
1050 	unsigned int sa_idx;
1051 	int txsc_idx;
1052 	u32 next_pn;
1053 	int ret;
1054 
1055 	txsc_idx = aq_get_txsc_idx_from_secy(cfg, ctx->secy);
1056 	if (txsc_idx < 0)
1057 		return -EINVAL;
1058 
1059 	aq_txsc = &cfg->aq_txsc[txsc_idx];
1060 	sa_idx = aq_txsc->hw_sc_idx | ctx->sa.assoc_num;
1061 	stats = &aq_txsc->tx_sa_stats[ctx->sa.assoc_num];
1062 	ret = aq_get_txsa_stats(hw, sa_idx, stats);
1063 	if (ret)
1064 		return ret;
1065 
1066 	ctx->stats.tx_sa_stats->OutPktsProtected = stats->sa_protected_pkts;
1067 	ctx->stats.tx_sa_stats->OutPktsEncrypted = stats->sa_encrypted_pkts;
1068 
1069 	secy = aq_txsc->sw_secy;
1070 	tx_sa = rcu_dereference_bh(secy->tx_sc.sa[ctx->sa.assoc_num]);
1071 	ret = aq_get_txsa_next_pn(hw, sa_idx, &next_pn);
1072 	if (ret == 0) {
1073 		spin_lock_bh(&tx_sa->lock);
1074 		tx_sa->next_pn = next_pn;
1075 		spin_unlock_bh(&tx_sa->lock);
1076 	}
1077 
1078 	return ret;
1079 }
1080 
aq_mdo_get_rx_sc_stats(struct macsec_context * ctx)1081 static int aq_mdo_get_rx_sc_stats(struct macsec_context *ctx)
1082 {
1083 	struct aq_nic_s *nic = macsec_netdev_priv(ctx->netdev);
1084 	struct aq_macsec_cfg *cfg = nic->macsec_cfg;
1085 	struct aq_macsec_rx_sa_stats *stats;
1086 	struct aq_hw_s *hw = nic->aq_hw;
1087 	struct aq_macsec_rxsc *aq_rxsc;
1088 	unsigned int sa_idx;
1089 	int rxsc_idx;
1090 	int ret = 0;
1091 	int i;
1092 
1093 	rxsc_idx = aq_get_rxsc_idx_from_rxsc(cfg, ctx->rx_sc);
1094 	if (rxsc_idx < 0)
1095 		return -ENOENT;
1096 
1097 	aq_rxsc = &cfg->aq_rxsc[rxsc_idx];
1098 	for (i = 0; i < MACSEC_NUM_AN; i++) {
1099 		if (!test_bit(i, &aq_rxsc->rx_sa_idx_busy))
1100 			continue;
1101 
1102 		stats = &aq_rxsc->rx_sa_stats[i];
1103 		sa_idx = aq_rxsc->hw_sc_idx | i;
1104 		ret = aq_get_rxsa_stats(hw, sa_idx, stats);
1105 		if (ret)
1106 			break;
1107 
1108 		ctx->stats.rx_sc_stats->InOctetsValidated +=
1109 			stats->validated_octets;
1110 		ctx->stats.rx_sc_stats->InOctetsDecrypted +=
1111 			stats->decrypted_octets;
1112 		ctx->stats.rx_sc_stats->InPktsUnchecked +=
1113 			stats->unchecked_pkts;
1114 		ctx->stats.rx_sc_stats->InPktsDelayed += stats->delayed_pkts;
1115 		ctx->stats.rx_sc_stats->InPktsOK += stats->ok_pkts;
1116 		ctx->stats.rx_sc_stats->InPktsInvalid += stats->invalid_pkts;
1117 		ctx->stats.rx_sc_stats->InPktsLate += stats->late_pkts;
1118 		ctx->stats.rx_sc_stats->InPktsNotValid += stats->not_valid_pkts;
1119 		ctx->stats.rx_sc_stats->InPktsNotUsingSA += stats->not_using_sa;
1120 		ctx->stats.rx_sc_stats->InPktsUnusedSA += stats->unused_sa;
1121 	}
1122 
1123 	return ret;
1124 }
1125 
aq_mdo_get_rx_sa_stats(struct macsec_context * ctx)1126 static int aq_mdo_get_rx_sa_stats(struct macsec_context *ctx)
1127 {
1128 	struct aq_nic_s *nic = macsec_netdev_priv(ctx->netdev);
1129 	struct aq_macsec_cfg *cfg = nic->macsec_cfg;
1130 	struct aq_macsec_rx_sa_stats *stats;
1131 	struct aq_hw_s *hw = nic->aq_hw;
1132 	struct aq_macsec_rxsc *aq_rxsc;
1133 	struct macsec_rx_sa *rx_sa;
1134 	unsigned int sa_idx;
1135 	int rxsc_idx;
1136 	u32 next_pn;
1137 	int ret;
1138 
1139 	rxsc_idx = aq_get_rxsc_idx_from_rxsc(cfg, ctx->rx_sc);
1140 	if (rxsc_idx < 0)
1141 		return -EINVAL;
1142 
1143 	aq_rxsc = &cfg->aq_rxsc[rxsc_idx];
1144 	stats = &aq_rxsc->rx_sa_stats[ctx->sa.assoc_num];
1145 	sa_idx = aq_rxsc->hw_sc_idx | ctx->sa.assoc_num;
1146 	ret = aq_get_rxsa_stats(hw, sa_idx, stats);
1147 	if (ret)
1148 		return ret;
1149 
1150 	ctx->stats.rx_sa_stats->InPktsOK = stats->ok_pkts;
1151 	ctx->stats.rx_sa_stats->InPktsInvalid = stats->invalid_pkts;
1152 	ctx->stats.rx_sa_stats->InPktsNotValid = stats->not_valid_pkts;
1153 	ctx->stats.rx_sa_stats->InPktsNotUsingSA = stats->not_using_sa;
1154 	ctx->stats.rx_sa_stats->InPktsUnusedSA = stats->unused_sa;
1155 
1156 	rx_sa = rcu_dereference_bh(aq_rxsc->sw_rxsc->sa[ctx->sa.assoc_num]);
1157 	ret = aq_get_rxsa_next_pn(hw, sa_idx, &next_pn);
1158 	if (ret == 0) {
1159 		spin_lock_bh(&rx_sa->lock);
1160 		rx_sa->next_pn = next_pn;
1161 		spin_unlock_bh(&rx_sa->lock);
1162 	}
1163 
1164 	return ret;
1165 }
1166 
apply_txsc_cfg(struct aq_nic_s * nic,const int txsc_idx)1167 static int apply_txsc_cfg(struct aq_nic_s *nic, const int txsc_idx)
1168 {
1169 	struct aq_macsec_txsc *aq_txsc = &nic->macsec_cfg->aq_txsc[txsc_idx];
1170 	const struct macsec_secy *secy = aq_txsc->sw_secy;
1171 	struct macsec_tx_sa *tx_sa;
1172 	int ret = 0;
1173 	int i;
1174 
1175 	if (!netif_running(secy->netdev))
1176 		return ret;
1177 
1178 	ret = aq_set_txsc(nic, txsc_idx);
1179 	if (ret)
1180 		return ret;
1181 
1182 	for (i = 0; i < MACSEC_NUM_AN; i++) {
1183 		tx_sa = rcu_dereference_bh(secy->tx_sc.sa[i]);
1184 		if (tx_sa) {
1185 			ret = aq_update_txsa(nic, aq_txsc->hw_sc_idx, secy,
1186 					     tx_sa, aq_txsc->tx_sa_key[i], i);
1187 			if (ret)
1188 				return ret;
1189 		}
1190 	}
1191 
1192 	return ret;
1193 }
1194 
apply_rxsc_cfg(struct aq_nic_s * nic,const int rxsc_idx)1195 static int apply_rxsc_cfg(struct aq_nic_s *nic, const int rxsc_idx)
1196 {
1197 	struct aq_macsec_rxsc *aq_rxsc = &nic->macsec_cfg->aq_rxsc[rxsc_idx];
1198 	const struct macsec_secy *secy = aq_rxsc->sw_secy;
1199 	struct macsec_rx_sa *rx_sa;
1200 	int ret = 0;
1201 	int i;
1202 
1203 	if (!netif_running(secy->netdev))
1204 		return ret;
1205 
1206 	ret = aq_set_rxsc(nic, rxsc_idx);
1207 	if (ret)
1208 		return ret;
1209 
1210 	for (i = 0; i < MACSEC_NUM_AN; i++) {
1211 		rx_sa = rcu_dereference_bh(aq_rxsc->sw_rxsc->sa[i]);
1212 		if (rx_sa) {
1213 			ret = aq_update_rxsa(nic, aq_rxsc->hw_sc_idx, secy,
1214 					     rx_sa, aq_rxsc->rx_sa_key[i], i);
1215 			if (ret)
1216 				return ret;
1217 		}
1218 	}
1219 
1220 	return ret;
1221 }
1222 
aq_clear_secy(struct aq_nic_s * nic,const struct macsec_secy * secy,enum aq_clear_type clear_type)1223 static int aq_clear_secy(struct aq_nic_s *nic, const struct macsec_secy *secy,
1224 			 enum aq_clear_type clear_type)
1225 {
1226 	struct macsec_rx_sc *rx_sc;
1227 	int txsc_idx;
1228 	int rxsc_idx;
1229 	int ret = 0;
1230 
1231 	txsc_idx = aq_get_txsc_idx_from_secy(nic->macsec_cfg, secy);
1232 	if (txsc_idx >= 0) {
1233 		ret = aq_clear_txsc(nic, txsc_idx, clear_type);
1234 		if (ret)
1235 			return ret;
1236 	}
1237 
1238 	for (rx_sc = rcu_dereference_bh(secy->rx_sc); rx_sc;
1239 	     rx_sc = rcu_dereference_bh(rx_sc->next)) {
1240 		rxsc_idx = aq_get_rxsc_idx_from_rxsc(nic->macsec_cfg, rx_sc);
1241 		if (rxsc_idx < 0)
1242 			continue;
1243 
1244 		ret = aq_clear_rxsc(nic, rxsc_idx, clear_type);
1245 		if (ret)
1246 			return ret;
1247 	}
1248 
1249 	return ret;
1250 }
1251 
aq_apply_secy_cfg(struct aq_nic_s * nic,const struct macsec_secy * secy)1252 static int aq_apply_secy_cfg(struct aq_nic_s *nic,
1253 			     const struct macsec_secy *secy)
1254 {
1255 	struct macsec_rx_sc *rx_sc;
1256 	int txsc_idx;
1257 	int rxsc_idx;
1258 	int ret = 0;
1259 
1260 	txsc_idx = aq_get_txsc_idx_from_secy(nic->macsec_cfg, secy);
1261 	if (txsc_idx >= 0)
1262 		apply_txsc_cfg(nic, txsc_idx);
1263 
1264 	for (rx_sc = rcu_dereference_bh(secy->rx_sc); rx_sc && rx_sc->active;
1265 	     rx_sc = rcu_dereference_bh(rx_sc->next)) {
1266 		rxsc_idx = aq_get_rxsc_idx_from_rxsc(nic->macsec_cfg, rx_sc);
1267 		if (unlikely(rxsc_idx < 0))
1268 			continue;
1269 
1270 		ret = apply_rxsc_cfg(nic, rxsc_idx);
1271 		if (ret)
1272 			return ret;
1273 	}
1274 
1275 	return ret;
1276 }
1277 
aq_apply_macsec_cfg(struct aq_nic_s * nic)1278 static int aq_apply_macsec_cfg(struct aq_nic_s *nic)
1279 {
1280 	int ret = 0;
1281 	int i;
1282 
1283 	for (i = 0; i < AQ_MACSEC_MAX_SC; i++) {
1284 		if (nic->macsec_cfg->txsc_idx_busy & BIT(i)) {
1285 			ret = apply_txsc_cfg(nic, i);
1286 			if (ret)
1287 				return ret;
1288 		}
1289 	}
1290 
1291 	for (i = 0; i < AQ_MACSEC_MAX_SC; i++) {
1292 		if (nic->macsec_cfg->rxsc_idx_busy & BIT(i)) {
1293 			ret = apply_rxsc_cfg(nic, i);
1294 			if (ret)
1295 				return ret;
1296 		}
1297 	}
1298 
1299 	return ret;
1300 }
1301 
aq_sa_from_sa_idx(const enum aq_macsec_sc_sa sc_sa,const int sa_idx)1302 static int aq_sa_from_sa_idx(const enum aq_macsec_sc_sa sc_sa, const int sa_idx)
1303 {
1304 	switch (sc_sa) {
1305 	case aq_macsec_sa_sc_4sa_8sc:
1306 		return sa_idx & 3;
1307 	case aq_macsec_sa_sc_2sa_16sc:
1308 		return sa_idx & 1;
1309 	case aq_macsec_sa_sc_1sa_32sc:
1310 		return 0;
1311 	default:
1312 		WARN_ONCE(true, "Invalid sc_sa");
1313 	}
1314 	return -EINVAL;
1315 }
1316 
aq_sc_idx_from_sa_idx(const enum aq_macsec_sc_sa sc_sa,const int sa_idx)1317 static int aq_sc_idx_from_sa_idx(const enum aq_macsec_sc_sa sc_sa,
1318 				 const int sa_idx)
1319 {
1320 	switch (sc_sa) {
1321 	case aq_macsec_sa_sc_4sa_8sc:
1322 		return sa_idx & ~3;
1323 	case aq_macsec_sa_sc_2sa_16sc:
1324 		return sa_idx & ~1;
1325 	case aq_macsec_sa_sc_1sa_32sc:
1326 		return sa_idx;
1327 	default:
1328 		WARN_ONCE(true, "Invalid sc_sa");
1329 	}
1330 	return -EINVAL;
1331 }
1332 
aq_check_txsa_expiration(struct aq_nic_s * nic)1333 static void aq_check_txsa_expiration(struct aq_nic_s *nic)
1334 {
1335 	u32 egress_sa_expired, egress_sa_threshold_expired;
1336 	struct aq_macsec_cfg *cfg = nic->macsec_cfg;
1337 	struct aq_hw_s *hw = nic->aq_hw;
1338 	struct aq_macsec_txsc *aq_txsc;
1339 	const struct macsec_secy *secy;
1340 	int sc_idx = 0, txsc_idx = 0;
1341 	enum aq_macsec_sc_sa sc_sa;
1342 	struct macsec_tx_sa *tx_sa;
1343 	unsigned char an = 0;
1344 	int ret;
1345 	int i;
1346 
1347 	sc_sa = cfg->sc_sa;
1348 
1349 	ret = aq_mss_get_egress_sa_expired(hw, &egress_sa_expired);
1350 	if (unlikely(ret))
1351 		return;
1352 
1353 	ret = aq_mss_get_egress_sa_threshold_expired(hw,
1354 		&egress_sa_threshold_expired);
1355 
1356 	for (i = 0; i < AQ_MACSEC_MAX_SA; i++) {
1357 		if (egress_sa_expired & BIT(i)) {
1358 			an = aq_sa_from_sa_idx(sc_sa, i);
1359 			sc_idx = aq_sc_idx_from_sa_idx(sc_sa, i);
1360 			txsc_idx = aq_get_txsc_idx_from_sc_idx(sc_sa, sc_idx);
1361 			if (txsc_idx < 0)
1362 				continue;
1363 
1364 			aq_txsc = &cfg->aq_txsc[txsc_idx];
1365 			if (!(cfg->txsc_idx_busy & BIT(txsc_idx))) {
1366 				netdev_warn(nic->ndev,
1367 					"PN threshold expired on invalid TX SC");
1368 				continue;
1369 			}
1370 
1371 			secy = aq_txsc->sw_secy;
1372 			if (!netif_running(secy->netdev)) {
1373 				netdev_warn(nic->ndev,
1374 					"PN threshold expired on down TX SC");
1375 				continue;
1376 			}
1377 
1378 			if (unlikely(!(aq_txsc->tx_sa_idx_busy & BIT(an)))) {
1379 				netdev_warn(nic->ndev,
1380 					"PN threshold expired on invalid TX SA");
1381 				continue;
1382 			}
1383 
1384 			tx_sa = rcu_dereference_bh(secy->tx_sc.sa[an]);
1385 			macsec_pn_wrapped((struct macsec_secy *)secy, tx_sa);
1386 		}
1387 	}
1388 
1389 	aq_mss_set_egress_sa_expired(hw, egress_sa_expired);
1390 	if (likely(!ret))
1391 		aq_mss_set_egress_sa_threshold_expired(hw,
1392 			egress_sa_threshold_expired);
1393 }
1394 
1395 #define AQ_LOCKED_MDO_DEF(mdo)						\
1396 static int aq_locked_mdo_##mdo(struct macsec_context *ctx)		\
1397 {									\
1398 	struct aq_nic_s *nic = macsec_netdev_priv(ctx->netdev);		\
1399 	int ret;							\
1400 	mutex_lock(&nic->macsec_mutex);					\
1401 	ret = aq_mdo_##mdo(ctx);					\
1402 	mutex_unlock(&nic->macsec_mutex);				\
1403 	return ret;							\
1404 }
1405 
1406 AQ_LOCKED_MDO_DEF(dev_open)
1407 AQ_LOCKED_MDO_DEF(dev_stop)
1408 AQ_LOCKED_MDO_DEF(add_secy)
1409 AQ_LOCKED_MDO_DEF(upd_secy)
1410 AQ_LOCKED_MDO_DEF(del_secy)
1411 AQ_LOCKED_MDO_DEF(add_rxsc)
1412 AQ_LOCKED_MDO_DEF(upd_rxsc)
1413 AQ_LOCKED_MDO_DEF(del_rxsc)
1414 AQ_LOCKED_MDO_DEF(add_rxsa)
1415 AQ_LOCKED_MDO_DEF(upd_rxsa)
1416 AQ_LOCKED_MDO_DEF(del_rxsa)
1417 AQ_LOCKED_MDO_DEF(add_txsa)
1418 AQ_LOCKED_MDO_DEF(upd_txsa)
1419 AQ_LOCKED_MDO_DEF(del_txsa)
1420 AQ_LOCKED_MDO_DEF(get_dev_stats)
1421 AQ_LOCKED_MDO_DEF(get_tx_sc_stats)
1422 AQ_LOCKED_MDO_DEF(get_tx_sa_stats)
1423 AQ_LOCKED_MDO_DEF(get_rx_sc_stats)
1424 AQ_LOCKED_MDO_DEF(get_rx_sa_stats)
1425 
1426 const struct macsec_ops aq_macsec_ops = {
1427 	.mdo_dev_open = aq_locked_mdo_dev_open,
1428 	.mdo_dev_stop = aq_locked_mdo_dev_stop,
1429 	.mdo_add_secy = aq_locked_mdo_add_secy,
1430 	.mdo_upd_secy = aq_locked_mdo_upd_secy,
1431 	.mdo_del_secy = aq_locked_mdo_del_secy,
1432 	.mdo_add_rxsc = aq_locked_mdo_add_rxsc,
1433 	.mdo_upd_rxsc = aq_locked_mdo_upd_rxsc,
1434 	.mdo_del_rxsc = aq_locked_mdo_del_rxsc,
1435 	.mdo_add_rxsa = aq_locked_mdo_add_rxsa,
1436 	.mdo_upd_rxsa = aq_locked_mdo_upd_rxsa,
1437 	.mdo_del_rxsa = aq_locked_mdo_del_rxsa,
1438 	.mdo_add_txsa = aq_locked_mdo_add_txsa,
1439 	.mdo_upd_txsa = aq_locked_mdo_upd_txsa,
1440 	.mdo_del_txsa = aq_locked_mdo_del_txsa,
1441 	.mdo_get_dev_stats = aq_locked_mdo_get_dev_stats,
1442 	.mdo_get_tx_sc_stats = aq_locked_mdo_get_tx_sc_stats,
1443 	.mdo_get_tx_sa_stats = aq_locked_mdo_get_tx_sa_stats,
1444 	.mdo_get_rx_sc_stats = aq_locked_mdo_get_rx_sc_stats,
1445 	.mdo_get_rx_sa_stats = aq_locked_mdo_get_rx_sa_stats,
1446 };
1447 
aq_macsec_init(struct aq_nic_s * nic)1448 int aq_macsec_init(struct aq_nic_s *nic)
1449 {
1450 	struct aq_macsec_cfg *cfg;
1451 	u32 caps_lo;
1452 
1453 	if (!nic->aq_fw_ops->get_link_capabilities)
1454 		return 0;
1455 
1456 	caps_lo = nic->aq_fw_ops->get_link_capabilities(nic->aq_hw);
1457 
1458 	if (!(caps_lo & BIT(CAPS_LO_MACSEC)))
1459 		return 0;
1460 
1461 	nic->macsec_cfg = kzalloc_obj(*cfg);
1462 	if (!nic->macsec_cfg)
1463 		return -ENOMEM;
1464 
1465 	nic->ndev->features |= NETIF_F_HW_MACSEC;
1466 	nic->ndev->macsec_ops = &aq_macsec_ops;
1467 	mutex_init(&nic->macsec_mutex);
1468 
1469 	return 0;
1470 }
1471 
aq_macsec_free(struct aq_nic_s * nic)1472 void aq_macsec_free(struct aq_nic_s *nic)
1473 {
1474 	kfree(nic->macsec_cfg);
1475 	nic->macsec_cfg = NULL;
1476 }
1477 
aq_macsec_enable(struct aq_nic_s * nic)1478 int aq_macsec_enable(struct aq_nic_s *nic)
1479 {
1480 	u32 ctl_ether_types[1] = { ETH_P_PAE };
1481 	struct macsec_msg_fw_response resp = { 0 };
1482 	struct macsec_msg_fw_request msg = { 0 };
1483 	struct aq_hw_s *hw = nic->aq_hw;
1484 	int num_ctl_ether_types = 0;
1485 	int index = 0, tbl_idx;
1486 	int ret;
1487 
1488 	if (!nic->macsec_cfg)
1489 		return 0;
1490 
1491 	mutex_lock(&nic->macsec_mutex);
1492 
1493 	if (nic->aq_fw_ops->send_macsec_req) {
1494 		struct macsec_cfg_request cfg = { 0 };
1495 
1496 		cfg.enabled = 1;
1497 		cfg.egress_threshold = 0xffffffff;
1498 		cfg.ingress_threshold = 0xffffffff;
1499 		cfg.interrupts_enabled = 1;
1500 
1501 		msg.msg_type = macsec_cfg_msg;
1502 		msg.cfg = cfg;
1503 
1504 		ret = nic->aq_fw_ops->send_macsec_req(hw, &msg, &resp);
1505 		if (ret)
1506 			goto unlock;
1507 	}
1508 
1509 	/* Init Ethertype bypass filters */
1510 	for (index = 0; index < ARRAY_SIZE(ctl_ether_types); index++) {
1511 		struct aq_mss_ingress_prectlf_record rx_prectlf_rec;
1512 		struct aq_mss_egress_ctlf_record tx_ctlf_rec;
1513 
1514 		if (ctl_ether_types[index] == 0)
1515 			continue;
1516 
1517 		memset(&tx_ctlf_rec, 0, sizeof(tx_ctlf_rec));
1518 		tx_ctlf_rec.eth_type = ctl_ether_types[index];
1519 		tx_ctlf_rec.match_type = 4; /* Match eth_type only */
1520 		tx_ctlf_rec.match_mask = 0xf; /* match for eth_type */
1521 		tx_ctlf_rec.action = 0; /* Bypass MACSEC modules */
1522 		tbl_idx = NUMROWS_EGRESSCTLFRECORD - num_ctl_ether_types - 1;
1523 		aq_mss_set_egress_ctlf_record(hw, &tx_ctlf_rec, tbl_idx);
1524 
1525 		memset(&rx_prectlf_rec, 0, sizeof(rx_prectlf_rec));
1526 		rx_prectlf_rec.eth_type = ctl_ether_types[index];
1527 		rx_prectlf_rec.match_type = 4; /* Match eth_type only */
1528 		rx_prectlf_rec.match_mask = 0xf; /* match for eth_type */
1529 		rx_prectlf_rec.action = 0; /* Bypass MACSEC modules */
1530 		tbl_idx =
1531 			NUMROWS_INGRESSPRECTLFRECORD - num_ctl_ether_types - 1;
1532 		aq_mss_set_ingress_prectlf_record(hw, &rx_prectlf_rec, tbl_idx);
1533 
1534 		num_ctl_ether_types++;
1535 	}
1536 
1537 	ret = aq_apply_macsec_cfg(nic);
1538 
1539 unlock:
1540 	mutex_unlock(&nic->macsec_mutex);
1541 	return ret;
1542 }
1543 
aq_macsec_work(struct aq_nic_s * nic)1544 void aq_macsec_work(struct aq_nic_s *nic)
1545 {
1546 	if (!nic->macsec_cfg)
1547 		return;
1548 
1549 	if (!netif_carrier_ok(nic->ndev))
1550 		return;
1551 
1552 	mutex_lock(&nic->macsec_mutex);
1553 	aq_check_txsa_expiration(nic);
1554 	mutex_unlock(&nic->macsec_mutex);
1555 }
1556 
aq_macsec_rx_sa_cnt(struct aq_nic_s * nic)1557 int aq_macsec_rx_sa_cnt(struct aq_nic_s *nic)
1558 {
1559 	struct aq_macsec_cfg *cfg = nic->macsec_cfg;
1560 	int i, cnt = 0;
1561 
1562 	if (!cfg)
1563 		return 0;
1564 
1565 	mutex_lock(&nic->macsec_mutex);
1566 
1567 	for (i = 0; i < AQ_MACSEC_MAX_SC; i++) {
1568 		if (!test_bit(i, &cfg->rxsc_idx_busy))
1569 			continue;
1570 		cnt += hweight_long(cfg->aq_rxsc[i].rx_sa_idx_busy);
1571 	}
1572 
1573 	mutex_unlock(&nic->macsec_mutex);
1574 	return cnt;
1575 }
1576 
aq_macsec_tx_sc_cnt(struct aq_nic_s * nic)1577 int aq_macsec_tx_sc_cnt(struct aq_nic_s *nic)
1578 {
1579 	int cnt;
1580 
1581 	if (!nic->macsec_cfg)
1582 		return 0;
1583 
1584 	mutex_lock(&nic->macsec_mutex);
1585 	cnt = hweight_long(nic->macsec_cfg->txsc_idx_busy);
1586 	mutex_unlock(&nic->macsec_mutex);
1587 
1588 	return cnt;
1589 }
1590 
aq_macsec_tx_sa_cnt(struct aq_nic_s * nic)1591 int aq_macsec_tx_sa_cnt(struct aq_nic_s *nic)
1592 {
1593 	struct aq_macsec_cfg *cfg = nic->macsec_cfg;
1594 	int i, cnt = 0;
1595 
1596 	if (!cfg)
1597 		return 0;
1598 
1599 	mutex_lock(&nic->macsec_mutex);
1600 
1601 	for (i = 0; i < AQ_MACSEC_MAX_SC; i++) {
1602 		if (!test_bit(i, &cfg->txsc_idx_busy))
1603 			continue;
1604 		cnt += hweight_long(cfg->aq_txsc[i].tx_sa_idx_busy);
1605 	}
1606 
1607 	mutex_unlock(&nic->macsec_mutex);
1608 	return cnt;
1609 }
1610 
aq_macsec_update_stats(struct aq_nic_s * nic)1611 static int aq_macsec_update_stats(struct aq_nic_s *nic)
1612 {
1613 	struct aq_macsec_cfg *cfg = nic->macsec_cfg;
1614 	struct aq_hw_s *hw = nic->aq_hw;
1615 	struct aq_macsec_txsc *aq_txsc;
1616 	struct aq_macsec_rxsc *aq_rxsc;
1617 	int i, sa_idx, assoc_num;
1618 	int ret = 0;
1619 
1620 	aq_get_macsec_common_stats(hw, &cfg->stats);
1621 
1622 	for (i = 0; i < AQ_MACSEC_MAX_SC; i++) {
1623 		if (!(cfg->txsc_idx_busy & BIT(i)))
1624 			continue;
1625 		aq_txsc = &cfg->aq_txsc[i];
1626 
1627 		ret = aq_get_txsc_stats(hw, aq_txsc->hw_sc_idx,
1628 					&aq_txsc->stats);
1629 		if (ret)
1630 			return ret;
1631 
1632 		for (assoc_num = 0; assoc_num < MACSEC_NUM_AN; assoc_num++) {
1633 			if (!test_bit(assoc_num, &aq_txsc->tx_sa_idx_busy))
1634 				continue;
1635 			sa_idx = aq_txsc->hw_sc_idx | assoc_num;
1636 			ret = aq_get_txsa_stats(hw, sa_idx,
1637 					      &aq_txsc->tx_sa_stats[assoc_num]);
1638 			if (ret)
1639 				return ret;
1640 		}
1641 	}
1642 
1643 	for (i = 0; i < AQ_MACSEC_MAX_SC; i++) {
1644 		if (!(test_bit(i, &cfg->rxsc_idx_busy)))
1645 			continue;
1646 		aq_rxsc = &cfg->aq_rxsc[i];
1647 
1648 		for (assoc_num = 0; assoc_num < MACSEC_NUM_AN; assoc_num++) {
1649 			if (!test_bit(assoc_num, &aq_rxsc->rx_sa_idx_busy))
1650 				continue;
1651 			sa_idx = aq_rxsc->hw_sc_idx | assoc_num;
1652 
1653 			ret = aq_get_rxsa_stats(hw, sa_idx,
1654 					      &aq_rxsc->rx_sa_stats[assoc_num]);
1655 			if (ret)
1656 				return ret;
1657 		}
1658 	}
1659 
1660 	return ret;
1661 }
1662 
aq_macsec_get_stats(struct aq_nic_s * nic,u64 * data)1663 u64 *aq_macsec_get_stats(struct aq_nic_s *nic, u64 *data)
1664 {
1665 	struct aq_macsec_cfg *cfg = nic->macsec_cfg;
1666 	struct aq_macsec_common_stats *common_stats;
1667 	struct aq_macsec_tx_sc_stats *txsc_stats;
1668 	struct aq_macsec_tx_sa_stats *txsa_stats;
1669 	struct aq_macsec_rx_sa_stats *rxsa_stats;
1670 	struct aq_macsec_txsc *aq_txsc;
1671 	struct aq_macsec_rxsc *aq_rxsc;
1672 	unsigned int assoc_num;
1673 	unsigned int sc_num;
1674 	unsigned int i = 0U;
1675 
1676 	if (!cfg)
1677 		return data;
1678 
1679 	mutex_lock(&nic->macsec_mutex);
1680 
1681 	aq_macsec_update_stats(nic);
1682 
1683 	common_stats = &cfg->stats;
1684 	data[i] = common_stats->in.ctl_pkts;
1685 	data[++i] = common_stats->in.tagged_miss_pkts;
1686 	data[++i] = common_stats->in.untagged_miss_pkts;
1687 	data[++i] = common_stats->in.notag_pkts;
1688 	data[++i] = common_stats->in.untagged_pkts;
1689 	data[++i] = common_stats->in.bad_tag_pkts;
1690 	data[++i] = common_stats->in.no_sci_pkts;
1691 	data[++i] = common_stats->in.unknown_sci_pkts;
1692 	data[++i] = common_stats->in.ctrl_prt_pass_pkts;
1693 	data[++i] = common_stats->in.unctrl_prt_pass_pkts;
1694 	data[++i] = common_stats->in.ctrl_prt_fail_pkts;
1695 	data[++i] = common_stats->in.unctrl_prt_fail_pkts;
1696 	data[++i] = common_stats->in.too_long_pkts;
1697 	data[++i] = common_stats->in.igpoc_ctl_pkts;
1698 	data[++i] = common_stats->in.ecc_error_pkts;
1699 	data[++i] = common_stats->in.unctrl_hit_drop_redir;
1700 	data[++i] = common_stats->out.ctl_pkts;
1701 	data[++i] = common_stats->out.unknown_sa_pkts;
1702 	data[++i] = common_stats->out.untagged_pkts;
1703 	data[++i] = common_stats->out.too_long;
1704 	data[++i] = common_stats->out.ecc_error_pkts;
1705 	data[++i] = common_stats->out.unctrl_hit_drop_redir;
1706 
1707 	for (sc_num = 0; sc_num < AQ_MACSEC_MAX_SC; sc_num++) {
1708 		if (!(test_bit(sc_num, &cfg->txsc_idx_busy)))
1709 			continue;
1710 
1711 		aq_txsc = &cfg->aq_txsc[sc_num];
1712 		txsc_stats = &aq_txsc->stats;
1713 
1714 		data[++i] = txsc_stats->sc_protected_pkts;
1715 		data[++i] = txsc_stats->sc_encrypted_pkts;
1716 		data[++i] = txsc_stats->sc_protected_octets;
1717 		data[++i] = txsc_stats->sc_encrypted_octets;
1718 
1719 		for (assoc_num = 0; assoc_num < MACSEC_NUM_AN; assoc_num++) {
1720 			if (!test_bit(assoc_num, &aq_txsc->tx_sa_idx_busy))
1721 				continue;
1722 
1723 			txsa_stats = &aq_txsc->tx_sa_stats[assoc_num];
1724 
1725 			data[++i] = txsa_stats->sa_hit_drop_redirect;
1726 			data[++i] = txsa_stats->sa_protected2_pkts;
1727 			data[++i] = txsa_stats->sa_protected_pkts;
1728 			data[++i] = txsa_stats->sa_encrypted_pkts;
1729 		}
1730 	}
1731 
1732 	for (sc_num = 0; sc_num < AQ_MACSEC_MAX_SC; sc_num++) {
1733 		if (!(test_bit(sc_num, &cfg->rxsc_idx_busy)))
1734 			continue;
1735 
1736 		aq_rxsc = &cfg->aq_rxsc[sc_num];
1737 
1738 		for (assoc_num = 0; assoc_num < MACSEC_NUM_AN; assoc_num++) {
1739 			if (!test_bit(assoc_num, &aq_rxsc->rx_sa_idx_busy))
1740 				continue;
1741 
1742 			rxsa_stats = &aq_rxsc->rx_sa_stats[assoc_num];
1743 
1744 			data[++i] = rxsa_stats->untagged_hit_pkts;
1745 			data[++i] = rxsa_stats->ctrl_hit_drop_redir_pkts;
1746 			data[++i] = rxsa_stats->not_using_sa;
1747 			data[++i] = rxsa_stats->unused_sa;
1748 			data[++i] = rxsa_stats->not_valid_pkts;
1749 			data[++i] = rxsa_stats->invalid_pkts;
1750 			data[++i] = rxsa_stats->ok_pkts;
1751 			data[++i] = rxsa_stats->late_pkts;
1752 			data[++i] = rxsa_stats->delayed_pkts;
1753 			data[++i] = rxsa_stats->unchecked_pkts;
1754 			data[++i] = rxsa_stats->validated_octets;
1755 			data[++i] = rxsa_stats->decrypted_octets;
1756 		}
1757 	}
1758 
1759 	i++;
1760 
1761 	data += i;
1762 
1763 	mutex_unlock(&nic->macsec_mutex);
1764 
1765 	return data;
1766 }
1767