1 // SPDX-License-Identifier: MIT
2 /*
3 * Copyright 2023 Advanced Micro Devices, Inc.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be included in
13 * all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
21 * OTHER DEALINGS IN THE SOFTWARE.
22 *
23 * Authors: AMD
24 *
25 */
26
27 #include <drm/drm_print.h>
28 #include <drm/drm_plane.h>
29 #include <drm/drm_property.h>
30 #include <drm/drm_colorop.h>
31
32 #include "amdgpu.h"
33 #include "amdgpu_dm_colorop.h"
34 #include "dc.h"
35
36 const u64 amdgpu_dm_supported_degam_tfs =
37 BIT(DRM_COLOROP_1D_CURVE_SRGB_EOTF) |
38 BIT(DRM_COLOROP_1D_CURVE_PQ_125_EOTF) |
39 BIT(DRM_COLOROP_1D_CURVE_BT2020_INV_OETF) |
40 BIT(DRM_COLOROP_1D_CURVE_GAMMA22_INV);
41
42 const u64 amdgpu_dm_supported_shaper_tfs =
43 BIT(DRM_COLOROP_1D_CURVE_SRGB_INV_EOTF) |
44 BIT(DRM_COLOROP_1D_CURVE_PQ_125_INV_EOTF) |
45 BIT(DRM_COLOROP_1D_CURVE_BT2020_OETF) |
46 BIT(DRM_COLOROP_1D_CURVE_GAMMA22);
47
48 const u64 amdgpu_dm_supported_blnd_tfs =
49 BIT(DRM_COLOROP_1D_CURVE_SRGB_EOTF) |
50 BIT(DRM_COLOROP_1D_CURVE_PQ_125_EOTF) |
51 BIT(DRM_COLOROP_1D_CURVE_BT2020_INV_OETF) |
52 BIT(DRM_COLOROP_1D_CURVE_GAMMA22_INV);
53
54 #define MAX_COLOR_PIPELINE_OPS 10
55
56 #define LUT3D_SIZE 17
57
amdgpu_dm_initialize_default_pipeline(struct drm_plane * plane,struct drm_prop_enum_list * list)58 int amdgpu_dm_initialize_default_pipeline(struct drm_plane *plane, struct drm_prop_enum_list *list)
59 {
60 struct drm_colorop *ops[MAX_COLOR_PIPELINE_OPS];
61 struct drm_device *dev = plane->dev;
62 struct amdgpu_device *adev = drm_to_adev(dev);
63 int ret;
64 int i = 0;
65
66 memset(ops, 0, sizeof(ops));
67
68 /* 1D curve - DEGAM TF */
69 ops[i] = kzalloc(sizeof(*ops[0]), GFP_KERNEL);
70 if (!ops[i]) {
71 ret = -ENOMEM;
72 goto cleanup;
73 }
74
75 ret = drm_plane_colorop_curve_1d_init(dev, ops[i], plane,
76 amdgpu_dm_supported_degam_tfs,
77 DRM_COLOROP_FLAG_ALLOW_BYPASS);
78 if (ret)
79 goto cleanup;
80
81 list->type = ops[i]->base.id;
82 list->name = kasprintf(GFP_KERNEL, "Color Pipeline %d", ops[i]->base.id);
83
84 i++;
85
86 /* Multiplier */
87 ops[i] = kzalloc(sizeof(struct drm_colorop), GFP_KERNEL);
88 if (!ops[i]) {
89 ret = -ENOMEM;
90 goto cleanup;
91 }
92
93 ret = drm_plane_colorop_mult_init(dev, ops[i], plane, DRM_COLOROP_FLAG_ALLOW_BYPASS);
94 if (ret)
95 goto cleanup;
96
97 drm_colorop_set_next_property(ops[i-1], ops[i]);
98
99 i++;
100
101 /* 3x4 matrix */
102 ops[i] = kzalloc(sizeof(struct drm_colorop), GFP_KERNEL);
103 if (!ops[i]) {
104 ret = -ENOMEM;
105 goto cleanup;
106 }
107
108 ret = drm_plane_colorop_ctm_3x4_init(dev, ops[i], plane, DRM_COLOROP_FLAG_ALLOW_BYPASS);
109 if (ret)
110 goto cleanup;
111
112 drm_colorop_set_next_property(ops[i-1], ops[i]);
113
114 i++;
115
116 if (adev->dm.dc->caps.color.dpp.hw_3d_lut) {
117 /* 1D curve - SHAPER TF */
118 ops[i] = kzalloc(sizeof(*ops[0]), GFP_KERNEL);
119 if (!ops[i]) {
120 ret = -ENOMEM;
121 goto cleanup;
122 }
123
124 ret = drm_plane_colorop_curve_1d_init(dev, ops[i], plane,
125 amdgpu_dm_supported_shaper_tfs,
126 DRM_COLOROP_FLAG_ALLOW_BYPASS);
127 if (ret)
128 goto cleanup;
129
130 drm_colorop_set_next_property(ops[i-1], ops[i]);
131
132 i++;
133
134 /* 1D LUT - SHAPER LUT */
135 ops[i] = kzalloc(sizeof(*ops[0]), GFP_KERNEL);
136 if (!ops[i]) {
137 ret = -ENOMEM;
138 goto cleanup;
139 }
140
141 ret = drm_plane_colorop_curve_1d_lut_init(dev, ops[i], plane, MAX_COLOR_LUT_ENTRIES,
142 DRM_COLOROP_LUT1D_INTERPOLATION_LINEAR,
143 DRM_COLOROP_FLAG_ALLOW_BYPASS);
144 if (ret)
145 goto cleanup;
146
147 drm_colorop_set_next_property(ops[i-1], ops[i]);
148
149 i++;
150
151 /* 3D LUT */
152 ops[i] = kzalloc(sizeof(*ops[0]), GFP_KERNEL);
153 if (!ops[i]) {
154 ret = -ENOMEM;
155 goto cleanup;
156 }
157
158 ret = drm_plane_colorop_3dlut_init(dev, ops[i], plane, LUT3D_SIZE,
159 DRM_COLOROP_LUT3D_INTERPOLATION_TETRAHEDRAL,
160 DRM_COLOROP_FLAG_ALLOW_BYPASS);
161 if (ret)
162 goto cleanup;
163
164 drm_colorop_set_next_property(ops[i-1], ops[i]);
165
166 i++;
167 }
168
169 /* 1D curve - BLND TF */
170 ops[i] = kzalloc(sizeof(*ops[0]), GFP_KERNEL);
171 if (!ops[i]) {
172 ret = -ENOMEM;
173 goto cleanup;
174 }
175
176 ret = drm_plane_colorop_curve_1d_init(dev, ops[i], plane,
177 amdgpu_dm_supported_blnd_tfs,
178 DRM_COLOROP_FLAG_ALLOW_BYPASS);
179 if (ret)
180 goto cleanup;
181
182 drm_colorop_set_next_property(ops[i - 1], ops[i]);
183
184 i++;
185
186 /* 1D LUT - BLND LUT */
187 ops[i] = kzalloc(sizeof(struct drm_colorop), GFP_KERNEL);
188 if (!ops[i]) {
189 ret = -ENOMEM;
190 goto cleanup;
191 }
192
193 ret = drm_plane_colorop_curve_1d_lut_init(dev, ops[i], plane, MAX_COLOR_LUT_ENTRIES,
194 DRM_COLOROP_LUT1D_INTERPOLATION_LINEAR,
195 DRM_COLOROP_FLAG_ALLOW_BYPASS);
196 if (ret)
197 goto cleanup;
198
199 drm_colorop_set_next_property(ops[i-1], ops[i]);
200 return 0;
201
202 cleanup:
203 if (ret == -ENOMEM)
204 drm_err(plane->dev, "KMS: Failed to allocate colorop\n");
205
206 drm_colorop_pipeline_destroy(dev);
207
208 return ret;
209 }
210