1 // SPDX-License-Identifier: MIT
2 /*
3 * Copyright 2023 Advanced Micro Devices, Inc.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be included in
13 * all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
21 * OTHER DEALINGS IN THE SOFTWARE.
22 *
23 * Authors: AMD
24 *
25 */
26
27 #include <drm/drm_print.h>
28 #include <drm/drm_plane.h>
29 #include <drm/drm_property.h>
30 #include <drm/drm_colorop.h>
31
32 #include "amdgpu.h"
33 #include "amdgpu_dm_colorop.h"
34 #include "dc.h"
35
36 const u64 amdgpu_dm_supported_degam_tfs =
37 BIT(DRM_COLOROP_1D_CURVE_SRGB_EOTF) |
38 BIT(DRM_COLOROP_1D_CURVE_PQ_125_EOTF) |
39 BIT(DRM_COLOROP_1D_CURVE_BT2020_INV_OETF) |
40 BIT(DRM_COLOROP_1D_CURVE_GAMMA22_INV);
41
42 const u64 amdgpu_dm_supported_shaper_tfs =
43 BIT(DRM_COLOROP_1D_CURVE_SRGB_INV_EOTF) |
44 BIT(DRM_COLOROP_1D_CURVE_PQ_125_INV_EOTF) |
45 BIT(DRM_COLOROP_1D_CURVE_BT2020_OETF) |
46 BIT(DRM_COLOROP_1D_CURVE_GAMMA22);
47
48 const u64 amdgpu_dm_supported_blnd_tfs =
49 BIT(DRM_COLOROP_1D_CURVE_SRGB_EOTF) |
50 BIT(DRM_COLOROP_1D_CURVE_PQ_125_EOTF) |
51 BIT(DRM_COLOROP_1D_CURVE_BT2020_INV_OETF) |
52 BIT(DRM_COLOROP_1D_CURVE_GAMMA22_INV);
53
54 #define MAX_COLOR_PIPELINE_OPS 10
55
56 #define LUT3D_SIZE 17
57
amdgpu_dm_initialize_default_pipeline(struct drm_plane * plane,struct drm_prop_enum_list * list)58 int amdgpu_dm_initialize_default_pipeline(struct drm_plane *plane, struct drm_prop_enum_list *list)
59 {
60 struct drm_colorop *ops[MAX_COLOR_PIPELINE_OPS];
61 struct drm_device *dev = plane->dev;
62 struct amdgpu_device *adev = drm_to_adev(dev);
63 int ret;
64 int i = 0;
65
66 memset(ops, 0, sizeof(ops));
67
68 /* 1D curve - DEGAM TF */
69 ops[i] = kzalloc(sizeof(*ops[0]), GFP_KERNEL);
70 if (!ops[i]) {
71 ret = -ENOMEM;
72 goto cleanup;
73 }
74
75 ret = drm_plane_colorop_curve_1d_init(dev, ops[i], plane,
76 amdgpu_dm_supported_degam_tfs,
77 DRM_COLOROP_FLAG_ALLOW_BYPASS);
78 if (ret)
79 goto cleanup;
80
81 list->type = ops[i]->base.id;
82
83 i++;
84
85 /* Multiplier */
86 ops[i] = kzalloc(sizeof(struct drm_colorop), GFP_KERNEL);
87 if (!ops[i]) {
88 ret = -ENOMEM;
89 goto cleanup;
90 }
91
92 ret = drm_plane_colorop_mult_init(dev, ops[i], plane, DRM_COLOROP_FLAG_ALLOW_BYPASS);
93 if (ret)
94 goto cleanup;
95
96 drm_colorop_set_next_property(ops[i-1], ops[i]);
97
98 i++;
99
100 /* 3x4 matrix */
101 ops[i] = kzalloc(sizeof(struct drm_colorop), GFP_KERNEL);
102 if (!ops[i]) {
103 ret = -ENOMEM;
104 goto cleanup;
105 }
106
107 ret = drm_plane_colorop_ctm_3x4_init(dev, ops[i], plane, DRM_COLOROP_FLAG_ALLOW_BYPASS);
108 if (ret)
109 goto cleanup;
110
111 drm_colorop_set_next_property(ops[i-1], ops[i]);
112
113 i++;
114
115 if (adev->dm.dc->caps.color.dpp.hw_3d_lut) {
116 /* 1D curve - SHAPER TF */
117 ops[i] = kzalloc(sizeof(*ops[0]), GFP_KERNEL);
118 if (!ops[i]) {
119 ret = -ENOMEM;
120 goto cleanup;
121 }
122
123 ret = drm_plane_colorop_curve_1d_init(dev, ops[i], plane,
124 amdgpu_dm_supported_shaper_tfs,
125 DRM_COLOROP_FLAG_ALLOW_BYPASS);
126 if (ret)
127 goto cleanup;
128
129 drm_colorop_set_next_property(ops[i-1], ops[i]);
130
131 i++;
132
133 /* 1D LUT - SHAPER LUT */
134 ops[i] = kzalloc(sizeof(*ops[0]), GFP_KERNEL);
135 if (!ops[i]) {
136 ret = -ENOMEM;
137 goto cleanup;
138 }
139
140 ret = drm_plane_colorop_curve_1d_lut_init(dev, ops[i], plane, MAX_COLOR_LUT_ENTRIES,
141 DRM_COLOROP_LUT1D_INTERPOLATION_LINEAR,
142 DRM_COLOROP_FLAG_ALLOW_BYPASS);
143 if (ret)
144 goto cleanup;
145
146 drm_colorop_set_next_property(ops[i-1], ops[i]);
147
148 i++;
149
150 /* 3D LUT */
151 ops[i] = kzalloc(sizeof(*ops[0]), GFP_KERNEL);
152 if (!ops[i]) {
153 ret = -ENOMEM;
154 goto cleanup;
155 }
156
157 ret = drm_plane_colorop_3dlut_init(dev, ops[i], plane, LUT3D_SIZE,
158 DRM_COLOROP_LUT3D_INTERPOLATION_TETRAHEDRAL,
159 DRM_COLOROP_FLAG_ALLOW_BYPASS);
160 if (ret)
161 goto cleanup;
162
163 drm_colorop_set_next_property(ops[i-1], ops[i]);
164
165 i++;
166 }
167
168 /* 1D curve - BLND TF */
169 ops[i] = kzalloc(sizeof(*ops[0]), GFP_KERNEL);
170 if (!ops[i]) {
171 ret = -ENOMEM;
172 goto cleanup;
173 }
174
175 ret = drm_plane_colorop_curve_1d_init(dev, ops[i], plane,
176 amdgpu_dm_supported_blnd_tfs,
177 DRM_COLOROP_FLAG_ALLOW_BYPASS);
178 if (ret)
179 goto cleanup;
180
181 drm_colorop_set_next_property(ops[i - 1], ops[i]);
182
183 i++;
184
185 /* 1D LUT - BLND LUT */
186 ops[i] = kzalloc(sizeof(struct drm_colorop), GFP_KERNEL);
187 if (!ops[i]) {
188 ret = -ENOMEM;
189 goto cleanup;
190 }
191
192 ret = drm_plane_colorop_curve_1d_lut_init(dev, ops[i], plane, MAX_COLOR_LUT_ENTRIES,
193 DRM_COLOROP_LUT1D_INTERPOLATION_LINEAR,
194 DRM_COLOROP_FLAG_ALLOW_BYPASS);
195 if (ret)
196 goto cleanup;
197
198 drm_colorop_set_next_property(ops[i-1], ops[i]);
199
200 list->name = kasprintf(GFP_KERNEL, "Color Pipeline %d", ops[0]->base.id);
201
202 return 0;
203
204 cleanup:
205 if (ret == -ENOMEM)
206 drm_err(plane->dev, "KMS: Failed to allocate colorop\n");
207
208 drm_colorop_pipeline_destroy(dev);
209
210 return ret;
211 }
212