1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * linux/arch/alpha/kernel/setup.c 4 * 5 * Copyright (C) 1995 Linus Torvalds 6 */ 7 8 /* 2.3.x bootmem, 1999 Andrea Arcangeli <andrea@suse.de> */ 9 10 /* 11 * Bootup setup stuff. 12 */ 13 14 #include <linux/sched.h> 15 #include <linux/kernel.h> 16 #include <linux/mm.h> 17 #include <linux/stddef.h> 18 #include <linux/unistd.h> 19 #include <linux/ptrace.h> 20 #include <linux/slab.h> 21 #include <linux/user.h> 22 #include <linux/screen_info.h> 23 #include <linux/delay.h> 24 #include <linux/mc146818rtc.h> 25 #include <linux/console.h> 26 #include <linux/cpu.h> 27 #include <linux/errno.h> 28 #include <linux/init.h> 29 #include <linux/string.h> 30 #include <linux/ioport.h> 31 #include <linux/panic_notifier.h> 32 #include <linux/platform_device.h> 33 #include <linux/memblock.h> 34 #include <linux/pci.h> 35 #include <linux/seq_file.h> 36 #include <linux/root_dev.h> 37 #include <linux/initrd.h> 38 #include <linux/eisa.h> 39 #include <linux/pfn.h> 40 #ifdef CONFIG_MAGIC_SYSRQ 41 #include <linux/sysrq.h> 42 #include <linux/reboot.h> 43 #endif 44 #include <linux/notifier.h> 45 #include <asm/setup.h> 46 #include <asm/io.h> 47 #include <linux/log2.h> 48 #include <linux/export.h> 49 50 static int alpha_panic_event(struct notifier_block *, unsigned long, void *); 51 static struct notifier_block alpha_panic_block = { 52 alpha_panic_event, 53 NULL, 54 INT_MAX /* try to do it first */ 55 }; 56 57 #include <linux/uaccess.h> 58 #include <asm/hwrpb.h> 59 #include <asm/dma.h> 60 #include <asm/mmu_context.h> 61 #include <asm/console.h> 62 63 #include "proto.h" 64 #include "pci_impl.h" 65 66 67 struct hwrpb_struct *hwrpb; 68 EXPORT_SYMBOL(hwrpb); 69 unsigned long srm_hae; 70 71 int alpha_l1i_cacheshape; 72 int alpha_l1d_cacheshape; 73 int alpha_l2_cacheshape; 74 int alpha_l3_cacheshape; 75 76 #ifdef CONFIG_VERBOSE_MCHECK 77 /* 0=minimum, 1=verbose, 2=all */ 78 /* These can be overridden via the command line, ie "verbose_mcheck=2") */ 79 unsigned long alpha_verbose_mcheck = CONFIG_VERBOSE_MCHECK_ON; 80 #endif 81 82 /* Which processor we booted from. */ 83 int boot_cpuid; 84 85 /* 86 * Using SRM callbacks for initial console output. This works from 87 * setup_arch() time through the end of time_init(), as those places 88 * are under our (Alpha) control. 89 90 * "srmcons" specified in the boot command arguments allows us to 91 * see kernel messages during the period of time before the true 92 * console device is "registered" during console_init(). 93 * As of this version (2.5.59), console_init() will call 94 * disable_early_printk() as the last action before initializing 95 * the console drivers. That's the last possible time srmcons can be 96 * unregistered without interfering with console behavior. 97 * 98 * By default, OFF; set it with a bootcommand arg of "srmcons" or 99 * "console=srm". The meaning of these two args is: 100 * "srmcons" - early callback prints 101 * "console=srm" - full callback based console, including early prints 102 */ 103 int srmcons_output = 0; 104 105 /* Enforce a memory size limit; useful for testing. By default, none. */ 106 unsigned long mem_size_limit = 0; 107 108 /* Set AGP GART window size (0 means disabled). */ 109 unsigned long alpha_agpgart_size = DEFAULT_AGP_APER_SIZE; 110 111 #ifdef CONFIG_ALPHA_GENERIC 112 struct alpha_machine_vector alpha_mv; 113 EXPORT_SYMBOL(alpha_mv); 114 #endif 115 116 #ifndef alpha_using_srm 117 int alpha_using_srm; 118 EXPORT_SYMBOL(alpha_using_srm); 119 #endif 120 121 #ifndef alpha_using_qemu 122 int alpha_using_qemu; 123 #endif 124 125 static struct alpha_machine_vector *get_sysvec(unsigned long, unsigned long, 126 unsigned long); 127 static struct alpha_machine_vector *get_sysvec_byname(const char *); 128 static void get_sysnames(unsigned long, unsigned long, unsigned long, 129 char **, char **); 130 static void determine_cpu_caches (unsigned int); 131 132 static char __initdata command_line[COMMAND_LINE_SIZE]; 133 134 #ifdef CONFIG_VGA_CONSOLE 135 /* 136 * The format of "screen_info" is strange, and due to early 137 * i386-setup code. This is just enough to make the console 138 * code think we're on a VGA color display. 139 */ 140 141 struct screen_info vgacon_screen_info = { 142 .orig_x = 0, 143 .orig_y = 25, 144 .orig_video_cols = 80, 145 .orig_video_lines = 25, 146 .orig_video_isVGA = 1, 147 .orig_video_points = 16 148 }; 149 #endif 150 151 /* 152 * The direct map I/O window, if any. This should be the same 153 * for all busses, since it's used by virt_to_bus. 154 */ 155 156 unsigned long __direct_map_base; 157 unsigned long __direct_map_size; 158 EXPORT_SYMBOL(__direct_map_base); 159 EXPORT_SYMBOL(__direct_map_size); 160 161 /* 162 * Declare all of the machine vectors. 163 */ 164 165 /* GCC 2.7.2 (on alpha at least) is lame. It does not support either 166 __attribute__((weak)) or #pragma weak. Bypass it and talk directly 167 to the assembler. */ 168 169 #define WEAK(X) \ 170 extern struct alpha_machine_vector X; \ 171 asm(".weak "#X) 172 173 WEAK(alcor_mv); 174 WEAK(clipper_mv); 175 WEAK(dp264_mv); 176 WEAK(eb164_mv); 177 WEAK(eiger_mv); 178 WEAK(lx164_mv); 179 WEAK(marvel_ev7_mv); 180 WEAK(miata_mv); 181 WEAK(mikasa_primo_mv); 182 WEAK(monet_mv); 183 WEAK(nautilus_mv); 184 WEAK(noritake_primo_mv); 185 WEAK(pc164_mv); 186 WEAK(privateer_mv); 187 WEAK(rawhide_mv); 188 WEAK(ruffian_mv); 189 WEAK(rx164_mv); 190 WEAK(sable_gamma_mv); 191 WEAK(shark_mv); 192 WEAK(sx164_mv); 193 WEAK(takara_mv); 194 WEAK(titan_mv); 195 WEAK(webbrick_mv); 196 WEAK(wildfire_mv); 197 WEAK(xlt_mv); 198 199 #undef WEAK 200 201 /* 202 * I/O resources inherited from PeeCees. Except for perhaps the 203 * turbochannel alphas, everyone has these on some sort of SuperIO chip. 204 * 205 * ??? If this becomes less standard, move the struct out into the 206 * machine vector. 207 */ 208 209 static void __init 210 reserve_std_resources(void) 211 { 212 static struct resource standard_io_resources[] = { 213 { .name = "rtc", .start = 0x70, .end = 0x7f}, 214 { .name = "dma1", .start = 0x00, .end = 0x1f }, 215 { .name = "pic1", .start = 0x20, .end = 0x3f }, 216 { .name = "timer", .start = 0x40, .end = 0x5f }, 217 { .name = "keyboard", .start = 0x60, .end = 0x6f }, 218 { .name = "dma page reg", .start = 0x80, .end = 0x8f }, 219 { .name = "pic2", .start = 0xa0, .end = 0xbf }, 220 { .name = "dma2", .start = 0xc0, .end = 0xdf }, 221 }; 222 223 struct resource *io = &ioport_resource; 224 size_t i; 225 226 if (hose_head) { 227 struct pci_controller *hose; 228 for (hose = hose_head; hose; hose = hose->next) 229 if (hose->index == 0) { 230 io = hose->io_space; 231 break; 232 } 233 } 234 235 for (i = 0; i < ARRAY_SIZE(standard_io_resources); ++i) 236 request_resource(io, standard_io_resources+i); 237 } 238 239 #define PFN_MAX PFN_DOWN(0x80000000) 240 #define for_each_mem_cluster(memdesc, _cluster, i) \ 241 for ((_cluster) = (memdesc)->cluster, (i) = 0; \ 242 (i) < (memdesc)->numclusters; (i)++, (_cluster)++) 243 244 static unsigned long __init 245 get_mem_size_limit(char *s) 246 { 247 unsigned long end = 0; 248 char *from = s; 249 250 end = simple_strtoul(from, &from, 0); 251 if ( *from == 'K' || *from == 'k' ) { 252 end = end << 10; 253 from++; 254 } else if ( *from == 'M' || *from == 'm' ) { 255 end = end << 20; 256 from++; 257 } else if ( *from == 'G' || *from == 'g' ) { 258 end = end << 30; 259 from++; 260 } 261 return end >> PAGE_SHIFT; /* Return the PFN of the limit. */ 262 } 263 264 #ifdef CONFIG_BLK_DEV_INITRD 265 void * __init 266 move_initrd(unsigned long mem_limit) 267 { 268 void *start; 269 unsigned long size; 270 271 size = initrd_end - initrd_start; 272 start = memblock_alloc(PAGE_ALIGN(size), PAGE_SIZE); 273 if (!start || __pa(start) + size > mem_limit) { 274 initrd_start = initrd_end = 0; 275 return NULL; 276 } 277 memmove(start, (void *)initrd_start, size); 278 initrd_start = (unsigned long)start; 279 initrd_end = initrd_start + size; 280 printk("initrd moved to %p\n", start); 281 return start; 282 } 283 #endif 284 285 static void __init 286 setup_memory(void *kernel_end) 287 { 288 struct memclust_struct * cluster; 289 struct memdesc_struct * memdesc; 290 unsigned long kernel_size; 291 unsigned long i; 292 293 /* Find free clusters, and init and free the bootmem accordingly. */ 294 memdesc = (struct memdesc_struct *) 295 (hwrpb->mddt_offset + (unsigned long) hwrpb); 296 297 for_each_mem_cluster(memdesc, cluster, i) { 298 unsigned long end; 299 300 printk("memcluster %lu, usage %01lx, start %8lu, end %8lu\n", 301 i, cluster->usage, cluster->start_pfn, 302 cluster->start_pfn + cluster->numpages); 303 304 end = cluster->start_pfn + cluster->numpages; 305 if (end > max_low_pfn) 306 max_low_pfn = end; 307 308 memblock_add(PFN_PHYS(cluster->start_pfn), 309 cluster->numpages << PAGE_SHIFT); 310 311 /* Bit 0 is console/PALcode reserved. Bit 1 is 312 non-volatile memory -- we might want to mark 313 this for later. */ 314 if (cluster->usage & 3) 315 memblock_reserve(PFN_PHYS(cluster->start_pfn), 316 cluster->numpages << PAGE_SHIFT); 317 } 318 319 /* 320 * Except for the NUMA systems (wildfire, marvel) all of the 321 * Alpha systems we run on support 32GB of memory or less. 322 * Since the NUMA systems introduce large holes in memory addressing, 323 * we can get into a situation where there is not enough contiguous 324 * memory for the memory map. 325 * 326 * Limit memory to the first 32GB to limit the NUMA systems to 327 * memory on their first node (wildfire) or 2 (marvel) to avoid 328 * not being able to produce the memory map. In order to access 329 * all of the memory on the NUMA systems, build with discontiguous 330 * memory support. 331 * 332 * If the user specified a memory limit, let that memory limit stand. 333 */ 334 if (!mem_size_limit) 335 mem_size_limit = (32ul * 1024 * 1024 * 1024) >> PAGE_SHIFT; 336 337 if (mem_size_limit && max_low_pfn >= mem_size_limit) 338 { 339 printk("setup: forcing memory size to %ldK (from %ldK).\n", 340 mem_size_limit << (PAGE_SHIFT - 10), 341 max_low_pfn << (PAGE_SHIFT - 10)); 342 max_low_pfn = mem_size_limit; 343 } 344 345 /* Reserve the kernel memory. */ 346 kernel_size = virt_to_phys(kernel_end) - KERNEL_START_PHYS; 347 memblock_reserve(KERNEL_START_PHYS, kernel_size); 348 349 #ifdef CONFIG_BLK_DEV_INITRD 350 initrd_start = INITRD_START; 351 if (initrd_start) { 352 initrd_end = initrd_start+INITRD_SIZE; 353 printk("Initial ramdisk at: 0x%p (%lu bytes)\n", 354 (void *) initrd_start, INITRD_SIZE); 355 356 if ((void *)initrd_end > phys_to_virt(PFN_PHYS(max_low_pfn))) { 357 if (!move_initrd(PFN_PHYS(max_low_pfn))) 358 printk("initrd extends beyond end of memory " 359 "(0x%08lx > 0x%p)\ndisabling initrd\n", 360 initrd_end, 361 phys_to_virt(PFN_PHYS(max_low_pfn))); 362 } else { 363 memblock_reserve(virt_to_phys((void *)initrd_start), 364 INITRD_SIZE); 365 } 366 } 367 #endif /* CONFIG_BLK_DEV_INITRD */ 368 } 369 370 int page_is_ram(unsigned long pfn) 371 { 372 struct memclust_struct * cluster; 373 struct memdesc_struct * memdesc; 374 unsigned long i; 375 376 memdesc = (struct memdesc_struct *) 377 (hwrpb->mddt_offset + (unsigned long) hwrpb); 378 for_each_mem_cluster(memdesc, cluster, i) 379 { 380 if (pfn >= cluster->start_pfn && 381 pfn < cluster->start_pfn + cluster->numpages) { 382 return (cluster->usage & 3) ? 0 : 1; 383 } 384 } 385 386 return 0; 387 } 388 389 static int __init 390 register_cpus(void) 391 { 392 int i; 393 394 for_each_possible_cpu(i) { 395 struct cpu *p = kzalloc(sizeof(*p), GFP_KERNEL); 396 if (!p) 397 return -ENOMEM; 398 register_cpu(p, i); 399 } 400 return 0; 401 } 402 403 arch_initcall(register_cpus); 404 405 #ifdef CONFIG_MAGIC_SYSRQ 406 static void sysrq_reboot_handler(u8 unused) 407 { 408 machine_halt(); 409 } 410 411 static const struct sysrq_key_op srm_sysrq_reboot_op = { 412 .handler = sysrq_reboot_handler, 413 .help_msg = "reboot(b)", 414 .action_msg = "Resetting", 415 .enable_mask = SYSRQ_ENABLE_BOOT, 416 }; 417 #endif 418 419 void __init 420 setup_arch(char **cmdline_p) 421 { 422 extern char _end[]; 423 424 struct alpha_machine_vector *vec = NULL; 425 struct percpu_struct *cpu; 426 char *type_name, *var_name, *p; 427 void *kernel_end = _end; /* end of kernel */ 428 char *args = command_line; 429 430 hwrpb = (struct hwrpb_struct*) __va(INIT_HWRPB->phys_addr); 431 boot_cpuid = hard_smp_processor_id(); 432 433 /* 434 * Pre-process the system type to make sure it will be valid. 435 * 436 * This may restore real CABRIO and EB66+ family names, ie 437 * EB64+ and EB66. 438 * 439 * Oh, and "white box" AS800 (aka DIGITAL Server 3000 series) 440 * and AS1200 (DIGITAL Server 5000 series) have the type as 441 * the negative of the real one. 442 */ 443 if ((long)hwrpb->sys_type < 0) { 444 hwrpb->sys_type = -((long)hwrpb->sys_type); 445 hwrpb_update_checksum(hwrpb); 446 } 447 448 /* Register a call for panic conditions. */ 449 atomic_notifier_chain_register(&panic_notifier_list, 450 &alpha_panic_block); 451 452 #ifndef alpha_using_srm 453 /* Assume that we've booted from SRM if we haven't booted from MILO. 454 Detect the later by looking for "MILO" in the system serial nr. */ 455 alpha_using_srm = !str_has_prefix((const char *)hwrpb->ssn, "MILO"); 456 #endif 457 #ifndef alpha_using_qemu 458 /* Similarly, look for QEMU. */ 459 alpha_using_qemu = strstr((const char *)hwrpb->ssn, "QEMU") != 0; 460 #endif 461 462 /* If we are using SRM, we want to allow callbacks 463 as early as possible, so do this NOW, and then 464 they should work immediately thereafter. 465 */ 466 kernel_end = callback_init(kernel_end); 467 468 /* 469 * Locate the command line. 470 */ 471 strscpy(command_line, COMMAND_LINE, sizeof(command_line)); 472 strcpy(boot_command_line, command_line); 473 *cmdline_p = command_line; 474 475 /* 476 * Process command-line arguments. 477 */ 478 while ((p = strsep(&args, " \t")) != NULL) { 479 if (!*p) continue; 480 if (strncmp(p, "alpha_mv=", 9) == 0) { 481 vec = get_sysvec_byname(p+9); 482 continue; 483 } 484 if (strncmp(p, "cycle=", 6) == 0) { 485 est_cycle_freq = simple_strtol(p+6, NULL, 0); 486 continue; 487 } 488 if (strncmp(p, "mem=", 4) == 0) { 489 mem_size_limit = get_mem_size_limit(p+4); 490 continue; 491 } 492 if (strncmp(p, "srmcons", 7) == 0) { 493 srmcons_output |= 1; 494 continue; 495 } 496 if (strncmp(p, "console=srm", 11) == 0) { 497 srmcons_output |= 2; 498 continue; 499 } 500 if (strncmp(p, "gartsize=", 9) == 0) { 501 alpha_agpgart_size = 502 get_mem_size_limit(p+9) << PAGE_SHIFT; 503 continue; 504 } 505 #ifdef CONFIG_VERBOSE_MCHECK 506 if (strncmp(p, "verbose_mcheck=", 15) == 0) { 507 alpha_verbose_mcheck = simple_strtol(p+15, NULL, 0); 508 continue; 509 } 510 #endif 511 } 512 513 /* Replace the command line, now that we've killed it with strsep. */ 514 strcpy(command_line, boot_command_line); 515 516 /* If we want SRM console printk echoing early, do it now. */ 517 if (alpha_using_srm && srmcons_output) { 518 register_srm_console(); 519 520 /* 521 * If "console=srm" was specified, clear the srmcons_output 522 * flag now so that time.c won't unregister_srm_console 523 */ 524 if (srmcons_output & 2) 525 srmcons_output = 0; 526 } 527 528 #ifdef CONFIG_MAGIC_SYSRQ 529 /* If we're using SRM, make sysrq-b halt back to the prom, 530 not auto-reboot. */ 531 if (alpha_using_srm) { 532 unregister_sysrq_key('b', __sysrq_reboot_op); 533 register_sysrq_key('b', &srm_sysrq_reboot_op); 534 } 535 #endif 536 537 /* 538 * Identify and reconfigure for the current system. 539 */ 540 cpu = (struct percpu_struct*)((char*)hwrpb + hwrpb->processor_offset); 541 542 get_sysnames(hwrpb->sys_type, hwrpb->sys_variation, 543 cpu->type, &type_name, &var_name); 544 if (*var_name == '0') 545 var_name = ""; 546 547 if (!vec) { 548 vec = get_sysvec(hwrpb->sys_type, hwrpb->sys_variation, 549 cpu->type); 550 } 551 552 if (!vec) { 553 panic("Unsupported system type: %s%s%s (%ld %ld)\n", 554 type_name, (*var_name ? " variation " : ""), var_name, 555 hwrpb->sys_type, hwrpb->sys_variation); 556 } 557 if (vec != &alpha_mv) { 558 alpha_mv = *vec; 559 } 560 561 printk("Booting " 562 #ifdef CONFIG_ALPHA_GENERIC 563 "GENERIC " 564 #endif 565 "on %s%s%s using machine vector %s from %s\n", 566 type_name, (*var_name ? " variation " : ""), 567 var_name, alpha_mv.vector_name, 568 (alpha_using_srm ? "SRM" : "MILO")); 569 570 printk("Major Options: " 571 #ifdef CONFIG_SMP 572 "SMP " 573 #endif 574 #ifdef CONFIG_ALPHA_EV56 575 "EV56 " 576 #endif 577 #ifdef CONFIG_ALPHA_EV67 578 "EV67 " 579 #endif 580 #ifdef CONFIG_ALPHA_LEGACY_START_ADDRESS 581 "LEGACY_START " 582 #endif 583 #ifdef CONFIG_VERBOSE_MCHECK 584 "VERBOSE_MCHECK " 585 #endif 586 587 #ifdef CONFIG_DEBUG_SPINLOCK 588 "DEBUG_SPINLOCK " 589 #endif 590 #ifdef CONFIG_MAGIC_SYSRQ 591 "MAGIC_SYSRQ " 592 #endif 593 "\n"); 594 595 printk("Command line: %s\n", command_line); 596 597 /* 598 * Sync up the HAE. 599 * Save the SRM's current value for restoration. 600 */ 601 srm_hae = *alpha_mv.hae_register; 602 __set_hae(alpha_mv.hae_cache); 603 604 /* Reset enable correctable error reports. */ 605 wrmces(0x7); 606 607 /* Find our memory. */ 608 setup_memory(kernel_end); 609 memblock_set_bottom_up(true); 610 611 /* First guess at cpu cache sizes. Do this before init_arch. */ 612 determine_cpu_caches(cpu->type); 613 614 /* Initialize the machine. Usually has to do with setting up 615 DMA windows and the like. */ 616 if (alpha_mv.init_arch) 617 alpha_mv.init_arch(); 618 619 /* Reserve standard resources. */ 620 reserve_std_resources(); 621 622 /* 623 * Give us a default console. TGA users will see nothing until 624 * chr_dev_init is called, rather late in the boot sequence. 625 */ 626 627 #ifdef CONFIG_VT 628 #if defined(CONFIG_VGA_CONSOLE) 629 vgacon_register_screen(&vgacon_screen_info); 630 #endif 631 #endif 632 633 /* Default root filesystem to sda2. */ 634 ROOT_DEV = MKDEV(SCSI_DISK0_MAJOR, 2); 635 636 #ifdef CONFIG_EISA 637 /* FIXME: only set this when we actually have EISA in this box? */ 638 EISA_bus = 1; 639 #endif 640 641 /* 642 * Check ASN in HWRPB for validity, report if bad. 643 * FIXME: how was this failing? Should we trust it instead, 644 * and copy the value into alpha_mv.max_asn? 645 */ 646 647 if (hwrpb->max_asn != MAX_ASN) { 648 printk("Max ASN from HWRPB is bad (0x%lx)\n", hwrpb->max_asn); 649 } 650 651 /* 652 * Identify the flock of penguins. 653 */ 654 655 #ifdef CONFIG_SMP 656 setup_smp(); 657 #endif 658 paging_init(); 659 } 660 661 static char sys_unknown[] = "Unknown"; 662 static char systype_names[][16] = { 663 "0", 664 "ADU", "Cobra", "Ruby", "Flamingo", "Mannequin", "Jensen", 665 "Pelican", "Morgan", "Sable", "Medulla", "Noname", 666 "Turbolaser", "Avanti", "Mustang", "Alcor", "Tradewind", 667 "Mikasa", "EB64", "EB66", "EB64+", "AlphaBook1", 668 "Rawhide", "K2", "Lynx", "XL", "EB164", "Noritake", 669 "Cortex", "29", "Miata", "XXM", "Takara", "Yukon", 670 "Tsunami", "Wildfire", "CUSCO", "Eiger", "Titan", "Marvel" 671 }; 672 673 static char unofficial_names[][8] = {"100", "Ruffian"}; 674 675 static char api_names[][16] = {"200", "Nautilus"}; 676 677 static char eb164_names[][8] = {"EB164", "PC164", "LX164", "SX164", "RX164"}; 678 static int eb164_indices[] = {0,0,0,1,1,1,1,1,2,2,2,2,3,3,3,3,4}; 679 680 static char alcor_names[][16] = {"Alcor", "Maverick", "Bret"}; 681 static int alcor_indices[] = {0,0,0,1,1,1,0,0,0,0,0,0,2,2,2,2,2,2}; 682 683 static char marvel_names[][16] = { 684 "Marvel/EV7" 685 }; 686 static int marvel_indices[] = { 0 }; 687 688 static char rawhide_names[][16] = { 689 "Dodge", "Wrangler", "Durango", "Tincup", "DaVinci" 690 }; 691 static int rawhide_indices[] = {0,0,0,1,1,2,2,3,3,4,4}; 692 693 static char titan_names[][16] = { 694 "DEFAULT", "Privateer", "Falcon", "Granite" 695 }; 696 static int titan_indices[] = {0,1,2,2,3}; 697 698 static char tsunami_names[][16] = { 699 "0", "DP264", "Warhol", "Windjammer", "Monet", "Clipper", 700 "Goldrush", "Webbrick", "Catamaran", "Brisbane", "Melbourne", 701 "Flying Clipper", "Shark" 702 }; 703 static int tsunami_indices[] = {0,1,2,3,4,5,6,7,8,9,10,11,12}; 704 705 static struct alpha_machine_vector * __init 706 get_sysvec(unsigned long type, unsigned long variation, unsigned long cpu) 707 { 708 static struct alpha_machine_vector *systype_vecs[] __initdata = 709 { 710 NULL, /* 0 */ 711 NULL, /* ADU */ 712 NULL, /* Cobra */ 713 NULL, /* Ruby */ 714 NULL, /* Flamingo */ 715 NULL, /* Mannequin */ 716 NULL, /* Jensens */ 717 NULL, /* Pelican */ 718 NULL, /* Morgan */ 719 NULL, /* Sable -- see below. */ 720 NULL, /* Medulla */ 721 NULL, /* Noname */ 722 NULL, /* Turbolaser */ 723 NULL, /* Avanti */ 724 NULL, /* Mustang */ 725 NULL, /* Alcor, Bret, Maverick. HWRPB inaccurate? */ 726 NULL, /* Tradewind */ 727 NULL, /* Mikasa -- see below. */ 728 NULL, /* EB64 */ 729 NULL, /* EB66 */ 730 NULL, /* EB64+ */ 731 NULL, /* Alphabook1 */ 732 &rawhide_mv, 733 NULL, /* K2 */ 734 NULL, /* Lynx */ 735 NULL, /* XL */ 736 NULL, /* EB164 -- see variation. */ 737 NULL, /* Noritake -- see below. */ 738 NULL, /* Cortex */ 739 NULL, /* 29 */ 740 &miata_mv, 741 NULL, /* XXM */ 742 &takara_mv, 743 NULL, /* Yukon */ 744 NULL, /* Tsunami -- see variation. */ 745 &wildfire_mv, /* Wildfire */ 746 NULL, /* CUSCO */ 747 &eiger_mv, /* Eiger */ 748 NULL, /* Titan */ 749 NULL, /* Marvel */ 750 }; 751 752 static struct alpha_machine_vector *unofficial_vecs[] __initdata = 753 { 754 NULL, /* 100 */ 755 &ruffian_mv, 756 }; 757 758 static struct alpha_machine_vector *api_vecs[] __initdata = 759 { 760 NULL, /* 200 */ 761 &nautilus_mv, 762 }; 763 764 static struct alpha_machine_vector *alcor_vecs[] __initdata = 765 { 766 &alcor_mv, &xlt_mv, &xlt_mv 767 }; 768 769 static struct alpha_machine_vector *eb164_vecs[] __initdata = 770 { 771 &eb164_mv, &pc164_mv, &lx164_mv, &sx164_mv, &rx164_mv 772 }; 773 774 static struct alpha_machine_vector *marvel_vecs[] __initdata = 775 { 776 &marvel_ev7_mv, 777 }; 778 779 static struct alpha_machine_vector *titan_vecs[] __initdata = 780 { 781 &titan_mv, /* default */ 782 &privateer_mv, /* privateer */ 783 &titan_mv, /* falcon */ 784 &privateer_mv, /* granite */ 785 }; 786 787 static struct alpha_machine_vector *tsunami_vecs[] __initdata = 788 { 789 NULL, 790 &dp264_mv, /* dp264 */ 791 &dp264_mv, /* warhol */ 792 &dp264_mv, /* windjammer */ 793 &monet_mv, /* monet */ 794 &clipper_mv, /* clipper */ 795 &dp264_mv, /* goldrush */ 796 &webbrick_mv, /* webbrick */ 797 &dp264_mv, /* catamaran */ 798 NULL, /* brisbane? */ 799 NULL, /* melbourne? */ 800 NULL, /* flying clipper? */ 801 &shark_mv, /* shark */ 802 }; 803 804 /* ??? Do we need to distinguish between Rawhides? */ 805 806 struct alpha_machine_vector *vec; 807 808 /* Search the system tables first... */ 809 vec = NULL; 810 if (type < ARRAY_SIZE(systype_vecs)) { 811 vec = systype_vecs[type]; 812 } else if ((type > ST_API_BIAS) && 813 (type - ST_API_BIAS) < ARRAY_SIZE(api_vecs)) { 814 vec = api_vecs[type - ST_API_BIAS]; 815 } else if ((type > ST_UNOFFICIAL_BIAS) && 816 (type - ST_UNOFFICIAL_BIAS) < ARRAY_SIZE(unofficial_vecs)) { 817 vec = unofficial_vecs[type - ST_UNOFFICIAL_BIAS]; 818 } 819 820 /* If we've not found one, try for a variation. */ 821 822 if (!vec) { 823 /* Member ID is a bit-field. */ 824 unsigned long member = (variation >> 10) & 0x3f; 825 826 cpu &= 0xffffffff; /* make it usable */ 827 828 switch (type) { 829 case ST_DEC_ALCOR: 830 if (member < ARRAY_SIZE(alcor_indices)) 831 vec = alcor_vecs[alcor_indices[member]]; 832 break; 833 case ST_DEC_EB164: 834 if (member < ARRAY_SIZE(eb164_indices)) 835 vec = eb164_vecs[eb164_indices[member]]; 836 /* PC164 may show as EB164 variation with EV56 CPU, 837 but, since no true EB164 had anything but EV5... */ 838 if (vec == &eb164_mv && cpu == EV56_CPU) 839 vec = &pc164_mv; 840 break; 841 case ST_DEC_MARVEL: 842 if (member < ARRAY_SIZE(marvel_indices)) 843 vec = marvel_vecs[marvel_indices[member]]; 844 break; 845 case ST_DEC_TITAN: 846 vec = titan_vecs[0]; /* default */ 847 if (member < ARRAY_SIZE(titan_indices)) 848 vec = titan_vecs[titan_indices[member]]; 849 break; 850 case ST_DEC_TSUNAMI: 851 if (member < ARRAY_SIZE(tsunami_indices)) 852 vec = tsunami_vecs[tsunami_indices[member]]; 853 break; 854 case ST_DEC_1000: 855 vec = &mikasa_primo_mv; 856 break; 857 case ST_DEC_NORITAKE: 858 vec = &noritake_primo_mv; 859 break; 860 case ST_DEC_2100_A500: 861 vec = &sable_gamma_mv; 862 break; 863 } 864 } 865 return vec; 866 } 867 868 static struct alpha_machine_vector * __init 869 get_sysvec_byname(const char *name) 870 { 871 static struct alpha_machine_vector *all_vecs[] __initdata = 872 { 873 &alcor_mv, 874 &clipper_mv, 875 &dp264_mv, 876 &eb164_mv, 877 &eiger_mv, 878 &lx164_mv, 879 &miata_mv, 880 &mikasa_primo_mv, 881 &monet_mv, 882 &nautilus_mv, 883 &noritake_primo_mv, 884 &pc164_mv, 885 &privateer_mv, 886 &rawhide_mv, 887 &ruffian_mv, 888 &rx164_mv, 889 &sable_gamma_mv, 890 &shark_mv, 891 &sx164_mv, 892 &takara_mv, 893 &webbrick_mv, 894 &wildfire_mv, 895 &xlt_mv 896 }; 897 898 size_t i; 899 900 for (i = 0; i < ARRAY_SIZE(all_vecs); ++i) { 901 struct alpha_machine_vector *mv = all_vecs[i]; 902 if (strcasecmp(mv->vector_name, name) == 0) 903 return mv; 904 } 905 return NULL; 906 } 907 908 static void 909 get_sysnames(unsigned long type, unsigned long variation, unsigned long cpu, 910 char **type_name, char **variation_name) 911 { 912 unsigned long member; 913 914 /* If not in the tables, make it UNKNOWN, 915 else set type name to family */ 916 if (type < ARRAY_SIZE(systype_names)) { 917 *type_name = systype_names[type]; 918 } else if ((type > ST_API_BIAS) && 919 (type - ST_API_BIAS) < ARRAY_SIZE(api_names)) { 920 *type_name = api_names[type - ST_API_BIAS]; 921 } else if ((type > ST_UNOFFICIAL_BIAS) && 922 (type - ST_UNOFFICIAL_BIAS) < ARRAY_SIZE(unofficial_names)) { 923 *type_name = unofficial_names[type - ST_UNOFFICIAL_BIAS]; 924 } else { 925 *type_name = sys_unknown; 926 *variation_name = sys_unknown; 927 return; 928 } 929 930 /* Set variation to "0"; if variation is zero, done. */ 931 *variation_name = systype_names[0]; 932 if (variation == 0) { 933 return; 934 } 935 936 member = (variation >> 10) & 0x3f; /* member ID is a bit-field */ 937 938 cpu &= 0xffffffff; /* make it usable */ 939 940 switch (type) { /* select by family */ 941 default: /* default to variation "0" for now */ 942 break; 943 case ST_DEC_EB164: 944 if (member >= ARRAY_SIZE(eb164_indices)) 945 break; 946 *variation_name = eb164_names[eb164_indices[member]]; 947 /* PC164 may show as EB164 variation, but with EV56 CPU, 948 so, since no true EB164 had anything but EV5... */ 949 if (eb164_indices[member] == 0 && cpu == EV56_CPU) 950 *variation_name = eb164_names[1]; /* make it PC164 */ 951 break; 952 case ST_DEC_ALCOR: 953 if (member < ARRAY_SIZE(alcor_indices)) 954 *variation_name = alcor_names[alcor_indices[member]]; 955 break; 956 case ST_DEC_MARVEL: 957 if (member < ARRAY_SIZE(marvel_indices)) 958 *variation_name = marvel_names[marvel_indices[member]]; 959 break; 960 case ST_DEC_RAWHIDE: 961 if (member < ARRAY_SIZE(rawhide_indices)) 962 *variation_name = rawhide_names[rawhide_indices[member]]; 963 break; 964 case ST_DEC_TITAN: 965 *variation_name = titan_names[0]; /* default */ 966 if (member < ARRAY_SIZE(titan_indices)) 967 *variation_name = titan_names[titan_indices[member]]; 968 break; 969 case ST_DEC_TSUNAMI: 970 if (member < ARRAY_SIZE(tsunami_indices)) 971 *variation_name = tsunami_names[tsunami_indices[member]]; 972 break; 973 } 974 } 975 976 /* 977 * A change was made to the HWRPB via an ECO and the following code 978 * tracks a part of the ECO. In HWRPB versions less than 5, the ECO 979 * was not implemented in the console firmware. If it's revision 5 or 980 * greater we can get the name of the platform as an ASCII string from 981 * the HWRPB. That's what this function does. It checks the revision 982 * level and if the string is in the HWRPB it returns the address of 983 * the string--a pointer to the name of the platform. 984 * 985 * Returns: 986 * - Pointer to a ASCII string if it's in the HWRPB 987 * - Pointer to a blank string if the data is not in the HWRPB. 988 */ 989 990 static char * 991 platform_string(void) 992 { 993 struct dsr_struct *dsr; 994 static char unk_system_string[] = "N/A"; 995 996 /* Go to the console for the string pointer. 997 * If the rpb_vers is not 5 or greater the rpb 998 * is old and does not have this data in it. 999 */ 1000 if (hwrpb->revision < 5) 1001 return (unk_system_string); 1002 else { 1003 /* The Dynamic System Recognition struct 1004 * has the system platform name starting 1005 * after the character count of the string. 1006 */ 1007 dsr = ((struct dsr_struct *) 1008 ((char *)hwrpb + hwrpb->dsr_offset)); 1009 return ((char *)dsr + (dsr->sysname_off + 1010 sizeof(long))); 1011 } 1012 } 1013 1014 static int 1015 get_nr_processors(struct percpu_struct *cpubase, unsigned long num) 1016 { 1017 struct percpu_struct *cpu; 1018 unsigned long i; 1019 int count = 0; 1020 1021 for (i = 0; i < num; i++) { 1022 cpu = (struct percpu_struct *) 1023 ((char *)cpubase + i*hwrpb->processor_size); 1024 if ((cpu->flags & 0x1cc) == 0x1cc) 1025 count++; 1026 } 1027 return count; 1028 } 1029 1030 static void 1031 show_cache_size (struct seq_file *f, const char *which, int shape) 1032 { 1033 if (shape == -1) 1034 seq_printf (f, "%s\t\t: n/a\n", which); 1035 else if (shape == 0) 1036 seq_printf (f, "%s\t\t: unknown\n", which); 1037 else 1038 seq_printf (f, "%s\t\t: %dK, %d-way, %db line\n", 1039 which, shape >> 10, shape & 15, 1040 1 << ((shape >> 4) & 15)); 1041 } 1042 1043 static int 1044 show_cpuinfo(struct seq_file *f, void *slot) 1045 { 1046 extern struct unaligned_stat { 1047 unsigned long count, va, pc; 1048 } unaligned[2]; 1049 1050 static char cpu_names[][8] = { 1051 "EV3", "EV4", "Simulate", "LCA4", "EV5", "EV45", "EV56", 1052 "EV6", "PCA56", "PCA57", "EV67", "EV68CB", "EV68AL", 1053 "EV68CX", "EV7", "EV79", "EV69" 1054 }; 1055 1056 struct percpu_struct *cpu = slot; 1057 unsigned int cpu_index; 1058 char *cpu_name; 1059 char *systype_name; 1060 char *sysvariation_name; 1061 int nr_processors; 1062 unsigned long timer_freq; 1063 1064 cpu_index = (unsigned) (cpu->type - 1); 1065 cpu_name = "Unknown"; 1066 if (cpu_index < ARRAY_SIZE(cpu_names)) 1067 cpu_name = cpu_names[cpu_index]; 1068 1069 get_sysnames(hwrpb->sys_type, hwrpb->sys_variation, 1070 cpu->type, &systype_name, &sysvariation_name); 1071 1072 nr_processors = get_nr_processors(cpu, hwrpb->nr_processors); 1073 1074 #if CONFIG_HZ == 1024 || CONFIG_HZ == 1200 1075 timer_freq = (100UL * hwrpb->intr_freq) / 4096; 1076 #else 1077 timer_freq = 100UL * CONFIG_HZ; 1078 #endif 1079 1080 seq_printf(f, "cpu\t\t\t: Alpha\n" 1081 "cpu model\t\t: %s\n" 1082 "cpu variation\t\t: %ld\n" 1083 "cpu revision\t\t: %ld\n" 1084 "cpu serial number\t: %s\n" 1085 "system type\t\t: %s\n" 1086 "system variation\t: %s\n" 1087 "system revision\t\t: %ld\n" 1088 "system serial number\t: %s\n" 1089 "cycle frequency [Hz]\t: %lu %s\n" 1090 "timer frequency [Hz]\t: %lu.%02lu\n" 1091 "page size [bytes]\t: %ld\n" 1092 "phys. address bits\t: %ld\n" 1093 "max. addr. space #\t: %ld\n" 1094 "BogoMIPS\t\t: %lu.%02lu\n" 1095 "kernel unaligned acc\t: %ld (pc=%lx,va=%lx)\n" 1096 "user unaligned acc\t: %ld (pc=%lx,va=%lx)\n" 1097 "platform string\t\t: %s\n" 1098 "cpus detected\t\t: %d\n", 1099 cpu_name, cpu->variation, cpu->revision, 1100 (char*)cpu->serial_no, 1101 systype_name, sysvariation_name, hwrpb->sys_revision, 1102 (char*)hwrpb->ssn, 1103 est_cycle_freq ? : hwrpb->cycle_freq, 1104 est_cycle_freq ? "est." : "", 1105 timer_freq / 100, timer_freq % 100, 1106 hwrpb->pagesize, 1107 hwrpb->pa_bits, 1108 hwrpb->max_asn, 1109 loops_per_jiffy / (500000/HZ), 1110 (loops_per_jiffy / (5000/HZ)) % 100, 1111 unaligned[0].count, unaligned[0].pc, unaligned[0].va, 1112 unaligned[1].count, unaligned[1].pc, unaligned[1].va, 1113 platform_string(), nr_processors); 1114 1115 #ifdef CONFIG_SMP 1116 seq_printf(f, "cpus active\t\t: %u\n" 1117 "cpu active mask\t\t: %016lx\n", 1118 num_online_cpus(), cpumask_bits(cpu_possible_mask)[0]); 1119 #endif 1120 1121 show_cache_size (f, "L1 Icache", alpha_l1i_cacheshape); 1122 show_cache_size (f, "L1 Dcache", alpha_l1d_cacheshape); 1123 show_cache_size (f, "L2 cache", alpha_l2_cacheshape); 1124 show_cache_size (f, "L3 cache", alpha_l3_cacheshape); 1125 1126 return 0; 1127 } 1128 1129 static int __init 1130 read_mem_block(int *addr, int stride, int size) 1131 { 1132 long nloads = size / stride, cnt, tmp; 1133 1134 __asm__ __volatile__( 1135 " rpcc %0\n" 1136 "1: ldl %3,0(%2)\n" 1137 " subq %1,1,%1\n" 1138 /* Next two XORs introduce an explicit data dependency between 1139 consecutive loads in the loop, which will give us true load 1140 latency. */ 1141 " xor %3,%2,%2\n" 1142 " xor %3,%2,%2\n" 1143 " addq %2,%4,%2\n" 1144 " bne %1,1b\n" 1145 " rpcc %3\n" 1146 " subl %3,%0,%0\n" 1147 : "=&r" (cnt), "=&r" (nloads), "=&r" (addr), "=&r" (tmp) 1148 : "r" (stride), "1" (nloads), "2" (addr)); 1149 1150 return cnt / (size / stride); 1151 } 1152 1153 #define CSHAPE(totalsize, linesize, assoc) \ 1154 ((totalsize & ~0xff) | (linesize << 4) | assoc) 1155 1156 /* ??? EV5 supports up to 64M, but did the systems with more than 1157 16M of BCACHE ever exist? */ 1158 #define MAX_BCACHE_SIZE 16*1024*1024 1159 1160 /* Note that the offchip caches are direct mapped on all Alphas. */ 1161 static int __init 1162 external_cache_probe(int minsize, int width) 1163 { 1164 int cycles, prev_cycles = 1000000; 1165 int stride = 1 << width; 1166 long size = minsize, maxsize = MAX_BCACHE_SIZE * 2; 1167 1168 if (maxsize > (max_low_pfn + 1) << PAGE_SHIFT) 1169 maxsize = 1 << (ilog2(max_low_pfn + 1) + PAGE_SHIFT); 1170 1171 /* Get the first block cached. */ 1172 read_mem_block(__va(0), stride, size); 1173 1174 while (size < maxsize) { 1175 /* Get an average load latency in cycles. */ 1176 cycles = read_mem_block(__va(0), stride, size); 1177 if (cycles > prev_cycles * 2) { 1178 /* Fine, we exceed the cache. */ 1179 printk("%ldK Bcache detected; load hit latency %d " 1180 "cycles, load miss latency %d cycles\n", 1181 size >> 11, prev_cycles, cycles); 1182 return CSHAPE(size >> 1, width, 1); 1183 } 1184 /* Try to get the next block cached. */ 1185 read_mem_block(__va(size), stride, size); 1186 prev_cycles = cycles; 1187 size <<= 1; 1188 } 1189 return -1; /* No BCACHE found. */ 1190 } 1191 1192 static void __init 1193 determine_cpu_caches (unsigned int cpu_type) 1194 { 1195 int L1I, L1D, L2, L3; 1196 1197 switch (cpu_type) { 1198 case EV4_CPU: 1199 case EV45_CPU: 1200 { 1201 if (cpu_type == EV4_CPU) 1202 L1I = CSHAPE(8*1024, 5, 1); 1203 else 1204 L1I = CSHAPE(16*1024, 5, 1); 1205 L1D = L1I; 1206 L3 = -1; 1207 1208 /* BIU_CTL is a write-only Abox register. PALcode has a 1209 shadow copy, and may be available from some versions 1210 of the CSERVE PALcall. If we can get it, then 1211 1212 unsigned long biu_ctl, size; 1213 size = 128*1024 * (1 << ((biu_ctl >> 28) & 7)); 1214 L2 = CSHAPE (size, 5, 1); 1215 1216 Unfortunately, we can't rely on that. 1217 */ 1218 L2 = external_cache_probe(128*1024, 5); 1219 break; 1220 } 1221 1222 case LCA4_CPU: 1223 { 1224 unsigned long car, size; 1225 1226 L1I = L1D = CSHAPE(8*1024, 5, 1); 1227 L3 = -1; 1228 1229 car = *(vuip) phys_to_virt (0x120000078UL); 1230 size = 64*1024 * (1 << ((car >> 5) & 7)); 1231 /* No typo -- 8 byte cacheline size. Whodathunk. */ 1232 L2 = (car & 1 ? CSHAPE (size, 3, 1) : -1); 1233 break; 1234 } 1235 1236 case EV5_CPU: 1237 case EV56_CPU: 1238 { 1239 unsigned long sc_ctl, width; 1240 1241 L1I = L1D = CSHAPE(8*1024, 5, 1); 1242 1243 /* Check the line size of the Scache. */ 1244 sc_ctl = *(vulp) phys_to_virt (0xfffff000a8UL); 1245 width = sc_ctl & 0x1000 ? 6 : 5; 1246 L2 = CSHAPE (96*1024, width, 3); 1247 1248 /* BC_CONTROL and BC_CONFIG are write-only IPRs. PALcode 1249 has a shadow copy, and may be available from some versions 1250 of the CSERVE PALcall. If we can get it, then 1251 1252 unsigned long bc_control, bc_config, size; 1253 size = 1024*1024 * (1 << ((bc_config & 7) - 1)); 1254 L3 = (bc_control & 1 ? CSHAPE (size, width, 1) : -1); 1255 1256 Unfortunately, we can't rely on that. 1257 */ 1258 L3 = external_cache_probe(1024*1024, width); 1259 break; 1260 } 1261 1262 case PCA56_CPU: 1263 case PCA57_CPU: 1264 { 1265 if (cpu_type == PCA56_CPU) { 1266 L1I = CSHAPE(16*1024, 6, 1); 1267 L1D = CSHAPE(8*1024, 5, 1); 1268 } else { 1269 L1I = CSHAPE(32*1024, 6, 2); 1270 L1D = CSHAPE(16*1024, 5, 1); 1271 } 1272 L3 = -1; 1273 1274 #if 0 1275 unsigned long cbox_config, size; 1276 1277 cbox_config = *(vulp) phys_to_virt (0xfffff00008UL); 1278 size = 512*1024 * (1 << ((cbox_config >> 12) & 3)); 1279 1280 L2 = ((cbox_config >> 31) & 1 ? CSHAPE (size, 6, 1) : -1); 1281 #else 1282 L2 = external_cache_probe(512*1024, 6); 1283 #endif 1284 break; 1285 } 1286 1287 case EV6_CPU: 1288 case EV67_CPU: 1289 case EV68CB_CPU: 1290 case EV68AL_CPU: 1291 case EV68CX_CPU: 1292 case EV69_CPU: 1293 L1I = L1D = CSHAPE(64*1024, 6, 2); 1294 L2 = external_cache_probe(1024*1024, 6); 1295 L3 = -1; 1296 break; 1297 1298 case EV7_CPU: 1299 case EV79_CPU: 1300 L1I = L1D = CSHAPE(64*1024, 6, 2); 1301 L2 = CSHAPE(7*1024*1024/4, 6, 7); 1302 L3 = -1; 1303 break; 1304 1305 default: 1306 /* Nothing known about this cpu type. */ 1307 L1I = L1D = L2 = L3 = 0; 1308 break; 1309 } 1310 1311 alpha_l1i_cacheshape = L1I; 1312 alpha_l1d_cacheshape = L1D; 1313 alpha_l2_cacheshape = L2; 1314 alpha_l3_cacheshape = L3; 1315 } 1316 1317 /* 1318 * We show only CPU #0 info. 1319 */ 1320 static void * 1321 c_start(struct seq_file *f, loff_t *pos) 1322 { 1323 return *pos ? NULL : (char *)hwrpb + hwrpb->processor_offset; 1324 } 1325 1326 static void * 1327 c_next(struct seq_file *f, void *v, loff_t *pos) 1328 { 1329 (*pos)++; 1330 return NULL; 1331 } 1332 1333 static void 1334 c_stop(struct seq_file *f, void *v) 1335 { 1336 } 1337 1338 const struct seq_operations cpuinfo_op = { 1339 .start = c_start, 1340 .next = c_next, 1341 .stop = c_stop, 1342 .show = show_cpuinfo, 1343 }; 1344 1345 1346 static int 1347 alpha_panic_event(struct notifier_block *this, unsigned long event, void *ptr) 1348 { 1349 #if 1 1350 /* FIXME FIXME FIXME */ 1351 /* If we are using SRM and serial console, just hard halt here. */ 1352 if (alpha_using_srm && srmcons_output) 1353 __halt(); 1354 #endif 1355 return NOTIFY_DONE; 1356 } 1357 1358 static __init int add_pcspkr(void) 1359 { 1360 struct platform_device *pd; 1361 int ret; 1362 1363 pd = platform_device_alloc("pcspkr", -1); 1364 if (!pd) 1365 return -ENOMEM; 1366 1367 ret = platform_device_add(pd); 1368 if (ret) 1369 platform_device_put(pd); 1370 1371 return ret; 1372 } 1373 device_initcall(add_pcspkr); 1374