1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (C) 2012 Regents of the University of California 4 * Copyright (C) 2019 Western Digital Corporation or its affiliates. 5 * Copyright (C) 2020 FORTH-ICS/CARV 6 * Nick Kossifidis <mick@ics.forth.gr> 7 */ 8 9 #ifdef CONFIG_64BIT 10 /* riscv_has_extension_likely() cannot be used this early */ 11 #define USE_EARLY_PGTABLE_LEVELS 12 #endif 13 14 #include <linux/init.h> 15 #include <linux/mm.h> 16 #include <linux/memblock.h> 17 #include <linux/initrd.h> 18 #include <linux/swap.h> 19 #include <linux/swiotlb.h> 20 #include <linux/sizes.h> 21 #include <linux/of_fdt.h> 22 #include <linux/of_reserved_mem.h> 23 #include <linux/libfdt.h> 24 #include <linux/set_memory.h> 25 #include <linux/dma-map-ops.h> 26 #include <linux/crash_dump.h> 27 #include <linux/hugetlb.h> 28 #include <linux/kfence.h> 29 #include <linux/execmem.h> 30 #include <linux/vmemmap-optimization.h> 31 32 #include <asm/alternative.h> 33 #include <asm/fixmap.h> 34 #include <asm/io.h> 35 #include <asm/kasan.h> 36 #include <asm/module.h> 37 #include <asm/numa.h> 38 #include <asm/pgtable.h> 39 #include <asm/sections.h> 40 #include <asm/soc.h> 41 #include <asm/sparsemem.h> 42 #include <asm/tlbflush.h> 43 44 #include "../kernel/head.h" 45 46 #if defined(CONFIG_64BIT) && defined(CONFIG_MMU) 47 DECLARE_BITMAP(new_valid_map_cpus, NR_CPUS); 48 #endif 49 50 struct kernel_mapping kernel_map __ro_after_init; 51 EXPORT_SYMBOL(kernel_map); 52 53 #ifdef CONFIG_64BIT 54 u64 satp_mode __ro_after_init = SATP_MODE_57; 55 #else 56 u64 satp_mode __ro_after_init = SATP_MODE_32; 57 #endif 58 EXPORT_SYMBOL(satp_mode); 59 60 #ifdef CONFIG_64BIT 61 bool _pgtable_l4_enabled __ro_after_init = true; 62 bool _pgtable_l5_enabled __ro_after_init = true; 63 #endif 64 65 phys_addr_t phys_ram_base __ro_after_init; 66 EXPORT_SYMBOL(phys_ram_base); 67 68 #ifdef CONFIG_SPARSEMEM_VMEMMAP 69 #define VMEMMAP_ADDR_ALIGN max(1ULL << SECTION_SIZE_BITS, \ 70 PFN_PHYS(MAX_FOLIO_VMEMMAP_ALIGN / \ 71 sizeof(struct page))) 72 73 unsigned long vmemmap_start_pfn __ro_after_init; 74 EXPORT_SYMBOL(vmemmap_start_pfn); 75 #endif 76 77 extern char _start[]; 78 void *_dtb_early_va __initdata; 79 uintptr_t _dtb_early_pa __initdata; 80 81 phys_addr_t dma32_phys_limit __initdata; 82 83 void __init arch_zone_limits_init(unsigned long *max_zone_pfns) 84 { 85 #ifdef CONFIG_ZONE_DMA32 86 max_zone_pfns[ZONE_DMA32] = PFN_DOWN(dma32_phys_limit); 87 #endif 88 max_zone_pfns[ZONE_NORMAL] = max_low_pfn; 89 } 90 91 #if defined(CONFIG_MMU) && defined(CONFIG_DEBUG_VM) 92 93 #define LOG2_SZ_1K ilog2(SZ_1K) 94 #define LOG2_SZ_1M ilog2(SZ_1M) 95 #define LOG2_SZ_1G ilog2(SZ_1G) 96 #define LOG2_SZ_1T ilog2(SZ_1T) 97 98 static inline void print_mlk(char *name, unsigned long b, unsigned long t) 99 { 100 pr_notice("%12s : 0x%08lx - 0x%08lx (%4ld kB)\n", name, b, t, 101 (((t) - (b)) >> LOG2_SZ_1K)); 102 } 103 104 static inline void print_mlm(char *name, unsigned long b, unsigned long t) 105 { 106 pr_notice("%12s : 0x%08lx - 0x%08lx (%4ld MB)\n", name, b, t, 107 (((t) - (b)) >> LOG2_SZ_1M)); 108 } 109 110 static inline void print_mlg(char *name, unsigned long b, unsigned long t) 111 { 112 pr_notice("%12s : 0x%08lx - 0x%08lx (%4ld GB)\n", name, b, t, 113 (((t) - (b)) >> LOG2_SZ_1G)); 114 } 115 116 #ifdef CONFIG_64BIT 117 static inline void print_mlt(char *name, unsigned long b, unsigned long t) 118 { 119 pr_notice("%12s : 0x%08lx - 0x%08lx (%4ld TB)\n", name, b, t, 120 (((t) - (b)) >> LOG2_SZ_1T)); 121 } 122 #else 123 #define print_mlt(n, b, t) do {} while (0) 124 #endif 125 126 static inline void print_ml(char *name, unsigned long b, unsigned long t) 127 { 128 unsigned long diff = t - b; 129 130 if (IS_ENABLED(CONFIG_64BIT) && (diff >> LOG2_SZ_1T) >= 10) 131 print_mlt(name, b, t); 132 else if ((diff >> LOG2_SZ_1G) >= 10) 133 print_mlg(name, b, t); 134 else if ((diff >> LOG2_SZ_1M) >= 10) 135 print_mlm(name, b, t); 136 else 137 print_mlk(name, b, t); 138 } 139 140 static void __init print_vm_layout(void) 141 { 142 pr_notice("Virtual kernel memory layout:\n"); 143 print_ml("fixmap", (unsigned long)FIXADDR_START, 144 (unsigned long)FIXADDR_TOP); 145 print_ml("pci io", (unsigned long)PCI_IO_START, 146 (unsigned long)PCI_IO_END); 147 print_ml("vmemmap", (unsigned long)VMEMMAP_START, 148 (unsigned long)VMEMMAP_END); 149 print_ml("vmalloc", (unsigned long)VMALLOC_START, 150 (unsigned long)VMALLOC_END); 151 #ifdef CONFIG_64BIT 152 print_ml("modules", (unsigned long)MODULES_VADDR, 153 (unsigned long)MODULES_END); 154 #endif 155 print_ml("lowmem", (unsigned long)PAGE_OFFSET, 156 (unsigned long)high_memory); 157 if (IS_ENABLED(CONFIG_64BIT)) { 158 #ifdef CONFIG_KASAN 159 print_ml("kasan", KASAN_SHADOW_START, KASAN_SHADOW_END); 160 #endif 161 162 print_ml("kernel", (unsigned long)kernel_map.virt_addr, 163 (unsigned long)ADDRESS_SPACE_END); 164 } 165 } 166 #else 167 static void print_vm_layout(void) { } 168 #endif /* CONFIG_DEBUG_VM */ 169 170 void __init arch_mm_preinit(void) 171 { 172 bool swiotlb = max_pfn > PFN_DOWN(dma32_phys_limit) && 173 memblock_start_of_DRAM() < dma32_phys_limit; 174 unsigned int swiotlb_flags = SWIOTLB_VERBOSE; 175 #ifdef CONFIG_FLATMEM 176 BUG_ON(!mem_map); 177 #endif /* CONFIG_FLATMEM */ 178 179 if (IS_ENABLED(CONFIG_DMA_BOUNCE_UNALIGNED_KMALLOC) && !swiotlb && 180 dma_cache_alignment != 1) { 181 /* 182 * No 32-bit DMA bouncing needed (either all DRAM is within 183 * the 32-bit limit, or it all starts above it), but 184 * kmalloc() buffers whose sizes are not cache-line-aligned 185 * still require bouncing for non-coherent DMA. Use 186 * SWIOTLB_ANY so that the buffer can be allocated from high 187 * memory when DRAM starts above dma32_phys_limit. Allocate 188 * ~1 MB per 1 GB of RAM. 189 */ 190 unsigned long size = 191 DIV_ROUND_UP(memblock_phys_mem_size(), 1024); 192 swiotlb_adjust_size(min(swiotlb_default_pool_size(), size)); 193 swiotlb = true; 194 swiotlb_flags |= SWIOTLB_ANY; 195 } 196 197 swiotlb_init(swiotlb, swiotlb_flags); 198 199 print_vm_layout(); 200 } 201 202 /* Limit the memory size via mem. */ 203 static phys_addr_t memory_limit; 204 205 static int __init early_mem(char *p) 206 { 207 u64 size; 208 209 if (!p) 210 return 1; 211 212 size = memparse(p, &p) & PAGE_MASK; 213 memory_limit = min_t(u64, size, memory_limit); 214 215 pr_notice("Memory limited to %lldMB\n", (u64)memory_limit >> 20); 216 217 return 0; 218 } 219 early_param("mem", early_mem); 220 221 static void __init setup_bootmem(void) 222 { 223 phys_addr_t vmlinux_end = __pa_symbol(&_end); 224 phys_addr_t max_mapped_addr; 225 phys_addr_t phys_ram_end, vmlinux_start; 226 227 vmlinux_start = __pa_symbol(&_start); 228 229 memblock_enforce_memory_limit(memory_limit); 230 231 /* 232 * Make sure we align the reservation on PMD_SIZE since we will 233 * map the kernel in the linear mapping as read-only: we do not want 234 * any allocation to happen between _end and the next pmd aligned page. 235 */ 236 if (IS_ENABLED(CONFIG_64BIT) && IS_ENABLED(CONFIG_STRICT_KERNEL_RWX)) 237 vmlinux_end = (vmlinux_end + PMD_SIZE - 1) & PMD_MASK; 238 /* 239 * Reserve from the start of the kernel to the end of the kernel 240 */ 241 memblock_reserve(vmlinux_start, vmlinux_end - vmlinux_start); 242 243 /* 244 * Make sure we align the start of the memory on a PMD boundary so that 245 * at worst, we map the linear mapping with PMD mappings. 246 */ 247 phys_ram_base = memblock_start_of_DRAM() & PMD_MASK; 248 #ifdef CONFIG_SPARSEMEM_VMEMMAP 249 vmemmap_start_pfn = round_down(phys_ram_base, VMEMMAP_ADDR_ALIGN) >> PAGE_SHIFT; 250 #endif 251 252 /* 253 * In 64-bit, any use of __va/__pa before this point is wrong as we 254 * did not know the start of DRAM before. 255 */ 256 if (IS_ENABLED(CONFIG_64BIT) && IS_ENABLED(CONFIG_MMU)) 257 kernel_map.va_pa_offset = PAGE_OFFSET - phys_ram_base; 258 259 /* 260 * The size of the linear page mapping may restrict the amount of 261 * usable RAM. 262 */ 263 if (IS_ENABLED(CONFIG_64BIT) && IS_ENABLED(CONFIG_MMU)) { 264 max_mapped_addr = __pa(PAGE_OFFSET) + KERN_VIRT_SIZE; 265 if (memblock_end_of_DRAM() > max_mapped_addr) { 266 memblock_cap_memory_range(phys_ram_base, 267 max_mapped_addr - phys_ram_base); 268 pr_warn("Physical memory overflows the linear mapping size: region above %pa removed", 269 &max_mapped_addr); 270 } 271 } 272 273 /* 274 * Reserve physical address space that would be mapped to virtual 275 * addresses greater than (void *)(-PAGE_SIZE) because: 276 * - This memory would overlap with ERR_PTR 277 * - This memory belongs to high memory, which is not supported 278 * 279 * This is not applicable to 64-bit kernel, because virtual addresses 280 * after (void *)(-PAGE_SIZE) are not linearly mapped: they are 281 * occupied by kernel mapping. Also it is unrealistic for high memory 282 * to exist on 64-bit platforms. 283 */ 284 if (!IS_ENABLED(CONFIG_64BIT)) { 285 max_mapped_addr = __va_to_pa_nodebug(-PAGE_SIZE); 286 memblock_reserve(max_mapped_addr, (phys_addr_t)-max_mapped_addr); 287 } 288 289 phys_ram_end = memblock_end_of_DRAM(); 290 min_low_pfn = PFN_UP(phys_ram_base); 291 max_low_pfn = max_pfn = PFN_DOWN(phys_ram_end); 292 293 dma32_phys_limit = min(4UL * SZ_1G, (unsigned long)PFN_PHYS(max_low_pfn)); 294 295 reserve_initrd_mem(); 296 297 /* 298 * No allocation should be done before reserving the memory as defined 299 * in the device tree, otherwise the allocation could end up in a 300 * reserved region. 301 */ 302 early_init_fdt_scan_reserved_mem(); 303 304 /* 305 * If DTB is built in, no need to reserve its memblock. 306 * Otherwise, do reserve it but avoid using 307 * early_init_fdt_reserve_self() since __pa() does 308 * not work for DTB pointers that are fixmap addresses 309 */ 310 if (!IS_ENABLED(CONFIG_BUILTIN_DTB)) 311 memblock_reserve(dtb_early_pa, fdt_totalsize(dtb_early_va)); 312 } 313 314 #ifdef CONFIG_RELOCATABLE 315 extern unsigned long __rela_dyn_start, __rela_dyn_end; 316 317 static void __init relocate_kernel(void) 318 { 319 Elf_Rela *rela = (Elf_Rela *)&__rela_dyn_start; 320 /* 321 * This holds the offset between the linked virtual address and the 322 * relocated virtual address. 323 */ 324 uintptr_t reloc_offset = kernel_map.virt_addr - KERNEL_LINK_ADDR; 325 /* 326 * This holds the offset between kernel linked virtual address and 327 * physical address. 328 */ 329 uintptr_t va_kernel_link_pa_offset = KERNEL_LINK_ADDR - kernel_map.phys_addr; 330 331 for ( ; rela < (Elf_Rela *)&__rela_dyn_end; rela++) { 332 Elf_Addr addr = (rela->r_offset - va_kernel_link_pa_offset); 333 Elf_Addr relocated_addr = rela->r_addend; 334 335 if (rela->r_info != R_RISCV_RELATIVE) 336 continue; 337 338 /* 339 * Make sure to not relocate vdso symbols like rt_sigreturn 340 * which are linked from the address 0 in vmlinux since 341 * vdso symbol addresses are actually used as an offset from 342 * mm->context.vdso in VDSO_OFFSET macro. 343 */ 344 if (relocated_addr >= KERNEL_LINK_ADDR) 345 relocated_addr += reloc_offset; 346 347 *(Elf_Addr *)addr = relocated_addr; 348 } 349 } 350 #endif /* CONFIG_RELOCATABLE */ 351 352 #ifdef CONFIG_MMU 353 struct pt_alloc_ops pt_ops __meminitdata; 354 355 pgd_t swapper_pg_dir[PTRS_PER_PGD] __page_aligned_bss; 356 pgd_t trampoline_pg_dir[PTRS_PER_PGD] __page_aligned_bss; 357 static pte_t fixmap_pte[PTRS_PER_PTE] __page_aligned_bss; 358 359 pgd_t early_pg_dir[PTRS_PER_PGD] __initdata __aligned(PAGE_SIZE); 360 361 static const pgprot_t protection_map[16] = { 362 [VM_NONE] = PAGE_NONE, 363 [VM_READ] = PAGE_READ, 364 [VM_WRITE] = PAGE_SHADOWSTACK, 365 [VM_WRITE | VM_READ] = PAGE_COPY, 366 [VM_EXEC] = PAGE_EXEC, 367 [VM_EXEC | VM_READ] = PAGE_READ_EXEC, 368 [VM_EXEC | VM_WRITE] = PAGE_COPY_EXEC, 369 [VM_EXEC | VM_WRITE | VM_READ] = PAGE_COPY_EXEC, 370 [VM_SHARED] = PAGE_NONE, 371 [VM_SHARED | VM_READ] = PAGE_READ, 372 [VM_SHARED | VM_WRITE] = PAGE_SHARED, 373 [VM_SHARED | VM_WRITE | VM_READ] = PAGE_SHARED, 374 [VM_SHARED | VM_EXEC] = PAGE_EXEC, 375 [VM_SHARED | VM_EXEC | VM_READ] = PAGE_READ_EXEC, 376 [VM_SHARED | VM_EXEC | VM_WRITE] = PAGE_SHARED_EXEC, 377 [VM_SHARED | VM_EXEC | VM_WRITE | VM_READ] = PAGE_SHARED_EXEC 378 }; 379 DECLARE_VM_GET_PAGE_PROT 380 381 void __set_fixmap(enum fixed_addresses idx, phys_addr_t phys, pgprot_t prot) 382 { 383 unsigned long addr = __fix_to_virt(idx); 384 pte_t *ptep; 385 386 BUG_ON(idx <= FIX_HOLE || idx >= __end_of_fixed_addresses); 387 388 ptep = &fixmap_pte[pte_index(addr)]; 389 390 if (pgprot_val(prot)) 391 set_pte(ptep, pfn_pte(phys >> PAGE_SHIFT, prot)); 392 else 393 pte_clear(&init_mm, addr, ptep); 394 local_flush_tlb_page(addr); 395 } 396 397 static inline pte_t *__init get_pte_virt_early(phys_addr_t pa) 398 { 399 return (pte_t *)((uintptr_t)pa); 400 } 401 402 static inline pte_t *__init get_pte_virt_fixmap(phys_addr_t pa) 403 { 404 clear_fixmap(FIX_PTE); 405 return (pte_t *)set_fixmap_offset(FIX_PTE, pa); 406 } 407 408 static inline pte_t *__meminit get_pte_virt_late(phys_addr_t pa) 409 { 410 return (pte_t *) __va(pa); 411 } 412 413 static inline phys_addr_t __init alloc_pte_early(uintptr_t va) 414 { 415 /* 416 * We only create PMD or PGD early mappings so we 417 * should never reach here with MMU disabled. 418 */ 419 BUG(); 420 } 421 422 static inline phys_addr_t __init alloc_pte_fixmap(uintptr_t va) 423 { 424 return memblock_phys_alloc(PAGE_SIZE, PAGE_SIZE); 425 } 426 427 static phys_addr_t __meminit alloc_pte_late(uintptr_t va) 428 { 429 struct ptdesc *ptdesc = pagetable_alloc(GFP_KERNEL, 0); 430 431 /* 432 * We do not know which mm the PTE page is associated to at this point. 433 * Passing NULL to the ctor is the safe option, though it may result 434 * in unnecessary work (e.g. initialising the ptlock for init_mm). 435 */ 436 BUG_ON(!ptdesc || !pagetable_pte_ctor(NULL, ptdesc)); 437 return __pa((pte_t *)ptdesc_address(ptdesc)); 438 } 439 440 static void __meminit create_pte_mapping(pte_t *ptep, uintptr_t va, phys_addr_t pa, phys_addr_t sz, 441 pgprot_t prot) 442 { 443 uintptr_t pte_idx = pte_index(va); 444 445 BUG_ON(sz != PAGE_SIZE); 446 447 if (pte_none(ptep[pte_idx])) 448 ptep[pte_idx] = pfn_pte(PFN_DOWN(pa), prot); 449 } 450 451 #ifndef __PAGETABLE_PMD_FOLDED 452 453 static pmd_t trampoline_pmd[PTRS_PER_PMD] __page_aligned_bss; 454 static pmd_t fixmap_pmd[PTRS_PER_PMD] __page_aligned_bss; 455 static pmd_t early_pmd[PTRS_PER_PMD] __initdata __aligned(PAGE_SIZE); 456 457 static p4d_t trampoline_p4d[PTRS_PER_P4D] __page_aligned_bss; 458 static p4d_t fixmap_p4d[PTRS_PER_P4D] __page_aligned_bss; 459 static p4d_t early_p4d[PTRS_PER_P4D] __initdata __aligned(PAGE_SIZE); 460 461 static pud_t trampoline_pud[PTRS_PER_PUD] __page_aligned_bss; 462 static pud_t fixmap_pud[PTRS_PER_PUD] __page_aligned_bss; 463 static pud_t early_pud[PTRS_PER_PUD] __initdata __aligned(PAGE_SIZE); 464 465 static pmd_t *__init get_pmd_virt_early(phys_addr_t pa) 466 { 467 /* Before MMU is enabled */ 468 return (pmd_t *)((uintptr_t)pa); 469 } 470 471 static pmd_t *__init get_pmd_virt_fixmap(phys_addr_t pa) 472 { 473 clear_fixmap(FIX_PMD); 474 return (pmd_t *)set_fixmap_offset(FIX_PMD, pa); 475 } 476 477 static pmd_t *__meminit get_pmd_virt_late(phys_addr_t pa) 478 { 479 return (pmd_t *) __va(pa); 480 } 481 482 static phys_addr_t __init alloc_pmd_early(uintptr_t va) 483 { 484 BUG_ON((va - kernel_map.virt_addr) >> PUD_SHIFT); 485 486 return (uintptr_t)early_pmd; 487 } 488 489 static phys_addr_t __init alloc_pmd_fixmap(uintptr_t va) 490 { 491 return memblock_phys_alloc(PAGE_SIZE, PAGE_SIZE); 492 } 493 494 static phys_addr_t __meminit alloc_pmd_late(uintptr_t va) 495 { 496 struct ptdesc *ptdesc = pagetable_alloc(GFP_KERNEL, 0); 497 498 /* See comment in alloc_pte_late() regarding NULL passed the ctor */ 499 BUG_ON(!ptdesc || !pagetable_pmd_ctor(NULL, ptdesc)); 500 return __pa((pmd_t *)ptdesc_address(ptdesc)); 501 } 502 503 static void __meminit create_pmd_mapping(pmd_t *pmdp, 504 uintptr_t va, phys_addr_t pa, 505 phys_addr_t sz, pgprot_t prot) 506 { 507 pte_t *ptep; 508 phys_addr_t pte_phys; 509 uintptr_t pmd_idx = pmd_index(va); 510 511 if (sz == PMD_SIZE) { 512 if (pmd_none(pmdp[pmd_idx])) 513 pmdp[pmd_idx] = pfn_pmd(PFN_DOWN(pa), prot); 514 return; 515 } 516 517 if (pmd_none(pmdp[pmd_idx])) { 518 pte_phys = pt_ops.alloc_pte(va); 519 pmdp[pmd_idx] = pfn_pmd(PFN_DOWN(pte_phys), PAGE_TABLE); 520 ptep = pt_ops.get_pte_virt(pte_phys); 521 memset(ptep, 0, PAGE_SIZE); 522 } else { 523 pte_phys = PFN_PHYS(_pmd_pfn(pmdp[pmd_idx])); 524 ptep = pt_ops.get_pte_virt(pte_phys); 525 } 526 527 create_pte_mapping(ptep, va, pa, sz, prot); 528 } 529 530 static pud_t *__init get_pud_virt_early(phys_addr_t pa) 531 { 532 return (pud_t *)((uintptr_t)pa); 533 } 534 535 static pud_t *__init get_pud_virt_fixmap(phys_addr_t pa) 536 { 537 clear_fixmap(FIX_PUD); 538 return (pud_t *)set_fixmap_offset(FIX_PUD, pa); 539 } 540 541 static pud_t *__meminit get_pud_virt_late(phys_addr_t pa) 542 { 543 return (pud_t *)__va(pa); 544 } 545 546 static phys_addr_t __init alloc_pud_early(uintptr_t va) 547 { 548 /* Only one PUD is available for early mapping */ 549 BUG_ON((va - kernel_map.virt_addr) >> PGDIR_SHIFT); 550 551 return (uintptr_t)early_pud; 552 } 553 554 static phys_addr_t __init alloc_pud_fixmap(uintptr_t va) 555 { 556 return memblock_phys_alloc(PAGE_SIZE, PAGE_SIZE); 557 } 558 559 static phys_addr_t __meminit alloc_pud_late(uintptr_t va) 560 { 561 struct ptdesc *ptdesc = pagetable_alloc(GFP_KERNEL, 0); 562 563 BUG_ON(!ptdesc); 564 pagetable_pud_ctor(ptdesc); 565 return __pa((pud_t *)ptdesc_address(ptdesc)); 566 } 567 568 static p4d_t *__init get_p4d_virt_early(phys_addr_t pa) 569 { 570 return (p4d_t *)((uintptr_t)pa); 571 } 572 573 static p4d_t *__init get_p4d_virt_fixmap(phys_addr_t pa) 574 { 575 clear_fixmap(FIX_P4D); 576 return (p4d_t *)set_fixmap_offset(FIX_P4D, pa); 577 } 578 579 static p4d_t *__meminit get_p4d_virt_late(phys_addr_t pa) 580 { 581 return (p4d_t *)__va(pa); 582 } 583 584 static phys_addr_t __init alloc_p4d_early(uintptr_t va) 585 { 586 /* Only one P4D is available for early mapping */ 587 BUG_ON((va - kernel_map.virt_addr) >> PGDIR_SHIFT); 588 589 return (uintptr_t)early_p4d; 590 } 591 592 static phys_addr_t __init alloc_p4d_fixmap(uintptr_t va) 593 { 594 return memblock_phys_alloc(PAGE_SIZE, PAGE_SIZE); 595 } 596 597 static phys_addr_t __meminit alloc_p4d_late(uintptr_t va) 598 { 599 struct ptdesc *ptdesc = pagetable_alloc(GFP_KERNEL, 0); 600 601 BUG_ON(!ptdesc); 602 pagetable_p4d_ctor(ptdesc); 603 return __pa((p4d_t *)ptdesc_address(ptdesc)); 604 } 605 606 static void __meminit create_pud_mapping(pud_t *pudp, uintptr_t va, phys_addr_t pa, phys_addr_t sz, 607 pgprot_t prot) 608 { 609 pmd_t *nextp; 610 phys_addr_t next_phys; 611 uintptr_t pud_index = pud_index(va); 612 613 if (sz == PUD_SIZE) { 614 if (pud_val(pudp[pud_index]) == 0) 615 pudp[pud_index] = pfn_pud(PFN_DOWN(pa), prot); 616 return; 617 } 618 619 if (pud_val(pudp[pud_index]) == 0) { 620 next_phys = pt_ops.alloc_pmd(va); 621 pudp[pud_index] = pfn_pud(PFN_DOWN(next_phys), PAGE_TABLE); 622 nextp = pt_ops.get_pmd_virt(next_phys); 623 memset(nextp, 0, PAGE_SIZE); 624 } else { 625 next_phys = PFN_PHYS(_pud_pfn(pudp[pud_index])); 626 nextp = pt_ops.get_pmd_virt(next_phys); 627 } 628 629 create_pmd_mapping(nextp, va, pa, sz, prot); 630 } 631 632 static void __meminit create_p4d_mapping(p4d_t *p4dp, uintptr_t va, phys_addr_t pa, phys_addr_t sz, 633 pgprot_t prot) 634 { 635 pud_t *nextp; 636 phys_addr_t next_phys; 637 uintptr_t p4d_index = p4d_index(va); 638 639 if (sz == P4D_SIZE) { 640 if (p4d_val(p4dp[p4d_index]) == 0) 641 p4dp[p4d_index] = pfn_p4d(PFN_DOWN(pa), prot); 642 return; 643 } 644 645 if (p4d_val(p4dp[p4d_index]) == 0) { 646 next_phys = pt_ops.alloc_pud(va); 647 p4dp[p4d_index] = pfn_p4d(PFN_DOWN(next_phys), PAGE_TABLE); 648 nextp = pt_ops.get_pud_virt(next_phys); 649 memset(nextp, 0, PAGE_SIZE); 650 } else { 651 next_phys = PFN_PHYS(_p4d_pfn(p4dp[p4d_index])); 652 nextp = pt_ops.get_pud_virt(next_phys); 653 } 654 655 create_pud_mapping(nextp, va, pa, sz, prot); 656 } 657 658 #define pgd_next_t p4d_t 659 #define alloc_pgd_next(__va) (pgtable_l5_enabled() ? \ 660 pt_ops.alloc_p4d(__va) : (pgtable_l4_enabled() ? \ 661 pt_ops.alloc_pud(__va) : pt_ops.alloc_pmd(__va))) 662 #define get_pgd_next_virt(__pa) (pgtable_l5_enabled() ? \ 663 pt_ops.get_p4d_virt(__pa) : (pgd_next_t *)(pgtable_l4_enabled() ? \ 664 pt_ops.get_pud_virt(__pa) : (pud_t *)pt_ops.get_pmd_virt(__pa))) 665 #define create_pgd_next_mapping(__nextp, __va, __pa, __sz, __prot) \ 666 (pgtable_l5_enabled() ? \ 667 create_p4d_mapping(__nextp, __va, __pa, __sz, __prot) : \ 668 (pgtable_l4_enabled() ? \ 669 create_pud_mapping((pud_t *)__nextp, __va, __pa, __sz, __prot) : \ 670 create_pmd_mapping((pmd_t *)__nextp, __va, __pa, __sz, __prot))) 671 #define fixmap_pgd_next (pgtable_l5_enabled() ? \ 672 (uintptr_t)fixmap_p4d : (pgtable_l4_enabled() ? \ 673 (uintptr_t)fixmap_pud : (uintptr_t)fixmap_pmd)) 674 #define trampoline_pgd_next (pgtable_l5_enabled() ? \ 675 (uintptr_t)trampoline_p4d : (pgtable_l4_enabled() ? \ 676 (uintptr_t)trampoline_pud : (uintptr_t)trampoline_pmd)) 677 #else 678 #define pgd_next_t pte_t 679 #define alloc_pgd_next(__va) pt_ops.alloc_pte(__va) 680 #define get_pgd_next_virt(__pa) pt_ops.get_pte_virt(__pa) 681 #define create_pgd_next_mapping(__nextp, __va, __pa, __sz, __prot) \ 682 create_pte_mapping(__nextp, __va, __pa, __sz, __prot) 683 #define fixmap_pgd_next ((uintptr_t)fixmap_pte) 684 #define create_p4d_mapping(__pmdp, __va, __pa, __sz, __prot) do {} while(0) 685 #define create_pud_mapping(__pmdp, __va, __pa, __sz, __prot) do {} while(0) 686 #define create_pmd_mapping(__pmdp, __va, __pa, __sz, __prot) do {} while(0) 687 #endif /* __PAGETABLE_PMD_FOLDED */ 688 689 void __meminit create_pgd_mapping(pgd_t *pgdp, uintptr_t va, phys_addr_t pa, phys_addr_t sz, 690 pgprot_t prot) 691 { 692 pgd_next_t *nextp; 693 phys_addr_t next_phys; 694 uintptr_t pgd_idx = pgd_index(va); 695 696 if (sz == PGDIR_SIZE) { 697 if (pgd_val(pgdp[pgd_idx]) == 0) 698 pgdp[pgd_idx] = pfn_pgd(PFN_DOWN(pa), prot); 699 return; 700 } 701 702 if (pgd_val(pgdp[pgd_idx]) == 0) { 703 next_phys = alloc_pgd_next(va); 704 pgdp[pgd_idx] = pfn_pgd(PFN_DOWN(next_phys), PAGE_TABLE); 705 nextp = get_pgd_next_virt(next_phys); 706 memset(nextp, 0, PAGE_SIZE); 707 } else { 708 next_phys = PFN_PHYS(_pgd_pfn(pgdp[pgd_idx])); 709 nextp = get_pgd_next_virt(next_phys); 710 } 711 712 create_pgd_next_mapping(nextp, va, pa, sz, prot); 713 } 714 715 static uintptr_t __meminit best_map_size(phys_addr_t pa, uintptr_t va, phys_addr_t size) 716 { 717 if (debug_pagealloc_enabled()) 718 return PAGE_SIZE; 719 720 if (pgtable_l5_enabled() && 721 !(pa & (P4D_SIZE - 1)) && !(va & (P4D_SIZE - 1)) && size >= P4D_SIZE) 722 return P4D_SIZE; 723 724 if (pgtable_l4_enabled() && 725 !(pa & (PUD_SIZE - 1)) && !(va & (PUD_SIZE - 1)) && size >= PUD_SIZE) 726 return PUD_SIZE; 727 728 if (IS_ENABLED(CONFIG_64BIT) && 729 !(pa & (PMD_SIZE - 1)) && !(va & (PMD_SIZE - 1)) && size >= PMD_SIZE) 730 return PMD_SIZE; 731 732 return PAGE_SIZE; 733 } 734 735 #ifdef CONFIG_STRICT_KERNEL_RWX 736 static __meminit pgprot_t pgprot_from_va(uintptr_t va) 737 { 738 if (is_va_kernel_text(va)) 739 return PAGE_KERNEL_READ_EXEC; 740 741 /* 742 * In 64-bit kernel, the kernel mapping is outside the linear mapping so 743 * we must protect its linear mapping alias from being executed and 744 * written. 745 * And rodata section is marked readonly in mark_rodata_ro. 746 */ 747 if (IS_ENABLED(CONFIG_64BIT) && is_va_kernel_lm_alias_text(va)) 748 return PAGE_KERNEL_READ; 749 750 return PAGE_KERNEL; 751 } 752 753 void mark_rodata_ro(void) 754 { 755 set_kernel_memory(__start_rodata, _data, set_memory_ro); 756 if (IS_ENABLED(CONFIG_64BIT)) 757 set_kernel_memory(lm_alias(__start_rodata), lm_alias(_data), 758 set_memory_ro); 759 } 760 #else 761 static __meminit pgprot_t pgprot_from_va(uintptr_t va) 762 { 763 if (IS_ENABLED(CONFIG_64BIT) && !is_kernel_mapping(va)) 764 return PAGE_KERNEL; 765 766 return PAGE_KERNEL_EXEC; 767 } 768 #endif /* CONFIG_STRICT_KERNEL_RWX */ 769 770 #if defined(CONFIG_64BIT) 771 u64 __pi_set_satp_mode_from_cmdline(uintptr_t dtb_pa); 772 u64 __pi_set_satp_mode_from_fdt(uintptr_t dtb_pa); 773 774 static void __init disable_pgtable_l5(void) 775 { 776 _pgtable_l5_enabled = false; 777 kernel_map.page_offset = PAGE_OFFSET_L4; 778 satp_mode = SATP_MODE_48; 779 } 780 781 static void __init disable_pgtable_l4(void) 782 { 783 _pgtable_l4_enabled = false; 784 kernel_map.page_offset = PAGE_OFFSET_L3; 785 satp_mode = SATP_MODE_39; 786 } 787 788 static int __init print_no4lvl(char *p) 789 { 790 pr_info("Disabled 4-level and 5-level paging"); 791 return 0; 792 } 793 early_param("no4lvl", print_no4lvl); 794 795 static int __init print_no5lvl(char *p) 796 { 797 pr_info("Disabled 5-level paging"); 798 return 0; 799 } 800 early_param("no5lvl", print_no5lvl); 801 802 static void __init set_mmap_rnd_bits_max(void) 803 { 804 mmap_rnd_bits_max = MMAP_VA_BITS - PAGE_SHIFT - 3; 805 } 806 807 static bool __init is_vaddr_valid(unsigned long va) 808 { 809 unsigned long up = 0; 810 811 switch (satp_mode) { 812 case SATP_MODE_39: 813 up = 1UL << 38; 814 break; 815 case SATP_MODE_48: 816 up = 1UL << 47; 817 break; 818 case SATP_MODE_57: 819 up = 1UL << 56; 820 break; 821 default: 822 return false; 823 } 824 825 return (va < up) || (va >= (ULONG_MAX - up + 1)); 826 } 827 828 /* 829 * There is a simple way to determine if 4-level is supported by the 830 * underlying hardware: establish 1:1 mapping in 4-level page table mode 831 * then read SATP to see if the configuration was taken into account 832 * meaning sv48 is supported. 833 * The maximum SATP mode is limited by both the command line and the "mmu-type" 834 * property in the device tree, since some platforms may hang if an unsupported 835 * SATP mode is attempted. 836 */ 837 static __init void set_satp_mode(uintptr_t dtb_pa) 838 { 839 u64 identity_satp, hw_satp; 840 uintptr_t set_satp_mode_pmd = ((unsigned long)set_satp_mode) & PMD_MASK; 841 u64 satp_mode_limit = min_not_zero(__pi_set_satp_mode_from_cmdline(dtb_pa), 842 __pi_set_satp_mode_from_fdt(dtb_pa)); 843 844 kernel_map.page_offset = PAGE_OFFSET_L5; 845 846 /* Fall back to SV48 if RISCV_ISA_SV57 isn't enabled */ 847 if (!IS_ENABLED(CONFIG_RISCV_ISA_SV57) && satp_mode_limit == 0) 848 satp_mode_limit = SATP_MODE_48; 849 850 /* Fall back to SV39 if RISCV_ISA_SV48 isn't enabled */ 851 if (!IS_ENABLED(CONFIG_RISCV_ISA_SV48) && satp_mode_limit == SATP_MODE_48) 852 satp_mode_limit = SATP_MODE_39; 853 854 if (satp_mode_limit == SATP_MODE_48) { 855 disable_pgtable_l5(); 856 } else if (satp_mode_limit == SATP_MODE_39) { 857 disable_pgtable_l5(); 858 disable_pgtable_l4(); 859 return; 860 } 861 862 create_p4d_mapping(early_p4d, 863 set_satp_mode_pmd, (uintptr_t)early_pud, 864 P4D_SIZE, PAGE_TABLE); 865 create_pud_mapping(early_pud, 866 set_satp_mode_pmd, (uintptr_t)early_pmd, 867 PUD_SIZE, PAGE_TABLE); 868 /* Handle the case where set_satp_mode straddles 2 PMDs */ 869 create_pmd_mapping(early_pmd, 870 set_satp_mode_pmd, set_satp_mode_pmd, 871 PMD_SIZE, PAGE_KERNEL_EXEC); 872 create_pmd_mapping(early_pmd, 873 set_satp_mode_pmd + PMD_SIZE, 874 set_satp_mode_pmd + PMD_SIZE, 875 PMD_SIZE, PAGE_KERNEL_EXEC); 876 retry: 877 if (!is_vaddr_valid(set_satp_mode_pmd)) 878 goto out; 879 880 create_pgd_mapping(early_pg_dir, 881 set_satp_mode_pmd, 882 pgtable_l5_enabled() ? 883 (uintptr_t)early_p4d : (uintptr_t)early_pud, 884 PGDIR_SIZE, PAGE_TABLE); 885 886 identity_satp = PFN_DOWN((uintptr_t)&early_pg_dir) | satp_mode; 887 888 local_flush_tlb_all(); 889 csr_write(CSR_SATP, identity_satp); 890 hw_satp = csr_swap(CSR_SATP, 0ULL); 891 local_flush_tlb_all(); 892 893 if (hw_satp != identity_satp) { 894 if (pgtable_l5_enabled()) { 895 disable_pgtable_l5(); 896 memset(early_pg_dir, 0, PAGE_SIZE); 897 goto retry; 898 } 899 disable_pgtable_l4(); 900 } 901 902 out: 903 memset(early_pg_dir, 0, PAGE_SIZE); 904 memset(early_p4d, 0, PAGE_SIZE); 905 memset(early_pud, 0, PAGE_SIZE); 906 memset(early_pmd, 0, PAGE_SIZE); 907 if (pgtable_l4_enabled()) 908 set_bit(RISCV_ISA_EXT_SV48, riscv_isa); 909 if (pgtable_l5_enabled()) 910 set_bit(RISCV_ISA_EXT_SV57, riscv_isa); 911 } 912 #endif 913 914 /* 915 * setup_vm() is called from head.S with MMU-off. 916 * 917 * Following requirements should be honoured for setup_vm() to work 918 * correctly: 919 * 1) It should use PC-relative addressing for accessing kernel symbols. 920 * To achieve this we always use GCC cmodel=medany. 921 * 2) The compiler instrumentation for FTRACE will not work for setup_vm() 922 * so disable compiler instrumentation when FTRACE is enabled. 923 * 924 * Currently, the above requirements are honoured by using custom CFLAGS 925 * for init.o in mm/Makefile. 926 */ 927 928 #ifndef __riscv_cmodel_medany 929 #error "setup_vm() is called from head.S before relocate so it should not use absolute addressing." 930 #endif 931 932 static void __init create_kernel_page_table(pgd_t *pgdir, bool early) 933 { 934 uintptr_t va, end_va; 935 936 end_va = kernel_map.virt_addr + kernel_map.size; 937 for (va = kernel_map.virt_addr; va < end_va; va += PMD_SIZE) 938 create_pgd_mapping(pgdir, va, 939 kernel_map.phys_addr + (va - kernel_map.virt_addr), 940 PMD_SIZE, 941 early ? 942 PAGE_KERNEL_EXEC : pgprot_from_va(va)); 943 } 944 945 /* 946 * Setup a 4MB mapping that encompasses the device tree: for 64-bit kernel, 947 * this means 2 PMD entries whereas for 32-bit kernel, this is only 1 PGDIR 948 * entry. 949 */ 950 static void __init create_fdt_early_page_table(uintptr_t fix_fdt_va, 951 uintptr_t dtb_pa) 952 { 953 #ifndef CONFIG_BUILTIN_DTB 954 uintptr_t pa = dtb_pa & ~(PMD_SIZE - 1); 955 956 /* Make sure the fdt fixmap address is always aligned on PMD size */ 957 BUILD_BUG_ON(FIX_FDT % (PMD_SIZE / PAGE_SIZE)); 958 959 /* In 32-bit only, the fdt lies in its own PGD */ 960 if (!IS_ENABLED(CONFIG_64BIT)) { 961 create_pgd_mapping(early_pg_dir, fix_fdt_va, 962 pa, MAX_FDT_SIZE, PAGE_KERNEL); 963 } else { 964 create_pmd_mapping(fixmap_pmd, fix_fdt_va, 965 pa, PMD_SIZE, PAGE_KERNEL); 966 create_pmd_mapping(fixmap_pmd, fix_fdt_va + PMD_SIZE, 967 pa + PMD_SIZE, PMD_SIZE, PAGE_KERNEL); 968 } 969 970 dtb_early_va = (void *)fix_fdt_va + (dtb_pa & (PMD_SIZE - 1)); 971 #else 972 /* 973 * For 64-bit kernel, __va can't be used since it would return a linear 974 * mapping address whereas dtb_early_va will be used before 975 * setup_vm_final installs the linear mapping. For 32-bit kernel, as the 976 * kernel is mapped in the linear mapping, that makes no difference. 977 */ 978 dtb_early_va = kernel_mapping_pa_to_va(dtb_pa); 979 #endif 980 981 dtb_early_pa = dtb_pa; 982 } 983 984 /* 985 * MMU is not enabled, the page tables are allocated directly using 986 * early_pmd/pud/p4d and the address returned is the physical one. 987 */ 988 static void __init pt_ops_set_early(void) 989 { 990 pt_ops.alloc_pte = alloc_pte_early; 991 pt_ops.get_pte_virt = get_pte_virt_early; 992 #ifndef __PAGETABLE_PMD_FOLDED 993 pt_ops.alloc_pmd = alloc_pmd_early; 994 pt_ops.get_pmd_virt = get_pmd_virt_early; 995 pt_ops.alloc_pud = alloc_pud_early; 996 pt_ops.get_pud_virt = get_pud_virt_early; 997 pt_ops.alloc_p4d = alloc_p4d_early; 998 pt_ops.get_p4d_virt = get_p4d_virt_early; 999 #endif 1000 } 1001 1002 /* 1003 * MMU is enabled but page table setup is not complete yet. 1004 * fixmap page table alloc functions must be used as a means to temporarily 1005 * map the allocated physical pages since the linear mapping does not exist yet. 1006 * 1007 * Note that this is called with MMU disabled, hence kernel_mapping_pa_to_va, 1008 * but it will be used as described above. 1009 */ 1010 static void __init pt_ops_set_fixmap(void) 1011 { 1012 pt_ops.alloc_pte = kernel_mapping_pa_to_va(alloc_pte_fixmap); 1013 pt_ops.get_pte_virt = kernel_mapping_pa_to_va(get_pte_virt_fixmap); 1014 #ifndef __PAGETABLE_PMD_FOLDED 1015 pt_ops.alloc_pmd = kernel_mapping_pa_to_va(alloc_pmd_fixmap); 1016 pt_ops.get_pmd_virt = kernel_mapping_pa_to_va(get_pmd_virt_fixmap); 1017 pt_ops.alloc_pud = kernel_mapping_pa_to_va(alloc_pud_fixmap); 1018 pt_ops.get_pud_virt = kernel_mapping_pa_to_va(get_pud_virt_fixmap); 1019 pt_ops.alloc_p4d = kernel_mapping_pa_to_va(alloc_p4d_fixmap); 1020 pt_ops.get_p4d_virt = kernel_mapping_pa_to_va(get_p4d_virt_fixmap); 1021 #endif 1022 } 1023 1024 /* 1025 * MMU is enabled and page table setup is complete, so from now, we can use 1026 * generic page allocation functions to setup page table. 1027 */ 1028 static void __init pt_ops_set_late(void) 1029 { 1030 pt_ops.alloc_pte = alloc_pte_late; 1031 pt_ops.get_pte_virt = get_pte_virt_late; 1032 #ifndef __PAGETABLE_PMD_FOLDED 1033 pt_ops.alloc_pmd = alloc_pmd_late; 1034 pt_ops.get_pmd_virt = get_pmd_virt_late; 1035 pt_ops.alloc_pud = alloc_pud_late; 1036 pt_ops.get_pud_virt = get_pud_virt_late; 1037 pt_ops.alloc_p4d = alloc_p4d_late; 1038 pt_ops.get_p4d_virt = get_p4d_virt_late; 1039 #endif 1040 } 1041 1042 #ifdef CONFIG_RANDOMIZE_BASE 1043 extern bool __init __pi_set_nokaslr_from_cmdline(uintptr_t dtb_pa); 1044 extern u64 __init __pi_get_kaslr_seed(uintptr_t dtb_pa); 1045 extern u64 __init __pi_get_kaslr_seed_zkr(const uintptr_t dtb_pa); 1046 1047 static int __init print_nokaslr(char *p) 1048 { 1049 pr_info("Disabled KASLR"); 1050 return 0; 1051 } 1052 early_param("nokaslr", print_nokaslr); 1053 #endif 1054 1055 asmlinkage void __init setup_vm(uintptr_t dtb_pa) 1056 { 1057 pmd_t __maybe_unused fix_bmap_spmd, fix_bmap_epmd; 1058 1059 #ifdef CONFIG_RANDOMIZE_BASE 1060 if (!__pi_set_nokaslr_from_cmdline(dtb_pa)) { 1061 u64 kaslr_seed = __pi_get_kaslr_seed_zkr(dtb_pa); 1062 u32 kernel_size = (uintptr_t)(&_end) - (uintptr_t)(&_start); 1063 u32 nr_pos; 1064 1065 if (kaslr_seed == 0) 1066 kaslr_seed = __pi_get_kaslr_seed(dtb_pa); 1067 /* 1068 * Compute the number of positions available: we are limited 1069 * by the early page table that only has one PUD and we must 1070 * be aligned on PMD_SIZE. 1071 */ 1072 nr_pos = (PUD_SIZE - kernel_size) / PMD_SIZE; 1073 1074 kernel_map.virt_offset = (kaslr_seed % nr_pos) * PMD_SIZE; 1075 } 1076 #endif 1077 1078 kernel_map.virt_addr = KERNEL_LINK_ADDR + kernel_map.virt_offset; 1079 1080 kernel_map.phys_addr = (uintptr_t)(&_start); 1081 kernel_map.size = (uintptr_t)(&_end) - kernel_map.phys_addr; 1082 kernel_map.va_kernel_pa_offset = kernel_map.virt_addr - kernel_map.phys_addr; 1083 1084 #if defined(CONFIG_64BIT) 1085 set_satp_mode(dtb_pa); 1086 set_mmap_rnd_bits_max(); 1087 #endif 1088 1089 /* 1090 * In 64-bit, we defer the setup of va_pa_offset to setup_bootmem, 1091 * where we have the system memory layout: this allows us to align 1092 * the physical and virtual mappings and then make use of PUD/P4D/PGD 1093 * for the linear mapping. This is only possible because the kernel 1094 * mapping lies outside the linear mapping. 1095 * In 32-bit however, as the kernel resides in the linear mapping, 1096 * setup_vm_final can not change the mapping established here, 1097 * otherwise the same kernel addresses would get mapped to different 1098 * physical addresses (if the start of dram is different from the 1099 * kernel physical address start). 1100 */ 1101 kernel_map.va_pa_offset = IS_ENABLED(CONFIG_64BIT) ? 1102 0UL : PAGE_OFFSET - kernel_map.phys_addr; 1103 1104 memory_limit = KERN_VIRT_SIZE; 1105 1106 /* Sanity check alignment and size */ 1107 BUG_ON((PAGE_OFFSET % PGDIR_SIZE) != 0); 1108 BUG_ON((kernel_map.phys_addr % PMD_SIZE) != 0); 1109 1110 #ifdef CONFIG_64BIT 1111 /* 1112 * The last 4K bytes of the addressable memory can not be mapped because 1113 * of IS_ERR_VALUE macro. 1114 */ 1115 BUG_ON((kernel_map.virt_addr + kernel_map.size) > ADDRESS_SPACE_END - SZ_4K); 1116 #endif 1117 1118 #ifdef CONFIG_RELOCATABLE 1119 /* 1120 * Early page table uses only one PUD, which makes it possible 1121 * to map PUD_SIZE aligned on PUD_SIZE: if the relocation offset 1122 * makes the kernel cross over a PUD_SIZE boundary, raise a bug 1123 * since a part of the kernel would not get mapped. 1124 */ 1125 if (IS_ENABLED(CONFIG_64BIT)) 1126 BUG_ON(PUD_SIZE - (kernel_map.virt_addr & (PUD_SIZE - 1)) < kernel_map.size); 1127 relocate_kernel(); 1128 #endif 1129 1130 apply_early_boot_alternatives(); 1131 pt_ops_set_early(); 1132 1133 /* Setup early PGD for fixmap */ 1134 create_pgd_mapping(early_pg_dir, FIXADDR_START, 1135 fixmap_pgd_next, PGDIR_SIZE, PAGE_TABLE); 1136 1137 #ifndef __PAGETABLE_PMD_FOLDED 1138 /* Setup fixmap P4D and PUD */ 1139 if (pgtable_l5_enabled()) 1140 create_p4d_mapping(fixmap_p4d, FIXADDR_START, 1141 (uintptr_t)fixmap_pud, P4D_SIZE, PAGE_TABLE); 1142 /* Setup fixmap PUD and PMD */ 1143 if (pgtable_l4_enabled()) 1144 create_pud_mapping(fixmap_pud, FIXADDR_START, 1145 (uintptr_t)fixmap_pmd, PUD_SIZE, PAGE_TABLE); 1146 create_pmd_mapping(fixmap_pmd, FIXADDR_START, 1147 (uintptr_t)fixmap_pte, PMD_SIZE, PAGE_TABLE); 1148 /* Setup trampoline PGD and PMD */ 1149 create_pgd_mapping(trampoline_pg_dir, kernel_map.virt_addr, 1150 trampoline_pgd_next, PGDIR_SIZE, PAGE_TABLE); 1151 if (pgtable_l5_enabled()) 1152 create_p4d_mapping(trampoline_p4d, kernel_map.virt_addr, 1153 (uintptr_t)trampoline_pud, P4D_SIZE, PAGE_TABLE); 1154 if (pgtable_l4_enabled()) 1155 create_pud_mapping(trampoline_pud, kernel_map.virt_addr, 1156 (uintptr_t)trampoline_pmd, PUD_SIZE, PAGE_TABLE); 1157 create_pmd_mapping(trampoline_pmd, kernel_map.virt_addr, 1158 kernel_map.phys_addr, PMD_SIZE, PAGE_KERNEL_EXEC); 1159 #else 1160 /* Setup trampoline PGD */ 1161 create_pgd_mapping(trampoline_pg_dir, kernel_map.virt_addr, 1162 kernel_map.phys_addr, PGDIR_SIZE, PAGE_KERNEL_EXEC); 1163 #endif 1164 1165 /* 1166 * Setup early PGD covering entire kernel which will allow 1167 * us to reach paging_init(). We map all memory banks later 1168 * in setup_vm_final() below. 1169 */ 1170 create_kernel_page_table(early_pg_dir, true); 1171 1172 /* Setup early mapping for FDT early scan */ 1173 create_fdt_early_page_table(__fix_to_virt(FIX_FDT), dtb_pa); 1174 1175 /* 1176 * Bootime fixmap only can handle PMD_SIZE mapping. Thus, boot-ioremap 1177 * range can not span multiple pmds. 1178 */ 1179 BUG_ON((__fix_to_virt(FIX_BTMAP_BEGIN) >> PMD_SHIFT) 1180 != (__fix_to_virt(FIX_BTMAP_END) >> PMD_SHIFT)); 1181 1182 #ifndef __PAGETABLE_PMD_FOLDED 1183 /* 1184 * Early ioremap fixmap is already created as it lies within first 2MB 1185 * of fixmap region. We always map PMD_SIZE. Thus, both FIX_BTMAP_END 1186 * FIX_BTMAP_BEGIN should lie in the same pmd. Verify that and warn 1187 * the user if not. 1188 */ 1189 fix_bmap_spmd = fixmap_pmd[pmd_index(__fix_to_virt(FIX_BTMAP_BEGIN))]; 1190 fix_bmap_epmd = fixmap_pmd[pmd_index(__fix_to_virt(FIX_BTMAP_END))]; 1191 if (pmd_val(fix_bmap_spmd) != pmd_val(fix_bmap_epmd)) { 1192 WARN_ON(1); 1193 pr_warn("fixmap btmap start [%08lx] != end [%08lx]\n", 1194 pmd_val(fix_bmap_spmd), pmd_val(fix_bmap_epmd)); 1195 pr_warn("fix_to_virt(FIX_BTMAP_BEGIN): %08lx\n", 1196 fix_to_virt(FIX_BTMAP_BEGIN)); 1197 pr_warn("fix_to_virt(FIX_BTMAP_END): %08lx\n", 1198 fix_to_virt(FIX_BTMAP_END)); 1199 1200 pr_warn("FIX_BTMAP_END: %d\n", FIX_BTMAP_END); 1201 pr_warn("FIX_BTMAP_BEGIN: %d\n", FIX_BTMAP_BEGIN); 1202 } 1203 #endif 1204 1205 pt_ops_set_fixmap(); 1206 } 1207 1208 static void __meminit create_linear_mapping_range(phys_addr_t start, phys_addr_t end, 1209 uintptr_t fixed_map_size, const pgprot_t *pgprot) 1210 { 1211 phys_addr_t pa; 1212 uintptr_t va, map_size; 1213 1214 for (pa = start; pa < end; pa += map_size) { 1215 va = (uintptr_t)__va(pa); 1216 map_size = fixed_map_size ? fixed_map_size : 1217 best_map_size(pa, va, end - pa); 1218 1219 create_pgd_mapping(swapper_pg_dir, va, pa, map_size, 1220 pgprot ? *pgprot : pgprot_from_va(va)); 1221 } 1222 } 1223 1224 static void __init create_linear_mapping_page_table(void) 1225 { 1226 phys_addr_t start, end; 1227 phys_addr_t kfence_pool __maybe_unused; 1228 u64 i; 1229 1230 #ifdef CONFIG_STRICT_KERNEL_RWX 1231 phys_addr_t ktext_start = __pa_symbol(_start); 1232 phys_addr_t ktext_size = __init_data_begin - _start; 1233 phys_addr_t krodata_start = __pa_symbol(__start_rodata); 1234 phys_addr_t krodata_size = _data - __start_rodata; 1235 1236 /* Isolate kernel text and rodata so they don't get mapped with a PUD */ 1237 memblock_mark_nomap(ktext_start, ktext_size); 1238 memblock_mark_nomap(krodata_start, krodata_size); 1239 #endif 1240 1241 #ifdef CONFIG_KFENCE 1242 /* 1243 * kfence pool must be backed by PAGE_SIZE mappings, so allocate it 1244 * before we setup the linear mapping so that we avoid using hugepages 1245 * for this region. 1246 */ 1247 kfence_pool = memblock_phys_alloc(KFENCE_POOL_SIZE, PAGE_SIZE); 1248 BUG_ON(!kfence_pool); 1249 1250 memblock_mark_nomap(kfence_pool, KFENCE_POOL_SIZE); 1251 __kfence_pool = __va(kfence_pool); 1252 #endif 1253 1254 /* Map all memory banks in the linear mapping */ 1255 for_each_mem_range(i, &start, &end) { 1256 if (start <= __pa(PAGE_OFFSET) && 1257 __pa(PAGE_OFFSET) < end) 1258 start = __pa(PAGE_OFFSET); 1259 1260 create_linear_mapping_range(start, end, 0, NULL); 1261 } 1262 1263 #ifdef CONFIG_STRICT_KERNEL_RWX 1264 create_linear_mapping_range(ktext_start, ktext_start + ktext_size, 0, NULL); 1265 create_linear_mapping_range(krodata_start, krodata_start + krodata_size, 0, NULL); 1266 1267 memblock_clear_nomap(ktext_start, ktext_size); 1268 memblock_clear_nomap(krodata_start, krodata_size); 1269 #endif 1270 1271 #ifdef CONFIG_KFENCE 1272 create_linear_mapping_range(kfence_pool, kfence_pool + KFENCE_POOL_SIZE, PAGE_SIZE, NULL); 1273 1274 memblock_clear_nomap(kfence_pool, KFENCE_POOL_SIZE); 1275 #endif 1276 } 1277 1278 static void __init setup_vm_final(void) 1279 { 1280 /* Setup swapper PGD for fixmap */ 1281 #if !defined(CONFIG_64BIT) 1282 /* 1283 * In 32-bit, the device tree lies in a pgd entry, so it must be copied 1284 * directly in swapper_pg_dir in addition to the pgd entry that points 1285 * to fixmap_pte. 1286 */ 1287 unsigned long idx = pgd_index(__fix_to_virt(FIX_FDT)); 1288 1289 set_pgd(&swapper_pg_dir[idx], early_pg_dir[idx]); 1290 #endif 1291 create_pgd_mapping(swapper_pg_dir, FIXADDR_START, 1292 __pa_symbol(fixmap_pgd_next), 1293 PGDIR_SIZE, PAGE_TABLE); 1294 1295 /* Map the linear mapping */ 1296 create_linear_mapping_page_table(); 1297 1298 /* Map the kernel */ 1299 if (IS_ENABLED(CONFIG_64BIT)) 1300 create_kernel_page_table(swapper_pg_dir, false); 1301 1302 #ifdef CONFIG_KASAN 1303 kasan_swapper_init(); 1304 #endif 1305 1306 /* Clear fixmap PTE and PMD mappings */ 1307 clear_fixmap(FIX_PTE); 1308 clear_fixmap(FIX_PMD); 1309 clear_fixmap(FIX_PUD); 1310 clear_fixmap(FIX_P4D); 1311 1312 /* Move to swapper page table */ 1313 csr_write(CSR_SATP, PFN_DOWN(__pa_symbol(swapper_pg_dir)) | satp_mode); 1314 local_flush_tlb_all(); 1315 1316 pt_ops_set_late(); 1317 } 1318 #else 1319 asmlinkage void __init setup_vm(uintptr_t dtb_pa) 1320 { 1321 dtb_early_va = (void *)dtb_pa; 1322 dtb_early_pa = dtb_pa; 1323 1324 #ifdef CONFIG_RELOCATABLE 1325 kernel_map.virt_addr = (uintptr_t)_start; 1326 kernel_map.phys_addr = (uintptr_t)_start; 1327 relocate_kernel(); 1328 #endif 1329 } 1330 1331 static inline void setup_vm_final(void) 1332 { 1333 } 1334 #endif /* CONFIG_MMU */ 1335 1336 /* 1337 * reserve_crashkernel() - reserves memory for crash kernel 1338 * 1339 * This function reserves memory area given in "crashkernel=" kernel command 1340 * line parameter. The memory reserved is used by dump capture kernel when 1341 * primary kernel is crashing. 1342 */ 1343 static void __init arch_reserve_crashkernel(void) 1344 { 1345 unsigned long long low_size = 0, cma_size = 0; 1346 unsigned long long crash_base, crash_size; 1347 bool high = false; 1348 int ret; 1349 1350 if (!IS_ENABLED(CONFIG_CRASH_RESERVE)) 1351 return; 1352 1353 ret = parse_crashkernel(boot_command_line, memblock_phys_mem_size(), 1354 &crash_size, &crash_base, 1355 &low_size, &cma_size, &high); 1356 if (ret) 1357 return; 1358 1359 reserve_crashkernel_generic(crash_size, crash_base, low_size, high); 1360 reserve_crashkernel_cma(cma_size); 1361 } 1362 1363 void __init paging_init(void) 1364 { 1365 setup_bootmem(); 1366 setup_vm_final(); 1367 1368 /* Depend on that Linear Mapping is ready */ 1369 memblock_allow_resize(); 1370 } 1371 1372 void __init misc_mem_init(void) 1373 { 1374 early_memtest(min_low_pfn << PAGE_SHIFT, max_low_pfn << PAGE_SHIFT); 1375 arch_numa_init(); 1376 dma_contiguous_reserve(dma32_phys_limit); 1377 #ifdef CONFIG_SPARSEMEM_VMEMMAP 1378 /* The entire VMEMMAP region has been populated. Flush TLB for this region */ 1379 local_flush_tlb_kernel_range(VMEMMAP_START, VMEMMAP_END); 1380 #endif 1381 arch_reserve_crashkernel(); 1382 memblock_dump_all(); 1383 } 1384 1385 #ifdef CONFIG_SPARSEMEM_VMEMMAP 1386 int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node, 1387 struct vmem_altmap *altmap) 1388 { 1389 WARN_ON((start < VMEMMAP_START) || (end > VMEMMAP_END)); 1390 1391 /* 1392 * Note that SPARSEMEM_VMEMMAP is only selected for rv64 and that we 1393 * can't use hugepage mappings for 2-level page table because in case of 1394 * memory hotplug, we are not able to update all the page tables with 1395 * the new PMDs. 1396 */ 1397 return vmemmap_populate_hugepages(start, end, node, altmap); 1398 } 1399 #endif 1400 1401 #if defined(CONFIG_MMU) && defined(CONFIG_64BIT) 1402 /* 1403 * Pre-allocates page-table pages for a specific area in the kernel 1404 * page-table. Only the level which needs to be synchronized between 1405 * all page-tables is allocated because the synchronization can be 1406 * expensive. 1407 */ 1408 static void __init preallocate_pgd_pages_range(unsigned long start, unsigned long end, 1409 const char *area) 1410 { 1411 unsigned long addr; 1412 const char *lvl; 1413 1414 for (addr = start; addr < end && addr >= start; addr = ALIGN(addr + 1, PGDIR_SIZE)) { 1415 pgd_t *pgd = pgd_offset_k(addr); 1416 p4d_t *p4d; 1417 pud_t *pud; 1418 pmd_t *pmd; 1419 1420 lvl = "p4d"; 1421 p4d = p4d_alloc(&init_mm, pgd, addr); 1422 if (!p4d) 1423 goto failed; 1424 1425 if (pgtable_l5_enabled()) 1426 continue; 1427 1428 lvl = "pud"; 1429 pud = pud_alloc(&init_mm, p4d, addr); 1430 if (!pud) 1431 goto failed; 1432 1433 if (pgtable_l4_enabled()) 1434 continue; 1435 1436 lvl = "pmd"; 1437 pmd = pmd_alloc(&init_mm, pud, addr); 1438 if (!pmd) 1439 goto failed; 1440 } 1441 return; 1442 1443 failed: 1444 /* 1445 * The pages have to be there now or they will be missing in 1446 * process page-tables later. 1447 */ 1448 panic("Failed to pre-allocate %s pages for %s area\n", lvl, area); 1449 } 1450 1451 #define PAGE_END KASAN_SHADOW_START 1452 1453 void __init pgtable_cache_init(void) 1454 { 1455 preallocate_pgd_pages_range(VMALLOC_START, VMALLOC_END, "vmalloc"); 1456 if (IS_ENABLED(CONFIG_MODULES)) 1457 preallocate_pgd_pages_range(MODULES_VADDR, MODULES_END, "bpf/modules"); 1458 if (IS_ENABLED(CONFIG_MEMORY_HOTPLUG)) { 1459 preallocate_pgd_pages_range(VMEMMAP_START, VMEMMAP_END, "vmemmap"); 1460 preallocate_pgd_pages_range(PAGE_OFFSET, PAGE_END, "direct map"); 1461 if (IS_ENABLED(CONFIG_KASAN)) 1462 preallocate_pgd_pages_range(KASAN_SHADOW_START, KASAN_SHADOW_END, "kasan"); 1463 } 1464 } 1465 #endif 1466 1467 #ifdef CONFIG_EXECMEM 1468 #ifdef CONFIG_MMU 1469 static struct execmem_info execmem_info __ro_after_init; 1470 1471 struct execmem_info __init *execmem_arch_setup(void) 1472 { 1473 execmem_info = (struct execmem_info){ 1474 .ranges = { 1475 [EXECMEM_DEFAULT] = { 1476 .start = MODULES_VADDR, 1477 .end = MODULES_END, 1478 .pgprot = PAGE_KERNEL, 1479 .alignment = 1, 1480 }, 1481 [EXECMEM_KPROBES] = { 1482 .start = VMALLOC_START, 1483 .end = VMALLOC_END, 1484 .pgprot = IS_ENABLED(CONFIG_STRICT_MODULE_RWX) ? 1485 PAGE_KERNEL_READ_EXEC : 1486 PAGE_KERNEL_EXEC, 1487 .alignment = 1, 1488 }, 1489 [EXECMEM_BPF] = { 1490 .start = BPF_JIT_REGION_START, 1491 .end = BPF_JIT_REGION_END, 1492 .pgprot = PAGE_KERNEL, 1493 .alignment = PAGE_SIZE, 1494 }, 1495 }, 1496 }; 1497 1498 return &execmem_info; 1499 } 1500 #endif /* CONFIG_MMU */ 1501 #endif /* CONFIG_EXECMEM */ 1502 1503 #ifdef CONFIG_MEMORY_HOTPLUG 1504 static void __meminit free_pte_table(pte_t *pte_start, pmd_t *pmd) 1505 { 1506 struct page *page = pmd_page(*pmd); 1507 struct ptdesc *ptdesc = page_ptdesc(page); 1508 pte_t *pte; 1509 int i; 1510 1511 for (i = 0; i < PTRS_PER_PTE; i++) { 1512 pte = pte_start + i; 1513 if (!pte_none(*pte)) 1514 return; 1515 } 1516 1517 pagetable_dtor(ptdesc); 1518 if (PageReserved(page)) 1519 free_reserved_page(page); 1520 else 1521 pagetable_free(ptdesc); 1522 pmd_clear(pmd); 1523 } 1524 1525 static void __meminit free_pmd_table(pmd_t *pmd_start, pud_t *pud, bool is_vmemmap) 1526 { 1527 struct page *page = pud_page(*pud); 1528 struct ptdesc *ptdesc = page_ptdesc(page); 1529 pmd_t *pmd; 1530 int i; 1531 1532 for (i = 0; i < PTRS_PER_PMD; i++) { 1533 pmd = pmd_start + i; 1534 if (!pmd_none(*pmd)) 1535 return; 1536 } 1537 1538 if (!is_vmemmap) 1539 pagetable_dtor(ptdesc); 1540 if (PageReserved(page)) 1541 free_reserved_page(page); 1542 else 1543 pagetable_free(ptdesc); 1544 pud_clear(pud); 1545 } 1546 1547 static void __meminit free_pud_table(pud_t *pud_start, p4d_t *p4d) 1548 { 1549 struct page *page = p4d_page(*p4d); 1550 pud_t *pud; 1551 int i; 1552 1553 for (i = 0; i < PTRS_PER_PUD; i++) { 1554 pud = pud_start + i; 1555 if (!pud_none(*pud)) 1556 return; 1557 } 1558 1559 if (PageReserved(page)) 1560 free_reserved_page(page); 1561 else 1562 __free_pages(page, 0); 1563 p4d_clear(p4d); 1564 } 1565 1566 static void __meminit free_vmemmap_storage(struct page *page, size_t size, 1567 struct vmem_altmap *altmap) 1568 { 1569 int order = get_order(size); 1570 1571 if (altmap) { 1572 vmem_altmap_free(altmap, size >> PAGE_SHIFT); 1573 return; 1574 } 1575 1576 if (PageReserved(page)) { 1577 unsigned int nr_pages = 1 << order; 1578 1579 while (nr_pages--) 1580 free_reserved_page(page++); 1581 return; 1582 } 1583 1584 __free_pages(page, order); 1585 } 1586 1587 static void __meminit remove_pte_mapping(pte_t *pte_base, unsigned long addr, unsigned long end, 1588 bool is_vmemmap, struct vmem_altmap *altmap) 1589 { 1590 unsigned long next; 1591 pte_t *ptep, pte; 1592 1593 for (; addr < end; addr = next) { 1594 next = (addr + PAGE_SIZE) & PAGE_MASK; 1595 if (next > end) 1596 next = end; 1597 1598 ptep = pte_base + pte_index(addr); 1599 pte = ptep_get(ptep); 1600 if (!pte_present(*ptep)) 1601 continue; 1602 1603 pte_clear(&init_mm, addr, ptep); 1604 if (is_vmemmap) 1605 free_vmemmap_storage(pte_page(pte), PAGE_SIZE, altmap); 1606 } 1607 } 1608 1609 static void __meminit remove_pmd_mapping(pmd_t *pmd_base, unsigned long addr, unsigned long end, 1610 bool is_vmemmap, struct vmem_altmap *altmap) 1611 { 1612 unsigned long next; 1613 pte_t *pte_base; 1614 pmd_t *pmdp, pmd; 1615 1616 for (; addr < end; addr = next) { 1617 next = pmd_addr_end(addr, end); 1618 pmdp = pmd_base + pmd_index(addr); 1619 pmd = pmdp_get(pmdp); 1620 if (!pmd_present(pmd)) 1621 continue; 1622 1623 if (pmd_leaf(pmd)) { 1624 pmd_clear(pmdp); 1625 if (is_vmemmap) 1626 free_vmemmap_storage(pmd_page(pmd), PMD_SIZE, altmap); 1627 continue; 1628 } 1629 1630 pte_base = (pte_t *)pmd_page_vaddr(*pmdp); 1631 remove_pte_mapping(pte_base, addr, next, is_vmemmap, altmap); 1632 free_pte_table(pte_base, pmdp); 1633 } 1634 } 1635 1636 static void __meminit remove_pud_mapping(pud_t *pud_base, unsigned long addr, unsigned long end, 1637 bool is_vmemmap, struct vmem_altmap *altmap) 1638 { 1639 unsigned long next; 1640 pud_t *pudp, pud; 1641 pmd_t *pmd_base; 1642 1643 for (; addr < end; addr = next) { 1644 next = pud_addr_end(addr, end); 1645 pudp = pgtable_l4_enabled() ? pud_base + pud_index(addr) : pud_base; 1646 pud = pudp_get(pudp); 1647 if (!pud_present(pud)) 1648 continue; 1649 1650 if (pud_leaf(pud)) { 1651 if (pgtable_l4_enabled()) { 1652 pud_clear(pudp); 1653 if (is_vmemmap) 1654 free_vmemmap_storage(pud_page(pud), PUD_SIZE, altmap); 1655 } 1656 continue; 1657 } 1658 1659 pmd_base = pmd_offset(pudp, 0); 1660 remove_pmd_mapping(pmd_base, addr, next, is_vmemmap, altmap); 1661 1662 if (pgtable_l4_enabled()) 1663 free_pmd_table(pmd_base, pudp, is_vmemmap); 1664 } 1665 } 1666 1667 static void __meminit remove_p4d_mapping(p4d_t *p4d_base, unsigned long addr, unsigned long end, 1668 bool is_vmemmap, struct vmem_altmap *altmap) 1669 { 1670 unsigned long next; 1671 p4d_t *p4dp, p4d; 1672 pud_t *pud_base; 1673 1674 for (; addr < end; addr = next) { 1675 next = p4d_addr_end(addr, end); 1676 p4dp = pgtable_l5_enabled() ? p4d_base + p4d_index(addr) : p4d_base; 1677 p4d = p4dp_get(p4dp); 1678 if (!p4d_present(p4d)) 1679 continue; 1680 1681 if (p4d_leaf(p4d)) { 1682 if (pgtable_l5_enabled()) { 1683 p4d_clear(p4dp); 1684 if (is_vmemmap) 1685 free_vmemmap_storage(p4d_page(p4d), P4D_SIZE, altmap); 1686 } 1687 continue; 1688 } 1689 1690 pud_base = pud_offset(p4dp, 0); 1691 remove_pud_mapping(pud_base, addr, next, is_vmemmap, altmap); 1692 1693 if (pgtable_l5_enabled()) 1694 free_pud_table(pud_base, p4dp); 1695 } 1696 } 1697 1698 static void __meminit remove_pgd_mapping(unsigned long va, unsigned long end, bool is_vmemmap, 1699 struct vmem_altmap *altmap) 1700 { 1701 unsigned long addr, next; 1702 p4d_t *p4d_base; 1703 pgd_t *pgd; 1704 1705 for (addr = va; addr < end; addr = next) { 1706 next = pgd_addr_end(addr, end); 1707 pgd = pgd_offset_k(addr); 1708 1709 if (!pgd_present(*pgd)) 1710 continue; 1711 1712 if (pgd_leaf(*pgd)) 1713 continue; 1714 1715 p4d_base = p4d_offset(pgd, 0); 1716 remove_p4d_mapping(p4d_base, addr, next, is_vmemmap, altmap); 1717 } 1718 1719 flush_tlb_all(); 1720 } 1721 1722 static void __meminit remove_linear_mapping(phys_addr_t start, u64 size) 1723 { 1724 unsigned long va = (unsigned long)__va(start); 1725 unsigned long end = (unsigned long)__va(start + size); 1726 1727 remove_pgd_mapping(va, end, false, NULL); 1728 } 1729 1730 struct range arch_get_mappable_range(void) 1731 { 1732 struct range mhp_range; 1733 1734 mhp_range.start = __pa(PAGE_OFFSET); 1735 mhp_range.end = __pa(PAGE_END - 1); 1736 return mhp_range; 1737 } 1738 1739 int __ref arch_add_memory(int nid, u64 start, u64 size, struct mhp_params *params) 1740 { 1741 int ret = 0; 1742 1743 create_linear_mapping_range(start, start + size, 0, ¶ms->pgprot); 1744 ret = __add_pages(nid, start >> PAGE_SHIFT, size >> PAGE_SHIFT, params); 1745 if (ret) { 1746 remove_linear_mapping(start, size); 1747 goto out; 1748 } 1749 1750 max_pfn = PFN_UP(start + size); 1751 max_low_pfn = max_pfn; 1752 1753 out: 1754 flush_tlb_all(); 1755 return ret; 1756 } 1757 1758 void __ref arch_remove_memory(u64 start, u64 size, struct vmem_altmap *altmap, 1759 struct dev_pagemap *pgmap) 1760 { 1761 __remove_pages(start >> PAGE_SHIFT, size >> PAGE_SHIFT, altmap, pgmap); 1762 remove_linear_mapping(start, size); 1763 flush_tlb_all(); 1764 } 1765 1766 void __ref vmemmap_free(unsigned long start, unsigned long end, struct vmem_altmap *altmap) 1767 { 1768 remove_pgd_mapping(start, end, true, altmap); 1769 } 1770 #endif /* CONFIG_MEMORY_HOTPLUG */ 1771