xref: /linux/drivers/gpu/drm/msm/adreno/adreno_device.c (revision 5f2b6c5f6b692c696a232d12c43b8e41c0d393b9)
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * Copyright (C) 2013-2014 Red Hat
4  * Author: Rob Clark <robdclark@gmail.com>
5  *
6  * Copyright (c) 2014,2017 The Linux Foundation. All rights reserved.
7  */
8 
9 #include "adreno_gpu.h"
10 
11 bool hang_debug = false;
12 MODULE_PARM_DESC(hang_debug, "Dump registers when hang is detected (can be slow!)");
13 module_param_named(hang_debug, hang_debug, bool, 0600);
14 
15 bool snapshot_debugbus = false;
16 MODULE_PARM_DESC(snapshot_debugbus, "Include debugbus sections in GPU devcoredump (if not fused off)");
17 module_param_named(snapshot_debugbus, snapshot_debugbus, bool, 0600);
18 
19 bool allow_vram_carveout = false;
20 MODULE_PARM_DESC(allow_vram_carveout, "Allow using VRAM Carveout, in place of IOMMU");
21 module_param_named(allow_vram_carveout, allow_vram_carveout, bool, 0600);
22 
23 int enable_preemption = -1;
24 MODULE_PARM_DESC(enable_preemption, "Enable preemption (A7xx only) (1=on , 0=disable, -1=auto (default))");
25 module_param(enable_preemption, int, 0600);
26 
27 bool disable_acd;
28 MODULE_PARM_DESC(disable_acd, "Forcefully disable GPU ACD");
29 module_param_unsafe(disable_acd, bool, 0400);
30 
31 extern const struct adreno_gpulist a2xx_gpulist;
32 extern const struct adreno_gpulist a3xx_gpulist;
33 extern const struct adreno_gpulist a4xx_gpulist;
34 extern const struct adreno_gpulist a5xx_gpulist;
35 extern const struct adreno_gpulist a6xx_gpulist;
36 extern const struct adreno_gpulist a7xx_gpulist;
37 
38 static const struct adreno_gpulist *gpulists[] = {
39 	&a2xx_gpulist,
40 	&a3xx_gpulist,
41 	&a4xx_gpulist,
42 	&a5xx_gpulist,
43 	&a6xx_gpulist,
44 	&a7xx_gpulist,
45 };
46 
adreno_info(uint32_t chip_id)47 static const struct adreno_info *adreno_info(uint32_t chip_id)
48 {
49 	/* identify gpu: */
50 	for (int i = 0; i < ARRAY_SIZE(gpulists); i++) {
51 		for (int j = 0; j < gpulists[i]->gpus_count; j++) {
52 			const struct adreno_info *info = &gpulists[i]->gpus[j];
53 
54 			if (info->machine && !of_machine_is_compatible(info->machine))
55 				continue;
56 
57 			for (int k = 0; info->chip_ids[k]; k++)
58 				if (info->chip_ids[k] == chip_id)
59 					return info;
60 		}
61 	}
62 
63 	return NULL;
64 }
65 
adreno_load_gpu(struct drm_device * dev)66 struct msm_gpu *adreno_load_gpu(struct drm_device *dev)
67 {
68 	struct msm_drm_private *priv = dev->dev_private;
69 	struct platform_device *pdev = priv->gpu_pdev;
70 	struct msm_gpu *gpu = NULL;
71 	struct adreno_gpu *adreno_gpu;
72 	int ret;
73 
74 	if (pdev)
75 		gpu = dev_to_gpu(&pdev->dev);
76 
77 	if (!gpu) {
78 		dev_err_once(dev->dev, "no GPU device was found\n");
79 		return NULL;
80 	}
81 
82 	adreno_gpu = to_adreno_gpu(gpu);
83 
84 	/*
85 	 * The number one reason for HW init to fail is if the firmware isn't
86 	 * loaded yet. Try that first and don't bother continuing on
87 	 * otherwise
88 	 */
89 
90 	ret = adreno_load_fw(adreno_gpu);
91 	if (ret)
92 		return NULL;
93 
94 	if (gpu->funcs->ucode_load) {
95 		ret = gpu->funcs->ucode_load(gpu);
96 		if (ret)
97 			return NULL;
98 	}
99 
100 	/*
101 	 * Now that we have firmware loaded, and are ready to begin
102 	 * booting the gpu, go ahead and enable runpm:
103 	 */
104 	pm_runtime_enable(&pdev->dev);
105 
106 	ret = pm_runtime_get_sync(&pdev->dev);
107 	if (ret < 0) {
108 		pm_runtime_put_noidle(&pdev->dev);
109 		DRM_DEV_ERROR(dev->dev, "Couldn't power up the GPU: %d\n", ret);
110 		goto err_disable_rpm;
111 	}
112 
113 	mutex_lock(&gpu->lock);
114 	ret = msm_gpu_hw_init(gpu);
115 	mutex_unlock(&gpu->lock);
116 	if (ret) {
117 		DRM_DEV_ERROR(dev->dev, "gpu hw init failed: %d\n", ret);
118 		goto err_put_rpm;
119 	}
120 
121 	pm_runtime_put_autosuspend(&pdev->dev);
122 
123 #ifdef CONFIG_DEBUG_FS
124 	if (gpu->funcs->debugfs_init) {
125 		gpu->funcs->debugfs_init(gpu, dev->primary);
126 		gpu->funcs->debugfs_init(gpu, dev->render);
127 	}
128 #endif
129 
130 	return gpu;
131 
132 err_put_rpm:
133 	pm_runtime_put_sync_suspend(&pdev->dev);
134 err_disable_rpm:
135 	pm_runtime_disable(&pdev->dev);
136 
137 	return NULL;
138 }
139 
find_chipid(struct device_node * node,uint32_t * chipid)140 static int find_chipid(struct device_node *node, uint32_t *chipid)
141 {
142 	const char *compat;
143 	int ret;
144 
145 	/* first search the compat strings for qcom,adreno-XYZ.W: */
146 	ret = of_property_read_string_index(node, "compatible", 0, &compat);
147 	if (ret == 0) {
148 		unsigned int r, patch;
149 
150 		if (sscanf(compat, "qcom,adreno-%u.%u", &r, &patch) == 2 ||
151 		    sscanf(compat, "amd,imageon-%u.%u", &r, &patch) == 2) {
152 			uint32_t core, major, minor;
153 
154 			core = r / 100;
155 			r %= 100;
156 			major = r / 10;
157 			r %= 10;
158 			minor = r;
159 
160 			*chipid = (core << 24) |
161 				(major << 16) |
162 				(minor << 8) |
163 				patch;
164 
165 			return 0;
166 		}
167 
168 		if (sscanf(compat, "qcom,adreno-%08x", chipid) == 1)
169 			return 0;
170 	}
171 
172 	/* and if that fails, fall back to legacy "qcom,chipid" property: */
173 	ret = of_property_read_u32(node, "qcom,chipid", chipid);
174 	if (ret) {
175 		DRM_ERROR("%pOF: could not parse qcom,chipid: %d\n",
176 			  node, ret);
177 		return ret;
178 	}
179 
180 	pr_warn("%pOF: Using legacy qcom,chipid binding!\n", node);
181 
182 	return 0;
183 }
184 
adreno_has_gpu(struct device_node * node)185 bool adreno_has_gpu(struct device_node *node)
186 {
187 	const struct adreno_info *info;
188 	uint32_t chip_id;
189 	int ret;
190 
191 	ret = find_chipid(node, &chip_id);
192 	if (ret)
193 		return false;
194 
195 	info = adreno_info(chip_id);
196 	if (!info) {
197 		pr_warn("%pOF: Unknown GPU revision: %"ADRENO_CHIPID_FMT"\n",
198 			node, ADRENO_CHIPID_ARGS(chip_id));
199 		return false;
200 	}
201 
202 	return true;
203 }
204 
adreno_bind(struct device * dev,struct device * master,void * data)205 static int adreno_bind(struct device *dev, struct device *master, void *data)
206 {
207 	static struct adreno_platform_config config = {};
208 	const struct adreno_info *info;
209 	struct msm_drm_private *priv = dev_get_drvdata(master);
210 	struct drm_device *drm = priv->dev;
211 	struct msm_gpu *gpu;
212 	int ret;
213 
214 	ret = find_chipid(dev->of_node, &config.chip_id);
215 	/* We shouldn't have gotten this far if we can't parse the chip_id */
216 	if (WARN_ON(ret))
217 		return ret;
218 
219 	dev->platform_data = &config;
220 	priv->gpu_pdev = to_platform_device(dev);
221 
222 	info = adreno_info(config.chip_id);
223 	/* We shouldn't have gotten this far if we don't recognize the GPU: */
224 	if (WARN_ON(!info))
225 		return -ENXIO;
226 
227 	config.info = info;
228 
229 	DBG("Found GPU: %"ADRENO_CHIPID_FMT, ADRENO_CHIPID_ARGS(config.chip_id));
230 
231 	priv->is_a2xx = info->family < ADRENO_3XX;
232 	priv->has_cached_coherent =
233 		!!(info->quirks & ADRENO_QUIRK_HAS_CACHED_COHERENT);
234 
235 	gpu = info->init(drm);
236 	if (IS_ERR(gpu)) {
237 		dev_warn(drm->dev, "failed to load adreno gpu\n");
238 		return PTR_ERR(gpu);
239 	}
240 
241 	ret = dev_pm_opp_of_find_icc_paths(dev, NULL);
242 	if (ret)
243 		return ret;
244 
245 	return 0;
246 }
247 
248 static int adreno_system_suspend(struct device *dev);
adreno_unbind(struct device * dev,struct device * master,void * data)249 static void adreno_unbind(struct device *dev, struct device *master,
250 		void *data)
251 {
252 	struct msm_drm_private *priv = dev_get_drvdata(master);
253 	struct msm_gpu *gpu = dev_to_gpu(dev);
254 
255 	if (pm_runtime_enabled(dev))
256 		WARN_ON_ONCE(adreno_system_suspend(dev));
257 	gpu->funcs->destroy(gpu);
258 
259 	priv->gpu_pdev = NULL;
260 }
261 
262 static const struct component_ops a3xx_ops = {
263 	.bind   = adreno_bind,
264 	.unbind = adreno_unbind,
265 };
266 
adreno_device_register_headless(void)267 static void adreno_device_register_headless(void)
268 {
269 	/* on imx5, we don't have a top-level mdp/dpu node
270 	 * this creates a dummy node for the driver for that case
271 	 */
272 	struct platform_device_info dummy_info = {
273 		.parent = NULL,
274 		.name = "msm",
275 		.id = -1,
276 		.res = NULL,
277 		.num_res = 0,
278 		.data = NULL,
279 		.size_data = 0,
280 		.dma_mask = ~0,
281 	};
282 	platform_device_register_full(&dummy_info);
283 }
284 
adreno_probe(struct platform_device * pdev)285 static int adreno_probe(struct platform_device *pdev)
286 {
287 
288 	int ret;
289 
290 	ret = component_add(&pdev->dev, &a3xx_ops);
291 	if (ret)
292 		return ret;
293 
294 	if (of_device_is_compatible(pdev->dev.of_node, "amd,imageon"))
295 		adreno_device_register_headless();
296 
297 	return 0;
298 }
299 
adreno_remove(struct platform_device * pdev)300 static void adreno_remove(struct platform_device *pdev)
301 {
302 	component_del(&pdev->dev, &a3xx_ops);
303 }
304 
adreno_shutdown(struct platform_device * pdev)305 static void adreno_shutdown(struct platform_device *pdev)
306 {
307 	WARN_ON_ONCE(adreno_system_suspend(&pdev->dev));
308 }
309 
310 static const struct of_device_id dt_match[] = {
311 	{ .compatible = "qcom,adreno" },
312 	{ .compatible = "qcom,adreno-3xx" },
313 	/* for compatibility with imx5 gpu: */
314 	{ .compatible = "amd,imageon" },
315 	/* for backwards compat w/ downstream kgsl DT files: */
316 	{ .compatible = "qcom,kgsl-3d0" },
317 	{}
318 };
319 
adreno_runtime_resume(struct device * dev)320 static int adreno_runtime_resume(struct device *dev)
321 {
322 	struct msm_gpu *gpu = dev_to_gpu(dev);
323 
324 	return gpu->funcs->pm_resume(gpu);
325 }
326 
adreno_runtime_suspend(struct device * dev)327 static int adreno_runtime_suspend(struct device *dev)
328 {
329 	struct msm_gpu *gpu = dev_to_gpu(dev);
330 
331 	/*
332 	 * We should be holding a runpm ref, which will prevent
333 	 * runtime suspend.  In the system suspend path, we've
334 	 * already waited for active jobs to complete.
335 	 */
336 	WARN_ON_ONCE(gpu->active_submits);
337 
338 	return gpu->funcs->pm_suspend(gpu);
339 }
340 
suspend_scheduler(struct msm_gpu * gpu)341 static void suspend_scheduler(struct msm_gpu *gpu)
342 {
343 	int i;
344 
345 	/*
346 	 * Shut down the scheduler before we force suspend, so that
347 	 * suspend isn't racing with scheduler kthread feeding us
348 	 * more work.
349 	 *
350 	 * Note, we just want to park the thread, and let any jobs
351 	 * that are already on the hw queue complete normally, as
352 	 * opposed to the drm_sched_stop() path used for handling
353 	 * faulting/timed-out jobs.  We can't really cancel any jobs
354 	 * already on the hw queue without racing with the GPU.
355 	 */
356 	for (i = 0; i < gpu->nr_rings; i++) {
357 		struct drm_gpu_scheduler *sched = &gpu->rb[i]->sched;
358 
359 		drm_sched_wqueue_stop(sched);
360 	}
361 }
362 
resume_scheduler(struct msm_gpu * gpu)363 static void resume_scheduler(struct msm_gpu *gpu)
364 {
365 	int i;
366 
367 	for (i = 0; i < gpu->nr_rings; i++) {
368 		struct drm_gpu_scheduler *sched = &gpu->rb[i]->sched;
369 
370 		drm_sched_wqueue_start(sched);
371 	}
372 }
373 
adreno_system_suspend(struct device * dev)374 static int adreno_system_suspend(struct device *dev)
375 {
376 	struct msm_gpu *gpu = dev_to_gpu(dev);
377 	int remaining, ret;
378 
379 	if (!gpu)
380 		return 0;
381 
382 	suspend_scheduler(gpu);
383 
384 	remaining = wait_event_timeout(gpu->retire_event,
385 				       gpu->active_submits == 0,
386 				       msecs_to_jiffies(1000));
387 	if (remaining == 0) {
388 		dev_err(dev, "Timeout waiting for GPU to suspend\n");
389 		ret = -EBUSY;
390 		goto out;
391 	}
392 
393 	ret = pm_runtime_force_suspend(dev);
394 out:
395 	if (ret)
396 		resume_scheduler(gpu);
397 
398 	return ret;
399 }
400 
adreno_system_resume(struct device * dev)401 static int adreno_system_resume(struct device *dev)
402 {
403 	struct msm_gpu *gpu = dev_to_gpu(dev);
404 
405 	if (!gpu)
406 		return 0;
407 
408 	resume_scheduler(gpu);
409 	return pm_runtime_force_resume(dev);
410 }
411 
412 static const struct dev_pm_ops adreno_pm_ops = {
413 	SYSTEM_SLEEP_PM_OPS(adreno_system_suspend, adreno_system_resume)
414 	RUNTIME_PM_OPS(adreno_runtime_suspend, adreno_runtime_resume, NULL)
415 };
416 
417 static struct platform_driver adreno_driver = {
418 	.probe = adreno_probe,
419 	.remove = adreno_remove,
420 	.shutdown = adreno_shutdown,
421 	.driver = {
422 		.name = "adreno",
423 		.of_match_table = dt_match,
424 		.pm = &adreno_pm_ops,
425 	},
426 };
427 
adreno_register(void)428 void __init adreno_register(void)
429 {
430 	platform_driver_register(&adreno_driver);
431 }
432 
adreno_unregister(void)433 void __exit adreno_unregister(void)
434 {
435 	platform_driver_unregister(&adreno_driver);
436 }
437