1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Copyright (C) 2018 Cadence Design Systems Inc. 4 * 5 * Author: Boris Brezillon <boris.brezillon@bootlin.com> 6 */ 7 8 #ifndef I3C_MASTER_H 9 #define I3C_MASTER_H 10 11 #include <asm/bitsperlong.h> 12 13 #include <linux/bitops.h> 14 #include <linux/i2c.h> 15 #include <linux/i3c/ccc.h> 16 #include <linux/i3c/device.h> 17 #include <linux/rwsem.h> 18 #include <linux/spinlock.h> 19 #include <linux/workqueue.h> 20 21 #define I3C_HOT_JOIN_ADDR 0x2 22 #define I3C_BROADCAST_ADDR 0x7e 23 #define I3C_MAX_ADDR GENMASK(6, 0) 24 25 struct i2c_client; 26 27 /* notifier actions. notifier call data is the struct i3c_bus */ 28 enum { 29 I3C_NOTIFY_BUS_ADD, 30 I3C_NOTIFY_BUS_REMOVE, 31 }; 32 33 struct i3c_master_controller; 34 struct i3c_bus; 35 struct i3c_device; 36 extern const struct bus_type i3c_bus_type; 37 38 /** 39 * struct i3c_i2c_dev_desc - Common part of the I3C/I2C device descriptor 40 * @node: node element used to insert the slot into the I2C or I3C device 41 * list 42 * @master: I3C master that instantiated this device. Will be used to do 43 * I2C/I3C transfers 44 * @master_priv: master private data assigned to the device. Can be used to 45 * add master specific information 46 * 47 * This structure is describing common I3C/I2C dev information. 48 */ 49 struct i3c_i2c_dev_desc { 50 struct list_head node; 51 struct i3c_master_controller *master; 52 void *master_priv; 53 }; 54 55 #define I3C_LVR_I2C_INDEX_MASK GENMASK(7, 5) 56 #define I3C_LVR_I2C_INDEX(x) ((x) << 5) 57 #define I3C_LVR_I2C_FM_MODE BIT(4) 58 59 #define I2C_MAX_ADDR GENMASK(6, 0) 60 61 /** 62 * struct i2c_dev_boardinfo - I2C device board information 63 * @node: used to insert the boardinfo object in the I2C boardinfo list 64 * @base: regular I2C board information 65 * @lvr: LVR (Legacy Virtual Register) needed by the I3C core to know about 66 * the I2C device limitations 67 * 68 * This structure is used to attach board-level information to an I2C device. 69 * Each I2C device connected on the I3C bus should have one. 70 */ 71 struct i2c_dev_boardinfo { 72 struct list_head node; 73 struct i2c_board_info base; 74 u8 lvr; 75 }; 76 77 /** 78 * struct i2c_dev_desc - I2C device descriptor 79 * @common: common part of the I2C device descriptor 80 * @dev: I2C device object registered to the I2C framework 81 * @addr: I2C device address 82 * @lvr: LVR (Legacy Virtual Register) needed by the I3C core to know about 83 * the I2C device limitations 84 * 85 * Each I2C device connected on the bus will have an i2c_dev_desc. 86 * This object is created by the core and later attached to the controller 87 * using &struct_i3c_master_controller->ops->attach_i2c_dev(). 88 * 89 * &struct_i2c_dev_desc is the internal representation of an I2C device 90 * connected on an I3C bus. This object is also passed to all 91 * &struct_i3c_master_controller_ops hooks. 92 */ 93 struct i2c_dev_desc { 94 struct i3c_i2c_dev_desc common; 95 struct i2c_client *dev; 96 u16 addr; 97 u8 lvr; 98 }; 99 100 /** 101 * struct i3c_ibi_slot - I3C IBI (In-Band Interrupt) slot 102 * @work: work associated to this slot. The IBI handler will be called from 103 * there 104 * @dev: the I3C device that has generated this IBI 105 * @len: length of the payload associated to this IBI 106 * @data: payload buffer 107 * 108 * An IBI slot is an object pre-allocated by the controller and used when an 109 * IBI comes in. 110 * Every time an IBI comes in, the I3C master driver should find a free IBI 111 * slot in its IBI slot pool, retrieve the IBI payload and queue the IBI using 112 * i3c_master_queue_ibi(). 113 * 114 * How IBI slots are allocated is left to the I3C master driver, though, for 115 * simple kmalloc-based allocation, the generic IBI slot pool can be used. 116 */ 117 struct i3c_ibi_slot { 118 struct work_struct work; 119 struct i3c_dev_desc *dev; 120 unsigned int len; 121 void *data; 122 }; 123 124 /** 125 * struct i3c_device_ibi_info - IBI information attached to a specific device 126 * @all_ibis_handled: used to be informed when no more IBIs are waiting to be 127 * processed. Used by i3c_device_disable_ibi() to wait for 128 * all IBIs to be dequeued 129 * @pending_ibis: count the number of pending IBIs. Each pending IBI has its 130 * work element queued to the controller workqueue 131 * @max_payload_len: maximum payload length for an IBI coming from this device. 132 * this value is specified when calling 133 * i3c_device_request_ibi() and should not change at run 134 * time. All messages IBIs exceeding this limit should be 135 * rejected by the master 136 * @num_slots: number of IBI slots reserved for this device 137 * @enabled: reflect the IBI status 138 * @wq: workqueue used to execute IBI handlers. 139 * @handler: IBI handler specified at i3c_device_request_ibi() call time. This 140 * handler will be called from the controller workqueue, and as such 141 * is allowed to sleep (though it is recommended to process the IBI 142 * as fast as possible to not stall processing of other IBIs queued 143 * on the same workqueue). 144 * New I3C messages can be sent from the IBI handler 145 * 146 * The &struct_i3c_device_ibi_info object is allocated when 147 * i3c_device_request_ibi() is called and attached to a specific device. This 148 * object is here to manage IBIs coming from a specific I3C device. 149 * 150 * Note that this structure is the generic view of the IBI management 151 * infrastructure. I3C master drivers may have their own internal 152 * representation which they can associate to the device using 153 * controller-private data. 154 */ 155 struct i3c_device_ibi_info { 156 struct completion all_ibis_handled; 157 atomic_t pending_ibis; 158 unsigned int max_payload_len; 159 unsigned int num_slots; 160 unsigned int enabled; 161 struct workqueue_struct *wq; 162 void (*handler)(struct i3c_device *dev, 163 const struct i3c_ibi_payload *payload); 164 }; 165 166 /** 167 * struct i3c_dev_boardinfo - I3C device board information 168 * @node: used to insert the boardinfo object in the I3C boardinfo list 169 * @init_dyn_addr: initial dynamic address requested by the FW. We provide no 170 * guarantee that the device will end up using this address, 171 * but try our best to assign this specific address to the 172 * device 173 * @static_addr: static address the I3C device listen on before it's been 174 * assigned a dynamic address by the master. Will be used during 175 * bus initialization to assign it a specific dynamic address 176 * before starting DAA (Dynamic Address Assignment) 177 * @pid: I3C Provisioned ID exposed by the device. This is a unique identifier 178 * that may be used to attach boardinfo to i3c_dev_desc when the device 179 * does not have a static address 180 * @of_node: optional DT node in case the device has been described in the DT 181 * 182 * This structure is used to attach board-level information to an I3C device. 183 * Not all I3C devices connected on the bus will have a boardinfo. It's only 184 * needed if you want to attach extra resources to a device or assign it a 185 * specific dynamic address. 186 */ 187 struct i3c_dev_boardinfo { 188 struct list_head node; 189 u8 init_dyn_addr; 190 u8 static_addr; 191 u64 pid; 192 struct device_node *of_node; 193 }; 194 195 /** 196 * struct i3c_dev_desc - I3C device descriptor 197 * @common: common part of the I3C device descriptor 198 * @info: I3C device information. Will be automatically filled when you create 199 * your device with i3c_master_add_i3c_dev_locked() 200 * @ibi_lock: lock used to protect the &struct_i3c_device->ibi 201 * @ibi: IBI info attached to a device. Should be NULL until 202 * i3c_device_request_ibi() is called 203 * @dev: pointer to the I3C device object exposed to I3C device drivers. This 204 * should never be accessed from I3C master controller drivers. Only core 205 * code should manipulate it in when updating the dev <-> desc link or 206 * when propagating IBI events to the driver 207 * @boardinfo: pointer to the boardinfo attached to this I3C device 208 * 209 * Internal representation of an I3C device. This object is only used by the 210 * core and passed to I3C master controller drivers when they're requested to 211 * do some operations on the device. 212 * The core maintains the link between the internal I3C dev descriptor and the 213 * object exposed to the I3C device drivers (&struct_i3c_device). 214 */ 215 struct i3c_dev_desc { 216 struct i3c_i2c_dev_desc common; 217 struct i3c_device_info info; 218 struct mutex ibi_lock; 219 struct i3c_device_ibi_info *ibi; 220 struct i3c_device *dev; 221 const struct i3c_dev_boardinfo *boardinfo; 222 }; 223 224 /** 225 * struct i3c_device - I3C device object 226 * @dev: device object to register the I3C dev to the device model 227 * @desc: pointer to an i3c device descriptor object. This link is updated 228 * every time the I3C device is rediscovered with a different dynamic 229 * address assigned 230 * @bus: I3C bus this device is attached to 231 * 232 * I3C device object exposed to I3C device drivers. The takes care of linking 233 * this object to the relevant &struct_i3c_dev_desc one. 234 * All I3C devs on the I3C bus are represented, including I3C masters. For each 235 * of them, we have an instance of &struct i3c_device. 236 */ 237 struct i3c_device { 238 struct device dev; 239 struct i3c_dev_desc *desc; 240 struct i3c_bus *bus; 241 }; 242 243 /* 244 * The I3C specification says the maximum number of devices connected on the 245 * bus is 11, but this number depends on external parameters like trace length, 246 * capacitive load per Device, and the types of Devices present on the Bus. 247 * I3C master can also have limitations, so this number is just here as a 248 * reference and should be adjusted on a per-controller/per-board basis. 249 */ 250 #define I3C_BUS_MAX_DEVS 11 251 252 /* Taken from the I3C Spec V1.1.1, chapter 6.2. "Timing specification" */ 253 #define I3C_BUS_I2C_FM_PLUS_SCL_MAX_RATE 1000000 254 #define I3C_BUS_I2C_FM_SCL_MAX_RATE 400000 255 #define I3C_BUS_I3C_SCL_MAX_RATE 12900000 256 #define I3C_BUS_I3C_SCL_TYP_RATE 12500000 257 #define I3C_BUS_TAVAL_MIN_NS 1000 258 #define I3C_BUS_TBUF_MIXED_FM_MIN_NS 1300 259 #define I3C_BUS_THIGH_MIXED_MAX_NS 41 260 #define I3C_BUS_TIDLE_MIN_NS 200000 261 #define I3C_BUS_TLOW_OD_MIN_NS 200 262 263 /** 264 * enum i3c_bus_mode - I3C bus mode 265 * @I3C_BUS_MODE_PURE: only I3C devices are connected to the bus. No limitation 266 * expected 267 * @I3C_BUS_MODE_MIXED_FAST: I2C devices with 50ns spike filter are present on 268 * the bus. The only impact in this mode is that the 269 * high SCL pulse has to stay below 50ns to trick I2C 270 * devices when transmitting I3C frames 271 * @I3C_BUS_MODE_MIXED_LIMITED: I2C devices without 50ns spike filter are 272 * present on the bus. However they allow 273 * compliance up to the maximum SDR SCL clock 274 * frequency. 275 * @I3C_BUS_MODE_MIXED_SLOW: I2C devices without 50ns spike filter are present 276 * on the bus 277 */ 278 enum i3c_bus_mode { 279 I3C_BUS_MODE_PURE, 280 I3C_BUS_MODE_MIXED_FAST, 281 I3C_BUS_MODE_MIXED_LIMITED, 282 I3C_BUS_MODE_MIXED_SLOW, 283 }; 284 285 /** 286 * enum i3c_open_drain_speed - I3C open-drain speed 287 * @I3C_OPEN_DRAIN_SLOW_SPEED: Slow open-drain speed for sending the first 288 * broadcast address. The first broadcast address at this speed 289 * will be visible to all devices on the I3C bus. I3C devices 290 * working in I2C mode will turn off their spike filter when 291 * switching into I3C mode. 292 * @I3C_OPEN_DRAIN_NORMAL_SPEED: Normal open-drain speed in I3C bus mode. 293 */ 294 enum i3c_open_drain_speed { 295 I3C_OPEN_DRAIN_SLOW_SPEED, 296 I3C_OPEN_DRAIN_NORMAL_SPEED, 297 }; 298 299 /** 300 * enum i3c_addr_slot_status - I3C address slot status 301 * @I3C_ADDR_SLOT_FREE: address is free 302 * @I3C_ADDR_SLOT_RSVD: address is reserved 303 * @I3C_ADDR_SLOT_I2C_DEV: address is assigned to an I2C device 304 * @I3C_ADDR_SLOT_I3C_DEV: address is assigned to an I3C device 305 * @I3C_ADDR_SLOT_STATUS_MASK: address slot mask 306 * @I3C_ADDR_SLOT_EXT_STATUS_MASK: address slot mask with extended information 307 * @I3C_ADDR_SLOT_EXT_DESIRED: the bitmask represents addresses that are preferred by some devices, 308 * such as the "assigned-address" property in a device tree source. 309 * On an I3C bus, addresses are assigned dynamically, and we need to know which 310 * addresses are free to use and which ones are already assigned. 311 * 312 * Addresses marked as reserved are those reserved by the I3C protocol 313 * (broadcast address, ...). 314 */ 315 enum i3c_addr_slot_status { 316 I3C_ADDR_SLOT_FREE, 317 I3C_ADDR_SLOT_RSVD, 318 I3C_ADDR_SLOT_I2C_DEV, 319 I3C_ADDR_SLOT_I3C_DEV, 320 I3C_ADDR_SLOT_STATUS_MASK = 3, 321 I3C_ADDR_SLOT_EXT_STATUS_MASK = 7, 322 I3C_ADDR_SLOT_EXT_DESIRED = BIT(2), 323 }; 324 325 #define I3C_ADDR_SLOT_STATUS_BITS 4 326 327 /** 328 * struct i3c_bus - I3C bus object 329 * @cur_master: I3C master currently driving the bus. Since I3C is multi-master 330 * this can change over the time. Will be used to let a master 331 * know whether it needs to request bus ownership before sending 332 * a frame or not 333 * @id: bus ID. Assigned by the framework when register the bus 334 * @addrslots: a bitmap with 2-bits per-slot to encode the address status and 335 * ease the DAA (Dynamic Address Assignment) procedure (see 336 * &enum i3c_addr_slot_status) 337 * @mode: bus mode (see &enum i3c_bus_mode) 338 * @scl_rate.i3c: maximum rate for the clock signal when doing I3C SDR/priv 339 * transfers 340 * @scl_rate.i2c: maximum rate for the clock signal when doing I2C transfers 341 * @scl_rate: SCL signal rate for I3C and I2C mode 342 * @devs.i3c: contains a list of I3C device descriptors representing I3C 343 * devices connected on the bus and successfully attached to the 344 * I3C master 345 * @devs.i2c: contains a list of I2C device descriptors representing I2C 346 * devices connected on the bus and successfully attached to the 347 * I3C master 348 * @devs: 2 lists containing all I3C/I2C devices connected to the bus 349 * @lock: read/write lock on the bus. This is needed to protect against 350 * operations that have an impact on the whole bus and the devices 351 * connected to it. For example, when asking slaves to drop their 352 * dynamic address (RSTDAA CCC), we need to make sure no one is trying 353 * to send I3C frames to these devices. 354 * Note that this lock does not protect against concurrency between 355 * devices: several drivers can send different I3C/I2C frames through 356 * the same master in parallel. This is the responsibility of the 357 * master to guarantee that frames are actually sent sequentially and 358 * not interlaced 359 * 360 * The I3C bus is represented with its own object and not implicitly described 361 * by the I3C master to cope with the multi-master functionality, where one bus 362 * can be shared amongst several masters, each of them requesting bus ownership 363 * when they need to. 364 */ 365 struct i3c_bus { 366 struct i3c_dev_desc *cur_master; 367 int id; 368 unsigned long addrslots[((I2C_MAX_ADDR + 1) * I3C_ADDR_SLOT_STATUS_BITS) / BITS_PER_LONG]; 369 enum i3c_bus_mode mode; 370 struct { 371 unsigned long i3c; 372 unsigned long i2c; 373 } scl_rate; 374 struct { 375 struct list_head i3c; 376 struct list_head i2c; 377 } devs; 378 struct rw_semaphore lock; 379 }; 380 381 /** 382 * struct i3c_master_controller_ops - I3C master methods 383 * @bus_init: hook responsible for the I3C bus initialization. You should at 384 * least call master_set_info() from there and set the bus mode. 385 * You can also put controller specific initialization in there. 386 * This method is mandatory. 387 * @bus_cleanup: cleanup everything done in 388 * &i3c_master_controller_ops->bus_init(). 389 * This method is optional. 390 * @attach_i3c_dev: called every time an I3C device is attached to the bus. It 391 * can be after a DAA or when a device is statically declared 392 * by the FW, in which case it will only have a static address 393 * and the dynamic address will be 0. 394 * When this function is called, device information have not 395 * been retrieved yet. 396 * This is a good place to attach master controller specific 397 * data to I3C devices. 398 * This method is optional. 399 * @reattach_i3c_dev: called every time an I3C device has its addressed 400 * changed. It can be because the device has been powered 401 * down and has lost its address, or it can happen when a 402 * device had a static address and has been assigned a 403 * dynamic address with SETDASA. 404 * This method is optional. 405 * @detach_i3c_dev: called when an I3C device is detached from the bus. Usually 406 * happens when the master device is unregistered. 407 * This method is optional. 408 * @do_daa: do a DAA (Dynamic Address Assignment) procedure. This is procedure 409 * should send an ENTDAA CCC command and then add all devices 410 * discovered sure the DAA using i3c_master_add_i3c_dev_locked(). 411 * Add devices added with i3c_master_add_i3c_dev_locked() will then be 412 * attached or re-attached to the controller. 413 * This method is mandatory. 414 * @supports_ccc_cmd: should return true if the CCC command is supported, false 415 * otherwise. 416 * This method is optional, if not provided the core assumes 417 * all CCC commands are supported. 418 * @send_ccc_cmd: send a CCC command 419 * This method is mandatory. 420 * @i3c_xfers: do one or several I3C SDR or HDR transfers. 421 * This method is mandatory. 422 * @attach_i2c_dev: called every time an I2C device is attached to the bus. 423 * This is a good place to attach master controller specific 424 * data to I2C devices. 425 * This method is optional. 426 * @detach_i2c_dev: called when an I2C device is detached from the bus. Usually 427 * happens when the master device is unregistered. 428 * This method is optional. 429 * @i2c_xfers: do one or several I2C transfers. Note that, unlike i3c 430 * transfers, the core does not guarantee that buffers attached to 431 * the transfers are DMA-safe. If drivers want to have DMA-safe 432 * buffers, they should use the i2c_get_dma_safe_msg_buf() 433 * and i2c_put_dma_safe_msg_buf() helpers provided by the I2C 434 * framework. 435 * This method is mandatory. 436 * @request_ibi: attach an IBI handler to an I3C device. This implies defining 437 * an IBI handler and the constraints of the IBI (maximum payload 438 * length and number of pre-allocated slots). 439 * Some controllers support less IBI-capable devices than regular 440 * devices, so this method might return -%EBUSY if there's no 441 * more space for an extra IBI registration 442 * This method is optional. 443 * @free_ibi: free an IBI previously requested with ->request_ibi(). The IBI 444 * should have been disabled with ->disable_irq() prior to that 445 * This method is mandatory only if ->request_ibi is not NULL. 446 * @enable_ibi: enable the IBI. Only valid if ->request_ibi() has been called 447 * prior to ->enable_ibi(). The controller should first enable 448 * the IBI on the controller end (for example, unmask the hardware 449 * IRQ) and then send the ENEC CCC command (with the IBI flag set) 450 * to the I3C device. 451 * This method is mandatory only if ->request_ibi is not NULL. 452 * @disable_ibi: disable an IBI. First send the DISEC CCC command with the IBI 453 * flag set and then deactivate the hardware IRQ on the 454 * controller end. 455 * This method is mandatory only if ->request_ibi is not NULL. 456 * @recycle_ibi_slot: recycle an IBI slot. Called every time an IBI has been 457 * processed by its handler. The IBI slot should be put back 458 * in the IBI slot pool so that the controller can re-use it 459 * for a future IBI 460 * This method is mandatory only if ->request_ibi is not 461 * NULL. 462 * @enable_hotjoin: enable hot join event detect. 463 * @disable_hotjoin: disable hot join event detect. 464 * @set_speed: adjust I3C open drain mode timing. 465 * @set_dev_nack_retry: configure device NACK retry count for the master 466 * controller. 467 */ 468 struct i3c_master_controller_ops { 469 int (*bus_init)(struct i3c_master_controller *master); 470 void (*bus_cleanup)(struct i3c_master_controller *master); 471 int (*attach_i3c_dev)(struct i3c_dev_desc *dev); 472 int (*reattach_i3c_dev)(struct i3c_dev_desc *dev, u8 old_dyn_addr); 473 void (*detach_i3c_dev)(struct i3c_dev_desc *dev); 474 int (*do_daa)(struct i3c_master_controller *master); 475 bool (*supports_ccc_cmd)(struct i3c_master_controller *master, 476 const struct i3c_ccc_cmd *cmd); 477 int (*send_ccc_cmd)(struct i3c_master_controller *master, 478 struct i3c_ccc_cmd *cmd); 479 int (*i3c_xfers)(struct i3c_dev_desc *dev, 480 struct i3c_xfer *xfers, 481 int nxfers, enum i3c_xfer_mode mode); 482 int (*attach_i2c_dev)(struct i2c_dev_desc *dev); 483 void (*detach_i2c_dev)(struct i2c_dev_desc *dev); 484 int (*i2c_xfers)(struct i2c_dev_desc *dev, 485 struct i2c_msg *xfers, int nxfers); 486 int (*request_ibi)(struct i3c_dev_desc *dev, 487 const struct i3c_ibi_setup *req); 488 void (*free_ibi)(struct i3c_dev_desc *dev); 489 int (*enable_ibi)(struct i3c_dev_desc *dev); 490 int (*disable_ibi)(struct i3c_dev_desc *dev); 491 void (*recycle_ibi_slot)(struct i3c_dev_desc *dev, 492 struct i3c_ibi_slot *slot); 493 int (*enable_hotjoin)(struct i3c_master_controller *master); 494 int (*disable_hotjoin)(struct i3c_master_controller *master); 495 int (*set_speed)(struct i3c_master_controller *master, enum i3c_open_drain_speed speed); 496 int (*set_dev_nack_retry)(struct i3c_master_controller *master, 497 unsigned long dev_nack_retry_cnt); 498 }; 499 500 /** 501 * struct i3c_master_controller - I3C master controller object 502 * @dev: device to be registered to the device-model 503 * @this: an I3C device object representing this master. This device will be 504 * added to the list of I3C devs available on the bus 505 * @i2c: I2C adapter used for backward compatibility. This adapter is 506 * registered to the I2C subsystem to be as transparent as possible to 507 * existing I2C drivers 508 * @ops: master operations. See &struct i3c_master_controller_ops 509 * @secondary: true if the master is a secondary master 510 * @init_done: true when the bus initialization is done 511 * @hotjoin: true if the master support hotjoin 512 * @rpm_allowed: true if Runtime PM allowed 513 * @rpm_ibi_allowed: true if IBI and Hot-Join allowed while runtime suspended 514 * @boardinfo.i3c: list of I3C boardinfo objects 515 * @boardinfo.i2c: list of I2C boardinfo objects 516 * @boardinfo: board-level information attached to devices connected on the bus 517 * @bus: I3C bus exposed by this master 518 * @wq: workqueue which can be used by master 519 * drivers if they need to postpone operations that need to take place 520 * in a thread context. Typical examples are Hot Join processing which 521 * requires taking the bus lock in maintenance, which in turn, can only 522 * be done from a sleep-able context 523 * @dev_nack_retry_count: retry count when slave device nack 524 * 525 * A &struct i3c_master_controller has to be registered to the I3C subsystem 526 * through i3c_master_register(). None of &struct i3c_master_controller fields 527 * should be set manually, just pass appropriate values to 528 * i3c_master_register(). 529 */ 530 struct i3c_master_controller { 531 struct device dev; 532 struct i3c_dev_desc *this; 533 struct i2c_adapter i2c; 534 const struct i3c_master_controller_ops *ops; 535 unsigned int secondary : 1; 536 unsigned int init_done : 1; 537 unsigned int hotjoin: 1; 538 unsigned int rpm_allowed: 1; 539 unsigned int rpm_ibi_allowed: 1; 540 struct { 541 struct list_head i3c; 542 struct list_head i2c; 543 } boardinfo; 544 struct i3c_bus bus; 545 struct workqueue_struct *wq; 546 unsigned int dev_nack_retry_count; 547 }; 548 549 /** 550 * i3c_bus_for_each_i2cdev() - iterate over all I2C devices present on the bus 551 * @bus: the I3C bus 552 * @dev: an I2C device descriptor pointer updated to point to the current slot 553 * at each iteration of the loop 554 * 555 * Iterate over all I2C devs present on the bus. 556 */ 557 #define i3c_bus_for_each_i2cdev(bus, dev) \ 558 list_for_each_entry(dev, &(bus)->devs.i2c, common.node) 559 560 /** 561 * i3c_bus_for_each_i3cdev() - iterate over all I3C devices present on the bus 562 * @bus: the I3C bus 563 * @dev: and I3C device descriptor pointer updated to point to the current slot 564 * at each iteration of the loop 565 * 566 * Iterate over all I3C devs present on the bus. 567 */ 568 #define i3c_bus_for_each_i3cdev(bus, dev) \ 569 list_for_each_entry(dev, &(bus)->devs.i3c, common.node) 570 571 /** 572 * struct i3c_dma - DMA transfer and mapping descriptor 573 * @dev: device object of a device doing DMA 574 * @buf: destination/source buffer for DMA 575 * @len: length of transfer 576 * @map_len: length of DMA mapping 577 * @addr: mapped DMA address for a Host Controller Driver 578 * @dir: DMA direction 579 * @bounce_buf: an allocated bounce buffer if transfer needs it or NULL 580 */ 581 struct i3c_dma { 582 struct device *dev; 583 void *buf; 584 size_t len; 585 size_t map_len; 586 dma_addr_t addr; 587 enum dma_data_direction dir; 588 void *bounce_buf; 589 }; 590 591 int i3c_master_do_i2c_xfers(struct i3c_master_controller *master, 592 const struct i2c_msg *xfers, 593 int nxfers); 594 595 int i3c_master_disec_locked(struct i3c_master_controller *master, u8 addr, 596 u8 evts); 597 int i3c_master_enec_locked(struct i3c_master_controller *master, u8 addr, 598 u8 evts); 599 int i3c_master_entdaa_locked(struct i3c_master_controller *master); 600 int i3c_master_defslvs_locked(struct i3c_master_controller *master); 601 602 int i3c_master_get_free_addr(struct i3c_master_controller *master, 603 u8 start_addr); 604 605 int i3c_master_add_i3c_dev_locked(struct i3c_master_controller *master, 606 u8 addr); 607 int i3c_master_do_daa(struct i3c_master_controller *master); 608 int i3c_master_do_daa_ext(struct i3c_master_controller *master, bool rstdaa); 609 struct i3c_dma *i3c_master_dma_map_single(struct device *dev, void *ptr, 610 size_t len, bool force_bounce, 611 enum dma_data_direction dir); 612 void i3c_master_dma_unmap_single(struct i3c_dma *dma_xfer); 613 DEFINE_FREE(i3c_master_dma_unmap_single, void *, 614 if (_T) i3c_master_dma_unmap_single(_T)) 615 616 int i3c_master_set_info(struct i3c_master_controller *master, 617 const struct i3c_device_info *info); 618 619 int i3c_master_register(struct i3c_master_controller *master, 620 struct device *parent, 621 const struct i3c_master_controller_ops *ops, 622 bool secondary); 623 void i3c_master_unregister(struct i3c_master_controller *master); 624 int i3c_master_enable_hotjoin(struct i3c_master_controller *master); 625 int i3c_master_disable_hotjoin(struct i3c_master_controller *master); 626 627 /** 628 * i3c_dev_get_master_data() - get master private data attached to an I3C 629 * device descriptor 630 * @dev: the I3C device descriptor to get private data from 631 * 632 * Return: the private data previously attached with i3c_dev_set_master_data() 633 * or NULL if no data has been attached to the device. 634 */ 635 static inline void *i3c_dev_get_master_data(const struct i3c_dev_desc *dev) 636 { 637 return dev->common.master_priv; 638 } 639 640 /** 641 * i3c_dev_set_master_data() - attach master private data to an I3C device 642 * descriptor 643 * @dev: the I3C device descriptor to attach private data to 644 * @data: private data 645 * 646 * This functions allows a master controller to attach per-device private data 647 * which can then be retrieved with i3c_dev_get_master_data(). 648 */ 649 static inline void i3c_dev_set_master_data(struct i3c_dev_desc *dev, 650 void *data) 651 { 652 dev->common.master_priv = data; 653 } 654 655 /** 656 * i2c_dev_get_master_data() - get master private data attached to an I2C 657 * device descriptor 658 * @dev: the I2C device descriptor to get private data from 659 * 660 * Return: the private data previously attached with i2c_dev_set_master_data() 661 * or NULL if no data has been attached to the device. 662 */ 663 static inline void *i2c_dev_get_master_data(const struct i2c_dev_desc *dev) 664 { 665 return dev->common.master_priv; 666 } 667 668 /** 669 * i2c_dev_set_master_data() - attach master private data to an I2C device 670 * descriptor 671 * @dev: the I2C device descriptor to attach private data to 672 * @data: private data 673 * 674 * This functions allows a master controller to attach per-device private data 675 * which can then be retrieved with i2c_device_get_master_data(). 676 */ 677 static inline void i2c_dev_set_master_data(struct i2c_dev_desc *dev, 678 void *data) 679 { 680 dev->common.master_priv = data; 681 } 682 683 /** 684 * i3c_dev_get_master() - get master used to communicate with a device 685 * @dev: I3C dev 686 * 687 * Return: the master controller driving @dev 688 */ 689 static inline struct i3c_master_controller * 690 i3c_dev_get_master(struct i3c_dev_desc *dev) 691 { 692 return dev->common.master; 693 } 694 695 /** 696 * i2c_dev_get_master() - get master used to communicate with a device 697 * @dev: I2C dev 698 * 699 * Return: the master controller driving @dev 700 */ 701 static inline struct i3c_master_controller * 702 i2c_dev_get_master(struct i2c_dev_desc *dev) 703 { 704 return dev->common.master; 705 } 706 707 /** 708 * i3c_master_get_bus() - get the bus attached to a master 709 * @master: master object 710 * 711 * Return: the I3C bus @master is connected to 712 */ 713 static inline struct i3c_bus * 714 i3c_master_get_bus(struct i3c_master_controller *master) 715 { 716 return &master->bus; 717 } 718 719 struct i3c_generic_ibi_pool; 720 721 struct i3c_generic_ibi_pool * 722 i3c_generic_ibi_alloc_pool(struct i3c_dev_desc *dev, 723 const struct i3c_ibi_setup *req); 724 void i3c_generic_ibi_free_pool(struct i3c_generic_ibi_pool *pool); 725 726 struct i3c_ibi_slot * 727 i3c_generic_ibi_get_free_slot(struct i3c_generic_ibi_pool *pool); 728 void i3c_generic_ibi_recycle_slot(struct i3c_generic_ibi_pool *pool, 729 struct i3c_ibi_slot *slot); 730 731 void i3c_master_queue_ibi(struct i3c_dev_desc *dev, struct i3c_ibi_slot *slot); 732 733 struct i3c_ibi_slot *i3c_master_get_free_ibi_slot(struct i3c_dev_desc *dev); 734 735 void i3c_for_each_bus_locked(int (*fn)(struct i3c_bus *bus, void *data), 736 void *data); 737 int i3c_register_notifier(struct notifier_block *nb); 738 int i3c_unregister_notifier(struct notifier_block *nb); 739 740 #endif /* I3C_MASTER_H */ 741