1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Copyright (C) 2013 Samsung Electronics Co., Ltd.
4 * Author: Jacek Anaszewski <j.anaszewski@samsung.com>
5 *
6 * IIO features supported by the driver:
7 *
8 * Read-only raw channels:
9 * - illuminance_clear [lux]
10 * - illuminance_ir
11 * - proximity
12 *
13 * Triggered buffer:
14 * - illuminance_clear
15 * - illuminance_ir
16 * - proximity
17 *
18 * Events:
19 * - illuminance_clear (rising and falling)
20 * - proximity (rising and falling)
21 * - both falling and rising thresholds for the proximity events
22 * must be set to the values greater than 0.
23 *
24 * The driver supports triggered buffers for all the three
25 * channels as well as high and low threshold events for the
26 * illuminance_clear and proxmimity channels. Triggers
27 * can be enabled simultaneously with both illuminance_clear
28 * events. Proximity events cannot be enabled simultaneously
29 * with any triggers or illuminance events. Enabling/disabling
30 * one of the proximity events automatically enables/disables
31 * the other one.
32 */
33
34 #include <linux/cleanup.h>
35 #include <linux/debugfs.h>
36 #include <linux/delay.h>
37 #include <linux/i2c.h>
38 #include <linux/interrupt.h>
39 #include <linux/irq.h>
40 #include <linux/irq_work.h>
41 #include <linux/minmax.h>
42 #include <linux/module.h>
43 #include <linux/mutex.h>
44 #include <linux/regmap.h>
45 #include <linux/regulator/consumer.h>
46 #include <linux/slab.h>
47 #include <linux/unaligned.h>
48
49 #include <linux/iio/buffer.h>
50 #include <linux/iio/events.h>
51 #include <linux/iio/iio.h>
52 #include <linux/iio/sysfs.h>
53 #include <linux/iio/trigger.h>
54 #include <linux/iio/trigger_consumer.h>
55 #include <linux/iio/triggered_buffer.h>
56
57 /* Registers */
58 #define GP2AP020A00F_OP_REG 0x00 /* Basic operations */
59 #define GP2AP020A00F_ALS_REG 0x01 /* ALS related settings */
60 #define GP2AP020A00F_PS_REG 0x02 /* PS related settings */
61 #define GP2AP020A00F_LED_REG 0x03 /* LED reg */
62 #define GP2AP020A00F_TL_L_REG 0x04 /* ALS: Threshold low LSB */
63 #define GP2AP020A00F_TL_H_REG 0x05 /* ALS: Threshold low MSB */
64 #define GP2AP020A00F_TH_L_REG 0x06 /* ALS: Threshold high LSB */
65 #define GP2AP020A00F_TH_H_REG 0x07 /* ALS: Threshold high MSB */
66 #define GP2AP020A00F_PL_L_REG 0x08 /* PS: Threshold low LSB */
67 #define GP2AP020A00F_PL_H_REG 0x09 /* PS: Threshold low MSB */
68 #define GP2AP020A00F_PH_L_REG 0x0a /* PS: Threshold high LSB */
69 #define GP2AP020A00F_PH_H_REG 0x0b /* PS: Threshold high MSB */
70 #define GP2AP020A00F_D0_L_REG 0x0c /* ALS result: Clear/Illuminance LSB */
71 #define GP2AP020A00F_D0_H_REG 0x0d /* ALS result: Clear/Illuminance MSB */
72 #define GP2AP020A00F_D1_L_REG 0x0e /* ALS result: IR LSB */
73 #define GP2AP020A00F_D1_H_REG 0x0f /* ALS result: IR LSB */
74 #define GP2AP020A00F_D2_L_REG 0x10 /* PS result LSB */
75 #define GP2AP020A00F_D2_H_REG 0x11 /* PS result MSB */
76 #define GP2AP020A00F_NUM_REGS 0x12 /* Number of registers */
77
78 /* OP_REG bits */
79 #define GP2AP020A00F_OP3_MASK 0x80 /* Software shutdown */
80 #define GP2AP020A00F_OP3_SHUTDOWN 0x00
81 #define GP2AP020A00F_OP3_OPERATION 0x80
82 #define GP2AP020A00F_OP2_MASK 0x40 /* Auto shutdown/Continuous mode */
83 #define GP2AP020A00F_OP2_AUTO_SHUTDOWN 0x00
84 #define GP2AP020A00F_OP2_CONT_OPERATION 0x40
85 #define GP2AP020A00F_OP_MASK 0x30 /* Operating mode selection */
86 #define GP2AP020A00F_OP_ALS_AND_PS 0x00
87 #define GP2AP020A00F_OP_ALS 0x10
88 #define GP2AP020A00F_OP_PS 0x20
89 #define GP2AP020A00F_OP_DEBUG 0x30
90 #define GP2AP020A00F_PROX_MASK 0x08 /* PS: detection/non-detection */
91 #define GP2AP020A00F_PROX_NON_DETECT 0x00
92 #define GP2AP020A00F_PROX_DETECT 0x08
93 #define GP2AP020A00F_FLAG_P 0x04 /* PS: interrupt result */
94 #define GP2AP020A00F_FLAG_A 0x02 /* ALS: interrupt result */
95 #define GP2AP020A00F_TYPE_MASK 0x01 /* Output data type selection */
96 #define GP2AP020A00F_TYPE_MANUAL_CALC 0x00
97 #define GP2AP020A00F_TYPE_AUTO_CALC 0x01
98
99 /* ALS_REG bits */
100 #define GP2AP020A00F_PRST_MASK 0xc0 /* Number of measurement cycles */
101 #define GP2AP020A00F_PRST_ONCE 0x00
102 #define GP2AP020A00F_PRST_4_CYCLES 0x40
103 #define GP2AP020A00F_PRST_8_CYCLES 0x80
104 #define GP2AP020A00F_PRST_16_CYCLES 0xc0
105 #define GP2AP020A00F_RES_A_MASK 0x38 /* ALS: Resolution */
106 #define GP2AP020A00F_RES_A_800ms 0x00
107 #define GP2AP020A00F_RES_A_400ms 0x08
108 #define GP2AP020A00F_RES_A_200ms 0x10
109 #define GP2AP020A00F_RES_A_100ms 0x18
110 #define GP2AP020A00F_RES_A_25ms 0x20
111 #define GP2AP020A00F_RES_A_6_25ms 0x28
112 #define GP2AP020A00F_RES_A_1_56ms 0x30
113 #define GP2AP020A00F_RES_A_0_39ms 0x38
114 #define GP2AP020A00F_RANGE_A_MASK 0x07 /* ALS: Max measurable range */
115 #define GP2AP020A00F_RANGE_A_x1 0x00
116 #define GP2AP020A00F_RANGE_A_x2 0x01
117 #define GP2AP020A00F_RANGE_A_x4 0x02
118 #define GP2AP020A00F_RANGE_A_x8 0x03
119 #define GP2AP020A00F_RANGE_A_x16 0x04
120 #define GP2AP020A00F_RANGE_A_x32 0x05
121 #define GP2AP020A00F_RANGE_A_x64 0x06
122 #define GP2AP020A00F_RANGE_A_x128 0x07
123
124 /* PS_REG bits */
125 #define GP2AP020A00F_ALC_MASK 0x80 /* Auto light cancel */
126 #define GP2AP020A00F_ALC_ON 0x80
127 #define GP2AP020A00F_ALC_OFF 0x00
128 #define GP2AP020A00F_INTTYPE_MASK 0x40 /* Interrupt type setting */
129 #define GP2AP020A00F_INTTYPE_LEVEL 0x00
130 #define GP2AP020A00F_INTTYPE_PULSE 0x40
131 #define GP2AP020A00F_RES_P_MASK 0x38 /* PS: Resolution */
132 #define GP2AP020A00F_RES_P_800ms_x2 0x00
133 #define GP2AP020A00F_RES_P_400ms_x2 0x08
134 #define GP2AP020A00F_RES_P_200ms_x2 0x10
135 #define GP2AP020A00F_RES_P_100ms_x2 0x18
136 #define GP2AP020A00F_RES_P_25ms_x2 0x20
137 #define GP2AP020A00F_RES_P_6_25ms_x2 0x28
138 #define GP2AP020A00F_RES_P_1_56ms_x2 0x30
139 #define GP2AP020A00F_RES_P_0_39ms_x2 0x38
140 #define GP2AP020A00F_RANGE_P_MASK 0x07 /* PS: Max measurable range */
141 #define GP2AP020A00F_RANGE_P_x1 0x00
142 #define GP2AP020A00F_RANGE_P_x2 0x01
143 #define GP2AP020A00F_RANGE_P_x4 0x02
144 #define GP2AP020A00F_RANGE_P_x8 0x03
145 #define GP2AP020A00F_RANGE_P_x16 0x04
146 #define GP2AP020A00F_RANGE_P_x32 0x05
147 #define GP2AP020A00F_RANGE_P_x64 0x06
148 #define GP2AP020A00F_RANGE_P_x128 0x07
149
150 /* LED reg bits */
151 #define GP2AP020A00F_INTVAL_MASK 0xc0 /* Intermittent operating */
152 #define GP2AP020A00F_INTVAL_0 0x00
153 #define GP2AP020A00F_INTVAL_4 0x40
154 #define GP2AP020A00F_INTVAL_8 0x80
155 #define GP2AP020A00F_INTVAL_16 0xc0
156 #define GP2AP020A00F_IS_MASK 0x30 /* ILED drive peak current */
157 #define GP2AP020A00F_IS_13_8mA 0x00
158 #define GP2AP020A00F_IS_27_5mA 0x10
159 #define GP2AP020A00F_IS_55mA 0x20
160 #define GP2AP020A00F_IS_110mA 0x30
161 #define GP2AP020A00F_PIN_MASK 0x0c /* INT terminal setting */
162 #define GP2AP020A00F_PIN_ALS_OR_PS 0x00
163 #define GP2AP020A00F_PIN_ALS 0x04
164 #define GP2AP020A00F_PIN_PS 0x08
165 #define GP2AP020A00F_PIN_PS_DETECT 0x0c
166 #define GP2AP020A00F_FREQ_MASK 0x02 /* LED modulation frequency */
167 #define GP2AP020A00F_FREQ_327_5kHz 0x00
168 #define GP2AP020A00F_FREQ_81_8kHz 0x02
169 #define GP2AP020A00F_RST 0x01 /* Software reset */
170
171 #define GP2AP020A00F_SCAN_MODE_LIGHT_CLEAR 0
172 #define GP2AP020A00F_SCAN_MODE_LIGHT_IR 1
173 #define GP2AP020A00F_SCAN_MODE_PROXIMITY 2
174 #define GP2AP020A00F_CHAN_TIMESTAMP 3
175
176 #define GP2AP020A00F_DATA_READY_TIMEOUT msecs_to_jiffies(1000)
177 #define GP2AP020A00F_DATA_REG(chan) (GP2AP020A00F_D0_L_REG + (chan) * 2)
178 #define GP2AP020A00F_THRESH_REG(th_val_id) (GP2AP020A00F_TL_L_REG + (th_val_id) * 2)
179 #define GP2AP020A00F_THRESH_VAL_ID(reg_addr) ((reg_addr - 4) / 2)
180
181 #define GP2AP020A00F_SUBTRACT_MODE 0
182 #define GP2AP020A00F_ADD_MODE 1
183
184 #define GP2AP020A00F_MAX_CHANNELS 3
185
186 enum gp2ap020a00f_opmode {
187 GP2AP020A00F_OPMODE_READ_RAW_CLEAR,
188 GP2AP020A00F_OPMODE_READ_RAW_IR,
189 GP2AP020A00F_OPMODE_READ_RAW_PROXIMITY,
190 GP2AP020A00F_OPMODE_ALS,
191 GP2AP020A00F_OPMODE_PS,
192 GP2AP020A00F_OPMODE_ALS_AND_PS,
193 GP2AP020A00F_OPMODE_PROX_DETECT,
194 GP2AP020A00F_OPMODE_SHUTDOWN,
195 GP2AP020A00F_NUM_OPMODES
196 };
197
198 enum gp2ap020a00f_cmd {
199 GP2AP020A00F_CMD_READ_RAW_CLEAR,
200 GP2AP020A00F_CMD_READ_RAW_IR,
201 GP2AP020A00F_CMD_READ_RAW_PROXIMITY,
202 GP2AP020A00F_CMD_TRIGGER_CLEAR_EN,
203 GP2AP020A00F_CMD_TRIGGER_CLEAR_DIS,
204 GP2AP020A00F_CMD_TRIGGER_IR_EN,
205 GP2AP020A00F_CMD_TRIGGER_IR_DIS,
206 GP2AP020A00F_CMD_TRIGGER_PROX_EN,
207 GP2AP020A00F_CMD_TRIGGER_PROX_DIS,
208 GP2AP020A00F_CMD_ALS_HIGH_EV_EN,
209 GP2AP020A00F_CMD_ALS_HIGH_EV_DIS,
210 GP2AP020A00F_CMD_ALS_LOW_EV_EN,
211 GP2AP020A00F_CMD_ALS_LOW_EV_DIS,
212 GP2AP020A00F_CMD_PROX_HIGH_EV_EN,
213 GP2AP020A00F_CMD_PROX_HIGH_EV_DIS,
214 GP2AP020A00F_CMD_PROX_LOW_EV_EN,
215 GP2AP020A00F_CMD_PROX_LOW_EV_DIS,
216 };
217
218 enum gp2ap020a00f_flags {
219 GP2AP020A00F_FLAG_ALS_CLEAR_TRIGGER,
220 GP2AP020A00F_FLAG_ALS_IR_TRIGGER,
221 GP2AP020A00F_FLAG_PROX_TRIGGER,
222 GP2AP020A00F_FLAG_PROX_RISING_EV,
223 GP2AP020A00F_FLAG_PROX_FALLING_EV,
224 GP2AP020A00F_FLAG_ALS_RISING_EV,
225 GP2AP020A00F_FLAG_ALS_FALLING_EV,
226 GP2AP020A00F_FLAG_LUX_MODE_HI,
227 GP2AP020A00F_FLAG_DATA_READY,
228 };
229
230 enum gp2ap020a00f_thresh_val_id {
231 GP2AP020A00F_THRESH_TL,
232 GP2AP020A00F_THRESH_TH,
233 GP2AP020A00F_THRESH_PL,
234 GP2AP020A00F_THRESH_PH,
235 };
236
237 struct gp2ap020a00f_data {
238 struct i2c_client *client;
239 struct mutex lock;
240 char *buffer;
241 struct regulator *vled_reg;
242 unsigned long flags;
243 enum gp2ap020a00f_opmode cur_opmode;
244 struct iio_trigger *trig;
245 struct regmap *regmap;
246 unsigned int thresh_val[4];
247 struct irq_work work;
248 wait_queue_head_t data_ready_queue;
249 };
250
251 static const u8 gp2ap020a00f_reg_init_tab[] = {
252 [GP2AP020A00F_OP_REG] = GP2AP020A00F_OP3_SHUTDOWN,
253 [GP2AP020A00F_ALS_REG] = GP2AP020A00F_RES_A_25ms |
254 GP2AP020A00F_RANGE_A_x8,
255 [GP2AP020A00F_PS_REG] = GP2AP020A00F_ALC_ON |
256 GP2AP020A00F_RES_P_1_56ms_x2 |
257 GP2AP020A00F_RANGE_P_x4,
258 [GP2AP020A00F_LED_REG] = GP2AP020A00F_INTVAL_0 |
259 GP2AP020A00F_IS_110mA |
260 GP2AP020A00F_FREQ_327_5kHz,
261 [GP2AP020A00F_TL_L_REG] = 0,
262 [GP2AP020A00F_TL_H_REG] = 0,
263 [GP2AP020A00F_TH_L_REG] = 0,
264 [GP2AP020A00F_TH_H_REG] = 0,
265 [GP2AP020A00F_PL_L_REG] = 0,
266 [GP2AP020A00F_PL_H_REG] = 0,
267 [GP2AP020A00F_PH_L_REG] = 0,
268 [GP2AP020A00F_PH_H_REG] = 0,
269 };
270
gp2ap020a00f_is_volatile_reg(struct device * dev,unsigned int reg)271 static bool gp2ap020a00f_is_volatile_reg(struct device *dev, unsigned int reg)
272 {
273 switch (reg) {
274 case GP2AP020A00F_OP_REG:
275 case GP2AP020A00F_D0_L_REG:
276 case GP2AP020A00F_D0_H_REG:
277 case GP2AP020A00F_D1_L_REG:
278 case GP2AP020A00F_D1_H_REG:
279 case GP2AP020A00F_D2_L_REG:
280 case GP2AP020A00F_D2_H_REG:
281 return true;
282 default:
283 return false;
284 }
285 }
286
287 static const struct regmap_config gp2ap020a00f_regmap_config = {
288 .reg_bits = 8,
289 .val_bits = 8,
290
291 .max_register = GP2AP020A00F_D2_H_REG,
292 .cache_type = REGCACHE_RBTREE,
293
294 .volatile_reg = gp2ap020a00f_is_volatile_reg,
295 };
296
297 static const struct gp2ap020a00f_mutable_config_regs {
298 u8 op_reg;
299 u8 als_reg;
300 u8 ps_reg;
301 u8 led_reg;
302 } opmode_regs_settings[GP2AP020A00F_NUM_OPMODES] = {
303 [GP2AP020A00F_OPMODE_READ_RAW_CLEAR] = {
304 GP2AP020A00F_OP_ALS | GP2AP020A00F_OP2_CONT_OPERATION
305 | GP2AP020A00F_OP3_OPERATION
306 | GP2AP020A00F_TYPE_AUTO_CALC,
307 GP2AP020A00F_PRST_ONCE,
308 GP2AP020A00F_INTTYPE_LEVEL,
309 GP2AP020A00F_PIN_ALS
310 },
311 [GP2AP020A00F_OPMODE_READ_RAW_IR] = {
312 GP2AP020A00F_OP_ALS | GP2AP020A00F_OP2_CONT_OPERATION
313 | GP2AP020A00F_OP3_OPERATION
314 | GP2AP020A00F_TYPE_MANUAL_CALC,
315 GP2AP020A00F_PRST_ONCE,
316 GP2AP020A00F_INTTYPE_LEVEL,
317 GP2AP020A00F_PIN_ALS
318 },
319 [GP2AP020A00F_OPMODE_READ_RAW_PROXIMITY] = {
320 GP2AP020A00F_OP_PS | GP2AP020A00F_OP2_CONT_OPERATION
321 | GP2AP020A00F_OP3_OPERATION
322 | GP2AP020A00F_TYPE_MANUAL_CALC,
323 GP2AP020A00F_PRST_ONCE,
324 GP2AP020A00F_INTTYPE_LEVEL,
325 GP2AP020A00F_PIN_PS
326 },
327 [GP2AP020A00F_OPMODE_PROX_DETECT] = {
328 GP2AP020A00F_OP_PS | GP2AP020A00F_OP2_CONT_OPERATION
329 | GP2AP020A00F_OP3_OPERATION
330 | GP2AP020A00F_TYPE_MANUAL_CALC,
331 GP2AP020A00F_PRST_4_CYCLES,
332 GP2AP020A00F_INTTYPE_PULSE,
333 GP2AP020A00F_PIN_PS_DETECT
334 },
335 [GP2AP020A00F_OPMODE_ALS] = {
336 GP2AP020A00F_OP_ALS | GP2AP020A00F_OP2_CONT_OPERATION
337 | GP2AP020A00F_OP3_OPERATION
338 | GP2AP020A00F_TYPE_AUTO_CALC,
339 GP2AP020A00F_PRST_ONCE,
340 GP2AP020A00F_INTTYPE_LEVEL,
341 GP2AP020A00F_PIN_ALS
342 },
343 [GP2AP020A00F_OPMODE_PS] = {
344 GP2AP020A00F_OP_PS | GP2AP020A00F_OP2_CONT_OPERATION
345 | GP2AP020A00F_OP3_OPERATION
346 | GP2AP020A00F_TYPE_MANUAL_CALC,
347 GP2AP020A00F_PRST_4_CYCLES,
348 GP2AP020A00F_INTTYPE_LEVEL,
349 GP2AP020A00F_PIN_PS
350 },
351 [GP2AP020A00F_OPMODE_ALS_AND_PS] = {
352 GP2AP020A00F_OP_ALS_AND_PS
353 | GP2AP020A00F_OP2_CONT_OPERATION
354 | GP2AP020A00F_OP3_OPERATION
355 | GP2AP020A00F_TYPE_AUTO_CALC,
356 GP2AP020A00F_PRST_4_CYCLES,
357 GP2AP020A00F_INTTYPE_LEVEL,
358 GP2AP020A00F_PIN_ALS_OR_PS
359 },
360 [GP2AP020A00F_OPMODE_SHUTDOWN] = { GP2AP020A00F_OP3_SHUTDOWN, },
361 };
362
gp2ap020a00f_set_operation_mode(struct gp2ap020a00f_data * data,enum gp2ap020a00f_opmode op)363 static int gp2ap020a00f_set_operation_mode(struct gp2ap020a00f_data *data,
364 enum gp2ap020a00f_opmode op)
365 {
366 unsigned int op_reg_val;
367 int err;
368
369 if (op != GP2AP020A00F_OPMODE_SHUTDOWN) {
370 err = regmap_read(data->regmap, GP2AP020A00F_OP_REG,
371 &op_reg_val);
372 if (err < 0)
373 return err;
374 /*
375 * Shutdown the device if the operation being executed entails
376 * mode transition.
377 */
378 if ((opmode_regs_settings[op].op_reg & GP2AP020A00F_OP_MASK) !=
379 (op_reg_val & GP2AP020A00F_OP_MASK)) {
380 /* set shutdown mode */
381 err = regmap_update_bits(data->regmap,
382 GP2AP020A00F_OP_REG, GP2AP020A00F_OP3_MASK,
383 GP2AP020A00F_OP3_SHUTDOWN);
384 if (err < 0)
385 return err;
386 }
387
388 err = regmap_update_bits(data->regmap, GP2AP020A00F_ALS_REG,
389 GP2AP020A00F_PRST_MASK, opmode_regs_settings[op].als_reg);
390 if (err < 0)
391 return err;
392
393 err = regmap_update_bits(data->regmap, GP2AP020A00F_PS_REG,
394 GP2AP020A00F_INTTYPE_MASK, opmode_regs_settings[op].ps_reg);
395 if (err < 0)
396 return err;
397
398 err = regmap_update_bits(data->regmap, GP2AP020A00F_LED_REG,
399 GP2AP020A00F_PIN_MASK, opmode_regs_settings[op].led_reg);
400 if (err < 0)
401 return err;
402 }
403
404 /* Set OP_REG and apply operation mode (power on / off) */
405 err = regmap_update_bits(data->regmap,
406 GP2AP020A00F_OP_REG,
407 GP2AP020A00F_OP_MASK | GP2AP020A00F_OP2_MASK |
408 GP2AP020A00F_OP3_MASK | GP2AP020A00F_TYPE_MASK,
409 opmode_regs_settings[op].op_reg);
410 if (err < 0)
411 return err;
412
413 data->cur_opmode = op;
414
415 return 0;
416 }
417
gp2ap020a00f_als_enabled(struct gp2ap020a00f_data * data)418 static bool gp2ap020a00f_als_enabled(struct gp2ap020a00f_data *data)
419 {
420 return test_bit(GP2AP020A00F_FLAG_ALS_CLEAR_TRIGGER, &data->flags) ||
421 test_bit(GP2AP020A00F_FLAG_ALS_IR_TRIGGER, &data->flags) ||
422 test_bit(GP2AP020A00F_FLAG_ALS_RISING_EV, &data->flags) ||
423 test_bit(GP2AP020A00F_FLAG_ALS_FALLING_EV, &data->flags);
424 }
425
gp2ap020a00f_prox_detect_enabled(struct gp2ap020a00f_data * data)426 static bool gp2ap020a00f_prox_detect_enabled(struct gp2ap020a00f_data *data)
427 {
428 return test_bit(GP2AP020A00F_FLAG_PROX_RISING_EV, &data->flags) ||
429 test_bit(GP2AP020A00F_FLAG_PROX_FALLING_EV, &data->flags);
430 }
431
gp2ap020a00f_write_event_threshold(struct gp2ap020a00f_data * data,enum gp2ap020a00f_thresh_val_id th_val_id,bool enable)432 static int gp2ap020a00f_write_event_threshold(struct gp2ap020a00f_data *data,
433 enum gp2ap020a00f_thresh_val_id th_val_id,
434 bool enable)
435 {
436 __le16 thresh_buf = 0;
437 unsigned int thresh_reg_val;
438
439 if (!enable)
440 thresh_reg_val = 0;
441 else if (test_bit(GP2AP020A00F_FLAG_LUX_MODE_HI, &data->flags) &&
442 th_val_id != GP2AP020A00F_THRESH_PL &&
443 th_val_id != GP2AP020A00F_THRESH_PH)
444 /*
445 * For the high lux mode ALS threshold has to be scaled down
446 * to allow for proper comparison with the output value.
447 */
448 thresh_reg_val = data->thresh_val[th_val_id] / 16;
449 else
450 thresh_reg_val = min(data->thresh_val[th_val_id], 16000U);
451
452 thresh_buf = cpu_to_le16(thresh_reg_val);
453
454 return regmap_bulk_write(data->regmap,
455 GP2AP020A00F_THRESH_REG(th_val_id),
456 &thresh_buf, sizeof(thresh_buf));
457 }
458
gp2ap020a00f_alter_opmode(struct gp2ap020a00f_data * data,enum gp2ap020a00f_opmode diff_mode,int add_sub)459 static int gp2ap020a00f_alter_opmode(struct gp2ap020a00f_data *data,
460 enum gp2ap020a00f_opmode diff_mode, int add_sub)
461 {
462 enum gp2ap020a00f_opmode new_mode;
463
464 if (diff_mode != GP2AP020A00F_OPMODE_ALS &&
465 diff_mode != GP2AP020A00F_OPMODE_PS)
466 return -EINVAL;
467
468 if (add_sub == GP2AP020A00F_ADD_MODE) {
469 if (data->cur_opmode == GP2AP020A00F_OPMODE_SHUTDOWN)
470 new_mode = diff_mode;
471 else
472 new_mode = GP2AP020A00F_OPMODE_ALS_AND_PS;
473 } else {
474 if (data->cur_opmode == GP2AP020A00F_OPMODE_ALS_AND_PS)
475 new_mode = (diff_mode == GP2AP020A00F_OPMODE_ALS) ?
476 GP2AP020A00F_OPMODE_PS :
477 GP2AP020A00F_OPMODE_ALS;
478 else
479 new_mode = GP2AP020A00F_OPMODE_SHUTDOWN;
480 }
481
482 return gp2ap020a00f_set_operation_mode(data, new_mode);
483 }
484
gp2ap020a00f_exec_cmd(struct gp2ap020a00f_data * data,enum gp2ap020a00f_cmd cmd)485 static int gp2ap020a00f_exec_cmd(struct gp2ap020a00f_data *data,
486 enum gp2ap020a00f_cmd cmd)
487 {
488 int err;
489
490 switch (cmd) {
491 case GP2AP020A00F_CMD_READ_RAW_CLEAR:
492 if (data->cur_opmode != GP2AP020A00F_OPMODE_SHUTDOWN)
493 return -EBUSY;
494 return gp2ap020a00f_set_operation_mode(data,
495 GP2AP020A00F_OPMODE_READ_RAW_CLEAR);
496 case GP2AP020A00F_CMD_READ_RAW_IR:
497 if (data->cur_opmode != GP2AP020A00F_OPMODE_SHUTDOWN)
498 return -EBUSY;
499 return gp2ap020a00f_set_operation_mode(data,
500 GP2AP020A00F_OPMODE_READ_RAW_IR);
501 case GP2AP020A00F_CMD_READ_RAW_PROXIMITY:
502 if (data->cur_opmode != GP2AP020A00F_OPMODE_SHUTDOWN)
503 return -EBUSY;
504 return gp2ap020a00f_set_operation_mode(data,
505 GP2AP020A00F_OPMODE_READ_RAW_PROXIMITY);
506 case GP2AP020A00F_CMD_TRIGGER_CLEAR_EN:
507 if (data->cur_opmode == GP2AP020A00F_OPMODE_PROX_DETECT)
508 return -EBUSY;
509 if (!gp2ap020a00f_als_enabled(data))
510 err = gp2ap020a00f_alter_opmode(data,
511 GP2AP020A00F_OPMODE_ALS,
512 GP2AP020A00F_ADD_MODE);
513 else
514 err = 0;
515 set_bit(GP2AP020A00F_FLAG_ALS_CLEAR_TRIGGER, &data->flags);
516 return err;
517 case GP2AP020A00F_CMD_TRIGGER_CLEAR_DIS:
518 clear_bit(GP2AP020A00F_FLAG_ALS_CLEAR_TRIGGER, &data->flags);
519 if (gp2ap020a00f_als_enabled(data))
520 break;
521 return gp2ap020a00f_alter_opmode(data,
522 GP2AP020A00F_OPMODE_ALS,
523 GP2AP020A00F_SUBTRACT_MODE);
524 case GP2AP020A00F_CMD_TRIGGER_IR_EN:
525 if (data->cur_opmode == GP2AP020A00F_OPMODE_PROX_DETECT)
526 return -EBUSY;
527 if (!gp2ap020a00f_als_enabled(data))
528 err = gp2ap020a00f_alter_opmode(data,
529 GP2AP020A00F_OPMODE_ALS,
530 GP2AP020A00F_ADD_MODE);
531 else
532 err = 0;
533 set_bit(GP2AP020A00F_FLAG_ALS_IR_TRIGGER, &data->flags);
534 return err;
535 case GP2AP020A00F_CMD_TRIGGER_IR_DIS:
536 clear_bit(GP2AP020A00F_FLAG_ALS_IR_TRIGGER, &data->flags);
537 if (gp2ap020a00f_als_enabled(data))
538 break;
539 return gp2ap020a00f_alter_opmode(data,
540 GP2AP020A00F_OPMODE_ALS,
541 GP2AP020A00F_SUBTRACT_MODE);
542 case GP2AP020A00F_CMD_TRIGGER_PROX_EN:
543 if (data->cur_opmode == GP2AP020A00F_OPMODE_PROX_DETECT)
544 return -EBUSY;
545 err = gp2ap020a00f_alter_opmode(data,
546 GP2AP020A00F_OPMODE_PS,
547 GP2AP020A00F_ADD_MODE);
548 set_bit(GP2AP020A00F_FLAG_PROX_TRIGGER, &data->flags);
549 return err;
550 case GP2AP020A00F_CMD_TRIGGER_PROX_DIS:
551 clear_bit(GP2AP020A00F_FLAG_PROX_TRIGGER, &data->flags);
552 return gp2ap020a00f_alter_opmode(data,
553 GP2AP020A00F_OPMODE_PS,
554 GP2AP020A00F_SUBTRACT_MODE);
555 case GP2AP020A00F_CMD_ALS_HIGH_EV_EN:
556 if (test_bit(GP2AP020A00F_FLAG_ALS_RISING_EV, &data->flags))
557 return 0;
558 if (data->cur_opmode == GP2AP020A00F_OPMODE_PROX_DETECT)
559 return -EBUSY;
560 if (!gp2ap020a00f_als_enabled(data)) {
561 err = gp2ap020a00f_alter_opmode(data,
562 GP2AP020A00F_OPMODE_ALS,
563 GP2AP020A00F_ADD_MODE);
564 if (err < 0)
565 return err;
566 }
567 set_bit(GP2AP020A00F_FLAG_ALS_RISING_EV, &data->flags);
568 return gp2ap020a00f_write_event_threshold(data,
569 GP2AP020A00F_THRESH_TH, true);
570 case GP2AP020A00F_CMD_ALS_HIGH_EV_DIS:
571 if (!test_bit(GP2AP020A00F_FLAG_ALS_RISING_EV, &data->flags))
572 return 0;
573 clear_bit(GP2AP020A00F_FLAG_ALS_RISING_EV, &data->flags);
574 if (!gp2ap020a00f_als_enabled(data)) {
575 err = gp2ap020a00f_alter_opmode(data,
576 GP2AP020A00F_OPMODE_ALS,
577 GP2AP020A00F_SUBTRACT_MODE);
578 if (err < 0)
579 return err;
580 }
581 return gp2ap020a00f_write_event_threshold(data,
582 GP2AP020A00F_THRESH_TH, false);
583 case GP2AP020A00F_CMD_ALS_LOW_EV_EN:
584 if (test_bit(GP2AP020A00F_FLAG_ALS_FALLING_EV, &data->flags))
585 return 0;
586 if (data->cur_opmode == GP2AP020A00F_OPMODE_PROX_DETECT)
587 return -EBUSY;
588 if (!gp2ap020a00f_als_enabled(data)) {
589 err = gp2ap020a00f_alter_opmode(data,
590 GP2AP020A00F_OPMODE_ALS,
591 GP2AP020A00F_ADD_MODE);
592 if (err < 0)
593 return err;
594 }
595 set_bit(GP2AP020A00F_FLAG_ALS_FALLING_EV, &data->flags);
596 return gp2ap020a00f_write_event_threshold(data,
597 GP2AP020A00F_THRESH_TL, true);
598 case GP2AP020A00F_CMD_ALS_LOW_EV_DIS:
599 if (!test_bit(GP2AP020A00F_FLAG_ALS_FALLING_EV, &data->flags))
600 return 0;
601 clear_bit(GP2AP020A00F_FLAG_ALS_FALLING_EV, &data->flags);
602 if (!gp2ap020a00f_als_enabled(data)) {
603 err = gp2ap020a00f_alter_opmode(data,
604 GP2AP020A00F_OPMODE_ALS,
605 GP2AP020A00F_SUBTRACT_MODE);
606 if (err < 0)
607 return err;
608 }
609 return gp2ap020a00f_write_event_threshold(data,
610 GP2AP020A00F_THRESH_TL, false);
611 case GP2AP020A00F_CMD_PROX_HIGH_EV_EN:
612 if (test_bit(GP2AP020A00F_FLAG_PROX_RISING_EV, &data->flags))
613 return 0;
614 if (gp2ap020a00f_als_enabled(data) ||
615 data->cur_opmode == GP2AP020A00F_OPMODE_PS)
616 return -EBUSY;
617 if (!gp2ap020a00f_prox_detect_enabled(data)) {
618 err = gp2ap020a00f_set_operation_mode(data,
619 GP2AP020A00F_OPMODE_PROX_DETECT);
620 if (err < 0)
621 return err;
622 }
623 set_bit(GP2AP020A00F_FLAG_PROX_RISING_EV, &data->flags);
624 return gp2ap020a00f_write_event_threshold(data,
625 GP2AP020A00F_THRESH_PH, true);
626 case GP2AP020A00F_CMD_PROX_HIGH_EV_DIS:
627 if (!test_bit(GP2AP020A00F_FLAG_PROX_RISING_EV, &data->flags))
628 return 0;
629 clear_bit(GP2AP020A00F_FLAG_PROX_RISING_EV, &data->flags);
630 err = gp2ap020a00f_set_operation_mode(data,
631 GP2AP020A00F_OPMODE_SHUTDOWN);
632 if (err < 0)
633 return err;
634 return gp2ap020a00f_write_event_threshold(data,
635 GP2AP020A00F_THRESH_PH, false);
636 case GP2AP020A00F_CMD_PROX_LOW_EV_EN:
637 if (test_bit(GP2AP020A00F_FLAG_PROX_FALLING_EV, &data->flags))
638 return 0;
639 if (gp2ap020a00f_als_enabled(data) ||
640 data->cur_opmode == GP2AP020A00F_OPMODE_PS)
641 return -EBUSY;
642 if (!gp2ap020a00f_prox_detect_enabled(data)) {
643 err = gp2ap020a00f_set_operation_mode(data,
644 GP2AP020A00F_OPMODE_PROX_DETECT);
645 if (err < 0)
646 return err;
647 }
648 set_bit(GP2AP020A00F_FLAG_PROX_FALLING_EV, &data->flags);
649 return gp2ap020a00f_write_event_threshold(data,
650 GP2AP020A00F_THRESH_PL, true);
651 case GP2AP020A00F_CMD_PROX_LOW_EV_DIS:
652 if (!test_bit(GP2AP020A00F_FLAG_PROX_FALLING_EV, &data->flags))
653 return 0;
654 clear_bit(GP2AP020A00F_FLAG_PROX_FALLING_EV, &data->flags);
655 err = gp2ap020a00f_set_operation_mode(data,
656 GP2AP020A00F_OPMODE_SHUTDOWN);
657 if (err < 0)
658 return err;
659 return gp2ap020a00f_write_event_threshold(data,
660 GP2AP020A00F_THRESH_PL, false);
661 }
662
663 return 0;
664 }
665
wait_conversion_complete_irq(struct gp2ap020a00f_data * data)666 static int wait_conversion_complete_irq(struct gp2ap020a00f_data *data)
667 {
668 int ret;
669
670 ret = wait_event_timeout(data->data_ready_queue,
671 test_bit(GP2AP020A00F_FLAG_DATA_READY,
672 &data->flags),
673 GP2AP020A00F_DATA_READY_TIMEOUT);
674 clear_bit(GP2AP020A00F_FLAG_DATA_READY, &data->flags);
675
676 return ret > 0 ? 0 : -ETIME;
677 }
678
gp2ap020a00f_read_output(struct gp2ap020a00f_data * data,unsigned int output_reg,int * val)679 static int gp2ap020a00f_read_output(struct gp2ap020a00f_data *data,
680 unsigned int output_reg, int *val)
681 {
682 __le16 reg_buf;
683 int err;
684
685 err = wait_conversion_complete_irq(data);
686 if (err < 0)
687 dev_dbg(&data->client->dev, "data ready timeout\n");
688
689 err = regmap_bulk_read(data->regmap, output_reg, ®_buf, sizeof(reg_buf));
690 if (err < 0)
691 return err;
692
693 *val = le16_to_cpu(reg_buf);
694
695 return err;
696 }
697
gp2ap020a00f_adjust_lux_mode(struct gp2ap020a00f_data * data,int output_val)698 static bool gp2ap020a00f_adjust_lux_mode(struct gp2ap020a00f_data *data,
699 int output_val)
700 {
701 u8 new_range = 0xff;
702 int err;
703
704 if (!test_bit(GP2AP020A00F_FLAG_LUX_MODE_HI, &data->flags)) {
705 if (output_val > 16000) {
706 set_bit(GP2AP020A00F_FLAG_LUX_MODE_HI, &data->flags);
707 new_range = GP2AP020A00F_RANGE_A_x128;
708 }
709 } else {
710 if (output_val < 1000) {
711 clear_bit(GP2AP020A00F_FLAG_LUX_MODE_HI, &data->flags);
712 new_range = GP2AP020A00F_RANGE_A_x8;
713 }
714 }
715
716 if (new_range != 0xff) {
717 /* Clear als threshold registers to avoid spurious
718 * events caused by lux mode transition.
719 */
720 err = gp2ap020a00f_write_event_threshold(data,
721 GP2AP020A00F_THRESH_TH, false);
722 if (err < 0) {
723 dev_err(&data->client->dev,
724 "Clearing als threshold register failed.\n");
725 return false;
726 }
727
728 err = gp2ap020a00f_write_event_threshold(data,
729 GP2AP020A00F_THRESH_TL, false);
730 if (err < 0) {
731 dev_err(&data->client->dev,
732 "Clearing als threshold register failed.\n");
733 return false;
734 }
735
736 /* Change lux mode */
737 err = regmap_update_bits(data->regmap,
738 GP2AP020A00F_OP_REG,
739 GP2AP020A00F_OP3_MASK,
740 GP2AP020A00F_OP3_SHUTDOWN);
741
742 if (err < 0) {
743 dev_err(&data->client->dev,
744 "Shutting down the device failed.\n");
745 return false;
746 }
747
748 err = regmap_update_bits(data->regmap,
749 GP2AP020A00F_ALS_REG,
750 GP2AP020A00F_RANGE_A_MASK,
751 new_range);
752
753 if (err < 0) {
754 dev_err(&data->client->dev,
755 "Adjusting device lux mode failed.\n");
756 return false;
757 }
758
759 err = regmap_update_bits(data->regmap,
760 GP2AP020A00F_OP_REG,
761 GP2AP020A00F_OP3_MASK,
762 GP2AP020A00F_OP3_OPERATION);
763
764 if (err < 0) {
765 dev_err(&data->client->dev,
766 "Powering up the device failed.\n");
767 return false;
768 }
769
770 /* Adjust als threshold register values to the new lux mode */
771 if (test_bit(GP2AP020A00F_FLAG_ALS_RISING_EV, &data->flags)) {
772 err = gp2ap020a00f_write_event_threshold(data,
773 GP2AP020A00F_THRESH_TH, true);
774 if (err < 0) {
775 dev_err(&data->client->dev,
776 "Adjusting als threshold value failed.\n");
777 return false;
778 }
779 }
780
781 if (test_bit(GP2AP020A00F_FLAG_ALS_FALLING_EV, &data->flags)) {
782 err = gp2ap020a00f_write_event_threshold(data,
783 GP2AP020A00F_THRESH_TL, true);
784 if (err < 0) {
785 dev_err(&data->client->dev,
786 "Adjusting als threshold value failed.\n");
787 return false;
788 }
789 }
790
791 return true;
792 }
793
794 return false;
795 }
796
gp2ap020a00f_output_to_lux(struct gp2ap020a00f_data * data,int * output_val)797 static void gp2ap020a00f_output_to_lux(struct gp2ap020a00f_data *data,
798 int *output_val)
799 {
800 if (test_bit(GP2AP020A00F_FLAG_LUX_MODE_HI, &data->flags))
801 *output_val *= 16;
802 }
803
gp2ap020a00f_iio_trigger_work(struct irq_work * work)804 static void gp2ap020a00f_iio_trigger_work(struct irq_work *work)
805 {
806 struct gp2ap020a00f_data *data =
807 container_of(work, struct gp2ap020a00f_data, work);
808
809 iio_trigger_poll(data->trig);
810 }
811
gp2ap020a00f_prox_sensing_handler(int irq,void * data)812 static irqreturn_t gp2ap020a00f_prox_sensing_handler(int irq, void *data)
813 {
814 struct iio_dev *indio_dev = data;
815 struct gp2ap020a00f_data *priv = iio_priv(indio_dev);
816 unsigned int op_reg_val;
817 int ret;
818
819 /* Read interrupt flags */
820 ret = regmap_read(priv->regmap, GP2AP020A00F_OP_REG, &op_reg_val);
821 if (ret < 0)
822 return IRQ_HANDLED;
823
824 if (gp2ap020a00f_prox_detect_enabled(priv)) {
825 if (op_reg_val & GP2AP020A00F_PROX_DETECT) {
826 iio_push_event(indio_dev,
827 IIO_UNMOD_EVENT_CODE(
828 IIO_PROXIMITY,
829 GP2AP020A00F_SCAN_MODE_PROXIMITY,
830 IIO_EV_TYPE_ROC,
831 IIO_EV_DIR_RISING),
832 iio_get_time_ns(indio_dev));
833 } else {
834 iio_push_event(indio_dev,
835 IIO_UNMOD_EVENT_CODE(
836 IIO_PROXIMITY,
837 GP2AP020A00F_SCAN_MODE_PROXIMITY,
838 IIO_EV_TYPE_ROC,
839 IIO_EV_DIR_FALLING),
840 iio_get_time_ns(indio_dev));
841 }
842 }
843
844 return IRQ_HANDLED;
845 }
846
gp2ap020a00f_thresh_event_handler(int irq,void * data)847 static irqreturn_t gp2ap020a00f_thresh_event_handler(int irq, void *data)
848 {
849 struct iio_dev *indio_dev = data;
850 struct gp2ap020a00f_data *priv = iio_priv(indio_dev);
851 unsigned int output_val, op_reg_val;
852 __le16 d0_reg_buf;
853 u8 op_reg_flags;
854 int thresh_val_id, ret;
855
856 /* Read interrupt flags */
857 ret = regmap_read(priv->regmap, GP2AP020A00F_OP_REG, &op_reg_val);
858 if (ret < 0)
859 goto done;
860
861 op_reg_flags = op_reg_val & (GP2AP020A00F_FLAG_A | GP2AP020A00F_FLAG_P
862 | GP2AP020A00F_PROX_DETECT);
863
864 op_reg_val &= (~GP2AP020A00F_FLAG_A & ~GP2AP020A00F_FLAG_P
865 & ~GP2AP020A00F_PROX_DETECT);
866
867 /* Clear interrupt flags (if not in INTTYPE_PULSE mode) */
868 if (priv->cur_opmode != GP2AP020A00F_OPMODE_PROX_DETECT) {
869 ret = regmap_write(priv->regmap, GP2AP020A00F_OP_REG, op_reg_val);
870 if (ret < 0)
871 goto done;
872 }
873
874 if (op_reg_flags & GP2AP020A00F_FLAG_A) {
875 /* Check D0 register to assess if the lux mode
876 * transition is required.
877 */
878 ret = regmap_bulk_read(priv->regmap, GP2AP020A00F_D0_L_REG,
879 &d0_reg_buf, sizeof(d0_reg_buf));
880 if (ret < 0)
881 goto done;
882
883 output_val = le16_to_cpu(d0_reg_buf);
884
885 if (gp2ap020a00f_adjust_lux_mode(priv, output_val))
886 goto done;
887
888 gp2ap020a00f_output_to_lux(priv, &output_val);
889
890 /*
891 * We need to check output value to distinguish
892 * between high and low ambient light threshold event.
893 */
894 if (test_bit(GP2AP020A00F_FLAG_ALS_RISING_EV, &priv->flags)) {
895 thresh_val_id =
896 GP2AP020A00F_THRESH_VAL_ID(GP2AP020A00F_TH_L_REG);
897 if (output_val > priv->thresh_val[thresh_val_id])
898 iio_push_event(indio_dev,
899 IIO_MOD_EVENT_CODE(
900 IIO_LIGHT,
901 GP2AP020A00F_SCAN_MODE_LIGHT_CLEAR,
902 IIO_MOD_LIGHT_CLEAR,
903 IIO_EV_TYPE_THRESH,
904 IIO_EV_DIR_RISING),
905 iio_get_time_ns(indio_dev));
906 }
907
908 if (test_bit(GP2AP020A00F_FLAG_ALS_FALLING_EV, &priv->flags)) {
909 thresh_val_id =
910 GP2AP020A00F_THRESH_VAL_ID(GP2AP020A00F_TL_L_REG);
911 if (output_val < priv->thresh_val[thresh_val_id])
912 iio_push_event(indio_dev,
913 IIO_MOD_EVENT_CODE(
914 IIO_LIGHT,
915 GP2AP020A00F_SCAN_MODE_LIGHT_CLEAR,
916 IIO_MOD_LIGHT_CLEAR,
917 IIO_EV_TYPE_THRESH,
918 IIO_EV_DIR_FALLING),
919 iio_get_time_ns(indio_dev));
920 }
921 }
922
923 if (priv->cur_opmode == GP2AP020A00F_OPMODE_READ_RAW_CLEAR ||
924 priv->cur_opmode == GP2AP020A00F_OPMODE_READ_RAW_IR ||
925 priv->cur_opmode == GP2AP020A00F_OPMODE_READ_RAW_PROXIMITY) {
926 set_bit(GP2AP020A00F_FLAG_DATA_READY, &priv->flags);
927 wake_up(&priv->data_ready_queue);
928 goto done;
929 }
930
931 if (test_bit(GP2AP020A00F_FLAG_ALS_CLEAR_TRIGGER, &priv->flags) ||
932 test_bit(GP2AP020A00F_FLAG_ALS_IR_TRIGGER, &priv->flags) ||
933 test_bit(GP2AP020A00F_FLAG_PROX_TRIGGER, &priv->flags))
934 /* This fires off the trigger. */
935 irq_work_queue(&priv->work);
936
937 done:
938 return IRQ_HANDLED;
939 }
940
gp2ap020a00f_trigger_handler(int irq,void * data)941 static irqreturn_t gp2ap020a00f_trigger_handler(int irq, void *data)
942 {
943 struct iio_poll_func *pf = data;
944 struct iio_dev *indio_dev = pf->indio_dev;
945 struct gp2ap020a00f_data *priv = iio_priv(indio_dev);
946 size_t d_size = 0;
947 int i, out_val, ret;
948
949 iio_for_each_active_channel(indio_dev, i) {
950 ret = regmap_bulk_read(priv->regmap, GP2AP020A00F_DATA_REG(i),
951 &priv->buffer[d_size], 2);
952 if (ret < 0)
953 goto done;
954
955 if (i == GP2AP020A00F_SCAN_MODE_LIGHT_CLEAR ||
956 i == GP2AP020A00F_SCAN_MODE_LIGHT_IR) {
957 out_val = get_unaligned_le16(&priv->buffer[d_size]);
958 gp2ap020a00f_output_to_lux(priv, &out_val);
959 put_unaligned_le32(out_val, &priv->buffer[d_size]);
960 d_size += 4;
961 } else {
962 d_size += 2;
963 }
964 }
965
966 iio_push_to_buffers_with_timestamp(indio_dev, priv->buffer, pf->timestamp);
967 done:
968 iio_trigger_notify_done(indio_dev->trig);
969
970 return IRQ_HANDLED;
971 }
972
gp2ap020a00f_get_thresh_reg(const struct iio_chan_spec * chan,enum iio_event_direction event_dir)973 static int gp2ap020a00f_get_thresh_reg(const struct iio_chan_spec *chan,
974 enum iio_event_direction event_dir)
975 {
976 switch (chan->type) {
977 case IIO_PROXIMITY:
978 if (event_dir == IIO_EV_DIR_RISING)
979 return GP2AP020A00F_PH_L_REG;
980 else
981 return GP2AP020A00F_PL_L_REG;
982 case IIO_LIGHT:
983 if (event_dir == IIO_EV_DIR_RISING)
984 return GP2AP020A00F_TH_L_REG;
985 else
986 return GP2AP020A00F_TL_L_REG;
987 default:
988 return -EINVAL;
989 }
990 }
991
gp2ap020a00f_write_event_val(struct iio_dev * indio_dev,const struct iio_chan_spec * chan,enum iio_event_type type,enum iio_event_direction dir,enum iio_event_info info,int val,int val2)992 static int gp2ap020a00f_write_event_val(struct iio_dev *indio_dev,
993 const struct iio_chan_spec *chan,
994 enum iio_event_type type,
995 enum iio_event_direction dir,
996 enum iio_event_info info,
997 int val, int val2)
998 {
999 struct gp2ap020a00f_data *data = iio_priv(indio_dev);
1000 bool event_en = false;
1001 u8 thresh_val_id;
1002 int thresh_reg_l;
1003
1004 guard(mutex)(&data->lock);
1005
1006 thresh_reg_l = gp2ap020a00f_get_thresh_reg(chan, dir);
1007 if (thresh_reg_l < 0)
1008 return thresh_reg_l;
1009
1010 thresh_val_id = GP2AP020A00F_THRESH_VAL_ID(thresh_reg_l);
1011 if (thresh_val_id > GP2AP020A00F_THRESH_PH)
1012 return -EINVAL;
1013
1014 switch (thresh_reg_l) {
1015 case GP2AP020A00F_TH_L_REG:
1016 event_en = test_bit(GP2AP020A00F_FLAG_ALS_RISING_EV, &data->flags);
1017 break;
1018 case GP2AP020A00F_TL_L_REG:
1019 event_en = test_bit(GP2AP020A00F_FLAG_ALS_FALLING_EV, &data->flags);
1020 break;
1021 case GP2AP020A00F_PH_L_REG:
1022 if (val == 0)
1023 return -EINVAL;
1024
1025 event_en = test_bit(GP2AP020A00F_FLAG_PROX_RISING_EV, &data->flags);
1026 break;
1027 case GP2AP020A00F_PL_L_REG:
1028 if (val == 0)
1029 return -EINVAL;
1030
1031 event_en = test_bit(GP2AP020A00F_FLAG_PROX_FALLING_EV, &data->flags);
1032 break;
1033 }
1034
1035 data->thresh_val[thresh_val_id] = val;
1036 return gp2ap020a00f_write_event_threshold(data, thresh_val_id, event_en);
1037 }
1038
gp2ap020a00f_read_event_val(struct iio_dev * indio_dev,const struct iio_chan_spec * chan,enum iio_event_type type,enum iio_event_direction dir,enum iio_event_info info,int * val,int * val2)1039 static int gp2ap020a00f_read_event_val(struct iio_dev *indio_dev,
1040 const struct iio_chan_spec *chan,
1041 enum iio_event_type type,
1042 enum iio_event_direction dir,
1043 enum iio_event_info info,
1044 int *val, int *val2)
1045 {
1046 struct gp2ap020a00f_data *data = iio_priv(indio_dev);
1047 int thresh_reg_l;
1048
1049 guard(mutex)(&data->lock);
1050
1051 thresh_reg_l = gp2ap020a00f_get_thresh_reg(chan, dir);
1052 if (thresh_reg_l < 0)
1053 return thresh_reg_l;
1054 if (thresh_reg_l > GP2AP020A00F_PH_L_REG)
1055 return -EINVAL;
1056
1057 *val = data->thresh_val[GP2AP020A00F_THRESH_VAL_ID(thresh_reg_l)];
1058
1059 return IIO_VAL_INT;
1060 }
1061
gp2ap020a00f_write_prox_event_config(struct iio_dev * indio_dev,int state)1062 static int gp2ap020a00f_write_prox_event_config(struct iio_dev *indio_dev,
1063 int state)
1064 {
1065 struct gp2ap020a00f_data *data = iio_priv(indio_dev);
1066 enum gp2ap020a00f_cmd cmd_high_ev, cmd_low_ev;
1067 int err;
1068
1069 cmd_high_ev = state ? GP2AP020A00F_CMD_PROX_HIGH_EV_EN :
1070 GP2AP020A00F_CMD_PROX_HIGH_EV_DIS;
1071 cmd_low_ev = state ? GP2AP020A00F_CMD_PROX_LOW_EV_EN :
1072 GP2AP020A00F_CMD_PROX_LOW_EV_DIS;
1073
1074 /*
1075 * In order to enable proximity detection feature in the device
1076 * both high and low threshold registers have to be written
1077 * with different values, greater than zero.
1078 */
1079 if (state) {
1080 if (data->thresh_val[GP2AP020A00F_THRESH_PL] == 0)
1081 return -EINVAL;
1082
1083 if (data->thresh_val[GP2AP020A00F_THRESH_PH] == 0)
1084 return -EINVAL;
1085 }
1086
1087 err = gp2ap020a00f_exec_cmd(data, cmd_high_ev);
1088 if (err < 0)
1089 return err;
1090
1091 err = gp2ap020a00f_exec_cmd(data, cmd_low_ev);
1092 if (err < 0)
1093 return err;
1094
1095 free_irq(data->client->irq, indio_dev);
1096
1097 if (state)
1098 err = request_threaded_irq(data->client->irq, NULL,
1099 &gp2ap020a00f_prox_sensing_handler,
1100 IRQF_TRIGGER_RISING |
1101 IRQF_TRIGGER_FALLING |
1102 IRQF_ONESHOT,
1103 "gp2ap020a00f_prox_sensing",
1104 indio_dev);
1105 else {
1106 err = request_threaded_irq(data->client->irq, NULL,
1107 &gp2ap020a00f_thresh_event_handler,
1108 IRQF_TRIGGER_FALLING |
1109 IRQF_ONESHOT,
1110 "gp2ap020a00f_thresh_event",
1111 indio_dev);
1112 }
1113
1114 return err;
1115 }
1116
gp2ap020a00f_write_event_config(struct iio_dev * indio_dev,const struct iio_chan_spec * chan,enum iio_event_type type,enum iio_event_direction dir,bool state)1117 static int gp2ap020a00f_write_event_config(struct iio_dev *indio_dev,
1118 const struct iio_chan_spec *chan,
1119 enum iio_event_type type,
1120 enum iio_event_direction dir,
1121 bool state)
1122 {
1123 struct gp2ap020a00f_data *data = iio_priv(indio_dev);
1124 enum gp2ap020a00f_cmd cmd;
1125
1126 guard(mutex)(&data->lock);
1127
1128 switch (chan->type) {
1129 case IIO_PROXIMITY:
1130 return gp2ap020a00f_write_prox_event_config(indio_dev, state);
1131 case IIO_LIGHT:
1132 if (dir == IIO_EV_DIR_RISING) {
1133 cmd = state ? GP2AP020A00F_CMD_ALS_HIGH_EV_EN :
1134 GP2AP020A00F_CMD_ALS_HIGH_EV_DIS;
1135 return gp2ap020a00f_exec_cmd(data, cmd);
1136 } else {
1137 cmd = state ? GP2AP020A00F_CMD_ALS_LOW_EV_EN :
1138 GP2AP020A00F_CMD_ALS_LOW_EV_DIS;
1139 return gp2ap020a00f_exec_cmd(data, cmd);
1140 }
1141 default:
1142 return -EINVAL;
1143 }
1144 }
1145
gp2ap020a00f_read_event_config(struct iio_dev * indio_dev,const struct iio_chan_spec * chan,enum iio_event_type type,enum iio_event_direction dir)1146 static int gp2ap020a00f_read_event_config(struct iio_dev *indio_dev,
1147 const struct iio_chan_spec *chan,
1148 enum iio_event_type type,
1149 enum iio_event_direction dir)
1150 {
1151 struct gp2ap020a00f_data *data = iio_priv(indio_dev);
1152
1153 guard(mutex)(&data->lock);
1154
1155 switch (chan->type) {
1156 case IIO_PROXIMITY:
1157 if (dir == IIO_EV_DIR_RISING)
1158 return test_bit(GP2AP020A00F_FLAG_PROX_RISING_EV, &data->flags);
1159 else
1160 return test_bit(GP2AP020A00F_FLAG_PROX_FALLING_EV, &data->flags);
1161 case IIO_LIGHT:
1162 if (dir == IIO_EV_DIR_RISING)
1163 return test_bit(GP2AP020A00F_FLAG_ALS_RISING_EV, &data->flags);
1164 else
1165 return test_bit(GP2AP020A00F_FLAG_ALS_FALLING_EV, &data->flags);
1166 default:
1167 return -EINVAL;
1168 }
1169 }
1170
gp2ap020a00f_read_channel(struct gp2ap020a00f_data * data,struct iio_chan_spec const * chan,int * val)1171 static int gp2ap020a00f_read_channel(struct gp2ap020a00f_data *data,
1172 struct iio_chan_spec const *chan, int *val)
1173 {
1174 struct device *dev = &data->client->dev;
1175 enum gp2ap020a00f_cmd cmd;
1176 int err;
1177
1178 switch (chan->scan_index) {
1179 case GP2AP020A00F_SCAN_MODE_LIGHT_CLEAR:
1180 cmd = GP2AP020A00F_CMD_READ_RAW_CLEAR;
1181 break;
1182 case GP2AP020A00F_SCAN_MODE_LIGHT_IR:
1183 cmd = GP2AP020A00F_CMD_READ_RAW_IR;
1184 break;
1185 case GP2AP020A00F_SCAN_MODE_PROXIMITY:
1186 cmd = GP2AP020A00F_CMD_READ_RAW_PROXIMITY;
1187 break;
1188 default:
1189 return -EINVAL;
1190 }
1191
1192 err = gp2ap020a00f_exec_cmd(data, cmd);
1193 if (err < 0) {
1194 dev_err(dev, "gp2ap020a00f_exec_cmd failed\n");
1195 return err;
1196 }
1197
1198 err = gp2ap020a00f_read_output(data, chan->address, val);
1199 if (err < 0)
1200 dev_err(dev, "gp2ap020a00f_read_output failed\n");
1201
1202 err = gp2ap020a00f_set_operation_mode(data,
1203 GP2AP020A00F_OPMODE_SHUTDOWN);
1204 if (err < 0)
1205 dev_err(dev, "Failed to shut down the device.\n");
1206
1207 if (cmd == GP2AP020A00F_CMD_READ_RAW_CLEAR ||
1208 cmd == GP2AP020A00F_CMD_READ_RAW_IR)
1209 gp2ap020a00f_output_to_lux(data, val);
1210
1211 return err;
1212 }
1213
gp2ap020a00f_read_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int * val,int * val2,long mask)1214 static int gp2ap020a00f_read_raw(struct iio_dev *indio_dev,
1215 struct iio_chan_spec const *chan,
1216 int *val, int *val2,
1217 long mask)
1218 {
1219 struct gp2ap020a00f_data *data = iio_priv(indio_dev);
1220 int err = -EINVAL;
1221
1222 if (mask == IIO_CHAN_INFO_RAW) {
1223 if (!iio_device_claim_direct(indio_dev))
1224 return -EBUSY;
1225
1226 err = gp2ap020a00f_read_channel(data, chan, val);
1227 iio_device_release_direct(indio_dev);
1228 }
1229 return err < 0 ? err : IIO_VAL_INT;
1230 }
1231
1232 static const struct iio_event_spec gp2ap020a00f_event_spec_light[] = {
1233 {
1234 .type = IIO_EV_TYPE_THRESH,
1235 .dir = IIO_EV_DIR_RISING,
1236 .mask_separate = BIT(IIO_EV_INFO_VALUE) |
1237 BIT(IIO_EV_INFO_ENABLE),
1238 }, {
1239 .type = IIO_EV_TYPE_THRESH,
1240 .dir = IIO_EV_DIR_FALLING,
1241 .mask_separate = BIT(IIO_EV_INFO_VALUE) |
1242 BIT(IIO_EV_INFO_ENABLE),
1243 },
1244 };
1245
1246 static const struct iio_event_spec gp2ap020a00f_event_spec_prox[] = {
1247 {
1248 .type = IIO_EV_TYPE_ROC,
1249 .dir = IIO_EV_DIR_RISING,
1250 .mask_separate = BIT(IIO_EV_INFO_VALUE) |
1251 BIT(IIO_EV_INFO_ENABLE),
1252 }, {
1253 .type = IIO_EV_TYPE_ROC,
1254 .dir = IIO_EV_DIR_FALLING,
1255 .mask_separate = BIT(IIO_EV_INFO_VALUE) |
1256 BIT(IIO_EV_INFO_ENABLE),
1257 },
1258 };
1259
1260 static const struct iio_chan_spec gp2ap020a00f_channels[] = {
1261 {
1262 .type = IIO_LIGHT,
1263 .channel2 = IIO_MOD_LIGHT_CLEAR,
1264 .modified = 1,
1265 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
1266 .scan_type = {
1267 .sign = 'u',
1268 .realbits = 24,
1269 .shift = 0,
1270 .storagebits = 32,
1271 .endianness = IIO_LE,
1272 },
1273 .scan_index = GP2AP020A00F_SCAN_MODE_LIGHT_CLEAR,
1274 .address = GP2AP020A00F_D0_L_REG,
1275 .event_spec = gp2ap020a00f_event_spec_light,
1276 .num_event_specs = ARRAY_SIZE(gp2ap020a00f_event_spec_light),
1277 },
1278 {
1279 .type = IIO_LIGHT,
1280 .channel2 = IIO_MOD_LIGHT_IR,
1281 .modified = 1,
1282 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
1283 .scan_type = {
1284 .sign = 'u',
1285 .realbits = 24,
1286 .shift = 0,
1287 .storagebits = 32,
1288 .endianness = IIO_LE,
1289 },
1290 .scan_index = GP2AP020A00F_SCAN_MODE_LIGHT_IR,
1291 .address = GP2AP020A00F_D1_L_REG,
1292 },
1293 {
1294 .type = IIO_PROXIMITY,
1295 .modified = 0,
1296 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
1297 .scan_type = {
1298 .sign = 'u',
1299 .realbits = 16,
1300 .shift = 0,
1301 .storagebits = 16,
1302 .endianness = IIO_LE,
1303 },
1304 .scan_index = GP2AP020A00F_SCAN_MODE_PROXIMITY,
1305 .address = GP2AP020A00F_D2_L_REG,
1306 .event_spec = gp2ap020a00f_event_spec_prox,
1307 .num_event_specs = ARRAY_SIZE(gp2ap020a00f_event_spec_prox),
1308 },
1309 IIO_CHAN_SOFT_TIMESTAMP(GP2AP020A00F_CHAN_TIMESTAMP),
1310 };
1311
1312 static const struct iio_info gp2ap020a00f_info = {
1313 .read_raw = &gp2ap020a00f_read_raw,
1314 .read_event_value = &gp2ap020a00f_read_event_val,
1315 .read_event_config = &gp2ap020a00f_read_event_config,
1316 .write_event_value = &gp2ap020a00f_write_event_val,
1317 .write_event_config = &gp2ap020a00f_write_event_config,
1318 };
1319
gp2ap020a00f_buffer_postenable(struct iio_dev * indio_dev)1320 static int gp2ap020a00f_buffer_postenable(struct iio_dev *indio_dev)
1321 {
1322 struct gp2ap020a00f_data *data = iio_priv(indio_dev);
1323 int i, err;
1324
1325 guard(mutex)(&data->lock);
1326
1327 /*
1328 * Enable triggers according to the scan_mask. Enabling either
1329 * LIGHT_CLEAR or LIGHT_IR scan mode results in enabling ALS
1330 * module in the device, which generates samples in both D0 (clear)
1331 * and D1 (ir) registers. As the two registers are bound to the
1332 * two separate IIO channels they are treated in the driver logic
1333 * as if they were controlled independently.
1334 */
1335 iio_for_each_active_channel(indio_dev, i) {
1336 switch (i) {
1337 case GP2AP020A00F_SCAN_MODE_LIGHT_CLEAR:
1338 err = gp2ap020a00f_exec_cmd(data,
1339 GP2AP020A00F_CMD_TRIGGER_CLEAR_EN);
1340 break;
1341 case GP2AP020A00F_SCAN_MODE_LIGHT_IR:
1342 err = gp2ap020a00f_exec_cmd(data,
1343 GP2AP020A00F_CMD_TRIGGER_IR_EN);
1344 break;
1345 case GP2AP020A00F_SCAN_MODE_PROXIMITY:
1346 err = gp2ap020a00f_exec_cmd(data,
1347 GP2AP020A00F_CMD_TRIGGER_PROX_EN);
1348 break;
1349 default:
1350 err = -EINVAL;
1351 break;
1352 }
1353 if (err)
1354 return err;
1355 }
1356
1357 data->buffer = kmalloc(indio_dev->scan_bytes, GFP_KERNEL);
1358 if (!data->buffer)
1359 return -ENOMEM;
1360
1361 return 0;
1362 }
1363
gp2ap020a00f_buffer_predisable(struct iio_dev * indio_dev)1364 static int gp2ap020a00f_buffer_predisable(struct iio_dev *indio_dev)
1365 {
1366 struct gp2ap020a00f_data *data = iio_priv(indio_dev);
1367 int i, err;
1368
1369 guard(mutex)(&data->lock);
1370
1371 iio_for_each_active_channel(indio_dev, i) {
1372 switch (i) {
1373 case GP2AP020A00F_SCAN_MODE_LIGHT_CLEAR:
1374 err = gp2ap020a00f_exec_cmd(data,
1375 GP2AP020A00F_CMD_TRIGGER_CLEAR_DIS);
1376 break;
1377 case GP2AP020A00F_SCAN_MODE_LIGHT_IR:
1378 err = gp2ap020a00f_exec_cmd(data,
1379 GP2AP020A00F_CMD_TRIGGER_IR_DIS);
1380 break;
1381 case GP2AP020A00F_SCAN_MODE_PROXIMITY:
1382 err = gp2ap020a00f_exec_cmd(data,
1383 GP2AP020A00F_CMD_TRIGGER_PROX_DIS);
1384 break;
1385 default:
1386 err = -EINVAL;
1387 break;
1388 }
1389 if (err)
1390 return err;
1391 }
1392
1393 kfree(data->buffer);
1394 return 0;
1395 }
1396
1397 static const struct iio_buffer_setup_ops gp2ap020a00f_buffer_setup_ops = {
1398 .postenable = &gp2ap020a00f_buffer_postenable,
1399 .predisable = &gp2ap020a00f_buffer_predisable,
1400 };
1401
gp2ap020a00f_probe(struct i2c_client * client)1402 static int gp2ap020a00f_probe(struct i2c_client *client)
1403 {
1404 const struct i2c_device_id *id = i2c_client_get_device_id(client);
1405 struct device *dev = &client->dev;
1406 struct gp2ap020a00f_data *data;
1407 struct iio_dev *indio_dev;
1408 struct regmap *regmap;
1409 int err;
1410
1411 indio_dev = devm_iio_device_alloc(dev, sizeof(*data));
1412 if (!indio_dev)
1413 return -ENOMEM;
1414
1415 data = iio_priv(indio_dev);
1416
1417 data->vled_reg = devm_regulator_get(dev, "vled");
1418 if (IS_ERR(data->vled_reg))
1419 return PTR_ERR(data->vled_reg);
1420
1421 err = regulator_enable(data->vled_reg);
1422 if (err)
1423 return err;
1424
1425 regmap = devm_regmap_init_i2c(client, &gp2ap020a00f_regmap_config);
1426 if (IS_ERR(regmap)) {
1427 dev_err(dev, "Regmap initialization failed.\n");
1428 err = PTR_ERR(regmap);
1429 goto error_regulator_disable;
1430 }
1431
1432 /* Initialize device registers */
1433 err = regmap_bulk_write(regmap, GP2AP020A00F_OP_REG,
1434 gp2ap020a00f_reg_init_tab,
1435 ARRAY_SIZE(gp2ap020a00f_reg_init_tab));
1436
1437 if (err < 0) {
1438 dev_err(dev, "Device initialization failed.\n");
1439 goto error_regulator_disable;
1440 }
1441
1442 i2c_set_clientdata(client, indio_dev);
1443
1444 data->client = client;
1445 data->cur_opmode = GP2AP020A00F_OPMODE_SHUTDOWN;
1446 data->regmap = regmap;
1447 init_waitqueue_head(&data->data_ready_queue);
1448
1449 mutex_init(&data->lock);
1450 indio_dev->channels = gp2ap020a00f_channels;
1451 indio_dev->num_channels = ARRAY_SIZE(gp2ap020a00f_channels);
1452 indio_dev->info = &gp2ap020a00f_info;
1453 indio_dev->name = id->name;
1454 indio_dev->modes = INDIO_DIRECT_MODE;
1455
1456 /* Allocate buffer */
1457 err = iio_triggered_buffer_setup(indio_dev, &iio_pollfunc_store_time,
1458 &gp2ap020a00f_trigger_handler, &gp2ap020a00f_buffer_setup_ops);
1459 if (err < 0)
1460 goto error_regulator_disable;
1461
1462 /* Allocate trigger */
1463 data->trig = devm_iio_trigger_alloc(dev, "%s-trigger", indio_dev->name);
1464 if (data->trig == NULL) {
1465 err = -ENOMEM;
1466 dev_err(dev, "Failed to allocate iio trigger.\n");
1467 goto error_uninit_buffer;
1468 }
1469
1470 /* This needs to be requested here for read_raw calls to work. */
1471 err = request_threaded_irq(client->irq, NULL,
1472 &gp2ap020a00f_thresh_event_handler,
1473 IRQF_TRIGGER_FALLING |
1474 IRQF_ONESHOT,
1475 "gp2ap020a00f_als_event",
1476 indio_dev);
1477 if (err < 0) {
1478 dev_err(dev, "Irq request failed.\n");
1479 goto error_uninit_buffer;
1480 }
1481
1482 init_irq_work(&data->work, gp2ap020a00f_iio_trigger_work);
1483
1484 err = iio_trigger_register(data->trig);
1485 if (err < 0) {
1486 dev_err(dev, "Failed to register iio trigger.\n");
1487 goto error_free_irq;
1488 }
1489
1490 err = iio_device_register(indio_dev);
1491 if (err < 0)
1492 goto error_trigger_unregister;
1493
1494 return 0;
1495
1496 error_trigger_unregister:
1497 iio_trigger_unregister(data->trig);
1498 error_free_irq:
1499 free_irq(client->irq, indio_dev);
1500 error_uninit_buffer:
1501 iio_triggered_buffer_cleanup(indio_dev);
1502 error_regulator_disable:
1503 regulator_disable(data->vled_reg);
1504
1505 return err;
1506 }
1507
gp2ap020a00f_remove(struct i2c_client * client)1508 static void gp2ap020a00f_remove(struct i2c_client *client)
1509 {
1510 struct iio_dev *indio_dev = i2c_get_clientdata(client);
1511 struct gp2ap020a00f_data *data = iio_priv(indio_dev);
1512 struct device *dev = &client->dev;
1513 int err;
1514
1515 err = gp2ap020a00f_set_operation_mode(data, GP2AP020A00F_OPMODE_SHUTDOWN);
1516 if (err < 0)
1517 dev_err(dev, "Failed to power off the device.\n");
1518
1519 iio_device_unregister(indio_dev);
1520 iio_trigger_unregister(data->trig);
1521 free_irq(client->irq, indio_dev);
1522 iio_triggered_buffer_cleanup(indio_dev);
1523 regulator_disable(data->vled_reg);
1524 }
1525
1526 static const struct i2c_device_id gp2ap020a00f_id[] = {
1527 { .name = "gp2ap020a00f" },
1528 { }
1529 };
1530 MODULE_DEVICE_TABLE(i2c, gp2ap020a00f_id);
1531
1532 static const struct of_device_id gp2ap020a00f_of_match[] = {
1533 { .compatible = "sharp,gp2ap020a00f" },
1534 { }
1535 };
1536 MODULE_DEVICE_TABLE(of, gp2ap020a00f_of_match);
1537
1538 static struct i2c_driver gp2ap020a00f_driver = {
1539 .driver = {
1540 .name = "gp2ap020a00f",
1541 .of_match_table = gp2ap020a00f_of_match,
1542 },
1543 .probe = gp2ap020a00f_probe,
1544 .remove = gp2ap020a00f_remove,
1545 .id_table = gp2ap020a00f_id,
1546 };
1547 module_i2c_driver(gp2ap020a00f_driver);
1548
1549 MODULE_AUTHOR("Jacek Anaszewski <j.anaszewski@samsung.com>");
1550 MODULE_DESCRIPTION("Sharp GP2AP020A00F Proximity/ALS sensor driver");
1551 MODULE_LICENSE("GPL v2");
1552