1 /* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
2 /* Copyright 2017-2019 NXP */
3
4 #include <linux/timer.h>
5 #include <linux/pci.h>
6 #include <linux/netdevice.h>
7 #include <linux/etherdevice.h>
8 #include <linux/dma-mapping.h>
9 #include <linux/skbuff.h>
10 #include <linux/ethtool.h>
11 #include <linux/fsl/ntmp.h>
12 #include <linux/if_vlan.h>
13 #include <linux/phylink.h>
14 #include <linux/dim.h>
15 #include <net/xdp.h>
16
17 #include "enetc_hw.h"
18 #include "enetc4_hw.h"
19
20 #define ENETC_MAC_MAXFRM_SIZE 9600
21 #define ENETC_MAX_MTU (ENETC_MAC_MAXFRM_SIZE - \
22 (ETH_FCS_LEN + ETH_HLEN + VLAN_HLEN))
23
24 #define ENETC_CBD_DATA_MEM_ALIGN 64
25
26 #define ENETC_MADDR_HASH_TBL_SZ 64
27
28 enum enetc_mac_addr_type {UC, MC, MADDR_TYPE};
29
30 struct enetc_mac_filter {
31 union {
32 char mac_addr[ETH_ALEN];
33 DECLARE_BITMAP(mac_hash_table, ENETC_MADDR_HASH_TBL_SZ);
34 };
35 int mac_addr_cnt;
36 };
37
38 struct enetc_tx_swbd {
39 union {
40 struct sk_buff *skb;
41 struct xdp_frame *xdp_frame;
42 };
43 dma_addr_t dma;
44 struct page *page; /* valid only if is_xdp_tx */
45 u16 page_offset; /* valid only if is_xdp_tx */
46 u16 len;
47 enum dma_data_direction dir;
48 u8 is_dma_page:1;
49 u8 check_wb:1;
50 u8 do_twostep_tstamp:1;
51 u8 is_eof:1;
52 u8 is_xdp_tx:1;
53 u8 is_xdp_redirect:1;
54 u8 qbv_en:1;
55 };
56
57 struct enetc_lso_t {
58 bool ipv6;
59 bool tcp;
60 u8 l3_hdr_len;
61 u8 hdr_len; /* LSO header length */
62 u8 l3_start;
63 u16 lso_seg_size;
64 int total_len; /* total data length, not include LSO header */
65 };
66
67 #define ENETC_LSO_MAX_DATA_LEN SZ_256K
68
69 #define ENETC_RX_MAXFRM_SIZE ENETC_MAC_MAXFRM_SIZE
70 #define ENETC_RXB_TRUESIZE 2048 /* PAGE_SIZE >> 1 */
71 #define ENETC_RXB_PAD NET_SKB_PAD /* add extra space if needed */
72 #define ENETC_RXB_DMA_SIZE \
73 (SKB_WITH_OVERHEAD(ENETC_RXB_TRUESIZE) - ENETC_RXB_PAD)
74 #define ENETC_RXB_DMA_SIZE_XDP \
75 (SKB_WITH_OVERHEAD(ENETC_RXB_TRUESIZE) - XDP_PACKET_HEADROOM)
76
77 struct enetc_rx_swbd {
78 dma_addr_t dma;
79 struct page *page;
80 u16 page_offset;
81 enum dma_data_direction dir;
82 u16 len;
83 };
84
85 /* ENETC overhead: optional extension BD + 1 BD gap */
86 #define ENETC_TXBDS_NEEDED(val) ((val) + 2)
87 /* For LS1028A, max # of chained Tx BDs is 15, including head and
88 * extension BD.
89 */
90 #define ENETC_MAX_SKB_FRAGS 13
91 /* For ENETC v4 and later versions, max # of chained Tx BDs is 63,
92 * including head and extension BD, but the range of MAX_SKB_FRAGS
93 * is 17 ~ 45, so set ENETC4_MAX_SKB_FRAGS to MAX_SKB_FRAGS.
94 */
95 #define ENETC4_MAX_SKB_FRAGS MAX_SKB_FRAGS
96 #define ENETC_TXBDS_MAX_NEEDED(x) ENETC_TXBDS_NEEDED((x) + 1)
97
98 struct enetc_ring_stats {
99 unsigned long packets;
100 unsigned long bytes;
101 unsigned long rx_alloc_errs;
102 unsigned long xdp_drops;
103 unsigned long xdp_tx;
104 unsigned long xdp_tx_drops;
105 unsigned long xdp_redirect;
106 unsigned long xdp_redirect_failures;
107 unsigned long recycles;
108 unsigned long recycle_failures;
109 unsigned long win_drop;
110 };
111
112 struct enetc_xdp_data {
113 struct xdp_rxq_info rxq;
114 struct bpf_prog *prog;
115 int xdp_tx_in_flight;
116 };
117
118 #define ENETC_RX_RING_DEFAULT_SIZE 2048
119 #define ENETC_TX_RING_DEFAULT_SIZE 2048
120 #define ENETC_DEFAULT_TX_WORK (ENETC_TX_RING_DEFAULT_SIZE / 2)
121
122 struct enetc_bdr_resource {
123 /* Input arguments saved for teardown */
124 struct device *dev; /* for DMA mapping */
125 size_t bd_count;
126 size_t bd_size;
127
128 /* Resource proper */
129 void *bd_base; /* points to Rx or Tx BD ring */
130 dma_addr_t bd_dma_base;
131 union {
132 struct enetc_tx_swbd *tx_swbd;
133 struct enetc_rx_swbd *rx_swbd;
134 };
135 char *tso_headers;
136 dma_addr_t tso_headers_dma;
137 };
138
139 struct enetc_bdr {
140 struct device *dev; /* for DMA mapping */
141 struct net_device *ndev;
142 void *bd_base; /* points to Rx or Tx BD ring */
143 union {
144 void __iomem *tpir;
145 void __iomem *rcir;
146 };
147 u16 index;
148 u16 prio;
149 int bd_count; /* # of BDs */
150 int next_to_use;
151 int next_to_clean;
152 union {
153 struct enetc_tx_swbd *tx_swbd;
154 struct enetc_rx_swbd *rx_swbd;
155 };
156 union {
157 void __iomem *tcir; /* Tx */
158 int next_to_alloc; /* Rx */
159 };
160 void __iomem *idr; /* Interrupt Detect Register pointer */
161
162 int buffer_offset;
163 struct enetc_xdp_data xdp;
164
165 struct enetc_ring_stats stats;
166
167 dma_addr_t bd_dma_base;
168 u8 tsd_enable; /* Time specific departure */
169 bool ext_en; /* enable h/w descriptor extensions */
170
171 /* DMA buffer for TSO headers */
172 char *tso_headers;
173 dma_addr_t tso_headers_dma;
174 } ____cacheline_aligned_in_smp;
175
enetc_bdr_idx_inc(struct enetc_bdr * bdr,int * i)176 static inline void enetc_bdr_idx_inc(struct enetc_bdr *bdr, int *i)
177 {
178 if (unlikely(++*i == bdr->bd_count))
179 *i = 0;
180 }
181
enetc_bd_unused(struct enetc_bdr * bdr)182 static inline int enetc_bd_unused(struct enetc_bdr *bdr)
183 {
184 if (bdr->next_to_clean > bdr->next_to_use)
185 return bdr->next_to_clean - bdr->next_to_use - 1;
186
187 return bdr->bd_count + bdr->next_to_clean - bdr->next_to_use - 1;
188 }
189
enetc_swbd_unused(struct enetc_bdr * bdr)190 static inline int enetc_swbd_unused(struct enetc_bdr *bdr)
191 {
192 if (bdr->next_to_clean > bdr->next_to_alloc)
193 return bdr->next_to_clean - bdr->next_to_alloc - 1;
194
195 return bdr->bd_count + bdr->next_to_clean - bdr->next_to_alloc - 1;
196 }
197
198 /* Control BD ring */
199 #define ENETC_CBDR_DEFAULT_SIZE 64
200 struct enetc_cbdr {
201 void *bd_base; /* points to Rx or Tx BD ring */
202 void __iomem *pir;
203 void __iomem *cir;
204 void __iomem *mr; /* mode register */
205
206 int bd_count; /* # of BDs */
207 int next_to_use;
208 int next_to_clean;
209
210 dma_addr_t bd_dma_base;
211 struct device *dma_dev;
212 };
213
214 #define ENETC_TXBD(BDR, i) (&(((union enetc_tx_bd *)((BDR).bd_base))[i]))
215
enetc_rxbd(struct enetc_bdr * rx_ring,int i)216 static inline union enetc_rx_bd *enetc_rxbd(struct enetc_bdr *rx_ring, int i)
217 {
218 int hw_idx = i;
219
220 if (IS_ENABLED(CONFIG_FSL_ENETC_PTP_CLOCK) && rx_ring->ext_en)
221 hw_idx = 2 * i;
222
223 return &(((union enetc_rx_bd *)rx_ring->bd_base)[hw_idx]);
224 }
225
enetc_rxbd_next(struct enetc_bdr * rx_ring,union enetc_rx_bd ** old_rxbd,int * old_index)226 static inline void enetc_rxbd_next(struct enetc_bdr *rx_ring,
227 union enetc_rx_bd **old_rxbd, int *old_index)
228 {
229 union enetc_rx_bd *new_rxbd = *old_rxbd;
230 int new_index = *old_index;
231
232 new_rxbd++;
233
234 if (IS_ENABLED(CONFIG_FSL_ENETC_PTP_CLOCK) && rx_ring->ext_en)
235 new_rxbd++;
236
237 if (unlikely(++new_index == rx_ring->bd_count)) {
238 new_rxbd = rx_ring->bd_base;
239 new_index = 0;
240 }
241
242 *old_rxbd = new_rxbd;
243 *old_index = new_index;
244 }
245
enetc_rxbd_ext(union enetc_rx_bd * rxbd)246 static inline union enetc_rx_bd *enetc_rxbd_ext(union enetc_rx_bd *rxbd)
247 {
248 return ++rxbd;
249 }
250
251 struct enetc_msg_swbd {
252 void *vaddr;
253 dma_addr_t dma;
254 int size;
255 };
256
257 #define ENETC_REV1 0x1
258 enum enetc_errata {
259 ENETC_ERR_VLAN_ISOL = BIT(0),
260 ENETC_ERR_UCMCSWP = BIT(1),
261 };
262
263 #define ENETC_SI_F_PSFP BIT(0)
264 #define ENETC_SI_F_QBV BIT(1)
265 #define ENETC_SI_F_QBU BIT(2)
266 #define ENETC_SI_F_LSO BIT(3)
267
268 struct enetc_drvdata {
269 u32 pmac_offset; /* Only valid for PSI which supports 802.1Qbu */
270 u8 tx_csum:1;
271 u8 max_frags;
272 u64 sysclk_freq;
273 const struct ethtool_ops *eth_ops;
274 };
275
276 struct enetc_platform_info {
277 u16 revision;
278 u16 dev_id;
279 const struct enetc_drvdata *data;
280 };
281
282 struct enetc_si;
283
284 /*
285 * This structure defines the some common hooks for ENETC PSI and VSI.
286 * In addition, since VSI only uses the struct enetc_si as its private
287 * driver data, so this structure also define some hooks specifically
288 * for VSI. For VSI-specific hooks, the format is ‘vf_*()’.
289 */
290 struct enetc_si_ops {
291 int (*get_rss_table)(struct enetc_si *si, u32 *table, int count);
292 int (*set_rss_table)(struct enetc_si *si, const u32 *table, int count);
293 };
294
295 /* PCI IEP device data */
296 struct enetc_si {
297 struct pci_dev *pdev;
298 struct enetc_hw hw;
299 enum enetc_errata errata;
300
301 struct net_device *ndev; /* back ref. */
302
303 union {
304 struct enetc_cbdr cbd_ring; /* Only ENETC 1.0 */
305 struct ntmp_user ntmp_user; /* ENETC 4.1 and later */
306 };
307
308 int num_rx_rings; /* how many rings are available in the SI */
309 int num_tx_rings;
310 int num_fs_entries;
311 int num_rss; /* number of RSS buckets */
312 unsigned short pad;
313 u16 revision;
314 int hw_features;
315 const struct enetc_drvdata *drvdata;
316 const struct enetc_si_ops *ops;
317
318 struct workqueue_struct *workqueue;
319 struct work_struct rx_mode_task;
320 struct dentry *debugfs_root;
321 };
322
323 #define ENETC_SI_ALIGN 32
324
is_enetc_rev1(struct enetc_si * si)325 static inline bool is_enetc_rev1(struct enetc_si *si)
326 {
327 return si->pdev->revision == ENETC_REV1;
328 }
329
enetc_si_priv(const struct enetc_si * si)330 static inline void *enetc_si_priv(const struct enetc_si *si)
331 {
332 return (char *)si + ALIGN(sizeof(struct enetc_si), ENETC_SI_ALIGN);
333 }
334
enetc_si_is_pf(struct enetc_si * si)335 static inline bool enetc_si_is_pf(struct enetc_si *si)
336 {
337 return !!(si->hw.port);
338 }
339
enetc_pf_to_port(struct pci_dev * pf_pdev)340 static inline int enetc_pf_to_port(struct pci_dev *pf_pdev)
341 {
342 switch (pf_pdev->devfn) {
343 case 0:
344 return 0;
345 case 1:
346 return 1;
347 case 2:
348 return 2;
349 case 6:
350 return 3;
351 default:
352 return -1;
353 }
354 }
355
356 #define ENETC_MAX_NUM_TXQS 8
357 #define ENETC_INT_NAME_MAX (IFNAMSIZ + 8)
358
359 struct enetc_int_vector {
360 void __iomem *rbier;
361 void __iomem *tbier_base;
362 void __iomem *ricr1;
363 unsigned long tx_rings_map;
364 int count_tx_rings;
365 u32 rx_ictt;
366 u16 comp_cnt;
367 bool rx_dim_en, rx_napi_work;
368 struct napi_struct napi ____cacheline_aligned_in_smp;
369 struct dim rx_dim ____cacheline_aligned_in_smp;
370 char name[ENETC_INT_NAME_MAX];
371
372 struct enetc_bdr rx_ring;
373 struct enetc_bdr tx_ring[] __counted_by(count_tx_rings);
374 } ____cacheline_aligned_in_smp;
375
376 struct enetc_cls_rule {
377 struct ethtool_rx_flow_spec fs;
378 int used;
379 };
380
381 #define ENETC_MAX_BDR_INT 6 /* fixed to max # of available cpus */
382 struct psfp_cap {
383 u32 max_streamid;
384 u32 max_psfp_filter;
385 u32 max_psfp_gate;
386 u32 max_psfp_gatelist;
387 u32 max_psfp_meter;
388 };
389
390 #define ENETC_F_TX_TSTAMP_MASK 0xff
391 enum enetc_active_offloads {
392 /* 8 bits reserved for TX timestamp types (hwtstamp_tx_types) */
393 ENETC_F_TX_TSTAMP = BIT(0),
394 ENETC_F_TX_ONESTEP_SYNC_TSTAMP = BIT(1),
395
396 ENETC_F_RX_TSTAMP = BIT(8),
397 ENETC_F_QBV = BIT(9),
398 ENETC_F_QCI = BIT(10),
399 ENETC_F_QBU = BIT(11),
400 ENETC_F_TXCSUM = BIT(12),
401 ENETC_F_LSO = BIT(13),
402 };
403
404 enum enetc_flags_bit {
405 ENETC_TX_ONESTEP_TSTAMP_IN_PROGRESS = 0,
406 ENETC_TX_DOWN,
407 };
408
409 /* interrupt coalescing modes */
410 enum enetc_ic_mode {
411 /* one interrupt per frame */
412 ENETC_IC_NONE = 0,
413 /* activated when int coalescing time is set to a non-0 value */
414 ENETC_IC_RX_MANUAL = BIT(0),
415 ENETC_IC_TX_MANUAL = BIT(1),
416 /* use dynamic interrupt moderation */
417 ENETC_IC_RX_ADAPTIVE = BIT(2),
418 };
419
420 #define ENETC_RXIC_PKTTHR min_t(u32, 256, ENETC_RX_RING_DEFAULT_SIZE / 2)
421 #define ENETC_TXIC_PKTTHR min_t(u32, 128, ENETC_TX_RING_DEFAULT_SIZE / 2)
422
423 struct enetc_ndev_priv {
424 struct net_device *ndev;
425 struct device *dev; /* dma-mapping device */
426 struct enetc_si *si;
427
428 int bdr_int_num; /* number of Rx/Tx ring interrupts */
429 struct enetc_int_vector *int_vector[ENETC_MAX_BDR_INT];
430 u16 num_rx_rings, num_tx_rings;
431 u16 rx_bd_count, tx_bd_count;
432
433 u16 msg_enable;
434
435 u8 preemptible_tcs;
436 u8 max_frags; /* The maximum number of BDs for fragments */
437
438 enum enetc_active_offloads active_offloads;
439
440 u32 speed; /* store speed for compare update pspeed */
441
442 struct enetc_bdr **xdp_tx_ring;
443 struct enetc_bdr *tx_ring[16];
444 struct enetc_bdr *rx_ring[16];
445 const struct enetc_bdr_resource *tx_res;
446 const struct enetc_bdr_resource *rx_res;
447
448 struct enetc_cls_rule *cls_rules;
449
450 struct psfp_cap psfp_cap;
451
452 /* Minimum number of TX queues required by the network stack */
453 unsigned int min_num_stack_tx_queues;
454
455 struct phylink *phylink;
456 int ic_mode;
457 u32 tx_ictt;
458
459 struct bpf_prog *xdp_prog;
460
461 unsigned long flags;
462
463 struct work_struct tx_onestep_tstamp;
464 struct sk_buff_head tx_skbs;
465
466 /* Serialize access to MAC Merge state between ethtool requests
467 * and link state updates
468 */
469 struct mutex mm_lock;
470
471 struct clk *ref_clk; /* RGMII/RMII reference clock */
472 u64 sysclk_freq; /* NETC system clock frequency */
473 };
474
475 /* Messaging */
476
477 /* VF-PF set primary MAC address message format */
478 struct enetc_msg_cmd_set_primary_mac {
479 struct enetc_msg_cmd_header header;
480 struct sockaddr mac;
481 };
482
483 #define ENETC_CBD(R, i) (&(((struct enetc_cbd *)((R).bd_base))[i]))
484
485 #define ENETC_CBDR_TIMEOUT 1000 /* usecs */
486
487 /* PTP driver exports */
488 extern int enetc_phc_index;
489
490 /* SI common */
491 u32 enetc_port_mac_rd(struct enetc_si *si, u32 reg);
492 void enetc_port_mac_wr(struct enetc_si *si, u32 reg, u32 val);
493 int enetc_pci_probe(struct pci_dev *pdev, const char *name, int sizeof_priv);
494 void enetc_pci_remove(struct pci_dev *pdev);
495 int enetc_alloc_msix(struct enetc_ndev_priv *priv);
496 void enetc_free_msix(struct enetc_ndev_priv *priv);
497 void enetc_get_si_caps(struct enetc_si *si);
498 void enetc_init_si_rings_params(struct enetc_ndev_priv *priv);
499 int enetc_alloc_si_resources(struct enetc_ndev_priv *priv);
500 void enetc_free_si_resources(struct enetc_ndev_priv *priv);
501 int enetc_configure_si(struct enetc_ndev_priv *priv);
502 int enetc_get_driver_data(struct enetc_si *si);
503 void enetc_add_mac_addr_ht_filter(struct enetc_mac_filter *filter,
504 const unsigned char *addr);
505 void enetc_reset_mac_addr_filter(struct enetc_mac_filter *filter);
506
507 int enetc_open(struct net_device *ndev);
508 int enetc_close(struct net_device *ndev);
509 void enetc_start(struct net_device *ndev);
510 void enetc_stop(struct net_device *ndev);
511 netdev_tx_t enetc_xmit(struct sk_buff *skb, struct net_device *ndev);
512 struct net_device_stats *enetc_get_stats(struct net_device *ndev);
513 void enetc_set_features(struct net_device *ndev, netdev_features_t features);
514 int enetc_ioctl(struct net_device *ndev, struct ifreq *rq, int cmd);
515 int enetc_setup_tc_mqprio(struct net_device *ndev, void *type_data);
516 void enetc_reset_tc_mqprio(struct net_device *ndev);
517 int enetc_setup_bpf(struct net_device *ndev, struct netdev_bpf *bpf);
518 int enetc_xdp_xmit(struct net_device *ndev, int num_frames,
519 struct xdp_frame **frames, u32 flags);
520
521 int enetc_hwtstamp_get(struct net_device *ndev,
522 struct kernel_hwtstamp_config *config);
523 int enetc_hwtstamp_set(struct net_device *ndev,
524 struct kernel_hwtstamp_config *config,
525 struct netlink_ext_ack *extack);
526
527 /* ethtool */
528 extern const struct ethtool_ops enetc_pf_ethtool_ops;
529 extern const struct ethtool_ops enetc4_pf_ethtool_ops;
530 extern const struct ethtool_ops enetc_vf_ethtool_ops;
531 void enetc_set_ethtool_ops(struct net_device *ndev);
532 void enetc_mm_link_state_update(struct enetc_ndev_priv *priv, bool link);
533 void enetc_mm_commit_preemptible_tcs(struct enetc_ndev_priv *priv);
534
535 /* control buffer descriptor ring (CBDR) */
536 int enetc_setup_cbdr(struct device *dev, struct enetc_hw *hw, int bd_count,
537 struct enetc_cbdr *cbdr);
538 void enetc_teardown_cbdr(struct enetc_cbdr *cbdr);
539 int enetc4_setup_cbdr(struct enetc_si *si);
540 void enetc4_teardown_cbdr(struct enetc_si *si);
541 int enetc_set_mac_flt_entry(struct enetc_si *si, int index,
542 char *mac_addr, int si_map);
543 int enetc_clear_mac_flt_entry(struct enetc_si *si, int index);
544 int enetc_set_fs_entry(struct enetc_si *si, struct enetc_cmd_rfse *rfse,
545 int index);
546 void enetc_set_rss_key(struct enetc_si *si, const u8 *bytes);
547 int enetc_get_rss_table(struct enetc_si *si, u32 *table, int count);
548 int enetc_set_rss_table(struct enetc_si *si, const u32 *table, int count);
549 int enetc_send_cmd(struct enetc_si *si, struct enetc_cbd *cbd);
550 int enetc4_get_rss_table(struct enetc_si *si, u32 *table, int count);
551 int enetc4_set_rss_table(struct enetc_si *si, const u32 *table, int count);
552
enetc_cbd_alloc_data_mem(struct enetc_si * si,struct enetc_cbd * cbd,int size,dma_addr_t * dma,void ** data_align)553 static inline void *enetc_cbd_alloc_data_mem(struct enetc_si *si,
554 struct enetc_cbd *cbd,
555 int size, dma_addr_t *dma,
556 void **data_align)
557 {
558 struct enetc_cbdr *ring = &si->cbd_ring;
559 dma_addr_t dma_align;
560 void *data;
561
562 data = dma_alloc_coherent(ring->dma_dev,
563 size + ENETC_CBD_DATA_MEM_ALIGN,
564 dma, GFP_KERNEL);
565 if (!data) {
566 dev_err(ring->dma_dev, "CBD alloc data memory failed!\n");
567 return NULL;
568 }
569
570 dma_align = ALIGN(*dma, ENETC_CBD_DATA_MEM_ALIGN);
571 *data_align = PTR_ALIGN(data, ENETC_CBD_DATA_MEM_ALIGN);
572
573 cbd->addr[0] = cpu_to_le32(lower_32_bits(dma_align));
574 cbd->addr[1] = cpu_to_le32(upper_32_bits(dma_align));
575 cbd->length = cpu_to_le16(size);
576
577 return data;
578 }
579
enetc_cbd_free_data_mem(struct enetc_si * si,int size,void * data,dma_addr_t * dma)580 static inline void enetc_cbd_free_data_mem(struct enetc_si *si, int size,
581 void *data, dma_addr_t *dma)
582 {
583 struct enetc_cbdr *ring = &si->cbd_ring;
584
585 dma_free_coherent(ring->dma_dev, size + ENETC_CBD_DATA_MEM_ALIGN,
586 data, *dma);
587 }
588
589 void enetc_reset_ptcmsdur(struct enetc_hw *hw);
590 void enetc_set_ptcmsdur(struct enetc_hw *hw, u32 *queue_max_sdu);
591
592 #ifdef CONFIG_FSL_ENETC_QOS
593 int enetc_qos_query_caps(struct net_device *ndev, void *type_data);
594 int enetc_setup_tc_taprio(struct net_device *ndev, void *type_data);
595 void enetc_sched_speed_set(struct enetc_ndev_priv *priv, int speed);
596 int enetc_setup_tc_cbs(struct net_device *ndev, void *type_data);
597 int enetc_setup_tc_txtime(struct net_device *ndev, void *type_data);
598 int enetc_setup_tc_block_cb(enum tc_setup_type type, void *type_data,
599 void *cb_priv);
600 int enetc_setup_tc_psfp(struct net_device *ndev, void *type_data);
601 int enetc_psfp_init(struct enetc_ndev_priv *priv);
602 int enetc_psfp_clean(struct enetc_ndev_priv *priv);
603 int enetc_set_psfp(struct net_device *ndev, bool en);
604
enetc_get_max_cap(struct enetc_ndev_priv * priv)605 static inline void enetc_get_max_cap(struct enetc_ndev_priv *priv)
606 {
607 struct enetc_hw *hw = &priv->si->hw;
608 u32 reg;
609
610 reg = enetc_port_rd(hw, ENETC_PSIDCAPR);
611 priv->psfp_cap.max_streamid = reg & ENETC_PSIDCAPR_MSK;
612 /* Port stream filter capability */
613 reg = enetc_port_rd(hw, ENETC_PSFCAPR);
614 priv->psfp_cap.max_psfp_filter = reg & ENETC_PSFCAPR_MSK;
615 /* Port stream gate capability */
616 reg = enetc_port_rd(hw, ENETC_PSGCAPR);
617 priv->psfp_cap.max_psfp_gate = (reg & ENETC_PSGCAPR_SGIT_MSK);
618 priv->psfp_cap.max_psfp_gatelist = (reg & ENETC_PSGCAPR_GCL_MSK) >> 16;
619 /* Port flow meter capability */
620 reg = enetc_port_rd(hw, ENETC_PFMCAPR);
621 priv->psfp_cap.max_psfp_meter = reg & ENETC_PFMCAPR_MSK;
622 }
623
enetc_psfp_enable(struct enetc_ndev_priv * priv)624 static inline int enetc_psfp_enable(struct enetc_ndev_priv *priv)
625 {
626 struct enetc_hw *hw = &priv->si->hw;
627 int err;
628
629 enetc_get_max_cap(priv);
630
631 err = enetc_psfp_init(priv);
632 if (err)
633 return err;
634
635 enetc_wr(hw, ENETC_PPSFPMR, enetc_rd(hw, ENETC_PPSFPMR) |
636 ENETC_PPSFPMR_PSFPEN | ENETC_PPSFPMR_VS |
637 ENETC_PPSFPMR_PVC | ENETC_PPSFPMR_PVZC);
638
639 return 0;
640 }
641
enetc_psfp_disable(struct enetc_ndev_priv * priv)642 static inline int enetc_psfp_disable(struct enetc_ndev_priv *priv)
643 {
644 struct enetc_hw *hw = &priv->si->hw;
645 int err;
646
647 err = enetc_psfp_clean(priv);
648 if (err)
649 return err;
650
651 enetc_wr(hw, ENETC_PPSFPMR, enetc_rd(hw, ENETC_PPSFPMR) &
652 ~ENETC_PPSFPMR_PSFPEN & ~ENETC_PPSFPMR_VS &
653 ~ENETC_PPSFPMR_PVC & ~ENETC_PPSFPMR_PVZC);
654
655 memset(&priv->psfp_cap, 0, sizeof(struct psfp_cap));
656
657 return 0;
658 }
659
660 #else
661 #define enetc_qos_query_caps(ndev, type_data) -EOPNOTSUPP
662 #define enetc_setup_tc_taprio(ndev, type_data) -EOPNOTSUPP
663 #define enetc_sched_speed_set(priv, speed) (void)0
664 #define enetc_setup_tc_cbs(ndev, type_data) -EOPNOTSUPP
665 #define enetc_setup_tc_txtime(ndev, type_data) -EOPNOTSUPP
666 #define enetc_setup_tc_psfp(ndev, type_data) -EOPNOTSUPP
667 #define enetc_setup_tc_block_cb NULL
668
669 #define enetc_get_max_cap(p) \
670 memset(&((p)->psfp_cap), 0, sizeof(struct psfp_cap))
671
enetc_psfp_enable(struct enetc_ndev_priv * priv)672 static inline int enetc_psfp_enable(struct enetc_ndev_priv *priv)
673 {
674 return 0;
675 }
676
enetc_psfp_disable(struct enetc_ndev_priv * priv)677 static inline int enetc_psfp_disable(struct enetc_ndev_priv *priv)
678 {
679 return 0;
680 }
681
enetc_set_psfp(struct net_device * ndev,bool en)682 static inline int enetc_set_psfp(struct net_device *ndev, bool en)
683 {
684 return 0;
685 }
686 #endif
687