1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3 * Copyright (c) 2015, Linaro Limited
4 */
5 #ifndef __LINUX_ARM_SMCCC_H
6 #define __LINUX_ARM_SMCCC_H
7
8 #include <linux/args.h>
9 #include <linux/init.h>
10
11 #ifndef __ASSEMBLY__
12 #include <linux/uuid.h>
13 #endif
14
15 #include <uapi/linux/const.h>
16
17 /*
18 * This file provides common defines for ARM SMC Calling Convention as
19 * specified in
20 * https://developer.arm.com/docs/den0028/latest
21 *
22 * This code is up-to-date with version DEN 0028 C
23 */
24
25 #define ARM_SMCCC_STD_CALL _AC(0,U)
26 #define ARM_SMCCC_FAST_CALL _AC(1,U)
27 #define ARM_SMCCC_TYPE_SHIFT 31
28
29 #define ARM_SMCCC_SMC_32 0
30 #define ARM_SMCCC_SMC_64 1
31 #define ARM_SMCCC_CALL_CONV_SHIFT 30
32
33 #define ARM_SMCCC_OWNER_MASK 0x3F
34 #define ARM_SMCCC_OWNER_SHIFT 24
35
36 #define ARM_SMCCC_FUNC_MASK 0xFFFF
37
38 #define ARM_SMCCC_IS_FAST_CALL(smc_val) \
39 ((smc_val) & (ARM_SMCCC_FAST_CALL << ARM_SMCCC_TYPE_SHIFT))
40 #define ARM_SMCCC_IS_64(smc_val) \
41 ((smc_val) & (ARM_SMCCC_SMC_64 << ARM_SMCCC_CALL_CONV_SHIFT))
42 #define ARM_SMCCC_FUNC_NUM(smc_val) ((smc_val) & ARM_SMCCC_FUNC_MASK)
43 #define ARM_SMCCC_OWNER_NUM(smc_val) \
44 (((smc_val) >> ARM_SMCCC_OWNER_SHIFT) & ARM_SMCCC_OWNER_MASK)
45
46 #define ARM_SMCCC_CALL_VAL(type, calling_convention, owner, func_num) \
47 (((type) << ARM_SMCCC_TYPE_SHIFT) | \
48 ((calling_convention) << ARM_SMCCC_CALL_CONV_SHIFT) | \
49 (((owner) & ARM_SMCCC_OWNER_MASK) << ARM_SMCCC_OWNER_SHIFT) | \
50 ((func_num) & ARM_SMCCC_FUNC_MASK))
51
52 #define ARM_SMCCC_OWNER_ARCH 0
53 #define ARM_SMCCC_OWNER_CPU 1
54 #define ARM_SMCCC_OWNER_SIP 2
55 #define ARM_SMCCC_OWNER_OEM 3
56 #define ARM_SMCCC_OWNER_STANDARD 4
57 #define ARM_SMCCC_OWNER_STANDARD_HYP 5
58 #define ARM_SMCCC_OWNER_VENDOR_HYP 6
59 #define ARM_SMCCC_OWNER_TRUSTED_APP 48
60 #define ARM_SMCCC_OWNER_TRUSTED_APP_END 49
61 #define ARM_SMCCC_OWNER_TRUSTED_OS 50
62 #define ARM_SMCCC_OWNER_TRUSTED_OS_END 63
63
64 #define ARM_SMCCC_FUNC_QUERY_CALL_UID 0xff01
65
66 #define ARM_SMCCC_QUIRK_NONE 0
67 #define ARM_SMCCC_QUIRK_QCOM_A6 1 /* Save/restore register a6 */
68
69 #define ARM_SMCCC_VERSION_1_0 0x10000
70 #define ARM_SMCCC_VERSION_1_1 0x10001
71 #define ARM_SMCCC_VERSION_1_2 0x10002
72 #define ARM_SMCCC_VERSION_1_3 0x10003
73
74 #define ARM_SMCCC_1_3_SVE_HINT 0x10000
75 #define ARM_SMCCC_CALL_HINTS ARM_SMCCC_1_3_SVE_HINT
76
77
78 #define ARM_SMCCC_VERSION_FUNC_ID \
79 ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
80 ARM_SMCCC_SMC_32, \
81 0, 0)
82
83 #define ARM_SMCCC_ARCH_FEATURES_FUNC_ID \
84 ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
85 ARM_SMCCC_SMC_32, \
86 0, 1)
87
88 #define ARM_SMCCC_ARCH_SOC_ID \
89 ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
90 ARM_SMCCC_SMC_32, \
91 0, 2)
92
93 #define ARM_SMCCC_ARCH_WORKAROUND_1 \
94 ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
95 ARM_SMCCC_SMC_32, \
96 0, 0x8000)
97
98 #define ARM_SMCCC_ARCH_WORKAROUND_2 \
99 ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
100 ARM_SMCCC_SMC_32, \
101 0, 0x7fff)
102
103 #define ARM_SMCCC_ARCH_WORKAROUND_3 \
104 ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
105 ARM_SMCCC_SMC_32, \
106 0, 0x3fff)
107
108 /* C1-Pro erratum 4193714: SME DVMSync early acknowledgement */
109 #define ARM_SMCCC_CPU_WORKAROUND_4193714 \
110 ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
111 ARM_SMCCC_SMC_32, \
112 ARM_SMCCC_OWNER_CPU, 0x10)
113
114 #define ARM_SMCCC_VENDOR_HYP_CALL_UID_FUNC_ID \
115 ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
116 ARM_SMCCC_SMC_32, \
117 ARM_SMCCC_OWNER_VENDOR_HYP, \
118 ARM_SMCCC_FUNC_QUERY_CALL_UID)
119
120 /* KVM UID value: 28b46fb6-2ec5-11e9-a9ca-4b564d003a74 */
121 #define ARM_SMCCC_VENDOR_HYP_UID_KVM UUID_INIT(\
122 0x28b46fb6, 0x2ec5, 0x11e9, \
123 0xa9, 0xca, 0x4b, 0x56, \
124 0x4d, 0x00, 0x3a, 0x74)
125
126 /* KVM "vendor specific" services */
127 #define ARM_SMCCC_KVM_FUNC_FEATURES 0
128 #define ARM_SMCCC_KVM_FUNC_PTP 1
129 /* Start of pKVM hypercall range */
130 #define ARM_SMCCC_KVM_FUNC_HYP_MEMINFO 2
131 #define ARM_SMCCC_KVM_FUNC_MEM_SHARE 3
132 #define ARM_SMCCC_KVM_FUNC_MEM_UNSHARE 4
133 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_5 5
134 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_6 6
135 #define ARM_SMCCC_KVM_FUNC_MMIO_GUARD 7
136 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_8 8
137 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_9 9
138 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_10 10
139 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_11 11
140 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_12 12
141 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_13 13
142 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_14 14
143 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_15 15
144 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_16 16
145 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_17 17
146 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_18 18
147 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_19 19
148 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_20 20
149 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_21 21
150 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_22 22
151 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_23 23
152 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_24 24
153 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_25 25
154 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_26 26
155 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_27 27
156 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_28 28
157 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_29 29
158 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_30 30
159 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_31 31
160 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_32 32
161 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_33 33
162 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_34 34
163 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_35 35
164 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_36 36
165 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_37 37
166 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_38 38
167 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_39 39
168 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_40 40
169 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_41 41
170 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_42 42
171 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_43 43
172 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_44 44
173 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_45 45
174 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_46 46
175 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_47 47
176 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_48 48
177 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_49 49
178 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_50 50
179 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_51 51
180 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_52 52
181 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_53 53
182 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_54 54
183 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_55 55
184 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_56 56
185 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_57 57
186 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_58 58
187 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_59 59
188 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_60 60
189 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_61 61
190 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_62 62
191 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_63 63
192 /* End of pKVM hypercall range */
193 #define ARM_SMCCC_KVM_FUNC_DISCOVER_IMPL_VER 64
194 #define ARM_SMCCC_KVM_FUNC_DISCOVER_IMPL_CPUS 65
195
196 #define ARM_SMCCC_KVM_FUNC_FEATURES_2 127
197 #define ARM_SMCCC_KVM_NUM_FUNCS 128
198
199 #define ARM_SMCCC_VENDOR_HYP_KVM_FEATURES_FUNC_ID \
200 ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
201 ARM_SMCCC_SMC_32, \
202 ARM_SMCCC_OWNER_VENDOR_HYP, \
203 ARM_SMCCC_KVM_FUNC_FEATURES)
204
205 #define SMCCC_ARCH_WORKAROUND_RET_UNAFFECTED 1
206
207 /*
208 * ptp_kvm is a feature used for time sync between vm and host.
209 * ptp_kvm module in guest kernel will get service from host using
210 * this hypercall ID.
211 */
212 #define ARM_SMCCC_VENDOR_HYP_KVM_PTP_FUNC_ID \
213 ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
214 ARM_SMCCC_SMC_32, \
215 ARM_SMCCC_OWNER_VENDOR_HYP, \
216 ARM_SMCCC_KVM_FUNC_PTP)
217
218 #define ARM_SMCCC_VENDOR_HYP_KVM_HYP_MEMINFO_FUNC_ID \
219 ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
220 ARM_SMCCC_SMC_64, \
221 ARM_SMCCC_OWNER_VENDOR_HYP, \
222 ARM_SMCCC_KVM_FUNC_HYP_MEMINFO)
223
224 #define ARM_SMCCC_VENDOR_HYP_KVM_MEM_SHARE_FUNC_ID \
225 ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
226 ARM_SMCCC_SMC_64, \
227 ARM_SMCCC_OWNER_VENDOR_HYP, \
228 ARM_SMCCC_KVM_FUNC_MEM_SHARE)
229
230 #define ARM_SMCCC_VENDOR_HYP_KVM_MEM_UNSHARE_FUNC_ID \
231 ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
232 ARM_SMCCC_SMC_64, \
233 ARM_SMCCC_OWNER_VENDOR_HYP, \
234 ARM_SMCCC_KVM_FUNC_MEM_UNSHARE)
235
236 #define ARM_SMCCC_VENDOR_HYP_KVM_MMIO_GUARD_FUNC_ID \
237 ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
238 ARM_SMCCC_SMC_64, \
239 ARM_SMCCC_OWNER_VENDOR_HYP, \
240 ARM_SMCCC_KVM_FUNC_MMIO_GUARD)
241
242 #define ARM_SMCCC_VENDOR_HYP_KVM_DISCOVER_IMPL_VER_FUNC_ID \
243 ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
244 ARM_SMCCC_SMC_64, \
245 ARM_SMCCC_OWNER_VENDOR_HYP, \
246 ARM_SMCCC_KVM_FUNC_DISCOVER_IMPL_VER)
247
248 #define ARM_SMCCC_VENDOR_HYP_KVM_DISCOVER_IMPL_CPUS_FUNC_ID \
249 ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
250 ARM_SMCCC_SMC_64, \
251 ARM_SMCCC_OWNER_VENDOR_HYP, \
252 ARM_SMCCC_KVM_FUNC_DISCOVER_IMPL_CPUS)
253
254 /* ptp_kvm counter type ID */
255 #define KVM_PTP_VIRT_COUNTER 0
256 #define KVM_PTP_PHYS_COUNTER 1
257
258 /* Paravirtualised time calls (defined by ARM DEN0057A) */
259 #define ARM_SMCCC_HV_PV_TIME_FEATURES \
260 ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
261 ARM_SMCCC_SMC_64, \
262 ARM_SMCCC_OWNER_STANDARD_HYP, \
263 0x20)
264
265 #define ARM_SMCCC_HV_PV_TIME_ST \
266 ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
267 ARM_SMCCC_SMC_64, \
268 ARM_SMCCC_OWNER_STANDARD_HYP, \
269 0x21)
270
271 /* TRNG entropy source calls (defined by ARM DEN0098) */
272 #define ARM_SMCCC_TRNG_VERSION \
273 ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
274 ARM_SMCCC_SMC_32, \
275 ARM_SMCCC_OWNER_STANDARD, \
276 0x50)
277
278 #define ARM_SMCCC_TRNG_FEATURES \
279 ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
280 ARM_SMCCC_SMC_32, \
281 ARM_SMCCC_OWNER_STANDARD, \
282 0x51)
283
284 #define ARM_SMCCC_TRNG_GET_UUID \
285 ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
286 ARM_SMCCC_SMC_32, \
287 ARM_SMCCC_OWNER_STANDARD, \
288 0x52)
289
290 #define ARM_SMCCC_TRNG_RND32 \
291 ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
292 ARM_SMCCC_SMC_32, \
293 ARM_SMCCC_OWNER_STANDARD, \
294 0x53)
295
296 #define ARM_SMCCC_TRNG_RND64 \
297 ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
298 ARM_SMCCC_SMC_64, \
299 ARM_SMCCC_OWNER_STANDARD, \
300 0x53)
301
302 /*
303 * Return codes defined in ARM DEN 0070A
304 * ARM DEN 0070A is now merged/consolidated into ARM DEN 0028 C
305 */
306 #define SMCCC_RET_SUCCESS 0
307 #define SMCCC_RET_NOT_SUPPORTED -1
308 #define SMCCC_RET_NOT_REQUIRED -2
309 #define SMCCC_RET_INVALID_PARAMETER -3
310
311 #ifndef __ASSEMBLY__
312
313 #include <linux/linkage.h>
314 #include <linux/types.h>
315
316 enum arm_smccc_conduit {
317 SMCCC_CONDUIT_NONE,
318 SMCCC_CONDUIT_SMC,
319 SMCCC_CONDUIT_HVC,
320 };
321
322 /**
323 * arm_smccc_1_1_get_conduit()
324 *
325 * Returns the conduit to be used for SMCCCv1.1 or later.
326 *
327 * When SMCCCv1.1 is not present, returns SMCCC_CONDUIT_NONE.
328 */
329 enum arm_smccc_conduit arm_smccc_1_1_get_conduit(void);
330
331 /**
332 * arm_smccc_get_version()
333 *
334 * Returns the version to be used for SMCCCv1.1 or later.
335 *
336 * When SMCCCv1.1 or above is not present, returns SMCCCv1.0, but this
337 * does not imply the presence of firmware or a valid conduit. Caller
338 * handling SMCCCv1.0 must determine the conduit by other means.
339 */
340 u32 arm_smccc_get_version(void);
341
342 void __init arm_smccc_version_init(u32 version, enum arm_smccc_conduit conduit);
343
344 /**
345 * arm_smccc_get_soc_id_version()
346 *
347 * Returns the SOC ID version.
348 *
349 * When ARM_SMCCC_ARCH_SOC_ID is not present, returns SMCCC_RET_NOT_SUPPORTED.
350 */
351 s32 arm_smccc_get_soc_id_version(void);
352
353 /**
354 * arm_smccc_get_soc_id_revision()
355 *
356 * Returns the SOC ID revision.
357 *
358 * When ARM_SMCCC_ARCH_SOC_ID is not present, returns SMCCC_RET_NOT_SUPPORTED.
359 */
360 s32 arm_smccc_get_soc_id_revision(void);
361
362 #ifndef __ASSEMBLY__
363
364 /*
365 * Returns whether a specific hypervisor UUID is advertised for the
366 * Vendor Specific Hypervisor Service range.
367 */
368 bool arm_smccc_hypervisor_has_uuid(const uuid_t *uuid);
369
smccc_res_to_uuid(u32 r0,u32 r1,u32 r2,u32 r3)370 static inline uuid_t smccc_res_to_uuid(u32 r0, u32 r1, u32 r2, u32 r3)
371 {
372 uuid_t uuid = {
373 .b = {
374 [0] = (r0 >> 0) & 0xff,
375 [1] = (r0 >> 8) & 0xff,
376 [2] = (r0 >> 16) & 0xff,
377 [3] = (r0 >> 24) & 0xff,
378
379 [4] = (r1 >> 0) & 0xff,
380 [5] = (r1 >> 8) & 0xff,
381 [6] = (r1 >> 16) & 0xff,
382 [7] = (r1 >> 24) & 0xff,
383
384 [8] = (r2 >> 0) & 0xff,
385 [9] = (r2 >> 8) & 0xff,
386 [10] = (r2 >> 16) & 0xff,
387 [11] = (r2 >> 24) & 0xff,
388
389 [12] = (r3 >> 0) & 0xff,
390 [13] = (r3 >> 8) & 0xff,
391 [14] = (r3 >> 16) & 0xff,
392 [15] = (r3 >> 24) & 0xff,
393 },
394 };
395
396 return uuid;
397 }
398
smccc_uuid_to_reg(const uuid_t * uuid,int reg)399 static inline u32 smccc_uuid_to_reg(const uuid_t *uuid, int reg)
400 {
401 u32 val = 0;
402
403 val |= (u32)(uuid->b[4 * reg + 0] << 0);
404 val |= (u32)(uuid->b[4 * reg + 1] << 8);
405 val |= (u32)(uuid->b[4 * reg + 2] << 16);
406 val |= (u32)(uuid->b[4 * reg + 3] << 24);
407
408 return val;
409 }
410
411 #endif /* !__ASSEMBLY__ */
412
413 /**
414 * struct arm_smccc_res - Result from SMC/HVC call
415 * @a0-a3 result values from registers 0 to 3
416 */
417 struct arm_smccc_res {
418 unsigned long a0;
419 unsigned long a1;
420 unsigned long a2;
421 unsigned long a3;
422 };
423
424 #ifdef CONFIG_ARM64
425 /**
426 * struct arm_smccc_1_2_regs - Arguments for or Results from SMC/HVC call
427 * @a0-a17 argument values from registers 0 to 17
428 */
429 struct arm_smccc_1_2_regs {
430 unsigned long a0;
431 unsigned long a1;
432 unsigned long a2;
433 unsigned long a3;
434 unsigned long a4;
435 unsigned long a5;
436 unsigned long a6;
437 unsigned long a7;
438 unsigned long a8;
439 unsigned long a9;
440 unsigned long a10;
441 unsigned long a11;
442 unsigned long a12;
443 unsigned long a13;
444 unsigned long a14;
445 unsigned long a15;
446 unsigned long a16;
447 unsigned long a17;
448 };
449
450 /**
451 * arm_smccc_1_2_hvc() - make HVC calls
452 * @args: arguments passed via struct arm_smccc_1_2_regs
453 * @res: result values via struct arm_smccc_1_2_regs
454 *
455 * This function is used to make HVC calls following SMC Calling Convention
456 * v1.2 or above. The content of the supplied param are copied from the
457 * structure to registers prior to the HVC instruction. The return values
458 * are updated with the content from registers on return from the HVC
459 * instruction.
460 */
461 asmlinkage void arm_smccc_1_2_hvc(const struct arm_smccc_1_2_regs *args,
462 struct arm_smccc_1_2_regs *res);
463
464 /**
465 * arm_smccc_1_2_smc() - make SMC calls
466 * @args: arguments passed via struct arm_smccc_1_2_regs
467 * @res: result values via struct arm_smccc_1_2_regs
468 *
469 * This function is used to make SMC calls following SMC Calling Convention
470 * v1.2 or above. The content of the supplied param are copied from the
471 * structure to registers prior to the SMC instruction. The return values
472 * are updated with the content from registers on return from the SMC
473 * instruction.
474 */
475 asmlinkage void arm_smccc_1_2_smc(const struct arm_smccc_1_2_regs *args,
476 struct arm_smccc_1_2_regs *res);
477 #endif
478
479 /**
480 * struct arm_smccc_quirk - Contains quirk information
481 * @id: quirk identification
482 * @state: quirk specific information
483 * @a6: Qualcomm quirk entry for returning post-smc call contents of a6
484 */
485 struct arm_smccc_quirk {
486 int id;
487 union {
488 unsigned long a6;
489 } state;
490 };
491
492 /**
493 * __arm_smccc_smc() - make SMC calls
494 * @a0-a7: arguments passed in registers 0 to 7
495 * @res: result values from registers 0 to 3
496 * @quirk: points to an arm_smccc_quirk, or NULL when no quirks are required.
497 *
498 * This function is used to make SMC calls following SMC Calling Convention.
499 * The content of the supplied param are copied to registers 0 to 7 prior
500 * to the SMC instruction. The return values are updated with the content
501 * from register 0 to 3 on return from the SMC instruction. An optional
502 * quirk structure provides vendor specific behavior.
503 */
504 #ifdef CONFIG_HAVE_ARM_SMCCC
505 asmlinkage void __arm_smccc_smc(unsigned long a0, unsigned long a1,
506 unsigned long a2, unsigned long a3, unsigned long a4,
507 unsigned long a5, unsigned long a6, unsigned long a7,
508 struct arm_smccc_res *res, struct arm_smccc_quirk *quirk);
509 #else
__arm_smccc_smc(unsigned long a0,unsigned long a1,unsigned long a2,unsigned long a3,unsigned long a4,unsigned long a5,unsigned long a6,unsigned long a7,struct arm_smccc_res * res,struct arm_smccc_quirk * quirk)510 static inline void __arm_smccc_smc(unsigned long a0, unsigned long a1,
511 unsigned long a2, unsigned long a3, unsigned long a4,
512 unsigned long a5, unsigned long a6, unsigned long a7,
513 struct arm_smccc_res *res, struct arm_smccc_quirk *quirk)
514 {
515 *res = (struct arm_smccc_res){};
516 }
517 #endif
518
519 /**
520 * __arm_smccc_hvc() - make HVC calls
521 * @a0-a7: arguments passed in registers 0 to 7
522 * @res: result values from registers 0 to 3
523 * @quirk: points to an arm_smccc_quirk, or NULL when no quirks are required.
524 *
525 * This function is used to make HVC calls following SMC Calling
526 * Convention. The content of the supplied param are copied to registers 0
527 * to 7 prior to the HVC instruction. The return values are updated with
528 * the content from register 0 to 3 on return from the HVC instruction. An
529 * optional quirk structure provides vendor specific behavior.
530 */
531 asmlinkage void __arm_smccc_hvc(unsigned long a0, unsigned long a1,
532 unsigned long a2, unsigned long a3, unsigned long a4,
533 unsigned long a5, unsigned long a6, unsigned long a7,
534 struct arm_smccc_res *res, struct arm_smccc_quirk *quirk);
535
536 #define arm_smccc_smc(...) __arm_smccc_smc(__VA_ARGS__, NULL)
537
538 #define arm_smccc_smc_quirk(...) __arm_smccc_smc(__VA_ARGS__)
539
540 #define arm_smccc_hvc(...) __arm_smccc_hvc(__VA_ARGS__, NULL)
541
542 #define arm_smccc_hvc_quirk(...) __arm_smccc_hvc(__VA_ARGS__)
543
544 /* SMCCC v1.1 implementation madness follows */
545 #ifdef CONFIG_ARM64
546
547 #define SMCCC_SMC_INST "smc #0"
548 #define SMCCC_HVC_INST "hvc #0"
549
550 #elif defined(CONFIG_ARM)
551 #include <asm/opcodes-sec.h>
552 #include <asm/opcodes-virt.h>
553
554 #define SMCCC_SMC_INST __SMC(0)
555 #define SMCCC_HVC_INST __HVC(0)
556
557 #endif
558
559 #define __constraint_read_2 "r" (arg0)
560 #define __constraint_read_3 __constraint_read_2, "r" (arg1)
561 #define __constraint_read_4 __constraint_read_3, "r" (arg2)
562 #define __constraint_read_5 __constraint_read_4, "r" (arg3)
563 #define __constraint_read_6 __constraint_read_5, "r" (arg4)
564 #define __constraint_read_7 __constraint_read_6, "r" (arg5)
565 #define __constraint_read_8 __constraint_read_7, "r" (arg6)
566 #define __constraint_read_9 __constraint_read_8, "r" (arg7)
567
568 #define __declare_arg_2(a0, res) \
569 struct arm_smccc_res *___res = res; \
570 register unsigned long arg0 asm("r0") = (u32)a0
571
572 #define __declare_arg_3(a0, a1, res) \
573 typeof(a1) __a1 = a1; \
574 struct arm_smccc_res *___res = res; \
575 register unsigned long arg0 asm("r0") = (u32)a0; \
576 register typeof(a1) arg1 asm("r1") = __a1
577
578 #define __declare_arg_4(a0, a1, a2, res) \
579 typeof(a1) __a1 = a1; \
580 typeof(a2) __a2 = a2; \
581 struct arm_smccc_res *___res = res; \
582 register unsigned long arg0 asm("r0") = (u32)a0; \
583 register typeof(a1) arg1 asm("r1") = __a1; \
584 register typeof(a2) arg2 asm("r2") = __a2
585
586 #define __declare_arg_5(a0, a1, a2, a3, res) \
587 typeof(a1) __a1 = a1; \
588 typeof(a2) __a2 = a2; \
589 typeof(a3) __a3 = a3; \
590 struct arm_smccc_res *___res = res; \
591 register unsigned long arg0 asm("r0") = (u32)a0; \
592 register typeof(a1) arg1 asm("r1") = __a1; \
593 register typeof(a2) arg2 asm("r2") = __a2; \
594 register typeof(a3) arg3 asm("r3") = __a3
595
596 #define __declare_arg_6(a0, a1, a2, a3, a4, res) \
597 typeof(a4) __a4 = a4; \
598 __declare_arg_5(a0, a1, a2, a3, res); \
599 register typeof(a4) arg4 asm("r4") = __a4
600
601 #define __declare_arg_7(a0, a1, a2, a3, a4, a5, res) \
602 typeof(a5) __a5 = a5; \
603 __declare_arg_6(a0, a1, a2, a3, a4, res); \
604 register typeof(a5) arg5 asm("r5") = __a5
605
606 #define __declare_arg_8(a0, a1, a2, a3, a4, a5, a6, res) \
607 typeof(a6) __a6 = a6; \
608 __declare_arg_7(a0, a1, a2, a3, a4, a5, res); \
609 register typeof(a6) arg6 asm("r6") = __a6
610
611 #define __declare_arg_9(a0, a1, a2, a3, a4, a5, a6, a7, res) \
612 typeof(a7) __a7 = a7; \
613 __declare_arg_8(a0, a1, a2, a3, a4, a5, a6, res); \
614 register typeof(a7) arg7 asm("r7") = __a7
615
616 /*
617 * We have an output list that is not necessarily used, and GCC feels
618 * entitled to optimise the whole sequence away. "volatile" is what
619 * makes it stick.
620 */
621 #define __arm_smccc_1_1(inst, ...) \
622 do { \
623 register unsigned long r0 asm("r0"); \
624 register unsigned long r1 asm("r1"); \
625 register unsigned long r2 asm("r2"); \
626 register unsigned long r3 asm("r3"); \
627 CONCATENATE(__declare_arg_, \
628 COUNT_ARGS(__VA_ARGS__))(__VA_ARGS__); \
629 asm volatile(inst "\n" : \
630 "=r" (r0), "=r" (r1), "=r" (r2), "=r" (r3) \
631 : CONCATENATE(__constraint_read_, \
632 COUNT_ARGS(__VA_ARGS__)) \
633 : "memory"); \
634 if (___res) \
635 *___res = (typeof(*___res)){r0, r1, r2, r3}; \
636 } while (0)
637
638 /*
639 * arm_smccc_1_1_smc() - make an SMCCC v1.1 compliant SMC call
640 *
641 * This is a variadic macro taking one to eight source arguments, and
642 * an optional return structure.
643 *
644 * @a0-a7: arguments passed in registers 0 to 7
645 * @res: result values from registers 0 to 3
646 *
647 * This macro is used to make SMC calls following SMC Calling Convention v1.1.
648 * The content of the supplied param are copied to registers 0 to 7 prior
649 * to the SMC instruction. The return values are updated with the content
650 * from register 0 to 3 on return from the SMC instruction if not NULL.
651 */
652 #define arm_smccc_1_1_smc(...) __arm_smccc_1_1(SMCCC_SMC_INST, __VA_ARGS__)
653
654 /*
655 * arm_smccc_1_1_hvc() - make an SMCCC v1.1 compliant HVC call
656 *
657 * This is a variadic macro taking one to eight source arguments, and
658 * an optional return structure.
659 *
660 * @a0-a7: arguments passed in registers 0 to 7
661 * @res: result values from registers 0 to 3
662 *
663 * This macro is used to make HVC calls following SMC Calling Convention v1.1.
664 * The content of the supplied param are copied to registers 0 to 7 prior
665 * to the HVC instruction. The return values are updated with the content
666 * from register 0 to 3 on return from the HVC instruction if not NULL.
667 */
668 #define arm_smccc_1_1_hvc(...) __arm_smccc_1_1(SMCCC_HVC_INST, __VA_ARGS__)
669
670 /*
671 * Like arm_smccc_1_1* but always returns SMCCC_RET_NOT_SUPPORTED.
672 * Used when the SMCCC conduit is not defined. The empty asm statement
673 * avoids compiler warnings about unused variables.
674 */
675 #define __fail_smccc_1_1(...) \
676 do { \
677 CONCATENATE(__declare_arg_, \
678 COUNT_ARGS(__VA_ARGS__))(__VA_ARGS__); \
679 asm ("" : \
680 : CONCATENATE(__constraint_read_, \
681 COUNT_ARGS(__VA_ARGS__)) \
682 : "memory"); \
683 if (___res) \
684 ___res->a0 = SMCCC_RET_NOT_SUPPORTED; \
685 } while (0)
686
687 /*
688 * arm_smccc_1_1_invoke() - make an SMCCC v1.1 compliant call
689 *
690 * This is a variadic macro taking one to eight source arguments, and
691 * an optional return structure.
692 *
693 * @a0-a7: arguments passed in registers 0 to 7
694 * @res: result values from registers 0 to 3
695 *
696 * This macro will make either an HVC call or an SMC call depending on the
697 * current SMCCC conduit. If no valid conduit is available then -1
698 * (SMCCC_RET_NOT_SUPPORTED) is returned in @res.a0 (if supplied).
699 *
700 * The return value also provides the conduit that was used.
701 */
702 #define arm_smccc_1_1_invoke(...) ({ \
703 int method = arm_smccc_1_1_get_conduit(); \
704 switch (method) { \
705 case SMCCC_CONDUIT_HVC: \
706 arm_smccc_1_1_hvc(__VA_ARGS__); \
707 break; \
708 case SMCCC_CONDUIT_SMC: \
709 arm_smccc_1_1_smc(__VA_ARGS__); \
710 break; \
711 default: \
712 __fail_smccc_1_1(__VA_ARGS__); \
713 method = SMCCC_CONDUIT_NONE; \
714 break; \
715 } \
716 method; \
717 })
718
719 #ifdef CONFIG_ARM64
720
721 #define __fail_smccc_1_2(___res) \
722 do { \
723 if (___res) \
724 ___res->a0 = SMCCC_RET_NOT_SUPPORTED; \
725 } while (0)
726
727 /*
728 * arm_smccc_1_2_invoke() - make an SMCCC v1.2 compliant call
729 *
730 * @args: SMC args are in the a0..a17 fields of the arm_smcc_1_2_regs structure
731 * @res: result values from registers 0 to 17
732 *
733 * This macro will make either an HVC call or an SMC call depending on the
734 * current SMCCC conduit. If no valid conduit is available then -1
735 * (SMCCC_RET_NOT_SUPPORTED) is returned in @res.a0 (if supplied).
736 *
737 * The return value also provides the conduit that was used.
738 */
739 #define arm_smccc_1_2_invoke(args, res) ({ \
740 struct arm_smccc_1_2_regs *__args = args; \
741 struct arm_smccc_1_2_regs *__res = res; \
742 int method = arm_smccc_1_1_get_conduit(); \
743 switch (method) { \
744 case SMCCC_CONDUIT_HVC: \
745 arm_smccc_1_2_hvc(__args, __res); \
746 break; \
747 case SMCCC_CONDUIT_SMC: \
748 arm_smccc_1_2_smc(__args, __res); \
749 break; \
750 default: \
751 __fail_smccc_1_2(__res); \
752 method = SMCCC_CONDUIT_NONE; \
753 break; \
754 } \
755 method; \
756 })
757 #endif /*CONFIG_ARM64*/
758
759 #endif /*__ASSEMBLY__*/
760 #endif /*__LINUX_ARM_SMCCC_H*/
761