1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Copyright (c) 2017-2026 Morse Micro
4 */
5 #include "core.h"
6 #include <linux/slab.h>
7 #include <linux/jiffies.h>
8 #include <linux/crc32.h>
9 #include <net/mac80211.h>
10 #include <asm/div64.h>
11 #include <linux/kernel.h>
12 #include "hif.h"
13 #include "mac.h"
14 #include "bus.h"
15 #include "ps.h"
16 #include "rc.h"
17
18 /*
19 * Arbitrary size limit for the filter command address list, to ensure that
20 * the command does not exceed page/MTU size. This will be far greater than
21 * the number of filters supported by the firmware.
22 */
23 #define MCAST_FILTER_COUNT_MAX (1024 / sizeof(filter->addr_list[0]))
24
25 /* Calculate average RSSI for Rx status */
26 #define CALC_AVG_RSSI(_avg, _sample) ((((_avg) * 9 + (_sample)) / 10))
27
28 /*
29 * When automatically trying MCS0 before MCS10, this is how many
30 * MCS0 attempts to make
31 */
32 #define MCS0_BEFORE_MCS10_COUNT (1)
33
34 /* Maximum TX power (default) */
35 #define MAX_TX_POWER_MBM (2200)
36
37 /*
38 * Since S1G runs at 1/10th the clockrate of VHT, the worst-case
39 * transmission time is significantly longer then that of non-S1G
40 * PHYs.
41 */
42 #define MM81X_FLUSH_TIMEOUT (16 * HZ)
43
44 /* Default queue count */
45 #define MM81X_HW_QUEUE_COUNT (4)
46
47 /* Max rates per skb */
48 #define MM81X_HW_MAX_RATES (4)
49
50 /* Max reported rates */
51 #define MM81X_HW_MAX_REPORT_RATES (4)
52
53 /* Max rate attempts */
54 #define MM81X_HW_MAX_RATE_TRIES (1)
55
56 /* Max sk pacing shift */
57 #define MM81X_HW_TX_SK_PACING_SHIFT (3)
58
59 /* NSS/MCS map values */
60 #define MM81X_NSS_MCS_BYTE_0 0xfe /* 1SS */
61 #define MM81X_NSS_MCS_BYTE_1 0x00
62 #define MM81X_NSS_MCS_BYTE_2 0xfc /* 1SS */
63 #define MM81X_NSS_MCS_BYTE_3 0x01
64 #define MM81X_NSS_MCS_BYTE_4 0x00
65
66 /* HW restart delay time before terminating hardware IF work items */
67 #define MM81X_HW_RESTART_DELAY_MS 20
68
69 /* clang-format off */
70
71 /* mm81x chips do not support 16MHz */
72 #define CHANS1G(channel, frequency, offset, chan_flags) \
73 { \
74 .band = NL80211_BAND_S1GHZ, \
75 .center_freq = (frequency), \
76 .freq_offset = (offset), \
77 .hw_value = (channel), \
78 .flags = ((chan_flags) | IEEE80211_CHAN_NO_16MHZ), \
79 .max_antenna_gain = 0, \
80 .max_power = 30, \
81 }
82
83 static struct ieee80211_channel mors_s1ghz_channels[] = {
84 CHANS1G(1, 902, 500, IEEE80211_CHAN_S1G_NO_PRIMARY),
85 CHANS1G(3, 903, 500, 0),
86 CHANS1G(5, 904, 500, 0),
87 CHANS1G(7, 905, 500, 0),
88 CHANS1G(9, 906, 500, 0),
89 CHANS1G(11, 907, 500, 0),
90 CHANS1G(13, 908, 500, 0),
91 CHANS1G(15, 909, 500, 0),
92 CHANS1G(17, 910, 500, 0),
93 CHANS1G(19, 911, 500, 0),
94 CHANS1G(21, 912, 500, 0),
95 CHANS1G(23, 913, 500, 0),
96 CHANS1G(25, 914, 500, 0),
97 CHANS1G(27, 915, 500, 0),
98 CHANS1G(29, 916, 500, 0),
99 CHANS1G(31, 917, 500, 0),
100 CHANS1G(33, 918, 500, 0),
101 CHANS1G(35, 919, 500, 0),
102 CHANS1G(37, 920, 500, 0),
103 CHANS1G(39, 921, 500, 0),
104 CHANS1G(41, 922, 500, 0),
105 CHANS1G(43, 923, 500, 0),
106 CHANS1G(45, 924, 500, 0),
107 CHANS1G(47, 925, 500, 0),
108 CHANS1G(49, 926, 500, 0),
109 CHANS1G(51, 927, 500, IEEE80211_CHAN_S1G_NO_PRIMARY),
110 };
111
112 /* clang-format on */
113
114 static struct ieee80211_supported_band mors_band_s1ghz = {
115 .band = NL80211_BAND_S1GHZ,
116 .s1g_cap.s1g = true,
117 .channels = mors_s1ghz_channels,
118 .n_channels = ARRAY_SIZE(mors_s1ghz_channels),
119 .bitrates = NULL,
120 .n_bitrates = 0,
121 .s1g_cap.cap[4] = 0x80 /* STA type sensor only for AP & STA */
122 };
123
124 static struct ieee80211_iface_limit mors_if_limits[] = {
125 {
126 .max = MM81X_MAX_IF,
127 .types = BIT(NL80211_IFTYPE_STATION) | BIT(NL80211_IFTYPE_AP),
128 },
129 };
130
131 static struct ieee80211_iface_combination mors_if_combs[] = {
132 {
133 .limits = mors_if_limits,
134 .n_limits = ARRAY_SIZE(mors_if_limits),
135 .max_interfaces = MM81X_MAX_IF,
136 .num_different_channels = 1,
137 },
138 };
139
140 /* Convert from a time in time units (1024us) to us */
141 #define MM81X_TU_TO_US(x) ((x) * 1024UL)
142
143 /* Convert from a time in time units (1024us) to ms */
144 #define MM81X_TU_TO_MS(x) (MM81X_TU_TO_US(x) / 1000UL)
145
146 /* Default time to dwell on a scan channel */
147 #define MM81X_HWSCAN_DEFAULT_DWELL_TIME_MS (30)
148
149 /* Default time to dwell on a scan channel for passive scan */
150 #define MM81X_HWSCAN_DEFAULT_PASSIVE_DWELL_TIME_MS (110)
151
152 /* Default time to dwell on home channel, in between scan channels */
153 #define MM81X_HWSCAN_DEFAULT_DWELL_ON_HOME_MS (200)
154
155 /* Typical time it takes to send the probe */
156 #define MM81X_HWSCAN_PROBE_DELAY_MS (30)
157
158 /* A margin to account for event/command processing */
159 #define MM81X_HWSCAN_TIMEOUT_OVERHEAD_MS (2000)
160
161 /* Scan channel frequency mask */
162 #define HW_SCAN_CH_LIST_FREQ_KHZ GENMASK(19, 0)
163
164 /*
165 * Scan channel bandwidth mask.
166 * Encoded as: 0 = 1MHz, 1 = 2MHz, 2 = 4MHz, 3 = 8MHz
167 */
168 #define HW_SCAN_CH_LIST_OP_BW GENMASK(21, 20)
169
170 /*
171 * Scan channel primary channel width.
172 * Encoded as: 0 = 1MHz, 1 = 2MHz
173 */
174 #define HW_SCAN_CH_LIST_PRIM_CH_WIDTH BIT(22)
175
176 /* Index into power_list for tx power of channel */
177 #define HW_SCAN_CH_LIST_PWR_LIST_IDX GENMASK(31, 26)
178
179 struct hw_scan_tlv_hdr {
180 __le16 tag;
181 __le16 len;
182 } __packed;
183
184 struct hw_scan_tlv_channel_list {
185 struct hw_scan_tlv_hdr hdr;
186 __le32 channels[];
187 } __packed;
188
189 struct hw_scan_tlv_power_list {
190 struct hw_scan_tlv_hdr hdr;
191 s32 tx_power_qdbm[];
192 } __packed;
193
194 struct hw_scan_tlv_probe_req {
195 struct hw_scan_tlv_hdr hdr;
196 /* Probe request frame template (including SSIDs) */
197 u8 buf[];
198 } __packed;
199
200 struct hw_scan_tlv_dwell_on_home {
201 struct hw_scan_tlv_hdr hdr;
202 /* Time to dwell on home between scan channels */
203 __le32 home_dwell_time_ms;
204 } __packed;
205
206 #define DOT11AH_BA_MAX_MPDU_PER_AMPDU (32)
207
208 /* wiphy scan params */
209 #define MM81X_MAX_SCAN_IE_LEN 512
210 #define MM81X_MAX_SCAN_SSIDS 1
211 #define MM81X_MAX_REMAIN_ON_CHAN_DURATION 10000
212
mm81x_reg_h_cc_equal(const char * cc1,const char * cc2)213 static bool mm81x_reg_h_cc_equal(const char *cc1, const char *cc2)
214 {
215 return (cc1[0] == cc2[0]) && (cc1[1] == cc2[1]);
216 }
217
mm81x_tx_h_pkt_over_rts_threshold(struct mm81x * mors,struct ieee80211_tx_info * info,struct sk_buff * skb)218 static bool mm81x_tx_h_pkt_over_rts_threshold(struct mm81x *mors,
219 struct ieee80211_tx_info *info,
220 struct sk_buff *skb)
221 {
222 u8 ccmp_len;
223
224 if (!info->control.hw_key)
225 return ((skb->len + FCS_LEN) > mors->rts_threshold);
226
227 if (info->control.hw_key->keylen == 32)
228 ccmp_len =
229 IEEE80211_CCMP_256_HDR_LEN + IEEE80211_CCMP_256_MIC_LEN;
230 else if (info->control.hw_key->keylen == 16)
231 ccmp_len = IEEE80211_CCMP_HDR_LEN + IEEE80211_CCMP_MIC_LEN;
232 else
233 ccmp_len = 0;
234
235 return ((skb->len + FCS_LEN + ccmp_len) > mors->rts_threshold);
236 }
237
mm81x_tx_h_ps_filtered_for_sta(struct mm81x * mors,struct sk_buff * skb,struct ieee80211_sta * sta)238 static bool mm81x_tx_h_ps_filtered_for_sta(struct mm81x *mors,
239 struct sk_buff *skb,
240 struct ieee80211_sta *sta)
241 {
242 struct mm81x_sta *mors_sta;
243 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
244
245 if (!sta)
246 return false;
247
248 mors_sta = (struct mm81x_sta *)sta->drv_priv;
249
250 if (!mors_sta->tx_ps_filter_en)
251 return false;
252
253 dev_dbg(mors->dev, "Frame for sta[%pM] PS filtered", mors_sta->addr);
254
255 info->flags |= IEEE80211_TX_STAT_TX_FILTERED;
256 info->flags &= ~IEEE80211_TX_CTL_AMPDU;
257
258 ieee80211_tx_status_skb(mors->hw, skb);
259 return true;
260 }
261
mm81x_mac_check_fw_disabled_chans(struct ieee80211_hw * hw)262 static void mm81x_mac_check_fw_disabled_chans(struct ieee80211_hw *hw)
263 {
264 int ret = 0;
265 u32 i;
266 struct mm81x *mors = hw->priv;
267 struct host_cmd_resp_get_disabled_channels *resp;
268 u32 resp_len = sizeof(struct host_cmd_disabled_channel_entry) *
269 ARRAY_SIZE(mors_s1ghz_channels) +
270 sizeof(*resp);
271
272 resp = kzalloc(resp_len, GFP_KERNEL);
273 if (!resp) {
274 ret = -ENOMEM;
275 goto out;
276 }
277
278 ret = mm81x_cmd_get_disabled_channels(mors, resp, resp_len);
279 if (ret)
280 goto out;
281
282 for (i = 0; i < ARRAY_SIZE(mors_s1ghz_channels); i++) {
283 struct ieee80211_channel *ch = &mors_s1ghz_channels[i];
284
285 if (ch->flags & IEEE80211_CHAN_DISABLED)
286 continue;
287
288 ch->flags &= ~IEEE80211_CHAN_S1G_NO_PRIMARY;
289 }
290
291 for (i = 0; i < le32_to_cpu(resp->n_channels); i++) {
292 struct ieee80211_channel *ch;
293 struct host_cmd_disabled_channel_entry *entry =
294 &resp->channels[i];
295
296 if (entry->bw_mhz != 1)
297 continue;
298
299 ch = ieee80211_get_channel_khz(
300 hw->wiphy,
301 KHZ100_TO_KHZ(le16_to_cpu(entry->freq_100khz)));
302 if (!ch)
303 continue;
304
305 ch->flags |= IEEE80211_CHAN_S1G_NO_PRIMARY;
306 dev_dbg(mors->dev, "set NO_PRIMARY on %u KHz",
307 ieee80211_channel_to_khz(ch));
308 }
309
310 out:
311 if (ret)
312 dev_err(mors->dev, "failed to set disabled primary channels");
313
314 kfree(resp);
315 }
316
mm81x_mac_ops_start(struct ieee80211_hw * hw)317 static int mm81x_mac_ops_start(struct ieee80211_hw *hw)
318 {
319 struct mm81x *mors = hw->priv;
320
321 mors->started = true;
322 return 0;
323 }
324
mm81x_tx_h_get_max_bw(struct mm81x * mors)325 static int mm81x_tx_h_get_max_bw(struct mm81x *mors)
326 {
327 return MM81X_FW_SUPP(&mors->fw_caps, 8MHZ) ? 8 :
328 MM81X_FW_SUPP(&mors->fw_caps, 4MHZ) ? 4 :
329 MM81X_FW_SUPP(&mors->fw_caps, 2MHZ) ? 2 :
330 1;
331 }
332
mm81x_mac_caps_init(struct mm81x * mors)333 static void mm81x_mac_caps_init(struct mm81x *mors)
334 {
335 struct mm81x_fw_caps *fw_caps = &mors->fw_caps;
336 struct ieee80211_sta_s1g_cap *s1g = &mors_band_s1ghz.s1g_cap;
337
338 #define __FW_CAP_N(_n, _cap, _bit) \
339 do { \
340 if (MM81X_FW_SUPP(fw_caps, _cap)) \
341 s1g->cap[_n] |= (_bit); \
342 } while (0)
343
344 #define FW_CAP0(_cap, _bit) __FW_CAP_N(0, _cap, _bit)
345 #define FW_CAP3(_cap, _bit) __FW_CAP_N(3, _cap, _bit)
346 #define FW_CAP5(_cap, _bit) __FW_CAP_N(5, _cap, _bit)
347 #define FW_CAP6(_cap, _bit) __FW_CAP_N(6, _cap, _bit)
348 #define FW_CAP7(_cap, _bit) __FW_CAP_N(7, _cap, _bit)
349 #define FW_CAP8(_cap, _bit) __FW_CAP_N(8, _cap, _bit)
350 #define FW_CAP9(_cap, _bit) __FW_CAP_N(9, _cap, _bit)
351
352 FW_CAP0(S1G_LONG, S1G_CAP0_S1G_LONG);
353
354 s1g->cap[0] |= S1G_CAP0_SGI_1MHZ;
355 if (MM81X_FW_SUPP(fw_caps, SGI)) {
356 FW_CAP0(2MHZ, S1G_CAP0_SGI_2MHZ);
357 FW_CAP0(4MHZ, S1G_CAP0_SGI_4MHZ);
358 FW_CAP0(8MHZ, S1G_CAP0_SGI_8MHZ);
359 }
360
361 if (MM81X_FW_SUPP(fw_caps, 8MHZ))
362 s1g->cap[0] |= S1G_SUPP_CH_WIDTH_8;
363 else if (MM81X_FW_SUPP(fw_caps, 4MHZ))
364 s1g->cap[0] |= S1G_SUPP_CH_WIDTH_4;
365 else if (MM81X_FW_SUPP(fw_caps, 2MHZ))
366 s1g->cap[0] |= S1G_SUPP_CH_WIDTH_2;
367
368 FW_CAP3(RD_RESPONDER, S1G_CAP3_RD_RESPONDER);
369 FW_CAP3(LONG_MPDU, S1G_CAP3_MAX_MPDU_LEN);
370
371 FW_CAP5(AMSDU, S1G_CAP5_AMSDU);
372 FW_CAP5(AMPDU, S1G_CAP5_AMPDU);
373 FW_CAP5(ASYMMETRIC_BA_SUPPORT, S1G_CAP5_ASYMMETRIC_BA);
374 FW_CAP5(FLOW_CONTROL, S1G_CAP5_FLOW_CONTROL);
375
376 FW_CAP6(OBSS_MITIGATION, S1G_CAP6_OBSS_MITIGATION);
377 FW_CAP6(FRAGMENT_BA, S1G_CAP6_FRAGMENT_BA);
378 FW_CAP6(NDP_PSPOLL, S1G_CAP6_NDP_PS_POLL);
379 FW_CAP6(TXOP_SHARING_IMPLICIT_ACK, S1G_CAP6_TXOP_SHARING_IMP_ACK);
380 FW_CAP6(HTC_VHT_MFB, S1G_CAP6_VHT_LINK_ADAPT);
381
382 FW_CAP7(TACK_AS_PSPOLL, S1G_CAP7_TACK_AS_PS_POLL);
383 FW_CAP7(DUPLICATE_1MHZ, S1G_CAP7_DUP_1MHZ);
384 FW_CAP7(MCS_NEGOTIATION, S1G_CAP7_MCS_NEGOTIATION);
385 FW_CAP7(1MHZ_CONTROL_RESPONSE_PREAMBLE,
386 S1G_CAP7_1MHZ_CTL_RESPONSE_PREAMBLE);
387 FW_CAP7(SECTOR_TRAINING, S1G_CAP7_SECTOR_TRAINING_OPERATION);
388 FW_CAP7(TMP_PS_MODE_SWITCH, S1G_CAP7_TEMP_PS_MODE_SWITCH);
389
390 FW_CAP8(BDT, S1G_CAP8_BDT);
391
392 FW_CAP9(LINK_ADAPTATION_WO_NDP_CMAC,
393 S1G_CAP9_LINK_ADAPT_PER_CONTROL_RESPONSE);
394
395 /* 1SS MCS 9 for Rx / Tx map */
396 s1g->nss_mcs[0] = MM81X_NSS_MCS_BYTE_0;
397 s1g->nss_mcs[1] = MM81X_NSS_MCS_BYTE_1;
398 s1g->nss_mcs[2] = MM81X_NSS_MCS_BYTE_2;
399 s1g->nss_mcs[3] = MM81X_NSS_MCS_BYTE_3;
400 s1g->nss_mcs[4] = MM81X_NSS_MCS_BYTE_4;
401
402 #undef FW_CAP0
403 #undef FW_CAP3
404 #undef FW_CAP5
405 #undef FW_CAP6
406 #undef FW_CAP7
407 #undef FW_CAP8
408 #undef FW_CAP9
409 #undef __FW_CAP_N
410 }
411
mm81x_mac_beacon_irq_enable(struct mm81x_vif * mors_vif,bool enable)412 static void mm81x_mac_beacon_irq_enable(struct mm81x_vif *mors_vif, bool enable)
413 {
414 struct mm81x *mors = mm81x_vif_to_mors(mors_vif);
415 u8 beacon_irq_num = MM81X_INT_BEACON_BASE_NUM + mors_vif->id;
416
417 enable ? set_bit(beacon_irq_num, &mors->beacon_irqs_enabled) :
418 clear_bit(beacon_irq_num, &mors->beacon_irqs_enabled);
419
420 mm81x_hw_irq_enable(mors, beacon_irq_num, enable);
421 }
422
mm81x_beacon_h_fill_tx_info(struct mm81x * mors,struct mm81x_skb_tx_info * tx_info,struct mm81x_vif * mors_vif,int tx_bw_mhz)423 static void mm81x_beacon_h_fill_tx_info(struct mm81x *mors,
424 struct mm81x_skb_tx_info *tx_info,
425 struct mm81x_vif *mors_vif,
426 int tx_bw_mhz)
427 {
428 enum dot11_bandwidth bw_idx =
429 mm81x_ratecode_bw_mhz_to_bw_index(tx_bw_mhz);
430 enum mm81x_rate_preamble pream = MM81X_RATE_PREAMBLE_S1G_SHORT;
431
432 tx_info->flags |=
433 cpu_to_le32(MM81X_TX_CONF_FLAGS_VIF_ID_SET(mors_vif->id));
434
435 if (bw_idx == DOT11_BANDWIDTH_1MHZ)
436 pream = MM81X_RATE_PREAMBLE_S1G_1M;
437
438 tx_info->rates[0].count = 1;
439 tx_info->rates[1].count = 0;
440 tx_info->rates[0].mm81x_ratecode =
441 mm81x_ratecode_init(bw_idx, 0, 0, pream);
442
443 if (mors->fw_flags & MM81X_FW_FLAGS_REPORTS_TX_BEACON_COMPLETION)
444 tx_info->flags |=
445 cpu_to_le32(MM81X_TX_CONF_FLAGS_IMMEDIATE_REPORT);
446 }
447
mm81x_mac_beacon_work(struct work_struct * work)448 static void mm81x_mac_beacon_work(struct work_struct *work)
449 {
450 struct mm81x_vif *mors_vif =
451 from_work(mors_vif, work, u.ap.beacon_work);
452 struct mm81x *mors = mm81x_vif_to_mors(mors_vif);
453 struct mm81x_skbq *mq;
454 struct sk_buff *beacon;
455 struct ieee80211_vif *vif = mm81x_vif_to_ieee80211_vif(mors_vif);
456 struct mm81x_skb_tx_info tx_info = { 0 };
457 int num_bcn_vifs = atomic_read(&mors->num_bcn_vifs);
458
459 mq = mm81x_hif_get_tx_beacon_queue(mors);
460 if (!mq) {
461 dev_err(mors->dev, "no matching beacon Q found");
462 return;
463 }
464
465 if (mm81x_skbq_count(mq) >= num_bcn_vifs) {
466 dev_err(mors->dev,
467 "previous beacon not consumed, dropping req [id:%d]",
468 mors_vif->id);
469 return;
470 }
471
472 beacon = ieee80211_beacon_get(mors->hw, vif, false);
473 if (!beacon)
474 return;
475
476 mm81x_beacon_h_fill_tx_info(mors, &tx_info, mors_vif,
477 cfg80211_chandef_s1g_pri_width(&mors->chandef));
478 mm81x_skbq_skb_tx(mq, &beacon, &tx_info, MM81X_SKB_CHAN_BEACON);
479 }
480
mm81x_mac_beacon_irq_handle(struct mm81x * mors,u32 status)481 void mm81x_mac_beacon_irq_handle(struct mm81x *mors, u32 status)
482 {
483 int vif_id;
484 unsigned long masked_status = (status & mors->beacon_irqs_enabled) >>
485 MM81X_INT_BEACON_BASE_NUM;
486
487 guard(rcu)();
488 for_each_set_bit(vif_id, &masked_status, MM81X_MAX_IF) {
489 struct mm81x_vif *mors_vif;
490 struct ieee80211_vif *vif;
491
492 vif = mm81x_rcu_dereference_vif_id(mors, vif_id, true);
493 if (vif) {
494 mors_vif = ieee80211_vif_to_mors_vif(vif);
495 queue_work(system_bh_wq, &mors_vif->u.ap.beacon_work);
496 }
497 }
498 }
499
mm81x_mac_beacon_init(struct mm81x_vif * mors_vif)500 static void mm81x_mac_beacon_init(struct mm81x_vif *mors_vif)
501 {
502 struct mm81x *mors = mm81x_vif_to_mors(mors_vif);
503
504 INIT_WORK(&mors_vif->u.ap.beacon_work, mm81x_mac_beacon_work);
505 mm81x_mac_beacon_irq_enable(mors_vif, true);
506 atomic_inc(&mors->num_bcn_vifs);
507 }
508
mm81x_hw_scan_h_pack_tlv_hdr(u16 tag,u16 len)509 static struct hw_scan_tlv_hdr mm81x_hw_scan_h_pack_tlv_hdr(u16 tag, u16 len)
510 {
511 struct hw_scan_tlv_hdr hdr = { .tag = cpu_to_le16(tag),
512 .len = cpu_to_le16(len) };
513 return hdr;
514 }
515
mm81x_hw_scan_h_pack_channel(struct ieee80211_channel * chan,u8 pwr_idx)516 static __le32 mm81x_hw_scan_h_pack_channel(struct ieee80211_channel *chan,
517 u8 pwr_idx)
518 {
519 __le32 packed = 0;
520 u32 freq_khz = ieee80211_channel_to_khz(chan);
521
522 packed |= le32_encode_bits(freq_khz, HW_SCAN_CH_LIST_FREQ_KHZ);
523 packed |= le32_encode_bits(mm81x_ratecode_bw_mhz_to_bw_index(1),
524 HW_SCAN_CH_LIST_OP_BW);
525 packed |= le32_encode_bits(mm81x_ratecode_bw_mhz_to_bw_index(1),
526 HW_SCAN_CH_LIST_PRIM_CH_WIDTH);
527 packed |= le32_encode_bits(pwr_idx, HW_SCAN_CH_LIST_PWR_LIST_IDX);
528
529 return packed;
530 }
531
532 static u8 *
mm81x_hw_scan_h_add_channel_list_tlv(u8 * buf,struct mm81x_hw_scan_params * params)533 mm81x_hw_scan_h_add_channel_list_tlv(u8 *buf,
534 struct mm81x_hw_scan_params *params)
535 {
536 int i;
537 struct hw_scan_tlv_channel_list *ch_list =
538 (struct hw_scan_tlv_channel_list *)buf;
539
540 ch_list->hdr = mm81x_hw_scan_h_pack_tlv_hdr(
541 HOST_CMD_HW_SCAN_TLV_TAG_CHAN_LIST,
542 params->num_chans * sizeof(ch_list->channels[0]));
543
544 for (i = 0; i < params->num_chans; i++) {
545 struct ieee80211_channel *chan = params->channels[i].channel;
546
547 ch_list->channels[i] = mm81x_hw_scan_h_pack_channel(
548 chan, params->channels[i].power_idx);
549 }
550
551 return (u8 *)&ch_list->channels[i];
552 }
553
554 static u8 *
mm81x_hw_scan_h_add_power_list_tlv(u8 * buf,struct mm81x_hw_scan_params * params)555 mm81x_hw_scan_h_add_power_list_tlv(u8 *buf, struct mm81x_hw_scan_params *params)
556 {
557 int i;
558 struct hw_scan_tlv_power_list *pwr_list =
559 (struct hw_scan_tlv_power_list *)buf;
560 size_t size = sizeof(pwr_list->tx_power_qdbm[0]) * params->n_powers;
561
562 pwr_list->hdr = mm81x_hw_scan_h_pack_tlv_hdr(
563 HOST_CMD_HW_SCAN_TLV_TAG_POWER_LIST, size);
564
565 for (i = 0; i < params->n_powers; i++)
566 pwr_list->tx_power_qdbm[i] = params->powers_qdbm[i];
567
568 return (u8 *)&pwr_list->tx_power_qdbm[i];
569 }
570
571 static u8 *
mm81x_hw_scan_h_add_probe_req_tlv(u8 * buf,struct mm81x_hw_scan_params * params)572 mm81x_hw_scan_h_add_probe_req_tlv(u8 *buf, struct mm81x_hw_scan_params *params)
573 {
574 struct sk_buff *skb = params->probe_req;
575 struct hw_scan_tlv_probe_req *probe_req =
576 (struct hw_scan_tlv_probe_req *)buf;
577
578 probe_req->hdr = mm81x_hw_scan_h_pack_tlv_hdr(
579 HOST_CMD_HW_SCAN_TLV_TAG_PROBE_REQ, skb->len);
580 memcpy(probe_req->buf, skb->data, skb->len);
581
582 return buf + sizeof(*probe_req) + skb->len;
583 }
584
585 static u8 *
mm81x_hw_scan_h_insert_dwell_time_tlv(u8 * buf,struct mm81x_hw_scan_params * params)586 mm81x_hw_scan_h_insert_dwell_time_tlv(u8 *buf,
587 struct mm81x_hw_scan_params *params)
588 {
589 struct hw_scan_tlv_dwell_on_home *dwell =
590 (struct hw_scan_tlv_dwell_on_home *)buf;
591
592 dwell->hdr = mm81x_hw_scan_h_pack_tlv_hdr(
593 HOST_CMD_HW_SCAN_TLV_TAG_DWELL_ON_HOME,
594 sizeof(*dwell) - sizeof(dwell->hdr));
595 dwell->home_dwell_time_ms = cpu_to_le32(params->dwell_on_home_ms);
596
597 return buf + sizeof(*dwell);
598 }
599
__mm81x_hw_scan_h_init_probe_req(struct mm81x_hw_scan_params * params,u8 * ssid,u8 ssid_len,struct ieee80211_scan_ies * ies)600 static int __mm81x_hw_scan_h_init_probe_req(struct mm81x_hw_scan_params *params,
601 u8 *ssid, u8 ssid_len,
602 struct ieee80211_scan_ies *ies)
603 {
604 u8 *pos;
605 struct sk_buff *probe_req;
606 struct ieee80211_tx_info *info;
607 u16 ies_len = ies->len[NL80211_BAND_S1GHZ] + ies->common_ie_len;
608
609 probe_req = ieee80211_probereq_get(params->hw, params->vif->addr, ssid,
610 ssid_len, ies_len);
611 if (!probe_req)
612 return -ENOMEM;
613
614 pos = skb_put(probe_req, ies_len);
615 memcpy(pos, ies->common_ies, ies->common_ie_len);
616 pos += ies->common_ie_len;
617 memcpy(pos, ies->ies[NL80211_BAND_S1GHZ], ies->len[NL80211_BAND_S1GHZ]);
618
619 info = IEEE80211_SKB_CB(probe_req);
620 info->control.vif = params->vif;
621 params->probe_req = probe_req;
622
623 return 0;
624 }
625
mm81x_hw_scan_h_init_ssid(struct mm81x * mors,struct cfg80211_ssid * ssids,int n_ssids,u8 ** out_ssid,u8 * out_ssid_len)626 static void mm81x_hw_scan_h_init_ssid(struct mm81x *mors,
627 struct cfg80211_ssid *ssids, int n_ssids,
628 u8 **out_ssid, u8 *out_ssid_len)
629 {
630 *out_ssid = NULL;
631 *out_ssid_len = 0;
632
633 if (n_ssids > 0) {
634 if (n_ssids > 1) {
635 dev_warn(
636 mors->dev,
637 "Multiple SSIDs found when only one supported. Using the first only.");
638 }
639 *out_ssid_len = ssids[0].ssid_len;
640 *out_ssid = ssids[0].ssid;
641 }
642 }
643
644 static int
mm81x_hw_scan_h_init_probe_req(struct mm81x_hw_scan_params * params,struct ieee80211_scan_request * scan_req)645 mm81x_hw_scan_h_init_probe_req(struct mm81x_hw_scan_params *params,
646 struct ieee80211_scan_request *scan_req)
647 {
648 struct mm81x *mors = params->hw->priv;
649 struct cfg80211_scan_request *req = &scan_req->req;
650 struct ieee80211_scan_ies *ies = &scan_req->ies;
651 u8 ssid_len = 0;
652 u8 *ssid = NULL;
653
654 mm81x_hw_scan_h_init_ssid(mors, req->ssids, req->n_ssids, &ssid,
655 &ssid_len);
656
657 return __mm81x_hw_scan_h_init_probe_req(params, ssid, ssid_len, ies);
658 }
659
660 static bool
mm81x_hw_scan_h_is_chan_present(const struct mm81x_hw_scan_params * params,const struct ieee80211_channel * chan)661 mm81x_hw_scan_h_is_chan_present(const struct mm81x_hw_scan_params *params,
662 const struct ieee80211_channel *chan)
663 {
664 int channel;
665
666 for (channel = 0; channel < params->num_chans; channel++) {
667 if (params->channels[channel].channel == chan)
668 return true;
669 }
670
671 return false;
672 }
673
mm81x_hw_scan_h_insert_chan(struct mm81x_hw_scan_params * params,struct ieee80211_channel * chan)674 static int mm81x_hw_scan_h_insert_chan(struct mm81x_hw_scan_params *params,
675 struct ieee80211_channel *chan)
676 {
677 if (!params->channels)
678 return -EFAULT;
679
680 if (!chan)
681 return -EFAULT;
682
683 if (params->num_chans >= params->allocated_chans)
684 return -ENOMEM;
685
686 if (mm81x_hw_scan_h_is_chan_present(params, chan))
687 return 0;
688
689 params->channels[params->num_chans].channel = chan;
690 params->num_chans++;
691 return 0;
692 }
693
mm81x_hw_scan_h_init_chan_list(struct mm81x_hw_scan_params * params,struct ieee80211_channel ** chans,u32 n_channels)694 static int mm81x_hw_scan_h_init_chan_list(struct mm81x_hw_scan_params *params,
695 struct ieee80211_channel **chans,
696 u32 n_channels)
697 {
698 int i, j;
699 int num_pwrs_coarse = 0;
700 int last_pwr = INT_MIN;
701 int chans_to_allocate = 0;
702
703 for (i = 0; i < n_channels; i++)
704 if (chans[i])
705 chans_to_allocate++;
706
707 params->num_chans = 0;
708 params->allocated_chans = 0;
709 params->channels = kzalloc_objs(*params->channels, chans_to_allocate);
710 if (!params->channels)
711 return -ENOMEM;
712
713 params->allocated_chans = chans_to_allocate;
714
715 for (i = 0; i < n_channels; i++)
716 if (chans[i])
717 mm81x_hw_scan_h_insert_chan(params, chans[i]);
718
719 /*
720 * Calculate a rough estimate of number of different channel
721 * powers required
722 */
723 for (i = 0; i < params->num_chans; i++) {
724 if (chans[i]->max_reg_power != last_pwr) {
725 last_pwr = chans[i]->max_reg_power;
726 num_pwrs_coarse++;
727 }
728 }
729
730 params->powers_qdbm = kmalloc_objs(*params->powers_qdbm,
731 num_pwrs_coarse);
732 if (!params->powers_qdbm)
733 return -ENOMEM;
734
735 params->n_powers = 0;
736
737 for (i = 0; i < params->num_chans; i++) {
738 s32 power_qdbm =
739 MBM_TO_QDBM(DBM_TO_MBM(chans[i]->max_reg_power));
740
741 /* Try and find the power in the list */
742 for (j = 0; j < params->n_powers; j++)
743 if (params->powers_qdbm[j] == power_qdbm)
744 break;
745
746 /* Reached the end of the list - add the new power option */
747 if (j == params->n_powers) {
748 params->powers_qdbm[j] = power_qdbm;
749 params->n_powers++;
750 if (params->n_powers > num_pwrs_coarse) {
751 WARN_ON(1);
752 return -EFAULT;
753 }
754 }
755
756 /* Give the index of the power level to the channel */
757 params->channels[i].power_idx = j;
758 }
759 return 0;
760 }
761
mm81x_hw_scan_h_clean_params(struct mm81x_hw_scan_params * params)762 static void mm81x_hw_scan_h_clean_params(struct mm81x_hw_scan_params *params)
763 {
764 if (params->probe_req)
765 dev_kfree_skb_any(params->probe_req);
766 kfree(params->channels);
767 kfree(params->powers_qdbm);
768
769 params->num_chans = 0;
770 params->allocated_chans = 0;
771 }
772
mm81x_hw_scan_h_get_cmd_size(struct mm81x_hw_scan_params * params)773 size_t mm81x_hw_scan_h_get_cmd_size(struct mm81x_hw_scan_params *params)
774 {
775 struct hw_scan_tlv_channel_list *ch_list;
776 struct hw_scan_tlv_power_list *pwr_list;
777 struct hw_scan_tlv_probe_req *probe_req;
778 struct hw_scan_tlv_dwell_on_home *dwell;
779 struct host_cmd_req_hw_scan *req;
780 size_t cmd_size = sizeof(*req);
781
782 /* No TLVs if simple abort command */
783 if (params->operation != MM81X_HW_SCAN_OP_START)
784 return cmd_size;
785
786 cmd_size += struct_size(ch_list, channels, params->num_chans);
787 cmd_size += struct_size(pwr_list, tx_power_qdbm, params->n_powers);
788
789 if (params->probe_req)
790 cmd_size += struct_size(probe_req, buf, params->probe_req->len);
791 if (params->dwell_on_home_ms)
792 cmd_size += sizeof(*dwell);
793
794 return cmd_size;
795 }
796
mm81x_hw_scan_h_insert_tlvs(struct mm81x_hw_scan_params * params,u8 * buf)797 u8 *mm81x_hw_scan_h_insert_tlvs(struct mm81x_hw_scan_params *params, u8 *buf)
798 {
799 buf = mm81x_hw_scan_h_add_channel_list_tlv(buf, params);
800 buf = mm81x_hw_scan_h_add_power_list_tlv(buf, params);
801
802 if (params->dwell_on_home_ms)
803 buf = mm81x_hw_scan_h_insert_dwell_time_tlv(buf, params);
804 if (params->probe_req)
805 buf = mm81x_hw_scan_h_add_probe_req_tlv(buf, params);
806
807 return buf;
808 }
809
mm81x_hw_scan_h_get_dwell_on_home(struct mm81x * mors,struct ieee80211_vif * vif)810 static u32 mm81x_hw_scan_h_get_dwell_on_home(struct mm81x *mors,
811 struct ieee80211_vif *vif)
812 {
813 if (vif->type == NL80211_IFTYPE_STATION && vif->cfg.assoc)
814 return mors->hw_scan.home_dwell_ms;
815 return 0;
816 }
817
818 static struct mm81x_hw_scan_params *
__mm81x_hw_scan_h_init_params(struct mm81x * mors)819 __mm81x_hw_scan_h_init_params(struct mm81x *mors)
820 {
821 struct mm81x_hw_scan_params *params = mors->hw_scan.params;
822
823 if (!params) {
824 params = kzalloc_obj(*params);
825 if (params)
826 mors->hw_scan.params = params;
827 } else {
828 mm81x_hw_scan_h_clean_params(params);
829 memset(params, 0, sizeof(*params));
830 }
831
832 return params;
833 }
834
mm81x_hw_scan_h_init_params(struct mm81x * mors,struct ieee80211_hw * hw,struct ieee80211_vif * vif,struct cfg80211_scan_request * req)835 static int mm81x_hw_scan_h_init_params(struct mm81x *mors,
836 struct ieee80211_hw *hw,
837 struct ieee80211_vif *vif,
838 struct cfg80211_scan_request *req)
839 {
840 struct mm81x_hw_scan_params *params = mors->hw_scan.params;
841
842 params = __mm81x_hw_scan_h_init_params(mors);
843 if (!params) {
844 mors->hw_scan.state = HW_SCAN_STATE_IDLE;
845 return -ENOMEM;
846 }
847
848 params->hw = hw;
849 params->vif = vif;
850 params->has_directed_ssid = (req->ssids && req->ssids[0].ssid_len > 0);
851 params->operation = MM81X_HW_SCAN_OP_START;
852 params->dwell_on_home_ms = mm81x_hw_scan_h_get_dwell_on_home(mors, vif);
853
854 if (req->duration)
855 params->dwell_time_ms = MM81X_TU_TO_MS(req->duration);
856 else if (req->n_ssids == 0)
857 params->dwell_time_ms =
858 MM81X_HWSCAN_DEFAULT_PASSIVE_DWELL_TIME_MS;
859 else
860 params->dwell_time_ms = MM81X_HWSCAN_DEFAULT_DWELL_TIME_MS;
861
862 return 0;
863 }
864
mm81x_hw_scan_h_calc_timeout(struct mm81x_hw_scan_params * params)865 static u32 mm81x_hw_scan_h_calc_timeout(struct mm81x_hw_scan_params *params)
866 {
867 u32 ret = 0;
868
869 ret = params->dwell_time_ms + params->dwell_on_home_ms;
870 if (params->probe_req)
871 ret += MM81X_HWSCAN_PROBE_DELAY_MS;
872
873 ret *= params->num_chans;
874 ret += MM81X_HWSCAN_TIMEOUT_OVERHEAD_MS;
875
876 return ret;
877 }
878
mm81x_mac_ops_hw_scan(struct ieee80211_hw * hw,struct ieee80211_vif * vif,struct ieee80211_scan_request * hw_req)879 static int mm81x_mac_ops_hw_scan(struct ieee80211_hw *hw,
880 struct ieee80211_vif *vif,
881 struct ieee80211_scan_request *hw_req)
882 {
883 int ret = 0;
884 struct mm81x *mors = hw->priv;
885 struct cfg80211_scan_request *req = &hw_req->req;
886 struct mm81x_hw_scan_params *params;
887 struct ieee80211_channel **chans = hw_req->req.channels;
888
889 dev_dbg(mors->dev, "state %d", mors->hw_scan.state);
890
891 if (!mors->started) {
892 dev_warn(mors->dev, "device not ready");
893 ret = -ENODEV;
894 goto exit;
895 }
896
897 switch (mors->hw_scan.state) {
898 case HW_SCAN_STATE_IDLE:
899 mors->hw_scan.state = HW_SCAN_STATE_RUNNING;
900 reinit_completion(&mors->hw_scan.scan_done);
901 break;
902 case HW_SCAN_STATE_RUNNING:
903 case HW_SCAN_STATE_ABORTING:
904 ret = -EBUSY;
905 goto exit;
906 }
907
908 ret = mm81x_hw_scan_h_init_params(mors, hw, vif, req);
909 if (ret)
910 goto exit;
911
912 params = mors->hw_scan.params;
913
914 ret = mm81x_hw_scan_h_init_chan_list(params, chans,
915 hw_req->req.n_channels);
916 if (ret)
917 goto exit;
918
919 /* Only init the probe request template if this is an active scan */
920 if (req->n_ssids > 0) {
921 ret = mm81x_hw_scan_h_init_probe_req(params, hw_req);
922 if (ret) {
923 dev_err(mors->dev, "Failed to init probe req %d", ret);
924 goto exit;
925 }
926 }
927
928 ret = mm81x_cmd_hw_scan(mors, params, false);
929 if (ret) {
930 mors->hw_scan.state = HW_SCAN_STATE_IDLE;
931 goto exit;
932 }
933
934 ieee80211_queue_delayed_work(
935 mors->hw, &mors->hw_scan.timeout,
936 msecs_to_jiffies(mm81x_hw_scan_h_calc_timeout(params)));
937 exit:
938 return ret;
939 }
940
mm81x_hw_scan_abort(struct mm81x * mors)941 static void mm81x_hw_scan_abort(struct mm81x *mors)
942 {
943 int ret;
944 struct mm81x_hw_scan_params params = { 0 };
945
946 switch (mors->hw_scan.state) {
947 case HW_SCAN_STATE_IDLE:
948 case HW_SCAN_STATE_ABORTING:
949 /* scan not running */
950 return;
951 case HW_SCAN_STATE_RUNNING:
952 mors->hw_scan.state = HW_SCAN_STATE_ABORTING;
953 break;
954 }
955
956 params.operation = MM81X_HW_SCAN_OP_STOP;
957
958 ret = mm81x_cmd_hw_scan(mors, ¶ms, false);
959
960 if (ret || !mors->started ||
961 !wait_for_completion_timeout(&mors->hw_scan.scan_done, 1 * HZ)) {
962 /*
963 * We may have lost the event on the bus, the chip could be
964 * wedged, or the cmd failed for another reason. Nevertheless,
965 * we should call the done event so mac80211 knows to unblock
966 * itself.
967 */
968 struct cfg80211_scan_info info = { .aborted = true };
969
970 ieee80211_scan_completed(mors->hw, &info);
971 mors->hw_scan.state = HW_SCAN_STATE_IDLE;
972 }
973 }
974
mm81x_mac_ops_cancel_hw_scan(struct ieee80211_hw * hw,struct ieee80211_vif * vif)975 static void mm81x_mac_ops_cancel_hw_scan(struct ieee80211_hw *hw,
976 struct ieee80211_vif *vif)
977 {
978 struct mm81x *mors = hw->priv;
979
980 cancel_delayed_work_sync(&mors->hw_scan.timeout);
981 mm81x_hw_scan_abort(mors);
982 }
983
mm81x_mac_hw_scan_done_event(struct ieee80211_hw * hw)984 static void mm81x_mac_hw_scan_done_event(struct ieee80211_hw *hw)
985 {
986 struct mm81x *mors = hw->priv;
987 struct cfg80211_scan_info info = { 0 };
988
989 dev_dbg(mors->dev, "completing hw scan");
990
991 switch (mors->hw_scan.state) {
992 case HW_SCAN_STATE_IDLE:
993 /* Scan has already been stopped. Just continue */
994 goto exit;
995 case HW_SCAN_STATE_RUNNING:
996 case HW_SCAN_STATE_ABORTING:
997 info.aborted = (mors->hw_scan.state == HW_SCAN_STATE_ABORTING);
998 mors->hw_scan.state = HW_SCAN_STATE_IDLE;
999 }
1000
1001 ieee80211_scan_completed(mors->hw, &info);
1002 exit:
1003 complete(&mors->hw_scan.scan_done);
1004 cancel_delayed_work_sync(&mors->hw_scan.timeout);
1005 }
1006
mm81x_mac_hw_scan_timeout_work(struct work_struct * work)1007 static void mm81x_mac_hw_scan_timeout_work(struct work_struct *work)
1008 {
1009 struct mm81x *mors =
1010 container_of(work, struct mm81x, hw_scan.timeout.work);
1011
1012 dev_err(mors->dev, "hw scan timed out, aborting");
1013 mm81x_hw_scan_abort(mors);
1014 }
1015
mm81x_mac_hw_scan_init(struct mm81x * mors)1016 static void mm81x_mac_hw_scan_init(struct mm81x *mors)
1017 {
1018 mors->hw_scan.state = HW_SCAN_STATE_IDLE;
1019 mors->hw_scan.params = NULL;
1020 mors->hw_scan.home_dwell_ms = MM81X_HWSCAN_DEFAULT_DWELL_ON_HOME_MS;
1021
1022 init_completion(&mors->hw_scan.scan_done);
1023 INIT_DELAYED_WORK(&mors->hw_scan.timeout,
1024 mm81x_mac_hw_scan_timeout_work);
1025 }
1026
mm81x_mac_hw_scan_destroy(struct mm81x * mors)1027 static void mm81x_mac_hw_scan_destroy(struct mm81x *mors)
1028 {
1029 cancel_delayed_work_sync(&mors->hw_scan.timeout);
1030 if (mors->hw_scan.params)
1031 mm81x_hw_scan_h_clean_params(mors->hw_scan.params);
1032 kfree(mors->hw_scan.params);
1033 mors->hw_scan.params = NULL;
1034 }
1035
mm81x_mac_hw_scan_finish(struct mm81x * mors)1036 static void mm81x_mac_hw_scan_finish(struct mm81x *mors)
1037 {
1038 struct cfg80211_scan_info info = {
1039 .aborted = true,
1040 };
1041
1042 if (mors->hw_scan.state == HW_SCAN_STATE_IDLE)
1043 return;
1044
1045 ieee80211_scan_completed(mors->hw, &info);
1046 complete(&mors->hw_scan.scan_done);
1047 mors->hw_scan.state = HW_SCAN_STATE_IDLE;
1048 cancel_delayed_work_sync(&mors->hw_scan.timeout);
1049 }
1050
mm81x_mac_event_recv(struct mm81x * mors,struct sk_buff * skb)1051 int mm81x_mac_event_recv(struct mm81x *mors, struct sk_buff *skb)
1052 {
1053 struct host_cmd_event *event = (struct host_cmd_event *)(skb->data);
1054 u16 event_id = le16_to_cpu(event->hdr.message_id);
1055 u16 event_iid = le16_to_cpu(event->hdr.host_id);
1056 u16 vif_id = le16_to_cpu(event->hdr.vif_id);
1057 struct ieee80211_vif *vif;
1058
1059 if (!HOST_CMD_IS_EVT(event) || event_iid != 0)
1060 return -EINVAL;
1061
1062 switch (event_id) {
1063 case HOST_CMD_ID_EVT_HW_SCAN_DONE:
1064 dev_dbg(mors->dev,
1065 "Event: HOST_CMD_ID_EVT_HW_SCAN_DONE Received.");
1066 mm81x_mac_hw_scan_done_event(mors->hw);
1067 break;
1068 case HOST_CMD_ID_EVT_BEACON_LOSS:
1069 dev_dbg(mors->dev,
1070 "Event: HOST_CMD_ID_EVT_BEACON_LOSS Received");
1071 scoped_guard(rcu) {
1072 vif = mm81x_rcu_dereference_vif_id(mors, vif_id, true);
1073 if (vif)
1074 ieee80211_beacon_loss(vif);
1075 }
1076 break;
1077 default:
1078 break;
1079 }
1080
1081 return 0;
1082 }
1083
mm81x_tx_h_apply_mcs10(struct mm81x * mors,struct mm81x_skb_tx_info * tx_info)1084 static void mm81x_tx_h_apply_mcs10(struct mm81x *mors,
1085 struct mm81x_skb_tx_info *tx_info)
1086 {
1087 u8 i;
1088 u8 j;
1089 int mcs0_first_idx = -1;
1090 int mcs0_last_idx = -1;
1091
1092 /* Find out where our first and last MCS0 entries are. */
1093 for (i = 0; i < IEEE80211_TX_MAX_RATES; i++) {
1094 enum dot11_bandwidth bw_idx = mm81x_ratecode_bw_index_get(
1095 tx_info->rates[i].mm81x_ratecode);
1096
1097 if (bw_idx == DOT11_BANDWIDTH_1MHZ) {
1098 mcs0_last_idx = i;
1099 if (mcs0_first_idx == -1)
1100 mcs0_first_idx = i;
1101 }
1102
1103 /*
1104 * If the count is 0 then we are at the end of the table.
1105 * Break to allow us to reuse i indicating the end of the
1106 * table.
1107 */
1108 if (tx_info->rates[i].count == 0)
1109 break;
1110 }
1111
1112 /* If there aren't any MCS0 (at 1MHz) entries we are done. */
1113 if (mcs0_first_idx < 0)
1114 return;
1115
1116 /*
1117 * If we are in MCS10_MODE_AUTO add MCS10 counts to the table if they
1118 * will fit. There should be three cases:
1119 *
1120 * - There is one MSC0 entry and the table is full -> do nothing
1121 * - There is one MSC0 entry and the table has space -> adjust MSC0
1122 * down and add MCS 10
1123 * - There are multiple MCS0 entries -> replace entries after the first
1124 * with MCS 10
1125 */
1126 /* Case 3 - replace additional entries. */
1127 if (mcs0_last_idx > mcs0_first_idx) {
1128 for (j = mcs0_first_idx + 1; j < i; j++) {
1129 enum dot11_bandwidth bw_idx =
1130 mm81x_ratecode_bw_index_get(
1131 tx_info->rates[j].mm81x_ratecode);
1132 u8 mcs_index = mm81x_ratecode_mcs_index_get(
1133 tx_info->rates[j].mm81x_ratecode);
1134 if (mcs_index == 0 && bw_idx == DOT11_BANDWIDTH_1MHZ) {
1135 mm81x_ratecode_mcs_index_set(
1136 &tx_info->rates[j].mm81x_ratecode, 10);
1137 }
1138 }
1139 /* Case 2 - add additional MCS10 entry. */
1140 } else if (mcs0_last_idx == mcs0_first_idx &&
1141 i < (IEEE80211_TX_MAX_RATES)) {
1142 int pre_mcs10_mcs0_count =
1143 min_t(u8, tx_info->rates[mcs0_last_idx].count,
1144 MCS0_BEFORE_MCS10_COUNT);
1145 int mcs10_count = tx_info->rates[mcs0_last_idx].count -
1146 pre_mcs10_mcs0_count;
1147
1148 /*
1149 * If there were less retries than our desired minimum MCS0 we
1150 * don't add MCS10 retries.
1151 */
1152 if (mcs10_count > 0) {
1153 /* Use the same flags for MCS10 as MCS0. */
1154 tx_info->rates[i].mm81x_ratecode =
1155 tx_info->rates[mcs0_last_idx].mm81x_ratecode;
1156 mm81x_ratecode_mcs_index_set(
1157 &tx_info->rates[i].mm81x_ratecode, 10);
1158 tx_info->rates[mcs0_last_idx].count =
1159 pre_mcs10_mcs0_count;
1160 tx_info->rates[i].count = mcs10_count;
1161 }
1162 }
1163 }
1164
mm81x_tx_h_check_aggr(struct ieee80211_sta * pubsta,struct sk_buff * skb)1165 void mm81x_tx_h_check_aggr(struct ieee80211_sta *pubsta, struct sk_buff *skb)
1166 {
1167 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
1168 struct mm81x_sta *mors_sta = (struct mm81x_sta *)pubsta->drv_priv;
1169 u8 tid = ieee80211_get_tid(hdr);
1170
1171 /* we are already aggregating */
1172 if (mors_sta->tid_tx[tid] || mors_sta->tid_start_tx[tid])
1173 return;
1174
1175 if (mors_sta->state < IEEE80211_STA_AUTHORIZED)
1176 return;
1177
1178 if (skb_get_queue_mapping(skb) == IEEE80211_AC_VO)
1179 return;
1180
1181 if (unlikely(!ieee80211_is_data_qos(hdr->frame_control)))
1182 return;
1183
1184 if (unlikely(skb->protocol == cpu_to_be16(ETH_P_PAE)))
1185 return;
1186
1187 mors_sta->tid_start_tx[tid] = true;
1188 ieee80211_start_tx_ba_session(pubsta, tid, 0);
1189 }
1190
mm81x_tx_h_get_attempts(struct mm81x * mors,struct mm81x_skb_tx_status * tx_sts)1191 int mm81x_tx_h_get_attempts(struct mm81x *mors,
1192 struct mm81x_skb_tx_status *tx_sts)
1193 {
1194 int attempts = 0;
1195 int i;
1196 int count = min_t(int, MM81X_SKB_MAX_RATES, IEEE80211_TX_MAX_RATES);
1197
1198 for (i = 0; i < count; i++) {
1199 if (tx_sts->rates[i].count > 0)
1200 attempts += tx_sts->rates[i].count;
1201 else
1202 break;
1203 }
1204
1205 return attempts;
1206 }
1207
mm81x_tx_h_fill_info(struct mm81x * mors,struct mm81x_skb_tx_info * tx_info,struct sk_buff * skb,struct ieee80211_vif * vif,int tx_bw_mhz,struct ieee80211_sta * sta)1208 static void mm81x_tx_h_fill_info(struct mm81x *mors,
1209 struct mm81x_skb_tx_info *tx_info,
1210 struct sk_buff *skb, struct ieee80211_vif *vif,
1211 int tx_bw_mhz, struct ieee80211_sta *sta)
1212 {
1213 int i;
1214 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
1215 struct mm81x_vif *mors_vif = ieee80211_vif_to_mors_vif(vif);
1216 struct mm81x_sta *mors_sta = NULL;
1217 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
1218 int op_bw_mhz = cfg80211_chandef_get_width(&mors->chandef);
1219 u8 tid = skb->priority & IEEE80211_QOS_CTL_TAG1D_MASK;
1220 bool rts_allowed = op_bw_mhz < 8;
1221
1222 if (sta)
1223 mors_sta = (struct mm81x_sta *)sta->drv_priv;
1224
1225 rts_allowed &= mm81x_tx_h_pkt_over_rts_threshold(mors, info, skb);
1226
1227 mm81x_rc_sta_fill_tx_rates(mors, tx_info, skb, sta, tx_bw_mhz,
1228 rts_allowed);
1229
1230 for (i = 0; i < IEEE80211_TX_MAX_RATES; i++) {
1231 if (rts_allowed)
1232 mm81x_ratecode_enable_rts(
1233 &tx_info->rates[i].mm81x_ratecode);
1234
1235 if (info->control.rates[i].flags & IEEE80211_TX_RC_SHORT_GI)
1236 mm81x_ratecode_enable_sgi(
1237 &tx_info->rates[i].mm81x_ratecode);
1238 }
1239
1240 /* Apply change of MCS0 to MCS10 if required. */
1241 mm81x_tx_h_apply_mcs10(mors, tx_info);
1242
1243 tx_info->flags |=
1244 cpu_to_le32(MM81X_TX_CONF_FLAGS_VIF_ID_SET(mors_vif->id));
1245
1246 if (info->flags & IEEE80211_TX_CTL_AMPDU)
1247 tx_info->flags |= cpu_to_le32(MM81X_TX_CONF_FLAGS_CTL_AMPDU);
1248
1249 if (info->flags & IEEE80211_TX_CTL_SEND_AFTER_DTIM)
1250 tx_info->flags |=
1251 cpu_to_le32(MM81X_TX_CONF_FLAGS_SEND_AFTER_DTIM);
1252
1253 if (info->flags & IEEE80211_TX_CTL_NO_PS_BUFFER) {
1254 tx_info->flags |= cpu_to_le32(MM81X_TX_CONF_NO_PS_BUFFER);
1255
1256 if (info->flags & IEEE80211_TX_STATUS_EOSP)
1257 tx_info->flags |= cpu_to_le32(
1258 MM81X_TX_CONF_FLAGS_IMMEDIATE_REPORT);
1259 } else if (ieee80211_is_mgmt(hdr->frame_control) &&
1260 !ieee80211_is_bufferable_mmpdu(skb)) {
1261 tx_info->flags |= cpu_to_le32(MM81X_TX_CONF_NO_PS_BUFFER);
1262 }
1263
1264 if (info->control.hw_key) {
1265 tx_info->flags |= cpu_to_le32(MM81X_TX_CONF_FLAGS_HW_ENCRYPT);
1266 tx_info->flags |= cpu_to_le32(MM81X_TX_CONF_FLAGS_KEY_IDX_SET(
1267 info->control.hw_key->hw_key_idx));
1268 }
1269
1270 tx_info->tid = tid;
1271 if (mors_sta) {
1272 tx_info->tid_params = mors_sta->tid_params[tid];
1273
1274 if (info->flags & IEEE80211_TX_CTL_CLEAR_PS_FILT) {
1275 if (mors_sta->tx_ps_filter_en)
1276 dev_dbg(mors->dev,
1277 "TX ps filter cleared sta[%pM]",
1278 mors_sta->addr);
1279 mors_sta->tx_ps_filter_en = false;
1280 }
1281 }
1282 }
1283
mm81x_mac_ops_tx(struct ieee80211_hw * hw,struct ieee80211_tx_control * control,struct sk_buff * skb)1284 static void mm81x_mac_ops_tx(struct ieee80211_hw *hw,
1285 struct ieee80211_tx_control *control,
1286 struct sk_buff *skb)
1287 {
1288 struct mm81x *mors = hw->priv;
1289 struct mm81x_skbq *mq = NULL;
1290 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
1291 struct ieee80211_vif *vif = info->control.vif;
1292 struct mm81x_skb_tx_info tx_info = { 0 };
1293 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
1294 bool is_mgmt = ieee80211_is_mgmt(hdr->frame_control);
1295 int tx_bw_mhz = cfg80211_chandef_get_width(&mors->chandef);
1296 struct ieee80211_sta *sta = control->sta;
1297 int max_tx_bw = 0, sta_max_bw_mhz = 0;
1298
1299 if (sta) {
1300 struct mm81x_sta *mors_sta = (struct mm81x_sta *)sta->drv_priv;
1301
1302 sta_max_bw_mhz = mors_sta->max_bw_mhz;
1303 }
1304
1305 max_tx_bw = mm81x_tx_h_get_max_bw(mors);
1306 tx_bw_mhz = min(max_tx_bw, tx_bw_mhz);
1307
1308 if (is_mgmt)
1309 tx_bw_mhz = cfg80211_chandef_s1g_pri_width(&mors->chandef);
1310 if (sta_max_bw_mhz)
1311 tx_bw_mhz = min(tx_bw_mhz, sta_max_bw_mhz);
1312 if (ieee80211_is_probe_resp(hdr->frame_control))
1313 tx_bw_mhz = 1;
1314
1315 mm81x_tx_h_fill_info(mors, &tx_info, skb, vif, tx_bw_mhz, sta);
1316
1317 if (mm81x_tx_h_ps_filtered_for_sta(mors, skb, sta))
1318 return;
1319
1320 if (is_mgmt)
1321 mq = mm81x_hif_get_tx_mgmt_queue(mors);
1322 else
1323 mq = mm81x_hif_get_tx_data_queue(mors,
1324 dot11_tid_to_ac(tx_info.tid));
1325
1326 mm81x_skbq_skb_tx(mq, &skb, &tx_info,
1327 (is_mgmt) ? MM81X_SKB_CHAN_MGMT :
1328 MM81X_SKB_CHAN_DATA);
1329 }
1330
mm81x_mac_ops_stop(struct ieee80211_hw * hw,bool suspend)1331 static void mm81x_mac_ops_stop(struct ieee80211_hw *hw, bool suspend)
1332 {
1333 struct mm81x *mors = hw->priv;
1334
1335 mors->started = false;
1336 }
1337
mm81x_mac_beacon_finish(struct mm81x_vif * mors_vif)1338 static void mm81x_mac_beacon_finish(struct mm81x_vif *mors_vif)
1339 {
1340 struct mm81x *mors = mm81x_vif_to_mors(mors_vif);
1341
1342 mm81x_mac_beacon_irq_enable(mors_vif, false);
1343 cancel_work_sync(&mors_vif->u.ap.beacon_work);
1344 /*
1345 * Side effect of the restarting required when
1346 * reacting to regdom changes...
1347 */
1348 atomic_add_unless(&mors->num_bcn_vifs, -1, 0);
1349 }
1350
mm81x_mac_ops_remove_interface(struct ieee80211_hw * hw,struct ieee80211_vif * vif)1351 static void mm81x_mac_ops_remove_interface(struct ieee80211_hw *hw,
1352 struct ieee80211_vif *vif)
1353 {
1354 int ret;
1355 struct mm81x *mors = hw->priv;
1356 struct mm81x_vif *mors_vif = (struct mm81x_vif *)vif->drv_priv;
1357
1358 ret = mm81x_cmd_rm_if(mors, mors_vif->id);
1359 if (ret)
1360 dev_err(mors->dev, "mm81x_cmd_rm_if failed %d", ret);
1361
1362 RCU_INIT_POINTER(mors->vifs[mors_vif->id], NULL);
1363 }
1364
mm81x_mac_get_max_txpower(struct mm81x * mors)1365 static s32 mm81x_mac_get_max_txpower(struct mm81x *mors)
1366 {
1367 int ret;
1368 s32 power_mbm;
1369
1370 /* Retrieve maximum TX power the chip can transmit */
1371 ret = mm81x_cmd_get_max_txpower(mors, &power_mbm);
1372 if (ret) {
1373 dev_err(mors->dev, "using default tx max power %d mBm",
1374 MAX_TX_POWER_MBM);
1375 return MAX_TX_POWER_MBM;
1376 }
1377
1378 dev_dbg(mors->dev, "Max tx power detected %d mBm", power_mbm);
1379 return power_mbm;
1380 }
1381
mm81x_mac_set_txpower(struct mm81x * mors,s32 power_mbm)1382 static s32 mm81x_mac_set_txpower(struct mm81x *mors, s32 power_mbm)
1383 {
1384 int ret;
1385 s32 out_power_mbm;
1386
1387 if (mors->tx_max_power_mbm == INT_MAX)
1388 mors->tx_max_power_mbm = mm81x_mac_get_max_txpower(mors);
1389
1390 power_mbm = min(power_mbm, mors->tx_max_power_mbm);
1391 if (power_mbm == mors->tx_power_mbm)
1392 return mors->tx_power_mbm;
1393
1394 ret = mm81x_cmd_set_txpower(mors, &out_power_mbm, power_mbm);
1395 if (ret) {
1396 dev_err(mors->dev, "failed, power %d mBm ret %d", power_mbm,
1397 ret);
1398 return mors->tx_power_mbm;
1399 }
1400
1401 if (out_power_mbm != mors->tx_power_mbm) {
1402 dev_dbg(mors->dev, "%d -> %d mBm", mors->tx_power_mbm,
1403 out_power_mbm);
1404 mors->tx_power_mbm = out_power_mbm;
1405 }
1406
1407 return mors->tx_power_mbm;
1408 }
1409
mm81x_mac_set_channel(struct mm81x * mors,u32 op_chan_freq_hz,u8 pri_1mhz_chan_idx,u8 op_bw_mhz,u8 pri_bw_mhz)1410 static int mm81x_mac_set_channel(struct mm81x *mors, u32 op_chan_freq_hz,
1411 u8 pri_1mhz_chan_idx, u8 op_bw_mhz,
1412 u8 pri_bw_mhz)
1413 {
1414 int ret;
1415
1416 ret = mm81x_cmd_set_channel(mors, op_chan_freq_hz, pri_1mhz_chan_idx,
1417 op_bw_mhz, pri_bw_mhz, &mors->tx_power_mbm);
1418 if (ret) {
1419 dev_err(mors->dev, "mm81x_cmd_set_channel() failed, ret %d",
1420 ret);
1421 return ret;
1422 }
1423
1424 mm81x_mac_set_txpower(mors, mors->tx_power_mbm);
1425 return 0;
1426 }
1427
mm81x_mac_pri_chan_to_index(const struct cfg80211_chan_def * chandef)1428 static u8 mm81x_mac_pri_chan_to_index(const struct cfg80211_chan_def *chandef)
1429 {
1430 u32 bw_mhz = cfg80211_chandef_get_width(chandef);
1431 u32 op_center_khz = ieee80211_chandef_to_khz(chandef);
1432 u32 first_1mhz_center_khz = op_center_khz - (bw_mhz * 500) + 500;
1433 u32 pri_1mhz_khz = ieee80211_channel_to_khz(chandef->chan);
1434
1435 return (pri_1mhz_khz - first_1mhz_center_khz) / 1000;
1436 }
1437
mm81x_mac_ops_change_channel(struct ieee80211_hw * hw,struct cfg80211_chan_def * chandef)1438 static int mm81x_mac_ops_change_channel(struct ieee80211_hw *hw,
1439 struct cfg80211_chan_def *chandef)
1440 {
1441 int ret;
1442 struct mm81x *mors = hw->priv;
1443 u64 freq_hz = KHZ_TO_HZ(ieee80211_chandef_to_khz(chandef));
1444 u8 op_bw_mhz = cfg80211_chandef_get_width(chandef);
1445 u8 pri_1mhz_idx = mm81x_mac_pri_chan_to_index(chandef);
1446 int pri_chan_width_mhz = cfg80211_chandef_s1g_pri_width(chandef);
1447
1448 dev_dbg(mors->dev, "ch: freq=%llu Hz bw=%u pri_idx=%d pri_bw=%d",
1449 freq_hz, op_bw_mhz, pri_1mhz_idx, pri_chan_width_mhz);
1450
1451 ret = mm81x_mac_set_channel(mors, freq_hz, (u8)pri_1mhz_idx, op_bw_mhz,
1452 pri_chan_width_mhz);
1453 if (ret)
1454 return ret;
1455
1456 memcpy(&mors->chandef, chandef, sizeof(mors->chandef));
1457 return 0;
1458 }
1459
mm81x_mac_ops_config(struct ieee80211_hw * hw,int radio_idx,u32 changed)1460 static int mm81x_mac_ops_config(struct ieee80211_hw *hw, int radio_idx,
1461 u32 changed)
1462 {
1463 int ret;
1464 struct mm81x *mors = hw->priv;
1465 struct ieee80211_conf *conf = &hw->conf;
1466 struct ieee80211_channel *channel = conf->chandef.chan;
1467
1468 if (!mors->started)
1469 return 0;
1470
1471 if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
1472 ret = mm81x_mac_ops_change_channel(hw, &conf->chandef);
1473 if (ret < 0)
1474 return ret;
1475 }
1476
1477 if ((changed & IEEE80211_CONF_CHANGE_POWER) &&
1478 !(changed & IEEE80211_CONF_CHANGE_CHANNEL) &&
1479 !(conf->flags & IEEE80211_CONF_MONITOR)) {
1480 s32 power_mbm = DBM_TO_MBM(conf->power_level);
1481
1482 power_mbm = min(DBM_TO_MBM(channel->max_reg_power), power_mbm);
1483 power_mbm = mm81x_mac_set_txpower(mors, power_mbm);
1484 conf->power_level = MBM_TO_DBM(power_mbm);
1485 }
1486
1487 return 0;
1488 }
1489
mm81x_mac_ops_get_txpower(struct ieee80211_hw * hw,struct ieee80211_vif * vif,unsigned int link_id,int * dbm)1490 static int mm81x_mac_ops_get_txpower(struct ieee80211_hw *hw,
1491 struct ieee80211_vif *vif,
1492 unsigned int link_id, int *dbm)
1493 {
1494 struct mm81x *mors = hw->priv;
1495 struct ieee80211_chanctx_conf *chanctx_conf;
1496 struct cfg80211_chan_def *chandef = &vif->bss_conf.chanreq.oper;
1497
1498 scoped_guard(rcu) {
1499 chanctx_conf = rcu_access_pointer(vif->bss_conf.chanctx_conf);
1500 if (!chanctx_conf ||
1501 !cfg80211_chandef_identical(chandef, &chanctx_conf->def))
1502 return -ENODATA;
1503 }
1504
1505 *dbm = MBM_TO_DBM(mors->tx_power_mbm);
1506 return 0;
1507 }
1508
mm81x_mac_config_ps(struct mm81x * mors,struct ieee80211_vif * vif)1509 static void mm81x_mac_config_ps(struct mm81x *mors, struct ieee80211_vif *vif)
1510 {
1511 bool en_ps = vif->cfg.ps;
1512
1513 if (vif->type == NL80211_IFTYPE_AP || !mors->ps.enable)
1514 return;
1515
1516 if (mors->config_ps == en_ps)
1517 return;
1518
1519 dev_dbg(mors->dev, "change powersave mode: %d (current %d)", en_ps,
1520 mors->config_ps);
1521
1522 mors->config_ps = en_ps;
1523
1524 if (en_ps) {
1525 mm81x_cmd_set_ps(mors, true);
1526 mm81x_ps_enable(mors);
1527 } else {
1528 mm81x_ps_disable(mors);
1529 mm81x_cmd_set_ps(mors, false);
1530 }
1531 }
1532
mm81x_mac_ops_bss_info_changed(struct ieee80211_hw * hw,struct ieee80211_vif * vif,struct ieee80211_bss_conf * info,u64 changed)1533 static void mm81x_mac_ops_bss_info_changed(struct ieee80211_hw *hw,
1534 struct ieee80211_vif *vif,
1535 struct ieee80211_bss_conf *info,
1536 u64 changed)
1537 {
1538 int ret;
1539 struct mm81x *mors = hw->priv;
1540 struct mm81x_vif *mors_vif = (struct mm81x_vif *)vif->drv_priv;
1541
1542 if (changed & BSS_CHANGED_PS)
1543 mm81x_mac_config_ps(mors, vif);
1544
1545 if (changed & BSS_CHANGED_BEACON_ENABLED) {
1546 mm81x_cmd_config_beacon_timer(mors, mors_vif,
1547 info->enable_beacon);
1548
1549 if (!info->enable_beacon)
1550 mm81x_mac_beacon_finish(mors_vif);
1551 }
1552
1553 if (changed & BSS_CHANGED_BEACON_INT || changed & BSS_CHANGED_SSID) {
1554 ret = mm81x_cmd_cfg_bss(mors, mors_vif->id, info->beacon_int,
1555 info->dtim_period,
1556 mm81x_vif_generate_cssid(vif));
1557 if (ret)
1558 dev_err(mors->dev, "mm81x_cmd_cfg_bss failed %d", ret);
1559 }
1560 }
1561
mm81x_mac_ops_prepare_multicast(struct ieee80211_hw * hw,struct netdev_hw_addr_list * mc_list)1562 static u64 mm81x_mac_ops_prepare_multicast(struct ieee80211_hw *hw,
1563 struct netdev_hw_addr_list *mc_list)
1564 {
1565 struct mm81x *mors = hw->priv;
1566 struct mcast_filter *filter;
1567 struct netdev_hw_addr *addr;
1568 u16 addr_count = netdev_hw_addr_list_count(mc_list);
1569 u16 len = sizeof(*filter) + addr_count * sizeof(filter->addr_list[0]);
1570
1571 filter = kzalloc(len, GFP_ATOMIC);
1572 if (!filter)
1573 return 0;
1574
1575 if (addr_count > MCAST_FILTER_COUNT_MAX) {
1576 dev_warn(
1577 mors->dev,
1578 "Multicast filtering disabled - too many groups (%d) > %u",
1579 addr_count, (u16)MCAST_FILTER_COUNT_MAX);
1580 filter->count = 0;
1581 } else {
1582 netdev_hw_addr_list_for_each(addr, mc_list) {
1583 dev_dbg(mors->dev, "mcast whitelist (%d): %pM",
1584 filter->count, addr->addr);
1585 filter->addr_list[filter->count++] =
1586 mac2le32(addr->addr);
1587 }
1588 }
1589
1590 return (u64)(unsigned long)filter;
1591 }
1592
mm81x_mac_ops_configure_filter(struct ieee80211_hw * hw,unsigned int changed_flags,unsigned int * total_flags,u64 multicast)1593 static void mm81x_mac_ops_configure_filter(struct ieee80211_hw *hw,
1594 unsigned int changed_flags,
1595 unsigned int *total_flags,
1596 u64 multicast)
1597 {
1598 struct mm81x *mors = hw->priv;
1599 struct mcast_filter *cmd = (void *)(unsigned long)multicast;
1600 struct mm81x_vif *mors_vif = NULL;
1601 struct ieee80211_vif *vif = NULL;
1602 int vif_id = 0;
1603 int ret = 0;
1604
1605 if (!cmd)
1606 goto out;
1607
1608 kfree(mors->mcast_filter);
1609 mors->mcast_filter = cmd;
1610
1611 for (vif_id = 0; vif_id < ARRAY_SIZE(mors->vifs); vif_id++) {
1612 vif = mm81x_rcu_dereference_vif_id(mors, vif_id, false);
1613 if (!vif)
1614 continue;
1615
1616 mors_vif = ieee80211_vif_to_mors_vif(vif);
1617
1618 ret = mm81x_cmd_cfg_multicast_filter(mors, mors_vif);
1619 if (!ret)
1620 continue;
1621
1622 dev_err(mors->dev, "Multicast filtering failed - rc=%d", ret);
1623 mors->mcast_filter = NULL;
1624 kfree(cmd);
1625 break;
1626 }
1627
1628 out:
1629 *total_flags &= 0;
1630 }
1631
mm81x_mac_ops_conf_tx(struct ieee80211_hw * hw,struct ieee80211_vif * vif,unsigned int link_id,u16 ac,const struct ieee80211_tx_queue_params * params)1632 static int mm81x_mac_ops_conf_tx(struct ieee80211_hw *hw,
1633 struct ieee80211_vif *vif,
1634 unsigned int link_id, u16 ac,
1635 const struct ieee80211_tx_queue_params *params)
1636 {
1637 int ret;
1638 struct mm81x *mors = hw->priv;
1639 struct mm81x_queue_params mqp;
1640
1641 mqp.aci = map_mac80211q_2_mm81x_aci(ac);
1642 mqp.aifs = params->aifs;
1643 mqp.cw_max = params->cw_max;
1644 mqp.cw_min = params->cw_min;
1645 mqp.uapsd = params->uapsd;
1646 mqp.txop = params->txop << 5;
1647
1648 dev_dbg(mors->dev, "queue:%d txop:%d cw_min:%d cw_max:%d aifs:%d",
1649 mqp.aci, mqp.txop, mqp.cw_min, mqp.cw_max, mqp.aifs);
1650
1651 ret = mm81x_cmd_cfg_qos(mors, &mqp);
1652 if (ret)
1653 dev_dbg(mors->dev, "mm81x_cmd_cfg_qos failed %d", ret);
1654 return ret;
1655 }
1656
mm81x_mac_ops_sta_state(struct ieee80211_hw * hw,struct ieee80211_vif * vif,struct ieee80211_sta * sta,enum ieee80211_sta_state old_state,enum ieee80211_sta_state new_state)1657 static int mm81x_mac_ops_sta_state(struct ieee80211_hw *hw,
1658 struct ieee80211_vif *vif,
1659 struct ieee80211_sta *sta,
1660 enum ieee80211_sta_state old_state,
1661 enum ieee80211_sta_state new_state)
1662 {
1663 u16 aid;
1664 int ret;
1665 struct mm81x *mors = hw->priv;
1666 struct mm81x_vif *mors_vif = (struct mm81x_vif *)vif->drv_priv;
1667 struct mm81x_sta *mors_sta = (struct mm81x_sta *)sta->drv_priv;
1668
1669 /* Ignore both NOTEXIST to NONE and NONE to NOTEXIST */
1670 if ((old_state == IEEE80211_STA_NOTEXIST &&
1671 new_state == IEEE80211_STA_NONE) ||
1672 (old_state == IEEE80211_STA_NONE &&
1673 new_state == IEEE80211_STA_NOTEXIST))
1674 return 0;
1675
1676 if (vif->type == NL80211_IFTYPE_STATION)
1677 aid = vif->cfg.aid;
1678 else
1679 aid = sta->aid;
1680
1681 ret = mm81x_cmd_sta_state(mors, mors_vif, aid, sta, new_state);
1682 if (ret < 0)
1683 goto exit;
1684
1685 ether_addr_copy(mors_sta->addr, sta->addr);
1686 mors_sta->state = new_state;
1687
1688 if (new_state > old_state && new_state == IEEE80211_STA_ASSOC) {
1689 if (vif->type == NL80211_IFTYPE_AP)
1690 mors_vif->u.ap.num_stas++;
1691 else if (vif->type == NL80211_IFTYPE_STATION)
1692 mors_vif->u.sta.is_assoc = true;
1693 }
1694
1695 if (new_state < old_state && new_state == IEEE80211_STA_NONE) {
1696 if (vif->type == NL80211_IFTYPE_AP)
1697 mors_vif->u.ap.num_stas--;
1698 else if (vif->type == NL80211_IFTYPE_STATION)
1699 mors_vif->u.sta.is_assoc = false;
1700 }
1701
1702 exit:
1703 /*
1704 * Always update our mmrc sta state even on failure to ensure
1705 * we don't hold a dangling sta on error
1706 */
1707 mm81x_rc_sta_state_check(mors, vif, sta, old_state, new_state);
1708 return new_state < old_state ? 0 : ret;
1709 }
1710
mm81x_mac_ops_ampdu_action(struct ieee80211_hw * hw,struct ieee80211_vif * vif,struct ieee80211_ampdu_params * params)1711 static int mm81x_mac_ops_ampdu_action(struct ieee80211_hw *hw,
1712 struct ieee80211_vif *vif,
1713 struct ieee80211_ampdu_params *params)
1714 {
1715 u16 tid = params->tid;
1716 struct mm81x *mors = hw->priv;
1717 struct ieee80211_sta *sta = params->sta;
1718 struct mm81x_sta *mors_sta = (struct mm81x_sta *)sta->drv_priv;
1719 u16 buf_size =
1720 min_t(u16, params->buf_size, DOT11AH_BA_MAX_MPDU_PER_AMPDU);
1721
1722 switch (params->action) {
1723 case IEEE80211_AMPDU_TX_START:
1724 dev_dbg(mors->dev, "%pM.%d A-MPDU TX start", mors_sta->addr,
1725 tid);
1726 ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
1727 break;
1728 case IEEE80211_AMPDU_TX_STOP_CONT:
1729 case IEEE80211_AMPDU_TX_STOP_FLUSH:
1730 case IEEE80211_AMPDU_TX_STOP_FLUSH_CONT:
1731 dev_dbg(mors->dev, "%pM.%d A-MPDU TX flush", mors_sta->addr,
1732 tid);
1733 mors_sta->tid_start_tx[tid] = false;
1734 mors_sta->tid_tx[tid] = false;
1735 mors_sta->tid_params[tid] = 0;
1736 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
1737 break;
1738 case IEEE80211_AMPDU_TX_OPERATIONAL:
1739 dev_dbg(mors->dev, "%pM.%d A-MPDU TX oper", mors_sta->addr,
1740 tid);
1741 mors_sta->tid_tx[tid] = true;
1742 if (!buf_size) {
1743 dev_err(mors->dev, "%pM.%d A-MPDU Invalid buf size",
1744 mors_sta->addr, tid);
1745 break;
1746 }
1747 mors_sta->tid_params[tid] =
1748 u8_encode_bits(buf_size - 1,
1749 TX_INFO_TID_PARAMS_MAX_REORDER_BUF) |
1750 u8_encode_bits(1, TX_INFO_TID_PARAMS_AMPDU_ENABLED) |
1751 u8_encode_bits(params->amsdu,
1752 TX_INFO_TID_PARAMS_AMSDU_SUPPORTED);
1753 break;
1754 default:
1755 break;
1756 }
1757
1758 return 0;
1759 }
1760
mm81x_mac_ops_set_key(struct ieee80211_hw * hw,enum set_key_cmd cmd,struct ieee80211_vif * vif,struct ieee80211_sta * sta,struct ieee80211_key_conf * key)1761 static int mm81x_mac_ops_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
1762 struct ieee80211_vif *vif,
1763 struct ieee80211_sta *sta,
1764 struct ieee80211_key_conf *key)
1765 {
1766 u16 aid;
1767 int ret = -EOPNOTSUPP;
1768 struct mm81x *mors = hw->priv;
1769 struct mm81x_vif *mors_vif = (struct mm81x_vif *)vif->drv_priv;
1770 enum host_cmd_key_cipher cipher;
1771 enum host_cmd_aes_key_len length;
1772
1773 if (vif->type == NL80211_IFTYPE_STATION) {
1774 aid = vif->cfg.aid;
1775 } else if (sta) {
1776 aid = sta->aid;
1777 } else {
1778 /* Is a group key - AID is unused */
1779 WARN_ON(key->flags & IEEE80211_KEY_FLAG_PAIRWISE);
1780 aid = 0;
1781 }
1782
1783 switch (cmd) {
1784 case SET_KEY: {
1785 switch (key->cipher) {
1786 case WLAN_CIPHER_SUITE_CCMP:
1787 case WLAN_CIPHER_SUITE_CCMP_256:
1788 cipher = HOST_CMD_KEY_CIPHER_AES_CCM;
1789 break;
1790 case WLAN_CIPHER_SUITE_GCMP:
1791 case WLAN_CIPHER_SUITE_GCMP_256:
1792 cipher = HOST_CMD_KEY_CIPHER_AES_GCM;
1793 break;
1794 default:
1795 /* Cipher suite currently not supported */
1796 ret = -EOPNOTSUPP;
1797 goto exit;
1798 }
1799
1800 switch (key->keylen) {
1801 case 16:
1802 length = HOST_CMD_AES_KEY_LEN_LENGTH_128;
1803 break;
1804 case 32:
1805 length = HOST_CMD_AES_KEY_LEN_LENGTH_256;
1806 break;
1807 default:
1808 /* Key length not supported */
1809 ret = -EOPNOTSUPP;
1810 goto exit;
1811 }
1812
1813 ret = mm81x_cmd_install_key(mors, mors_vif, aid, key, cipher,
1814 length);
1815 break;
1816 }
1817 case DISABLE_KEY:
1818 ret = mm81x_cmd_disable_key(mors, mors_vif, aid, key);
1819 if (ret) {
1820 /* Must return 0 */
1821 dev_warn(mors->dev, "Failed to remove key");
1822 ret = 0;
1823 }
1824 break;
1825 default:
1826 WARN_ON(1);
1827 }
1828
1829 if (ret) {
1830 dev_dbg(mors->dev, "Falling back to software crypto");
1831 ret = 1;
1832 }
1833
1834 exit:
1835 return ret;
1836 }
1837
mm81x_mac_set_frag_threshold(struct ieee80211_hw * hw,int radio_idx,u32 value)1838 static int mm81x_mac_set_frag_threshold(struct ieee80211_hw *hw, int radio_idx,
1839 u32 value)
1840 {
1841 struct mm81x *mors = hw->priv;
1842
1843 return mm81x_cmd_set_frag_threshold(mors, value);
1844 }
1845
mm81x_rx_h_rc_bw_to_rx_bw(__le32 ratecode)1846 static u8 mm81x_rx_h_rc_bw_to_rx_bw(__le32 ratecode)
1847 {
1848 enum dot11_bandwidth bw = mm81x_ratecode_bw_index_get(ratecode);
1849
1850 switch (bw) {
1851 case DOT11_BANDWIDTH_1MHZ:
1852 return RATE_INFO_BW_1;
1853 case DOT11_BANDWIDTH_2MHZ:
1854 return RATE_INFO_BW_2;
1855 case DOT11_BANDWIDTH_4MHZ:
1856 return RATE_INFO_BW_4;
1857 case DOT11_BANDWIDTH_8MHZ:
1858 return RATE_INFO_BW_8;
1859 default:
1860 return RATE_INFO_BW_1;
1861 }
1862 }
1863
mm81x_rx_h_fill_status(struct mm81x * mors,struct mm81x_skb_rx_status * hdr_rx_status,struct ieee80211_rx_status * rx_status,struct sk_buff * skb)1864 static void mm81x_rx_h_fill_status(struct mm81x *mors,
1865 struct mm81x_skb_rx_status *hdr_rx_status,
1866 struct ieee80211_rx_status *rx_status,
1867 struct sk_buff *skb)
1868 {
1869 u32 flags = le32_to_cpu(hdr_rx_status->flags);
1870 u16 freq_100khz = le16_to_cpu(hdr_rx_status->freq_100khz);
1871 __le32 ratecode = hdr_rx_status->mm81x_ratecode;
1872
1873 rx_status->signal = le16_to_cpu(hdr_rx_status->rssi);
1874 rx_status->encoding = RX_ENC_S1G;
1875 rx_status->band = NL80211_BAND_S1GHZ;
1876 rx_status->freq = KHZ100_TO_MHZ(freq_100khz);
1877 rx_status->freq_offset = (freq_100khz % 10) ? 1 : 0;
1878 rx_status->nss = NSS_IDX_TO_NSS(mm81x_ratecode_nss_index_get(ratecode));
1879
1880 if (flags & MM81X_RX_STATUS_FLAGS_DECRYPTED)
1881 rx_status->flag |= RX_FLAG_DECRYPTED;
1882
1883 rx_status->rate_idx = mm81x_ratecode_mcs_index_get(ratecode);
1884 rx_status->bw = mm81x_rx_h_rc_bw_to_rx_bw(ratecode);
1885
1886 if (mm81x_ratecode_sgi_get(ratecode))
1887 rx_status->enc_flags |= RX_ENC_FLAG_SHORT_GI;
1888 }
1889
mm81x_rx_h_update_sta(struct ieee80211_vif * vif,struct ieee80211_hdr * hdr,struct ieee80211_rx_status * rx_status)1890 static void mm81x_rx_h_update_sta(struct ieee80211_vif *vif,
1891 struct ieee80211_hdr *hdr,
1892 struct ieee80211_rx_status *rx_status)
1893 {
1894 struct ieee80211_sta *sta;
1895 struct mm81x_sta *msta;
1896 u8 *lookup = ieee80211_is_s1g_beacon(hdr->frame_control) ? hdr->addr1 :
1897 hdr->addr2;
1898
1899 lockdep_assert_in_rcu_read_lock();
1900
1901 sta = ieee80211_find_sta(vif, lookup);
1902 if (!sta)
1903 return;
1904
1905 msta = (void *)sta->drv_priv;
1906 if (msta->avg_rssi) {
1907 msta->avg_rssi =
1908 CALC_AVG_RSSI(msta->avg_rssi, rx_status->signal);
1909 } else {
1910 msta->avg_rssi = rx_status->signal;
1911 }
1912 }
1913
1914 static struct ieee80211_vif *
mm81x_rx_h_skb_get_vif(struct mm81x * mors,struct sk_buff * skb,struct mm81x_skb_rx_status * hdr_rx_status)1915 mm81x_rx_h_skb_get_vif(struct mm81x *mors, struct sk_buff *skb,
1916 struct mm81x_skb_rx_status *hdr_rx_status)
1917 {
1918 u8 vif_id = u32_get_bits(le32_to_cpu(hdr_rx_status->flags),
1919 MM81X_RX_STATUS_FLAGS_VIF_ID);
1920
1921 lockdep_assert_in_rcu_read_lock();
1922
1923 if (vif_id == INVALID_VIF_INDEX)
1924 return NULL;
1925
1926 return mm81x_rcu_dereference_vif_id(mors, vif_id, true);
1927 }
1928
mm81x_mac_rx_skb(struct mm81x * mors,struct sk_buff * skb,struct mm81x_skb_rx_status * hdr_rx_status)1929 void mm81x_mac_rx_skb(struct mm81x *mors, struct sk_buff *skb,
1930 struct mm81x_skb_rx_status *hdr_rx_status)
1931 {
1932 struct ieee80211_vif *vif;
1933 struct ieee80211_hw *hw = mors->hw;
1934 struct ieee80211_rx_status rx_status;
1935 struct ieee80211_hdr *hdr = (void *)skb->data;
1936
1937 memset(&rx_status, 0, sizeof(rx_status));
1938
1939 if (!mors->started || !skb->data || !skb->len) {
1940 dev_kfree_skb_any(skb);
1941 return;
1942 }
1943
1944 mm81x_rx_h_fill_status(mors, hdr_rx_status, &rx_status, skb);
1945
1946 scoped_guard(rcu) {
1947 vif = mm81x_rx_h_skb_get_vif(mors, skb, hdr_rx_status);
1948 if (!vif)
1949 goto rx;
1950
1951 mm81x_rx_h_update_sta(vif, hdr, &rx_status);
1952 }
1953
1954 rx:
1955 memcpy(IEEE80211_SKB_RXCB(skb), &rx_status, sizeof(rx_status));
1956 ieee80211_rx_ni(hw, skb);
1957 }
1958
mm81x_mac_flush_queues(struct mm81x * mors)1959 static void mm81x_mac_flush_queues(struct mm81x *mors)
1960 {
1961 /*
1962 * No need to call mm81x_skbq_stop_tx_queues as mac80211
1963 * has already cancelled each queue prior to calling .flush()
1964 */
1965 mm81x_skbq_data_traffic_pause(mors);
1966
1967 flush_work(&mors->hif_work);
1968 flush_work(&mors->tx_stale_work);
1969
1970 mm81x_hif_clear_events(mors);
1971 mm81x_hif_flush_tx_data(mors);
1972 mm81x_hif_flush_cmds(mors);
1973
1974 /* Re-enable data, not that there will be any */
1975 mm81x_skbq_data_traffic_resume(mors);
1976 }
1977
mm81x_mac_has_tx_pending(struct mm81x * mors)1978 static bool mm81x_mac_has_tx_pending(struct mm81x *mors)
1979 {
1980 struct mm81x_skbq *mgmt_q = mm81x_hif_get_tx_mgmt_queue(mors);
1981 struct mm81x_skbq *tx_qs;
1982 int num_qs, i;
1983
1984 mm81x_hif_skbq_get_tx_qs(mors, &tx_qs, &num_qs);
1985 for (i = 0; i < num_qs; i++)
1986 if (mm81x_skbq_count(&tx_qs[i]) ||
1987 mm81x_skbq_pending_count(&tx_qs[i]))
1988 return true;
1989
1990 if (mm81x_skbq_count(mgmt_q) || mm81x_skbq_pending_count(mgmt_q))
1991 return true;
1992
1993 return false;
1994 }
1995
mm81x_mac_wait_queues(struct mm81x * mors)1996 static void mm81x_mac_wait_queues(struct mm81x *mors)
1997 {
1998 if (!wait_event_timeout(mors->tx_empty_waitq,
1999 !mm81x_mac_has_tx_pending(mors),
2000 MM81X_FLUSH_TIMEOUT))
2001 dev_warn(mors->dev, "Unable to empty queues before timeout");
2002 }
2003
mm81x_mac_ops_flush(struct ieee80211_hw * hw,struct ieee80211_vif * vif,u32 queues,bool drop)2004 static void mm81x_mac_ops_flush(struct ieee80211_hw *hw,
2005 struct ieee80211_vif *vif, u32 queues,
2006 bool drop)
2007 {
2008 struct mm81x *mors = hw->priv;
2009
2010 /* We don't support IEEE80211_HW_QUEUE_CONTROL so flush all queues */
2011 if (drop)
2012 mm81x_mac_flush_queues(mors);
2013 else
2014 mm81x_mac_wait_queues(mors);
2015 }
2016
mm81x_mac_ops_set_rts_threshold(struct ieee80211_hw * hw,int radio_idx,u32 value)2017 static int mm81x_mac_ops_set_rts_threshold(struct ieee80211_hw *hw,
2018 int radio_idx, u32 value)
2019 {
2020 struct mm81x *mors = hw->priv;
2021
2022 mors->rts_threshold = value;
2023 return 0;
2024 }
2025
mm81x_mac_ops_sta_statistics(struct ieee80211_hw * hw,struct ieee80211_vif * vif,struct ieee80211_sta * sta,struct station_info * sinfo)2026 static void mm81x_mac_ops_sta_statistics(struct ieee80211_hw *hw,
2027 struct ieee80211_vif *vif,
2028 struct ieee80211_sta *sta,
2029 struct station_info *sinfo)
2030 {
2031 struct mm81x_sta *msta = (struct mm81x_sta *)sta->drv_priv;
2032 struct mm81x *mors = hw->priv;
2033 const struct mmrc_table *tb = msta->rc.tb;
2034 struct mmrc_rate rate;
2035
2036 if (!tb || tb->best_tp.rate == MMRC_MCS_UNUSED) {
2037 sinfo->filled &= ~BIT_ULL(NL80211_STA_INFO_TX_BITRATE);
2038 return;
2039 }
2040
2041 rate = tb->best_tp;
2042 sinfo->txrate.mcs = rate.rate;
2043 sinfo->txrate.nss = NSS_IDX_TO_NSS(rate.ss);
2044 sinfo->txrate.flags = RATE_INFO_FLAGS_S1G_MCS;
2045 switch (rate.bw) {
2046 case MMRC_BW_1MHZ:
2047 sinfo->txrate.bw = RATE_INFO_BW_1;
2048 break;
2049 case MMRC_BW_2MHZ:
2050 sinfo->txrate.bw = RATE_INFO_BW_2;
2051 break;
2052 case MMRC_BW_4MHZ:
2053 sinfo->txrate.bw = RATE_INFO_BW_4;
2054 break;
2055 case MMRC_BW_8MHZ:
2056 sinfo->txrate.bw = RATE_INFO_BW_8;
2057 break;
2058 default:
2059 break;
2060 }
2061
2062 if (rate.guard == MMRC_GUARD_SHORT)
2063 sinfo->txrate.flags |= (RATE_INFO_FLAGS_SHORT_GI);
2064
2065 dev_dbg(mors->dev, "mcs: %d, bw: %d, flag: 0x%x", rate.rate, rate.bw,
2066 sinfo->txrate.flags);
2067 sinfo->filled |= BIT_ULL(NL80211_STA_INFO_TX_BITRATE);
2068 }
2069
mm81x_get_expected_throughput(struct ieee80211_hw * hw,struct ieee80211_sta * sta)2070 static u32 mm81x_get_expected_throughput(struct ieee80211_hw *hw,
2071 struct ieee80211_sta *sta)
2072 {
2073 struct mm81x_sta *msta = (struct mm81x_sta *)sta->drv_priv;
2074 struct mm81x *mors = hw->priv;
2075 const struct mmrc_table *tb = msta->rc.tb;
2076 struct mmrc_rate rate;
2077 u32 tput;
2078
2079 if (!tb || tb->best_tp.rate == MMRC_MCS_UNUSED)
2080 return 0;
2081
2082 rate = tb->best_tp;
2083 tput = BPS_TO_KBPS(mmrc_calculate_theoretical_throughput(rate));
2084 dev_dbg(mors->dev, "Throughput: MCS: %d, BW: %d, GI: %d -> %u",
2085 rate.rate, 1 << rate.bw, rate.guard, tput);
2086
2087 return tput;
2088 }
2089
mm81x_mac_restart_cleanup_iter(void * data,u8 * mac,struct ieee80211_vif * vif)2090 static void mm81x_mac_restart_cleanup_iter(void *data, u8 *mac,
2091 struct ieee80211_vif *vif)
2092 {
2093 if (vif->type == NL80211_IFTYPE_AP)
2094 mm81x_mac_beacon_finish((struct mm81x_vif *)vif->drv_priv);
2095 }
2096
mm81x_mac_restart_cleanup(struct mm81x * mors)2097 static void mm81x_mac_restart_cleanup(struct mm81x *mors)
2098 {
2099 ieee80211_iterate_active_interfaces(mors->hw,
2100 IEEE80211_IFACE_ITER_NORMAL,
2101 mm81x_mac_restart_cleanup_iter,
2102 NULL);
2103 mm81x_mac_hw_scan_finish(mors);
2104 }
2105
mm81x_mac_restart(struct mm81x * mors)2106 static int mm81x_mac_restart(struct mm81x *mors)
2107 {
2108 int ret;
2109 u32 chip_id;
2110
2111 mors->started = false;
2112 mm81x_ps_disable(mors);
2113 mm81x_bus_set_irq(mors, false);
2114 mm81x_hw_irq_clear(mors);
2115 ieee80211_stop_queues(mors->hw);
2116
2117 set_bit(MM81X_STATE_DATA_TX_STOPPED, &mors->state_flags);
2118 set_bit(MM81X_STATE_DATA_QS_STOPPED, &mors->state_flags);
2119
2120 /* Allow time for in-transit tx/rx packets to settle */
2121 mdelay(MM81X_HW_RESTART_DELAY_MS);
2122 flush_work(&mors->hif_work);
2123 flush_work(&mors->tx_stale_work);
2124 mm81x_hif_clear_events(mors);
2125 mm81x_hif_flush_tx_data(mors);
2126 mm81x_hif_flush_cmds(mors);
2127
2128 mm81x_claim_bus(mors);
2129 ret = mm81x_reg32_read(mors, MM81X_REG_CHIP_ID(mors), &chip_id);
2130 mm81x_release_bus(mors);
2131
2132 if (ret < 0) {
2133 dev_err(mors->dev, "Failed to access HW: %d", ret);
2134 goto exit;
2135 }
2136
2137 mm81x_mac_restart_cleanup(mors);
2138
2139 ret = mm81x_fw_init(mors, true);
2140 if (ret < 0) {
2141 dev_err(mors->dev, "Failed to init firmware: %d", ret);
2142 goto exit;
2143 }
2144
2145 mm81x_hw_irq_enable(mors, MM81X_INT_HW_STOP_NOTIFICATION_NUM, true);
2146
2147 ret = mm81x_fw_parse_ext_host_tbl(mors);
2148 if (ret) {
2149 dev_err(mors->dev, "failed to parse extended host table: %d",
2150 ret);
2151 goto exit;
2152 }
2153
2154 mm81x_mac_caps_init(mors);
2155
2156 mm81x_bus_set_irq(mors, true);
2157 clear_bit(MM81X_STATE_DATA_TX_STOPPED, &mors->state_flags);
2158 clear_bit(MM81X_STATE_DATA_QS_STOPPED, &mors->state_flags);
2159 clear_bit(MM81X_STATE_CHIP_UNRESPONSIVE, &mors->state_flags);
2160 clear_bit(MM81X_STATE_RELOAD_FW_AFTER_START, &mors->state_flags);
2161 mm81x_mac_check_fw_disabled_chans(mors->hw);
2162 ieee80211_restart_hw(mors->hw);
2163
2164 exit:
2165 mm81x_ps_enable(mors);
2166 return ret;
2167 }
2168
mm81x_mac_ops_add_interface(struct ieee80211_hw * hw,struct ieee80211_vif * vif)2169 static int mm81x_mac_ops_add_interface(struct ieee80211_hw *hw,
2170 struct ieee80211_vif *vif)
2171 {
2172 int ret = 0;
2173 struct mm81x *mors = hw->priv;
2174 struct mm81x_vif *mors_vif = (struct mm81x_vif *)vif->drv_priv;
2175
2176 if (test_bit(MM81X_STATE_RELOAD_FW_AFTER_START, &mors->state_flags)) {
2177 dev_info(mors->dev, "Restarting chip with regdom: %s",
2178 mors->country);
2179
2180 ret = mm81x_mac_restart(mors);
2181 if (ret) {
2182 dev_err(mors->dev, "Failed to restart chip");
2183 return ret;
2184 }
2185
2186 /*
2187 * mac_restart will trigger ieee80211_hw_restart and
2188 * add_interface will re-enter. just exit here instead.
2189 */
2190 return 0;
2191 }
2192
2193 vif->driver_flags |= IEEE80211_VIF_BEACON_FILTER;
2194 mors_vif->mors = mors;
2195
2196 ret = mm81x_cmd_add_if(mors, &mors_vif->id, vif->addr, vif->type);
2197 if (ret) {
2198 dev_err(mors->dev, "mm81x_cmd_add_if failed %d", ret);
2199 return ret;
2200 }
2201
2202 if (mors_vif->id >= ARRAY_SIZE(mors->vifs)) {
2203 dev_err(mors->dev, "vif_id is too large %u", mors_vif->id);
2204 ret = -EOPNOTSUPP;
2205 return ret;
2206 }
2207
2208 if (mors_vif->id != (mors_vif->id & MM81X_TX_CONF_FLAGS_VIF_ID_MASK)) {
2209 dev_err(mors->dev, "invalid vif_id %u", mors_vif->id);
2210 ret = -EOPNOTSUPP;
2211 return ret;
2212 }
2213
2214 rcu_assign_pointer(mors->vifs[mors_vif->id], vif);
2215
2216 if (vif->type == NL80211_IFTYPE_AP)
2217 mm81x_mac_beacon_init(mors_vif);
2218
2219 ret = mm81x_cmd_get_capabilities(mors, mors_vif->id, &mors->fw_caps);
2220 if (ret) {
2221 dev_err(mors->dev,
2222 "mm81x_cmd_get_capabilities failed for vif %d",
2223 mors_vif->id);
2224 return ret;
2225 }
2226
2227 ieee80211_wake_queues(mors->hw);
2228 return ret;
2229 }
2230
2231 static const struct ieee80211_ops mm81x_ops = {
2232 .start = mm81x_mac_ops_start,
2233 .stop = mm81x_mac_ops_stop,
2234 .config = mm81x_mac_ops_config,
2235 .wake_tx_queue = ieee80211_handle_wake_tx_queue,
2236 .tx = mm81x_mac_ops_tx,
2237 .add_interface = mm81x_mac_ops_add_interface,
2238 .remove_interface = mm81x_mac_ops_remove_interface,
2239 .configure_filter = mm81x_mac_ops_configure_filter,
2240 .sta_state = mm81x_mac_ops_sta_state,
2241 .flush = mm81x_mac_ops_flush,
2242 .set_frag_threshold = mm81x_mac_set_frag_threshold,
2243 .set_rts_threshold = mm81x_mac_ops_set_rts_threshold,
2244 .sta_statistics = mm81x_mac_ops_sta_statistics,
2245 .get_expected_throughput = mm81x_get_expected_throughput,
2246 .hw_scan = mm81x_mac_ops_hw_scan,
2247 .cancel_hw_scan = mm81x_mac_ops_cancel_hw_scan,
2248 .get_txpower = mm81x_mac_ops_get_txpower,
2249 .bss_info_changed = mm81x_mac_ops_bss_info_changed,
2250 .prepare_multicast = mm81x_mac_ops_prepare_multicast,
2251 .conf_tx = mm81x_mac_ops_conf_tx,
2252 .ampdu_action = mm81x_mac_ops_ampdu_action,
2253 .set_key = mm81x_mac_ops_set_key,
2254 .add_chanctx = ieee80211_emulate_add_chanctx,
2255 .remove_chanctx = ieee80211_emulate_remove_chanctx,
2256 .change_chanctx = ieee80211_emulate_change_chanctx,
2257 .switch_vif_chanctx = ieee80211_emulate_switch_vif_chanctx,
2258 };
2259
mm81x_reg_notifier(struct wiphy * wiphy,struct regulatory_request * request)2260 static void mm81x_reg_notifier(struct wiphy *wiphy,
2261 struct regulatory_request *request)
2262 {
2263 int ret;
2264 struct mm81x *mors = wiphy_to_ieee80211_hw(wiphy)->priv;
2265
2266 if (mm81x_reg_h_cc_equal(request->alpha2, "00") ||
2267 mm81x_reg_h_cc_equal(request->alpha2, mors->country))
2268 return;
2269
2270 memcpy(mors->country, request->alpha2, sizeof(mors->country));
2271
2272 ret = mm81x_mac_restart(mors);
2273 if (ret)
2274 dev_err(mors->dev, "Failed to restart chip: %d", ret);
2275 }
2276
mm81x_mac_config_hw(struct mm81x * mors)2277 static void mm81x_mac_config_hw(struct mm81x *mors)
2278 {
2279 int i;
2280 struct ieee80211_hw *hw = mors->hw;
2281 struct wiphy *wiphy;
2282
2283 for (i = 0; i < NUM_NL80211_BANDS; i++)
2284 hw->wiphy->bands[i] = NULL;
2285
2286 hw->wiphy->bands[NL80211_BAND_S1GHZ] = &mors_band_s1ghz;
2287 hw->wiphy->interface_modes = BIT(NL80211_IFTYPE_AP) |
2288 BIT(NL80211_IFTYPE_STATION);
2289 hw->wiphy->reg_notifier = mm81x_reg_notifier;
2290 hw->queues = MM81X_HW_QUEUE_COUNT;
2291 hw->max_rates = MM81X_HW_MAX_RATES;
2292 hw->max_report_rates = MM81X_HW_MAX_REPORT_RATES;
2293 hw->max_rate_tries = MM81X_HW_MAX_RATE_TRIES;
2294 hw->tx_sk_pacing_shift = MM81X_HW_TX_SK_PACING_SHIFT;
2295 hw->vif_data_size = sizeof(struct mm81x_vif);
2296 hw->sta_data_size = sizeof(struct mm81x_sta);
2297 hw->extra_tx_headroom =
2298 sizeof(struct mm81x_skb_hdr) + mm81x_bus_get_alignment(mors);
2299
2300 mors->wiphy = hw->wiphy;
2301
2302 ieee80211_hw_set(hw, SIGNAL_DBM);
2303 ieee80211_hw_set(hw, MFP_CAPABLE);
2304 ieee80211_hw_set(hw, REPORTS_TX_ACK_STATUS);
2305 ieee80211_hw_set(hw, AMPDU_AGGREGATION);
2306 ieee80211_hw_set(hw, HOST_BROADCAST_PS_BUFFERING);
2307 ieee80211_hw_set(hw, HAS_RATE_CONTROL);
2308 ieee80211_hw_set(hw, SUPPORTS_PS);
2309 ieee80211_hw_set(hw, NEED_DTIM_BEFORE_ASSOC);
2310 ieee80211_hw_set(hw, PS_NULLFUNC_STACK);
2311 ieee80211_hw_set(hw, SUPPORTS_TX_FRAG);
2312 ieee80211_hw_set(hw, SUPPORTS_NDP_BLOCKACK);
2313
2314 SET_IEEE80211_PERM_ADDR(hw, mors->macaddr);
2315
2316 wiphy = mors->wiphy;
2317
2318 wiphy->flags |= WIPHY_FLAG_AP_UAPSD;
2319 wiphy->flags |= WIPHY_FLAG_PS_ON_BY_DEFAULT;
2320
2321 if (!mors->ps.enable)
2322 wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT;
2323
2324 wiphy->features |= NL80211_FEATURE_AP_MODE_CHAN_WIDTH_CHANGE |
2325 NL80211_FEATURE_TX_POWER_INSERTION;
2326
2327 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_AIRTIME_FAIRNESS);
2328 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_SET_SCAN_DWELL);
2329
2330 wiphy->iface_combinations = mors_if_combs;
2331 wiphy->n_iface_combinations = ARRAY_SIZE(mors_if_combs);
2332 wiphy->max_scan_ie_len = MM81X_MAX_SCAN_IE_LEN;
2333 wiphy->max_scan_ssids = MM81X_MAX_SCAN_SSIDS;
2334 wiphy->signal_type = CFG80211_SIGNAL_TYPE_MBM;
2335 wiphy->max_remain_on_channel_duration =
2336 MM81X_MAX_REMAIN_ON_CHAN_DURATION;
2337 }
2338
mm81x_stale_tx_status_timer(struct timer_list * t)2339 static void mm81x_stale_tx_status_timer(struct timer_list *t)
2340 {
2341 struct mm81x *mors = timer_container_of(mors, t, stale_status.timer);
2342
2343 spin_lock_bh(&mors->stale_status.lock);
2344 if (mm81x_hif_get_tx_status_pending_count(mors))
2345 queue_work(mors->net_wq, &mors->tx_stale_work);
2346 spin_unlock_bh(&mors->stale_status.lock);
2347 }
2348
mm81x_stale_tx_status_timer_finish(struct mm81x * mors)2349 static void mm81x_stale_tx_status_timer_finish(struct mm81x *mors)
2350 {
2351 timer_shutdown_sync(&mors->stale_status.timer);
2352 }
2353
mm81x_mac_stale_tx_status_timer_init(struct mm81x * mors)2354 static void mm81x_mac_stale_tx_status_timer_init(struct mm81x *mors)
2355 {
2356 spin_lock_init(&mors->stale_status.lock);
2357 timer_setup(&mors->stale_status.timer, mm81x_stale_tx_status_timer, 0);
2358 }
2359
mm81x_mac_register(struct mm81x * mors)2360 int mm81x_mac_register(struct mm81x *mors)
2361 {
2362 int ret;
2363 struct ieee80211_hw *hw = mors->hw;
2364
2365 mors->tx_power_mbm = INT_MAX;
2366 mors->tx_max_power_mbm = INT_MAX;
2367 mors->rts_threshold = IEEE80211_MAX_RTS_THRESHOLD;
2368
2369 ret = mm81x_ps_init(mors);
2370 if (ret)
2371 return ret;
2372
2373 mm81x_mac_config_hw(mors);
2374 mm81x_mac_hw_scan_init(mors);
2375 mm81x_mac_stale_tx_status_timer_init(mors);
2376
2377 ret = ieee80211_register_hw(hw);
2378 if (ret) {
2379 dev_err(mors->dev, "ieee80211_register_hw failed %d", ret);
2380 mm81x_mac_unregister(mors);
2381 return ret;
2382 }
2383
2384 mm81x_rc_init(mors);
2385
2386 /*
2387 * At this stage, we know bus and pager system interrupts are enabled.
2388 * Trigger the receive workqueue to drain any incoming chip-to-host
2389 * pending packets been pushed in the period between the firmware
2390 * initialization and interrupts being enabled.
2391 */
2392 set_bit(MM81X_HIF_EVT_RX_PEND, &mors->hif.event_flags);
2393 queue_work(mors->chip_wq, &mors->hif_work);
2394
2395 return ret;
2396 }
2397
mm81x_mac_unregister(struct mm81x * mors)2398 void mm81x_mac_unregister(struct mm81x *mors)
2399 {
2400 mm81x_ps_disable(mors);
2401 mm81x_rc_deinit(mors);
2402 mm81x_mac_hw_scan_destroy(mors);
2403
2404 ieee80211_stop_queues(mors->hw);
2405 ieee80211_unregister_hw(mors->hw);
2406
2407 mm81x_hif_flush_tx_data(mors);
2408 mm81x_hif_flush_cmds(mors);
2409 mm81x_stale_tx_status_timer_finish(mors);
2410 mm81x_ps_finish(mors);
2411
2412 kfree(mors->mcast_filter);
2413 }
2414
mm81x_mac_alloc(size_t priv_size,struct device * dev)2415 struct mm81x *mm81x_mac_alloc(size_t priv_size, struct device *dev)
2416 {
2417 struct ieee80211_hw *hw;
2418 struct mm81x *mors;
2419
2420 hw = ieee80211_alloc_hw(sizeof(*mors) + priv_size, &mm81x_ops);
2421 if (!hw) {
2422 dev_err(dev, "ieee80211_alloc_hw failed\r\n");
2423 return NULL;
2424 }
2425
2426 SET_IEEE80211_DEV(hw, dev);
2427 memset(hw->priv, 0, sizeof(*mors));
2428
2429 mors = hw->priv;
2430 mors->hw = hw;
2431 mors->dev = dev;
2432 mutex_init(&mors->cmd_lock);
2433 mutex_init(&mors->cmd_wait);
2434 init_waitqueue_head(&mors->tx_empty_waitq);
2435
2436 return mors;
2437 }
2438
mm81x_mac_free(struct mm81x * mors)2439 void mm81x_mac_free(struct mm81x *mors)
2440 {
2441 ieee80211_free_hw(mors->hw);
2442 }
2443