1 // SPDX-License-Identifier: GPL-2.0-only 2 /* Analog Devices 1889 audio driver 3 * 4 * This is a driver for the AD1889 PCI audio chipset found 5 * on the HP PA-RISC [BCJ]-xxx0 workstations. 6 * 7 * Copyright (C) 2004-2005, Kyle McMartin <kyle@parisc-linux.org> 8 * Copyright (C) 2005, Thibaut Varene <varenet@parisc-linux.org> 9 * Based on the OSS AD1889 driver by Randolph Chung <tausq@debian.org> 10 * 11 * TODO: 12 * Do we need to take care of CCS register? 13 * Maybe we could use finer grained locking (separate locks for pb/cap)? 14 * Wishlist: 15 * Control Interface (mixer) support 16 * Better AC97 support (VSR...)? 17 * PM support 18 * MIDI support 19 * Game Port support 20 * SG DMA support (this will need *a lot* of work) 21 */ 22 23 #include <linux/init.h> 24 #include <linux/pci.h> 25 #include <linux/dma-mapping.h> 26 #include <linux/slab.h> 27 #include <linux/interrupt.h> 28 #include <linux/compiler.h> 29 #include <linux/delay.h> 30 #include <linux/module.h> 31 #include <linux/io.h> 32 33 #include <sound/core.h> 34 #include <sound/pcm.h> 35 #include <sound/initval.h> 36 #include <sound/ac97_codec.h> 37 38 #include "ad1889.h" 39 #include "ac97/ac97_id.h" 40 41 #define AD1889_DRVVER "Version: 1.7" 42 43 MODULE_AUTHOR("Kyle McMartin <kyle@parisc-linux.org>, Thibaut Varene <t-bone@parisc-linux.org>"); 44 MODULE_DESCRIPTION("Analog Devices AD1889 ALSA sound driver"); 45 MODULE_LICENSE("GPL"); 46 47 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; 48 module_param_array(index, int, NULL, 0444); 49 MODULE_PARM_DESC(index, "Index value for the AD1889 soundcard."); 50 51 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; 52 module_param_array(id, charp, NULL, 0444); 53 MODULE_PARM_DESC(id, "ID string for the AD1889 soundcard."); 54 55 static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; 56 module_param_array(enable, bool, NULL, 0444); 57 MODULE_PARM_DESC(enable, "Enable AD1889 soundcard."); 58 59 static char *ac97_quirk[SNDRV_CARDS]; 60 module_param_array(ac97_quirk, charp, NULL, 0444); 61 MODULE_PARM_DESC(ac97_quirk, "AC'97 workaround for strange hardware."); 62 63 #define DEVNAME "ad1889" 64 #define PFX DEVNAME ": " 65 66 /* keep track of some hw registers */ 67 struct ad1889_register_state { 68 u16 reg; /* reg setup */ 69 u32 addr; /* dma base address */ 70 unsigned long size; /* DMA buffer size */ 71 }; 72 73 struct snd_ad1889 { 74 struct snd_card *card; 75 struct pci_dev *pci; 76 77 int irq; 78 unsigned long bar; 79 void __iomem *iobase; 80 81 struct snd_ac97 *ac97; 82 struct snd_ac97_bus *ac97_bus; 83 struct snd_pcm *pcm; 84 struct snd_info_entry *proc; 85 86 struct snd_pcm_substream *psubs; 87 struct snd_pcm_substream *csubs; 88 89 /* playback register state */ 90 struct ad1889_register_state wave; 91 struct ad1889_register_state ramc; 92 93 spinlock_t lock; 94 }; 95 96 static inline u16 97 ad1889_readw(struct snd_ad1889 *chip, unsigned reg) 98 { 99 return readw(chip->iobase + reg); 100 } 101 102 static inline void 103 ad1889_writew(struct snd_ad1889 *chip, unsigned reg, u16 val) 104 { 105 writew(val, chip->iobase + reg); 106 } 107 108 static inline u32 109 ad1889_readl(struct snd_ad1889 *chip, unsigned reg) 110 { 111 return readl(chip->iobase + reg); 112 } 113 114 static inline void 115 ad1889_writel(struct snd_ad1889 *chip, unsigned reg, u32 val) 116 { 117 writel(val, chip->iobase + reg); 118 } 119 120 static inline void 121 ad1889_unmute(struct snd_ad1889 *chip) 122 { 123 u16 st; 124 st = ad1889_readw(chip, AD_DS_WADA) & 125 ~(AD_DS_WADA_RWAM | AD_DS_WADA_LWAM); 126 ad1889_writew(chip, AD_DS_WADA, st); 127 ad1889_readw(chip, AD_DS_WADA); 128 } 129 130 static inline void 131 ad1889_mute(struct snd_ad1889 *chip) 132 { 133 u16 st; 134 st = ad1889_readw(chip, AD_DS_WADA) | AD_DS_WADA_RWAM | AD_DS_WADA_LWAM; 135 ad1889_writew(chip, AD_DS_WADA, st); 136 ad1889_readw(chip, AD_DS_WADA); 137 } 138 139 static inline void 140 ad1889_load_adc_buffer_address(struct snd_ad1889 *chip, u32 address) 141 { 142 ad1889_writel(chip, AD_DMA_ADCBA, address); 143 ad1889_writel(chip, AD_DMA_ADCCA, address); 144 } 145 146 static inline void 147 ad1889_load_adc_buffer_count(struct snd_ad1889 *chip, u32 count) 148 { 149 ad1889_writel(chip, AD_DMA_ADCBC, count); 150 ad1889_writel(chip, AD_DMA_ADCCC, count); 151 } 152 153 static inline void 154 ad1889_load_adc_interrupt_count(struct snd_ad1889 *chip, u32 count) 155 { 156 ad1889_writel(chip, AD_DMA_ADCIB, count); 157 ad1889_writel(chip, AD_DMA_ADCIC, count); 158 } 159 160 static inline void 161 ad1889_load_wave_buffer_address(struct snd_ad1889 *chip, u32 address) 162 { 163 ad1889_writel(chip, AD_DMA_WAVBA, address); 164 ad1889_writel(chip, AD_DMA_WAVCA, address); 165 } 166 167 static inline void 168 ad1889_load_wave_buffer_count(struct snd_ad1889 *chip, u32 count) 169 { 170 ad1889_writel(chip, AD_DMA_WAVBC, count); 171 ad1889_writel(chip, AD_DMA_WAVCC, count); 172 } 173 174 static inline void 175 ad1889_load_wave_interrupt_count(struct snd_ad1889 *chip, u32 count) 176 { 177 ad1889_writel(chip, AD_DMA_WAVIB, count); 178 ad1889_writel(chip, AD_DMA_WAVIC, count); 179 } 180 181 static void 182 ad1889_channel_reset(struct snd_ad1889 *chip, unsigned int channel) 183 { 184 u16 reg; 185 186 if (channel & AD_CHAN_WAV) { 187 /* Disable wave channel */ 188 reg = ad1889_readw(chip, AD_DS_WSMC) & ~AD_DS_WSMC_WAEN; 189 ad1889_writew(chip, AD_DS_WSMC, reg); 190 chip->wave.reg = reg; 191 192 /* disable IRQs */ 193 reg = ad1889_readw(chip, AD_DMA_WAV); 194 reg &= AD_DMA_IM_DIS; 195 reg &= ~AD_DMA_LOOP; 196 ad1889_writew(chip, AD_DMA_WAV, reg); 197 198 /* clear IRQ and address counters and pointers */ 199 ad1889_load_wave_buffer_address(chip, 0x0); 200 ad1889_load_wave_buffer_count(chip, 0x0); 201 ad1889_load_wave_interrupt_count(chip, 0x0); 202 203 /* flush */ 204 ad1889_readw(chip, AD_DMA_WAV); 205 } 206 207 if (channel & AD_CHAN_ADC) { 208 /* Disable ADC channel */ 209 reg = ad1889_readw(chip, AD_DS_RAMC) & ~AD_DS_RAMC_ADEN; 210 ad1889_writew(chip, AD_DS_RAMC, reg); 211 chip->ramc.reg = reg; 212 213 reg = ad1889_readw(chip, AD_DMA_ADC); 214 reg &= AD_DMA_IM_DIS; 215 reg &= ~AD_DMA_LOOP; 216 ad1889_writew(chip, AD_DMA_ADC, reg); 217 218 ad1889_load_adc_buffer_address(chip, 0x0); 219 ad1889_load_adc_buffer_count(chip, 0x0); 220 ad1889_load_adc_interrupt_count(chip, 0x0); 221 222 /* flush */ 223 ad1889_readw(chip, AD_DMA_ADC); 224 } 225 } 226 227 static u16 228 snd_ad1889_ac97_read(struct snd_ac97 *ac97, unsigned short reg) 229 { 230 struct snd_ad1889 *chip = ac97->private_data; 231 return ad1889_readw(chip, AD_AC97_BASE + reg); 232 } 233 234 static void 235 snd_ad1889_ac97_write(struct snd_ac97 *ac97, unsigned short reg, unsigned short val) 236 { 237 struct snd_ad1889 *chip = ac97->private_data; 238 ad1889_writew(chip, AD_AC97_BASE + reg, val); 239 } 240 241 static int 242 snd_ad1889_ac97_ready(struct snd_ad1889 *chip) 243 { 244 int retry = 400; /* average needs 352 msec */ 245 246 while (!(ad1889_readw(chip, AD_AC97_ACIC) & AD_AC97_ACIC_ACRDY) 247 && --retry) 248 usleep_range(1000, 2000); 249 if (!retry) { 250 dev_err(chip->card->dev, "[%s] Link is not ready.\n", 251 __func__); 252 return -EIO; 253 } 254 dev_dbg(chip->card->dev, "[%s] ready after %d ms\n", __func__, 400 - retry); 255 256 return 0; 257 } 258 259 static const struct snd_pcm_hardware snd_ad1889_playback_hw = { 260 .info = SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | 261 SNDRV_PCM_INFO_MMAP_VALID | SNDRV_PCM_INFO_BLOCK_TRANSFER, 262 .formats = SNDRV_PCM_FMTBIT_S16_LE, 263 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000, 264 .rate_min = 8000, /* docs say 7000, but we're lazy */ 265 .rate_max = 48000, 266 .channels_min = 1, 267 .channels_max = 2, 268 .buffer_bytes_max = BUFFER_BYTES_MAX, 269 .period_bytes_min = PERIOD_BYTES_MIN, 270 .period_bytes_max = PERIOD_BYTES_MAX, 271 .periods_min = PERIODS_MIN, 272 .periods_max = PERIODS_MAX, 273 /*.fifo_size = 0,*/ 274 }; 275 276 static const struct snd_pcm_hardware snd_ad1889_capture_hw = { 277 .info = SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | 278 SNDRV_PCM_INFO_MMAP_VALID | SNDRV_PCM_INFO_BLOCK_TRANSFER, 279 .formats = SNDRV_PCM_FMTBIT_S16_LE, 280 .rates = SNDRV_PCM_RATE_48000, 281 .rate_min = 48000, /* docs say we could to VSR, but we're lazy */ 282 .rate_max = 48000, 283 .channels_min = 1, 284 .channels_max = 2, 285 .buffer_bytes_max = BUFFER_BYTES_MAX, 286 .period_bytes_min = PERIOD_BYTES_MIN, 287 .period_bytes_max = PERIOD_BYTES_MAX, 288 .periods_min = PERIODS_MIN, 289 .periods_max = PERIODS_MAX, 290 /*.fifo_size = 0,*/ 291 }; 292 293 static int 294 snd_ad1889_playback_open(struct snd_pcm_substream *ss) 295 { 296 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss); 297 struct snd_pcm_runtime *rt = ss->runtime; 298 299 chip->psubs = ss; 300 rt->hw = snd_ad1889_playback_hw; 301 302 return 0; 303 } 304 305 static int 306 snd_ad1889_capture_open(struct snd_pcm_substream *ss) 307 { 308 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss); 309 struct snd_pcm_runtime *rt = ss->runtime; 310 311 chip->csubs = ss; 312 rt->hw = snd_ad1889_capture_hw; 313 314 return 0; 315 } 316 317 static int 318 snd_ad1889_playback_close(struct snd_pcm_substream *ss) 319 { 320 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss); 321 chip->psubs = NULL; 322 return 0; 323 } 324 325 static int 326 snd_ad1889_capture_close(struct snd_pcm_substream *ss) 327 { 328 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss); 329 chip->csubs = NULL; 330 return 0; 331 } 332 333 static int 334 snd_ad1889_playback_prepare(struct snd_pcm_substream *ss) 335 { 336 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss); 337 struct snd_pcm_runtime *rt = ss->runtime; 338 unsigned int size = snd_pcm_lib_buffer_bytes(ss); 339 unsigned int count = snd_pcm_lib_period_bytes(ss); 340 u16 reg; 341 342 ad1889_channel_reset(chip, AD_CHAN_WAV); 343 344 reg = ad1889_readw(chip, AD_DS_WSMC); 345 346 /* Mask out 16-bit / Stereo */ 347 reg &= ~(AD_DS_WSMC_WA16 | AD_DS_WSMC_WAST); 348 349 if (snd_pcm_format_width(rt->format) == 16) 350 reg |= AD_DS_WSMC_WA16; 351 352 if (rt->channels > 1) 353 reg |= AD_DS_WSMC_WAST; 354 355 /* let's make sure we don't clobber ourselves */ 356 guard(spinlock_irq)(&chip->lock); 357 358 chip->wave.size = size; 359 chip->wave.reg = reg; 360 chip->wave.addr = rt->dma_addr; 361 362 ad1889_writew(chip, AD_DS_WSMC, chip->wave.reg); 363 364 /* Set sample rates on the codec */ 365 ad1889_writew(chip, AD_DS_WAS, rt->rate); 366 367 /* Set up DMA */ 368 ad1889_load_wave_buffer_address(chip, chip->wave.addr); 369 ad1889_load_wave_buffer_count(chip, size); 370 ad1889_load_wave_interrupt_count(chip, count); 371 372 /* writes flush */ 373 ad1889_readw(chip, AD_DS_WSMC); 374 375 dev_dbg(chip->card->dev, 376 "prepare playback: addr = 0x%x, count = %u, size = %u, reg = 0x%x, rate = %u\n", 377 chip->wave.addr, count, size, reg, rt->rate); 378 return 0; 379 } 380 381 static int 382 snd_ad1889_capture_prepare(struct snd_pcm_substream *ss) 383 { 384 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss); 385 struct snd_pcm_runtime *rt = ss->runtime; 386 unsigned int size = snd_pcm_lib_buffer_bytes(ss); 387 unsigned int count = snd_pcm_lib_period_bytes(ss); 388 u16 reg; 389 390 ad1889_channel_reset(chip, AD_CHAN_ADC); 391 392 reg = ad1889_readw(chip, AD_DS_RAMC); 393 394 /* Mask out 16-bit / Stereo */ 395 reg &= ~(AD_DS_RAMC_AD16 | AD_DS_RAMC_ADST); 396 397 if (snd_pcm_format_width(rt->format) == 16) 398 reg |= AD_DS_RAMC_AD16; 399 400 if (rt->channels > 1) 401 reg |= AD_DS_RAMC_ADST; 402 403 /* let's make sure we don't clobber ourselves */ 404 guard(spinlock_irq)(&chip->lock); 405 406 chip->ramc.size = size; 407 chip->ramc.reg = reg; 408 chip->ramc.addr = rt->dma_addr; 409 410 ad1889_writew(chip, AD_DS_RAMC, chip->ramc.reg); 411 412 /* Set up DMA */ 413 ad1889_load_adc_buffer_address(chip, chip->ramc.addr); 414 ad1889_load_adc_buffer_count(chip, size); 415 ad1889_load_adc_interrupt_count(chip, count); 416 417 /* writes flush */ 418 ad1889_readw(chip, AD_DS_RAMC); 419 420 dev_dbg(chip->card->dev, 421 "prepare capture: addr = 0x%x, count = %u, size = %u, reg = 0x%x, rate = %u\n", 422 chip->ramc.addr, count, size, reg, rt->rate); 423 return 0; 424 } 425 426 /* this is called in atomic context with IRQ disabled. 427 Must be as fast as possible and not sleep. 428 DMA should be *triggered* by this call. 429 The WSMC "WAEN" bit triggers DMA Wave On/Off */ 430 static int 431 snd_ad1889_playback_trigger(struct snd_pcm_substream *ss, int cmd) 432 { 433 u16 wsmc; 434 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss); 435 436 wsmc = ad1889_readw(chip, AD_DS_WSMC); 437 438 switch (cmd) { 439 case SNDRV_PCM_TRIGGER_START: 440 /* enable DMA loop & interrupts */ 441 ad1889_writew(chip, AD_DMA_WAV, AD_DMA_LOOP | AD_DMA_IM_CNT); 442 wsmc |= AD_DS_WSMC_WAEN; 443 /* 1 to clear CHSS bit */ 444 ad1889_writel(chip, AD_DMA_CHSS, AD_DMA_CHSS_WAVS); 445 ad1889_unmute(chip); 446 break; 447 case SNDRV_PCM_TRIGGER_STOP: 448 ad1889_mute(chip); 449 wsmc &= ~AD_DS_WSMC_WAEN; 450 break; 451 default: 452 snd_BUG(); 453 return -EINVAL; 454 } 455 456 chip->wave.reg = wsmc; 457 ad1889_writew(chip, AD_DS_WSMC, wsmc); 458 ad1889_readw(chip, AD_DS_WSMC); /* flush */ 459 460 /* reset the chip when STOP - will disable IRQs */ 461 if (cmd == SNDRV_PCM_TRIGGER_STOP) 462 ad1889_channel_reset(chip, AD_CHAN_WAV); 463 464 return 0; 465 } 466 467 /* this is called in atomic context with IRQ disabled. 468 Must be as fast as possible and not sleep. 469 DMA should be *triggered* by this call. 470 The RAMC "ADEN" bit triggers DMA ADC On/Off */ 471 static int 472 snd_ad1889_capture_trigger(struct snd_pcm_substream *ss, int cmd) 473 { 474 u16 ramc; 475 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss); 476 477 ramc = ad1889_readw(chip, AD_DS_RAMC); 478 479 switch (cmd) { 480 case SNDRV_PCM_TRIGGER_START: 481 /* enable DMA loop & interrupts */ 482 ad1889_writew(chip, AD_DMA_ADC, AD_DMA_LOOP | AD_DMA_IM_CNT); 483 ramc |= AD_DS_RAMC_ADEN; 484 /* 1 to clear CHSS bit */ 485 ad1889_writel(chip, AD_DMA_CHSS, AD_DMA_CHSS_ADCS); 486 break; 487 case SNDRV_PCM_TRIGGER_STOP: 488 ramc &= ~AD_DS_RAMC_ADEN; 489 break; 490 default: 491 return -EINVAL; 492 } 493 494 chip->ramc.reg = ramc; 495 ad1889_writew(chip, AD_DS_RAMC, ramc); 496 ad1889_readw(chip, AD_DS_RAMC); /* flush */ 497 498 /* reset the chip when STOP - will disable IRQs */ 499 if (cmd == SNDRV_PCM_TRIGGER_STOP) 500 ad1889_channel_reset(chip, AD_CHAN_ADC); 501 502 return 0; 503 } 504 505 /* Called in atomic context with IRQ disabled */ 506 static snd_pcm_uframes_t 507 snd_ad1889_playback_pointer(struct snd_pcm_substream *ss) 508 { 509 size_t ptr = 0; 510 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss); 511 512 if (unlikely(!(chip->wave.reg & AD_DS_WSMC_WAEN))) 513 return 0; 514 515 ptr = ad1889_readl(chip, AD_DMA_WAVCA); 516 ptr -= chip->wave.addr; 517 518 if (snd_BUG_ON(ptr >= chip->wave.size)) 519 return 0; 520 521 return bytes_to_frames(ss->runtime, ptr); 522 } 523 524 /* Called in atomic context with IRQ disabled */ 525 static snd_pcm_uframes_t 526 snd_ad1889_capture_pointer(struct snd_pcm_substream *ss) 527 { 528 size_t ptr = 0; 529 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss); 530 531 if (unlikely(!(chip->ramc.reg & AD_DS_RAMC_ADEN))) 532 return 0; 533 534 ptr = ad1889_readl(chip, AD_DMA_ADCCA); 535 ptr -= chip->ramc.addr; 536 537 if (snd_BUG_ON(ptr >= chip->ramc.size)) 538 return 0; 539 540 return bytes_to_frames(ss->runtime, ptr); 541 } 542 543 static const struct snd_pcm_ops snd_ad1889_playback_ops = { 544 .open = snd_ad1889_playback_open, 545 .close = snd_ad1889_playback_close, 546 .prepare = snd_ad1889_playback_prepare, 547 .trigger = snd_ad1889_playback_trigger, 548 .pointer = snd_ad1889_playback_pointer, 549 }; 550 551 static const struct snd_pcm_ops snd_ad1889_capture_ops = { 552 .open = snd_ad1889_capture_open, 553 .close = snd_ad1889_capture_close, 554 .prepare = snd_ad1889_capture_prepare, 555 .trigger = snd_ad1889_capture_trigger, 556 .pointer = snd_ad1889_capture_pointer, 557 }; 558 559 static irqreturn_t 560 snd_ad1889_interrupt(int irq, void *dev_id) 561 { 562 unsigned long st; 563 struct snd_ad1889 *chip = dev_id; 564 565 st = ad1889_readl(chip, AD_DMA_DISR); 566 567 /* clear ISR */ 568 ad1889_writel(chip, AD_DMA_DISR, st); 569 570 st &= AD_INTR_MASK; 571 572 if (unlikely(!st)) 573 return IRQ_NONE; 574 575 if (st & (AD_DMA_DISR_PMAI|AD_DMA_DISR_PTAI)) 576 dev_dbg(chip->card->dev, 577 "Unexpected master or target abort interrupt!\n"); 578 579 if ((st & AD_DMA_DISR_WAVI) && chip->psubs) 580 snd_pcm_period_elapsed(chip->psubs); 581 if ((st & AD_DMA_DISR_ADCI) && chip->csubs) 582 snd_pcm_period_elapsed(chip->csubs); 583 584 return IRQ_HANDLED; 585 } 586 587 static int 588 snd_ad1889_pcm_init(struct snd_ad1889 *chip, int device) 589 { 590 int err; 591 struct snd_pcm *pcm; 592 593 err = snd_pcm_new(chip->card, chip->card->driver, device, 1, 1, &pcm); 594 if (err < 0) 595 return err; 596 597 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, 598 &snd_ad1889_playback_ops); 599 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, 600 &snd_ad1889_capture_ops); 601 602 pcm->private_data = chip; 603 pcm->info_flags = 0; 604 strscpy(pcm->name, chip->card->shortname); 605 606 chip->pcm = pcm; 607 chip->psubs = NULL; 608 chip->csubs = NULL; 609 610 snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV, &chip->pci->dev, 611 BUFFER_BYTES_MAX / 2, BUFFER_BYTES_MAX); 612 613 return 0; 614 } 615 616 static void 617 snd_ad1889_proc_read(struct snd_info_entry *entry, struct snd_info_buffer *buffer) 618 { 619 struct snd_ad1889 *chip = entry->private_data; 620 u16 reg; 621 int tmp; 622 623 reg = ad1889_readw(chip, AD_DS_WSMC); 624 snd_iprintf(buffer, "Wave output: %s\n", 625 str_enabled_disabled(reg & AD_DS_WSMC_WAEN)); 626 snd_iprintf(buffer, "Wave Channels: %s\n", 627 (reg & AD_DS_WSMC_WAST) ? "stereo" : "mono"); 628 snd_iprintf(buffer, "Wave Quality: %d-bit linear\n", 629 (reg & AD_DS_WSMC_WA16) ? 16 : 8); 630 631 /* WARQ is at offset 12 */ 632 tmp = (reg & AD_DS_WSMC_WARQ) ? 633 ((((reg & AD_DS_WSMC_WARQ) >> 12) & 0x01) ? 12 : 18) : 4; 634 tmp /= (reg & AD_DS_WSMC_WAST) ? 2 : 1; 635 636 snd_iprintf(buffer, "Wave FIFO: %d %s words\n\n", tmp, 637 (reg & AD_DS_WSMC_WAST) ? "stereo" : "mono"); 638 639 640 snd_iprintf(buffer, "Synthesis output: %s\n", 641 str_enabled_disabled(reg & AD_DS_WSMC_SYEN)); 642 643 /* SYRQ is at offset 4 */ 644 tmp = (reg & AD_DS_WSMC_SYRQ) ? 645 ((((reg & AD_DS_WSMC_SYRQ) >> 4) & 0x01) ? 12 : 18) : 4; 646 tmp /= (reg & AD_DS_WSMC_WAST) ? 2 : 1; 647 648 snd_iprintf(buffer, "Synthesis FIFO: %d %s words\n\n", tmp, 649 (reg & AD_DS_WSMC_WAST) ? "stereo" : "mono"); 650 651 reg = ad1889_readw(chip, AD_DS_RAMC); 652 snd_iprintf(buffer, "ADC input: %s\n", 653 str_enabled_disabled(reg & AD_DS_RAMC_ADEN)); 654 snd_iprintf(buffer, "ADC Channels: %s\n", 655 (reg & AD_DS_RAMC_ADST) ? "stereo" : "mono"); 656 snd_iprintf(buffer, "ADC Quality: %d-bit linear\n", 657 (reg & AD_DS_RAMC_AD16) ? 16 : 8); 658 659 /* ACRQ is at offset 4 */ 660 tmp = (reg & AD_DS_RAMC_ACRQ) ? 661 ((((reg & AD_DS_RAMC_ACRQ) >> 4) & 0x01) ? 12 : 18) : 4; 662 tmp /= (reg & AD_DS_RAMC_ADST) ? 2 : 1; 663 664 snd_iprintf(buffer, "ADC FIFO: %d %s words\n\n", tmp, 665 (reg & AD_DS_RAMC_ADST) ? "stereo" : "mono"); 666 667 snd_iprintf(buffer, "Resampler input: %s\n", 668 str_enabled_disabled(reg & AD_DS_RAMC_REEN)); 669 670 /* RERQ is at offset 12 */ 671 tmp = (reg & AD_DS_RAMC_RERQ) ? 672 ((((reg & AD_DS_RAMC_RERQ) >> 12) & 0x01) ? 12 : 18) : 4; 673 tmp /= (reg & AD_DS_RAMC_ADST) ? 2 : 1; 674 675 snd_iprintf(buffer, "Resampler FIFO: %d %s words\n\n", tmp, 676 (reg & AD_DS_WSMC_WAST) ? "stereo" : "mono"); 677 678 679 /* doc says LSB represents -1.5dB, but the max value (-94.5dB) 680 suggests that LSB is -3dB, which is more coherent with the logarithmic 681 nature of the dB scale */ 682 reg = ad1889_readw(chip, AD_DS_WADA); 683 snd_iprintf(buffer, "Left: %s, -%d dB\n", 684 (reg & AD_DS_WADA_LWAM) ? "mute" : "unmute", 685 ((reg & AD_DS_WADA_LWAA) >> 8) * 3); 686 reg = ad1889_readw(chip, AD_DS_WADA); 687 snd_iprintf(buffer, "Right: %s, -%d dB\n", 688 (reg & AD_DS_WADA_RWAM) ? "mute" : "unmute", 689 (reg & AD_DS_WADA_RWAA) * 3); 690 691 reg = ad1889_readw(chip, AD_DS_WAS); 692 snd_iprintf(buffer, "Wave samplerate: %u Hz\n", reg); 693 reg = ad1889_readw(chip, AD_DS_RES); 694 snd_iprintf(buffer, "Resampler samplerate: %u Hz\n", reg); 695 } 696 697 static void 698 snd_ad1889_proc_init(struct snd_ad1889 *chip) 699 { 700 snd_card_ro_proc_new(chip->card, chip->card->driver, 701 chip, snd_ad1889_proc_read); 702 } 703 704 static const struct ac97_quirk ac97_quirks[] = { 705 { 706 .subvendor = 0x11d4, /* AD */ 707 .subdevice = 0x1889, /* AD1889 */ 708 .codec_id = AC97_ID_AD1819, 709 .name = "AD1889", 710 .type = AC97_TUNE_HP_ONLY 711 }, 712 { } /* terminator */ 713 }; 714 715 static void 716 snd_ad1889_ac97_xinit(struct snd_ad1889 *chip) 717 { 718 u16 reg; 719 720 reg = ad1889_readw(chip, AD_AC97_ACIC); 721 reg |= AD_AC97_ACIC_ACRD; /* Reset Disable */ 722 ad1889_writew(chip, AD_AC97_ACIC, reg); 723 ad1889_readw(chip, AD_AC97_ACIC); /* flush posted write */ 724 udelay(10); 725 /* Interface Enable */ 726 reg |= AD_AC97_ACIC_ACIE; 727 ad1889_writew(chip, AD_AC97_ACIC, reg); 728 729 snd_ad1889_ac97_ready(chip); 730 731 /* Audio Stream Output | Variable Sample Rate Mode */ 732 reg = ad1889_readw(chip, AD_AC97_ACIC); 733 reg |= AD_AC97_ACIC_ASOE | AD_AC97_ACIC_VSRM; 734 ad1889_writew(chip, AD_AC97_ACIC, reg); 735 ad1889_readw(chip, AD_AC97_ACIC); /* flush posted write */ 736 737 } 738 739 static int 740 snd_ad1889_ac97_init(struct snd_ad1889 *chip, const char *quirk_override) 741 { 742 int err; 743 struct snd_ac97_template ac97; 744 static const struct snd_ac97_bus_ops ops = { 745 .write = snd_ad1889_ac97_write, 746 .read = snd_ad1889_ac97_read, 747 }; 748 749 /* doing that here, it works. */ 750 snd_ad1889_ac97_xinit(chip); 751 752 err = snd_ac97_bus(chip->card, 0, &ops, chip, &chip->ac97_bus); 753 if (err < 0) 754 return err; 755 756 memset(&ac97, 0, sizeof(ac97)); 757 ac97.private_data = chip; 758 ac97.pci = chip->pci; 759 760 err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97); 761 if (err < 0) 762 return err; 763 764 snd_ac97_tune_hardware(chip->ac97, ac97_quirks, quirk_override); 765 766 return 0; 767 } 768 769 static void 770 snd_ad1889_free(struct snd_card *card) 771 { 772 struct snd_ad1889 *chip = card->private_data; 773 774 guard(spinlock_irq)(&chip->lock); 775 776 ad1889_mute(chip); 777 778 /* Turn off interrupt on count and zero DMA registers */ 779 ad1889_channel_reset(chip, AD_CHAN_WAV | AD_CHAN_ADC); 780 781 /* clear DISR. If we don't, we'd better jump off the Eiffel Tower */ 782 ad1889_writel(chip, AD_DMA_DISR, AD_DMA_DISR_PTAI | AD_DMA_DISR_PMAI); 783 ad1889_readl(chip, AD_DMA_DISR); /* flush, dammit! */ 784 } 785 786 static int 787 snd_ad1889_create(struct snd_card *card, struct pci_dev *pci) 788 { 789 struct snd_ad1889 *chip = card->private_data; 790 int err; 791 792 err = pcim_enable_device(pci); 793 if (err < 0) 794 return err; 795 796 /* check PCI availability (32bit DMA) */ 797 if (dma_set_mask_and_coherent(&pci->dev, DMA_BIT_MASK(32))) { 798 dev_err(card->dev, "error setting 32-bit DMA mask.\n"); 799 return -ENXIO; 800 } 801 802 chip->card = card; 803 chip->pci = pci; 804 chip->irq = -1; 805 806 /* (1) PCI resource allocation */ 807 chip->iobase = pcim_iomap_region(pci, 0, card->driver); 808 if (IS_ERR(chip->iobase)) 809 return PTR_ERR(chip->iobase); 810 811 chip->bar = pci_resource_start(pci, 0); 812 813 pci_set_master(pci); 814 815 spin_lock_init(&chip->lock); /* only now can we call ad1889_free */ 816 817 if (devm_request_irq(&pci->dev, pci->irq, snd_ad1889_interrupt, 818 IRQF_SHARED, KBUILD_MODNAME, chip)) { 819 dev_err(card->dev, "cannot obtain IRQ %d\n", pci->irq); 820 return -EBUSY; 821 } 822 823 chip->irq = pci->irq; 824 card->sync_irq = chip->irq; 825 card->private_free = snd_ad1889_free; 826 827 /* (2) initialization of the chip hardware */ 828 ad1889_writew(chip, AD_DS_CCS, AD_DS_CCS_CLKEN); /* turn on clock */ 829 ad1889_readw(chip, AD_DS_CCS); /* flush posted write */ 830 831 usleep_range(10000, 11000); 832 833 /* enable Master and Target abort interrupts */ 834 ad1889_writel(chip, AD_DMA_DISR, AD_DMA_DISR_PMAE | AD_DMA_DISR_PTAE); 835 836 return 0; 837 } 838 839 static int 840 __snd_ad1889_probe(struct pci_dev *pci, 841 const struct pci_device_id *pci_id) 842 { 843 int err; 844 static int devno; 845 struct snd_card *card; 846 struct snd_ad1889 *chip; 847 848 /* (1) */ 849 if (devno >= SNDRV_CARDS) 850 return -ENODEV; 851 if (!enable[devno]) { 852 devno++; 853 return -ENOENT; 854 } 855 856 /* (2) */ 857 err = snd_devm_card_new(&pci->dev, index[devno], id[devno], THIS_MODULE, 858 sizeof(*chip), &card); 859 if (err < 0) 860 return err; 861 chip = card->private_data; 862 863 strscpy(card->driver, "AD1889"); 864 strscpy(card->shortname, "Analog Devices AD1889"); 865 866 /* (3) */ 867 err = snd_ad1889_create(card, pci); 868 if (err < 0) 869 return err; 870 871 /* (4) */ 872 sprintf(card->longname, "%s at 0x%lx irq %i", 873 card->shortname, chip->bar, chip->irq); 874 875 /* (5) */ 876 /* register AC97 mixer */ 877 err = snd_ad1889_ac97_init(chip, ac97_quirk[devno]); 878 if (err < 0) 879 return err; 880 881 err = snd_ad1889_pcm_init(chip, 0); 882 if (err < 0) 883 return err; 884 885 /* register proc interface */ 886 snd_ad1889_proc_init(chip); 887 888 /* (6) */ 889 err = snd_card_register(card); 890 if (err < 0) 891 return err; 892 893 /* (7) */ 894 pci_set_drvdata(pci, card); 895 896 devno++; 897 return 0; 898 } 899 900 static int snd_ad1889_probe(struct pci_dev *pci, 901 const struct pci_device_id *pci_id) 902 { 903 return snd_card_free_on_error(&pci->dev, __snd_ad1889_probe(pci, pci_id)); 904 } 905 906 static const struct pci_device_id snd_ad1889_ids[] = { 907 { PCI_DEVICE(PCI_VENDOR_ID_ANALOG_DEVICES, PCI_DEVICE_ID_AD1889JS) }, 908 { 0, }, 909 }; 910 MODULE_DEVICE_TABLE(pci, snd_ad1889_ids); 911 912 static struct pci_driver ad1889_pci_driver = { 913 .name = KBUILD_MODNAME, 914 .id_table = snd_ad1889_ids, 915 .probe = snd_ad1889_probe, 916 }; 917 918 module_pci_driver(ad1889_pci_driver); 919