xref: /linux/arch/riscv/include/asm/futex.h (revision 405290be962b32eec842776fbe3bdf81f15b1676)
1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3  * Copyright (c) 2006  Ralf Baechle (ralf@linux-mips.org)
4  * Copyright (c) 2018  Jim Wilson (jimw@sifive.com)
5  */
6 
7 #ifndef _ASM_RISCV_FUTEX_H
8 #define _ASM_RISCV_FUTEX_H
9 
10 #include <linux/futex.h>
11 #include <linux/uaccess.h>
12 #include <linux/errno.h>
13 #include <asm/asm.h>
14 #include <asm/asm-extable.h>
15 
16 /* We don't even really need the extable code, but for now keep it simple */
17 #ifndef CONFIG_MMU
18 #define __enable_user_access()		do { } while (0)
19 #define __disable_user_access()		do { } while (0)
20 #endif
21 
22 #define __futex_atomic_op(insn, ret, oldval, uaddr, oparg)	\
23 {								\
24 	__enable_user_access();					\
25 	__asm__ __volatile__ (					\
26 	"1:	" insn "				\n"	\
27 	"2:						\n"	\
28 	_ASM_EXTABLE_UACCESS_ERR(1b, 2b, %[r])			\
29 	: [r] "+r" (ret), [ov] "=&r" (oldval),			\
30 	  [u] "+m" (*uaddr)					\
31 	: [op] "Jr" (oparg)					\
32 	: "memory");						\
33 	__disable_user_access();				\
34 }
35 
36 static inline int
37 arch_futex_atomic_op_inuser(int op, int oparg, int *oval, u32 __user *uaddr)
38 {
39 	int oldval = 0, ret = 0;
40 
41 	if (!access_ok(uaddr, sizeof(u32)))
42 		return -EFAULT;
43 	uaddr = untagged_addr(uaddr);
44 
45 	switch (op) {
46 	case FUTEX_OP_SET:
47 		__futex_atomic_op("amoswap.w.aqrl %[ov],%z[op],%[u]",
48 				  ret, oldval, uaddr, oparg);
49 		break;
50 	case FUTEX_OP_ADD:
51 		__futex_atomic_op("amoadd.w.aqrl %[ov],%z[op],%[u]",
52 				  ret, oldval, uaddr, oparg);
53 		break;
54 	case FUTEX_OP_OR:
55 		__futex_atomic_op("amoor.w.aqrl %[ov],%z[op],%[u]",
56 				  ret, oldval, uaddr, oparg);
57 		break;
58 	case FUTEX_OP_ANDN:
59 		__futex_atomic_op("amoand.w.aqrl %[ov],%z[op],%[u]",
60 				  ret, oldval, uaddr, ~oparg);
61 		break;
62 	case FUTEX_OP_XOR:
63 		__futex_atomic_op("amoxor.w.aqrl %[ov],%z[op],%[u]",
64 				  ret, oldval, uaddr, oparg);
65 		break;
66 	default:
67 		ret = -ENOSYS;
68 	}
69 
70 	if (!ret)
71 		*oval = oldval;
72 
73 	return ret;
74 }
75 
76 static inline int
77 futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr,
78 			      u32 oldval, u32 newval)
79 {
80 	int ret = 0;
81 	u32 val;
82 	uintptr_t tmp;
83 
84 	if (!access_ok(uaddr, sizeof(u32)))
85 		return -EFAULT;
86 	uaddr = untagged_addr(uaddr);
87 
88 	__enable_user_access();
89 	__asm__ __volatile__ (
90 	"1:	lr.w %[v],%[u]			        \n"
91 	"	bne %[v],%z[ov],3f			\n"
92 	"2:	sc.w.aqrl %[t],%z[nv],%[u]		\n"
93 	"	bnez %[t],1b				\n"
94 	"3:						\n"
95 		_ASM_EXTABLE_UACCESS_ERR(1b, 3b, %[r])	\
96 		_ASM_EXTABLE_UACCESS_ERR(2b, 3b, %[r])	\
97 	: [r] "+r" (ret), [v] "=&r" (val), [u] "+m" (*uaddr), [t] "=&r" (tmp)
98 	: [ov] "Jr" ((long)(int)oldval), [nv] "Jr" (newval)
99 	: "memory");
100 	__disable_user_access();
101 
102 	*uval = val;
103 	return ret;
104 }
105 
106 #endif /* _ASM_RISCV_FUTEX_H */
107