1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef __ASM_ALTERNATIVE_MACROS_H
3 #define __ASM_ALTERNATIVE_MACROS_H
4
5 #include <linux/const.h>
6 #include <vdso/bits.h>
7
8 #include <asm/cpucaps.h>
9 #include <asm/insn-def.h>
10
11 /*
12 * Binutils 2.27.0 can't handle a 'UL' suffix on constants, so for the assembly
13 * macros below we must use we must use `(1 << ARM64_CB_SHIFT)`.
14 */
15 #define ARM64_CB_SHIFT 15
16 #define ARM64_CB_BIT BIT(ARM64_CB_SHIFT)
17
18 #if ARM64_NCAPS >= ARM64_CB_BIT
19 #error "cpucaps have overflown ARM64_CB_BIT"
20 #endif
21
22 #ifndef __ASSEMBLER__
23
24 #include <linux/stringify.h>
25
26 #define ALTINSTR_ENTRY(cpucap) \
27 " .word 661b - .\n" /* label */ \
28 " .word 663f - .\n" /* new instruction */ \
29 " .hword " __stringify(cpucap) "\n" /* cpucap */ \
30 " .byte 662b-661b\n" /* source len */ \
31 " .byte 664f-663f\n" /* replacement len */
32
33 #define ALTINSTR_ENTRY_CB(cpucap, cb) \
34 " .word 661b - .\n" /* label */ \
35 " .word " __stringify(cb) "- .\n" /* callback */ \
36 " .hword " __stringify(cpucap) "\n" /* cpucap */ \
37 " .byte 662b-661b\n" /* source len */ \
38 " .byte 664f-663f\n" /* replacement len */
39
40 /*
41 * alternative assembly primitive:
42 *
43 * If any of these .org directive fail, it means that insn1 and insn2
44 * don't have the same length. This used to be written as
45 *
46 * .if ((664b-663b) != (662b-661b))
47 * .error "Alternatives instruction length mismatch"
48 * .endif
49 *
50 * but most assemblers die if insn1 or insn2 have a .inst. This should
51 * be fixed in a binutils release posterior to 2.25.51.0.2 (anything
52 * containing commit 4e4d08cf7399b606 or c1baaddf8861).
53 *
54 * Alternatives with callbacks do not generate replacement instructions.
55 */
56 #define __ALTERNATIVE(oldinstr, newinstr, cpucap) \
57 "661:\n\t" \
58 oldinstr "\n" \
59 "662:\n" \
60 ".pushsection .altinstructions,\"a\"\n" \
61 ALTINSTR_ENTRY(cpucap) \
62 ".popsection\n" \
63 ".subsection 1\n" \
64 "663:\n\t" \
65 newinstr "\n" \
66 "664:\n\t" \
67 ".org . - (664b-663b) + (662b-661b)\n\t" \
68 ".org . - (662b-661b) + (664b-663b)\n\t" \
69 ".previous\n" \
70
71 #define __ALTERNATIVE_CB(oldinstr, cpucap, cb) \
72 "661:\n\t" \
73 oldinstr "\n" \
74 "662:\n" \
75 ".pushsection .altinstructions,\"a\"\n" \
76 ALTINSTR_ENTRY_CB(cpucap, cb) \
77 ".popsection\n" \
78 "663:\n\t" \
79 "664:\n\t" \
80
81 #define _ALTERNATIVE(oldinstr, newinstr, cpucap) \
82 __ALTERNATIVE(oldinstr, newinstr, cpucap)
83
84 #define ALTERNATIVE_CB(oldinstr, cpucap, cb) \
85 __ALTERNATIVE_CB(oldinstr, (1 << ARM64_CB_SHIFT) | (cpucap), cb)
86 #else
87
88 #include <asm/assembler.h>
89
90 .macro altinstruction_entry orig_offset alt_offset cpucap orig_len alt_len
91 .word \orig_offset - .
92 .word \alt_offset - .
93 .hword (\cpucap)
94 .byte \orig_len
95 .byte \alt_len
96 .endm
97
98 .macro alternative_insn insn1, insn2, cap
99 661: \insn1
100 662: .pushsection .altinstructions, "a"
101 altinstruction_entry 661b, 663f, \cap, 662b-661b, 664f-663f
102 .popsection
103 .subsection 1
104 663: \insn2
105 664: .org . - (664b-663b) + (662b-661b)
106 .org . - (662b-661b) + (664b-663b)
107 .previous
108 .endm
109
110 /*
111 * Alternative sequences
112 *
113 * The code for the case where the capability is not present will be
114 * assembled and linked as normal. There are no restrictions on this
115 * code.
116 *
117 * The code for the case where the capability is present will be
118 * assembled into a special section to be used for dynamic patching.
119 * Code for that case must:
120 *
121 * 1. Be exactly the same length (in bytes) as the default code
122 * sequence.
123 *
124 * 2. Not contain a branch target that is used outside of the
125 * alternative sequence it is defined in (branches into an
126 * alternative sequence are not fixed up).
127 */
128
129 /*
130 * Begin an alternative code sequence.
131 */
132 .macro alternative_if_not cap
133 .set .Lasm_alt_mode, 0
134 .pushsection .altinstructions, "a"
135 altinstruction_entry 661f, 663f, \cap, 662f-661f, 664f-663f
136 .popsection
137 661:
138 .endm
139
140 .macro alternative_if cap
141 .set .Lasm_alt_mode, 1
142 .pushsection .altinstructions, "a"
143 altinstruction_entry 663f, 661f, \cap, 664f-663f, 662f-661f
144 .popsection
145 .subsection 1
146 .align 2 /* So GAS knows label 661 is suitably aligned */
147 661:
148 .endm
149
150 .macro alternative_cb cap, cb
151 .set .Lasm_alt_mode, 0
152 .pushsection .altinstructions, "a"
153 altinstruction_entry 661f, \cb, (1 << ARM64_CB_SHIFT) | \cap, 662f-661f, 0
154 .popsection
155 661:
156 .endm
157
158 /*
159 * Provide the other half of the alternative code sequence.
160 */
161 .macro alternative_else
162 662:
163 .if .Lasm_alt_mode==0
164 .subsection 1
165 .else
166 .previous
167 .endif
168 663:
169 .endm
170
171 /*
172 * Complete an alternative code sequence.
173 */
174 .macro alternative_endif
175 664:
176 .org . - (664b-663b) + (662b-661b)
177 .org . - (662b-661b) + (664b-663b)
178 .if .Lasm_alt_mode==0
179 .previous
180 .endif
181 .endm
182
183 /*
184 * Callback-based alternative epilogue
185 */
186 .macro alternative_cb_end
187 662:
188 .endm
189
190 /*
191 * Provides a trivial alternative or default sequence consisting solely
192 * of NOPs. The number of NOPs is chosen automatically to match the
193 * previous case.
194 */
195 .macro alternative_else_nop_endif
196 alternative_else
197 nops (662b-661b) / AARCH64_INSN_SIZE
198 alternative_endif
199 .endm
200
201 #define _ALTERNATIVE(insn1, insn2, cap) \
202 alternative_insn insn1, insn2, cap
203
204 #endif /* __ASSEMBLER__ */
205
206 /*
207 * Usage: asm(ALTERNATIVE(oldinstr, newinstr, cpucap));
208 */
209 #define ALTERNATIVE(oldinstr, newinstr, cpucap) \
210 _ALTERNATIVE(oldinstr, newinstr, cpucap)
211
212 #ifndef __ASSEMBLER__
213
214 #include <linux/types.h>
215
216 static __always_inline bool
217 alternative_has_cap_likely(const unsigned long cpucap)
218 {
219 if (!cpucap_is_possible(cpucap))
220 return false;
221
222 asm goto(
223 #ifdef BUILD_VDSO
224 ALTERNATIVE("b %l[l_no]", "nop", %[cpucap])
225 #else
226 ALTERNATIVE_CB("b %l[l_no]", %[cpucap], alt_cb_patch_nops)
227 #endif
228 :
229 : [cpucap] "i" (cpucap)
230 :
231 : l_no);
232
233 return true;
234 l_no:
235 return false;
236 }
237
238 static __always_inline bool
alternative_has_cap_unlikely(const unsigned long cpucap)239 alternative_has_cap_unlikely(const unsigned long cpucap)
240 {
241 if (!cpucap_is_possible(cpucap))
242 return false;
243
244 asm goto(
245 ALTERNATIVE("nop", "b %l[l_yes]", %[cpucap])
246 :
247 : [cpucap] "i" (cpucap)
248 :
249 : l_yes);
250
251 return false;
252 l_yes:
253 return true;
254 }
255
256 #endif /* __ASSEMBLER__ */
257
258 #endif /* __ASM_ALTERNATIVE_MACROS_H */
259