xref: /linux/drivers/gpu/drm/i915/gt/uc/intel_huc.h (revision 2c1ed907520c50326b8f604907a8478b27881a2e)
1 /* SPDX-License-Identifier: MIT */
2 /*
3  * Copyright © 2014-2019 Intel Corporation
4  */
5 
6 #ifndef _INTEL_HUC_H_
7 #define _INTEL_HUC_H_
8 
9 #include "i915_reg_defs.h"
10 #include "i915_sw_fence.h"
11 #include "intel_uc_fw.h"
12 #include "intel_huc_fw.h"
13 
14 #include <linux/notifier.h>
15 #include <linux/hrtimer.h>
16 
17 struct bus_type;
18 struct i915_vma;
19 
20 enum intel_huc_delayed_load_status {
21 	INTEL_HUC_WAITING_ON_GSC = 0,
22 	INTEL_HUC_WAITING_ON_PXP,
23 	INTEL_HUC_DELAYED_LOAD_ERROR,
24 };
25 
26 enum intel_huc_authentication_type {
27 	INTEL_HUC_AUTH_BY_GUC = 0,
28 	INTEL_HUC_AUTH_BY_GSC,
29 	INTEL_HUC_AUTH_MAX_MODES
30 };
31 
32 struct intel_huc {
33 	/* Generic uC firmware management */
34 	struct intel_uc_fw fw;
35 
36 	/* HuC-specific additions */
37 	struct {
38 		i915_reg_t reg;
39 		u32 mask;
40 		u32 value;
41 	} status[INTEL_HUC_AUTH_MAX_MODES];
42 
43 	struct {
44 		struct i915_sw_fence fence;
45 		struct hrtimer timer;
46 		struct notifier_block nb;
47 		enum intel_huc_delayed_load_status status;
48 	} delayed_load;
49 
50 	/* for load via GSCCS */
51 	struct i915_vma *heci_pkt;
52 
53 	bool loaded_via_gsc;
54 };
55 
56 int intel_huc_sanitize(struct intel_huc *huc);
57 void intel_huc_init_early(struct intel_huc *huc);
58 int intel_huc_init(struct intel_huc *huc);
59 void intel_huc_fini(struct intel_huc *huc);
60 int intel_huc_auth(struct intel_huc *huc, enum intel_huc_authentication_type type);
61 int intel_huc_wait_for_auth_complete(struct intel_huc *huc,
62 				     enum intel_huc_authentication_type type);
63 bool intel_huc_is_authenticated(struct intel_huc *huc,
64 				enum intel_huc_authentication_type type);
65 int intel_huc_check_status(struct intel_huc *huc);
66 void intel_huc_update_auth_status(struct intel_huc *huc);
67 
68 void intel_huc_register_gsc_notifier(struct intel_huc *huc, const struct bus_type *bus);
69 void intel_huc_unregister_gsc_notifier(struct intel_huc *huc, const struct bus_type *bus);
70 
intel_huc_is_supported(struct intel_huc * huc)71 static inline bool intel_huc_is_supported(struct intel_huc *huc)
72 {
73 	return intel_uc_fw_is_supported(&huc->fw);
74 }
75 
intel_huc_is_wanted(struct intel_huc * huc)76 static inline bool intel_huc_is_wanted(struct intel_huc *huc)
77 {
78 	return intel_uc_fw_is_enabled(&huc->fw);
79 }
80 
intel_huc_is_used(struct intel_huc * huc)81 static inline bool intel_huc_is_used(struct intel_huc *huc)
82 {
83 	GEM_BUG_ON(__intel_uc_fw_status(&huc->fw) == INTEL_UC_FIRMWARE_SELECTED);
84 	return intel_uc_fw_is_available(&huc->fw);
85 }
86 
intel_huc_is_loaded_by_gsc(const struct intel_huc * huc)87 static inline bool intel_huc_is_loaded_by_gsc(const struct intel_huc *huc)
88 {
89 	return huc->loaded_via_gsc;
90 }
91 
intel_huc_wait_required(struct intel_huc * huc)92 static inline bool intel_huc_wait_required(struct intel_huc *huc)
93 {
94 	return intel_huc_is_used(huc) && intel_huc_is_loaded_by_gsc(huc) &&
95 	       !intel_huc_is_authenticated(huc, INTEL_HUC_AUTH_BY_GSC);
96 }
97 
98 void intel_huc_load_status(struct intel_huc *huc, struct drm_printer *p);
99 
100 #endif
101