xref: /linux/arch/riscv/include/asm/suspend.h (revision 4a1d8ababde685a77fd4fd61e58f973cbdf29f8c)
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3  * Copyright (c) 2021 Western Digital Corporation or its affiliates.
4  * Copyright (c) 2022 Ventana Micro Systems Inc.
5  */
6 
7 #ifndef _ASM_RISCV_SUSPEND_H
8 #define _ASM_RISCV_SUSPEND_H
9 
10 #include <asm/ptrace.h>
11 
12 struct suspend_context {
13 	/* Saved and restored by low-level functions */
14 	struct pt_regs regs;
15 	/* Saved and restored by high-level functions */
16 	unsigned long envcfg;
17 	unsigned long tvec;
18 	unsigned long ie;
19 #ifdef CONFIG_MMU
20 	unsigned long satp;
21 	unsigned long stimecmp;
22 #if __riscv_xlen < 64
23 	unsigned long stimecmph;
24 #endif
25 #endif
26 };
27 
28 /*
29  * Used by hibernation core and cleared during resume sequence
30  */
31 extern int in_suspend;
32 
33 /* Low-level CPU suspend entry function */
34 int __cpu_suspend_enter(struct suspend_context *context);
35 
36 /* High-level CPU suspend which will save context and call finish() */
37 int cpu_suspend(unsigned long arg,
38 		int (*finish)(unsigned long arg,
39 			      unsigned long entry,
40 			      unsigned long context));
41 
42 /* Low-level CPU resume entry function */
43 int __cpu_resume_enter(unsigned long hartid, unsigned long context);
44 
45 /* Used to save and restore the CSRs */
46 void suspend_save_csrs(struct suspend_context *context);
47 void suspend_restore_csrs(struct suspend_context *context);
48 
49 /* Low-level API to support hibernation */
50 int swsusp_arch_suspend(void);
51 int swsusp_arch_resume(void);
52 int arch_hibernation_header_save(void *addr, unsigned int max_size);
53 int arch_hibernation_header_restore(void *addr);
54 int __hibernate_cpu_resume(void);
55 
56 /* Used to resume on the CPU we hibernated on */
57 int hibernate_resume_nonboot_cpu_disable(void);
58 
59 asmlinkage void hibernate_restore_image(unsigned long resume_satp, unsigned long satp_temp,
60 					unsigned long cpu_resume);
61 asmlinkage int hibernate_core_restore_code(void);
62 bool riscv_sbi_hsm_is_supported(void);
63 bool riscv_sbi_suspend_state_is_valid(u32 state);
64 int riscv_sbi_hart_suspend(u32 state);
65 #endif
66