1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef _ASM_POWERPC_NOHASH_TLBFLUSH_H
3 #define _ASM_POWERPC_NOHASH_TLBFLUSH_H
4
5 /*
6 * TLB flushing:
7 *
8 * - flush_tlb_mm(mm) flushes the specified mm context TLB's
9 * - flush_tlb_page(vma, vmaddr) flushes one page
10 * - local_flush_tlb_mm(mm, full) flushes the specified mm context on
11 * the local processor
12 * - local_flush_tlb_page(vma, vmaddr) flushes one page on the local processor
13 * - flush_tlb_range(vma, start, end) flushes a range of pages
14 * - flush_tlb_kernel_range(start, end) flushes a range of kernel pages
15 *
16 */
17
18 /*
19 * TLB flushing for software loaded TLB chips
20 *
21 * TODO: (CONFIG_PPC_85xx) determine if flush_tlb_range &
22 * flush_tlb_kernel_range are best implemented as tlbia vs
23 * specific tlbie's
24 */
25
26 struct vm_area_struct;
27 struct mm_struct;
28
29 #define MMU_NO_CONTEXT ((unsigned int)-1)
30
31 extern void flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
32 unsigned long end);
33
34 #ifdef CONFIG_PPC_8xx
local_flush_tlb_mm(struct mm_struct * mm)35 static inline void local_flush_tlb_mm(struct mm_struct *mm)
36 {
37 unsigned int pid = READ_ONCE(mm->context.id);
38
39 if (pid != MMU_NO_CONTEXT)
40 asm volatile ("sync; tlbia; isync" : : : "memory");
41 }
42
local_flush_tlb_page(struct vm_area_struct * vma,unsigned long vmaddr)43 static inline void local_flush_tlb_page(struct vm_area_struct *vma, unsigned long vmaddr)
44 {
45 asm volatile ("tlbie %0; sync" : : "r" (vmaddr) : "memory");
46 }
47
local_flush_tlb_page_psize(struct mm_struct * mm,unsigned long vmaddr,int psize)48 static inline void local_flush_tlb_page_psize(struct mm_struct *mm,
49 unsigned long vmaddr, int psize)
50 {
51 asm volatile ("tlbie %0; sync" : : "r" (vmaddr) : "memory");
52 }
53
flush_tlb_kernel_range(unsigned long start,unsigned long end)54 static inline void flush_tlb_kernel_range(unsigned long start, unsigned long end)
55 {
56 start &= PAGE_MASK;
57
58 if (end - start <= PAGE_SIZE)
59 asm volatile ("tlbie %0; sync" : : "r" (start) : "memory");
60 else
61 asm volatile ("sync; tlbia; isync" : : : "memory");
62 }
63 #else
64 extern void flush_tlb_kernel_range(unsigned long start, unsigned long end);
65 extern void local_flush_tlb_mm(struct mm_struct *mm);
66 extern void local_flush_tlb_page(struct vm_area_struct *vma, unsigned long vmaddr);
67 void local_flush_tlb_page_psize(struct mm_struct *mm, unsigned long vmaddr, int psize);
68
69 extern void __local_flush_tlb_page(struct mm_struct *mm, unsigned long vmaddr,
70 int tsize, int ind);
71 #endif
72
73 #ifdef CONFIG_SMP
74 extern void flush_tlb_mm(struct mm_struct *mm);
75 extern void flush_tlb_page(struct vm_area_struct *vma, unsigned long vmaddr);
76 extern void __flush_tlb_page(struct mm_struct *mm, unsigned long vmaddr,
77 int tsize, int ind);
78 #else
79 #define flush_tlb_mm(mm) local_flush_tlb_mm(mm)
80 #define flush_tlb_page(vma,addr) local_flush_tlb_page(vma,addr)
81 #define __flush_tlb_page(mm,addr,p,i) __local_flush_tlb_page(mm,addr,p,i)
82 #endif
83
84 #endif /* _ASM_POWERPC_NOHASH_TLBFLUSH_H */
85