xref: /linux/arch/loongarch/include/asm/io.h (revision e927c520e1ba6b6a0b2022adf5ba455ee1553fc1)
1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3  * Copyright (C) 2020-2022 Loongson Technology Corporation Limited
4  */
5 #ifndef _ASM_IO_H
6 #define _ASM_IO_H
7 
8 #include <linux/kernel.h>
9 #include <linux/types.h>
10 
11 #include <asm/addrspace.h>
12 #include <asm/cpu.h>
13 #include <asm/page.h>
14 #include <asm/pgtable-bits.h>
15 #include <asm/string.h>
16 
17 extern void __init __iomem *early_ioremap(phys_addr_t phys_addr, unsigned long size);
18 extern void __init early_iounmap(void __iomem *addr, unsigned long size);
19 
20 #define early_memremap early_ioremap
21 #define early_memunmap early_iounmap
22 
23 #ifdef CONFIG_ARCH_IOREMAP
24 
ioremap_prot(phys_addr_t offset,unsigned long size,pgprot_t prot)25 static inline void __iomem *ioremap_prot(phys_addr_t offset, unsigned long size,
26 					 pgprot_t prot)
27 {
28 	if (offset > TO_PHYS_MASK)
29 		return NULL;
30 
31 	switch (pgprot_val(prot) & _CACHE_MASK) {
32 	case _CACHE_CC:
33 		return (void __iomem *)(unsigned long)(CACHE_BASE + offset);
34 	case _CACHE_SUC:
35 		return (void __iomem *)(unsigned long)(UNCACHE_BASE + offset);
36 	case _CACHE_WUC:
37 		return (void __iomem *)(unsigned long)(WRITECOMBINE_BASE + offset);
38 	default:
39 		return NULL;
40 	}
41 }
42 
43 #define ioremap(offset, size)		\
44 	ioremap_prot((offset), (size), PAGE_KERNEL_SUC)
45 
46 #define iounmap(addr) 			((void)(addr))
47 
48 #endif
49 
50 /*
51  * On LoongArch, ioremap() has two variants, ioremap_wc() and ioremap_cache().
52  * They map bus memory into CPU space, the mapped memory is marked uncachable
53  * (_CACHE_SUC), uncachable but accelerated by write-combine (_CACHE_WUC) and
54  * cachable (_CACHE_CC) respectively for CPU access.
55  *
56  * @offset:    bus address of the memory
57  * @size:      size of the resource to map
58  */
59 #define ioremap_wc(offset, size)	\
60 	ioremap_prot((offset), (size),	\
61 		     wc_enabled ? PAGE_KERNEL_WUC : PAGE_KERNEL_SUC)
62 
63 #define ioremap_cache(offset, size)	\
64 	ioremap_prot((offset), (size), PAGE_KERNEL)
65 
66 #define mmiowb() wmb()
67 
68 #define __io_aw() mmiowb()
69 
70 #ifdef CONFIG_KFENCE
71 #define virt_to_phys(kaddr)								\
72 ({											\
73 	(likely((unsigned long)kaddr < vm_map_base)) ? __pa((unsigned long)kaddr) :	\
74 	page_to_phys(tlb_virt_to_page((unsigned long)kaddr)) + offset_in_page((unsigned long)kaddr);\
75 })
76 
77 #define phys_to_virt(paddr)								\
78 ({											\
79 	extern char *__kfence_pool;							\
80 	(unlikely(__kfence_pool == NULL)) ? __va((unsigned long)paddr) :		\
81 	page_address(phys_to_page((unsigned long)paddr)) + offset_in_page((unsigned long)paddr);\
82 })
83 #endif
84 
85 #include <asm-generic/io.h>
86 
87 #define ARCH_HAS_VALID_PHYS_ADDR_RANGE
88 extern int valid_phys_addr_range(phys_addr_t addr, size_t size);
89 extern int valid_mmap_phys_addr_range(unsigned long pfn, size_t size);
90 
91 #endif /* _ASM_IO_H */
92