xref: /linux/drivers/gpu/drm/xe/xe_lrc_types.h (revision ddb7a62af2e766eabb4ab7080e6ed8d6b8915302)
1 /* SPDX-License-Identifier: MIT */
2 /*
3  * Copyright © 2022 Intel Corporation
4  */
5 
6 #ifndef _XE_LRC_TYPES_H_
7 #define _XE_LRC_TYPES_H_
8 
9 #include <linux/kref.h>
10 
11 #include "xe_hw_fence_types.h"
12 
13 struct xe_bo;
14 
15 /**
16  * struct xe_lrc - Logical ring context (LRC) and submission ring object
17  */
18 struct xe_lrc {
19 	/**
20 	 * @bo: buffer object (memory) for logical ring context, per process HW
21 	 * status page, and submission ring.
22 	 */
23 	struct xe_bo *bo;
24 
25 	/** @size: size of the lrc and optional indirect ring state */
26 	u32 size;
27 
28 	/** @gt: gt which this LRC belongs to */
29 	struct xe_gt *gt;
30 
31 	/** @flags: LRC flags */
32 #define XE_LRC_FLAG_INDIRECT_CTX		0x1
33 #define XE_LRC_FLAG_INDIRECT_RING_STATE		0x2
34 	u32 flags;
35 
36 	/** @refcount: ref count of this lrc */
37 	struct kref refcount;
38 
39 	/** @ring: submission ring state */
40 	struct {
41 		/** @ring.size: size of submission ring */
42 		u32 size;
43 		/** @ring.tail: tail of submission ring */
44 		u32 tail;
45 		/** @ring.old_tail: shadow of tail */
46 		u32 old_tail;
47 	} ring;
48 
49 	/** @desc: LRC descriptor */
50 	u64 desc;
51 
52 	/** @fence_ctx: context for hw fence */
53 	struct xe_hw_fence_ctx fence_ctx;
54 
55 	/** @ctx_timestamp: readout value of CTX_TIMESTAMP on last update */
56 	u64 ctx_timestamp;
57 };
58 
59 struct xe_lrc_snapshot;
60 
61 #endif
62