1 /* SPDX-License-Identifier: MIT */ 2 /* 3 * Copyright © 2022 Intel Corporation 4 */ 5 6 #ifndef _XE_FORCE_WAKE_TYPES_H_ 7 #define _XE_FORCE_WAKE_TYPES_H_ 8 9 #include <linux/mutex.h> 10 #include <linux/types.h> 11 12 #include "regs/xe_reg_defs.h" 13 14 enum xe_force_wake_domain_id { 15 XE_FW_DOMAIN_ID_GT = 0, 16 XE_FW_DOMAIN_ID_RENDER, 17 XE_FW_DOMAIN_ID_MEDIA, 18 XE_FW_DOMAIN_ID_MEDIA_VDBOX0, 19 XE_FW_DOMAIN_ID_MEDIA_VDBOX1, 20 XE_FW_DOMAIN_ID_MEDIA_VDBOX2, 21 XE_FW_DOMAIN_ID_MEDIA_VDBOX3, 22 XE_FW_DOMAIN_ID_MEDIA_VDBOX4, 23 XE_FW_DOMAIN_ID_MEDIA_VDBOX5, 24 XE_FW_DOMAIN_ID_MEDIA_VDBOX6, 25 XE_FW_DOMAIN_ID_MEDIA_VDBOX7, 26 XE_FW_DOMAIN_ID_MEDIA_VEBOX0, 27 XE_FW_DOMAIN_ID_MEDIA_VEBOX1, 28 XE_FW_DOMAIN_ID_MEDIA_VEBOX2, 29 XE_FW_DOMAIN_ID_MEDIA_VEBOX3, 30 XE_FW_DOMAIN_ID_GSC, 31 XE_FW_DOMAIN_ID_COUNT 32 }; 33 34 enum xe_force_wake_domains { 35 XE_FW_GT = BIT(XE_FW_DOMAIN_ID_GT), 36 XE_FW_RENDER = BIT(XE_FW_DOMAIN_ID_RENDER), 37 XE_FW_MEDIA = BIT(XE_FW_DOMAIN_ID_MEDIA), 38 XE_FW_MEDIA_VDBOX0 = BIT(XE_FW_DOMAIN_ID_MEDIA_VDBOX0), 39 XE_FW_MEDIA_VDBOX1 = BIT(XE_FW_DOMAIN_ID_MEDIA_VDBOX1), 40 XE_FW_MEDIA_VDBOX2 = BIT(XE_FW_DOMAIN_ID_MEDIA_VDBOX2), 41 XE_FW_MEDIA_VDBOX3 = BIT(XE_FW_DOMAIN_ID_MEDIA_VDBOX3), 42 XE_FW_MEDIA_VDBOX4 = BIT(XE_FW_DOMAIN_ID_MEDIA_VDBOX4), 43 XE_FW_MEDIA_VDBOX5 = BIT(XE_FW_DOMAIN_ID_MEDIA_VDBOX5), 44 XE_FW_MEDIA_VDBOX6 = BIT(XE_FW_DOMAIN_ID_MEDIA_VDBOX6), 45 XE_FW_MEDIA_VDBOX7 = BIT(XE_FW_DOMAIN_ID_MEDIA_VDBOX7), 46 XE_FW_MEDIA_VEBOX0 = BIT(XE_FW_DOMAIN_ID_MEDIA_VEBOX0), 47 XE_FW_MEDIA_VEBOX1 = BIT(XE_FW_DOMAIN_ID_MEDIA_VEBOX1), 48 XE_FW_MEDIA_VEBOX2 = BIT(XE_FW_DOMAIN_ID_MEDIA_VEBOX2), 49 XE_FW_MEDIA_VEBOX3 = BIT(XE_FW_DOMAIN_ID_MEDIA_VEBOX3), 50 XE_FW_GSC = BIT(XE_FW_DOMAIN_ID_GSC), 51 XE_FORCEWAKE_ALL = BIT(XE_FW_DOMAIN_ID_COUNT) - 1 52 }; 53 54 /** 55 * struct xe_force_wake_domain - XE force wake domains 56 */ 57 struct xe_force_wake_domain { 58 /** @id: domain force wake id */ 59 enum xe_force_wake_domain_id id; 60 /** @reg_ctl: domain wake control register address */ 61 struct xe_reg reg_ctl; 62 /** @reg_ack: domain ack register address */ 63 struct xe_reg reg_ack; 64 /** @val: domain wake write value */ 65 u32 val; 66 /** @mask: domain mask */ 67 u32 mask; 68 /** @ref: domain reference */ 69 u32 ref; 70 }; 71 72 /** 73 * struct xe_force_wake - XE force wake 74 */ 75 struct xe_force_wake { 76 /** @gt: back pointers to GT */ 77 struct xe_gt *gt; 78 /** @lock: protects everything force wake struct */ 79 spinlock_t lock; 80 /** @awake_domains: mask of all domains awake */ 81 enum xe_force_wake_domains awake_domains; 82 /** @domains: force wake domains */ 83 struct xe_force_wake_domain domains[XE_FW_DOMAIN_ID_COUNT]; 84 }; 85 86 #endif 87