xref: /linux/arch/powerpc/platforms/powermac/low_i2c.c (revision 0ea5c948cb64bab5bc7a5516774eb8536f05aa0d)
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  * arch/powerpc/platforms/powermac/low_i2c.c
4  *
5  *  Copyright (C) 2003-2005 Ben. Herrenschmidt (benh@kernel.crashing.org)
6  *
7  * The linux i2c layer isn't completely suitable for our needs for various
8  * reasons ranging from too late initialisation to semantics not perfectly
9  * matching some requirements of the apple platform functions etc...
10  *
11  * This file thus provides a simple low level unified i2c interface for
12  * powermac that covers the various types of i2c busses used in Apple machines.
13  * For now, keywest, PMU and SMU, though we could add Cuda, or other bit
14  * banging busses found on older chipsets in earlier machines if we ever need
15  * one of them.
16  *
17  * The drivers in this file are synchronous/blocking. In addition, the
18  * keywest one is fairly slow due to the use of msleep instead of interrupts
19  * as the interrupt is currently used by i2c-keywest. In the long run, we
20  * might want to get rid of those high-level interfaces to linux i2c layer
21  * either completely (converting all drivers) or replacing them all with a
22  * single stub driver on top of this one. Once done, the interrupt will be
23  * available for our use.
24  */
25 
26 #undef DEBUG
27 #undef DEBUG_LOW
28 
29 #include <linux/types.h>
30 #include <linux/sched.h>
31 #include <linux/init.h>
32 #include <linux/export.h>
33 #include <linux/adb.h>
34 #include <linux/pmu.h>
35 #include <linux/delay.h>
36 #include <linux/completion.h>
37 #include <linux/platform_device.h>
38 #include <linux/interrupt.h>
39 #include <linux/timer.h>
40 #include <linux/mutex.h>
41 #include <linux/i2c.h>
42 #include <linux/slab.h>
43 #include <linux/of_irq.h>
44 #include <asm/keylargo.h>
45 #include <asm/uninorth.h>
46 #include <asm/io.h>
47 #include <asm/machdep.h>
48 #include <asm/smu.h>
49 #include <asm/pmac_pfunc.h>
50 #include <asm/pmac_low_i2c.h>
51 
52 #ifdef DEBUG
53 #define DBG(x...) do {\
54 		printk(KERN_DEBUG "low_i2c:" x);	\
55 	} while(0)
56 #else
57 #define DBG(x...)
58 #endif
59 
60 #ifdef DEBUG_LOW
61 #define DBG_LOW(x...) do {\
62 		printk(KERN_DEBUG "low_i2c:" x);	\
63 	} while(0)
64 #else
65 #define DBG_LOW(x...)
66 #endif
67 
68 
69 static int pmac_i2c_force_poll = 1;
70 
71 /*
72  * A bus structure. Each bus in the system has such a structure associated.
73  */
74 struct pmac_i2c_bus
75 {
76 	struct list_head	link;
77 	struct device_node	*controller;
78 	struct device_node	*busnode;
79 	int			type;
80 	int			flags;
81 	struct i2c_adapter	adapter;
82 	void			*hostdata;
83 	int			channel;	/* some hosts have multiple */
84 	int			mode;		/* current mode */
85 	struct mutex		mutex;
86 	int			opened;
87 	int			polled;		/* open mode */
88 	struct platform_device	*platform_dev;
89 	struct lock_class_key   lock_key;
90 
91 	/* ops */
92 	int (*open)(struct pmac_i2c_bus *bus);
93 	void (*close)(struct pmac_i2c_bus *bus);
94 	int (*xfer)(struct pmac_i2c_bus *bus, u8 addrdir, int subsize,
95 		    u32 subaddr, u8 *data, int len);
96 };
97 
98 static LIST_HEAD(pmac_i2c_busses);
99 
100 /*
101  * Keywest implementation
102  */
103 
104 struct pmac_i2c_host_kw
105 {
106 	struct mutex		mutex;		/* Access mutex for use by
107 						 * i2c-keywest */
108 	void __iomem		*base;		/* register base address */
109 	int			bsteps;		/* register stepping */
110 	int			speed;		/* speed */
111 	int			irq;
112 	u8			*data;
113 	unsigned		len;
114 	int			state;
115 	int			rw;
116 	int			polled;
117 	int			result;
118 	struct completion	complete;
119 	spinlock_t		lock;
120 	struct timer_list	timeout_timer;
121 };
122 
123 /* Register indices */
124 typedef enum {
125 	reg_mode = 0,
126 	reg_control,
127 	reg_status,
128 	reg_isr,
129 	reg_ier,
130 	reg_addr,
131 	reg_subaddr,
132 	reg_data
133 } reg_t;
134 
135 /* The Tumbler audio equalizer can be really slow sometimes */
136 #define KW_POLL_TIMEOUT		(2*HZ)
137 
138 /* Mode register */
139 #define KW_I2C_MODE_100KHZ	0x00
140 #define KW_I2C_MODE_50KHZ	0x01
141 #define KW_I2C_MODE_25KHZ	0x02
142 #define KW_I2C_MODE_DUMB	0x00
143 #define KW_I2C_MODE_STANDARD	0x04
144 #define KW_I2C_MODE_STANDARDSUB	0x08
145 #define KW_I2C_MODE_COMBINED	0x0C
146 #define KW_I2C_MODE_MODE_MASK	0x0C
147 #define KW_I2C_MODE_CHAN_MASK	0xF0
148 
149 /* Control register */
150 #define KW_I2C_CTL_AAK		0x01
151 #define KW_I2C_CTL_XADDR	0x02
152 #define KW_I2C_CTL_STOP		0x04
153 #define KW_I2C_CTL_START	0x08
154 
155 /* Status register */
156 #define KW_I2C_STAT_BUSY	0x01
157 #define KW_I2C_STAT_LAST_AAK	0x02
158 #define KW_I2C_STAT_LAST_RW	0x04
159 #define KW_I2C_STAT_SDA		0x08
160 #define KW_I2C_STAT_SCL		0x10
161 
162 /* IER & ISR registers */
163 #define KW_I2C_IRQ_DATA		0x01
164 #define KW_I2C_IRQ_ADDR		0x02
165 #define KW_I2C_IRQ_STOP		0x04
166 #define KW_I2C_IRQ_START	0x08
167 #define KW_I2C_IRQ_MASK		0x0F
168 
169 /* State machine states */
170 enum {
171 	state_idle,
172 	state_addr,
173 	state_read,
174 	state_write,
175 	state_stop,
176 	state_dead
177 };
178 
179 #define WRONG_STATE(name) do {\
180 		printk(KERN_DEBUG "KW: wrong state. Got %s, state: %s " \
181 		       "(isr: %02x)\n",	\
182 		       name, __kw_state_names[host->state], isr); \
183 	} while(0)
184 
185 static const char *__kw_state_names[] = {
186 	"state_idle",
187 	"state_addr",
188 	"state_read",
189 	"state_write",
190 	"state_stop",
191 	"state_dead"
192 };
193 
__kw_read_reg(struct pmac_i2c_host_kw * host,reg_t reg)194 static inline u8 __kw_read_reg(struct pmac_i2c_host_kw *host, reg_t reg)
195 {
196 	return readb(host->base + (((unsigned int)reg) << host->bsteps));
197 }
198 
__kw_write_reg(struct pmac_i2c_host_kw * host,reg_t reg,u8 val)199 static inline void __kw_write_reg(struct pmac_i2c_host_kw *host,
200 				  reg_t reg, u8 val)
201 {
202 	writeb(val, host->base + (((unsigned)reg) << host->bsteps));
203 	(void)__kw_read_reg(host, reg_subaddr);
204 }
205 
206 #define kw_write_reg(reg, val)	__kw_write_reg(host, reg, val)
207 #define kw_read_reg(reg)	__kw_read_reg(host, reg)
208 
kw_i2c_wait_interrupt(struct pmac_i2c_host_kw * host)209 static u8 kw_i2c_wait_interrupt(struct pmac_i2c_host_kw *host)
210 {
211 	int i, j;
212 	u8 isr;
213 
214 	for (i = 0; i < 1000; i++) {
215 		isr = kw_read_reg(reg_isr) & KW_I2C_IRQ_MASK;
216 		if (isr != 0)
217 			return isr;
218 
219 		/* This code is used with the timebase frozen, we cannot rely
220 		 * on udelay nor schedule when in polled mode !
221 		 * For now, just use a bogus loop....
222 		 */
223 		if (host->polled) {
224 			for (j = 1; j < 100000; j++)
225 				mb();
226 		} else
227 			msleep(1);
228 	}
229 	return isr;
230 }
231 
kw_i2c_do_stop(struct pmac_i2c_host_kw * host,int result)232 static void kw_i2c_do_stop(struct pmac_i2c_host_kw *host, int result)
233 {
234 	kw_write_reg(reg_control, KW_I2C_CTL_STOP);
235 	host->state = state_stop;
236 	host->result = result;
237 }
238 
239 
kw_i2c_handle_interrupt(struct pmac_i2c_host_kw * host,u8 isr)240 static void kw_i2c_handle_interrupt(struct pmac_i2c_host_kw *host, u8 isr)
241 {
242 	u8 ack;
243 
244 	DBG_LOW("kw_handle_interrupt(%s, isr: %x)\n",
245 		__kw_state_names[host->state], isr);
246 
247 	if (host->state == state_idle) {
248 		printk(KERN_WARNING "low_i2c: Keywest got an out of state"
249 		       " interrupt, ignoring\n");
250 		kw_write_reg(reg_isr, isr);
251 		return;
252 	}
253 
254 	if (isr == 0) {
255 		printk(KERN_WARNING "low_i2c: Timeout in i2c transfer"
256 		       " on keywest !\n");
257 		if (host->state != state_stop) {
258 			kw_i2c_do_stop(host, -EIO);
259 			return;
260 		}
261 		ack = kw_read_reg(reg_status);
262 		if (ack & KW_I2C_STAT_BUSY)
263 			kw_write_reg(reg_status, 0);
264 		host->state = state_idle;
265 		kw_write_reg(reg_ier, 0x00);
266 		if (!host->polled)
267 			complete(&host->complete);
268 		return;
269 	}
270 
271 	if (isr & KW_I2C_IRQ_ADDR) {
272 		ack = kw_read_reg(reg_status);
273 		if (host->state != state_addr) {
274 			WRONG_STATE("KW_I2C_IRQ_ADDR");
275 			kw_i2c_do_stop(host, -EIO);
276 		}
277 		if ((ack & KW_I2C_STAT_LAST_AAK) == 0) {
278 			host->result = -ENXIO;
279 			host->state = state_stop;
280 			DBG_LOW("KW: NAK on address\n");
281 		} else {
282 			if (host->len == 0)
283 				kw_i2c_do_stop(host, 0);
284 			else if (host->rw) {
285 				host->state = state_read;
286 				if (host->len > 1)
287 					kw_write_reg(reg_control,
288 						     KW_I2C_CTL_AAK);
289 			} else {
290 				host->state = state_write;
291 				kw_write_reg(reg_data, *(host->data++));
292 				host->len--;
293 			}
294 		}
295 		kw_write_reg(reg_isr, KW_I2C_IRQ_ADDR);
296 	}
297 
298 	if (isr & KW_I2C_IRQ_DATA) {
299 		if (host->state == state_read) {
300 			*(host->data++) = kw_read_reg(reg_data);
301 			host->len--;
302 			kw_write_reg(reg_isr, KW_I2C_IRQ_DATA);
303 			if (host->len == 0)
304 				host->state = state_stop;
305 			else if (host->len == 1)
306 				kw_write_reg(reg_control, 0);
307 		} else if (host->state == state_write) {
308 			ack = kw_read_reg(reg_status);
309 			if ((ack & KW_I2C_STAT_LAST_AAK) == 0) {
310 				DBG_LOW("KW: nack on data write\n");
311 				host->result = -EFBIG;
312 				host->state = state_stop;
313 			} else if (host->len) {
314 				kw_write_reg(reg_data, *(host->data++));
315 				host->len--;
316 			} else
317 				kw_i2c_do_stop(host, 0);
318 		} else {
319 			WRONG_STATE("KW_I2C_IRQ_DATA");
320 			if (host->state != state_stop)
321 				kw_i2c_do_stop(host, -EIO);
322 		}
323 		kw_write_reg(reg_isr, KW_I2C_IRQ_DATA);
324 	}
325 
326 	if (isr & KW_I2C_IRQ_STOP) {
327 		kw_write_reg(reg_isr, KW_I2C_IRQ_STOP);
328 		if (host->state != state_stop) {
329 			WRONG_STATE("KW_I2C_IRQ_STOP");
330 			host->result = -EIO;
331 		}
332 		host->state = state_idle;
333 		if (!host->polled)
334 			complete(&host->complete);
335 	}
336 
337 	/* Below should only happen in manual mode which we don't use ... */
338 	if (isr & KW_I2C_IRQ_START)
339 		kw_write_reg(reg_isr, KW_I2C_IRQ_START);
340 
341 }
342 
343 /* Interrupt handler */
kw_i2c_irq(int irq,void * dev_id)344 static irqreturn_t kw_i2c_irq(int irq, void *dev_id)
345 {
346 	struct pmac_i2c_host_kw *host = dev_id;
347 	unsigned long flags;
348 
349 	spin_lock_irqsave(&host->lock, flags);
350 	del_timer(&host->timeout_timer);
351 	kw_i2c_handle_interrupt(host, kw_read_reg(reg_isr));
352 	if (host->state != state_idle) {
353 		host->timeout_timer.expires = jiffies + KW_POLL_TIMEOUT;
354 		add_timer(&host->timeout_timer);
355 	}
356 	spin_unlock_irqrestore(&host->lock, flags);
357 	return IRQ_HANDLED;
358 }
359 
kw_i2c_timeout(struct timer_list * t)360 static void kw_i2c_timeout(struct timer_list *t)
361 {
362 	struct pmac_i2c_host_kw *host = from_timer(host, t, timeout_timer);
363 	unsigned long flags;
364 
365 	spin_lock_irqsave(&host->lock, flags);
366 
367 	/*
368 	 * If the timer is pending, that means we raced with the
369 	 * irq, in which case we just return
370 	 */
371 	if (timer_pending(&host->timeout_timer))
372 		goto skip;
373 
374 	kw_i2c_handle_interrupt(host, kw_read_reg(reg_isr));
375 	if (host->state != state_idle) {
376 		host->timeout_timer.expires = jiffies + KW_POLL_TIMEOUT;
377 		add_timer(&host->timeout_timer);
378 	}
379  skip:
380 	spin_unlock_irqrestore(&host->lock, flags);
381 }
382 
kw_i2c_open(struct pmac_i2c_bus * bus)383 static int kw_i2c_open(struct pmac_i2c_bus *bus)
384 {
385 	struct pmac_i2c_host_kw *host = bus->hostdata;
386 	mutex_lock(&host->mutex);
387 	return 0;
388 }
389 
kw_i2c_close(struct pmac_i2c_bus * bus)390 static void kw_i2c_close(struct pmac_i2c_bus *bus)
391 {
392 	struct pmac_i2c_host_kw *host = bus->hostdata;
393 	mutex_unlock(&host->mutex);
394 }
395 
kw_i2c_xfer(struct pmac_i2c_bus * bus,u8 addrdir,int subsize,u32 subaddr,u8 * data,int len)396 static int kw_i2c_xfer(struct pmac_i2c_bus *bus, u8 addrdir, int subsize,
397 		       u32 subaddr, u8 *data, int len)
398 {
399 	struct pmac_i2c_host_kw *host = bus->hostdata;
400 	u8 mode_reg = host->speed;
401 	int use_irq = host->irq && !bus->polled;
402 
403 	/* Setup mode & subaddress if any */
404 	switch(bus->mode) {
405 	case pmac_i2c_mode_dumb:
406 		return -EINVAL;
407 	case pmac_i2c_mode_std:
408 		mode_reg |= KW_I2C_MODE_STANDARD;
409 		if (subsize != 0)
410 			return -EINVAL;
411 		break;
412 	case pmac_i2c_mode_stdsub:
413 		mode_reg |= KW_I2C_MODE_STANDARDSUB;
414 		if (subsize != 1)
415 			return -EINVAL;
416 		break;
417 	case pmac_i2c_mode_combined:
418 		mode_reg |= KW_I2C_MODE_COMBINED;
419 		if (subsize != 1)
420 			return -EINVAL;
421 		break;
422 	}
423 
424 	/* Setup channel & clear pending irqs */
425 	kw_write_reg(reg_isr, kw_read_reg(reg_isr));
426 	kw_write_reg(reg_mode, mode_reg | (bus->channel << 4));
427 	kw_write_reg(reg_status, 0);
428 
429 	/* Set up address and r/w bit, strip possible stale bus number from
430 	 * address top bits
431 	 */
432 	kw_write_reg(reg_addr, addrdir & 0xff);
433 
434 	/* Set up the sub address */
435 	if ((mode_reg & KW_I2C_MODE_MODE_MASK) == KW_I2C_MODE_STANDARDSUB
436 	    || (mode_reg & KW_I2C_MODE_MODE_MASK) == KW_I2C_MODE_COMBINED)
437 		kw_write_reg(reg_subaddr, subaddr);
438 
439 	/* Prepare for async operations */
440 	host->data = data;
441 	host->len = len;
442 	host->state = state_addr;
443 	host->result = 0;
444 	host->rw = (addrdir & 1);
445 	host->polled = bus->polled;
446 
447 	/* Enable interrupt if not using polled mode and interrupt is
448 	 * available
449 	 */
450 	if (use_irq) {
451 		/* Clear completion */
452 		reinit_completion(&host->complete);
453 		/* Ack stale interrupts */
454 		kw_write_reg(reg_isr, kw_read_reg(reg_isr));
455 		/* Arm timeout */
456 		host->timeout_timer.expires = jiffies + KW_POLL_TIMEOUT;
457 		add_timer(&host->timeout_timer);
458 		/* Enable emission */
459 		kw_write_reg(reg_ier, KW_I2C_IRQ_MASK);
460 	}
461 
462 	/* Start sending address */
463 	kw_write_reg(reg_control, KW_I2C_CTL_XADDR);
464 
465 	/* Wait for completion */
466 	if (use_irq)
467 		wait_for_completion(&host->complete);
468 	else {
469 		while(host->state != state_idle) {
470 			unsigned long flags;
471 
472 			u8 isr = kw_i2c_wait_interrupt(host);
473 			spin_lock_irqsave(&host->lock, flags);
474 			kw_i2c_handle_interrupt(host, isr);
475 			spin_unlock_irqrestore(&host->lock, flags);
476 		}
477 	}
478 
479 	/* Disable emission */
480 	kw_write_reg(reg_ier, 0);
481 
482 	return host->result;
483 }
484 
kw_i2c_host_init(struct device_node * np)485 static struct pmac_i2c_host_kw *__init kw_i2c_host_init(struct device_node *np)
486 {
487 	struct pmac_i2c_host_kw *host;
488 	const u32		*psteps, *prate, *addrp;
489 	u32			steps;
490 
491 	host = kzalloc(sizeof(*host), GFP_KERNEL);
492 	if (host == NULL) {
493 		printk(KERN_ERR "low_i2c: Can't allocate host for %pOF\n",
494 		       np);
495 		return NULL;
496 	}
497 
498 	/* Apple is kind enough to provide a valid AAPL,address property
499 	 * on all i2c keywest nodes so far ... we would have to fallback
500 	 * to macio parsing if that wasn't the case
501 	 */
502 	addrp = of_get_property(np, "AAPL,address", NULL);
503 	if (addrp == NULL) {
504 		printk(KERN_ERR "low_i2c: Can't find address for %pOF\n",
505 		       np);
506 		kfree(host);
507 		return NULL;
508 	}
509 	mutex_init(&host->mutex);
510 	init_completion(&host->complete);
511 	spin_lock_init(&host->lock);
512 	timer_setup(&host->timeout_timer, kw_i2c_timeout, 0);
513 
514 	psteps = of_get_property(np, "AAPL,address-step", NULL);
515 	steps = psteps ? (*psteps) : 0x10;
516 	for (host->bsteps = 0; (steps & 0x01) == 0; host->bsteps++)
517 		steps >>= 1;
518 	/* Select interface rate */
519 	host->speed = KW_I2C_MODE_25KHZ;
520 	prate = of_get_property(np, "AAPL,i2c-rate", NULL);
521 	if (prate) switch(*prate) {
522 	case 100:
523 		host->speed = KW_I2C_MODE_100KHZ;
524 		break;
525 	case 50:
526 		host->speed = KW_I2C_MODE_50KHZ;
527 		break;
528 	case 25:
529 		host->speed = KW_I2C_MODE_25KHZ;
530 		break;
531 	}
532 	host->irq = irq_of_parse_and_map(np, 0);
533 	if (!host->irq)
534 		printk(KERN_WARNING
535 		       "low_i2c: Failed to map interrupt for %pOF\n",
536 		       np);
537 
538 	host->base = ioremap((*addrp), 0x1000);
539 	if (host->base == NULL) {
540 		printk(KERN_ERR "low_i2c: Can't map registers for %pOF\n",
541 		       np);
542 		kfree(host);
543 		return NULL;
544 	}
545 
546 	/* Make sure IRQ is disabled */
547 	kw_write_reg(reg_ier, 0);
548 
549 	/* Request chip interrupt. We set IRQF_NO_SUSPEND because we don't
550 	 * want that interrupt disabled between the 2 passes of driver
551 	 * suspend or we'll have issues running the pfuncs
552 	 */
553 	if (request_irq(host->irq, kw_i2c_irq, IRQF_NO_SUSPEND,
554 			"keywest i2c", host))
555 		host->irq = 0;
556 
557 	printk(KERN_INFO "KeyWest i2c @0x%08x irq %d %pOF\n",
558 	       *addrp, host->irq, np);
559 
560 	return host;
561 }
562 
563 
kw_i2c_add(struct pmac_i2c_host_kw * host,struct device_node * controller,struct device_node * busnode,int channel)564 static void __init kw_i2c_add(struct pmac_i2c_host_kw *host,
565 			      struct device_node *controller,
566 			      struct device_node *busnode,
567 			      int channel)
568 {
569 	struct pmac_i2c_bus *bus;
570 
571 	bus = kzalloc(sizeof(struct pmac_i2c_bus), GFP_KERNEL);
572 	if (bus == NULL)
573 		return;
574 
575 	bus->controller = of_node_get(controller);
576 	bus->busnode = of_node_get(busnode);
577 	bus->type = pmac_i2c_bus_keywest;
578 	bus->hostdata = host;
579 	bus->channel = channel;
580 	bus->mode = pmac_i2c_mode_std;
581 	bus->open = kw_i2c_open;
582 	bus->close = kw_i2c_close;
583 	bus->xfer = kw_i2c_xfer;
584 	mutex_init(&bus->mutex);
585 	lockdep_register_key(&bus->lock_key);
586 	lockdep_set_class(&bus->mutex, &bus->lock_key);
587 	if (controller == busnode)
588 		bus->flags = pmac_i2c_multibus;
589 	list_add(&bus->link, &pmac_i2c_busses);
590 
591 	printk(KERN_INFO " channel %d bus %s\n", channel,
592 	       (controller == busnode) ? "<multibus>" : busnode->full_name);
593 }
594 
kw_i2c_probe(void)595 static void __init kw_i2c_probe(void)
596 {
597 	struct device_node *np, *child, *parent;
598 
599 	/* Probe keywest-i2c busses */
600 	for_each_compatible_node(np, "i2c","keywest-i2c") {
601 		struct pmac_i2c_host_kw *host;
602 		int multibus;
603 
604 		/* Found one, init a host structure */
605 		host = kw_i2c_host_init(np);
606 		if (host == NULL)
607 			continue;
608 
609 		/* Now check if we have a multibus setup (old style) or if we
610 		 * have proper bus nodes. Note that the "new" way (proper bus
611 		 * nodes) might cause us to not create some busses that are
612 		 * kept hidden in the device-tree. In the future, we might
613 		 * want to work around that by creating busses without a node
614 		 * but not for now
615 		 */
616 		child = of_get_next_child(np, NULL);
617 		multibus = !of_node_name_eq(child, "i2c-bus");
618 		of_node_put(child);
619 
620 		/* For a multibus setup, we get the bus count based on the
621 		 * parent type
622 		 */
623 		if (multibus) {
624 			int chans, i;
625 
626 			parent = of_get_parent(np);
627 			if (parent == NULL)
628 				continue;
629 			chans = parent->name[0] == 'u' ? 2 : 1;
630 			of_node_put(parent);
631 			for (i = 0; i < chans; i++)
632 				kw_i2c_add(host, np, np, i);
633 		} else {
634 			for_each_child_of_node(np, child) {
635 				const u32 *reg = of_get_property(child,
636 						"reg", NULL);
637 				if (reg == NULL)
638 					continue;
639 				kw_i2c_add(host, np, child, *reg);
640 			}
641 		}
642 	}
643 }
644 
645 
646 /*
647  *
648  * PMU implementation
649  *
650  */
651 
652 #ifdef CONFIG_ADB_PMU
653 
654 /*
655  * i2c command block to the PMU
656  */
657 struct pmu_i2c_hdr {
658 	u8	bus;
659 	u8	mode;
660 	u8	bus2;
661 	u8	address;
662 	u8	sub_addr;
663 	u8	comb_addr;
664 	u8	count;
665 	u8	data[];
666 };
667 
pmu_i2c_complete(struct adb_request * req)668 static void pmu_i2c_complete(struct adb_request *req)
669 {
670 	complete(req->arg);
671 }
672 
pmu_i2c_xfer(struct pmac_i2c_bus * bus,u8 addrdir,int subsize,u32 subaddr,u8 * data,int len)673 static int pmu_i2c_xfer(struct pmac_i2c_bus *bus, u8 addrdir, int subsize,
674 			u32 subaddr, u8 *data, int len)
675 {
676 	struct adb_request *req = bus->hostdata;
677 	struct pmu_i2c_hdr *hdr = (struct pmu_i2c_hdr *)&req->data[1];
678 	struct completion comp;
679 	int read = addrdir & 1;
680 	int retry;
681 	int rc = 0;
682 
683 	/* For now, limit ourselves to 16 bytes transfers */
684 	if (len > 16)
685 		return -EINVAL;
686 
687 	init_completion(&comp);
688 
689 	for (retry = 0; retry < 16; retry++) {
690 		memset(req, 0, sizeof(struct adb_request));
691 		hdr->bus = bus->channel;
692 		hdr->count = len;
693 
694 		switch(bus->mode) {
695 		case pmac_i2c_mode_std:
696 			if (subsize != 0)
697 				return -EINVAL;
698 			hdr->address = addrdir;
699 			hdr->mode = PMU_I2C_MODE_SIMPLE;
700 			break;
701 		case pmac_i2c_mode_stdsub:
702 		case pmac_i2c_mode_combined:
703 			if (subsize != 1)
704 				return -EINVAL;
705 			hdr->address = addrdir & 0xfe;
706 			hdr->comb_addr = addrdir;
707 			hdr->sub_addr = subaddr;
708 			if (bus->mode == pmac_i2c_mode_stdsub)
709 				hdr->mode = PMU_I2C_MODE_STDSUB;
710 			else
711 				hdr->mode = PMU_I2C_MODE_COMBINED;
712 			break;
713 		default:
714 			return -EINVAL;
715 		}
716 
717 		reinit_completion(&comp);
718 		req->data[0] = PMU_I2C_CMD;
719 		req->reply[0] = 0xff;
720 		req->nbytes = sizeof(struct pmu_i2c_hdr) + 1;
721 		req->done = pmu_i2c_complete;
722 		req->arg = &comp;
723 		if (!read && len) {
724 			memcpy(hdr->data, data, len);
725 			req->nbytes += len;
726 		}
727 		rc = pmu_queue_request(req);
728 		if (rc)
729 			return rc;
730 		wait_for_completion(&comp);
731 		if (req->reply[0] == PMU_I2C_STATUS_OK)
732 			break;
733 		msleep(15);
734 	}
735 	if (req->reply[0] != PMU_I2C_STATUS_OK)
736 		return -EIO;
737 
738 	for (retry = 0; retry < 16; retry++) {
739 		memset(req, 0, sizeof(struct adb_request));
740 
741 		/* I know that looks like a lot, slow as hell, but darwin
742 		 * does it so let's be on the safe side for now
743 		 */
744 		msleep(15);
745 
746 		hdr->bus = PMU_I2C_BUS_STATUS;
747 
748 		reinit_completion(&comp);
749 		req->data[0] = PMU_I2C_CMD;
750 		req->reply[0] = 0xff;
751 		req->nbytes = 2;
752 		req->done = pmu_i2c_complete;
753 		req->arg = &comp;
754 		rc = pmu_queue_request(req);
755 		if (rc)
756 			return rc;
757 		wait_for_completion(&comp);
758 
759 		if (req->reply[0] == PMU_I2C_STATUS_OK && !read)
760 			return 0;
761 		if (req->reply[0] == PMU_I2C_STATUS_DATAREAD && read) {
762 			int rlen = req->reply_len - 1;
763 
764 			if (rlen != len) {
765 				printk(KERN_WARNING "low_i2c: PMU returned %d"
766 				       " bytes, expected %d !\n", rlen, len);
767 				return -EIO;
768 			}
769 			if (len)
770 				memcpy(data, &req->reply[1], len);
771 			return 0;
772 		}
773 	}
774 	return -EIO;
775 }
776 
pmu_i2c_probe(void)777 static void __init pmu_i2c_probe(void)
778 {
779 	struct pmac_i2c_bus *bus;
780 	struct device_node *busnode;
781 	int channel, sz;
782 
783 	if (!pmu_present())
784 		return;
785 
786 	/* There might or might not be a "pmu-i2c" node, we use that
787 	 * or via-pmu itself, whatever we find. I haven't seen a machine
788 	 * with separate bus nodes, so we assume a multibus setup
789 	 */
790 	busnode = of_find_node_by_name(NULL, "pmu-i2c");
791 	if (busnode == NULL)
792 		busnode = of_find_node_by_name(NULL, "via-pmu");
793 	if (busnode == NULL)
794 		return;
795 
796 	printk(KERN_INFO "PMU i2c %pOF\n", busnode);
797 
798 	/*
799 	 * We add bus 1 and 2 only for now, bus 0 is "special"
800 	 */
801 	for (channel = 1; channel <= 2; channel++) {
802 		sz = sizeof(struct pmac_i2c_bus) + sizeof(struct adb_request);
803 		bus = kzalloc(sz, GFP_KERNEL);
804 		if (bus == NULL)
805 			return;
806 
807 		bus->controller = busnode;
808 		bus->busnode = busnode;
809 		bus->type = pmac_i2c_bus_pmu;
810 		bus->channel = channel;
811 		bus->mode = pmac_i2c_mode_std;
812 		bus->hostdata = bus + 1;
813 		bus->xfer = pmu_i2c_xfer;
814 		mutex_init(&bus->mutex);
815 		lockdep_register_key(&bus->lock_key);
816 		lockdep_set_class(&bus->mutex, &bus->lock_key);
817 		bus->flags = pmac_i2c_multibus;
818 		list_add(&bus->link, &pmac_i2c_busses);
819 
820 		printk(KERN_INFO " channel %d bus <multibus>\n", channel);
821 	}
822 }
823 
824 #endif /* CONFIG_ADB_PMU */
825 
826 
827 /*
828  *
829  * SMU implementation
830  *
831  */
832 
833 #ifdef CONFIG_PMAC_SMU
834 
smu_i2c_complete(struct smu_i2c_cmd * cmd,void * misc)835 static void smu_i2c_complete(struct smu_i2c_cmd *cmd, void *misc)
836 {
837 	complete(misc);
838 }
839 
smu_i2c_xfer(struct pmac_i2c_bus * bus,u8 addrdir,int subsize,u32 subaddr,u8 * data,int len)840 static int smu_i2c_xfer(struct pmac_i2c_bus *bus, u8 addrdir, int subsize,
841 			u32 subaddr, u8 *data, int len)
842 {
843 	struct smu_i2c_cmd *cmd = bus->hostdata;
844 	struct completion comp;
845 	int read = addrdir & 1;
846 	int rc = 0;
847 
848 	if ((read && len > SMU_I2C_READ_MAX) ||
849 	    ((!read) && len > SMU_I2C_WRITE_MAX))
850 		return -EINVAL;
851 
852 	memset(cmd, 0, sizeof(struct smu_i2c_cmd));
853 	cmd->info.bus = bus->channel;
854 	cmd->info.devaddr = addrdir;
855 	cmd->info.datalen = len;
856 
857 	switch(bus->mode) {
858 	case pmac_i2c_mode_std:
859 		if (subsize != 0)
860 			return -EINVAL;
861 		cmd->info.type = SMU_I2C_TRANSFER_SIMPLE;
862 		break;
863 	case pmac_i2c_mode_stdsub:
864 	case pmac_i2c_mode_combined:
865 		if (subsize > 3 || subsize < 1)
866 			return -EINVAL;
867 		cmd->info.sublen = subsize;
868 		/* that's big-endian only but heh ! */
869 		memcpy(&cmd->info.subaddr, ((char *)&subaddr) + (4 - subsize),
870 		       subsize);
871 		if (bus->mode == pmac_i2c_mode_stdsub)
872 			cmd->info.type = SMU_I2C_TRANSFER_STDSUB;
873 		else
874 			cmd->info.type = SMU_I2C_TRANSFER_COMBINED;
875 		break;
876 	default:
877 		return -EINVAL;
878 	}
879 	if (!read && len)
880 		memcpy(cmd->info.data, data, len);
881 
882 	init_completion(&comp);
883 	cmd->done = smu_i2c_complete;
884 	cmd->misc = &comp;
885 	rc = smu_queue_i2c(cmd);
886 	if (rc < 0)
887 		return rc;
888 	wait_for_completion(&comp);
889 	rc = cmd->status;
890 
891 	if (read && len)
892 		memcpy(data, cmd->info.data, len);
893 	return rc < 0 ? rc : 0;
894 }
895 
smu_i2c_probe(void)896 static void __init smu_i2c_probe(void)
897 {
898 	struct device_node *controller, *busnode;
899 	struct pmac_i2c_bus *bus;
900 	const u32 *reg;
901 	int sz;
902 
903 	if (!smu_present())
904 		return;
905 
906 	controller = of_find_node_by_name(NULL, "smu-i2c-control");
907 	if (controller == NULL)
908 		controller = of_find_node_by_name(NULL, "smu");
909 	if (controller == NULL)
910 		return;
911 
912 	printk(KERN_INFO "SMU i2c %pOF\n", controller);
913 
914 	/* Look for childs, note that they might not be of the right
915 	 * type as older device trees mix i2c busses and other things
916 	 * at the same level
917 	 */
918 	for_each_child_of_node(controller, busnode) {
919 		if (!of_node_is_type(busnode, "i2c") &&
920 		    !of_node_is_type(busnode, "i2c-bus"))
921 			continue;
922 		reg = of_get_property(busnode, "reg", NULL);
923 		if (reg == NULL)
924 			continue;
925 
926 		sz = sizeof(struct pmac_i2c_bus) + sizeof(struct smu_i2c_cmd);
927 		bus = kzalloc(sz, GFP_KERNEL);
928 		if (bus == NULL) {
929 			of_node_put(busnode);
930 			return;
931 		}
932 
933 		bus->controller = controller;
934 		bus->busnode = of_node_get(busnode);
935 		bus->type = pmac_i2c_bus_smu;
936 		bus->channel = *reg;
937 		bus->mode = pmac_i2c_mode_std;
938 		bus->hostdata = bus + 1;
939 		bus->xfer = smu_i2c_xfer;
940 		mutex_init(&bus->mutex);
941 		lockdep_register_key(&bus->lock_key);
942 		lockdep_set_class(&bus->mutex, &bus->lock_key);
943 		bus->flags = 0;
944 		list_add(&bus->link, &pmac_i2c_busses);
945 
946 		printk(KERN_INFO " channel %x bus %pOF\n",
947 		       bus->channel, busnode);
948 	}
949 }
950 
951 #endif /* CONFIG_PMAC_SMU */
952 
953 /*
954  *
955  * Core code
956  *
957  */
958 
959 
pmac_i2c_find_bus(struct device_node * node)960 struct pmac_i2c_bus *pmac_i2c_find_bus(struct device_node *node)
961 {
962 	struct device_node *p = of_node_get(node);
963 	struct device_node *prev = NULL;
964 	struct pmac_i2c_bus *bus;
965 
966 	while(p) {
967 		list_for_each_entry(bus, &pmac_i2c_busses, link) {
968 			if (p == bus->busnode) {
969 				if (prev && bus->flags & pmac_i2c_multibus) {
970 					const u32 *reg;
971 					reg = of_get_property(prev, "reg",
972 								NULL);
973 					if (!reg)
974 						continue;
975 					if (((*reg) >> 8) != bus->channel)
976 						continue;
977 				}
978 				of_node_put(p);
979 				of_node_put(prev);
980 				return bus;
981 			}
982 		}
983 		of_node_put(prev);
984 		prev = p;
985 		p = of_get_parent(p);
986 	}
987 	return NULL;
988 }
989 EXPORT_SYMBOL_GPL(pmac_i2c_find_bus);
990 
pmac_i2c_get_dev_addr(struct device_node * device)991 u8 pmac_i2c_get_dev_addr(struct device_node *device)
992 {
993 	const u32 *reg = of_get_property(device, "reg", NULL);
994 
995 	if (reg == NULL)
996 		return 0;
997 
998 	return (*reg) & 0xff;
999 }
1000 EXPORT_SYMBOL_GPL(pmac_i2c_get_dev_addr);
1001 
pmac_i2c_get_controller(struct pmac_i2c_bus * bus)1002 struct device_node *pmac_i2c_get_controller(struct pmac_i2c_bus *bus)
1003 {
1004 	return bus->controller;
1005 }
1006 EXPORT_SYMBOL_GPL(pmac_i2c_get_controller);
1007 
pmac_i2c_get_bus_node(struct pmac_i2c_bus * bus)1008 struct device_node *pmac_i2c_get_bus_node(struct pmac_i2c_bus *bus)
1009 {
1010 	return bus->busnode;
1011 }
1012 EXPORT_SYMBOL_GPL(pmac_i2c_get_bus_node);
1013 
pmac_i2c_get_type(struct pmac_i2c_bus * bus)1014 int pmac_i2c_get_type(struct pmac_i2c_bus *bus)
1015 {
1016 	return bus->type;
1017 }
1018 EXPORT_SYMBOL_GPL(pmac_i2c_get_type);
1019 
pmac_i2c_get_flags(struct pmac_i2c_bus * bus)1020 int pmac_i2c_get_flags(struct pmac_i2c_bus *bus)
1021 {
1022 	return bus->flags;
1023 }
1024 EXPORT_SYMBOL_GPL(pmac_i2c_get_flags);
1025 
pmac_i2c_get_channel(struct pmac_i2c_bus * bus)1026 int pmac_i2c_get_channel(struct pmac_i2c_bus *bus)
1027 {
1028 	return bus->channel;
1029 }
1030 EXPORT_SYMBOL_GPL(pmac_i2c_get_channel);
1031 
1032 
pmac_i2c_get_adapter(struct pmac_i2c_bus * bus)1033 struct i2c_adapter *pmac_i2c_get_adapter(struct pmac_i2c_bus *bus)
1034 {
1035 	return &bus->adapter;
1036 }
1037 EXPORT_SYMBOL_GPL(pmac_i2c_get_adapter);
1038 
pmac_i2c_adapter_to_bus(struct i2c_adapter * adapter)1039 struct pmac_i2c_bus *pmac_i2c_adapter_to_bus(struct i2c_adapter *adapter)
1040 {
1041 	struct pmac_i2c_bus *bus;
1042 
1043 	list_for_each_entry(bus, &pmac_i2c_busses, link)
1044 		if (&bus->adapter == adapter)
1045 			return bus;
1046 	return NULL;
1047 }
1048 EXPORT_SYMBOL_GPL(pmac_i2c_adapter_to_bus);
1049 
pmac_i2c_match_adapter(struct device_node * dev,struct i2c_adapter * adapter)1050 int pmac_i2c_match_adapter(struct device_node *dev, struct i2c_adapter *adapter)
1051 {
1052 	struct pmac_i2c_bus *bus = pmac_i2c_find_bus(dev);
1053 
1054 	if (bus == NULL)
1055 		return 0;
1056 	return (&bus->adapter == adapter);
1057 }
1058 EXPORT_SYMBOL_GPL(pmac_i2c_match_adapter);
1059 
pmac_low_i2c_lock(struct device_node * np)1060 int pmac_low_i2c_lock(struct device_node *np)
1061 {
1062 	struct pmac_i2c_bus *bus, *found = NULL;
1063 
1064 	list_for_each_entry(bus, &pmac_i2c_busses, link) {
1065 		if (np == bus->controller) {
1066 			found = bus;
1067 			break;
1068 		}
1069 	}
1070 	if (!found)
1071 		return -ENODEV;
1072 	return pmac_i2c_open(bus, 0);
1073 }
1074 EXPORT_SYMBOL_GPL(pmac_low_i2c_lock);
1075 
pmac_low_i2c_unlock(struct device_node * np)1076 int pmac_low_i2c_unlock(struct device_node *np)
1077 {
1078 	struct pmac_i2c_bus *bus, *found = NULL;
1079 
1080 	list_for_each_entry(bus, &pmac_i2c_busses, link) {
1081 		if (np == bus->controller) {
1082 			found = bus;
1083 			break;
1084 		}
1085 	}
1086 	if (!found)
1087 		return -ENODEV;
1088 	pmac_i2c_close(bus);
1089 	return 0;
1090 }
1091 EXPORT_SYMBOL_GPL(pmac_low_i2c_unlock);
1092 
1093 
pmac_i2c_open(struct pmac_i2c_bus * bus,int polled)1094 int pmac_i2c_open(struct pmac_i2c_bus *bus, int polled)
1095 {
1096 	int rc;
1097 
1098 	mutex_lock(&bus->mutex);
1099 	bus->polled = polled || pmac_i2c_force_poll;
1100 	bus->opened = 1;
1101 	bus->mode = pmac_i2c_mode_std;
1102 	if (bus->open && (rc = bus->open(bus)) != 0) {
1103 		bus->opened = 0;
1104 		mutex_unlock(&bus->mutex);
1105 		return rc;
1106 	}
1107 	return 0;
1108 }
1109 EXPORT_SYMBOL_GPL(pmac_i2c_open);
1110 
pmac_i2c_close(struct pmac_i2c_bus * bus)1111 void pmac_i2c_close(struct pmac_i2c_bus *bus)
1112 {
1113 	WARN_ON(!bus->opened);
1114 	if (bus->close)
1115 		bus->close(bus);
1116 	bus->opened = 0;
1117 	mutex_unlock(&bus->mutex);
1118 }
1119 EXPORT_SYMBOL_GPL(pmac_i2c_close);
1120 
pmac_i2c_setmode(struct pmac_i2c_bus * bus,int mode)1121 int pmac_i2c_setmode(struct pmac_i2c_bus *bus, int mode)
1122 {
1123 	WARN_ON(!bus->opened);
1124 
1125 	/* Report me if you see the error below as there might be a new
1126 	 * "combined4" mode that I need to implement for the SMU bus
1127 	 */
1128 	if (mode < pmac_i2c_mode_dumb || mode > pmac_i2c_mode_combined) {
1129 		printk(KERN_ERR "low_i2c: Invalid mode %d requested on"
1130 		       " bus %pOF !\n", mode, bus->busnode);
1131 		return -EINVAL;
1132 	}
1133 	bus->mode = mode;
1134 
1135 	return 0;
1136 }
1137 EXPORT_SYMBOL_GPL(pmac_i2c_setmode);
1138 
pmac_i2c_xfer(struct pmac_i2c_bus * bus,u8 addrdir,int subsize,u32 subaddr,u8 * data,int len)1139 int pmac_i2c_xfer(struct pmac_i2c_bus *bus, u8 addrdir, int subsize,
1140 		  u32 subaddr, u8 *data, int len)
1141 {
1142 	int rc;
1143 
1144 	WARN_ON(!bus->opened);
1145 
1146 	DBG("xfer() chan=%d, addrdir=0x%x, mode=%d, subsize=%d, subaddr=0x%x,"
1147 	    " %d bytes, bus %pOF\n", bus->channel, addrdir, bus->mode, subsize,
1148 	    subaddr, len, bus->busnode);
1149 
1150 	rc = bus->xfer(bus, addrdir, subsize, subaddr, data, len);
1151 
1152 #ifdef DEBUG
1153 	if (rc)
1154 		DBG("xfer error %d\n", rc);
1155 #endif
1156 	return rc;
1157 }
1158 EXPORT_SYMBOL_GPL(pmac_i2c_xfer);
1159 
1160 /* some quirks for platform function decoding */
1161 enum {
1162 	pmac_i2c_quirk_invmask = 0x00000001u,
1163 	pmac_i2c_quirk_skip = 0x00000002u,
1164 };
1165 
pmac_i2c_devscan(void (* callback)(struct device_node * dev,int quirks))1166 static void pmac_i2c_devscan(void (*callback)(struct device_node *dev,
1167 					      int quirks))
1168 {
1169 	struct pmac_i2c_bus *bus;
1170 	struct device_node *np;
1171 	static struct whitelist_ent {
1172 		char *name;
1173 		char *compatible;
1174 		int quirks;
1175 	} whitelist[] = {
1176 		/* XXX Study device-tree's & apple drivers are get the quirks
1177 		 * right !
1178 		 */
1179 		/* Workaround: It seems that running the clockspreading
1180 		 * properties on the eMac will cause lockups during boot.
1181 		 * The machine seems to work fine without that. So for now,
1182 		 * let's make sure i2c-hwclock doesn't match about "imic"
1183 		 * clocks and we'll figure out if we really need to do
1184 		 * something special about those later.
1185 		 */
1186 		{ "i2c-hwclock", "imic5002", pmac_i2c_quirk_skip },
1187 		{ "i2c-hwclock", "imic5003", pmac_i2c_quirk_skip },
1188 		{ "i2c-hwclock", NULL, pmac_i2c_quirk_invmask },
1189 		{ "i2c-cpu-voltage", NULL, 0},
1190 		{  "temp-monitor", NULL, 0 },
1191 		{  "supply-monitor", NULL, 0 },
1192 		{ NULL, NULL, 0 },
1193 	};
1194 
1195 	/* Only some devices need to have platform functions instantiated
1196 	 * here. For now, we have a table. Others, like 9554 i2c GPIOs used
1197 	 * on Xserve, if we ever do a driver for them, will use their own
1198 	 * platform function instance
1199 	 */
1200 	list_for_each_entry(bus, &pmac_i2c_busses, link) {
1201 		for_each_child_of_node(bus->busnode, np) {
1202 			struct whitelist_ent *p;
1203 			/* If multibus, check if device is on that bus */
1204 			if (bus->flags & pmac_i2c_multibus)
1205 				if (bus != pmac_i2c_find_bus(np))
1206 					continue;
1207 			for (p = whitelist; p->name != NULL; p++) {
1208 				if (!of_node_name_eq(np, p->name))
1209 					continue;
1210 				if (p->compatible &&
1211 				    !of_device_is_compatible(np, p->compatible))
1212 					continue;
1213 				if (p->quirks & pmac_i2c_quirk_skip)
1214 					break;
1215 				callback(np, p->quirks);
1216 				break;
1217 			}
1218 		}
1219 	}
1220 }
1221 
1222 #define MAX_I2C_DATA	64
1223 
1224 struct pmac_i2c_pf_inst
1225 {
1226 	struct pmac_i2c_bus	*bus;
1227 	u8			addr;
1228 	u8			buffer[MAX_I2C_DATA];
1229 	u8			scratch[MAX_I2C_DATA];
1230 	int			bytes;
1231 	int			quirks;
1232 };
1233 
pmac_i2c_do_begin(struct pmf_function * func,struct pmf_args * args)1234 static void* pmac_i2c_do_begin(struct pmf_function *func, struct pmf_args *args)
1235 {
1236 	struct pmac_i2c_pf_inst *inst;
1237 	struct pmac_i2c_bus	*bus;
1238 
1239 	bus = pmac_i2c_find_bus(func->node);
1240 	if (bus == NULL) {
1241 		printk(KERN_ERR "low_i2c: Can't find bus for %pOF (pfunc)\n",
1242 		       func->node);
1243 		return NULL;
1244 	}
1245 	if (pmac_i2c_open(bus, 0)) {
1246 		printk(KERN_ERR "low_i2c: Can't open i2c bus for %pOF (pfunc)\n",
1247 		       func->node);
1248 		return NULL;
1249 	}
1250 
1251 	/* XXX might need GFP_ATOMIC when called during the suspend process,
1252 	 * but then, there are already lots of issues with suspending when
1253 	 * near OOM that need to be resolved, the allocator itself should
1254 	 * probably make GFP_NOIO implicit during suspend
1255 	 */
1256 	inst = kzalloc(sizeof(struct pmac_i2c_pf_inst), GFP_KERNEL);
1257 	if (inst == NULL) {
1258 		pmac_i2c_close(bus);
1259 		return NULL;
1260 	}
1261 	inst->bus = bus;
1262 	inst->addr = pmac_i2c_get_dev_addr(func->node);
1263 	inst->quirks = (int)(long)func->driver_data;
1264 	return inst;
1265 }
1266 
pmac_i2c_do_end(struct pmf_function * func,void * instdata)1267 static void pmac_i2c_do_end(struct pmf_function *func, void *instdata)
1268 {
1269 	struct pmac_i2c_pf_inst *inst = instdata;
1270 
1271 	if (inst == NULL)
1272 		return;
1273 	pmac_i2c_close(inst->bus);
1274 	kfree(inst);
1275 }
1276 
pmac_i2c_do_read(PMF_STD_ARGS,u32 len)1277 static int pmac_i2c_do_read(PMF_STD_ARGS, u32 len)
1278 {
1279 	struct pmac_i2c_pf_inst *inst = instdata;
1280 
1281 	inst->bytes = len;
1282 	return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_read, 0, 0,
1283 			     inst->buffer, len);
1284 }
1285 
pmac_i2c_do_write(PMF_STD_ARGS,u32 len,const u8 * data)1286 static int pmac_i2c_do_write(PMF_STD_ARGS, u32 len, const u8 *data)
1287 {
1288 	struct pmac_i2c_pf_inst *inst = instdata;
1289 
1290 	return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_write, 0, 0,
1291 			     (u8 *)data, len);
1292 }
1293 
1294 /* This function is used to do the masking & OR'ing for the "rmw" type
1295  * callbacks. Ze should apply the mask and OR in the values in the
1296  * buffer before writing back. The problem is that it seems that
1297  * various darwin drivers implement the mask/or differently, thus
1298  * we need to check the quirks first
1299  */
pmac_i2c_do_apply_rmw(struct pmac_i2c_pf_inst * inst,u32 len,const u8 * mask,const u8 * val)1300 static void pmac_i2c_do_apply_rmw(struct pmac_i2c_pf_inst *inst,
1301 				  u32 len, const u8 *mask, const u8 *val)
1302 {
1303 	int i;
1304 
1305 	if (inst->quirks & pmac_i2c_quirk_invmask) {
1306 		for (i = 0; i < len; i ++)
1307 			inst->scratch[i] = (inst->buffer[i] & mask[i]) | val[i];
1308 	} else {
1309 		for (i = 0; i < len; i ++)
1310 			inst->scratch[i] = (inst->buffer[i] & ~mask[i])
1311 				| (val[i] & mask[i]);
1312 	}
1313 }
1314 
pmac_i2c_do_rmw(PMF_STD_ARGS,u32 masklen,u32 valuelen,u32 totallen,const u8 * maskdata,const u8 * valuedata)1315 static int pmac_i2c_do_rmw(PMF_STD_ARGS, u32 masklen, u32 valuelen,
1316 			   u32 totallen, const u8 *maskdata,
1317 			   const u8 *valuedata)
1318 {
1319 	struct pmac_i2c_pf_inst *inst = instdata;
1320 
1321 	if (masklen > inst->bytes || valuelen > inst->bytes ||
1322 	    totallen > inst->bytes || valuelen > masklen)
1323 		return -EINVAL;
1324 
1325 	pmac_i2c_do_apply_rmw(inst, masklen, maskdata, valuedata);
1326 
1327 	return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_write, 0, 0,
1328 			     inst->scratch, totallen);
1329 }
1330 
pmac_i2c_do_read_sub(PMF_STD_ARGS,u8 subaddr,u32 len)1331 static int pmac_i2c_do_read_sub(PMF_STD_ARGS, u8 subaddr, u32 len)
1332 {
1333 	struct pmac_i2c_pf_inst *inst = instdata;
1334 
1335 	inst->bytes = len;
1336 	return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_read, 1, subaddr,
1337 			     inst->buffer, len);
1338 }
1339 
pmac_i2c_do_write_sub(PMF_STD_ARGS,u8 subaddr,u32 len,const u8 * data)1340 static int pmac_i2c_do_write_sub(PMF_STD_ARGS, u8 subaddr, u32 len,
1341 				     const u8 *data)
1342 {
1343 	struct pmac_i2c_pf_inst *inst = instdata;
1344 
1345 	return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_write, 1,
1346 			     subaddr, (u8 *)data, len);
1347 }
1348 
pmac_i2c_do_set_mode(PMF_STD_ARGS,int mode)1349 static int pmac_i2c_do_set_mode(PMF_STD_ARGS, int mode)
1350 {
1351 	struct pmac_i2c_pf_inst *inst = instdata;
1352 
1353 	return pmac_i2c_setmode(inst->bus, mode);
1354 }
1355 
pmac_i2c_do_rmw_sub(PMF_STD_ARGS,u8 subaddr,u32 masklen,u32 valuelen,u32 totallen,const u8 * maskdata,const u8 * valuedata)1356 static int pmac_i2c_do_rmw_sub(PMF_STD_ARGS, u8 subaddr, u32 masklen,
1357 			       u32 valuelen, u32 totallen, const u8 *maskdata,
1358 			       const u8 *valuedata)
1359 {
1360 	struct pmac_i2c_pf_inst *inst = instdata;
1361 
1362 	if (masklen > inst->bytes || valuelen > inst->bytes ||
1363 	    totallen > inst->bytes || valuelen > masklen)
1364 		return -EINVAL;
1365 
1366 	pmac_i2c_do_apply_rmw(inst, masklen, maskdata, valuedata);
1367 
1368 	return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_write, 1,
1369 			     subaddr, inst->scratch, totallen);
1370 }
1371 
pmac_i2c_do_mask_and_comp(PMF_STD_ARGS,u32 len,const u8 * maskdata,const u8 * valuedata)1372 static int pmac_i2c_do_mask_and_comp(PMF_STD_ARGS, u32 len,
1373 				     const u8 *maskdata,
1374 				     const u8 *valuedata)
1375 {
1376 	struct pmac_i2c_pf_inst *inst = instdata;
1377 	int i, match;
1378 
1379 	/* Get return value pointer, it's assumed to be a u32 */
1380 	if (!args || !args->count || !args->u[0].p)
1381 		return -EINVAL;
1382 
1383 	/* Check buffer */
1384 	if (len > inst->bytes)
1385 		return -EINVAL;
1386 
1387 	for (i = 0, match = 1; match && i < len; i ++)
1388 		if ((inst->buffer[i] & maskdata[i]) != valuedata[i])
1389 			match = 0;
1390 	*args->u[0].p = match;
1391 	return 0;
1392 }
1393 
pmac_i2c_do_delay(PMF_STD_ARGS,u32 duration)1394 static int pmac_i2c_do_delay(PMF_STD_ARGS, u32 duration)
1395 {
1396 	msleep((duration + 999) / 1000);
1397 	return 0;
1398 }
1399 
1400 
1401 static struct pmf_handlers pmac_i2c_pfunc_handlers = {
1402 	.begin			= pmac_i2c_do_begin,
1403 	.end			= pmac_i2c_do_end,
1404 	.read_i2c		= pmac_i2c_do_read,
1405 	.write_i2c		= pmac_i2c_do_write,
1406 	.rmw_i2c		= pmac_i2c_do_rmw,
1407 	.read_i2c_sub		= pmac_i2c_do_read_sub,
1408 	.write_i2c_sub		= pmac_i2c_do_write_sub,
1409 	.rmw_i2c_sub		= pmac_i2c_do_rmw_sub,
1410 	.set_i2c_mode		= pmac_i2c_do_set_mode,
1411 	.mask_and_compare	= pmac_i2c_do_mask_and_comp,
1412 	.delay			= pmac_i2c_do_delay,
1413 };
1414 
pmac_i2c_dev_create(struct device_node * np,int quirks)1415 static void __init pmac_i2c_dev_create(struct device_node *np, int quirks)
1416 {
1417 	DBG("dev_create(%pOF)\n", np);
1418 
1419 	pmf_register_driver(np, &pmac_i2c_pfunc_handlers,
1420 			    (void *)(long)quirks);
1421 }
1422 
pmac_i2c_dev_init(struct device_node * np,int quirks)1423 static void __init pmac_i2c_dev_init(struct device_node *np, int quirks)
1424 {
1425 	DBG("dev_create(%pOF)\n", np);
1426 
1427 	pmf_do_functions(np, NULL, 0, PMF_FLAGS_ON_INIT, NULL);
1428 }
1429 
pmac_i2c_dev_suspend(struct device_node * np,int quirks)1430 static void pmac_i2c_dev_suspend(struct device_node *np, int quirks)
1431 {
1432 	DBG("dev_suspend(%pOF)\n", np);
1433 	pmf_do_functions(np, NULL, 0, PMF_FLAGS_ON_SLEEP, NULL);
1434 }
1435 
pmac_i2c_dev_resume(struct device_node * np,int quirks)1436 static void pmac_i2c_dev_resume(struct device_node *np, int quirks)
1437 {
1438 	DBG("dev_resume(%pOF)\n", np);
1439 	pmf_do_functions(np, NULL, 0, PMF_FLAGS_ON_WAKE, NULL);
1440 }
1441 
pmac_pfunc_i2c_suspend(void)1442 void pmac_pfunc_i2c_suspend(void)
1443 {
1444 	pmac_i2c_devscan(pmac_i2c_dev_suspend);
1445 }
1446 
pmac_pfunc_i2c_resume(void)1447 void pmac_pfunc_i2c_resume(void)
1448 {
1449 	pmac_i2c_devscan(pmac_i2c_dev_resume);
1450 }
1451 
1452 /*
1453  * Initialize us: probe all i2c busses on the machine, instantiate
1454  * busses and platform functions as needed.
1455  */
1456 /* This is non-static as it might be called early by smp code */
pmac_i2c_init(void)1457 int __init pmac_i2c_init(void)
1458 {
1459 	static int i2c_inited;
1460 
1461 	if (i2c_inited)
1462 		return 0;
1463 	i2c_inited = 1;
1464 
1465 	/* Probe keywest-i2c busses */
1466 	kw_i2c_probe();
1467 
1468 #ifdef CONFIG_ADB_PMU
1469 	/* Probe PMU i2c busses */
1470 	pmu_i2c_probe();
1471 #endif
1472 
1473 #ifdef CONFIG_PMAC_SMU
1474 	/* Probe SMU i2c busses */
1475 	smu_i2c_probe();
1476 #endif
1477 
1478 	/* Now add platform functions for some known devices */
1479 	pmac_i2c_devscan(pmac_i2c_dev_create);
1480 
1481 	return 0;
1482 }
1483 machine_arch_initcall(powermac, pmac_i2c_init);
1484 
1485 /* Since pmac_i2c_init can be called too early for the platform device
1486  * registration, we need to do it at a later time. In our case, subsys
1487  * happens to fit well, though I agree it's a bit of a hack...
1488  */
pmac_i2c_create_platform_devices(void)1489 static int __init pmac_i2c_create_platform_devices(void)
1490 {
1491 	struct pmac_i2c_bus *bus;
1492 	int i = 0;
1493 
1494 	/* In the case where we are initialized from smp_init(), we must
1495 	 * not use the timer (and thus the irq). It's safe from now on
1496 	 * though
1497 	 */
1498 	pmac_i2c_force_poll = 0;
1499 
1500 	/* Create platform devices */
1501 	list_for_each_entry(bus, &pmac_i2c_busses, link) {
1502 		bus->platform_dev =
1503 			platform_device_alloc("i2c-powermac", i++);
1504 		if (bus->platform_dev == NULL)
1505 			return -ENOMEM;
1506 		bus->platform_dev->dev.platform_data = bus;
1507 		bus->platform_dev->dev.of_node = bus->busnode;
1508 		platform_device_add(bus->platform_dev);
1509 	}
1510 
1511 	/* Now call platform "init" functions */
1512 	pmac_i2c_devscan(pmac_i2c_dev_init);
1513 
1514 	return 0;
1515 }
1516 machine_subsys_initcall(powermac, pmac_i2c_create_platform_devices);
1517